1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
113 static void process_nmi(struct kvm_vcpu *vcpu);
114 static void process_smi(struct kvm_vcpu *vcpu);
115 static void enter_smm(struct kvm_vcpu *vcpu);
116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
117 static void store_regs(struct kvm_vcpu *vcpu);
118 static int sync_regs(struct kvm_vcpu *vcpu);
120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
135 static bool __read_mostly ignore_msrs = 0;
136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
138 bool __read_mostly report_ignored_msrs = true;
139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
142 unsigned int min_timer_period_us = 200;
143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
145 static bool __read_mostly kvmclock_periodic_sync = true;
146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
148 bool __read_mostly kvm_has_tsc_control;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
150 u32 __read_mostly kvm_max_guest_tsc_khz;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
158 bool __read_mostly kvm_has_bus_lock_exit;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm = 250;
163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns = -1;
172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
174 static bool __read_mostly vector_hashing = true;
175 module_param(vector_hashing, bool, S_IRUGO);
177 bool __read_mostly enable_vmware_backdoor = false;
178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
181 static bool __read_mostly force_emulation_prefix = false;
182 module_param(force_emulation_prefix, bool, S_IRUGO);
184 int __read_mostly pi_inject_timer = -1;
185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs {
195 struct user_return_notifier urn;
197 struct kvm_user_return_msr_values {
200 } values[KVM_MAX_NR_USER_RETURN_MSRS];
203 u32 __read_mostly kvm_nr_uret_msrs;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer;
214 EXPORT_SYMBOL_GPL(host_efer);
216 bool __read_mostly allow_smaller_maxphyaddr = 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
219 bool __read_mostly enable_apicv = true;
220 EXPORT_SYMBOL_GPL(enable_apicv);
222 u64 __read_mostly host_xss;
223 EXPORT_SYMBOL_GPL(host_xss);
224 u64 __read_mostly supported_xss;
225 EXPORT_SYMBOL_GPL(supported_xss);
227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
230 STATS_DESC_COUNTER(VM, mmu_pte_write),
231 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
232 STATS_DESC_COUNTER(VM, mmu_flooded),
233 STATS_DESC_COUNTER(VM, mmu_recycled),
234 STATS_DESC_COUNTER(VM, mmu_cache_miss),
235 STATS_DESC_ICOUNTER(VM, mmu_unsync),
236 STATS_DESC_ICOUNTER(VM, pages_4k),
237 STATS_DESC_ICOUNTER(VM, pages_2m),
238 STATS_DESC_ICOUNTER(VM, pages_1g),
239 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
240 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
241 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
244 const struct kvm_stats_header kvm_vm_stats_header = {
245 .name_size = KVM_STATS_NAME_SIZE,
246 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
247 .id_offset = sizeof(struct kvm_stats_header),
248 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
249 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
250 sizeof(kvm_vm_stats_desc),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU, pf_fixed),
256 STATS_DESC_COUNTER(VCPU, pf_guest),
257 STATS_DESC_COUNTER(VCPU, tlb_flush),
258 STATS_DESC_COUNTER(VCPU, invlpg),
259 STATS_DESC_COUNTER(VCPU, exits),
260 STATS_DESC_COUNTER(VCPU, io_exits),
261 STATS_DESC_COUNTER(VCPU, mmio_exits),
262 STATS_DESC_COUNTER(VCPU, signal_exits),
263 STATS_DESC_COUNTER(VCPU, irq_window_exits),
264 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
265 STATS_DESC_COUNTER(VCPU, l1d_flush),
266 STATS_DESC_COUNTER(VCPU, halt_exits),
267 STATS_DESC_COUNTER(VCPU, request_irq_exits),
268 STATS_DESC_COUNTER(VCPU, irq_exits),
269 STATS_DESC_COUNTER(VCPU, host_state_reload),
270 STATS_DESC_COUNTER(VCPU, fpu_reload),
271 STATS_DESC_COUNTER(VCPU, insn_emulation),
272 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
273 STATS_DESC_COUNTER(VCPU, hypercalls),
274 STATS_DESC_COUNTER(VCPU, irq_injections),
275 STATS_DESC_COUNTER(VCPU, nmi_injections),
276 STATS_DESC_COUNTER(VCPU, req_event),
277 STATS_DESC_COUNTER(VCPU, nested_run),
278 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
279 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
280 STATS_DESC_COUNTER(VCPU, preemption_reported),
281 STATS_DESC_COUNTER(VCPU, preemption_other),
282 STATS_DESC_ICOUNTER(VCPU, guest_mode)
285 const struct kvm_stats_header kvm_vcpu_stats_header = {
286 .name_size = KVM_STATS_NAME_SIZE,
287 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
288 .id_offset = sizeof(struct kvm_stats_header),
289 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
290 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
291 sizeof(kvm_vcpu_stats_desc),
294 u64 __read_mostly host_xcr0;
295 u64 __read_mostly supported_xcr0;
296 EXPORT_SYMBOL_GPL(supported_xcr0);
298 static struct kmem_cache *x86_fpu_cache;
300 static struct kmem_cache *x86_emulator_cache;
303 * When called, it means the previous get/set msr reached an invalid msr.
304 * Return true if we want to ignore/silent this failed msr access.
306 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
308 const char *op = write ? "wrmsr" : "rdmsr";
311 if (report_ignored_msrs)
312 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
317 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
323 static struct kmem_cache *kvm_alloc_emulator_cache(void)
325 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
326 unsigned int size = sizeof(struct x86_emulate_ctxt);
328 return kmem_cache_create_usercopy("x86_emulator", size,
329 __alignof__(struct x86_emulate_ctxt),
330 SLAB_ACCOUNT, useroffset,
331 size - useroffset, NULL);
334 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
336 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
339 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
340 vcpu->arch.apf.gfns[i] = ~0;
343 static void kvm_on_user_return(struct user_return_notifier *urn)
346 struct kvm_user_return_msrs *msrs
347 = container_of(urn, struct kvm_user_return_msrs, urn);
348 struct kvm_user_return_msr_values *values;
352 * Disabling irqs at this point since the following code could be
353 * interrupted and executed through kvm_arch_hardware_disable()
355 local_irq_save(flags);
356 if (msrs->registered) {
357 msrs->registered = false;
358 user_return_notifier_unregister(urn);
360 local_irq_restore(flags);
361 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
362 values = &msrs->values[slot];
363 if (values->host != values->curr) {
364 wrmsrl(kvm_uret_msrs_list[slot], values->host);
365 values->curr = values->host;
370 static int kvm_probe_user_return_msr(u32 msr)
376 ret = rdmsrl_safe(msr, &val);
379 ret = wrmsrl_safe(msr, val);
385 int kvm_add_user_return_msr(u32 msr)
387 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
389 if (kvm_probe_user_return_msr(msr))
392 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
393 return kvm_nr_uret_msrs++;
395 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
397 int kvm_find_user_return_msr(u32 msr)
401 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
402 if (kvm_uret_msrs_list[i] == msr)
407 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
409 static void kvm_user_return_msr_cpu_online(void)
411 unsigned int cpu = smp_processor_id();
412 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
416 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
417 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
418 msrs->values[i].host = value;
419 msrs->values[i].curr = value;
423 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
425 unsigned int cpu = smp_processor_id();
426 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
429 value = (value & mask) | (msrs->values[slot].host & ~mask);
430 if (value == msrs->values[slot].curr)
432 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
436 msrs->values[slot].curr = value;
437 if (!msrs->registered) {
438 msrs->urn.on_user_return = kvm_on_user_return;
439 user_return_notifier_register(&msrs->urn);
440 msrs->registered = true;
444 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
446 static void drop_user_return_notifiers(void)
448 unsigned int cpu = smp_processor_id();
449 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
451 if (msrs->registered)
452 kvm_on_user_return(&msrs->urn);
455 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
457 return vcpu->arch.apic_base;
459 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
461 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
463 return kvm_apic_mode(kvm_get_apic_base(vcpu));
465 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
467 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
469 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
470 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
471 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
472 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
474 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
476 if (!msr_info->host_initiated) {
477 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
479 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
483 kvm_lapic_set_base(vcpu, msr_info->data);
484 kvm_recalculate_apic_map(vcpu->kvm);
487 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
490 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
492 * Hardware virtualization extension instructions may fault if a reboot turns
493 * off virtualization while processes are running. Usually after catching the
494 * fault we just panic; during reboot instead the instruction is ignored.
496 noinstr void kvm_spurious_fault(void)
498 /* Fault while not rebooting. We want the trace. */
499 BUG_ON(!kvm_rebooting);
501 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
503 #define EXCPT_BENIGN 0
504 #define EXCPT_CONTRIBUTORY 1
507 static int exception_class(int vector)
517 return EXCPT_CONTRIBUTORY;
524 #define EXCPT_FAULT 0
526 #define EXCPT_ABORT 2
527 #define EXCPT_INTERRUPT 3
530 static int exception_type(int vector)
534 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
535 return EXCPT_INTERRUPT;
540 * #DBs can be trap-like or fault-like, the caller must check other CPU
541 * state, e.g. DR6, to determine whether a #DB is a trap or fault.
543 if (mask & (1 << DB_VECTOR))
546 if (mask & ((1 << BP_VECTOR) | (1 << OF_VECTOR)))
549 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
552 /* Reserved exceptions will result in fault */
556 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
558 unsigned nr = vcpu->arch.exception.nr;
559 bool has_payload = vcpu->arch.exception.has_payload;
560 unsigned long payload = vcpu->arch.exception.payload;
568 * "Certain debug exceptions may clear bit 0-3. The
569 * remaining contents of the DR6 register are never
570 * cleared by the processor".
572 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
574 * In order to reflect the #DB exception payload in guest
575 * dr6, three components need to be considered: active low
576 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
578 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
579 * In the target guest dr6:
580 * FIXED_1 bits should always be set.
581 * Active low bits should be cleared if 1-setting in payload.
582 * Active high bits should be set if 1-setting in payload.
584 * Note, the payload is compatible with the pending debug
585 * exceptions/exit qualification under VMX, that active_low bits
586 * are active high in payload.
587 * So they need to be flipped for DR6.
589 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
590 vcpu->arch.dr6 |= payload;
591 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
594 * The #DB payload is defined as compatible with the 'pending
595 * debug exceptions' field under VMX, not DR6. While bit 12 is
596 * defined in the 'pending debug exceptions' field (enabled
597 * breakpoint), it is reserved and must be zero in DR6.
599 vcpu->arch.dr6 &= ~BIT(12);
602 vcpu->arch.cr2 = payload;
606 vcpu->arch.exception.has_payload = false;
607 vcpu->arch.exception.payload = 0;
609 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
611 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
612 unsigned nr, bool has_error, u32 error_code,
613 bool has_payload, unsigned long payload, bool reinject)
618 kvm_make_request(KVM_REQ_EVENT, vcpu);
620 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
624 * On vmentry, vcpu->arch.exception.pending is only
625 * true if an event injection was blocked by
626 * nested_run_pending. In that case, however,
627 * vcpu_enter_guest requests an immediate exit,
628 * and the guest shouldn't proceed far enough to
631 WARN_ON_ONCE(vcpu->arch.exception.pending);
632 vcpu->arch.exception.injected = true;
633 if (WARN_ON_ONCE(has_payload)) {
635 * A reinjected event has already
636 * delivered its payload.
642 vcpu->arch.exception.pending = true;
643 vcpu->arch.exception.injected = false;
645 vcpu->arch.exception.has_error_code = has_error;
646 vcpu->arch.exception.nr = nr;
647 vcpu->arch.exception.error_code = error_code;
648 vcpu->arch.exception.has_payload = has_payload;
649 vcpu->arch.exception.payload = payload;
650 if (!is_guest_mode(vcpu))
651 kvm_deliver_exception_payload(vcpu);
655 /* to check exception */
656 prev_nr = vcpu->arch.exception.nr;
657 if (prev_nr == DF_VECTOR) {
658 /* triple fault -> shutdown */
659 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
662 class1 = exception_class(prev_nr);
663 class2 = exception_class(nr);
664 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
665 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
667 * Generate double fault per SDM Table 5-5. Set
668 * exception.pending = true so that the double fault
669 * can trigger a nested vmexit.
671 vcpu->arch.exception.pending = true;
672 vcpu->arch.exception.injected = false;
673 vcpu->arch.exception.has_error_code = true;
674 vcpu->arch.exception.nr = DF_VECTOR;
675 vcpu->arch.exception.error_code = 0;
676 vcpu->arch.exception.has_payload = false;
677 vcpu->arch.exception.payload = 0;
679 /* replace previous exception with a new one in a hope
680 that instruction re-execution will regenerate lost
685 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
687 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
689 EXPORT_SYMBOL_GPL(kvm_queue_exception);
691 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
693 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
695 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
697 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
698 unsigned long payload)
700 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
702 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
704 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
705 u32 error_code, unsigned long payload)
707 kvm_multiple_exception(vcpu, nr, true, error_code,
708 true, payload, false);
711 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
714 kvm_inject_gp(vcpu, 0);
716 return kvm_skip_emulated_instruction(vcpu);
720 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
722 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
724 ++vcpu->stat.pf_guest;
725 vcpu->arch.exception.nested_apf =
726 is_guest_mode(vcpu) && fault->async_page_fault;
727 if (vcpu->arch.exception.nested_apf) {
728 vcpu->arch.apf.nested_apf_token = fault->address;
729 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
731 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
735 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
737 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
738 struct x86_exception *fault)
740 struct kvm_mmu *fault_mmu;
741 WARN_ON_ONCE(fault->vector != PF_VECTOR);
743 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
747 * Invalidate the TLB entry for the faulting address, if it exists,
748 * else the access will fault indefinitely (and to emulate hardware).
750 if ((fault->error_code & PFERR_PRESENT_MASK) &&
751 !(fault->error_code & PFERR_RSVD_MASK))
752 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
753 fault_mmu->root_hpa);
755 fault_mmu->inject_page_fault(vcpu, fault);
756 return fault->nested_page_fault;
758 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
760 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
762 atomic_inc(&vcpu->arch.nmi_queued);
763 kvm_make_request(KVM_REQ_NMI, vcpu);
765 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
767 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
769 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
771 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
773 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
775 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
777 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
780 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
781 * a #GP and return false.
783 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
785 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
787 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
790 EXPORT_SYMBOL_GPL(kvm_require_cpl);
792 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
794 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
797 kvm_queue_exception(vcpu, UD_VECTOR);
800 EXPORT_SYMBOL_GPL(kvm_require_dr);
803 * This function will be used to read from the physical memory of the currently
804 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
805 * can read from guest physical or from the guest's guest physical memory.
807 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
808 gfn_t ngfn, void *data, int offset, int len,
811 struct x86_exception exception;
815 ngpa = gfn_to_gpa(ngfn);
816 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
817 if (real_gfn == UNMAPPED_GVA)
820 real_gfn = gpa_to_gfn(real_gfn);
822 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
824 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
826 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
828 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
832 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
834 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
836 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
837 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
840 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
842 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
843 offset * sizeof(u64), sizeof(pdpte),
844 PFERR_USER_MASK|PFERR_WRITE_MASK);
849 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
850 if ((pdpte[i] & PT_PRESENT_MASK) &&
851 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
858 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
859 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
860 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
861 vcpu->arch.pdptrs_from_userspace = false;
867 EXPORT_SYMBOL_GPL(load_pdptrs);
869 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
871 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
872 kvm_clear_async_pf_completion_queue(vcpu);
873 kvm_async_pf_hash_reset(vcpu);
876 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
877 kvm_mmu_reset_context(vcpu);
879 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
880 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
881 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
882 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
884 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
886 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
888 unsigned long old_cr0 = kvm_read_cr0(vcpu);
889 unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
894 if (cr0 & 0xffffffff00000000UL)
898 cr0 &= ~CR0_RESERVED_BITS;
900 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
903 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
907 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
908 (cr0 & X86_CR0_PG)) {
913 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
918 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
919 is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
920 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
923 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
926 static_call(kvm_x86_set_cr0)(vcpu, cr0);
928 kvm_post_set_cr0(vcpu, old_cr0, cr0);
932 EXPORT_SYMBOL_GPL(kvm_set_cr0);
934 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
936 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
938 EXPORT_SYMBOL_GPL(kvm_lmsw);
940 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
942 if (vcpu->arch.guest_state_protected)
945 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
947 if (vcpu->arch.xcr0 != host_xcr0)
948 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
950 if (vcpu->arch.xsaves_enabled &&
951 vcpu->arch.ia32_xss != host_xss)
952 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
955 if (static_cpu_has(X86_FEATURE_PKU) &&
956 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
957 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
958 vcpu->arch.pkru != vcpu->arch.host_pkru)
959 write_pkru(vcpu->arch.pkru);
961 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
963 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
965 if (vcpu->arch.guest_state_protected)
968 if (static_cpu_has(X86_FEATURE_PKU) &&
969 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
970 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
971 vcpu->arch.pkru = rdpkru();
972 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
973 write_pkru(vcpu->arch.host_pkru);
976 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
978 if (vcpu->arch.xcr0 != host_xcr0)
979 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
981 if (vcpu->arch.xsaves_enabled &&
982 vcpu->arch.ia32_xss != host_xss)
983 wrmsrl(MSR_IA32_XSS, host_xss);
987 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
989 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
992 u64 old_xcr0 = vcpu->arch.xcr0;
995 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
996 if (index != XCR_XFEATURE_ENABLED_MASK)
998 if (!(xcr0 & XFEATURE_MASK_FP))
1000 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1004 * Do not allow the guest to set bits that we do not support
1005 * saving. However, xcr0 bit 0 is always set, even if the
1006 * emulated CPU does not support XSAVE (see fx_init).
1008 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1009 if (xcr0 & ~valid_bits)
1012 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1013 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1016 if (xcr0 & XFEATURE_MASK_AVX512) {
1017 if (!(xcr0 & XFEATURE_MASK_YMM))
1019 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1022 vcpu->arch.xcr0 = xcr0;
1024 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1025 kvm_update_cpuid_runtime(vcpu);
1029 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1031 /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1032 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1033 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1034 kvm_inject_gp(vcpu, 0);
1038 return kvm_skip_emulated_instruction(vcpu);
1040 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1042 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1044 if (cr4 & cr4_reserved_bits)
1047 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1052 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4);
1054 static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1056 return __kvm_is_valid_cr4(vcpu, cr4) &&
1057 static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1060 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1062 if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1063 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1064 kvm_mmu_reset_context(vcpu);
1066 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1068 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1070 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1071 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1074 if (!kvm_is_valid_cr4(vcpu, cr4))
1077 if (is_long_mode(vcpu)) {
1078 if (!(cr4 & X86_CR4_PAE))
1080 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1082 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1083 && ((cr4 ^ old_cr4) & pdptr_bits)
1084 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1085 kvm_read_cr3(vcpu)))
1088 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1089 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1092 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1093 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1097 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1099 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1103 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1105 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1107 struct kvm_mmu *mmu = vcpu->arch.mmu;
1108 unsigned long roots_to_free = 0;
1112 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1113 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1114 * also via the emulator. KVM's TDP page tables are not in the scope of
1115 * the invalidation, but the guest's TLB entries need to be flushed as
1116 * the CPU may have cached entries in its TLB for the target PCID.
1118 if (unlikely(tdp_enabled)) {
1119 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1124 * If neither the current CR3 nor any of the prev_roots use the given
1125 * PCID, then nothing needs to be done here because a resync will
1126 * happen anyway before switching to any other CR3.
1128 if (kvm_get_active_pcid(vcpu) == pcid) {
1129 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1130 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1133 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1134 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1135 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1137 kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1140 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1142 bool skip_tlb_flush = false;
1143 unsigned long pcid = 0;
1144 #ifdef CONFIG_X86_64
1145 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1148 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1149 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1150 pcid = cr3 & X86_CR3_PCID_MASK;
1154 /* PDPTRs are always reloaded for PAE paging. */
1155 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1156 goto handle_tlb_flush;
1159 * Do not condition the GPA check on long mode, this helper is used to
1160 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1161 * the current vCPU mode is accurate.
1163 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1166 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1169 if (cr3 != kvm_read_cr3(vcpu))
1170 kvm_mmu_new_pgd(vcpu, cr3);
1172 vcpu->arch.cr3 = cr3;
1173 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1177 * A load of CR3 that flushes the TLB flushes only the current PCID,
1178 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1179 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1180 * and it's impossible to use a non-zero PCID when PCID is disabled,
1181 * i.e. only PCID=0 can be relevant.
1183 if (!skip_tlb_flush)
1184 kvm_invalidate_pcid(vcpu, pcid);
1188 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1190 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1192 if (cr8 & CR8_RESERVED_BITS)
1194 if (lapic_in_kernel(vcpu))
1195 kvm_lapic_set_tpr(vcpu, cr8);
1197 vcpu->arch.cr8 = cr8;
1200 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1202 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1204 if (lapic_in_kernel(vcpu))
1205 return kvm_lapic_get_cr8(vcpu);
1207 return vcpu->arch.cr8;
1209 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1211 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1215 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1216 for (i = 0; i < KVM_NR_DB_REGS; i++)
1217 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1221 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1225 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1226 dr7 = vcpu->arch.guest_debug_dr7;
1228 dr7 = vcpu->arch.dr7;
1229 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1230 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1231 if (dr7 & DR7_BP_EN_MASK)
1232 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1234 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1236 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1238 u64 fixed = DR6_FIXED_1;
1240 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1243 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1244 fixed |= DR6_BUS_LOCK;
1248 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1250 size_t size = ARRAY_SIZE(vcpu->arch.db);
1254 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1255 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1256 vcpu->arch.eff_db[dr] = val;
1260 if (!kvm_dr6_valid(val))
1262 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1266 if (!kvm_dr7_valid(val))
1268 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1269 kvm_update_dr7(vcpu);
1275 EXPORT_SYMBOL_GPL(kvm_set_dr);
1277 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1279 size_t size = ARRAY_SIZE(vcpu->arch.db);
1283 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1287 *val = vcpu->arch.dr6;
1291 *val = vcpu->arch.dr7;
1295 EXPORT_SYMBOL_GPL(kvm_get_dr);
1297 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1299 u32 ecx = kvm_rcx_read(vcpu);
1302 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1303 kvm_inject_gp(vcpu, 0);
1307 kvm_rax_write(vcpu, (u32)data);
1308 kvm_rdx_write(vcpu, data >> 32);
1309 return kvm_skip_emulated_instruction(vcpu);
1311 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1314 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1315 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1317 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1318 * extract the supported MSRs from the related const lists.
1319 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1320 * capabilities of the host cpu. This capabilities test skips MSRs that are
1321 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1322 * may depend on host virtualization features rather than host cpu features.
1325 static const u32 msrs_to_save_all[] = {
1326 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1328 #ifdef CONFIG_X86_64
1329 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1331 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1332 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1334 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1335 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1336 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1337 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1338 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1339 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1340 MSR_IA32_UMWAIT_CONTROL,
1342 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1343 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1344 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1345 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1346 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1347 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1348 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1349 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1350 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1351 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1352 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1353 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1354 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1355 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1356 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1357 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1358 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1359 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1360 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1361 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1362 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1363 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1365 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1366 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1367 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1368 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1369 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1370 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1373 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1374 static unsigned num_msrs_to_save;
1376 static const u32 emulated_msrs_all[] = {
1377 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1378 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1379 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1380 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1381 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1382 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1383 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1385 HV_X64_MSR_VP_INDEX,
1386 HV_X64_MSR_VP_RUNTIME,
1387 HV_X64_MSR_SCONTROL,
1388 HV_X64_MSR_STIMER0_CONFIG,
1389 HV_X64_MSR_VP_ASSIST_PAGE,
1390 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1391 HV_X64_MSR_TSC_EMULATION_STATUS,
1392 HV_X64_MSR_SYNDBG_OPTIONS,
1393 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1394 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1395 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1397 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1398 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1400 MSR_IA32_TSC_ADJUST,
1401 MSR_IA32_TSC_DEADLINE,
1402 MSR_IA32_ARCH_CAPABILITIES,
1403 MSR_IA32_PERF_CAPABILITIES,
1404 MSR_IA32_MISC_ENABLE,
1405 MSR_IA32_MCG_STATUS,
1407 MSR_IA32_MCG_EXT_CTL,
1411 MSR_MISC_FEATURES_ENABLES,
1412 MSR_AMD64_VIRT_SPEC_CTRL,
1417 * The following list leaves out MSRs whose values are determined
1418 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1419 * We always support the "true" VMX control MSRs, even if the host
1420 * processor does not, so I am putting these registers here rather
1421 * than in msrs_to_save_all.
1424 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1425 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1426 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1427 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1429 MSR_IA32_VMX_CR0_FIXED0,
1430 MSR_IA32_VMX_CR4_FIXED0,
1431 MSR_IA32_VMX_VMCS_ENUM,
1432 MSR_IA32_VMX_PROCBASED_CTLS2,
1433 MSR_IA32_VMX_EPT_VPID_CAP,
1434 MSR_IA32_VMX_VMFUNC,
1437 MSR_KVM_POLL_CONTROL,
1440 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1441 static unsigned num_emulated_msrs;
1444 * List of msr numbers which are used to expose MSR-based features that
1445 * can be used by a hypervisor to validate requested CPU features.
1447 static const u32 msr_based_features_all[] = {
1449 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1450 MSR_IA32_VMX_PINBASED_CTLS,
1451 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1452 MSR_IA32_VMX_PROCBASED_CTLS,
1453 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1454 MSR_IA32_VMX_EXIT_CTLS,
1455 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1456 MSR_IA32_VMX_ENTRY_CTLS,
1458 MSR_IA32_VMX_CR0_FIXED0,
1459 MSR_IA32_VMX_CR0_FIXED1,
1460 MSR_IA32_VMX_CR4_FIXED0,
1461 MSR_IA32_VMX_CR4_FIXED1,
1462 MSR_IA32_VMX_VMCS_ENUM,
1463 MSR_IA32_VMX_PROCBASED_CTLS2,
1464 MSR_IA32_VMX_EPT_VPID_CAP,
1465 MSR_IA32_VMX_VMFUNC,
1469 MSR_IA32_ARCH_CAPABILITIES,
1470 MSR_IA32_PERF_CAPABILITIES,
1473 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1474 static unsigned int num_msr_based_features;
1477 * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1478 * does not yet virtualize. These include:
1479 * 10 - MISC_PACKAGE_CTRLS
1480 * 11 - ENERGY_FILTERING_CTL
1482 * 18 - FB_CLEAR_CTRL
1483 * 21 - XAPIC_DISABLE_STATUS
1484 * 23 - OVERCLOCKING_STATUS
1487 #define KVM_SUPPORTED_ARCH_CAP \
1488 (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1489 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1490 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1491 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1492 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO)
1494 static u64 kvm_get_arch_capabilities(void)
1498 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {
1499 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1500 data &= KVM_SUPPORTED_ARCH_CAP;
1504 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1505 * the nested hypervisor runs with NX huge pages. If it is not,
1506 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1507 * L1 guests, so it need not worry about its own (L2) guests.
1509 data |= ARCH_CAP_PSCHANGE_MC_NO;
1512 * If we're doing cache flushes (either "always" or "cond")
1513 * we will do one whenever the guest does a vmlaunch/vmresume.
1514 * If an outer hypervisor is doing the cache flush for us
1515 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1516 * capability to the guest too, and if EPT is disabled we're not
1517 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1518 * require a nested hypervisor to do a flush of its own.
1520 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1521 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1523 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1524 data |= ARCH_CAP_RDCL_NO;
1525 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1526 data |= ARCH_CAP_SSB_NO;
1527 if (!boot_cpu_has_bug(X86_BUG_MDS))
1528 data |= ARCH_CAP_MDS_NO;
1530 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1532 * If RTM=0 because the kernel has disabled TSX, the host might
1533 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1534 * and therefore knows that there cannot be TAA) but keep
1535 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1536 * and we want to allow migrating those guests to tsx=off hosts.
1538 data &= ~ARCH_CAP_TAA_NO;
1539 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1540 data |= ARCH_CAP_TAA_NO;
1543 * Nothing to do here; we emulate TSX_CTRL if present on the
1544 * host so the guest can choose between disabling TSX or
1545 * using VERW to clear CPU buffers.
1552 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1554 switch (msr->index) {
1555 case MSR_IA32_ARCH_CAPABILITIES:
1556 msr->data = kvm_get_arch_capabilities();
1558 case MSR_IA32_UCODE_REV:
1559 rdmsrl_safe(msr->index, &msr->data);
1562 return static_call(kvm_x86_get_msr_feature)(msr);
1567 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1569 struct kvm_msr_entry msr;
1573 r = kvm_get_msr_feature(&msr);
1575 if (r == KVM_MSR_RET_INVALID) {
1576 /* Unconditionally clear the output for simplicity */
1578 if (kvm_msr_ignored_check(index, 0, false))
1590 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1592 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1595 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1598 if (efer & (EFER_LME | EFER_LMA) &&
1599 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1602 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1608 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1610 if (efer & efer_reserved_bits)
1613 return __kvm_valid_efer(vcpu, efer);
1615 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1617 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1619 u64 old_efer = vcpu->arch.efer;
1620 u64 efer = msr_info->data;
1623 if (efer & efer_reserved_bits)
1626 if (!msr_info->host_initiated) {
1627 if (!__kvm_valid_efer(vcpu, efer))
1630 if (is_paging(vcpu) &&
1631 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1636 efer |= vcpu->arch.efer & EFER_LMA;
1638 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1644 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1645 kvm_mmu_reset_context(vcpu);
1650 void kvm_enable_efer_bits(u64 mask)
1652 efer_reserved_bits &= ~mask;
1654 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1656 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1658 struct kvm_x86_msr_filter *msr_filter;
1659 struct msr_bitmap_range *ranges;
1660 struct kvm *kvm = vcpu->kvm;
1665 /* x2APIC MSRs do not support filtering. */
1666 if (index >= 0x800 && index <= 0x8ff)
1669 idx = srcu_read_lock(&kvm->srcu);
1671 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1677 allowed = msr_filter->default_allow;
1678 ranges = msr_filter->ranges;
1680 for (i = 0; i < msr_filter->count; i++) {
1681 u32 start = ranges[i].base;
1682 u32 end = start + ranges[i].nmsrs;
1683 u32 flags = ranges[i].flags;
1684 unsigned long *bitmap = ranges[i].bitmap;
1686 if ((index >= start) && (index < end) && (flags & type)) {
1687 allowed = !!test_bit(index - start, bitmap);
1693 srcu_read_unlock(&kvm->srcu, idx);
1697 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1700 * Write @data into the MSR specified by @index. Select MSR specific fault
1701 * checks are bypassed if @host_initiated is %true.
1702 * Returns 0 on success, non-0 otherwise.
1703 * Assumes vcpu_load() was already called.
1705 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1706 bool host_initiated)
1708 struct msr_data msr;
1710 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1711 return KVM_MSR_RET_FILTERED;
1716 case MSR_KERNEL_GS_BASE:
1719 if (is_noncanonical_address(data, vcpu))
1722 case MSR_IA32_SYSENTER_EIP:
1723 case MSR_IA32_SYSENTER_ESP:
1725 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1726 * non-canonical address is written on Intel but not on
1727 * AMD (which ignores the top 32-bits, because it does
1728 * not implement 64-bit SYSENTER).
1730 * 64-bit code should hence be able to write a non-canonical
1731 * value on AMD. Making the address canonical ensures that
1732 * vmentry does not fail on Intel after writing a non-canonical
1733 * value, and that something deterministic happens if the guest
1734 * invokes 64-bit SYSENTER.
1736 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1739 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1742 if (!host_initiated &&
1743 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1744 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1748 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1749 * incomplete and conflicting architectural behavior. Current
1750 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1751 * reserved and always read as zeros. Enforce Intel's reserved
1752 * bits check if and only if the guest CPU is Intel, and clear
1753 * the bits in all other cases. This ensures cross-vendor
1754 * migration will provide consistent behavior for the guest.
1756 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1765 msr.host_initiated = host_initiated;
1767 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1770 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1771 u32 index, u64 data, bool host_initiated)
1773 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1775 if (ret == KVM_MSR_RET_INVALID)
1776 if (kvm_msr_ignored_check(index, data, true))
1783 * Read the MSR specified by @index into @data. Select MSR specific fault
1784 * checks are bypassed if @host_initiated is %true.
1785 * Returns 0 on success, non-0 otherwise.
1786 * Assumes vcpu_load() was already called.
1788 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1789 bool host_initiated)
1791 struct msr_data msr;
1794 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1795 return KVM_MSR_RET_FILTERED;
1799 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1802 if (!host_initiated &&
1803 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1804 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1810 msr.host_initiated = host_initiated;
1812 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1818 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1819 u32 index, u64 *data, bool host_initiated)
1821 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1823 if (ret == KVM_MSR_RET_INVALID) {
1824 /* Unconditionally clear *data for simplicity */
1826 if (kvm_msr_ignored_check(index, 0, false))
1833 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1835 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1837 EXPORT_SYMBOL_GPL(kvm_get_msr);
1839 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1841 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1843 EXPORT_SYMBOL_GPL(kvm_set_msr);
1845 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1847 int err = vcpu->run->msr.error;
1849 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1850 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1853 return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1856 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1858 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1861 static u64 kvm_msr_reason(int r)
1864 case KVM_MSR_RET_INVALID:
1865 return KVM_MSR_EXIT_REASON_UNKNOWN;
1866 case KVM_MSR_RET_FILTERED:
1867 return KVM_MSR_EXIT_REASON_FILTER;
1869 return KVM_MSR_EXIT_REASON_INVAL;
1873 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1874 u32 exit_reason, u64 data,
1875 int (*completion)(struct kvm_vcpu *vcpu),
1878 u64 msr_reason = kvm_msr_reason(r);
1880 /* Check if the user wanted to know about this MSR fault */
1881 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1884 vcpu->run->exit_reason = exit_reason;
1885 vcpu->run->msr.error = 0;
1886 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1887 vcpu->run->msr.reason = msr_reason;
1888 vcpu->run->msr.index = index;
1889 vcpu->run->msr.data = data;
1890 vcpu->arch.complete_userspace_io = completion;
1895 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1897 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1898 complete_emulated_rdmsr, r);
1901 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1903 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1904 complete_emulated_wrmsr, r);
1907 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1909 u32 ecx = kvm_rcx_read(vcpu);
1913 r = kvm_get_msr(vcpu, ecx, &data);
1915 /* MSR read failed? See if we should ask user space */
1916 if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1917 /* Bounce to user space */
1922 trace_kvm_msr_read(ecx, data);
1924 kvm_rax_write(vcpu, data & -1u);
1925 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1927 trace_kvm_msr_read_ex(ecx);
1930 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1932 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1934 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1936 u32 ecx = kvm_rcx_read(vcpu);
1937 u64 data = kvm_read_edx_eax(vcpu);
1940 r = kvm_set_msr(vcpu, ecx, data);
1942 /* MSR write failed? See if we should ask user space */
1943 if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1944 /* Bounce to user space */
1947 /* Signal all other negative errors to userspace */
1952 trace_kvm_msr_write(ecx, data);
1954 trace_kvm_msr_write_ex(ecx, data);
1956 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1958 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1960 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1962 return kvm_skip_emulated_instruction(vcpu);
1964 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1966 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1968 /* Treat an INVD instruction as a NOP and just skip it. */
1969 return kvm_emulate_as_nop(vcpu);
1971 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1973 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1975 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1976 return kvm_emulate_as_nop(vcpu);
1978 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1980 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1982 kvm_queue_exception(vcpu, UD_VECTOR);
1985 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1987 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1989 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1990 return kvm_emulate_as_nop(vcpu);
1992 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1994 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1996 xfer_to_guest_mode_prepare();
1997 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1998 xfer_to_guest_mode_work_pending();
2002 * The fast path for frequent and performance sensitive wrmsr emulation,
2003 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2004 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2005 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2006 * other cases which must be called after interrupts are enabled on the host.
2008 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2010 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2013 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2014 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2015 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2016 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2019 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2020 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2021 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2022 trace_kvm_apic_write(APIC_ICR, (u32)data);
2029 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2031 if (!kvm_can_use_hv_timer(vcpu))
2034 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2038 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2040 u32 msr = kvm_rcx_read(vcpu);
2042 fastpath_t ret = EXIT_FASTPATH_NONE;
2045 case APIC_BASE_MSR + (APIC_ICR >> 4):
2046 data = kvm_read_edx_eax(vcpu);
2047 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2048 kvm_skip_emulated_instruction(vcpu);
2049 ret = EXIT_FASTPATH_EXIT_HANDLED;
2052 case MSR_IA32_TSC_DEADLINE:
2053 data = kvm_read_edx_eax(vcpu);
2054 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2055 kvm_skip_emulated_instruction(vcpu);
2056 ret = EXIT_FASTPATH_REENTER_GUEST;
2063 if (ret != EXIT_FASTPATH_NONE)
2064 trace_kvm_msr_write(msr, data);
2068 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2071 * Adapt set_msr() to msr_io()'s calling convention
2073 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2075 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2078 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2080 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2083 #ifdef CONFIG_X86_64
2084 struct pvclock_clock {
2094 struct pvclock_gtod_data {
2097 struct pvclock_clock clock; /* extract of a clocksource struct */
2098 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2104 static struct pvclock_gtod_data pvclock_gtod_data;
2106 static void update_pvclock_gtod(struct timekeeper *tk)
2108 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2110 write_seqcount_begin(&vdata->seq);
2112 /* copy pvclock gtod data */
2113 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2114 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2115 vdata->clock.mask = tk->tkr_mono.mask;
2116 vdata->clock.mult = tk->tkr_mono.mult;
2117 vdata->clock.shift = tk->tkr_mono.shift;
2118 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2119 vdata->clock.offset = tk->tkr_mono.base;
2121 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2122 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2123 vdata->raw_clock.mask = tk->tkr_raw.mask;
2124 vdata->raw_clock.mult = tk->tkr_raw.mult;
2125 vdata->raw_clock.shift = tk->tkr_raw.shift;
2126 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2127 vdata->raw_clock.offset = tk->tkr_raw.base;
2129 vdata->wall_time_sec = tk->xtime_sec;
2131 vdata->offs_boot = tk->offs_boot;
2133 write_seqcount_end(&vdata->seq);
2136 static s64 get_kvmclock_base_ns(void)
2138 /* Count up from boot time, but with the frequency of the raw clock. */
2139 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2142 static s64 get_kvmclock_base_ns(void)
2144 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2145 return ktime_get_boottime_ns();
2149 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2153 struct pvclock_wall_clock wc;
2160 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2165 ++version; /* first time write, random junk */
2169 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2173 * The guest calculates current wall clock time by adding
2174 * system time (updated by kvm_guest_time_update below) to the
2175 * wall clock specified here. We do the reverse here.
2177 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2179 wc.nsec = do_div(wall_nsec, 1000000000);
2180 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2181 wc.version = version;
2183 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2186 wc_sec_hi = wall_nsec >> 32;
2187 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2188 &wc_sec_hi, sizeof(wc_sec_hi));
2192 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2195 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2196 bool old_msr, bool host_initiated)
2198 struct kvm_arch *ka = &vcpu->kvm->arch;
2200 if (vcpu->vcpu_id == 0 && !host_initiated) {
2201 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2202 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2204 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2207 vcpu->arch.time = system_time;
2208 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2210 /* we verify if the enable bit is set... */
2211 vcpu->arch.pv_time_enabled = false;
2212 if (!(system_time & 1))
2215 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2216 &vcpu->arch.pv_time, system_time & ~1ULL,
2217 sizeof(struct pvclock_vcpu_time_info)))
2218 vcpu->arch.pv_time_enabled = true;
2223 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2225 do_shl32_div32(dividend, divisor);
2229 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2230 s8 *pshift, u32 *pmultiplier)
2238 scaled64 = scaled_hz;
2239 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2244 tps32 = (uint32_t)tps64;
2245 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2246 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2254 *pmultiplier = div_frac(scaled64, tps32);
2257 #ifdef CONFIG_X86_64
2258 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2261 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2262 static unsigned long max_tsc_khz;
2264 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2266 u64 v = (u64)khz * (1000000 + ppm);
2271 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2273 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2277 /* Guest TSC same frequency as host TSC? */
2279 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2283 /* TSC scaling supported? */
2284 if (!kvm_has_tsc_control) {
2285 if (user_tsc_khz > tsc_khz) {
2286 vcpu->arch.tsc_catchup = 1;
2287 vcpu->arch.tsc_always_catchup = 1;
2290 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2295 /* TSC scaling required - calculate ratio */
2296 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2297 user_tsc_khz, tsc_khz);
2299 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2300 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2305 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2309 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2311 u32 thresh_lo, thresh_hi;
2312 int use_scaling = 0;
2314 /* tsc_khz can be zero if TSC calibration fails */
2315 if (user_tsc_khz == 0) {
2316 /* set tsc_scaling_ratio to a safe value */
2317 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2321 /* Compute a scale to convert nanoseconds in TSC cycles */
2322 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2323 &vcpu->arch.virtual_tsc_shift,
2324 &vcpu->arch.virtual_tsc_mult);
2325 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2328 * Compute the variation in TSC rate which is acceptable
2329 * within the range of tolerance and decide if the
2330 * rate being applied is within that bounds of the hardware
2331 * rate. If so, no scaling or compensation need be done.
2333 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2334 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2335 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2336 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2339 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2342 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2344 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2345 vcpu->arch.virtual_tsc_mult,
2346 vcpu->arch.virtual_tsc_shift);
2347 tsc += vcpu->arch.this_tsc_write;
2351 static inline int gtod_is_based_on_tsc(int mode)
2353 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2356 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2358 #ifdef CONFIG_X86_64
2360 struct kvm_arch *ka = &vcpu->kvm->arch;
2361 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2363 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2364 atomic_read(&vcpu->kvm->online_vcpus));
2367 * Once the masterclock is enabled, always perform request in
2368 * order to update it.
2370 * In order to enable masterclock, the host clocksource must be TSC
2371 * and the vcpus need to have matched TSCs. When that happens,
2372 * perform request to enable masterclock.
2374 if (ka->use_master_clock ||
2375 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2376 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2378 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2379 atomic_read(&vcpu->kvm->online_vcpus),
2380 ka->use_master_clock, gtod->clock.vclock_mode);
2385 * Multiply tsc by a fixed point number represented by ratio.
2387 * The most significant 64-N bits (mult) of ratio represent the
2388 * integral part of the fixed point number; the remaining N bits
2389 * (frac) represent the fractional part, ie. ratio represents a fixed
2390 * point number (mult + frac * 2^(-N)).
2392 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2394 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2396 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2399 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2403 if (ratio != kvm_default_tsc_scaling_ratio)
2404 _tsc = __scale_tsc(ratio, tsc);
2408 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2410 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2414 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2416 return target_tsc - tsc;
2419 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2421 return vcpu->arch.l1_tsc_offset +
2422 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2424 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2426 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2430 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2431 nested_offset = l1_offset;
2433 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2434 kvm_tsc_scaling_ratio_frac_bits);
2436 nested_offset += l2_offset;
2437 return nested_offset;
2439 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2441 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2443 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2444 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2445 kvm_tsc_scaling_ratio_frac_bits);
2447 return l1_multiplier;
2449 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2451 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2453 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2454 vcpu->arch.l1_tsc_offset,
2457 vcpu->arch.l1_tsc_offset = l1_offset;
2460 * If we are here because L1 chose not to trap WRMSR to TSC then
2461 * according to the spec this should set L1's TSC (as opposed to
2462 * setting L1's offset for L2).
2464 if (is_guest_mode(vcpu))
2465 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2467 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2468 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2470 vcpu->arch.tsc_offset = l1_offset;
2472 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2475 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2477 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2479 /* Userspace is changing the multiplier while L2 is active */
2480 if (is_guest_mode(vcpu))
2481 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2483 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2485 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2487 if (kvm_has_tsc_control)
2488 static_call(kvm_x86_write_tsc_multiplier)(
2489 vcpu, vcpu->arch.tsc_scaling_ratio);
2492 static inline bool kvm_check_tsc_unstable(void)
2494 #ifdef CONFIG_X86_64
2496 * TSC is marked unstable when we're running on Hyper-V,
2497 * 'TSC page' clocksource is good.
2499 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2502 return check_tsc_unstable();
2505 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2507 struct kvm *kvm = vcpu->kvm;
2508 u64 offset, ns, elapsed;
2509 unsigned long flags;
2511 bool already_matched;
2512 bool synchronizing = false;
2514 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2515 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2516 ns = get_kvmclock_base_ns();
2517 elapsed = ns - kvm->arch.last_tsc_nsec;
2519 if (vcpu->arch.virtual_tsc_khz) {
2522 * detection of vcpu initialization -- need to sync
2523 * with other vCPUs. This particularly helps to keep
2524 * kvm_clock stable after CPU hotplug
2526 synchronizing = true;
2528 u64 tsc_exp = kvm->arch.last_tsc_write +
2529 nsec_to_cycles(vcpu, elapsed);
2530 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2532 * Special case: TSC write with a small delta (1 second)
2533 * of virtual cycle time against real time is
2534 * interpreted as an attempt to synchronize the CPU.
2536 synchronizing = data < tsc_exp + tsc_hz &&
2537 data + tsc_hz > tsc_exp;
2542 * For a reliable TSC, we can match TSC offsets, and for an unstable
2543 * TSC, we add elapsed time in this computation. We could let the
2544 * compensation code attempt to catch up if we fall behind, but
2545 * it's better to try to match offsets from the beginning.
2547 if (synchronizing &&
2548 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2549 if (!kvm_check_tsc_unstable()) {
2550 offset = kvm->arch.cur_tsc_offset;
2552 u64 delta = nsec_to_cycles(vcpu, elapsed);
2554 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2557 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2560 * We split periods of matched TSC writes into generations.
2561 * For each generation, we track the original measured
2562 * nanosecond time, offset, and write, so if TSCs are in
2563 * sync, we can match exact offset, and if not, we can match
2564 * exact software computation in compute_guest_tsc()
2566 * These values are tracked in kvm->arch.cur_xxx variables.
2568 kvm->arch.cur_tsc_generation++;
2569 kvm->arch.cur_tsc_nsec = ns;
2570 kvm->arch.cur_tsc_write = data;
2571 kvm->arch.cur_tsc_offset = offset;
2576 * We also track th most recent recorded KHZ, write and time to
2577 * allow the matching interval to be extended at each write.
2579 kvm->arch.last_tsc_nsec = ns;
2580 kvm->arch.last_tsc_write = data;
2581 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2583 vcpu->arch.last_guest_tsc = data;
2585 /* Keep track of which generation this VCPU has synchronized to */
2586 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2587 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2588 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2590 kvm_vcpu_write_tsc_offset(vcpu, offset);
2591 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2593 raw_spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2595 kvm->arch.nr_vcpus_matched_tsc = 0;
2596 } else if (!already_matched) {
2597 kvm->arch.nr_vcpus_matched_tsc++;
2600 kvm_track_tsc_matching(vcpu);
2601 raw_spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2604 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2607 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2608 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2611 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2613 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2614 WARN_ON(adjustment < 0);
2615 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2616 vcpu->arch.l1_tsc_scaling_ratio);
2617 adjust_tsc_offset_guest(vcpu, adjustment);
2620 #ifdef CONFIG_X86_64
2622 static u64 read_tsc(void)
2624 u64 ret = (u64)rdtsc_ordered();
2625 u64 last = pvclock_gtod_data.clock.cycle_last;
2627 if (likely(ret >= last))
2631 * GCC likes to generate cmov here, but this branch is extremely
2632 * predictable (it's just a function of time and the likely is
2633 * very likely) and there's a data dependence, so force GCC
2634 * to generate a branch instead. I don't barrier() because
2635 * we don't actually need a barrier, and if this function
2636 * ever gets inlined it will generate worse code.
2642 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2648 switch (clock->vclock_mode) {
2649 case VDSO_CLOCKMODE_HVCLOCK:
2650 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2652 if (tsc_pg_val != U64_MAX) {
2653 /* TSC page valid */
2654 *mode = VDSO_CLOCKMODE_HVCLOCK;
2655 v = (tsc_pg_val - clock->cycle_last) &
2658 /* TSC page invalid */
2659 *mode = VDSO_CLOCKMODE_NONE;
2662 case VDSO_CLOCKMODE_TSC:
2663 *mode = VDSO_CLOCKMODE_TSC;
2664 *tsc_timestamp = read_tsc();
2665 v = (*tsc_timestamp - clock->cycle_last) &
2669 *mode = VDSO_CLOCKMODE_NONE;
2672 if (*mode == VDSO_CLOCKMODE_NONE)
2673 *tsc_timestamp = v = 0;
2675 return v * clock->mult;
2678 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2680 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2686 seq = read_seqcount_begin(>od->seq);
2687 ns = gtod->raw_clock.base_cycles;
2688 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2689 ns >>= gtod->raw_clock.shift;
2690 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2691 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2697 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2699 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2705 seq = read_seqcount_begin(>od->seq);
2706 ts->tv_sec = gtod->wall_time_sec;
2707 ns = gtod->clock.base_cycles;
2708 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2709 ns >>= gtod->clock.shift;
2710 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2712 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2718 /* returns true if host is using TSC based clocksource */
2719 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2721 /* checked again under seqlock below */
2722 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2725 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2729 /* returns true if host is using TSC based clocksource */
2730 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2733 /* checked again under seqlock below */
2734 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2737 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2743 * Assuming a stable TSC across physical CPUS, and a stable TSC
2744 * across virtual CPUs, the following condition is possible.
2745 * Each numbered line represents an event visible to both
2746 * CPUs at the next numbered event.
2748 * "timespecX" represents host monotonic time. "tscX" represents
2751 * VCPU0 on CPU0 | VCPU1 on CPU1
2753 * 1. read timespec0,tsc0
2754 * 2. | timespec1 = timespec0 + N
2756 * 3. transition to guest | transition to guest
2757 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2758 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2759 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2761 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2764 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2766 * - 0 < N - M => M < N
2768 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2769 * always the case (the difference between two distinct xtime instances
2770 * might be smaller then the difference between corresponding TSC reads,
2771 * when updating guest vcpus pvclock areas).
2773 * To avoid that problem, do not allow visibility of distinct
2774 * system_timestamp/tsc_timestamp values simultaneously: use a master
2775 * copy of host monotonic time values. Update that master copy
2778 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2782 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2784 #ifdef CONFIG_X86_64
2785 struct kvm_arch *ka = &kvm->arch;
2787 bool host_tsc_clocksource, vcpus_matched;
2789 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2790 atomic_read(&kvm->online_vcpus));
2793 * If the host uses TSC clock, then passthrough TSC as stable
2796 host_tsc_clocksource = kvm_get_time_and_clockread(
2797 &ka->master_kernel_ns,
2798 &ka->master_cycle_now);
2800 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2801 && !ka->backwards_tsc_observed
2802 && !ka->boot_vcpu_runs_old_kvmclock;
2804 if (ka->use_master_clock)
2805 atomic_set(&kvm_guest_has_master_clock, 1);
2807 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2808 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2813 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2815 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2818 static void kvm_gen_update_masterclock(struct kvm *kvm)
2820 #ifdef CONFIG_X86_64
2822 struct kvm_vcpu *vcpu;
2823 struct kvm_arch *ka = &kvm->arch;
2824 unsigned long flags;
2826 kvm_hv_invalidate_tsc_page(kvm);
2828 kvm_make_mclock_inprogress_request(kvm);
2830 /* no guest entries from this point */
2831 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2832 pvclock_update_vm_gtod_copy(kvm);
2833 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2835 kvm_for_each_vcpu(i, vcpu, kvm)
2836 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2838 /* guest entries allowed */
2839 kvm_for_each_vcpu(i, vcpu, kvm)
2840 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2844 u64 get_kvmclock_ns(struct kvm *kvm)
2846 struct kvm_arch *ka = &kvm->arch;
2847 struct pvclock_vcpu_time_info hv_clock;
2848 unsigned long flags;
2851 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2852 if (!ka->use_master_clock) {
2853 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2854 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2857 hv_clock.tsc_timestamp = ka->master_cycle_now;
2858 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2859 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2861 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2864 if (__this_cpu_read(cpu_tsc_khz)) {
2865 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2866 &hv_clock.tsc_shift,
2867 &hv_clock.tsc_to_system_mul);
2868 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2870 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2877 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2878 struct gfn_to_hva_cache *cache,
2879 unsigned int offset)
2881 struct kvm_vcpu_arch *vcpu = &v->arch;
2882 struct pvclock_vcpu_time_info guest_hv_clock;
2884 if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2885 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2888 /* This VCPU is paused, but it's legal for a guest to read another
2889 * VCPU's kvmclock, so we really have to follow the specification where
2890 * it says that version is odd if data is being modified, and even after
2893 * Version field updates must be kept separate. This is because
2894 * kvm_write_guest_cached might use a "rep movs" instruction, and
2895 * writes within a string instruction are weakly ordered. So there
2896 * are three writes overall.
2898 * As a small optimization, only write the version field in the first
2899 * and third write. The vcpu->pv_time cache is still valid, because the
2900 * version field is the first in the struct.
2902 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2904 if (guest_hv_clock.version & 1)
2905 ++guest_hv_clock.version; /* first time write, random junk */
2907 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2908 kvm_write_guest_offset_cached(v->kvm, cache,
2909 &vcpu->hv_clock, offset,
2910 sizeof(vcpu->hv_clock.version));
2914 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2915 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2917 if (vcpu->pvclock_set_guest_stopped_request) {
2918 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2919 vcpu->pvclock_set_guest_stopped_request = false;
2922 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2924 kvm_write_guest_offset_cached(v->kvm, cache,
2925 &vcpu->hv_clock, offset,
2926 sizeof(vcpu->hv_clock));
2930 vcpu->hv_clock.version++;
2931 kvm_write_guest_offset_cached(v->kvm, cache,
2932 &vcpu->hv_clock, offset,
2933 sizeof(vcpu->hv_clock.version));
2936 static int kvm_guest_time_update(struct kvm_vcpu *v)
2938 unsigned long flags, tgt_tsc_khz;
2939 struct kvm_vcpu_arch *vcpu = &v->arch;
2940 struct kvm_arch *ka = &v->kvm->arch;
2942 u64 tsc_timestamp, host_tsc;
2944 bool use_master_clock;
2950 * If the host uses TSC clock, then passthrough TSC as stable
2953 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2954 use_master_clock = ka->use_master_clock;
2955 if (use_master_clock) {
2956 host_tsc = ka->master_cycle_now;
2957 kernel_ns = ka->master_kernel_ns;
2959 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2961 /* Keep irq disabled to prevent changes to the clock */
2962 local_irq_save(flags);
2963 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2964 if (unlikely(tgt_tsc_khz == 0)) {
2965 local_irq_restore(flags);
2966 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2969 if (!use_master_clock) {
2971 kernel_ns = get_kvmclock_base_ns();
2974 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2977 * We may have to catch up the TSC to match elapsed wall clock
2978 * time for two reasons, even if kvmclock is used.
2979 * 1) CPU could have been running below the maximum TSC rate
2980 * 2) Broken TSC compensation resets the base at each VCPU
2981 * entry to avoid unknown leaps of TSC even when running
2982 * again on the same CPU. This may cause apparent elapsed
2983 * time to disappear, and the guest to stand still or run
2986 if (vcpu->tsc_catchup) {
2987 u64 tsc = compute_guest_tsc(v, kernel_ns);
2988 if (tsc > tsc_timestamp) {
2989 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2990 tsc_timestamp = tsc;
2994 local_irq_restore(flags);
2996 /* With all the info we got, fill in the values */
2998 if (kvm_has_tsc_control)
2999 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3000 v->arch.l1_tsc_scaling_ratio);
3002 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3003 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3004 &vcpu->hv_clock.tsc_shift,
3005 &vcpu->hv_clock.tsc_to_system_mul);
3006 vcpu->hw_tsc_khz = tgt_tsc_khz;
3009 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3010 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3011 vcpu->last_guest_tsc = tsc_timestamp;
3013 /* If the host uses TSC clocksource, then it is stable */
3015 if (use_master_clock)
3016 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3018 vcpu->hv_clock.flags = pvclock_flags;
3020 if (vcpu->pv_time_enabled)
3021 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3022 if (vcpu->xen.vcpu_info_set)
3023 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3024 offsetof(struct compat_vcpu_info, time));
3025 if (vcpu->xen.vcpu_time_info_set)
3026 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3028 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3033 * kvmclock updates which are isolated to a given vcpu, such as
3034 * vcpu->cpu migration, should not allow system_timestamp from
3035 * the rest of the vcpus to remain static. Otherwise ntp frequency
3036 * correction applies to one vcpu's system_timestamp but not
3039 * So in those cases, request a kvmclock update for all vcpus.
3040 * We need to rate-limit these requests though, as they can
3041 * considerably slow guests that have a large number of vcpus.
3042 * The time for a remote vcpu to update its kvmclock is bound
3043 * by the delay we use to rate-limit the updates.
3046 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3048 static void kvmclock_update_fn(struct work_struct *work)
3051 struct delayed_work *dwork = to_delayed_work(work);
3052 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3053 kvmclock_update_work);
3054 struct kvm *kvm = container_of(ka, struct kvm, arch);
3055 struct kvm_vcpu *vcpu;
3057 kvm_for_each_vcpu(i, vcpu, kvm) {
3058 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3059 kvm_vcpu_kick(vcpu);
3063 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3065 struct kvm *kvm = v->kvm;
3067 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3068 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3069 KVMCLOCK_UPDATE_DELAY);
3072 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3074 static void kvmclock_sync_fn(struct work_struct *work)
3076 struct delayed_work *dwork = to_delayed_work(work);
3077 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3078 kvmclock_sync_work);
3079 struct kvm *kvm = container_of(ka, struct kvm, arch);
3081 if (!kvmclock_periodic_sync)
3084 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3085 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3086 KVMCLOCK_SYNC_PERIOD);
3090 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3092 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3094 /* McStatusWrEn enabled? */
3095 if (guest_cpuid_is_amd_or_hygon(vcpu))
3096 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3101 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3103 u64 mcg_cap = vcpu->arch.mcg_cap;
3104 unsigned bank_num = mcg_cap & 0xff;
3105 u32 msr = msr_info->index;
3106 u64 data = msr_info->data;
3109 case MSR_IA32_MCG_STATUS:
3110 vcpu->arch.mcg_status = data;
3112 case MSR_IA32_MCG_CTL:
3113 if (!(mcg_cap & MCG_CTL_P) &&
3114 (data || !msr_info->host_initiated))
3116 if (data != 0 && data != ~(u64)0)
3118 vcpu->arch.mcg_ctl = data;
3121 if (msr >= MSR_IA32_MC0_CTL &&
3122 msr < MSR_IA32_MCx_CTL(bank_num)) {
3123 u32 offset = array_index_nospec(
3124 msr - MSR_IA32_MC0_CTL,
3125 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3127 /* only 0 or all 1s can be written to IA32_MCi_CTL
3128 * some Linux kernels though clear bit 10 in bank 4 to
3129 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3130 * this to avoid an uncatched #GP in the guest.
3132 * UNIXWARE clears bit 0 of MC1_CTL to ignore
3133 * correctable, single-bit ECC data errors.
3135 if ((offset & 0x3) == 0 &&
3136 data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3140 if (!msr_info->host_initiated &&
3141 (offset & 0x3) == 1 && data != 0) {
3142 if (!can_set_mci_status(vcpu))
3146 vcpu->arch.mce_banks[offset] = data;
3154 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3156 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3158 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3161 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3163 gpa_t gpa = data & ~0x3f;
3165 /* Bits 4:5 are reserved, Should be zero */
3169 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3170 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3173 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3174 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3177 if (!lapic_in_kernel(vcpu))
3178 return data ? 1 : 0;
3180 vcpu->arch.apf.msr_en_val = data;
3182 if (!kvm_pv_async_pf_enabled(vcpu)) {
3183 kvm_clear_async_pf_completion_queue(vcpu);
3184 kvm_async_pf_hash_reset(vcpu);
3188 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3192 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3193 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3195 kvm_async_pf_wakeup_all(vcpu);
3200 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3202 /* Bits 8-63 are reserved */
3206 if (!lapic_in_kernel(vcpu))
3209 vcpu->arch.apf.msr_int_val = data;
3211 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3216 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3218 vcpu->arch.pv_time_enabled = false;
3219 vcpu->arch.time = 0;
3222 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3224 ++vcpu->stat.tlb_flush;
3225 static_call(kvm_x86_tlb_flush_all)(vcpu);
3228 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3230 ++vcpu->stat.tlb_flush;
3234 * A TLB flush on behalf of the guest is equivalent to
3235 * INVPCID(all), toggling CR4.PGE, etc., which requires
3236 * a forced sync of the shadow page tables. Unload the
3237 * entire MMU here and the subsequent load will sync the
3238 * shadow page tables, and also flush the TLB.
3240 kvm_mmu_unload(vcpu);
3244 static_call(kvm_x86_tlb_flush_guest)(vcpu);
3248 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3250 ++vcpu->stat.tlb_flush;
3251 static_call(kvm_x86_tlb_flush_current)(vcpu);
3255 * Service "local" TLB flush requests, which are specific to the current MMU
3256 * context. In addition to the generic event handling in vcpu_enter_guest(),
3257 * TLB flushes that are targeted at an MMU context also need to be serviced
3258 * prior before nested VM-Enter/VM-Exit.
3260 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3262 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3263 kvm_vcpu_flush_tlb_current(vcpu);
3265 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3266 kvm_vcpu_flush_tlb_guest(vcpu);
3268 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3270 static void record_steal_time(struct kvm_vcpu *vcpu)
3272 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3273 struct kvm_steal_time __user *st;
3274 struct kvm_memslots *slots;
3275 gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3279 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3280 kvm_xen_runstate_set_running(vcpu);
3284 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3287 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3290 slots = kvm_memslots(vcpu->kvm);
3292 if (unlikely(slots->generation != ghc->generation ||
3294 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3295 /* We rely on the fact that it fits in a single page. */
3296 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3298 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gpa, sizeof(*st)) ||
3299 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3303 st = (struct kvm_steal_time __user *)ghc->hva;
3305 * Doing a TLB flush here, on the guest's behalf, can avoid
3308 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3309 u8 st_preempted = 0;
3312 if (!user_access_begin(st, sizeof(*st)))
3315 asm volatile("1: xchgb %0, %2\n"
3318 _ASM_EXTABLE_UA(1b, 2b)
3319 : "+q" (st_preempted),
3321 "+m" (st->preempted));
3327 vcpu->arch.st.preempted = 0;
3329 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3330 st_preempted & KVM_VCPU_FLUSH_TLB);
3331 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3332 kvm_vcpu_flush_tlb_guest(vcpu);
3334 if (!user_access_begin(st, sizeof(*st)))
3337 if (!user_access_begin(st, sizeof(*st)))
3340 unsafe_put_user(0, &st->preempted, out);
3341 vcpu->arch.st.preempted = 0;
3344 unsafe_get_user(version, &st->version, out);
3346 version += 1; /* first time write, random junk */
3349 unsafe_put_user(version, &st->version, out);
3353 unsafe_get_user(steal, &st->steal, out);
3354 steal += current->sched_info.run_delay -
3355 vcpu->arch.st.last_steal;
3356 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3357 unsafe_put_user(steal, &st->steal, out);
3360 unsafe_put_user(version, &st->version, out);
3365 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3368 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3371 u32 msr = msr_info->index;
3372 u64 data = msr_info->data;
3374 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3375 return kvm_xen_write_hypercall_page(vcpu, data);
3378 case MSR_AMD64_NB_CFG:
3379 case MSR_IA32_UCODE_WRITE:
3380 case MSR_VM_HSAVE_PA:
3381 case MSR_AMD64_PATCH_LOADER:
3382 case MSR_AMD64_BU_CFG2:
3383 case MSR_AMD64_DC_CFG:
3384 case MSR_F15H_EX_CFG:
3387 case MSR_IA32_UCODE_REV:
3388 if (msr_info->host_initiated)
3389 vcpu->arch.microcode_version = data;
3391 case MSR_IA32_ARCH_CAPABILITIES:
3392 if (!msr_info->host_initiated)
3394 vcpu->arch.arch_capabilities = data;
3396 case MSR_IA32_PERF_CAPABILITIES: {
3397 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3399 if (!msr_info->host_initiated)
3401 if (kvm_get_msr_feature(&msr_ent))
3403 if (data & ~msr_ent.data)
3406 vcpu->arch.perf_capabilities = data;
3411 return set_efer(vcpu, msr_info);
3413 data &= ~(u64)0x40; /* ignore flush filter disable */
3414 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3415 data &= ~(u64)0x8; /* ignore TLB cache disable */
3417 /* Handle McStatusWrEn */
3418 if (data == BIT_ULL(18)) {
3419 vcpu->arch.msr_hwcr = data;
3420 } else if (data != 0) {
3421 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3426 case MSR_FAM10H_MMIO_CONF_BASE:
3428 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3433 case 0x200 ... 0x2ff:
3434 return kvm_mtrr_set_msr(vcpu, msr, data);
3435 case MSR_IA32_APICBASE:
3436 return kvm_set_apic_base(vcpu, msr_info);
3437 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3438 return kvm_x2apic_msr_write(vcpu, msr, data);
3439 case MSR_IA32_TSC_DEADLINE:
3440 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3442 case MSR_IA32_TSC_ADJUST:
3443 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3444 if (!msr_info->host_initiated) {
3445 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3446 adjust_tsc_offset_guest(vcpu, adj);
3447 /* Before back to guest, tsc_timestamp must be adjusted
3448 * as well, otherwise guest's percpu pvclock time could jump.
3450 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3452 vcpu->arch.ia32_tsc_adjust_msr = data;
3455 case MSR_IA32_MISC_ENABLE:
3456 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3457 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3458 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3460 vcpu->arch.ia32_misc_enable_msr = data;
3461 kvm_update_cpuid_runtime(vcpu);
3463 vcpu->arch.ia32_misc_enable_msr = data;
3466 case MSR_IA32_SMBASE:
3467 if (!msr_info->host_initiated)
3469 vcpu->arch.smbase = data;
3471 case MSR_IA32_POWER_CTL:
3472 vcpu->arch.msr_ia32_power_ctl = data;
3475 if (msr_info->host_initiated) {
3476 kvm_synchronize_tsc(vcpu, data);
3478 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3479 adjust_tsc_offset_guest(vcpu, adj);
3480 vcpu->arch.ia32_tsc_adjust_msr += adj;
3484 if (!msr_info->host_initiated &&
3485 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3488 * KVM supports exposing PT to the guest, but does not support
3489 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3490 * XSAVES/XRSTORS to save/restore PT MSRs.
3492 if (data & ~supported_xss)
3494 vcpu->arch.ia32_xss = data;
3495 kvm_update_cpuid_runtime(vcpu);
3498 if (!msr_info->host_initiated)
3500 vcpu->arch.smi_count = data;
3502 case MSR_KVM_WALL_CLOCK_NEW:
3503 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3506 vcpu->kvm->arch.wall_clock = data;
3507 kvm_write_wall_clock(vcpu->kvm, data, 0);
3509 case MSR_KVM_WALL_CLOCK:
3510 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3513 vcpu->kvm->arch.wall_clock = data;
3514 kvm_write_wall_clock(vcpu->kvm, data, 0);
3516 case MSR_KVM_SYSTEM_TIME_NEW:
3517 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3520 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3522 case MSR_KVM_SYSTEM_TIME:
3523 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3526 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3528 case MSR_KVM_ASYNC_PF_EN:
3529 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3532 if (kvm_pv_enable_async_pf(vcpu, data))
3535 case MSR_KVM_ASYNC_PF_INT:
3536 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3539 if (kvm_pv_enable_async_pf_int(vcpu, data))
3542 case MSR_KVM_ASYNC_PF_ACK:
3543 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3546 vcpu->arch.apf.pageready_pending = false;
3547 kvm_check_async_pf_completion(vcpu);
3550 case MSR_KVM_STEAL_TIME:
3551 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3554 if (unlikely(!sched_info_on()))
3557 if (data & KVM_STEAL_RESERVED_MASK)
3560 vcpu->arch.st.msr_val = data;
3562 if (!(data & KVM_MSR_ENABLED))
3565 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3568 case MSR_KVM_PV_EOI_EN:
3569 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3572 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3576 case MSR_KVM_POLL_CONTROL:
3577 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3580 /* only enable bit supported */
3581 if (data & (-1ULL << 1))
3584 vcpu->arch.msr_kvm_poll_control = data;
3587 case MSR_IA32_MCG_CTL:
3588 case MSR_IA32_MCG_STATUS:
3589 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3590 return set_msr_mce(vcpu, msr_info);
3592 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3593 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3596 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3597 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3598 if (kvm_pmu_is_valid_msr(vcpu, msr))
3599 return kvm_pmu_set_msr(vcpu, msr_info);
3601 if (pr || data != 0)
3602 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3603 "0x%x data 0x%llx\n", msr, data);
3605 case MSR_K7_CLK_CTL:
3607 * Ignore all writes to this no longer documented MSR.
3608 * Writes are only relevant for old K7 processors,
3609 * all pre-dating SVM, but a recommended workaround from
3610 * AMD for these chips. It is possible to specify the
3611 * affected processor models on the command line, hence
3612 * the need to ignore the workaround.
3615 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3616 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3617 case HV_X64_MSR_SYNDBG_OPTIONS:
3618 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3619 case HV_X64_MSR_CRASH_CTL:
3620 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3621 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3622 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3623 case HV_X64_MSR_TSC_EMULATION_STATUS:
3624 return kvm_hv_set_msr_common(vcpu, msr, data,
3625 msr_info->host_initiated);
3626 case MSR_IA32_BBL_CR_CTL3:
3627 /* Drop writes to this legacy MSR -- see rdmsr
3628 * counterpart for further detail.
3630 if (report_ignored_msrs)
3631 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3634 case MSR_AMD64_OSVW_ID_LENGTH:
3635 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3637 vcpu->arch.osvw.length = data;
3639 case MSR_AMD64_OSVW_STATUS:
3640 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3642 vcpu->arch.osvw.status = data;
3644 case MSR_PLATFORM_INFO:
3645 if (!msr_info->host_initiated ||
3646 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3647 cpuid_fault_enabled(vcpu)))
3649 vcpu->arch.msr_platform_info = data;
3651 case MSR_MISC_FEATURES_ENABLES:
3652 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3653 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3654 !supports_cpuid_fault(vcpu)))
3656 vcpu->arch.msr_misc_features_enables = data;
3659 if (kvm_pmu_is_valid_msr(vcpu, msr))
3660 return kvm_pmu_set_msr(vcpu, msr_info);
3661 return KVM_MSR_RET_INVALID;
3665 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3667 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3670 u64 mcg_cap = vcpu->arch.mcg_cap;
3671 unsigned bank_num = mcg_cap & 0xff;
3674 case MSR_IA32_P5_MC_ADDR:
3675 case MSR_IA32_P5_MC_TYPE:
3678 case MSR_IA32_MCG_CAP:
3679 data = vcpu->arch.mcg_cap;
3681 case MSR_IA32_MCG_CTL:
3682 if (!(mcg_cap & MCG_CTL_P) && !host)
3684 data = vcpu->arch.mcg_ctl;
3686 case MSR_IA32_MCG_STATUS:
3687 data = vcpu->arch.mcg_status;
3690 if (msr >= MSR_IA32_MC0_CTL &&
3691 msr < MSR_IA32_MCx_CTL(bank_num)) {
3692 u32 offset = array_index_nospec(
3693 msr - MSR_IA32_MC0_CTL,
3694 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3696 data = vcpu->arch.mce_banks[offset];
3705 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3707 switch (msr_info->index) {
3708 case MSR_IA32_PLATFORM_ID:
3709 case MSR_IA32_EBL_CR_POWERON:
3710 case MSR_IA32_LASTBRANCHFROMIP:
3711 case MSR_IA32_LASTBRANCHTOIP:
3712 case MSR_IA32_LASTINTFROMIP:
3713 case MSR_IA32_LASTINTTOIP:
3714 case MSR_AMD64_SYSCFG:
3715 case MSR_K8_TSEG_ADDR:
3716 case MSR_K8_TSEG_MASK:
3717 case MSR_VM_HSAVE_PA:
3718 case MSR_K8_INT_PENDING_MSG:
3719 case MSR_AMD64_NB_CFG:
3720 case MSR_FAM10H_MMIO_CONF_BASE:
3721 case MSR_AMD64_BU_CFG2:
3722 case MSR_IA32_PERF_CTL:
3723 case MSR_AMD64_DC_CFG:
3724 case MSR_F15H_EX_CFG:
3726 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3727 * limit) MSRs. Just return 0, as we do not want to expose the host
3728 * data here. Do not conditionalize this on CPUID, as KVM does not do
3729 * so for existing CPU-specific MSRs.
3731 case MSR_RAPL_POWER_UNIT:
3732 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3733 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3734 case MSR_PKG_ENERGY_STATUS: /* Total package */
3735 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3738 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3739 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3740 return kvm_pmu_get_msr(vcpu, msr_info);
3741 if (!msr_info->host_initiated)
3745 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3746 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3747 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3748 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3749 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3750 return kvm_pmu_get_msr(vcpu, msr_info);
3753 case MSR_IA32_UCODE_REV:
3754 msr_info->data = vcpu->arch.microcode_version;
3756 case MSR_IA32_ARCH_CAPABILITIES:
3757 if (!msr_info->host_initiated &&
3758 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3760 msr_info->data = vcpu->arch.arch_capabilities;
3762 case MSR_IA32_PERF_CAPABILITIES:
3763 if (!msr_info->host_initiated &&
3764 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3766 msr_info->data = vcpu->arch.perf_capabilities;
3768 case MSR_IA32_POWER_CTL:
3769 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3771 case MSR_IA32_TSC: {
3773 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3774 * even when not intercepted. AMD manual doesn't explicitly
3775 * state this but appears to behave the same.
3777 * On userspace reads and writes, however, we unconditionally
3778 * return L1's TSC value to ensure backwards-compatible
3779 * behavior for migration.
3783 if (msr_info->host_initiated) {
3784 offset = vcpu->arch.l1_tsc_offset;
3785 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3787 offset = vcpu->arch.tsc_offset;
3788 ratio = vcpu->arch.tsc_scaling_ratio;
3791 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3795 case 0x200 ... 0x2ff:
3796 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3797 case 0xcd: /* fsb frequency */
3801 * MSR_EBC_FREQUENCY_ID
3802 * Conservative value valid for even the basic CPU models.
3803 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3804 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3805 * and 266MHz for model 3, or 4. Set Core Clock
3806 * Frequency to System Bus Frequency Ratio to 1 (bits
3807 * 31:24) even though these are only valid for CPU
3808 * models > 2, however guests may end up dividing or
3809 * multiplying by zero otherwise.
3811 case MSR_EBC_FREQUENCY_ID:
3812 msr_info->data = 1 << 24;
3814 case MSR_IA32_APICBASE:
3815 msr_info->data = kvm_get_apic_base(vcpu);
3817 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3818 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3819 case MSR_IA32_TSC_DEADLINE:
3820 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3822 case MSR_IA32_TSC_ADJUST:
3823 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3825 case MSR_IA32_MISC_ENABLE:
3826 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3828 case MSR_IA32_SMBASE:
3829 if (!msr_info->host_initiated)
3831 msr_info->data = vcpu->arch.smbase;
3834 msr_info->data = vcpu->arch.smi_count;
3836 case MSR_IA32_PERF_STATUS:
3837 /* TSC increment by tick */
3838 msr_info->data = 1000ULL;
3839 /* CPU multiplier */
3840 msr_info->data |= (((uint64_t)4ULL) << 40);
3843 msr_info->data = vcpu->arch.efer;
3845 case MSR_KVM_WALL_CLOCK:
3846 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3849 msr_info->data = vcpu->kvm->arch.wall_clock;
3851 case MSR_KVM_WALL_CLOCK_NEW:
3852 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3855 msr_info->data = vcpu->kvm->arch.wall_clock;
3857 case MSR_KVM_SYSTEM_TIME:
3858 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3861 msr_info->data = vcpu->arch.time;
3863 case MSR_KVM_SYSTEM_TIME_NEW:
3864 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3867 msr_info->data = vcpu->arch.time;
3869 case MSR_KVM_ASYNC_PF_EN:
3870 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3873 msr_info->data = vcpu->arch.apf.msr_en_val;
3875 case MSR_KVM_ASYNC_PF_INT:
3876 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3879 msr_info->data = vcpu->arch.apf.msr_int_val;
3881 case MSR_KVM_ASYNC_PF_ACK:
3882 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3887 case MSR_KVM_STEAL_TIME:
3888 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3891 msr_info->data = vcpu->arch.st.msr_val;
3893 case MSR_KVM_PV_EOI_EN:
3894 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3897 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3899 case MSR_KVM_POLL_CONTROL:
3900 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3903 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3905 case MSR_IA32_P5_MC_ADDR:
3906 case MSR_IA32_P5_MC_TYPE:
3907 case MSR_IA32_MCG_CAP:
3908 case MSR_IA32_MCG_CTL:
3909 case MSR_IA32_MCG_STATUS:
3910 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3911 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3912 msr_info->host_initiated);
3914 if (!msr_info->host_initiated &&
3915 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3917 msr_info->data = vcpu->arch.ia32_xss;
3919 case MSR_K7_CLK_CTL:
3921 * Provide expected ramp-up count for K7. All other
3922 * are set to zero, indicating minimum divisors for
3925 * This prevents guest kernels on AMD host with CPU
3926 * type 6, model 8 and higher from exploding due to
3927 * the rdmsr failing.
3929 msr_info->data = 0x20000000;
3931 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3932 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3933 case HV_X64_MSR_SYNDBG_OPTIONS:
3934 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3935 case HV_X64_MSR_CRASH_CTL:
3936 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3937 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3938 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3939 case HV_X64_MSR_TSC_EMULATION_STATUS:
3940 return kvm_hv_get_msr_common(vcpu,
3941 msr_info->index, &msr_info->data,
3942 msr_info->host_initiated);
3943 case MSR_IA32_BBL_CR_CTL3:
3944 /* This legacy MSR exists but isn't fully documented in current
3945 * silicon. It is however accessed by winxp in very narrow
3946 * scenarios where it sets bit #19, itself documented as
3947 * a "reserved" bit. Best effort attempt to source coherent
3948 * read data here should the balance of the register be
3949 * interpreted by the guest:
3951 * L2 cache control register 3: 64GB range, 256KB size,
3952 * enabled, latency 0x1, configured
3954 msr_info->data = 0xbe702111;
3956 case MSR_AMD64_OSVW_ID_LENGTH:
3957 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3959 msr_info->data = vcpu->arch.osvw.length;
3961 case MSR_AMD64_OSVW_STATUS:
3962 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3964 msr_info->data = vcpu->arch.osvw.status;
3966 case MSR_PLATFORM_INFO:
3967 if (!msr_info->host_initiated &&
3968 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3970 msr_info->data = vcpu->arch.msr_platform_info;
3972 case MSR_MISC_FEATURES_ENABLES:
3973 msr_info->data = vcpu->arch.msr_misc_features_enables;
3976 msr_info->data = vcpu->arch.msr_hwcr;
3979 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3980 return kvm_pmu_get_msr(vcpu, msr_info);
3981 return KVM_MSR_RET_INVALID;
3985 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3988 * Read or write a bunch of msrs. All parameters are kernel addresses.
3990 * @return number of msrs set successfully.
3992 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3993 struct kvm_msr_entry *entries,
3994 int (*do_msr)(struct kvm_vcpu *vcpu,
3995 unsigned index, u64 *data))
3999 for (i = 0; i < msrs->nmsrs; ++i)
4000 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4007 * Read or write a bunch of msrs. Parameters are user addresses.
4009 * @return number of msrs set successfully.
4011 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4012 int (*do_msr)(struct kvm_vcpu *vcpu,
4013 unsigned index, u64 *data),
4016 struct kvm_msrs msrs;
4017 struct kvm_msr_entry *entries;
4022 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4026 if (msrs.nmsrs >= MAX_IO_MSRS)
4029 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4030 entries = memdup_user(user_msrs->entries, size);
4031 if (IS_ERR(entries)) {
4032 r = PTR_ERR(entries);
4036 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4041 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4052 static inline bool kvm_can_mwait_in_guest(void)
4054 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4055 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4056 boot_cpu_has(X86_FEATURE_ARAT);
4059 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4060 struct kvm_cpuid2 __user *cpuid_arg)
4062 struct kvm_cpuid2 cpuid;
4066 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4069 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4074 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4080 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4085 case KVM_CAP_IRQCHIP:
4087 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4088 case KVM_CAP_SET_TSS_ADDR:
4089 case KVM_CAP_EXT_CPUID:
4090 case KVM_CAP_EXT_EMUL_CPUID:
4091 case KVM_CAP_CLOCKSOURCE:
4093 case KVM_CAP_NOP_IO_DELAY:
4094 case KVM_CAP_MP_STATE:
4095 case KVM_CAP_SYNC_MMU:
4096 case KVM_CAP_USER_NMI:
4097 case KVM_CAP_REINJECT_CONTROL:
4098 case KVM_CAP_IRQ_INJECT_STATUS:
4099 case KVM_CAP_IOEVENTFD:
4100 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4102 case KVM_CAP_PIT_STATE2:
4103 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4104 case KVM_CAP_VCPU_EVENTS:
4105 case KVM_CAP_HYPERV:
4106 case KVM_CAP_HYPERV_VAPIC:
4107 case KVM_CAP_HYPERV_SPIN:
4108 case KVM_CAP_HYPERV_SYNIC:
4109 case KVM_CAP_HYPERV_SYNIC2:
4110 case KVM_CAP_HYPERV_VP_INDEX:
4111 case KVM_CAP_HYPERV_EVENTFD:
4112 case KVM_CAP_HYPERV_TLBFLUSH:
4113 case KVM_CAP_HYPERV_SEND_IPI:
4114 case KVM_CAP_HYPERV_CPUID:
4115 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4116 case KVM_CAP_SYS_HYPERV_CPUID:
4117 case KVM_CAP_PCI_SEGMENT:
4118 case KVM_CAP_DEBUGREGS:
4119 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4121 case KVM_CAP_ASYNC_PF:
4122 case KVM_CAP_ASYNC_PF_INT:
4123 case KVM_CAP_GET_TSC_KHZ:
4124 case KVM_CAP_KVMCLOCK_CTRL:
4125 case KVM_CAP_READONLY_MEM:
4126 case KVM_CAP_HYPERV_TIME:
4127 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4128 case KVM_CAP_TSC_DEADLINE_TIMER:
4129 case KVM_CAP_DISABLE_QUIRKS:
4130 case KVM_CAP_SET_BOOT_CPU_ID:
4131 case KVM_CAP_SPLIT_IRQCHIP:
4132 case KVM_CAP_IMMEDIATE_EXIT:
4133 case KVM_CAP_PMU_EVENT_FILTER:
4134 case KVM_CAP_GET_MSR_FEATURES:
4135 case KVM_CAP_MSR_PLATFORM_INFO:
4136 case KVM_CAP_EXCEPTION_PAYLOAD:
4137 case KVM_CAP_SET_GUEST_DEBUG:
4138 case KVM_CAP_LAST_CPU:
4139 case KVM_CAP_X86_USER_SPACE_MSR:
4140 case KVM_CAP_X86_MSR_FILTER:
4141 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4142 #ifdef CONFIG_X86_SGX_KVM
4143 case KVM_CAP_SGX_ATTRIBUTE:
4145 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4146 case KVM_CAP_SREGS2:
4147 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4150 case KVM_CAP_EXIT_HYPERCALL:
4151 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4153 case KVM_CAP_SET_GUEST_DEBUG2:
4154 return KVM_GUESTDBG_VALID_MASK;
4155 #ifdef CONFIG_KVM_XEN
4156 case KVM_CAP_XEN_HVM:
4157 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4158 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4159 KVM_XEN_HVM_CONFIG_SHARED_INFO;
4160 if (sched_info_on())
4161 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4164 case KVM_CAP_SYNC_REGS:
4165 r = KVM_SYNC_X86_VALID_FIELDS;
4167 case KVM_CAP_ADJUST_CLOCK:
4168 r = KVM_CLOCK_TSC_STABLE;
4170 case KVM_CAP_X86_DISABLE_EXITS:
4171 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4172 KVM_X86_DISABLE_EXITS_CSTATE;
4173 if(kvm_can_mwait_in_guest())
4174 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4176 case KVM_CAP_X86_SMM:
4177 /* SMBASE is usually relocated above 1M on modern chipsets,
4178 * and SMM handlers might indeed rely on 4G segment limits,
4179 * so do not report SMM to be available if real mode is
4180 * emulated via vm86 mode. Still, do not go to great lengths
4181 * to avoid userspace's usage of the feature, because it is a
4182 * fringe case that is not enabled except via specific settings
4183 * of the module parameters.
4185 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4188 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4190 case KVM_CAP_NR_VCPUS:
4191 r = KVM_SOFT_MAX_VCPUS;
4193 case KVM_CAP_MAX_VCPUS:
4196 case KVM_CAP_MAX_VCPU_ID:
4197 r = KVM_MAX_VCPU_ID;
4199 case KVM_CAP_PV_MMU: /* obsolete */
4203 r = KVM_MAX_MCE_BANKS;
4206 r = boot_cpu_has(X86_FEATURE_XSAVE);
4208 case KVM_CAP_TSC_CONTROL:
4209 r = kvm_has_tsc_control;
4211 case KVM_CAP_X2APIC_API:
4212 r = KVM_X2APIC_API_VALID_FLAGS;
4214 case KVM_CAP_NESTED_STATE:
4215 r = kvm_x86_ops.nested_ops->get_state ?
4216 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4218 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4219 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4221 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4222 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4224 case KVM_CAP_SMALLER_MAXPHYADDR:
4225 r = (int) allow_smaller_maxphyaddr;
4227 case KVM_CAP_STEAL_TIME:
4228 r = sched_info_on();
4230 case KVM_CAP_X86_BUS_LOCK_EXIT:
4231 if (kvm_has_bus_lock_exit)
4232 r = KVM_BUS_LOCK_DETECTION_OFF |
4233 KVM_BUS_LOCK_DETECTION_EXIT;
4244 long kvm_arch_dev_ioctl(struct file *filp,
4245 unsigned int ioctl, unsigned long arg)
4247 void __user *argp = (void __user *)arg;
4251 case KVM_GET_MSR_INDEX_LIST: {
4252 struct kvm_msr_list __user *user_msr_list = argp;
4253 struct kvm_msr_list msr_list;
4257 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4260 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4261 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4264 if (n < msr_list.nmsrs)
4267 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4268 num_msrs_to_save * sizeof(u32)))
4270 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4272 num_emulated_msrs * sizeof(u32)))
4277 case KVM_GET_SUPPORTED_CPUID:
4278 case KVM_GET_EMULATED_CPUID: {
4279 struct kvm_cpuid2 __user *cpuid_arg = argp;
4280 struct kvm_cpuid2 cpuid;
4283 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4286 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4292 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4297 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4299 if (copy_to_user(argp, &kvm_mce_cap_supported,
4300 sizeof(kvm_mce_cap_supported)))
4304 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4305 struct kvm_msr_list __user *user_msr_list = argp;
4306 struct kvm_msr_list msr_list;
4310 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4313 msr_list.nmsrs = num_msr_based_features;
4314 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4317 if (n < msr_list.nmsrs)
4320 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4321 num_msr_based_features * sizeof(u32)))
4327 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4329 case KVM_GET_SUPPORTED_HV_CPUID:
4330 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4340 static void wbinvd_ipi(void *garbage)
4345 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4347 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4350 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4352 /* Address WBINVD may be executed by guest */
4353 if (need_emulate_wbinvd(vcpu)) {
4354 if (static_call(kvm_x86_has_wbinvd_exit)())
4355 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4356 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4357 smp_call_function_single(vcpu->cpu,
4358 wbinvd_ipi, NULL, 1);
4361 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4363 /* Save host pkru register if supported */
4364 vcpu->arch.host_pkru = read_pkru();
4366 /* Apply any externally detected TSC adjustments (due to suspend) */
4367 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4368 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4369 vcpu->arch.tsc_offset_adjustment = 0;
4370 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4373 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4374 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4375 rdtsc() - vcpu->arch.last_host_tsc;
4377 mark_tsc_unstable("KVM discovered backwards TSC");
4379 if (kvm_check_tsc_unstable()) {
4380 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4381 vcpu->arch.last_guest_tsc);
4382 kvm_vcpu_write_tsc_offset(vcpu, offset);
4383 vcpu->arch.tsc_catchup = 1;
4386 if (kvm_lapic_hv_timer_in_use(vcpu))
4387 kvm_lapic_restart_hv_timer(vcpu);
4390 * On a host with synchronized TSC, there is no need to update
4391 * kvmclock on vcpu->cpu migration
4393 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4394 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4395 if (vcpu->cpu != cpu)
4396 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4400 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4403 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4405 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4406 struct kvm_steal_time __user *st;
4407 struct kvm_memslots *slots;
4408 static const u8 preempted = KVM_VCPU_PREEMPTED;
4409 gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
4412 * The vCPU can be marked preempted if and only if the VM-Exit was on
4413 * an instruction boundary and will not trigger guest emulation of any
4414 * kind (see vcpu_run). Vendor specific code controls (conservatively)
4415 * when this is true, for example allowing the vCPU to be marked
4416 * preempted if and only if the VM-Exit was due to a host interrupt.
4418 if (!vcpu->arch.at_instruction_boundary) {
4419 vcpu->stat.preemption_other++;
4423 vcpu->stat.preemption_reported++;
4424 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4427 if (vcpu->arch.st.preempted)
4430 /* This happens on process exit */
4431 if (unlikely(current->mm != vcpu->kvm->mm))
4434 slots = kvm_memslots(vcpu->kvm);
4436 if (unlikely(slots->generation != ghc->generation ||
4438 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4441 st = (struct kvm_steal_time __user *)ghc->hva;
4442 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4444 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4445 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4447 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4450 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4454 if (vcpu->preempted) {
4455 if (!vcpu->arch.guest_state_protected)
4456 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4459 * Take the srcu lock as memslots will be accessed to check the gfn
4460 * cache generation against the memslots generation.
4462 idx = srcu_read_lock(&vcpu->kvm->srcu);
4463 if (kvm_xen_msr_enabled(vcpu->kvm))
4464 kvm_xen_runstate_set_preempted(vcpu);
4466 kvm_steal_time_set_preempted(vcpu);
4467 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4470 static_call(kvm_x86_vcpu_put)(vcpu);
4471 vcpu->arch.last_host_tsc = rdtsc();
4474 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4475 struct kvm_lapic_state *s)
4477 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4479 return kvm_apic_get_state(vcpu, s);
4482 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4483 struct kvm_lapic_state *s)
4487 r = kvm_apic_set_state(vcpu, s);
4490 update_cr8_intercept(vcpu);
4495 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4498 * We can accept userspace's request for interrupt injection
4499 * as long as we have a place to store the interrupt number.
4500 * The actual injection will happen when the CPU is able to
4501 * deliver the interrupt.
4503 if (kvm_cpu_has_extint(vcpu))
4506 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4507 return (!lapic_in_kernel(vcpu) ||
4508 kvm_apic_accept_pic_intr(vcpu));
4511 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4514 * Do not cause an interrupt window exit if an exception
4515 * is pending or an event needs reinjection; userspace
4516 * might want to inject the interrupt manually using KVM_SET_REGS
4517 * or KVM_SET_SREGS. For that to work, we must be at an
4518 * instruction boundary and with no events half-injected.
4520 return (kvm_arch_interrupt_allowed(vcpu) &&
4521 kvm_cpu_accept_dm_intr(vcpu) &&
4522 !kvm_event_needs_reinjection(vcpu) &&
4523 !vcpu->arch.exception.pending);
4526 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4527 struct kvm_interrupt *irq)
4529 if (irq->irq >= KVM_NR_INTERRUPTS)
4532 if (!irqchip_in_kernel(vcpu->kvm)) {
4533 kvm_queue_interrupt(vcpu, irq->irq, false);
4534 kvm_make_request(KVM_REQ_EVENT, vcpu);
4539 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4540 * fail for in-kernel 8259.
4542 if (pic_in_kernel(vcpu->kvm))
4545 if (vcpu->arch.pending_external_vector != -1)
4548 vcpu->arch.pending_external_vector = irq->irq;
4549 kvm_make_request(KVM_REQ_EVENT, vcpu);
4553 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4555 kvm_inject_nmi(vcpu);
4560 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4562 kvm_make_request(KVM_REQ_SMI, vcpu);
4567 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4568 struct kvm_tpr_access_ctl *tac)
4572 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4576 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4580 unsigned bank_num = mcg_cap & 0xff, bank;
4583 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4585 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4588 vcpu->arch.mcg_cap = mcg_cap;
4589 /* Init IA32_MCG_CTL to all 1s */
4590 if (mcg_cap & MCG_CTL_P)
4591 vcpu->arch.mcg_ctl = ~(u64)0;
4592 /* Init IA32_MCi_CTL to all 1s */
4593 for (bank = 0; bank < bank_num; bank++)
4594 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4596 static_call(kvm_x86_setup_mce)(vcpu);
4601 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4602 struct kvm_x86_mce *mce)
4604 u64 mcg_cap = vcpu->arch.mcg_cap;
4605 unsigned bank_num = mcg_cap & 0xff;
4606 u64 *banks = vcpu->arch.mce_banks;
4608 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4611 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4612 * reporting is disabled
4614 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4615 vcpu->arch.mcg_ctl != ~(u64)0)
4617 banks += 4 * mce->bank;
4619 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4620 * reporting is disabled for the bank
4622 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4624 if (mce->status & MCI_STATUS_UC) {
4625 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4626 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4627 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4630 if (banks[1] & MCI_STATUS_VAL)
4631 mce->status |= MCI_STATUS_OVER;
4632 banks[2] = mce->addr;
4633 banks[3] = mce->misc;
4634 vcpu->arch.mcg_status = mce->mcg_status;
4635 banks[1] = mce->status;
4636 kvm_queue_exception(vcpu, MC_VECTOR);
4637 } else if (!(banks[1] & MCI_STATUS_VAL)
4638 || !(banks[1] & MCI_STATUS_UC)) {
4639 if (banks[1] & MCI_STATUS_VAL)
4640 mce->status |= MCI_STATUS_OVER;
4641 banks[2] = mce->addr;
4642 banks[3] = mce->misc;
4643 banks[1] = mce->status;
4645 banks[1] |= MCI_STATUS_OVER;
4649 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4650 struct kvm_vcpu_events *events)
4654 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4658 * In guest mode, payload delivery should be deferred,
4659 * so that the L1 hypervisor can intercept #PF before
4660 * CR2 is modified (or intercept #DB before DR6 is
4661 * modified under nVMX). Unless the per-VM capability,
4662 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4663 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4664 * opportunistically defer the exception payload, deliver it if the
4665 * capability hasn't been requested before processing a
4666 * KVM_GET_VCPU_EVENTS.
4668 if (!vcpu->kvm->arch.exception_payload_enabled &&
4669 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4670 kvm_deliver_exception_payload(vcpu);
4673 * The API doesn't provide the instruction length for software
4674 * exceptions, so don't report them. As long as the guest RIP
4675 * isn't advanced, we should expect to encounter the exception
4678 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4679 events->exception.injected = 0;
4680 events->exception.pending = 0;
4682 events->exception.injected = vcpu->arch.exception.injected;
4683 events->exception.pending = vcpu->arch.exception.pending;
4685 * For ABI compatibility, deliberately conflate
4686 * pending and injected exceptions when
4687 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4689 if (!vcpu->kvm->arch.exception_payload_enabled)
4690 events->exception.injected |=
4691 vcpu->arch.exception.pending;
4693 events->exception.nr = vcpu->arch.exception.nr;
4694 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4695 events->exception.error_code = vcpu->arch.exception.error_code;
4696 events->exception_has_payload = vcpu->arch.exception.has_payload;
4697 events->exception_payload = vcpu->arch.exception.payload;
4699 events->interrupt.injected =
4700 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4701 events->interrupt.nr = vcpu->arch.interrupt.nr;
4702 events->interrupt.soft = 0;
4703 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4705 events->nmi.injected = vcpu->arch.nmi_injected;
4706 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4707 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4708 events->nmi.pad = 0;
4710 events->sipi_vector = 0; /* never valid when reporting to user space */
4712 events->smi.smm = is_smm(vcpu);
4713 events->smi.pending = vcpu->arch.smi_pending;
4714 events->smi.smm_inside_nmi =
4715 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4716 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4718 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4719 | KVM_VCPUEVENT_VALID_SHADOW
4720 | KVM_VCPUEVENT_VALID_SMM);
4721 if (vcpu->kvm->arch.exception_payload_enabled)
4722 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4724 memset(&events->reserved, 0, sizeof(events->reserved));
4727 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4729 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4730 struct kvm_vcpu_events *events)
4732 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4733 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4734 | KVM_VCPUEVENT_VALID_SHADOW
4735 | KVM_VCPUEVENT_VALID_SMM
4736 | KVM_VCPUEVENT_VALID_PAYLOAD))
4739 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4740 if (!vcpu->kvm->arch.exception_payload_enabled)
4742 if (events->exception.pending)
4743 events->exception.injected = 0;
4745 events->exception_has_payload = 0;
4747 events->exception.pending = 0;
4748 events->exception_has_payload = 0;
4751 if ((events->exception.injected || events->exception.pending) &&
4752 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4755 /* INITs are latched while in SMM */
4756 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4757 (events->smi.smm || events->smi.pending) &&
4758 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4762 vcpu->arch.exception.injected = events->exception.injected;
4763 vcpu->arch.exception.pending = events->exception.pending;
4764 vcpu->arch.exception.nr = events->exception.nr;
4765 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4766 vcpu->arch.exception.error_code = events->exception.error_code;
4767 vcpu->arch.exception.has_payload = events->exception_has_payload;
4768 vcpu->arch.exception.payload = events->exception_payload;
4770 vcpu->arch.interrupt.injected = events->interrupt.injected;
4771 vcpu->arch.interrupt.nr = events->interrupt.nr;
4772 vcpu->arch.interrupt.soft = events->interrupt.soft;
4773 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4774 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4775 events->interrupt.shadow);
4777 vcpu->arch.nmi_injected = events->nmi.injected;
4778 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4779 vcpu->arch.nmi_pending = events->nmi.pending;
4780 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4782 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4783 lapic_in_kernel(vcpu))
4784 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4786 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4787 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4788 kvm_x86_ops.nested_ops->leave_nested(vcpu);
4789 kvm_smm_changed(vcpu, events->smi.smm);
4792 vcpu->arch.smi_pending = events->smi.pending;
4794 if (events->smi.smm) {
4795 if (events->smi.smm_inside_nmi)
4796 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4798 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4801 if (lapic_in_kernel(vcpu)) {
4802 if (events->smi.latched_init)
4803 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4805 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4809 kvm_make_request(KVM_REQ_EVENT, vcpu);
4814 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4815 struct kvm_debugregs *dbgregs)
4819 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4820 kvm_get_dr(vcpu, 6, &val);
4822 dbgregs->dr7 = vcpu->arch.dr7;
4824 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4827 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4828 struct kvm_debugregs *dbgregs)
4833 if (!kvm_dr6_valid(dbgregs->dr6))
4835 if (!kvm_dr7_valid(dbgregs->dr7))
4838 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4839 kvm_update_dr0123(vcpu);
4840 vcpu->arch.dr6 = dbgregs->dr6;
4841 vcpu->arch.dr7 = dbgregs->dr7;
4842 kvm_update_dr7(vcpu);
4847 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4849 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4851 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4852 u64 xstate_bv = xsave->header.xfeatures;
4856 * Copy legacy XSAVE area, to avoid complications with CPUID
4857 * leaves 0 and 1 in the loop below.
4859 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4862 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4863 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4866 * Copy each region from the possibly compacted offset to the
4867 * non-compacted offset.
4869 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4871 u32 size, offset, ecx, edx;
4872 u64 xfeature_mask = valid & -valid;
4873 int xfeature_nr = fls64(xfeature_mask) - 1;
4876 cpuid_count(XSTATE_CPUID, xfeature_nr,
4877 &size, &offset, &ecx, &edx);
4879 if (xfeature_nr == XFEATURE_PKRU) {
4880 memcpy(dest + offset, &vcpu->arch.pkru,
4881 sizeof(vcpu->arch.pkru));
4883 src = get_xsave_addr(xsave, xfeature_nr);
4885 memcpy(dest + offset, src, size);
4888 valid -= xfeature_mask;
4892 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4894 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4895 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4899 * Copy legacy XSAVE area, to avoid complications with CPUID
4900 * leaves 0 and 1 in the loop below.
4902 memcpy(xsave, src, XSAVE_HDR_OFFSET);
4904 /* Set XSTATE_BV and possibly XCOMP_BV. */
4905 xsave->header.xfeatures = xstate_bv;
4906 if (boot_cpu_has(X86_FEATURE_XSAVES))
4907 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4910 * Copy each region from the non-compacted offset to the
4911 * possibly compacted offset.
4913 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4915 u32 size, offset, ecx, edx;
4916 u64 xfeature_mask = valid & -valid;
4917 int xfeature_nr = fls64(xfeature_mask) - 1;
4919 cpuid_count(XSTATE_CPUID, xfeature_nr,
4920 &size, &offset, &ecx, &edx);
4922 if (xfeature_nr == XFEATURE_PKRU) {
4923 memcpy(&vcpu->arch.pkru, src + offset,
4924 sizeof(vcpu->arch.pkru));
4926 void *dest = get_xsave_addr(xsave, xfeature_nr);
4929 memcpy(dest, src + offset, size);
4932 valid -= xfeature_mask;
4936 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4937 struct kvm_xsave *guest_xsave)
4939 if (!vcpu->arch.guest_fpu)
4942 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4943 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4944 fill_xsave((u8 *) guest_xsave->region, vcpu);
4946 memcpy(guest_xsave->region,
4947 &vcpu->arch.guest_fpu->state.fxsave,
4948 sizeof(struct fxregs_state));
4949 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4950 XFEATURE_MASK_FPSSE;
4954 #define XSAVE_MXCSR_OFFSET 24
4956 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4957 struct kvm_xsave *guest_xsave)
4962 if (!vcpu->arch.guest_fpu)
4965 xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4966 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4968 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4970 * Here we allow setting states that are not present in
4971 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4972 * with old userspace.
4974 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4976 load_xsave(vcpu, (u8 *)guest_xsave->region);
4978 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4979 mxcsr & ~mxcsr_feature_mask)
4981 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4982 guest_xsave->region, sizeof(struct fxregs_state));
4987 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4988 struct kvm_xcrs *guest_xcrs)
4990 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4991 guest_xcrs->nr_xcrs = 0;
4995 guest_xcrs->nr_xcrs = 1;
4996 guest_xcrs->flags = 0;
4997 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4998 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5001 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5002 struct kvm_xcrs *guest_xcrs)
5006 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5009 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5012 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5013 /* Only support XCR0 currently */
5014 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5015 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5016 guest_xcrs->xcrs[i].value);
5025 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5026 * stopped by the hypervisor. This function will be called from the host only.
5027 * EINVAL is returned when the host attempts to set the flag for a guest that
5028 * does not support pv clocks.
5030 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5032 if (!vcpu->arch.pv_time_enabled)
5034 vcpu->arch.pvclock_set_guest_stopped_request = true;
5035 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5039 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5040 struct kvm_enable_cap *cap)
5043 uint16_t vmcs_version;
5044 void __user *user_ptr;
5050 case KVM_CAP_HYPERV_SYNIC2:
5055 case KVM_CAP_HYPERV_SYNIC:
5056 if (!irqchip_in_kernel(vcpu->kvm))
5058 return kvm_hv_activate_synic(vcpu, cap->cap ==
5059 KVM_CAP_HYPERV_SYNIC2);
5060 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5061 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5063 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5065 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5066 if (copy_to_user(user_ptr, &vmcs_version,
5067 sizeof(vmcs_version)))
5071 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5072 if (!kvm_x86_ops.enable_direct_tlbflush)
5075 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5077 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5078 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5080 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5081 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5082 if (vcpu->arch.pv_cpuid.enforce)
5083 kvm_update_pv_runtime(vcpu);
5091 long kvm_arch_vcpu_ioctl(struct file *filp,
5092 unsigned int ioctl, unsigned long arg)
5094 struct kvm_vcpu *vcpu = filp->private_data;
5095 void __user *argp = (void __user *)arg;
5098 struct kvm_sregs2 *sregs2;
5099 struct kvm_lapic_state *lapic;
5100 struct kvm_xsave *xsave;
5101 struct kvm_xcrs *xcrs;
5109 case KVM_GET_LAPIC: {
5111 if (!lapic_in_kernel(vcpu))
5113 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5114 GFP_KERNEL_ACCOUNT);
5119 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5123 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5128 case KVM_SET_LAPIC: {
5130 if (!lapic_in_kernel(vcpu))
5132 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5133 if (IS_ERR(u.lapic)) {
5134 r = PTR_ERR(u.lapic);
5138 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5141 case KVM_INTERRUPT: {
5142 struct kvm_interrupt irq;
5145 if (copy_from_user(&irq, argp, sizeof(irq)))
5147 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5151 r = kvm_vcpu_ioctl_nmi(vcpu);
5155 r = kvm_vcpu_ioctl_smi(vcpu);
5158 case KVM_SET_CPUID: {
5159 struct kvm_cpuid __user *cpuid_arg = argp;
5160 struct kvm_cpuid cpuid;
5163 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5165 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5168 case KVM_SET_CPUID2: {
5169 struct kvm_cpuid2 __user *cpuid_arg = argp;
5170 struct kvm_cpuid2 cpuid;
5173 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5175 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5176 cpuid_arg->entries);
5179 case KVM_GET_CPUID2: {
5180 struct kvm_cpuid2 __user *cpuid_arg = argp;
5181 struct kvm_cpuid2 cpuid;
5184 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5186 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5187 cpuid_arg->entries);
5191 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5196 case KVM_GET_MSRS: {
5197 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5198 r = msr_io(vcpu, argp, do_get_msr, 1);
5199 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5202 case KVM_SET_MSRS: {
5203 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5204 r = msr_io(vcpu, argp, do_set_msr, 0);
5205 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5208 case KVM_TPR_ACCESS_REPORTING: {
5209 struct kvm_tpr_access_ctl tac;
5212 if (copy_from_user(&tac, argp, sizeof(tac)))
5214 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5218 if (copy_to_user(argp, &tac, sizeof(tac)))
5223 case KVM_SET_VAPIC_ADDR: {
5224 struct kvm_vapic_addr va;
5228 if (!lapic_in_kernel(vcpu))
5231 if (copy_from_user(&va, argp, sizeof(va)))
5233 idx = srcu_read_lock(&vcpu->kvm->srcu);
5234 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5235 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5238 case KVM_X86_SETUP_MCE: {
5242 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5244 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5247 case KVM_X86_SET_MCE: {
5248 struct kvm_x86_mce mce;
5251 if (copy_from_user(&mce, argp, sizeof(mce)))
5253 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5256 case KVM_GET_VCPU_EVENTS: {
5257 struct kvm_vcpu_events events;
5259 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5262 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5267 case KVM_SET_VCPU_EVENTS: {
5268 struct kvm_vcpu_events events;
5271 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5274 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5277 case KVM_GET_DEBUGREGS: {
5278 struct kvm_debugregs dbgregs;
5280 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5283 if (copy_to_user(argp, &dbgregs,
5284 sizeof(struct kvm_debugregs)))
5289 case KVM_SET_DEBUGREGS: {
5290 struct kvm_debugregs dbgregs;
5293 if (copy_from_user(&dbgregs, argp,
5294 sizeof(struct kvm_debugregs)))
5297 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5300 case KVM_GET_XSAVE: {
5301 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5306 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5309 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5314 case KVM_SET_XSAVE: {
5315 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5316 if (IS_ERR(u.xsave)) {
5317 r = PTR_ERR(u.xsave);
5321 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5324 case KVM_GET_XCRS: {
5325 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5330 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5333 if (copy_to_user(argp, u.xcrs,
5334 sizeof(struct kvm_xcrs)))
5339 case KVM_SET_XCRS: {
5340 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5341 if (IS_ERR(u.xcrs)) {
5342 r = PTR_ERR(u.xcrs);
5346 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5349 case KVM_SET_TSC_KHZ: {
5353 user_tsc_khz = (u32)arg;
5355 if (kvm_has_tsc_control &&
5356 user_tsc_khz >= kvm_max_guest_tsc_khz)
5359 if (user_tsc_khz == 0)
5360 user_tsc_khz = tsc_khz;
5362 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5367 case KVM_GET_TSC_KHZ: {
5368 r = vcpu->arch.virtual_tsc_khz;
5371 case KVM_KVMCLOCK_CTRL: {
5372 r = kvm_set_guest_paused(vcpu);
5375 case KVM_ENABLE_CAP: {
5376 struct kvm_enable_cap cap;
5379 if (copy_from_user(&cap, argp, sizeof(cap)))
5381 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5384 case KVM_GET_NESTED_STATE: {
5385 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5389 if (!kvm_x86_ops.nested_ops->get_state)
5392 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5394 if (get_user(user_data_size, &user_kvm_nested_state->size))
5397 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5402 if (r > user_data_size) {
5403 if (put_user(r, &user_kvm_nested_state->size))
5413 case KVM_SET_NESTED_STATE: {
5414 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5415 struct kvm_nested_state kvm_state;
5419 if (!kvm_x86_ops.nested_ops->set_state)
5423 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5427 if (kvm_state.size < sizeof(kvm_state))
5430 if (kvm_state.flags &
5431 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5432 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5433 | KVM_STATE_NESTED_GIF_SET))
5436 /* nested_run_pending implies guest_mode. */
5437 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5438 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5441 idx = srcu_read_lock(&vcpu->kvm->srcu);
5442 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5443 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5446 case KVM_GET_SUPPORTED_HV_CPUID:
5447 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5449 #ifdef CONFIG_KVM_XEN
5450 case KVM_XEN_VCPU_GET_ATTR: {
5451 struct kvm_xen_vcpu_attr xva;
5454 if (copy_from_user(&xva, argp, sizeof(xva)))
5456 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5457 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5461 case KVM_XEN_VCPU_SET_ATTR: {
5462 struct kvm_xen_vcpu_attr xva;
5465 if (copy_from_user(&xva, argp, sizeof(xva)))
5467 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5471 case KVM_GET_SREGS2: {
5472 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5476 __get_sregs2(vcpu, u.sregs2);
5478 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5483 case KVM_SET_SREGS2: {
5484 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5485 if (IS_ERR(u.sregs2)) {
5486 r = PTR_ERR(u.sregs2);
5490 r = __set_sregs2(vcpu, u.sregs2);
5503 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5505 return VM_FAULT_SIGBUS;
5508 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5512 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5514 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5518 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5521 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5524 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5525 unsigned long kvm_nr_mmu_pages)
5527 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5530 mutex_lock(&kvm->slots_lock);
5532 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5533 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5535 mutex_unlock(&kvm->slots_lock);
5539 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5541 return kvm->arch.n_max_mmu_pages;
5544 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5546 struct kvm_pic *pic = kvm->arch.vpic;
5550 switch (chip->chip_id) {
5551 case KVM_IRQCHIP_PIC_MASTER:
5552 memcpy(&chip->chip.pic, &pic->pics[0],
5553 sizeof(struct kvm_pic_state));
5555 case KVM_IRQCHIP_PIC_SLAVE:
5556 memcpy(&chip->chip.pic, &pic->pics[1],
5557 sizeof(struct kvm_pic_state));
5559 case KVM_IRQCHIP_IOAPIC:
5560 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5569 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5571 struct kvm_pic *pic = kvm->arch.vpic;
5575 switch (chip->chip_id) {
5576 case KVM_IRQCHIP_PIC_MASTER:
5577 spin_lock(&pic->lock);
5578 memcpy(&pic->pics[0], &chip->chip.pic,
5579 sizeof(struct kvm_pic_state));
5580 spin_unlock(&pic->lock);
5582 case KVM_IRQCHIP_PIC_SLAVE:
5583 spin_lock(&pic->lock);
5584 memcpy(&pic->pics[1], &chip->chip.pic,
5585 sizeof(struct kvm_pic_state));
5586 spin_unlock(&pic->lock);
5588 case KVM_IRQCHIP_IOAPIC:
5589 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5595 kvm_pic_update_irq(pic);
5599 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5601 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5603 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5605 mutex_lock(&kps->lock);
5606 memcpy(ps, &kps->channels, sizeof(*ps));
5607 mutex_unlock(&kps->lock);
5611 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5614 struct kvm_pit *pit = kvm->arch.vpit;
5616 mutex_lock(&pit->pit_state.lock);
5617 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5618 for (i = 0; i < 3; i++)
5619 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5620 mutex_unlock(&pit->pit_state.lock);
5624 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5626 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5627 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5628 sizeof(ps->channels));
5629 ps->flags = kvm->arch.vpit->pit_state.flags;
5630 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5631 memset(&ps->reserved, 0, sizeof(ps->reserved));
5635 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5639 u32 prev_legacy, cur_legacy;
5640 struct kvm_pit *pit = kvm->arch.vpit;
5642 mutex_lock(&pit->pit_state.lock);
5643 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5644 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5645 if (!prev_legacy && cur_legacy)
5647 memcpy(&pit->pit_state.channels, &ps->channels,
5648 sizeof(pit->pit_state.channels));
5649 pit->pit_state.flags = ps->flags;
5650 for (i = 0; i < 3; i++)
5651 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5653 mutex_unlock(&pit->pit_state.lock);
5657 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5658 struct kvm_reinject_control *control)
5660 struct kvm_pit *pit = kvm->arch.vpit;
5662 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5663 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5664 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5666 mutex_lock(&pit->pit_state.lock);
5667 kvm_pit_set_reinject(pit, control->pit_reinject);
5668 mutex_unlock(&pit->pit_state.lock);
5673 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5677 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5678 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5679 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5682 struct kvm_vcpu *vcpu;
5685 kvm_for_each_vcpu(i, vcpu, kvm)
5686 kvm_vcpu_kick(vcpu);
5689 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5692 if (!irqchip_in_kernel(kvm))
5695 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5696 irq_event->irq, irq_event->level,
5701 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5702 struct kvm_enable_cap *cap)
5710 case KVM_CAP_DISABLE_QUIRKS:
5711 kvm->arch.disabled_quirks = cap->args[0];
5714 case KVM_CAP_SPLIT_IRQCHIP: {
5715 mutex_lock(&kvm->lock);
5717 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5718 goto split_irqchip_unlock;
5720 if (irqchip_in_kernel(kvm))
5721 goto split_irqchip_unlock;
5722 if (kvm->created_vcpus)
5723 goto split_irqchip_unlock;
5724 r = kvm_setup_empty_irq_routing(kvm);
5726 goto split_irqchip_unlock;
5727 /* Pairs with irqchip_in_kernel. */
5729 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5730 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5732 split_irqchip_unlock:
5733 mutex_unlock(&kvm->lock);
5736 case KVM_CAP_X2APIC_API:
5738 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5741 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5742 kvm->arch.x2apic_format = true;
5743 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5744 kvm->arch.x2apic_broadcast_quirk_disabled = true;
5748 case KVM_CAP_X86_DISABLE_EXITS:
5750 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5753 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5754 kvm_can_mwait_in_guest())
5755 kvm->arch.mwait_in_guest = true;
5756 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5757 kvm->arch.hlt_in_guest = true;
5758 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5759 kvm->arch.pause_in_guest = true;
5760 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5761 kvm->arch.cstate_in_guest = true;
5764 case KVM_CAP_MSR_PLATFORM_INFO:
5765 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5768 case KVM_CAP_EXCEPTION_PAYLOAD:
5769 kvm->arch.exception_payload_enabled = cap->args[0];
5772 case KVM_CAP_X86_USER_SPACE_MSR:
5774 if (cap->args[0] & ~(KVM_MSR_EXIT_REASON_INVAL |
5775 KVM_MSR_EXIT_REASON_UNKNOWN |
5776 KVM_MSR_EXIT_REASON_FILTER))
5778 kvm->arch.user_space_msr_mask = cap->args[0];
5781 case KVM_CAP_X86_BUS_LOCK_EXIT:
5783 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5786 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5787 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5790 if (kvm_has_bus_lock_exit &&
5791 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5792 kvm->arch.bus_lock_detection_enabled = true;
5795 #ifdef CONFIG_X86_SGX_KVM
5796 case KVM_CAP_SGX_ATTRIBUTE: {
5797 unsigned long allowed_attributes = 0;
5799 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5803 /* KVM only supports the PROVISIONKEY privileged attribute. */
5804 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5805 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5806 kvm->arch.sgx_provisioning_allowed = true;
5812 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5814 if (kvm_x86_ops.vm_copy_enc_context_from)
5815 r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5817 case KVM_CAP_EXIT_HYPERCALL:
5818 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5822 kvm->arch.hypercall_exit_enabled = cap->args[0];
5825 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5827 if (cap->args[0] & ~1)
5829 kvm->arch.exit_on_emulation_error = cap->args[0];
5839 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5841 struct kvm_x86_msr_filter *msr_filter;
5843 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5847 msr_filter->default_allow = default_allow;
5851 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5858 for (i = 0; i < msr_filter->count; i++)
5859 kfree(msr_filter->ranges[i].bitmap);
5864 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5865 struct kvm_msr_filter_range *user_range)
5867 unsigned long *bitmap = NULL;
5870 if (!user_range->nmsrs)
5873 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5876 if (!user_range->flags)
5879 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5880 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5883 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5885 return PTR_ERR(bitmap);
5887 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5888 .flags = user_range->flags,
5889 .base = user_range->base,
5890 .nmsrs = user_range->nmsrs,
5894 msr_filter->count++;
5898 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm,
5899 struct kvm_msr_filter *filter)
5901 struct kvm_x86_msr_filter *new_filter, *old_filter;
5907 if (filter->flags & ~KVM_MSR_FILTER_DEFAULT_DENY)
5910 for (i = 0; i < ARRAY_SIZE(filter->ranges); i++)
5911 empty &= !filter->ranges[i].nmsrs;
5913 default_allow = !(filter->flags & KVM_MSR_FILTER_DEFAULT_DENY);
5914 if (empty && !default_allow)
5917 new_filter = kvm_alloc_msr_filter(default_allow);
5921 for (i = 0; i < ARRAY_SIZE(filter->ranges); i++) {
5922 r = kvm_add_msr_filter(new_filter, &filter->ranges[i]);
5924 kvm_free_msr_filter(new_filter);
5929 mutex_lock(&kvm->lock);
5931 /* The per-VM filter is protected by kvm->lock... */
5932 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5934 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5935 synchronize_srcu(&kvm->srcu);
5937 kvm_free_msr_filter(old_filter);
5939 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5940 mutex_unlock(&kvm->lock);
5945 #ifdef CONFIG_KVM_COMPAT
5946 /* for KVM_X86_SET_MSR_FILTER */
5947 struct kvm_msr_filter_range_compat {
5954 struct kvm_msr_filter_compat {
5956 struct kvm_msr_filter_range_compat ranges[KVM_MSR_FILTER_MAX_RANGES];
5959 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
5961 long kvm_arch_vm_compat_ioctl(struct file *filp, unsigned int ioctl,
5964 void __user *argp = (void __user *)arg;
5965 struct kvm *kvm = filp->private_data;
5969 case KVM_X86_SET_MSR_FILTER_COMPAT: {
5970 struct kvm_msr_filter __user *user_msr_filter = argp;
5971 struct kvm_msr_filter_compat filter_compat;
5972 struct kvm_msr_filter filter;
5975 if (copy_from_user(&filter_compat, user_msr_filter,
5976 sizeof(filter_compat)))
5979 filter.flags = filter_compat.flags;
5980 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5981 struct kvm_msr_filter_range_compat *cr;
5983 cr = &filter_compat.ranges[i];
5984 filter.ranges[i] = (struct kvm_msr_filter_range) {
5988 .bitmap = (__u8 *)(ulong)cr->bitmap,
5992 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6001 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6002 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6004 struct kvm_vcpu *vcpu;
6007 mutex_lock(&kvm->lock);
6008 kvm_for_each_vcpu(i, vcpu, kvm) {
6009 if (!vcpu->arch.pv_time_enabled)
6012 ret = kvm_set_guest_paused(vcpu);
6014 kvm_err("Failed to pause guest VCPU%d: %d\n",
6015 vcpu->vcpu_id, ret);
6019 mutex_unlock(&kvm->lock);
6021 return ret ? NOTIFY_BAD : NOTIFY_DONE;
6024 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6027 case PM_HIBERNATION_PREPARE:
6028 case PM_SUSPEND_PREPARE:
6029 return kvm_arch_suspend_notifier(kvm);
6034 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6036 long kvm_arch_vm_ioctl(struct file *filp,
6037 unsigned int ioctl, unsigned long arg)
6039 struct kvm *kvm = filp->private_data;
6040 void __user *argp = (void __user *)arg;
6043 * This union makes it completely explicit to gcc-3.x
6044 * that these two variables' stack usage should be
6045 * combined, not added together.
6048 struct kvm_pit_state ps;
6049 struct kvm_pit_state2 ps2;
6050 struct kvm_pit_config pit_config;
6054 case KVM_SET_TSS_ADDR:
6055 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6057 case KVM_SET_IDENTITY_MAP_ADDR: {
6060 mutex_lock(&kvm->lock);
6062 if (kvm->created_vcpus)
6063 goto set_identity_unlock;
6065 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6066 goto set_identity_unlock;
6067 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6068 set_identity_unlock:
6069 mutex_unlock(&kvm->lock);
6072 case KVM_SET_NR_MMU_PAGES:
6073 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6075 case KVM_GET_NR_MMU_PAGES:
6076 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6078 case KVM_CREATE_IRQCHIP: {
6079 mutex_lock(&kvm->lock);
6082 if (irqchip_in_kernel(kvm))
6083 goto create_irqchip_unlock;
6086 if (kvm->created_vcpus)
6087 goto create_irqchip_unlock;
6089 r = kvm_pic_init(kvm);
6091 goto create_irqchip_unlock;
6093 r = kvm_ioapic_init(kvm);
6095 kvm_pic_destroy(kvm);
6096 goto create_irqchip_unlock;
6099 r = kvm_setup_default_irq_routing(kvm);
6101 kvm_ioapic_destroy(kvm);
6102 kvm_pic_destroy(kvm);
6103 goto create_irqchip_unlock;
6105 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6107 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6108 create_irqchip_unlock:
6109 mutex_unlock(&kvm->lock);
6112 case KVM_CREATE_PIT:
6113 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6115 case KVM_CREATE_PIT2:
6117 if (copy_from_user(&u.pit_config, argp,
6118 sizeof(struct kvm_pit_config)))
6121 mutex_lock(&kvm->lock);
6124 goto create_pit_unlock;
6126 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6130 mutex_unlock(&kvm->lock);
6132 case KVM_GET_IRQCHIP: {
6133 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6134 struct kvm_irqchip *chip;
6136 chip = memdup_user(argp, sizeof(*chip));
6143 if (!irqchip_kernel(kvm))
6144 goto get_irqchip_out;
6145 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6147 goto get_irqchip_out;
6149 if (copy_to_user(argp, chip, sizeof(*chip)))
6150 goto get_irqchip_out;
6156 case KVM_SET_IRQCHIP: {
6157 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6158 struct kvm_irqchip *chip;
6160 chip = memdup_user(argp, sizeof(*chip));
6167 if (!irqchip_kernel(kvm))
6168 goto set_irqchip_out;
6169 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6176 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6179 if (!kvm->arch.vpit)
6181 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6185 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6192 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6194 mutex_lock(&kvm->lock);
6196 if (!kvm->arch.vpit)
6198 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6200 mutex_unlock(&kvm->lock);
6203 case KVM_GET_PIT2: {
6205 if (!kvm->arch.vpit)
6207 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6211 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6216 case KVM_SET_PIT2: {
6218 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6220 mutex_lock(&kvm->lock);
6222 if (!kvm->arch.vpit)
6224 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6226 mutex_unlock(&kvm->lock);
6229 case KVM_REINJECT_CONTROL: {
6230 struct kvm_reinject_control control;
6232 if (copy_from_user(&control, argp, sizeof(control)))
6235 if (!kvm->arch.vpit)
6237 r = kvm_vm_ioctl_reinject(kvm, &control);
6240 case KVM_SET_BOOT_CPU_ID:
6242 mutex_lock(&kvm->lock);
6243 if (kvm->created_vcpus)
6246 kvm->arch.bsp_vcpu_id = arg;
6247 mutex_unlock(&kvm->lock);
6249 #ifdef CONFIG_KVM_XEN
6250 case KVM_XEN_HVM_CONFIG: {
6251 struct kvm_xen_hvm_config xhc;
6253 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6255 r = kvm_xen_hvm_config(kvm, &xhc);
6258 case KVM_XEN_HVM_GET_ATTR: {
6259 struct kvm_xen_hvm_attr xha;
6262 if (copy_from_user(&xha, argp, sizeof(xha)))
6264 r = kvm_xen_hvm_get_attr(kvm, &xha);
6265 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6269 case KVM_XEN_HVM_SET_ATTR: {
6270 struct kvm_xen_hvm_attr xha;
6273 if (copy_from_user(&xha, argp, sizeof(xha)))
6275 r = kvm_xen_hvm_set_attr(kvm, &xha);
6279 case KVM_SET_CLOCK: {
6280 struct kvm_arch *ka = &kvm->arch;
6281 struct kvm_clock_data user_ns;
6285 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6294 * TODO: userspace has to take care of races with VCPU_RUN, so
6295 * kvm_gen_update_masterclock() can be cut down to locked
6296 * pvclock_update_vm_gtod_copy().
6298 kvm_gen_update_masterclock(kvm);
6301 * This pairs with kvm_guest_time_update(): when masterclock is
6302 * in use, we use master_kernel_ns + kvmclock_offset to set
6303 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6304 * is slightly ahead) here we risk going negative on unsigned
6305 * 'system_time' when 'user_ns.clock' is very small.
6307 raw_spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6308 if (kvm->arch.use_master_clock)
6309 now_ns = ka->master_kernel_ns;
6311 now_ns = get_kvmclock_base_ns();
6312 ka->kvmclock_offset = user_ns.clock - now_ns;
6313 raw_spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6315 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6318 case KVM_GET_CLOCK: {
6319 struct kvm_clock_data user_ns;
6322 now_ns = get_kvmclock_ns(kvm);
6323 user_ns.clock = now_ns;
6324 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6325 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6328 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6333 case KVM_MEMORY_ENCRYPT_OP: {
6335 if (kvm_x86_ops.mem_enc_op)
6336 r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6339 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6340 struct kvm_enc_region region;
6343 if (copy_from_user(®ion, argp, sizeof(region)))
6347 if (kvm_x86_ops.mem_enc_reg_region)
6348 r = static_call(kvm_x86_mem_enc_reg_region)(kvm, ®ion);
6351 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6352 struct kvm_enc_region region;
6355 if (copy_from_user(®ion, argp, sizeof(region)))
6359 if (kvm_x86_ops.mem_enc_unreg_region)
6360 r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, ®ion);
6363 case KVM_HYPERV_EVENTFD: {
6364 struct kvm_hyperv_eventfd hvevfd;
6367 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6369 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6372 case KVM_SET_PMU_EVENT_FILTER:
6373 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6375 case KVM_X86_SET_MSR_FILTER: {
6376 struct kvm_msr_filter __user *user_msr_filter = argp;
6377 struct kvm_msr_filter filter;
6379 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6382 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6392 static void kvm_init_msr_list(void)
6394 struct x86_pmu_capability x86_pmu;
6398 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6399 "Please update the fixed PMCs in msrs_to_saved_all[]");
6401 perf_get_x86_pmu_capability(&x86_pmu);
6403 num_msrs_to_save = 0;
6404 num_emulated_msrs = 0;
6405 num_msr_based_features = 0;
6407 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6408 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6412 * Even MSRs that are valid in the host may not be exposed
6413 * to the guests in some cases.
6415 switch (msrs_to_save_all[i]) {
6416 case MSR_IA32_BNDCFGS:
6417 if (!kvm_mpx_supported())
6421 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6422 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6425 case MSR_IA32_UMWAIT_CONTROL:
6426 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6429 case MSR_IA32_RTIT_CTL:
6430 case MSR_IA32_RTIT_STATUS:
6431 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6434 case MSR_IA32_RTIT_CR3_MATCH:
6435 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6436 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6439 case MSR_IA32_RTIT_OUTPUT_BASE:
6440 case MSR_IA32_RTIT_OUTPUT_MASK:
6441 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6442 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6443 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6446 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6447 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6448 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6449 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6452 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6453 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6454 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6457 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6458 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6459 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6466 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6469 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6470 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6473 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6476 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6477 struct kvm_msr_entry msr;
6479 msr.index = msr_based_features_all[i];
6480 if (kvm_get_msr_feature(&msr))
6483 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6487 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6495 if (!(lapic_in_kernel(vcpu) &&
6496 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6497 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6508 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6515 if (!(lapic_in_kernel(vcpu) &&
6516 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6518 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6520 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6530 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6531 struct kvm_segment *var, int seg)
6533 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6536 void kvm_get_segment(struct kvm_vcpu *vcpu,
6537 struct kvm_segment *var, int seg)
6539 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6542 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6543 struct x86_exception *exception)
6547 BUG_ON(!mmu_is_nested(vcpu));
6549 /* NPT walks are always user-walks */
6550 access |= PFERR_USER_MASK;
6551 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6556 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6557 struct x86_exception *exception)
6559 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6560 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6562 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6564 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6565 struct x86_exception *exception)
6567 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6568 access |= PFERR_FETCH_MASK;
6569 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6572 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6573 struct x86_exception *exception)
6575 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6576 access |= PFERR_WRITE_MASK;
6577 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6579 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6581 /* uses this to access any guest's mapped memory without checking CPL */
6582 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6583 struct x86_exception *exception)
6585 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6588 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6589 struct kvm_vcpu *vcpu, u32 access,
6590 struct x86_exception *exception)
6593 int r = X86EMUL_CONTINUE;
6596 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6598 unsigned offset = addr & (PAGE_SIZE-1);
6599 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6602 if (gpa == UNMAPPED_GVA)
6603 return X86EMUL_PROPAGATE_FAULT;
6604 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6607 r = X86EMUL_IO_NEEDED;
6619 /* used for instruction fetching */
6620 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6621 gva_t addr, void *val, unsigned int bytes,
6622 struct x86_exception *exception)
6624 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6625 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6629 /* Inline kvm_read_guest_virt_helper for speed. */
6630 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6632 if (unlikely(gpa == UNMAPPED_GVA))
6633 return X86EMUL_PROPAGATE_FAULT;
6635 offset = addr & (PAGE_SIZE-1);
6636 if (WARN_ON(offset + bytes > PAGE_SIZE))
6637 bytes = (unsigned)PAGE_SIZE - offset;
6638 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6640 if (unlikely(ret < 0))
6641 return X86EMUL_IO_NEEDED;
6643 return X86EMUL_CONTINUE;
6646 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6647 gva_t addr, void *val, unsigned int bytes,
6648 struct x86_exception *exception)
6650 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6653 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6654 * is returned, but our callers are not ready for that and they blindly
6655 * call kvm_inject_page_fault. Ensure that they at least do not leak
6656 * uninitialized kernel stack memory into cr2 and error code.
6658 memset(exception, 0, sizeof(*exception));
6659 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6662 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6664 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6665 gva_t addr, void *val, unsigned int bytes,
6666 struct x86_exception *exception, bool system)
6668 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6671 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6672 access |= PFERR_USER_MASK;
6674 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6677 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6678 unsigned long addr, void *val, unsigned int bytes)
6680 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6681 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6683 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6686 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6687 struct kvm_vcpu *vcpu, u32 access,
6688 struct x86_exception *exception)
6691 int r = X86EMUL_CONTINUE;
6694 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6697 unsigned offset = addr & (PAGE_SIZE-1);
6698 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6701 if (gpa == UNMAPPED_GVA)
6702 return X86EMUL_PROPAGATE_FAULT;
6703 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6705 r = X86EMUL_IO_NEEDED;
6717 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6718 unsigned int bytes, struct x86_exception *exception,
6721 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6722 u32 access = PFERR_WRITE_MASK;
6724 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6725 access |= PFERR_USER_MASK;
6727 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6731 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6732 unsigned int bytes, struct x86_exception *exception)
6734 /* kvm_write_guest_virt_system can pull in tons of pages. */
6735 vcpu->arch.l1tf_flush_l1d = true;
6737 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6738 PFERR_WRITE_MASK, exception);
6740 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6742 int handle_ud(struct kvm_vcpu *vcpu)
6744 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6745 int emul_type = EMULTYPE_TRAP_UD;
6746 char sig[5]; /* ud2; .ascii "kvm" */
6747 struct x86_exception e;
6749 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6752 if (force_emulation_prefix &&
6753 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6754 sig, sizeof(sig), &e) == 0 &&
6755 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6756 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6757 emul_type = EMULTYPE_TRAP_UD_FORCED;
6760 return kvm_emulate_instruction(vcpu, emul_type);
6762 EXPORT_SYMBOL_GPL(handle_ud);
6764 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6765 gpa_t gpa, bool write)
6767 /* For APIC access vmexit */
6768 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6771 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6772 trace_vcpu_match_mmio(gva, gpa, write, true);
6779 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6780 gpa_t *gpa, struct x86_exception *exception,
6783 u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6784 | (write ? PFERR_WRITE_MASK : 0);
6787 * currently PKRU is only applied to ept enabled guest so
6788 * there is no pkey in EPT page table for L1 guest or EPT
6789 * shadow page table for L2 guest.
6791 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6792 !permission_fault(vcpu, vcpu->arch.walk_mmu,
6793 vcpu->arch.mmio_access, 0, access))) {
6794 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6795 (gva & (PAGE_SIZE - 1));
6796 trace_vcpu_match_mmio(gva, *gpa, write, false);
6800 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6802 if (*gpa == UNMAPPED_GVA)
6805 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6808 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6809 const void *val, int bytes)
6813 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6816 kvm_page_track_write(vcpu, gpa, val, bytes);
6820 struct read_write_emulator_ops {
6821 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6823 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6824 void *val, int bytes);
6825 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6826 int bytes, void *val);
6827 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6828 void *val, int bytes);
6832 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6834 if (vcpu->mmio_read_completed) {
6835 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6836 vcpu->mmio_fragments[0].gpa, val);
6837 vcpu->mmio_read_completed = 0;
6844 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6845 void *val, int bytes)
6847 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6850 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6851 void *val, int bytes)
6853 return emulator_write_phys(vcpu, gpa, val, bytes);
6856 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6858 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6859 return vcpu_mmio_write(vcpu, gpa, bytes, val);
6862 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6863 void *val, int bytes)
6865 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6866 return X86EMUL_IO_NEEDED;
6869 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6870 void *val, int bytes)
6872 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6874 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6875 return X86EMUL_CONTINUE;
6878 static const struct read_write_emulator_ops read_emultor = {
6879 .read_write_prepare = read_prepare,
6880 .read_write_emulate = read_emulate,
6881 .read_write_mmio = vcpu_mmio_read,
6882 .read_write_exit_mmio = read_exit_mmio,
6885 static const struct read_write_emulator_ops write_emultor = {
6886 .read_write_emulate = write_emulate,
6887 .read_write_mmio = write_mmio,
6888 .read_write_exit_mmio = write_exit_mmio,
6892 static int emulator_read_write_onepage(unsigned long addr, void *val,
6894 struct x86_exception *exception,
6895 struct kvm_vcpu *vcpu,
6896 const struct read_write_emulator_ops *ops)
6900 bool write = ops->write;
6901 struct kvm_mmio_fragment *frag;
6902 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6905 * If the exit was due to a NPF we may already have a GPA.
6906 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6907 * Note, this cannot be used on string operations since string
6908 * operation using rep will only have the initial GPA from the NPF
6911 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6912 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6913 gpa = ctxt->gpa_val;
6914 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6916 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6918 return X86EMUL_PROPAGATE_FAULT;
6921 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6922 return X86EMUL_CONTINUE;
6925 * Is this MMIO handled locally?
6927 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6928 if (handled == bytes)
6929 return X86EMUL_CONTINUE;
6935 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6936 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6940 return X86EMUL_CONTINUE;
6943 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6945 void *val, unsigned int bytes,
6946 struct x86_exception *exception,
6947 const struct read_write_emulator_ops *ops)
6949 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6953 if (ops->read_write_prepare &&
6954 ops->read_write_prepare(vcpu, val, bytes))
6955 return X86EMUL_CONTINUE;
6957 vcpu->mmio_nr_fragments = 0;
6959 /* Crossing a page boundary? */
6960 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6963 now = -addr & ~PAGE_MASK;
6964 rc = emulator_read_write_onepage(addr, val, now, exception,
6967 if (rc != X86EMUL_CONTINUE)
6970 if (ctxt->mode != X86EMUL_MODE_PROT64)
6976 rc = emulator_read_write_onepage(addr, val, bytes, exception,
6978 if (rc != X86EMUL_CONTINUE)
6981 if (!vcpu->mmio_nr_fragments)
6984 gpa = vcpu->mmio_fragments[0].gpa;
6986 vcpu->mmio_needed = 1;
6987 vcpu->mmio_cur_fragment = 0;
6989 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6990 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6991 vcpu->run->exit_reason = KVM_EXIT_MMIO;
6992 vcpu->run->mmio.phys_addr = gpa;
6994 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6997 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7001 struct x86_exception *exception)
7003 return emulator_read_write(ctxt, addr, val, bytes,
7004 exception, &read_emultor);
7007 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7011 struct x86_exception *exception)
7013 return emulator_read_write(ctxt, addr, (void *)val, bytes,
7014 exception, &write_emultor);
7017 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7018 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7020 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7025 struct x86_exception *exception)
7027 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7033 /* guests cmpxchg8b have to be emulated atomically */
7034 if (bytes > 8 || (bytes & (bytes - 1)))
7037 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7039 if (gpa == UNMAPPED_GVA ||
7040 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7044 * Emulate the atomic as a straight write to avoid #AC if SLD is
7045 * enabled in the host and the access splits a cache line.
7047 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7048 page_line_mask = ~(cache_line_size() - 1);
7050 page_line_mask = PAGE_MASK;
7052 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7055 hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7056 if (kvm_is_error_hva(hva))
7059 hva += offset_in_page(gpa);
7063 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7066 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7069 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7072 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7081 return X86EMUL_CMPXCHG_FAILED;
7083 kvm_page_track_write(vcpu, gpa, new, bytes);
7085 return X86EMUL_CONTINUE;
7088 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7090 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7093 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7097 for (i = 0; i < vcpu->arch.pio.count; i++) {
7098 if (vcpu->arch.pio.in)
7099 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7100 vcpu->arch.pio.size, pd);
7102 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7103 vcpu->arch.pio.port, vcpu->arch.pio.size,
7107 pd += vcpu->arch.pio.size;
7112 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7113 unsigned short port,
7114 unsigned int count, bool in)
7116 vcpu->arch.pio.port = port;
7117 vcpu->arch.pio.in = in;
7118 vcpu->arch.pio.count = count;
7119 vcpu->arch.pio.size = size;
7121 if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7124 vcpu->run->exit_reason = KVM_EXIT_IO;
7125 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7126 vcpu->run->io.size = size;
7127 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7128 vcpu->run->io.count = count;
7129 vcpu->run->io.port = port;
7134 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7135 unsigned short port, unsigned int count)
7137 WARN_ON(vcpu->arch.pio.count);
7138 memset(vcpu->arch.pio_data, 0, size * count);
7139 return emulator_pio_in_out(vcpu, size, port, count, true);
7142 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7144 int size = vcpu->arch.pio.size;
7145 unsigned count = vcpu->arch.pio.count;
7146 memcpy(val, vcpu->arch.pio_data, size * count);
7147 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7148 vcpu->arch.pio.count = 0;
7151 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7152 unsigned short port, void *val, unsigned int count)
7154 if (vcpu->arch.pio.count) {
7156 * Complete a previous iteration that required userspace I/O.
7157 * Note, @count isn't guaranteed to match pio.count as userspace
7158 * can modify ECX before rerunning the vCPU. Ignore any such
7159 * shenanigans as KVM doesn't support modifying the rep count,
7160 * and the emulator ensures @count doesn't overflow the buffer.
7163 int r = __emulator_pio_in(vcpu, size, port, count);
7167 /* Results already available, fall through. */
7170 complete_emulator_pio_in(vcpu, val);
7174 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7175 int size, unsigned short port, void *val,
7178 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7182 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7183 unsigned short port, const void *val,
7188 memcpy(vcpu->arch.pio_data, val, size * count);
7189 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7190 ret = emulator_pio_in_out(vcpu, size, port, count, false);
7192 vcpu->arch.pio.count = 0;
7197 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7198 int size, unsigned short port,
7199 const void *val, unsigned int count)
7201 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7204 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7206 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7209 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7211 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7214 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7216 if (!need_emulate_wbinvd(vcpu))
7217 return X86EMUL_CONTINUE;
7219 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7220 int cpu = get_cpu();
7222 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7223 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7224 wbinvd_ipi, NULL, 1);
7226 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7229 return X86EMUL_CONTINUE;
7232 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7234 kvm_emulate_wbinvd_noskip(vcpu);
7235 return kvm_skip_emulated_instruction(vcpu);
7237 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7241 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7243 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7246 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7247 unsigned long *dest)
7249 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7252 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7253 unsigned long value)
7256 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7259 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7261 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7264 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7266 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7267 unsigned long value;
7271 value = kvm_read_cr0(vcpu);
7274 value = vcpu->arch.cr2;
7277 value = kvm_read_cr3(vcpu);
7280 value = kvm_read_cr4(vcpu);
7283 value = kvm_get_cr8(vcpu);
7286 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7293 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7295 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7300 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7303 vcpu->arch.cr2 = val;
7306 res = kvm_set_cr3(vcpu, val);
7309 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7312 res = kvm_set_cr8(vcpu, val);
7315 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7322 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7324 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7327 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7329 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7332 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7334 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7337 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7339 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7342 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7344 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7347 static unsigned long emulator_get_cached_segment_base(
7348 struct x86_emulate_ctxt *ctxt, int seg)
7350 return get_segment_base(emul_to_vcpu(ctxt), seg);
7353 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7354 struct desc_struct *desc, u32 *base3,
7357 struct kvm_segment var;
7359 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7360 *selector = var.selector;
7363 memset(desc, 0, sizeof(*desc));
7371 set_desc_limit(desc, var.limit);
7372 set_desc_base(desc, (unsigned long)var.base);
7373 #ifdef CONFIG_X86_64
7375 *base3 = var.base >> 32;
7377 desc->type = var.type;
7379 desc->dpl = var.dpl;
7380 desc->p = var.present;
7381 desc->avl = var.avl;
7389 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7390 struct desc_struct *desc, u32 base3,
7393 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7394 struct kvm_segment var;
7396 var.selector = selector;
7397 var.base = get_desc_base(desc);
7398 #ifdef CONFIG_X86_64
7399 var.base |= ((u64)base3) << 32;
7401 var.limit = get_desc_limit(desc);
7403 var.limit = (var.limit << 12) | 0xfff;
7404 var.type = desc->type;
7405 var.dpl = desc->dpl;
7410 var.avl = desc->avl;
7411 var.present = desc->p;
7412 var.unusable = !var.present;
7415 kvm_set_segment(vcpu, &var, seg);
7419 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7420 u32 msr_index, u64 *pdata)
7422 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7425 r = kvm_get_msr(vcpu, msr_index, pdata);
7427 if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7428 /* Bounce to user space */
7429 return X86EMUL_IO_NEEDED;
7435 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7436 u32 msr_index, u64 data)
7438 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7441 r = kvm_set_msr(vcpu, msr_index, data);
7443 if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7444 /* Bounce to user space */
7445 return X86EMUL_IO_NEEDED;
7451 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7453 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7455 return vcpu->arch.smbase;
7458 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7460 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7462 vcpu->arch.smbase = smbase;
7465 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7468 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7471 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7472 u32 pmc, u64 *pdata)
7474 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7477 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7479 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7482 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7483 struct x86_instruction_info *info,
7484 enum x86_intercept_stage stage)
7486 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7490 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7491 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7494 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7497 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7499 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7502 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7504 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7507 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7509 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7512 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7514 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7517 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7519 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7522 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7524 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7527 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7529 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7532 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7534 return emul_to_vcpu(ctxt)->arch.hflags;
7537 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7539 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7541 kvm_smm_changed(vcpu, false);
7544 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7545 const char *smstate)
7547 return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7550 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7552 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7555 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7557 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7560 static const struct x86_emulate_ops emulate_ops = {
7561 .read_gpr = emulator_read_gpr,
7562 .write_gpr = emulator_write_gpr,
7563 .read_std = emulator_read_std,
7564 .write_std = emulator_write_std,
7565 .read_phys = kvm_read_guest_phys_system,
7566 .fetch = kvm_fetch_guest_virt,
7567 .read_emulated = emulator_read_emulated,
7568 .write_emulated = emulator_write_emulated,
7569 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7570 .invlpg = emulator_invlpg,
7571 .pio_in_emulated = emulator_pio_in_emulated,
7572 .pio_out_emulated = emulator_pio_out_emulated,
7573 .get_segment = emulator_get_segment,
7574 .set_segment = emulator_set_segment,
7575 .get_cached_segment_base = emulator_get_cached_segment_base,
7576 .get_gdt = emulator_get_gdt,
7577 .get_idt = emulator_get_idt,
7578 .set_gdt = emulator_set_gdt,
7579 .set_idt = emulator_set_idt,
7580 .get_cr = emulator_get_cr,
7581 .set_cr = emulator_set_cr,
7582 .cpl = emulator_get_cpl,
7583 .get_dr = emulator_get_dr,
7584 .set_dr = emulator_set_dr,
7585 .get_smbase = emulator_get_smbase,
7586 .set_smbase = emulator_set_smbase,
7587 .set_msr = emulator_set_msr,
7588 .get_msr = emulator_get_msr,
7589 .check_pmc = emulator_check_pmc,
7590 .read_pmc = emulator_read_pmc,
7591 .halt = emulator_halt,
7592 .wbinvd = emulator_wbinvd,
7593 .fix_hypercall = emulator_fix_hypercall,
7594 .intercept = emulator_intercept,
7595 .get_cpuid = emulator_get_cpuid,
7596 .guest_has_long_mode = emulator_guest_has_long_mode,
7597 .guest_has_movbe = emulator_guest_has_movbe,
7598 .guest_has_fxsr = emulator_guest_has_fxsr,
7599 .guest_has_rdpid = emulator_guest_has_rdpid,
7600 .set_nmi_mask = emulator_set_nmi_mask,
7601 .get_hflags = emulator_get_hflags,
7602 .exiting_smm = emulator_exiting_smm,
7603 .leave_smm = emulator_leave_smm,
7604 .triple_fault = emulator_triple_fault,
7605 .set_xcr = emulator_set_xcr,
7608 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7610 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7612 * an sti; sti; sequence only disable interrupts for the first
7613 * instruction. So, if the last instruction, be it emulated or
7614 * not, left the system with the INT_STI flag enabled, it
7615 * means that the last instruction is an sti. We should not
7616 * leave the flag on in this case. The same goes for mov ss
7618 if (int_shadow & mask)
7620 if (unlikely(int_shadow || mask)) {
7621 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7623 kvm_make_request(KVM_REQ_EVENT, vcpu);
7627 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7629 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7630 if (ctxt->exception.vector == PF_VECTOR)
7631 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7633 if (ctxt->exception.error_code_valid)
7634 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7635 ctxt->exception.error_code);
7637 kvm_queue_exception(vcpu, ctxt->exception.vector);
7641 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7643 struct x86_emulate_ctxt *ctxt;
7645 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7647 pr_err("kvm: failed to allocate vcpu's emulator\n");
7652 ctxt->ops = &emulate_ops;
7653 vcpu->arch.emulate_ctxt = ctxt;
7658 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7660 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7663 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7665 ctxt->gpa_available = false;
7666 ctxt->eflags = kvm_get_rflags(vcpu);
7667 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7669 ctxt->eip = kvm_rip_read(vcpu);
7670 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7671 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7672 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7673 cs_db ? X86EMUL_MODE_PROT32 :
7674 X86EMUL_MODE_PROT16;
7675 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7676 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7677 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7679 ctxt->interruptibility = 0;
7680 ctxt->have_exception = false;
7681 ctxt->exception.vector = -1;
7682 ctxt->perm_ok = false;
7684 init_decode_cache(ctxt);
7685 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7688 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7690 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7693 init_emulate_ctxt(vcpu);
7697 ctxt->_eip = ctxt->eip + inc_eip;
7698 ret = emulate_int_real(ctxt, irq);
7700 if (ret != X86EMUL_CONTINUE) {
7701 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7703 ctxt->eip = ctxt->_eip;
7704 kvm_rip_write(vcpu, ctxt->eip);
7705 kvm_set_rflags(vcpu, ctxt->eflags);
7708 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7710 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7712 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7713 u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7714 struct kvm_run *run = vcpu->run;
7716 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7717 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7718 run->emulation_failure.ndata = 0;
7719 run->emulation_failure.flags = 0;
7722 run->emulation_failure.ndata = 3;
7723 run->emulation_failure.flags |=
7724 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7725 run->emulation_failure.insn_size = insn_size;
7726 memset(run->emulation_failure.insn_bytes, 0x90,
7727 sizeof(run->emulation_failure.insn_bytes));
7728 memcpy(run->emulation_failure.insn_bytes,
7729 ctxt->fetch.data, insn_size);
7733 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7735 struct kvm *kvm = vcpu->kvm;
7737 ++vcpu->stat.insn_emulation_fail;
7738 trace_kvm_emulate_insn_failed(vcpu);
7740 if (emulation_type & EMULTYPE_VMWARE_GP) {
7741 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7745 if (kvm->arch.exit_on_emulation_error ||
7746 (emulation_type & EMULTYPE_SKIP)) {
7747 prepare_emulation_failure_exit(vcpu);
7751 kvm_queue_exception(vcpu, UD_VECTOR);
7753 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7754 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7755 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7756 vcpu->run->internal.ndata = 0;
7763 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7764 bool write_fault_to_shadow_pgtable,
7767 gpa_t gpa = cr2_or_gpa;
7770 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7773 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7774 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7777 if (!vcpu->arch.mmu->direct_map) {
7779 * Write permission should be allowed since only
7780 * write access need to be emulated.
7782 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7785 * If the mapping is invalid in guest, let cpu retry
7786 * it to generate fault.
7788 if (gpa == UNMAPPED_GVA)
7793 * Do not retry the unhandleable instruction if it faults on the
7794 * readonly host memory, otherwise it will goto a infinite loop:
7795 * retry instruction -> write #PF -> emulation fail -> retry
7796 * instruction -> ...
7798 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7801 * If the instruction failed on the error pfn, it can not be fixed,
7802 * report the error to userspace.
7804 if (is_error_noslot_pfn(pfn))
7807 kvm_release_pfn_clean(pfn);
7809 /* The instructions are well-emulated on direct mmu. */
7810 if (vcpu->arch.mmu->direct_map) {
7811 unsigned int indirect_shadow_pages;
7813 write_lock(&vcpu->kvm->mmu_lock);
7814 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7815 write_unlock(&vcpu->kvm->mmu_lock);
7817 if (indirect_shadow_pages)
7818 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7824 * if emulation was due to access to shadowed page table
7825 * and it failed try to unshadow page and re-enter the
7826 * guest to let CPU execute the instruction.
7828 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7831 * If the access faults on its page table, it can not
7832 * be fixed by unprotecting shadow page and it should
7833 * be reported to userspace.
7835 return !write_fault_to_shadow_pgtable;
7838 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7839 gpa_t cr2_or_gpa, int emulation_type)
7841 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7842 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7844 last_retry_eip = vcpu->arch.last_retry_eip;
7845 last_retry_addr = vcpu->arch.last_retry_addr;
7848 * If the emulation is caused by #PF and it is non-page_table
7849 * writing instruction, it means the VM-EXIT is caused by shadow
7850 * page protected, we can zap the shadow page and retry this
7851 * instruction directly.
7853 * Note: if the guest uses a non-page-table modifying instruction
7854 * on the PDE that points to the instruction, then we will unmap
7855 * the instruction and go to an infinite loop. So, we cache the
7856 * last retried eip and the last fault address, if we meet the eip
7857 * and the address again, we can break out of the potential infinite
7860 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7862 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7865 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7866 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7869 if (x86_page_table_writing_insn(ctxt))
7872 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7875 vcpu->arch.last_retry_eip = ctxt->eip;
7876 vcpu->arch.last_retry_addr = cr2_or_gpa;
7878 if (!vcpu->arch.mmu->direct_map)
7879 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7881 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7886 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7887 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7889 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7891 trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7894 vcpu->arch.hflags |= HF_SMM_MASK;
7896 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7898 /* Process a latched INIT or SMI, if any. */
7899 kvm_make_request(KVM_REQ_EVENT, vcpu);
7902 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7903 * on SMM exit we still need to reload them from
7906 vcpu->arch.pdptrs_from_userspace = false;
7909 kvm_mmu_reset_context(vcpu);
7912 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7921 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7922 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7927 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7929 struct kvm_run *kvm_run = vcpu->run;
7931 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7932 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7933 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7934 kvm_run->debug.arch.exception = DB_VECTOR;
7935 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7938 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7942 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7944 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7947 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7952 * rflags is the old, "raw" value of the flags. The new value has
7953 * not been saved yet.
7955 * This is correct even for TF set by the guest, because "the
7956 * processor will not generate this exception after the instruction
7957 * that sets the TF flag".
7959 if (unlikely(rflags & X86_EFLAGS_TF))
7960 r = kvm_vcpu_do_singlestep(vcpu);
7963 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7965 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
7967 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7968 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7969 struct kvm_run *kvm_run = vcpu->run;
7970 unsigned long eip = kvm_get_linear_rip(vcpu);
7971 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7972 vcpu->arch.guest_debug_dr7,
7976 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7977 kvm_run->debug.arch.pc = eip;
7978 kvm_run->debug.arch.exception = DB_VECTOR;
7979 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7985 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7986 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7987 unsigned long eip = kvm_get_linear_rip(vcpu);
7988 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7993 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8002 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8004 switch (ctxt->opcode_len) {
8011 case 0xe6: /* OUT */
8015 case 0x6c: /* INS */
8017 case 0x6e: /* OUTS */
8024 case 0x33: /* RDPMC */
8034 * Decode an instruction for emulation. The caller is responsible for handling
8035 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8036 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8037 * code breakpoints have higher priority and thus have already been done by
8040 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8041 * response to a machine check.
8043 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8044 void *insn, int insn_len)
8046 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8049 init_emulate_ctxt(vcpu);
8051 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8053 trace_kvm_emulate_insn_start(vcpu);
8054 ++vcpu->stat.insn_emulation;
8058 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8060 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8061 int emulation_type, void *insn, int insn_len)
8064 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8065 bool writeback = true;
8066 bool write_fault_to_spt;
8068 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
8071 vcpu->arch.l1tf_flush_l1d = true;
8074 * Clear write_fault_to_shadow_pgtable here to ensure it is
8077 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8078 vcpu->arch.write_fault_to_shadow_pgtable = false;
8080 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8081 kvm_clear_exception_queue(vcpu);
8084 * Return immediately if RIP hits a code breakpoint, such #DBs
8085 * are fault-like and are higher priority than any faults on
8086 * the code fetch itself.
8088 if (!(emulation_type & EMULTYPE_SKIP) &&
8089 kvm_vcpu_check_code_breakpoint(vcpu, &r))
8092 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8094 if (r != EMULATION_OK) {
8095 if ((emulation_type & EMULTYPE_TRAP_UD) ||
8096 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8097 kvm_queue_exception(vcpu, UD_VECTOR);
8100 if (reexecute_instruction(vcpu, cr2_or_gpa,
8104 if (ctxt->have_exception) {
8106 * #UD should result in just EMULATION_FAILED, and trap-like
8107 * exception should not be encountered during decode.
8109 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8110 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8111 inject_emulated_exception(vcpu);
8114 return handle_emulation_failure(vcpu, emulation_type);
8118 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8119 !is_vmware_backdoor_opcode(ctxt)) {
8120 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8125 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8126 * for kvm_skip_emulated_instruction(). The caller is responsible for
8127 * updating interruptibility state and injecting single-step #DBs.
8129 if (emulation_type & EMULTYPE_SKIP) {
8130 if (ctxt->mode != X86EMUL_MODE_PROT64)
8131 ctxt->eip = (u32)ctxt->_eip;
8133 ctxt->eip = ctxt->_eip;
8135 kvm_rip_write(vcpu, ctxt->eip);
8136 if (ctxt->eflags & X86_EFLAGS_RF)
8137 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8141 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8144 /* this is needed for vmware backdoor interface to work since it
8145 changes registers values during IO operation */
8146 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8147 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8148 emulator_invalidate_register_cache(ctxt);
8152 if (emulation_type & EMULTYPE_PF) {
8153 /* Save the faulting GPA (cr2) in the address field */
8154 ctxt->exception.address = cr2_or_gpa;
8156 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8157 if (vcpu->arch.mmu->direct_map) {
8158 ctxt->gpa_available = true;
8159 ctxt->gpa_val = cr2_or_gpa;
8162 /* Sanitize the address out of an abundance of paranoia. */
8163 ctxt->exception.address = 0;
8166 r = x86_emulate_insn(ctxt);
8168 if (r == EMULATION_INTERCEPTED)
8171 if (r == EMULATION_FAILED) {
8172 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8176 return handle_emulation_failure(vcpu, emulation_type);
8179 if (ctxt->have_exception) {
8181 if (inject_emulated_exception(vcpu))
8183 } else if (vcpu->arch.pio.count) {
8184 if (!vcpu->arch.pio.in) {
8185 /* FIXME: return into emulator if single-stepping. */
8186 vcpu->arch.pio.count = 0;
8189 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8192 } else if (vcpu->mmio_needed) {
8193 ++vcpu->stat.mmio_exits;
8195 if (!vcpu->mmio_is_write)
8198 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8199 } else if (vcpu->arch.complete_userspace_io) {
8202 } else if (r == EMULATION_RESTART)
8208 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8209 toggle_interruptibility(vcpu, ctxt->interruptibility);
8210 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8213 * Note, EXCPT_DB is assumed to be fault-like as the emulator
8214 * only supports code breakpoints and general detect #DB, both
8215 * of which are fault-like.
8217 if (!ctxt->have_exception ||
8218 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8219 kvm_rip_write(vcpu, ctxt->eip);
8220 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8221 r = kvm_vcpu_do_singlestep(vcpu);
8222 if (kvm_x86_ops.update_emulated_instruction)
8223 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8224 __kvm_set_rflags(vcpu, ctxt->eflags);
8228 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8229 * do nothing, and it will be requested again as soon as
8230 * the shadow expires. But we still need to check here,
8231 * because POPF has no interrupt shadow.
8233 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8234 kvm_make_request(KVM_REQ_EVENT, vcpu);
8236 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8241 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8243 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8245 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8247 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8248 void *insn, int insn_len)
8250 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8252 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8254 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8256 vcpu->arch.pio.count = 0;
8260 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8262 vcpu->arch.pio.count = 0;
8264 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8267 return kvm_skip_emulated_instruction(vcpu);
8270 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8271 unsigned short port)
8273 unsigned long val = kvm_rax_read(vcpu);
8274 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8280 * Workaround userspace that relies on old KVM behavior of %rip being
8281 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8284 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8285 vcpu->arch.complete_userspace_io =
8286 complete_fast_pio_out_port_0x7e;
8287 kvm_skip_emulated_instruction(vcpu);
8289 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8290 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8295 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8299 /* We should only ever be called with arch.pio.count equal to 1 */
8300 BUG_ON(vcpu->arch.pio.count != 1);
8302 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8303 vcpu->arch.pio.count = 0;
8307 /* For size less than 4 we merge, else we zero extend */
8308 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8311 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8312 * the copy and tracing
8314 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8315 kvm_rax_write(vcpu, val);
8317 return kvm_skip_emulated_instruction(vcpu);
8320 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8321 unsigned short port)
8326 /* For size less than 4 we merge, else we zero extend */
8327 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8329 ret = emulator_pio_in(vcpu, size, port, &val, 1);
8331 kvm_rax_write(vcpu, val);
8335 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8336 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8341 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8346 ret = kvm_fast_pio_in(vcpu, size, port);
8348 ret = kvm_fast_pio_out(vcpu, size, port);
8349 return ret && kvm_skip_emulated_instruction(vcpu);
8351 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8353 static int kvmclock_cpu_down_prep(unsigned int cpu)
8355 __this_cpu_write(cpu_tsc_khz, 0);
8359 static void tsc_khz_changed(void *data)
8361 struct cpufreq_freqs *freq = data;
8362 unsigned long khz = 0;
8366 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8367 khz = cpufreq_quick_get(raw_smp_processor_id());
8370 __this_cpu_write(cpu_tsc_khz, khz);
8373 #ifdef CONFIG_X86_64
8374 static void kvm_hyperv_tsc_notifier(void)
8377 struct kvm_vcpu *vcpu;
8379 unsigned long flags;
8381 mutex_lock(&kvm_lock);
8382 list_for_each_entry(kvm, &vm_list, vm_list)
8383 kvm_make_mclock_inprogress_request(kvm);
8385 hyperv_stop_tsc_emulation();
8387 /* TSC frequency always matches when on Hyper-V */
8388 for_each_present_cpu(cpu)
8389 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8390 kvm_max_guest_tsc_khz = tsc_khz;
8392 list_for_each_entry(kvm, &vm_list, vm_list) {
8393 struct kvm_arch *ka = &kvm->arch;
8395 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8396 pvclock_update_vm_gtod_copy(kvm);
8397 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8399 kvm_for_each_vcpu(cpu, vcpu, kvm)
8400 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8402 kvm_for_each_vcpu(cpu, vcpu, kvm)
8403 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8405 mutex_unlock(&kvm_lock);
8409 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8412 struct kvm_vcpu *vcpu;
8413 int i, send_ipi = 0;
8416 * We allow guests to temporarily run on slowing clocks,
8417 * provided we notify them after, or to run on accelerating
8418 * clocks, provided we notify them before. Thus time never
8421 * However, we have a problem. We can't atomically update
8422 * the frequency of a given CPU from this function; it is
8423 * merely a notifier, which can be called from any CPU.
8424 * Changing the TSC frequency at arbitrary points in time
8425 * requires a recomputation of local variables related to
8426 * the TSC for each VCPU. We must flag these local variables
8427 * to be updated and be sure the update takes place with the
8428 * new frequency before any guests proceed.
8430 * Unfortunately, the combination of hotplug CPU and frequency
8431 * change creates an intractable locking scenario; the order
8432 * of when these callouts happen is undefined with respect to
8433 * CPU hotplug, and they can race with each other. As such,
8434 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8435 * undefined; you can actually have a CPU frequency change take
8436 * place in between the computation of X and the setting of the
8437 * variable. To protect against this problem, all updates of
8438 * the per_cpu tsc_khz variable are done in an interrupt
8439 * protected IPI, and all callers wishing to update the value
8440 * must wait for a synchronous IPI to complete (which is trivial
8441 * if the caller is on the CPU already). This establishes the
8442 * necessary total order on variable updates.
8444 * Note that because a guest time update may take place
8445 * anytime after the setting of the VCPU's request bit, the
8446 * correct TSC value must be set before the request. However,
8447 * to ensure the update actually makes it to any guest which
8448 * starts running in hardware virtualization between the set
8449 * and the acquisition of the spinlock, we must also ping the
8450 * CPU after setting the request bit.
8454 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8456 mutex_lock(&kvm_lock);
8457 list_for_each_entry(kvm, &vm_list, vm_list) {
8458 kvm_for_each_vcpu(i, vcpu, kvm) {
8459 if (vcpu->cpu != cpu)
8461 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8462 if (vcpu->cpu != raw_smp_processor_id())
8466 mutex_unlock(&kvm_lock);
8468 if (freq->old < freq->new && send_ipi) {
8470 * We upscale the frequency. Must make the guest
8471 * doesn't see old kvmclock values while running with
8472 * the new frequency, otherwise we risk the guest sees
8473 * time go backwards.
8475 * In case we update the frequency for another cpu
8476 * (which might be in guest context) send an interrupt
8477 * to kick the cpu out of guest context. Next time
8478 * guest context is entered kvmclock will be updated,
8479 * so the guest will not see stale values.
8481 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8485 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8488 struct cpufreq_freqs *freq = data;
8491 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8493 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8496 for_each_cpu(cpu, freq->policy->cpus)
8497 __kvmclock_cpufreq_notifier(freq, cpu);
8502 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8503 .notifier_call = kvmclock_cpufreq_notifier
8506 static int kvmclock_cpu_online(unsigned int cpu)
8508 tsc_khz_changed(NULL);
8512 static void kvm_timer_init(void)
8514 max_tsc_khz = tsc_khz;
8516 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8517 #ifdef CONFIG_CPU_FREQ
8518 struct cpufreq_policy *policy;
8522 policy = cpufreq_cpu_get(cpu);
8524 if (policy->cpuinfo.max_freq)
8525 max_tsc_khz = policy->cpuinfo.max_freq;
8526 cpufreq_cpu_put(policy);
8530 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8531 CPUFREQ_TRANSITION_NOTIFIER);
8534 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8535 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8538 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8539 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8541 int kvm_is_in_guest(void)
8543 return __this_cpu_read(current_vcpu) != NULL;
8546 static int kvm_is_user_mode(void)
8550 if (__this_cpu_read(current_vcpu))
8551 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8553 return user_mode != 0;
8556 static unsigned long kvm_get_guest_ip(void)
8558 unsigned long ip = 0;
8560 if (__this_cpu_read(current_vcpu))
8561 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8566 static void kvm_handle_intel_pt_intr(void)
8568 struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8570 kvm_make_request(KVM_REQ_PMI, vcpu);
8571 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8572 (unsigned long *)&vcpu->arch.pmu.global_status);
8575 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8576 .is_in_guest = kvm_is_in_guest,
8577 .is_user_mode = kvm_is_user_mode,
8578 .get_guest_ip = kvm_get_guest_ip,
8579 .handle_intel_pt_intr = NULL,
8582 #ifdef CONFIG_X86_64
8583 static void pvclock_gtod_update_fn(struct work_struct *work)
8587 struct kvm_vcpu *vcpu;
8590 mutex_lock(&kvm_lock);
8591 list_for_each_entry(kvm, &vm_list, vm_list)
8592 kvm_for_each_vcpu(i, vcpu, kvm)
8593 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8594 atomic_set(&kvm_guest_has_master_clock, 0);
8595 mutex_unlock(&kvm_lock);
8598 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8601 * Indirection to move queue_work() out of the tk_core.seq write held
8602 * region to prevent possible deadlocks against time accessors which
8603 * are invoked with work related locks held.
8605 static void pvclock_irq_work_fn(struct irq_work *w)
8607 queue_work(system_long_wq, &pvclock_gtod_work);
8610 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8613 * Notification about pvclock gtod data update.
8615 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8618 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8619 struct timekeeper *tk = priv;
8621 update_pvclock_gtod(tk);
8624 * Disable master clock if host does not trust, or does not use,
8625 * TSC based clocksource. Delegate queue_work() to irq_work as
8626 * this is invoked with tk_core.seq write held.
8628 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8629 atomic_read(&kvm_guest_has_master_clock) != 0)
8630 irq_work_queue(&pvclock_irq_work);
8634 static struct notifier_block pvclock_gtod_notifier = {
8635 .notifier_call = pvclock_gtod_notify,
8639 int kvm_arch_init(void *opaque)
8641 struct kvm_x86_init_ops *ops = opaque;
8644 if (kvm_x86_ops.hardware_enable) {
8645 printk(KERN_ERR "kvm: already loaded the other module\n");
8650 if (!ops->cpu_has_kvm_support()) {
8651 pr_err_ratelimited("kvm: no hardware support\n");
8655 if (ops->disabled_by_bios()) {
8656 pr_err_ratelimited("kvm: disabled by bios\n");
8662 * KVM explicitly assumes that the guest has an FPU and
8663 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8664 * vCPU's FPU state as a fxregs_state struct.
8666 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8667 printk(KERN_ERR "kvm: inadequate fpu\n");
8673 x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8674 __alignof__(struct fpu), SLAB_ACCOUNT,
8676 if (!x86_fpu_cache) {
8677 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8681 x86_emulator_cache = kvm_alloc_emulator_cache();
8682 if (!x86_emulator_cache) {
8683 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8684 goto out_free_x86_fpu_cache;
8687 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8688 if (!user_return_msrs) {
8689 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8690 goto out_free_x86_emulator_cache;
8692 kvm_nr_uret_msrs = 0;
8694 r = kvm_mmu_vendor_module_init();
8696 goto out_free_percpu;
8700 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8701 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8702 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8705 if (pi_inject_timer == -1)
8706 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8707 #ifdef CONFIG_X86_64
8708 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8710 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8711 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8717 free_percpu(user_return_msrs);
8718 out_free_x86_emulator_cache:
8719 kmem_cache_destroy(x86_emulator_cache);
8720 out_free_x86_fpu_cache:
8721 kmem_cache_destroy(x86_fpu_cache);
8726 void kvm_arch_exit(void)
8728 #ifdef CONFIG_X86_64
8729 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8730 clear_hv_tscchange_cb();
8734 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8735 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8736 CPUFREQ_TRANSITION_NOTIFIER);
8737 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8738 #ifdef CONFIG_X86_64
8739 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8740 irq_work_sync(&pvclock_irq_work);
8741 cancel_work_sync(&pvclock_gtod_work);
8743 kvm_x86_ops.hardware_enable = NULL;
8744 kvm_mmu_vendor_module_exit();
8745 free_percpu(user_return_msrs);
8746 kmem_cache_destroy(x86_emulator_cache);
8747 kmem_cache_destroy(x86_fpu_cache);
8748 #ifdef CONFIG_KVM_XEN
8749 static_key_deferred_flush(&kvm_xen_enabled);
8750 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8754 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8756 ++vcpu->stat.halt_exits;
8757 if (lapic_in_kernel(vcpu)) {
8758 vcpu->arch.mp_state = state;
8761 vcpu->run->exit_reason = reason;
8766 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8768 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8770 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8772 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8774 int ret = kvm_skip_emulated_instruction(vcpu);
8776 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8777 * KVM_EXIT_DEBUG here.
8779 return kvm_vcpu_halt(vcpu) && ret;
8781 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8783 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8785 int ret = kvm_skip_emulated_instruction(vcpu);
8787 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8789 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8791 #ifdef CONFIG_X86_64
8792 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8793 unsigned long clock_type)
8795 struct kvm_clock_pairing clock_pairing;
8796 struct timespec64 ts;
8800 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8801 return -KVM_EOPNOTSUPP;
8804 * When tsc is in permanent catchup mode guests won't be able to use
8805 * pvclock_read_retry loop to get consistent view of pvclock
8807 if (vcpu->arch.tsc_always_catchup)
8808 return -KVM_EOPNOTSUPP;
8810 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8811 return -KVM_EOPNOTSUPP;
8813 clock_pairing.sec = ts.tv_sec;
8814 clock_pairing.nsec = ts.tv_nsec;
8815 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8816 clock_pairing.flags = 0;
8817 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8820 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8821 sizeof(struct kvm_clock_pairing)))
8829 * kvm_pv_kick_cpu_op: Kick a vcpu.
8831 * @apicid - apicid of vcpu to be kicked.
8833 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8836 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
8837 * common code, e.g. for tracing. Defer initialization to the compiler.
8839 struct kvm_lapic_irq lapic_irq = {
8840 .delivery_mode = APIC_DM_REMRD,
8841 .dest_mode = APIC_DEST_PHYSICAL,
8842 .shorthand = APIC_DEST_NOSHORT,
8846 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8849 bool kvm_apicv_activated(struct kvm *kvm)
8851 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8853 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8855 static void kvm_apicv_init(struct kvm *kvm)
8857 mutex_init(&kvm->arch.apicv_update_lock);
8860 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8861 &kvm->arch.apicv_inhibit_reasons);
8863 set_bit(APICV_INHIBIT_REASON_DISABLE,
8864 &kvm->arch.apicv_inhibit_reasons);
8867 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8869 struct kvm_vcpu *target = NULL;
8870 struct kvm_apic_map *map;
8872 vcpu->stat.directed_yield_attempted++;
8874 if (single_task_running())
8878 map = rcu_dereference(vcpu->kvm->arch.apic_map);
8880 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8881 target = map->phys_map[dest_id]->vcpu;
8885 if (!target || !READ_ONCE(target->ready))
8888 /* Ignore requests to yield to self */
8892 if (kvm_vcpu_yield_to(target) <= 0)
8895 vcpu->stat.directed_yield_successful++;
8901 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8903 u64 ret = vcpu->run->hypercall.ret;
8905 if (!is_64_bit_mode(vcpu))
8907 kvm_rax_write(vcpu, ret);
8908 ++vcpu->stat.hypercalls;
8909 return kvm_skip_emulated_instruction(vcpu);
8912 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8914 unsigned long nr, a0, a1, a2, a3, ret;
8917 if (kvm_xen_hypercall_enabled(vcpu->kvm))
8918 return kvm_xen_hypercall(vcpu);
8920 if (kvm_hv_hypercall_enabled(vcpu))
8921 return kvm_hv_hypercall(vcpu);
8923 nr = kvm_rax_read(vcpu);
8924 a0 = kvm_rbx_read(vcpu);
8925 a1 = kvm_rcx_read(vcpu);
8926 a2 = kvm_rdx_read(vcpu);
8927 a3 = kvm_rsi_read(vcpu);
8929 trace_kvm_hypercall(nr, a0, a1, a2, a3);
8931 op_64_bit = is_64_bit_hypercall(vcpu);
8940 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8948 case KVM_HC_VAPIC_POLL_IRQ:
8951 case KVM_HC_KICK_CPU:
8952 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8955 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8956 kvm_sched_yield(vcpu, a1);
8959 #ifdef CONFIG_X86_64
8960 case KVM_HC_CLOCK_PAIRING:
8961 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8964 case KVM_HC_SEND_IPI:
8965 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8968 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8970 case KVM_HC_SCHED_YIELD:
8971 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8974 kvm_sched_yield(vcpu, a0);
8977 case KVM_HC_MAP_GPA_RANGE: {
8978 u64 gpa = a0, npages = a1, attrs = a2;
8981 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8984 if (!PAGE_ALIGNED(gpa) || !npages ||
8985 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8990 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
8991 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
8992 vcpu->run->hypercall.args[0] = gpa;
8993 vcpu->run->hypercall.args[1] = npages;
8994 vcpu->run->hypercall.args[2] = attrs;
8995 vcpu->run->hypercall.longmode = op_64_bit;
8996 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9006 kvm_rax_write(vcpu, ret);
9008 ++vcpu->stat.hypercalls;
9009 return kvm_skip_emulated_instruction(vcpu);
9011 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9013 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9015 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9016 char instruction[3];
9017 unsigned long rip = kvm_rip_read(vcpu);
9019 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9021 return emulator_write_emulated(ctxt, rip, instruction, 3,
9025 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9027 return vcpu->run->request_interrupt_window &&
9028 likely(!pic_in_kernel(vcpu->kvm));
9031 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9033 struct kvm_run *kvm_run = vcpu->run;
9035 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9036 kvm_run->cr8 = kvm_get_cr8(vcpu);
9037 kvm_run->apic_base = kvm_get_apic_base(vcpu);
9040 * The call to kvm_ready_for_interrupt_injection() may end up in
9041 * kvm_xen_has_interrupt() which may require the srcu lock to be
9042 * held, to protect against changes in the vcpu_info address.
9044 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9045 kvm_run->ready_for_interrupt_injection =
9046 pic_in_kernel(vcpu->kvm) ||
9047 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9048 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9051 kvm_run->flags |= KVM_RUN_X86_SMM;
9054 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9058 if (!kvm_x86_ops.update_cr8_intercept)
9061 if (!lapic_in_kernel(vcpu))
9064 if (vcpu->arch.apicv_active)
9067 if (!vcpu->arch.apic->vapic_addr)
9068 max_irr = kvm_lapic_find_highest_irr(vcpu);
9075 tpr = kvm_lapic_get_cr8(vcpu);
9077 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9081 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9083 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9084 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9088 return kvm_x86_ops.nested_ops->check_events(vcpu);
9091 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9093 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9094 vcpu->arch.exception.has_error_code,
9095 vcpu->arch.exception.error_code,
9096 vcpu->arch.exception.injected);
9098 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9099 vcpu->arch.exception.error_code = false;
9100 static_call(kvm_x86_queue_exception)(vcpu);
9103 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9106 bool can_inject = true;
9108 /* try to reinject previous events if any */
9110 if (vcpu->arch.exception.injected) {
9111 kvm_inject_exception(vcpu);
9115 * Do not inject an NMI or interrupt if there is a pending
9116 * exception. Exceptions and interrupts are recognized at
9117 * instruction boundaries, i.e. the start of an instruction.
9118 * Trap-like exceptions, e.g. #DB, have higher priority than
9119 * NMIs and interrupts, i.e. traps are recognized before an
9120 * NMI/interrupt that's pending on the same instruction.
9121 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9122 * priority, but are only generated (pended) during instruction
9123 * execution, i.e. a pending fault-like exception means the
9124 * fault occurred on the *previous* instruction and must be
9125 * serviced prior to recognizing any new events in order to
9126 * fully complete the previous instruction.
9128 else if (!vcpu->arch.exception.pending) {
9129 if (vcpu->arch.nmi_injected) {
9130 static_call(kvm_x86_set_nmi)(vcpu);
9132 } else if (vcpu->arch.interrupt.injected) {
9133 static_call(kvm_x86_set_irq)(vcpu);
9138 WARN_ON_ONCE(vcpu->arch.exception.injected &&
9139 vcpu->arch.exception.pending);
9142 * Call check_nested_events() even if we reinjected a previous event
9143 * in order for caller to determine if it should require immediate-exit
9144 * from L2 to L1 due to pending L1 events which require exit
9147 if (is_guest_mode(vcpu)) {
9148 r = kvm_check_nested_events(vcpu);
9153 /* try to inject new event if pending */
9154 if (vcpu->arch.exception.pending) {
9156 * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
9157 * value pushed on the stack. Trap-like exception and all #DBs
9158 * leave RF as-is (KVM follows Intel's behavior in this regard;
9159 * AMD states that code breakpoint #DBs excplitly clear RF=0).
9161 * Note, most versions of Intel's SDM and AMD's APM incorrectly
9162 * describe the behavior of General Detect #DBs, which are
9163 * fault-like. They do _not_ set RF, a la code breakpoints.
9165 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9166 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9169 if (vcpu->arch.exception.nr == DB_VECTOR) {
9170 kvm_deliver_exception_payload(vcpu);
9171 if (vcpu->arch.dr7 & DR7_GD) {
9172 vcpu->arch.dr7 &= ~DR7_GD;
9173 kvm_update_dr7(vcpu);
9177 kvm_inject_exception(vcpu);
9179 vcpu->arch.exception.pending = false;
9180 vcpu->arch.exception.injected = true;
9185 /* Don't inject interrupts if the user asked to avoid doing so */
9186 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9190 * Finally, inject interrupt events. If an event cannot be injected
9191 * due to architectural conditions (e.g. IF=0) a window-open exit
9192 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9193 * and can architecturally be injected, but we cannot do it right now:
9194 * an interrupt could have arrived just now and we have to inject it
9195 * as a vmexit, or there could already an event in the queue, which is
9196 * indicated by can_inject. In that case we request an immediate exit
9197 * in order to make progress and get back here for another iteration.
9198 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9200 if (vcpu->arch.smi_pending) {
9201 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9205 vcpu->arch.smi_pending = false;
9206 ++vcpu->arch.smi_count;
9210 static_call(kvm_x86_enable_smi_window)(vcpu);
9213 if (vcpu->arch.nmi_pending) {
9214 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9218 --vcpu->arch.nmi_pending;
9219 vcpu->arch.nmi_injected = true;
9220 static_call(kvm_x86_set_nmi)(vcpu);
9222 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9224 if (vcpu->arch.nmi_pending)
9225 static_call(kvm_x86_enable_nmi_window)(vcpu);
9228 if (kvm_cpu_has_injectable_intr(vcpu)) {
9229 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9233 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9234 static_call(kvm_x86_set_irq)(vcpu);
9235 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9237 if (kvm_cpu_has_injectable_intr(vcpu))
9238 static_call(kvm_x86_enable_irq_window)(vcpu);
9241 if (is_guest_mode(vcpu) &&
9242 kvm_x86_ops.nested_ops->hv_timer_pending &&
9243 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9244 *req_immediate_exit = true;
9246 WARN_ON(vcpu->arch.exception.pending);
9251 *req_immediate_exit = true;
9257 static void process_nmi(struct kvm_vcpu *vcpu)
9262 * x86 is limited to one NMI running, and one NMI pending after it.
9263 * If an NMI is already in progress, limit further NMIs to just one.
9264 * Otherwise, allow two (and we'll inject the first one immediately).
9266 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9269 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9270 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9271 kvm_make_request(KVM_REQ_EVENT, vcpu);
9274 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9277 flags |= seg->g << 23;
9278 flags |= seg->db << 22;
9279 flags |= seg->l << 21;
9280 flags |= seg->avl << 20;
9281 flags |= seg->present << 15;
9282 flags |= seg->dpl << 13;
9283 flags |= seg->s << 12;
9284 flags |= seg->type << 8;
9288 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9290 struct kvm_segment seg;
9293 kvm_get_segment(vcpu, &seg, n);
9294 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9297 offset = 0x7f84 + n * 12;
9299 offset = 0x7f2c + (n - 3) * 12;
9301 put_smstate(u32, buf, offset + 8, seg.base);
9302 put_smstate(u32, buf, offset + 4, seg.limit);
9303 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9306 #ifdef CONFIG_X86_64
9307 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9309 struct kvm_segment seg;
9313 kvm_get_segment(vcpu, &seg, n);
9314 offset = 0x7e00 + n * 16;
9316 flags = enter_smm_get_segment_flags(&seg) >> 8;
9317 put_smstate(u16, buf, offset, seg.selector);
9318 put_smstate(u16, buf, offset + 2, flags);
9319 put_smstate(u32, buf, offset + 4, seg.limit);
9320 put_smstate(u64, buf, offset + 8, seg.base);
9324 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9327 struct kvm_segment seg;
9331 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9332 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9333 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9334 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9336 for (i = 0; i < 8; i++)
9337 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9339 kvm_get_dr(vcpu, 6, &val);
9340 put_smstate(u32, buf, 0x7fcc, (u32)val);
9341 kvm_get_dr(vcpu, 7, &val);
9342 put_smstate(u32, buf, 0x7fc8, (u32)val);
9344 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9345 put_smstate(u32, buf, 0x7fc4, seg.selector);
9346 put_smstate(u32, buf, 0x7f64, seg.base);
9347 put_smstate(u32, buf, 0x7f60, seg.limit);
9348 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9350 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9351 put_smstate(u32, buf, 0x7fc0, seg.selector);
9352 put_smstate(u32, buf, 0x7f80, seg.base);
9353 put_smstate(u32, buf, 0x7f7c, seg.limit);
9354 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9356 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9357 put_smstate(u32, buf, 0x7f74, dt.address);
9358 put_smstate(u32, buf, 0x7f70, dt.size);
9360 static_call(kvm_x86_get_idt)(vcpu, &dt);
9361 put_smstate(u32, buf, 0x7f58, dt.address);
9362 put_smstate(u32, buf, 0x7f54, dt.size);
9364 for (i = 0; i < 6; i++)
9365 enter_smm_save_seg_32(vcpu, buf, i);
9367 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9370 put_smstate(u32, buf, 0x7efc, 0x00020000);
9371 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9374 #ifdef CONFIG_X86_64
9375 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9378 struct kvm_segment seg;
9382 for (i = 0; i < 16; i++)
9383 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9385 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9386 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9388 kvm_get_dr(vcpu, 6, &val);
9389 put_smstate(u64, buf, 0x7f68, val);
9390 kvm_get_dr(vcpu, 7, &val);
9391 put_smstate(u64, buf, 0x7f60, val);
9393 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9394 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9395 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9397 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9400 put_smstate(u32, buf, 0x7efc, 0x00020064);
9402 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9404 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9405 put_smstate(u16, buf, 0x7e90, seg.selector);
9406 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9407 put_smstate(u32, buf, 0x7e94, seg.limit);
9408 put_smstate(u64, buf, 0x7e98, seg.base);
9410 static_call(kvm_x86_get_idt)(vcpu, &dt);
9411 put_smstate(u32, buf, 0x7e84, dt.size);
9412 put_smstate(u64, buf, 0x7e88, dt.address);
9414 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9415 put_smstate(u16, buf, 0x7e70, seg.selector);
9416 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9417 put_smstate(u32, buf, 0x7e74, seg.limit);
9418 put_smstate(u64, buf, 0x7e78, seg.base);
9420 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9421 put_smstate(u32, buf, 0x7e64, dt.size);
9422 put_smstate(u64, buf, 0x7e68, dt.address);
9424 for (i = 0; i < 6; i++)
9425 enter_smm_save_seg_64(vcpu, buf, i);
9429 static void enter_smm(struct kvm_vcpu *vcpu)
9431 struct kvm_segment cs, ds;
9436 memset(buf, 0, 512);
9437 #ifdef CONFIG_X86_64
9438 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9439 enter_smm_save_state_64(vcpu, buf);
9442 enter_smm_save_state_32(vcpu, buf);
9445 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9446 * state (e.g. leave guest mode) after we've saved the state into the
9447 * SMM state-save area.
9449 static_call(kvm_x86_enter_smm)(vcpu, buf);
9451 kvm_smm_changed(vcpu, true);
9452 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9454 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9455 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9457 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9459 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9460 kvm_rip_write(vcpu, 0x8000);
9462 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9463 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9464 vcpu->arch.cr0 = cr0;
9466 static_call(kvm_x86_set_cr4)(vcpu, 0);
9468 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9469 dt.address = dt.size = 0;
9470 static_call(kvm_x86_set_idt)(vcpu, &dt);
9472 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9474 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9475 cs.base = vcpu->arch.smbase;
9480 cs.limit = ds.limit = 0xffffffff;
9481 cs.type = ds.type = 0x3;
9482 cs.dpl = ds.dpl = 0;
9487 cs.avl = ds.avl = 0;
9488 cs.present = ds.present = 1;
9489 cs.unusable = ds.unusable = 0;
9490 cs.padding = ds.padding = 0;
9492 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9493 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9494 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9495 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9496 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9497 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9499 #ifdef CONFIG_X86_64
9500 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9501 static_call(kvm_x86_set_efer)(vcpu, 0);
9504 kvm_update_cpuid_runtime(vcpu);
9505 kvm_mmu_reset_context(vcpu);
9508 static void process_smi(struct kvm_vcpu *vcpu)
9510 vcpu->arch.smi_pending = true;
9511 kvm_make_request(KVM_REQ_EVENT, vcpu);
9514 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9515 unsigned long *vcpu_bitmap)
9519 zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9521 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9522 NULL, vcpu_bitmap, cpus);
9524 free_cpumask_var(cpus);
9527 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9529 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9532 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9536 if (!lapic_in_kernel(vcpu))
9539 mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9541 activate = kvm_apicv_activated(vcpu->kvm);
9542 if (vcpu->arch.apicv_active == activate)
9545 vcpu->arch.apicv_active = activate;
9546 kvm_apic_update_apicv(vcpu);
9547 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9550 * When APICv gets disabled, we may still have injected interrupts
9551 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9552 * still active when the interrupt got accepted. Make sure
9553 * inject_pending_event() is called to check for that.
9555 if (!vcpu->arch.apicv_active)
9556 kvm_make_request(KVM_REQ_EVENT, vcpu);
9559 mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9561 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9563 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9565 unsigned long old, new;
9567 if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9568 !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9571 old = new = kvm->arch.apicv_inhibit_reasons;
9574 __clear_bit(bit, &new);
9576 __set_bit(bit, &new);
9578 if (!!old != !!new) {
9579 trace_kvm_apicv_update_request(activate, bit);
9580 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9581 kvm->arch.apicv_inhibit_reasons = new;
9583 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9584 kvm_zap_gfn_range(kvm, gfn, gfn+1);
9587 kvm->arch.apicv_inhibit_reasons = new;
9589 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9591 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9593 mutex_lock(&kvm->arch.apicv_update_lock);
9594 __kvm_request_apicv_update(kvm, activate, bit);
9595 mutex_unlock(&kvm->arch.apicv_update_lock);
9597 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9599 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9601 if (!kvm_apic_present(vcpu))
9604 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9606 if (irqchip_split(vcpu->kvm))
9607 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9609 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9610 if (ioapic_in_kernel(vcpu->kvm))
9611 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9614 if (is_guest_mode(vcpu))
9615 vcpu->arch.load_eoi_exitmap_pending = true;
9617 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9620 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9622 u64 eoi_exit_bitmap[4];
9624 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9627 if (to_hv_vcpu(vcpu)) {
9628 bitmap_or((ulong *)eoi_exit_bitmap,
9629 vcpu->arch.ioapic_handled_vectors,
9630 to_hv_synic(vcpu)->vec_bitmap, 256);
9631 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9635 static_call(kvm_x86_load_eoi_exitmap)(
9636 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9639 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9640 unsigned long start, unsigned long end)
9642 unsigned long apic_address;
9645 * The physical address of apic access page is stored in the VMCS.
9646 * Update it when it becomes invalid.
9648 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9649 if (start <= apic_address && apic_address < end)
9650 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9653 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
9655 static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
9658 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9660 if (!lapic_in_kernel(vcpu))
9663 if (!kvm_x86_ops.set_apic_access_page_addr)
9666 static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9669 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9671 smp_send_reschedule(vcpu->cpu);
9673 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9676 * Returns 1 to let vcpu_run() continue the guest execution loop without
9677 * exiting to the userspace. Otherwise, the value will be returned to the
9680 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9684 dm_request_for_irq_injection(vcpu) &&
9685 kvm_cpu_accept_dm_intr(vcpu);
9686 fastpath_t exit_fastpath;
9688 bool req_immediate_exit = false;
9690 /* Forbid vmenter if vcpu dirty ring is soft-full */
9691 if (unlikely(vcpu->kvm->dirty_ring_size &&
9692 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9693 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9694 trace_kvm_dirty_ring_exit(vcpu);
9699 if (kvm_request_pending(vcpu)) {
9700 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9704 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9705 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9710 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9711 kvm_mmu_unload(vcpu);
9712 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9713 __kvm_migrate_timers(vcpu);
9714 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9715 kvm_gen_update_masterclock(vcpu->kvm);
9716 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9717 kvm_gen_kvmclock_update(vcpu);
9718 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9719 r = kvm_guest_time_update(vcpu);
9723 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9724 kvm_mmu_sync_roots(vcpu);
9725 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9726 kvm_mmu_load_pgd(vcpu);
9727 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9728 kvm_vcpu_flush_tlb_all(vcpu);
9730 /* Flushing all ASIDs flushes the current ASID... */
9731 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9733 kvm_service_local_tlb_flush_requests(vcpu);
9735 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9736 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9740 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9741 if (is_guest_mode(vcpu)) {
9742 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9744 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9745 vcpu->mmio_needed = 0;
9750 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9751 /* Page is swapped out. Do synthetic halt */
9752 vcpu->arch.apf.halted = true;
9756 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9757 record_steal_time(vcpu);
9758 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9760 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9762 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9763 kvm_pmu_handle_event(vcpu);
9764 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9765 kvm_pmu_deliver_pmi(vcpu);
9766 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9767 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9768 if (test_bit(vcpu->arch.pending_ioapic_eoi,
9769 vcpu->arch.ioapic_handled_vectors)) {
9770 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9771 vcpu->run->eoi.vector =
9772 vcpu->arch.pending_ioapic_eoi;
9777 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9778 vcpu_scan_ioapic(vcpu);
9779 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9780 vcpu_load_eoi_exitmap(vcpu);
9781 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9782 kvm_vcpu_reload_apic_access_page(vcpu);
9783 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9784 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9785 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9789 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9790 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9791 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9795 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9796 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9798 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9799 vcpu->run->hyperv = hv_vcpu->exit;
9805 * KVM_REQ_HV_STIMER has to be processed after
9806 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9807 * depend on the guest clock being up-to-date
9809 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9810 kvm_hv_process_stimers(vcpu);
9811 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9812 kvm_vcpu_update_apicv(vcpu);
9813 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9814 kvm_check_async_pf_completion(vcpu);
9815 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9816 static_call(kvm_x86_msr_filter_changed)(vcpu);
9818 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9819 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9822 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9823 kvm_xen_has_interrupt(vcpu)) {
9824 ++vcpu->stat.req_event;
9825 r = kvm_apic_accept_events(vcpu);
9830 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9835 r = inject_pending_event(vcpu, &req_immediate_exit);
9841 static_call(kvm_x86_enable_irq_window)(vcpu);
9843 if (kvm_lapic_enabled(vcpu)) {
9844 update_cr8_intercept(vcpu);
9845 kvm_lapic_sync_to_vapic(vcpu);
9849 r = kvm_mmu_reload(vcpu);
9851 goto cancel_injection;
9856 static_call(kvm_x86_prepare_guest_switch)(vcpu);
9859 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9860 * IPI are then delayed after guest entry, which ensures that they
9861 * result in virtual interrupt delivery.
9863 local_irq_disable();
9864 vcpu->mode = IN_GUEST_MODE;
9866 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9869 * 1) We should set ->mode before checking ->requests. Please see
9870 * the comment in kvm_vcpu_exiting_guest_mode().
9872 * 2) For APICv, we should set ->mode before checking PID.ON. This
9873 * pairs with the memory barrier implicit in pi_test_and_set_on
9874 * (see vmx_deliver_posted_interrupt).
9876 * 3) This also orders the write to mode from any reads to the page
9877 * tables done while the VCPU is running. Please see the comment
9878 * in kvm_flush_remote_tlbs.
9880 smp_mb__after_srcu_read_unlock();
9883 * This handles the case where a posted interrupt was
9884 * notified with kvm_vcpu_kick. Assigned devices can
9885 * use the POSTED_INTR_VECTOR even if APICv is disabled,
9886 * so do it even if APICv is disabled on this vCPU.
9888 if (kvm_lapic_enabled(vcpu))
9889 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9891 if (kvm_vcpu_exit_request(vcpu)) {
9892 vcpu->mode = OUTSIDE_GUEST_MODE;
9896 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9898 goto cancel_injection;
9901 if (req_immediate_exit) {
9902 kvm_make_request(KVM_REQ_EVENT, vcpu);
9903 static_call(kvm_x86_request_immediate_exit)(vcpu);
9906 fpregs_assert_state_consistent();
9907 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9908 switch_fpu_return();
9910 if (unlikely(vcpu->arch.switch_db_regs)) {
9912 set_debugreg(vcpu->arch.eff_db[0], 0);
9913 set_debugreg(vcpu->arch.eff_db[1], 1);
9914 set_debugreg(vcpu->arch.eff_db[2], 2);
9915 set_debugreg(vcpu->arch.eff_db[3], 3);
9916 } else if (unlikely(hw_breakpoint_active())) {
9921 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9922 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9925 if (kvm_lapic_enabled(vcpu))
9926 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9928 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9929 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9935 * Do this here before restoring debug registers on the host. And
9936 * since we do this before handling the vmexit, a DR access vmexit
9937 * can (a) read the correct value of the debug registers, (b) set
9938 * KVM_DEBUGREG_WONT_EXIT again.
9940 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9941 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9942 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9943 kvm_update_dr0123(vcpu);
9944 kvm_update_dr7(vcpu);
9948 * If the guest has used debug registers, at least dr7
9949 * will be disabled while returning to the host.
9950 * If we don't have active breakpoints in the host, we don't
9951 * care about the messed up debug address registers. But if
9952 * we have some of them active, restore the old state.
9954 if (hw_breakpoint_active())
9955 hw_breakpoint_restore();
9957 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9958 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9960 vcpu->mode = OUTSIDE_GUEST_MODE;
9963 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9966 * Consume any pending interrupts, including the possible source of
9967 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9968 * An instruction is required after local_irq_enable() to fully unblock
9969 * interrupts on processors that implement an interrupt shadow, the
9970 * stat.exits increment will do nicely.
9972 kvm_before_interrupt(vcpu);
9975 local_irq_disable();
9976 kvm_after_interrupt(vcpu);
9979 * Wait until after servicing IRQs to account guest time so that any
9980 * ticks that occurred while running the guest are properly accounted
9981 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9982 * of accounting via context tracking, but the loss of accuracy is
9983 * acceptable for all known use cases.
9985 vtime_account_guest_exit();
9987 if (lapic_in_kernel(vcpu)) {
9988 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9989 if (delta != S64_MIN) {
9990 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9991 vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9998 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10001 * Profile KVM exit RIPs:
10003 if (unlikely(prof_on == KVM_PROFILING)) {
10004 unsigned long rip = kvm_rip_read(vcpu);
10005 profile_hit(KVM_PROFILING, (void *)rip);
10008 if (unlikely(vcpu->arch.tsc_always_catchup))
10009 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10011 if (vcpu->arch.apic_attention)
10012 kvm_lapic_sync_from_vapic(vcpu);
10014 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10018 if (req_immediate_exit)
10019 kvm_make_request(KVM_REQ_EVENT, vcpu);
10020 static_call(kvm_x86_cancel_injection)(vcpu);
10021 if (unlikely(vcpu->arch.apic_attention))
10022 kvm_lapic_sync_from_vapic(vcpu);
10027 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10029 if (!kvm_arch_vcpu_runnable(vcpu) &&
10030 (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
10031 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10032 kvm_vcpu_block(vcpu);
10033 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10035 if (kvm_x86_ops.post_block)
10036 static_call(kvm_x86_post_block)(vcpu);
10038 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10042 if (kvm_apic_accept_events(vcpu) < 0)
10044 switch(vcpu->arch.mp_state) {
10045 case KVM_MP_STATE_HALTED:
10046 case KVM_MP_STATE_AP_RESET_HOLD:
10047 vcpu->arch.pv.pv_unhalted = false;
10048 vcpu->arch.mp_state =
10049 KVM_MP_STATE_RUNNABLE;
10051 case KVM_MP_STATE_RUNNABLE:
10052 vcpu->arch.apf.halted = false;
10054 case KVM_MP_STATE_INIT_RECEIVED:
10062 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10064 if (is_guest_mode(vcpu))
10065 kvm_check_nested_events(vcpu);
10067 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10068 !vcpu->arch.apf.halted);
10071 static int vcpu_run(struct kvm_vcpu *vcpu)
10074 struct kvm *kvm = vcpu->kvm;
10076 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10077 vcpu->arch.l1tf_flush_l1d = true;
10081 * If another guest vCPU requests a PV TLB flush in the middle
10082 * of instruction emulation, the rest of the emulation could
10083 * use a stale page translation. Assume that any code after
10084 * this point can start executing an instruction.
10086 vcpu->arch.at_instruction_boundary = false;
10087 if (kvm_vcpu_running(vcpu)) {
10088 r = vcpu_enter_guest(vcpu);
10090 r = vcpu_block(kvm, vcpu);
10096 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10097 if (kvm_cpu_has_pending_timer(vcpu))
10098 kvm_inject_pending_timer_irqs(vcpu);
10100 if (dm_request_for_irq_injection(vcpu) &&
10101 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10103 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10104 ++vcpu->stat.request_irq_exits;
10108 if (__xfer_to_guest_mode_work_pending()) {
10109 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10110 r = xfer_to_guest_mode_handle_work(vcpu);
10113 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10117 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10122 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10126 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10127 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10128 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10132 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10134 BUG_ON(!vcpu->arch.pio.count);
10136 return complete_emulated_io(vcpu);
10140 * Implements the following, as a state machine:
10143 * for each fragment
10144 * for each mmio piece in the fragment
10151 * for each fragment
10152 * for each mmio piece in the fragment
10157 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10159 struct kvm_run *run = vcpu->run;
10160 struct kvm_mmio_fragment *frag;
10163 BUG_ON(!vcpu->mmio_needed);
10165 /* Complete previous fragment */
10166 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10167 len = min(8u, frag->len);
10168 if (!vcpu->mmio_is_write)
10169 memcpy(frag->data, run->mmio.data, len);
10171 if (frag->len <= 8) {
10172 /* Switch to the next fragment. */
10174 vcpu->mmio_cur_fragment++;
10176 /* Go forward to the next mmio piece. */
10182 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10183 vcpu->mmio_needed = 0;
10185 /* FIXME: return into emulator if single-stepping. */
10186 if (vcpu->mmio_is_write)
10188 vcpu->mmio_read_completed = 1;
10189 return complete_emulated_io(vcpu);
10192 run->exit_reason = KVM_EXIT_MMIO;
10193 run->mmio.phys_addr = frag->gpa;
10194 if (vcpu->mmio_is_write)
10195 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10196 run->mmio.len = min(8u, frag->len);
10197 run->mmio.is_write = vcpu->mmio_is_write;
10198 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10202 static void kvm_save_current_fpu(struct fpu *fpu)
10205 * If the target FPU state is not resident in the CPU registers, just
10206 * memcpy() from current, else save CPU state directly to the target.
10208 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10209 memcpy(&fpu->state, ¤t->thread.fpu.state,
10210 fpu_kernel_xstate_size);
10212 save_fpregs_to_fpstate(fpu);
10215 /* Swap (qemu) user FPU context for the guest FPU context. */
10216 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10220 kvm_save_current_fpu(vcpu->arch.user_fpu);
10223 * Guests with protected state can't have it set by the hypervisor,
10224 * so skip trying to set it.
10226 if (vcpu->arch.guest_fpu)
10227 /* PKRU is separately restored in kvm_x86_ops.run. */
10228 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
10229 ~XFEATURE_MASK_PKRU);
10231 fpregs_mark_activate();
10237 /* When vcpu_run ends, restore user space FPU context. */
10238 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10243 * Guests with protected state can't have it read by the hypervisor,
10244 * so skip trying to save it.
10246 if (vcpu->arch.guest_fpu)
10247 kvm_save_current_fpu(vcpu->arch.guest_fpu);
10249 restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
10251 fpregs_mark_activate();
10254 ++vcpu->stat.fpu_reload;
10258 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10260 struct kvm_run *kvm_run = vcpu->run;
10264 kvm_sigset_activate(vcpu);
10265 kvm_run->flags = 0;
10266 kvm_load_guest_fpu(vcpu);
10268 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10269 if (kvm_run->immediate_exit) {
10273 kvm_vcpu_block(vcpu);
10274 if (kvm_apic_accept_events(vcpu) < 0) {
10278 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10280 if (signal_pending(current)) {
10282 kvm_run->exit_reason = KVM_EXIT_INTR;
10283 ++vcpu->stat.signal_exits;
10288 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10289 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10294 if (kvm_run->kvm_dirty_regs) {
10295 r = sync_regs(vcpu);
10300 /* re-sync apic's tpr */
10301 if (!lapic_in_kernel(vcpu)) {
10302 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10308 if (unlikely(vcpu->arch.complete_userspace_io)) {
10309 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10310 vcpu->arch.complete_userspace_io = NULL;
10315 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10317 if (kvm_run->immediate_exit)
10320 r = vcpu_run(vcpu);
10323 kvm_put_guest_fpu(vcpu);
10324 if (kvm_run->kvm_valid_regs)
10326 post_kvm_run_save(vcpu);
10327 kvm_sigset_deactivate(vcpu);
10333 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10335 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10337 * We are here if userspace calls get_regs() in the middle of
10338 * instruction emulation. Registers state needs to be copied
10339 * back from emulation context to vcpu. Userspace shouldn't do
10340 * that usually, but some bad designed PV devices (vmware
10341 * backdoor interface) need this to work
10343 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10344 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10346 regs->rax = kvm_rax_read(vcpu);
10347 regs->rbx = kvm_rbx_read(vcpu);
10348 regs->rcx = kvm_rcx_read(vcpu);
10349 regs->rdx = kvm_rdx_read(vcpu);
10350 regs->rsi = kvm_rsi_read(vcpu);
10351 regs->rdi = kvm_rdi_read(vcpu);
10352 regs->rsp = kvm_rsp_read(vcpu);
10353 regs->rbp = kvm_rbp_read(vcpu);
10354 #ifdef CONFIG_X86_64
10355 regs->r8 = kvm_r8_read(vcpu);
10356 regs->r9 = kvm_r9_read(vcpu);
10357 regs->r10 = kvm_r10_read(vcpu);
10358 regs->r11 = kvm_r11_read(vcpu);
10359 regs->r12 = kvm_r12_read(vcpu);
10360 regs->r13 = kvm_r13_read(vcpu);
10361 regs->r14 = kvm_r14_read(vcpu);
10362 regs->r15 = kvm_r15_read(vcpu);
10365 regs->rip = kvm_rip_read(vcpu);
10366 regs->rflags = kvm_get_rflags(vcpu);
10369 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10372 __get_regs(vcpu, regs);
10377 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10379 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10380 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10382 kvm_rax_write(vcpu, regs->rax);
10383 kvm_rbx_write(vcpu, regs->rbx);
10384 kvm_rcx_write(vcpu, regs->rcx);
10385 kvm_rdx_write(vcpu, regs->rdx);
10386 kvm_rsi_write(vcpu, regs->rsi);
10387 kvm_rdi_write(vcpu, regs->rdi);
10388 kvm_rsp_write(vcpu, regs->rsp);
10389 kvm_rbp_write(vcpu, regs->rbp);
10390 #ifdef CONFIG_X86_64
10391 kvm_r8_write(vcpu, regs->r8);
10392 kvm_r9_write(vcpu, regs->r9);
10393 kvm_r10_write(vcpu, regs->r10);
10394 kvm_r11_write(vcpu, regs->r11);
10395 kvm_r12_write(vcpu, regs->r12);
10396 kvm_r13_write(vcpu, regs->r13);
10397 kvm_r14_write(vcpu, regs->r14);
10398 kvm_r15_write(vcpu, regs->r15);
10401 kvm_rip_write(vcpu, regs->rip);
10402 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10404 vcpu->arch.exception.pending = false;
10406 kvm_make_request(KVM_REQ_EVENT, vcpu);
10409 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10412 __set_regs(vcpu, regs);
10417 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10419 struct kvm_segment cs;
10421 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10425 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10427 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10429 struct desc_ptr dt;
10431 if (vcpu->arch.guest_state_protected)
10432 goto skip_protected_regs;
10434 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10435 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10436 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10437 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10438 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10439 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10441 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10442 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10444 static_call(kvm_x86_get_idt)(vcpu, &dt);
10445 sregs->idt.limit = dt.size;
10446 sregs->idt.base = dt.address;
10447 static_call(kvm_x86_get_gdt)(vcpu, &dt);
10448 sregs->gdt.limit = dt.size;
10449 sregs->gdt.base = dt.address;
10451 sregs->cr2 = vcpu->arch.cr2;
10452 sregs->cr3 = kvm_read_cr3(vcpu);
10454 skip_protected_regs:
10455 sregs->cr0 = kvm_read_cr0(vcpu);
10456 sregs->cr4 = kvm_read_cr4(vcpu);
10457 sregs->cr8 = kvm_get_cr8(vcpu);
10458 sregs->efer = vcpu->arch.efer;
10459 sregs->apic_base = kvm_get_apic_base(vcpu);
10462 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10464 __get_sregs_common(vcpu, sregs);
10466 if (vcpu->arch.guest_state_protected)
10469 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10470 set_bit(vcpu->arch.interrupt.nr,
10471 (unsigned long *)sregs->interrupt_bitmap);
10474 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10478 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10480 if (vcpu->arch.guest_state_protected)
10483 if (is_pae_paging(vcpu)) {
10484 for (i = 0 ; i < 4 ; i++)
10485 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10486 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10490 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10491 struct kvm_sregs *sregs)
10494 __get_sregs(vcpu, sregs);
10499 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10500 struct kvm_mp_state *mp_state)
10505 if (kvm_mpx_supported())
10506 kvm_load_guest_fpu(vcpu);
10508 r = kvm_apic_accept_events(vcpu);
10513 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10514 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10515 vcpu->arch.pv.pv_unhalted)
10516 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10518 mp_state->mp_state = vcpu->arch.mp_state;
10521 if (kvm_mpx_supported())
10522 kvm_put_guest_fpu(vcpu);
10527 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10528 struct kvm_mp_state *mp_state)
10534 if (!lapic_in_kernel(vcpu) &&
10535 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10539 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10540 * INIT state; latched init should be reported using
10541 * KVM_SET_VCPU_EVENTS, so reject it here.
10543 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10544 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10545 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10548 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10549 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10550 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10552 vcpu->arch.mp_state = mp_state->mp_state;
10553 kvm_make_request(KVM_REQ_EVENT, vcpu);
10561 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10562 int reason, bool has_error_code, u32 error_code)
10564 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10567 init_emulate_ctxt(vcpu);
10569 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10570 has_error_code, error_code);
10572 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10573 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10574 vcpu->run->internal.ndata = 0;
10578 kvm_rip_write(vcpu, ctxt->eip);
10579 kvm_set_rflags(vcpu, ctxt->eflags);
10582 EXPORT_SYMBOL_GPL(kvm_task_switch);
10584 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10586 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10588 * When EFER.LME and CR0.PG are set, the processor is in
10589 * 64-bit mode (though maybe in a 32-bit code segment).
10590 * CR4.PAE and EFER.LMA must be set.
10592 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10594 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10598 * Not in 64-bit mode: EFER.LMA is clear and the code
10599 * segment cannot be 64-bit.
10601 if (sregs->efer & EFER_LMA || sregs->cs.l)
10605 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10608 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10609 int *mmu_reset_needed, bool update_pdptrs)
10611 struct msr_data apic_base_msr;
10613 struct desc_ptr dt;
10615 if (!kvm_is_valid_sregs(vcpu, sregs))
10618 apic_base_msr.data = sregs->apic_base;
10619 apic_base_msr.host_initiated = true;
10620 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10623 if (vcpu->arch.guest_state_protected)
10626 dt.size = sregs->idt.limit;
10627 dt.address = sregs->idt.base;
10628 static_call(kvm_x86_set_idt)(vcpu, &dt);
10629 dt.size = sregs->gdt.limit;
10630 dt.address = sregs->gdt.base;
10631 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10633 vcpu->arch.cr2 = sregs->cr2;
10634 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10635 vcpu->arch.cr3 = sregs->cr3;
10636 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10638 kvm_set_cr8(vcpu, sregs->cr8);
10640 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10641 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10643 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10644 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10645 vcpu->arch.cr0 = sregs->cr0;
10647 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10648 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10650 if (update_pdptrs) {
10651 idx = srcu_read_lock(&vcpu->kvm->srcu);
10652 if (is_pae_paging(vcpu)) {
10653 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10654 *mmu_reset_needed = 1;
10656 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10659 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10660 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10661 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10662 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10663 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10664 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10666 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10667 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10669 update_cr8_intercept(vcpu);
10671 /* Older userspace won't unhalt the vcpu on reset. */
10672 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10673 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10674 !is_protmode(vcpu))
10675 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10680 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10682 int pending_vec, max_bits;
10683 int mmu_reset_needed = 0;
10684 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10689 if (mmu_reset_needed)
10690 kvm_mmu_reset_context(vcpu);
10692 max_bits = KVM_NR_INTERRUPTS;
10693 pending_vec = find_first_bit(
10694 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10696 if (pending_vec < max_bits) {
10697 kvm_queue_interrupt(vcpu, pending_vec, false);
10698 pr_debug("Set back pending irq %d\n", pending_vec);
10699 kvm_make_request(KVM_REQ_EVENT, vcpu);
10704 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10706 int mmu_reset_needed = 0;
10707 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10708 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10709 !(sregs2->efer & EFER_LMA);
10712 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10715 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10718 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10719 &mmu_reset_needed, !valid_pdptrs);
10723 if (valid_pdptrs) {
10724 for (i = 0; i < 4 ; i++)
10725 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10727 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10728 mmu_reset_needed = 1;
10729 vcpu->arch.pdptrs_from_userspace = true;
10731 if (mmu_reset_needed)
10732 kvm_mmu_reset_context(vcpu);
10736 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10737 struct kvm_sregs *sregs)
10742 ret = __set_sregs(vcpu, sregs);
10747 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10748 struct kvm_guest_debug *dbg)
10750 unsigned long rflags;
10753 if (vcpu->arch.guest_state_protected)
10758 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10760 if (vcpu->arch.exception.pending)
10762 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10763 kvm_queue_exception(vcpu, DB_VECTOR);
10765 kvm_queue_exception(vcpu, BP_VECTOR);
10769 * Read rflags as long as potentially injected trace flags are still
10772 rflags = kvm_get_rflags(vcpu);
10774 vcpu->guest_debug = dbg->control;
10775 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10776 vcpu->guest_debug = 0;
10778 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10779 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10780 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10781 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10783 for (i = 0; i < KVM_NR_DB_REGS; i++)
10784 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10786 kvm_update_dr7(vcpu);
10788 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10789 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10792 * Trigger an rflags update that will inject or remove the trace
10795 kvm_set_rflags(vcpu, rflags);
10797 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10807 * Translate a guest virtual address to a guest physical address.
10809 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10810 struct kvm_translation *tr)
10812 unsigned long vaddr = tr->linear_address;
10818 idx = srcu_read_lock(&vcpu->kvm->srcu);
10819 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10820 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10821 tr->physical_address = gpa;
10822 tr->valid = gpa != UNMAPPED_GVA;
10830 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10832 struct fxregs_state *fxsave;
10834 if (!vcpu->arch.guest_fpu)
10839 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10840 memcpy(fpu->fpr, fxsave->st_space, 128);
10841 fpu->fcw = fxsave->cwd;
10842 fpu->fsw = fxsave->swd;
10843 fpu->ftwx = fxsave->twd;
10844 fpu->last_opcode = fxsave->fop;
10845 fpu->last_ip = fxsave->rip;
10846 fpu->last_dp = fxsave->rdp;
10847 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10853 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10855 struct fxregs_state *fxsave;
10857 if (!vcpu->arch.guest_fpu)
10862 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10864 memcpy(fxsave->st_space, fpu->fpr, 128);
10865 fxsave->cwd = fpu->fcw;
10866 fxsave->swd = fpu->fsw;
10867 fxsave->twd = fpu->ftwx;
10868 fxsave->fop = fpu->last_opcode;
10869 fxsave->rip = fpu->last_ip;
10870 fxsave->rdp = fpu->last_dp;
10871 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10877 static void store_regs(struct kvm_vcpu *vcpu)
10879 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10881 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10882 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10884 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10885 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10887 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10888 kvm_vcpu_ioctl_x86_get_vcpu_events(
10889 vcpu, &vcpu->run->s.regs.events);
10892 static int sync_regs(struct kvm_vcpu *vcpu)
10894 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10895 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10896 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10898 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10899 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10901 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10903 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10904 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10905 vcpu, &vcpu->run->s.regs.events))
10907 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10913 static void fx_init(struct kvm_vcpu *vcpu)
10915 if (!vcpu->arch.guest_fpu)
10918 fpstate_init(&vcpu->arch.guest_fpu->state);
10919 if (boot_cpu_has(X86_FEATURE_XSAVES))
10920 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10921 host_xcr0 | XSTATE_COMPACTION_ENABLED;
10924 * Ensure guest xcr0 is valid for loading
10926 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10928 vcpu->arch.cr0 |= X86_CR0_ET;
10931 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10933 if (vcpu->arch.guest_fpu) {
10934 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10935 vcpu->arch.guest_fpu = NULL;
10938 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10940 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10942 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10943 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10944 "guest TSC will not be reliable\n");
10949 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10954 vcpu->arch.last_vmentry_cpu = -1;
10955 vcpu->arch.regs_avail = ~0;
10956 vcpu->arch.regs_dirty = ~0;
10958 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10959 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10961 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10963 r = kvm_mmu_create(vcpu);
10967 if (irqchip_in_kernel(vcpu->kvm)) {
10968 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10970 goto fail_mmu_destroy;
10973 * Defer evaluating inhibits until the vCPU is first run, as
10974 * this vCPU will not get notified of any changes until this
10975 * vCPU is visible to other vCPUs (marked online and added to
10976 * the set of vCPUs). Opportunistically mark APICv active as
10977 * VMX in particularly is highly unlikely to have inhibits.
10978 * Ignore the current per-VM APICv state so that vCPU creation
10979 * is guaranteed to run with a deterministic value, the request
10980 * will ensure the vCPU gets the correct state before VM-Entry.
10982 if (enable_apicv) {
10983 vcpu->arch.apicv_active = true;
10984 kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
10987 static_branch_inc(&kvm_has_noapic_vcpu);
10991 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10993 goto fail_free_lapic;
10994 vcpu->arch.pio_data = page_address(page);
10996 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10997 GFP_KERNEL_ACCOUNT);
10998 if (!vcpu->arch.mce_banks)
10999 goto fail_free_pio_data;
11000 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11002 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11003 GFP_KERNEL_ACCOUNT))
11004 goto fail_free_mce_banks;
11006 if (!alloc_emulate_ctxt(vcpu))
11007 goto free_wbinvd_dirty_mask;
11009 vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
11010 GFP_KERNEL_ACCOUNT);
11011 if (!vcpu->arch.user_fpu) {
11012 pr_err("kvm: failed to allocate userspace's fpu\n");
11013 goto free_emulate_ctxt;
11016 vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
11017 GFP_KERNEL_ACCOUNT);
11018 if (!vcpu->arch.guest_fpu) {
11019 pr_err("kvm: failed to allocate vcpu's fpu\n");
11020 goto free_user_fpu;
11024 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11025 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11027 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11029 kvm_async_pf_hash_reset(vcpu);
11030 kvm_pmu_init(vcpu);
11032 vcpu->arch.pending_external_vector = -1;
11033 vcpu->arch.preempted_in_kernel = false;
11035 #if IS_ENABLED(CONFIG_HYPERV)
11036 vcpu->arch.hv_root_tdp = INVALID_PAGE;
11039 r = static_call(kvm_x86_vcpu_create)(vcpu);
11041 goto free_guest_fpu;
11043 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11044 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11045 kvm_vcpu_mtrr_init(vcpu);
11047 kvm_set_tsc_khz(vcpu, max_tsc_khz);
11048 kvm_vcpu_reset(vcpu, false);
11049 kvm_init_mmu(vcpu);
11054 kvm_free_guest_fpu(vcpu);
11056 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11058 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11059 free_wbinvd_dirty_mask:
11060 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11061 fail_free_mce_banks:
11062 kfree(vcpu->arch.mce_banks);
11063 fail_free_pio_data:
11064 free_page((unsigned long)vcpu->arch.pio_data);
11066 kvm_free_lapic(vcpu);
11068 kvm_mmu_destroy(vcpu);
11072 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11074 struct kvm *kvm = vcpu->kvm;
11076 if (mutex_lock_killable(&vcpu->mutex))
11079 kvm_synchronize_tsc(vcpu, 0);
11082 /* poll control enabled by default */
11083 vcpu->arch.msr_kvm_poll_control = 1;
11085 mutex_unlock(&vcpu->mutex);
11087 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11088 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11089 KVMCLOCK_SYNC_PERIOD);
11092 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11096 kvmclock_reset(vcpu);
11098 static_call(kvm_x86_vcpu_free)(vcpu);
11100 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11101 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11102 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11103 kvm_free_guest_fpu(vcpu);
11105 kvm_hv_vcpu_uninit(vcpu);
11106 kvm_pmu_destroy(vcpu);
11107 kfree(vcpu->arch.mce_banks);
11108 kvm_free_lapic(vcpu);
11109 idx = srcu_read_lock(&vcpu->kvm->srcu);
11110 kvm_mmu_destroy(vcpu);
11111 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11112 free_page((unsigned long)vcpu->arch.pio_data);
11113 kvfree(vcpu->arch.cpuid_entries);
11114 if (!lapic_in_kernel(vcpu))
11115 static_branch_dec(&kvm_has_noapic_vcpu);
11118 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11120 unsigned long old_cr0 = kvm_read_cr0(vcpu);
11121 unsigned long new_cr0;
11124 kvm_lapic_reset(vcpu, init_event);
11126 vcpu->arch.hflags = 0;
11128 vcpu->arch.smi_pending = 0;
11129 vcpu->arch.smi_count = 0;
11130 atomic_set(&vcpu->arch.nmi_queued, 0);
11131 vcpu->arch.nmi_pending = 0;
11132 vcpu->arch.nmi_injected = false;
11133 kvm_clear_interrupt_queue(vcpu);
11134 kvm_clear_exception_queue(vcpu);
11136 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11137 kvm_update_dr0123(vcpu);
11138 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11139 vcpu->arch.dr7 = DR7_FIXED_1;
11140 kvm_update_dr7(vcpu);
11142 vcpu->arch.cr2 = 0;
11144 kvm_make_request(KVM_REQ_EVENT, vcpu);
11145 vcpu->arch.apf.msr_en_val = 0;
11146 vcpu->arch.apf.msr_int_val = 0;
11147 vcpu->arch.st.msr_val = 0;
11149 kvmclock_reset(vcpu);
11151 kvm_clear_async_pf_completion_queue(vcpu);
11152 kvm_async_pf_hash_reset(vcpu);
11153 vcpu->arch.apf.halted = false;
11155 if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
11156 void *mpx_state_buffer;
11159 * To avoid have the INIT path from kvm_apic_has_events() that be
11160 * called with loaded FPU and does not let userspace fix the state.
11163 kvm_put_guest_fpu(vcpu);
11164 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11166 if (mpx_state_buffer)
11167 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
11168 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11170 if (mpx_state_buffer)
11171 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
11173 kvm_load_guest_fpu(vcpu);
11177 kvm_pmu_reset(vcpu);
11178 vcpu->arch.smbase = 0x30000;
11180 vcpu->arch.msr_misc_features_enables = 0;
11182 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11183 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11186 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11187 vcpu->arch.regs_avail = ~0;
11188 vcpu->arch.regs_dirty = ~0;
11191 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11192 * if no CPUID match is found. Note, it's impossible to get a match at
11193 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11194 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11195 * But, go through the motions in case that's ever remedied.
11198 if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
11200 kvm_rdx_write(vcpu, eax);
11202 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11204 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11205 kvm_rip_write(vcpu, 0xfff0);
11207 vcpu->arch.cr3 = 0;
11208 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11211 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11212 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11213 * (or qualify) that with a footnote stating that CD/NW are preserved.
11215 new_cr0 = X86_CR0_ET;
11217 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11219 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11221 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11222 static_call(kvm_x86_set_cr4)(vcpu, 0);
11223 static_call(kvm_x86_set_efer)(vcpu, 0);
11224 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11227 * Reset the MMU context if paging was enabled prior to INIT (which is
11228 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11229 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11230 * checked because it is unconditionally cleared on INIT and all other
11231 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11232 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11234 if (old_cr0 & X86_CR0_PG)
11235 kvm_mmu_reset_context(vcpu);
11238 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11239 * APM states the TLBs are untouched by INIT, but it also states that
11240 * the TLBs are flushed on "External initialization of the processor."
11241 * Flush the guest TLB regardless of vendor, there is no meaningful
11242 * benefit in relying on the guest to flush the TLB immediately after
11243 * INIT. A spurious TLB flush is benign and likely negligible from a
11244 * performance perspective.
11247 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11249 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11251 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11253 struct kvm_segment cs;
11255 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11256 cs.selector = vector << 8;
11257 cs.base = vector << 12;
11258 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11259 kvm_rip_write(vcpu, 0);
11261 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11263 int kvm_arch_hardware_enable(void)
11266 struct kvm_vcpu *vcpu;
11271 bool stable, backwards_tsc = false;
11273 kvm_user_return_msr_cpu_online();
11274 ret = static_call(kvm_x86_hardware_enable)();
11278 local_tsc = rdtsc();
11279 stable = !kvm_check_tsc_unstable();
11280 list_for_each_entry(kvm, &vm_list, vm_list) {
11281 kvm_for_each_vcpu(i, vcpu, kvm) {
11282 if (!stable && vcpu->cpu == smp_processor_id())
11283 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11284 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11285 backwards_tsc = true;
11286 if (vcpu->arch.last_host_tsc > max_tsc)
11287 max_tsc = vcpu->arch.last_host_tsc;
11293 * Sometimes, even reliable TSCs go backwards. This happens on
11294 * platforms that reset TSC during suspend or hibernate actions, but
11295 * maintain synchronization. We must compensate. Fortunately, we can
11296 * detect that condition here, which happens early in CPU bringup,
11297 * before any KVM threads can be running. Unfortunately, we can't
11298 * bring the TSCs fully up to date with real time, as we aren't yet far
11299 * enough into CPU bringup that we know how much real time has actually
11300 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11301 * variables that haven't been updated yet.
11303 * So we simply find the maximum observed TSC above, then record the
11304 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11305 * the adjustment will be applied. Note that we accumulate
11306 * adjustments, in case multiple suspend cycles happen before some VCPU
11307 * gets a chance to run again. In the event that no KVM threads get a
11308 * chance to run, we will miss the entire elapsed period, as we'll have
11309 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11310 * loose cycle time. This isn't too big a deal, since the loss will be
11311 * uniform across all VCPUs (not to mention the scenario is extremely
11312 * unlikely). It is possible that a second hibernate recovery happens
11313 * much faster than a first, causing the observed TSC here to be
11314 * smaller; this would require additional padding adjustment, which is
11315 * why we set last_host_tsc to the local tsc observed here.
11317 * N.B. - this code below runs only on platforms with reliable TSC,
11318 * as that is the only way backwards_tsc is set above. Also note
11319 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11320 * have the same delta_cyc adjustment applied if backwards_tsc
11321 * is detected. Note further, this adjustment is only done once,
11322 * as we reset last_host_tsc on all VCPUs to stop this from being
11323 * called multiple times (one for each physical CPU bringup).
11325 * Platforms with unreliable TSCs don't have to deal with this, they
11326 * will be compensated by the logic in vcpu_load, which sets the TSC to
11327 * catchup mode. This will catchup all VCPUs to real time, but cannot
11328 * guarantee that they stay in perfect synchronization.
11330 if (backwards_tsc) {
11331 u64 delta_cyc = max_tsc - local_tsc;
11332 list_for_each_entry(kvm, &vm_list, vm_list) {
11333 kvm->arch.backwards_tsc_observed = true;
11334 kvm_for_each_vcpu(i, vcpu, kvm) {
11335 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11336 vcpu->arch.last_host_tsc = local_tsc;
11337 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11341 * We have to disable TSC offset matching.. if you were
11342 * booting a VM while issuing an S4 host suspend....
11343 * you may have some problem. Solving this issue is
11344 * left as an exercise to the reader.
11346 kvm->arch.last_tsc_nsec = 0;
11347 kvm->arch.last_tsc_write = 0;
11354 void kvm_arch_hardware_disable(void)
11356 static_call(kvm_x86_hardware_disable)();
11357 drop_user_return_notifiers();
11360 int kvm_arch_hardware_setup(void *opaque)
11362 struct kvm_x86_init_ops *ops = opaque;
11365 rdmsrl_safe(MSR_EFER, &host_efer);
11367 if (boot_cpu_has(X86_FEATURE_XSAVES))
11368 rdmsrl(MSR_IA32_XSS, host_xss);
11370 r = ops->hardware_setup();
11374 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11375 kvm_ops_static_call_update();
11377 if (ops->intel_pt_intr_in_guest && ops->intel_pt_intr_in_guest())
11378 kvm_guest_cbs.handle_intel_pt_intr = kvm_handle_intel_pt_intr;
11379 perf_register_guest_info_callbacks(&kvm_guest_cbs);
11381 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11384 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11385 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11386 #undef __kvm_cpu_cap_has
11388 if (kvm_has_tsc_control) {
11390 * Make sure the user can only configure tsc_khz values that
11391 * fit into a signed integer.
11392 * A min value is not calculated because it will always
11393 * be 1 on all machines.
11395 u64 max = min(0x7fffffffULL,
11396 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11397 kvm_max_guest_tsc_khz = max;
11399 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11402 kvm_init_msr_list();
11406 void kvm_arch_hardware_unsetup(void)
11408 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
11409 kvm_guest_cbs.handle_intel_pt_intr = NULL;
11411 static_call(kvm_x86_hardware_unsetup)();
11414 int kvm_arch_check_processor_compat(void *opaque)
11416 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11417 struct kvm_x86_init_ops *ops = opaque;
11419 WARN_ON(!irqs_disabled());
11421 if (__cr4_reserved_bits(cpu_has, c) !=
11422 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11425 return ops->check_processor_compatibility();
11428 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11430 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11432 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11434 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11436 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11439 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11440 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11442 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11444 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11446 vcpu->arch.l1tf_flush_l1d = true;
11447 if (pmu->version && unlikely(pmu->event_count)) {
11448 pmu->need_cleanup = true;
11449 kvm_make_request(KVM_REQ_PMU, vcpu);
11451 static_call(kvm_x86_sched_in)(vcpu, cpu);
11454 void kvm_arch_free_vm(struct kvm *kvm)
11456 kfree(to_kvm_hv(kvm)->hv_pa_pg);
11461 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11468 ret = kvm_page_track_init(kvm);
11472 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11473 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11474 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11475 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11476 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11477 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11479 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11480 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11481 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11482 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11483 &kvm->arch.irq_sources_bitmap);
11485 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11486 mutex_init(&kvm->arch.apic_map_lock);
11487 raw_spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11489 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11490 pvclock_update_vm_gtod_copy(kvm);
11492 kvm->arch.guest_can_read_msr_platform_info = true;
11494 #if IS_ENABLED(CONFIG_HYPERV)
11495 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11496 kvm->arch.hv_root_tdp = INVALID_PAGE;
11499 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11500 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11502 kvm_apicv_init(kvm);
11503 kvm_hv_init_vm(kvm);
11504 kvm_mmu_init_vm(kvm);
11505 kvm_xen_init_vm(kvm);
11507 return static_call(kvm_x86_vm_init)(kvm);
11510 int kvm_arch_post_init_vm(struct kvm *kvm)
11512 return kvm_mmu_post_init_vm(kvm);
11515 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11518 kvm_mmu_unload(vcpu);
11522 static void kvm_free_vcpus(struct kvm *kvm)
11525 struct kvm_vcpu *vcpu;
11528 * Unpin any mmu pages first.
11530 kvm_for_each_vcpu(i, vcpu, kvm) {
11531 kvm_clear_async_pf_completion_queue(vcpu);
11532 kvm_unload_vcpu_mmu(vcpu);
11534 kvm_for_each_vcpu(i, vcpu, kvm)
11535 kvm_vcpu_destroy(vcpu);
11537 mutex_lock(&kvm->lock);
11538 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11539 kvm->vcpus[i] = NULL;
11541 atomic_set(&kvm->online_vcpus, 0);
11542 mutex_unlock(&kvm->lock);
11545 void kvm_arch_sync_events(struct kvm *kvm)
11547 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11548 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11552 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11555 * __x86_set_memory_region: Setup KVM internal memory slot
11557 * @kvm: the kvm pointer to the VM.
11558 * @id: the slot ID to setup.
11559 * @gpa: the GPA to install the slot (unused when @size == 0).
11560 * @size: the size of the slot. Set to zero to uninstall a slot.
11562 * This function helps to setup a KVM internal memory slot. Specify
11563 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11564 * slot. The return code can be one of the following:
11566 * HVA: on success (uninstall will return a bogus HVA)
11569 * The caller should always use IS_ERR() to check the return value
11570 * before use. Note, the KVM internal memory slots are guaranteed to
11571 * remain valid and unchanged until the VM is destroyed, i.e., the
11572 * GPA->HVA translation will not change. However, the HVA is a user
11573 * address, i.e. its accessibility is not guaranteed, and must be
11574 * accessed via __copy_{to,from}_user().
11576 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11580 unsigned long hva, old_npages;
11581 struct kvm_memslots *slots = kvm_memslots(kvm);
11582 struct kvm_memory_slot *slot;
11584 /* Called with kvm->slots_lock held. */
11585 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11586 return ERR_PTR_USR(-EINVAL);
11588 slot = id_to_memslot(slots, id);
11590 if (slot && slot->npages)
11591 return ERR_PTR_USR(-EEXIST);
11594 * MAP_SHARED to prevent internal slot pages from being moved
11597 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11598 MAP_SHARED | MAP_ANONYMOUS, 0);
11599 if (IS_ERR((void *)hva))
11600 return (void __user *)hva;
11602 if (!slot || !slot->npages)
11605 old_npages = slot->npages;
11606 hva = slot->userspace_addr;
11609 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11610 struct kvm_userspace_memory_region m;
11612 m.slot = id | (i << 16);
11614 m.guest_phys_addr = gpa;
11615 m.userspace_addr = hva;
11616 m.memory_size = size;
11617 r = __kvm_set_memory_region(kvm, &m);
11619 return ERR_PTR_USR(r);
11623 vm_munmap(hva, old_npages * PAGE_SIZE);
11625 return (void __user *)hva;
11627 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11629 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11631 kvm_mmu_pre_destroy_vm(kvm);
11634 void kvm_arch_destroy_vm(struct kvm *kvm)
11636 if (current->mm == kvm->mm) {
11638 * Free memory regions allocated on behalf of userspace,
11639 * unless the the memory map has changed due to process exit
11642 mutex_lock(&kvm->slots_lock);
11643 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11645 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11647 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11648 mutex_unlock(&kvm->slots_lock);
11650 static_call_cond(kvm_x86_vm_destroy)(kvm);
11651 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11652 kvm_pic_destroy(kvm);
11653 kvm_ioapic_destroy(kvm);
11654 kvm_free_vcpus(kvm);
11655 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11656 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11657 kvm_mmu_uninit_vm(kvm);
11658 kvm_page_track_cleanup(kvm);
11659 kvm_xen_destroy_vm(kvm);
11660 kvm_hv_destroy_vm(kvm);
11663 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11667 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11668 kvfree(slot->arch.rmap[i]);
11669 slot->arch.rmap[i] = NULL;
11673 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11677 memslot_rmap_free(slot);
11679 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11680 kvfree(slot->arch.lpage_info[i - 1]);
11681 slot->arch.lpage_info[i - 1] = NULL;
11684 kvm_page_track_free_memslot(slot);
11687 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11688 unsigned long npages)
11690 const int sz = sizeof(*slot->arch.rmap[0]);
11693 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11695 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11697 if (slot->arch.rmap[i])
11700 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11701 if (!slot->arch.rmap[i]) {
11702 memslot_rmap_free(slot);
11710 int alloc_all_memslots_rmaps(struct kvm *kvm)
11712 struct kvm_memslots *slots;
11713 struct kvm_memory_slot *slot;
11717 * Check if memslots alreday have rmaps early before acquiring
11718 * the slots_arch_lock below.
11720 if (kvm_memslots_have_rmaps(kvm))
11723 mutex_lock(&kvm->slots_arch_lock);
11726 * Read memslots_have_rmaps again, under the slots arch lock,
11727 * before allocating the rmaps
11729 if (kvm_memslots_have_rmaps(kvm)) {
11730 mutex_unlock(&kvm->slots_arch_lock);
11734 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11735 slots = __kvm_memslots(kvm, i);
11736 kvm_for_each_memslot(slot, slots) {
11737 r = memslot_rmap_alloc(slot, slot->npages);
11739 mutex_unlock(&kvm->slots_arch_lock);
11746 * Ensure that memslots_have_rmaps becomes true strictly after
11747 * all the rmap pointers are set.
11749 smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11750 mutex_unlock(&kvm->slots_arch_lock);
11754 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11755 struct kvm_memory_slot *slot,
11756 unsigned long npages)
11761 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11762 * old arrays will be freed by __kvm_set_memory_region() if installing
11763 * the new memslot is successful.
11765 memset(&slot->arch, 0, sizeof(slot->arch));
11767 if (kvm_memslots_have_rmaps(kvm)) {
11768 r = memslot_rmap_alloc(slot, npages);
11773 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11774 struct kvm_lpage_info *linfo;
11775 unsigned long ugfn;
11779 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11781 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11785 slot->arch.lpage_info[i - 1] = linfo;
11787 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11788 linfo[0].disallow_lpage = 1;
11789 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11790 linfo[lpages - 1].disallow_lpage = 1;
11791 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11793 * If the gfn and userspace address are not aligned wrt each
11794 * other, disable large page support for this slot.
11796 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11799 for (j = 0; j < lpages; ++j)
11800 linfo[j].disallow_lpage = 1;
11804 if (kvm_page_track_create_memslot(slot, npages))
11810 memslot_rmap_free(slot);
11812 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11813 kvfree(slot->arch.lpage_info[i - 1]);
11814 slot->arch.lpage_info[i - 1] = NULL;
11819 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11821 struct kvm_vcpu *vcpu;
11825 * memslots->generation has been incremented.
11826 * mmio generation may have reached its maximum value.
11828 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11830 /* Force re-initialization of steal_time cache */
11831 kvm_for_each_vcpu(i, vcpu, kvm)
11832 kvm_vcpu_kick(vcpu);
11835 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11836 struct kvm_memory_slot *memslot,
11837 const struct kvm_userspace_memory_region *mem,
11838 enum kvm_mr_change change)
11840 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11841 return kvm_alloc_memslot_metadata(kvm, memslot,
11842 mem->memory_size >> PAGE_SHIFT);
11847 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11849 struct kvm_arch *ka = &kvm->arch;
11851 if (!kvm_x86_ops.cpu_dirty_log_size)
11854 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11855 (!enable && --ka->cpu_dirty_logging_count == 0))
11856 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11858 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11861 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11862 struct kvm_memory_slot *old,
11863 const struct kvm_memory_slot *new,
11864 enum kvm_mr_change change)
11866 bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11869 * Update CPU dirty logging if dirty logging is being toggled. This
11870 * applies to all operations.
11872 if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11873 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11876 * Nothing more to do for RO slots (which can't be dirtied and can't be
11877 * made writable) or CREATE/MOVE/DELETE of a slot.
11879 * For a memslot with dirty logging disabled:
11880 * CREATE: No dirty mappings will already exist.
11881 * MOVE/DELETE: The old mappings will already have been cleaned up by
11882 * kvm_arch_flush_shadow_memslot()
11884 * For a memslot with dirty logging enabled:
11885 * CREATE: No shadow pages exist, thus nothing to write-protect
11886 * and no dirty bits to clear.
11887 * MOVE/DELETE: The old mappings will already have been cleaned up by
11888 * kvm_arch_flush_shadow_memslot().
11890 if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11894 * READONLY and non-flags changes were filtered out above, and the only
11895 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11896 * logging isn't being toggled on or off.
11898 if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11901 if (!log_dirty_pages) {
11903 * Dirty logging tracks sptes in 4k granularity, meaning that
11904 * large sptes have to be split. If live migration succeeds,
11905 * the guest in the source machine will be destroyed and large
11906 * sptes will be created in the destination. However, if the
11907 * guest continues to run in the source machine (for example if
11908 * live migration fails), small sptes will remain around and
11909 * cause bad performance.
11911 * Scan sptes if dirty logging has been stopped, dropping those
11912 * which can be collapsed into a single large-page spte. Later
11913 * page faults will create the large-page sptes.
11915 kvm_mmu_zap_collapsible_sptes(kvm, new);
11918 * Initially-all-set does not require write protecting any page,
11919 * because they're all assumed to be dirty.
11921 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11924 if (kvm_x86_ops.cpu_dirty_log_size) {
11925 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11926 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11928 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11933 void kvm_arch_commit_memory_region(struct kvm *kvm,
11934 const struct kvm_userspace_memory_region *mem,
11935 struct kvm_memory_slot *old,
11936 const struct kvm_memory_slot *new,
11937 enum kvm_mr_change change)
11939 if (!kvm->arch.n_requested_mmu_pages)
11940 kvm_mmu_change_mmu_pages(kvm,
11941 kvm_mmu_calculate_default_mmu_pages(kvm));
11943 kvm_mmu_slot_apply_flags(kvm, old, new, change);
11945 /* Free the arrays associated with the old memslot. */
11946 if (change == KVM_MR_MOVE)
11947 kvm_arch_free_memslot(kvm, old);
11950 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11952 kvm_mmu_zap_all(kvm);
11955 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11956 struct kvm_memory_slot *slot)
11958 kvm_page_track_flush_slot(kvm, slot);
11961 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11963 return (is_guest_mode(vcpu) &&
11964 kvm_x86_ops.guest_apic_has_interrupt &&
11965 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11968 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11970 if (!list_empty_careful(&vcpu->async_pf.done))
11973 if (kvm_apic_has_events(vcpu))
11976 if (vcpu->arch.pv.pv_unhalted)
11979 if (vcpu->arch.exception.pending)
11982 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11983 (vcpu->arch.nmi_pending &&
11984 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11987 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11988 (vcpu->arch.smi_pending &&
11989 static_call(kvm_x86_smi_allowed)(vcpu, false)))
11992 if (kvm_arch_interrupt_allowed(vcpu) &&
11993 (kvm_cpu_has_interrupt(vcpu) ||
11994 kvm_guest_apic_has_interrupt(vcpu)))
11997 if (kvm_hv_has_stimer_pending(vcpu))
12000 if (is_guest_mode(vcpu) &&
12001 kvm_x86_ops.nested_ops->hv_timer_pending &&
12002 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12008 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12010 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12013 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12015 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12021 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12023 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12026 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12027 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12028 kvm_test_request(KVM_REQ_EVENT, vcpu))
12031 return kvm_arch_dy_has_pending_interrupt(vcpu);
12034 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12036 if (vcpu->arch.guest_state_protected)
12039 return vcpu->arch.preempted_in_kernel;
12042 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12044 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12047 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12049 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12052 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12054 /* Can't read the RIP when guest state is protected, just return 0 */
12055 if (vcpu->arch.guest_state_protected)
12058 if (is_64_bit_mode(vcpu))
12059 return kvm_rip_read(vcpu);
12060 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12061 kvm_rip_read(vcpu));
12063 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12065 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12067 return kvm_get_linear_rip(vcpu) == linear_rip;
12069 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12071 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12073 unsigned long rflags;
12075 rflags = static_call(kvm_x86_get_rflags)(vcpu);
12076 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12077 rflags &= ~X86_EFLAGS_TF;
12080 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12082 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12084 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12085 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12086 rflags |= X86_EFLAGS_TF;
12087 static_call(kvm_x86_set_rflags)(vcpu, rflags);
12090 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12092 __kvm_set_rflags(vcpu, rflags);
12093 kvm_make_request(KVM_REQ_EVENT, vcpu);
12095 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12097 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12101 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12105 r = kvm_mmu_reload(vcpu);
12109 if (!vcpu->arch.mmu->direct_map &&
12110 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12113 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12116 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12118 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12120 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12123 static inline u32 kvm_async_pf_next_probe(u32 key)
12125 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12128 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12130 u32 key = kvm_async_pf_hash_fn(gfn);
12132 while (vcpu->arch.apf.gfns[key] != ~0)
12133 key = kvm_async_pf_next_probe(key);
12135 vcpu->arch.apf.gfns[key] = gfn;
12138 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12141 u32 key = kvm_async_pf_hash_fn(gfn);
12143 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12144 (vcpu->arch.apf.gfns[key] != gfn &&
12145 vcpu->arch.apf.gfns[key] != ~0); i++)
12146 key = kvm_async_pf_next_probe(key);
12151 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12153 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12156 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12160 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12162 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12166 vcpu->arch.apf.gfns[i] = ~0;
12168 j = kvm_async_pf_next_probe(j);
12169 if (vcpu->arch.apf.gfns[j] == ~0)
12171 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12173 * k lies cyclically in ]i,j]
12175 * |....j i.k.| or |.k..j i...|
12177 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12178 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12183 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12185 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12187 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12191 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12193 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12195 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12196 &token, offset, sizeof(token));
12199 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12201 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12204 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12205 &val, offset, sizeof(val)))
12211 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12213 if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12216 if (!kvm_pv_async_pf_enabled(vcpu) ||
12217 (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12223 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12225 if (unlikely(!lapic_in_kernel(vcpu) ||
12226 kvm_event_needs_reinjection(vcpu) ||
12227 vcpu->arch.exception.pending))
12230 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12234 * If interrupts are off we cannot even use an artificial
12237 return kvm_arch_interrupt_allowed(vcpu);
12240 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12241 struct kvm_async_pf *work)
12243 struct x86_exception fault;
12245 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12246 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12248 if (kvm_can_deliver_async_pf(vcpu) &&
12249 !apf_put_user_notpresent(vcpu)) {
12250 fault.vector = PF_VECTOR;
12251 fault.error_code_valid = true;
12252 fault.error_code = 0;
12253 fault.nested_page_fault = false;
12254 fault.address = work->arch.token;
12255 fault.async_page_fault = true;
12256 kvm_inject_page_fault(vcpu, &fault);
12260 * It is not possible to deliver a paravirtualized asynchronous
12261 * page fault, but putting the guest in an artificial halt state
12262 * can be beneficial nevertheless: if an interrupt arrives, we
12263 * can deliver it timely and perhaps the guest will schedule
12264 * another process. When the instruction that triggered a page
12265 * fault is retried, hopefully the page will be ready in the host.
12267 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12272 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12273 struct kvm_async_pf *work)
12275 struct kvm_lapic_irq irq = {
12276 .delivery_mode = APIC_DM_FIXED,
12277 .vector = vcpu->arch.apf.vec
12280 if (work->wakeup_all)
12281 work->arch.token = ~0; /* broadcast wakeup */
12283 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12284 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12286 if ((work->wakeup_all || work->notpresent_injected) &&
12287 kvm_pv_async_pf_enabled(vcpu) &&
12288 !apf_put_user_ready(vcpu, work->arch.token)) {
12289 vcpu->arch.apf.pageready_pending = true;
12290 kvm_apic_set_irq(vcpu, &irq, NULL);
12293 vcpu->arch.apf.halted = false;
12294 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12297 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12299 kvm_make_request(KVM_REQ_APF_READY, vcpu);
12300 if (!vcpu->arch.apf.pageready_pending)
12301 kvm_vcpu_kick(vcpu);
12304 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12306 if (!kvm_pv_async_pf_enabled(vcpu))
12309 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12312 void kvm_arch_start_assignment(struct kvm *kvm)
12314 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12315 static_call_cond(kvm_x86_start_assignment)(kvm);
12317 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12319 void kvm_arch_end_assignment(struct kvm *kvm)
12321 atomic_dec(&kvm->arch.assigned_device_count);
12323 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12325 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
12327 return arch_atomic_read(&kvm->arch.assigned_device_count);
12329 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12331 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12333 atomic_inc(&kvm->arch.noncoherent_dma_count);
12335 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12337 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12339 atomic_dec(&kvm->arch.noncoherent_dma_count);
12341 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12343 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12345 return atomic_read(&kvm->arch.noncoherent_dma_count);
12347 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12349 bool kvm_arch_has_irq_bypass(void)
12354 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12355 struct irq_bypass_producer *prod)
12357 struct kvm_kernel_irqfd *irqfd =
12358 container_of(cons, struct kvm_kernel_irqfd, consumer);
12361 irqfd->producer = prod;
12362 kvm_arch_start_assignment(irqfd->kvm);
12363 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12364 prod->irq, irqfd->gsi, 1);
12367 kvm_arch_end_assignment(irqfd->kvm);
12372 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12373 struct irq_bypass_producer *prod)
12376 struct kvm_kernel_irqfd *irqfd =
12377 container_of(cons, struct kvm_kernel_irqfd, consumer);
12379 WARN_ON(irqfd->producer != prod);
12380 irqfd->producer = NULL;
12383 * When producer of consumer is unregistered, we change back to
12384 * remapped mode, so we can re-use the current implementation
12385 * when the irq is masked/disabled or the consumer side (KVM
12386 * int this case doesn't want to receive the interrupts.
12388 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12390 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12391 " fails: %d\n", irqfd->consumer.token, ret);
12393 kvm_arch_end_assignment(irqfd->kvm);
12396 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12397 uint32_t guest_irq, bool set)
12399 return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12402 bool kvm_vector_hashing_enabled(void)
12404 return vector_hashing;
12407 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12409 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12411 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12414 int kvm_spec_ctrl_test_value(u64 value)
12417 * test that setting IA32_SPEC_CTRL to given value
12418 * is allowed by the host processor
12422 unsigned long flags;
12425 local_irq_save(flags);
12427 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12429 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12432 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12434 local_irq_restore(flags);
12438 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12440 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12442 struct x86_exception fault;
12443 u32 access = error_code &
12444 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12446 if (!(error_code & PFERR_PRESENT_MASK) ||
12447 vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12449 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12450 * tables probably do not match the TLB. Just proceed
12451 * with the error code that the processor gave.
12453 fault.vector = PF_VECTOR;
12454 fault.error_code_valid = true;
12455 fault.error_code = error_code;
12456 fault.nested_page_fault = false;
12457 fault.address = gva;
12459 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12461 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12464 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12465 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12466 * indicates whether exit to userspace is needed.
12468 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12469 struct x86_exception *e)
12471 if (r == X86EMUL_PROPAGATE_FAULT) {
12472 kvm_inject_emulated_page_fault(vcpu, e);
12477 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12478 * while handling a VMX instruction KVM could've handled the request
12479 * correctly by exiting to userspace and performing I/O but there
12480 * doesn't seem to be a real use-case behind such requests, just return
12481 * KVM_EXIT_INTERNAL_ERROR for now.
12483 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12484 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12485 vcpu->run->internal.ndata = 0;
12489 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12491 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12494 struct x86_exception e;
12501 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12502 if (r != X86EMUL_CONTINUE)
12503 return kvm_handle_memory_failure(vcpu, r, &e);
12505 if (operand.pcid >> 12 != 0) {
12506 kvm_inject_gp(vcpu, 0);
12510 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12513 case INVPCID_TYPE_INDIV_ADDR:
12514 if ((!pcid_enabled && (operand.pcid != 0)) ||
12515 is_noncanonical_address(operand.gla, vcpu)) {
12516 kvm_inject_gp(vcpu, 0);
12519 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12520 return kvm_skip_emulated_instruction(vcpu);
12522 case INVPCID_TYPE_SINGLE_CTXT:
12523 if (!pcid_enabled && (operand.pcid != 0)) {
12524 kvm_inject_gp(vcpu, 0);
12528 kvm_invalidate_pcid(vcpu, operand.pcid);
12529 return kvm_skip_emulated_instruction(vcpu);
12531 case INVPCID_TYPE_ALL_NON_GLOBAL:
12533 * Currently, KVM doesn't mark global entries in the shadow
12534 * page tables, so a non-global flush just degenerates to a
12535 * global flush. If needed, we could optimize this later by
12536 * keeping track of global entries in shadow page tables.
12540 case INVPCID_TYPE_ALL_INCL_GLOBAL:
12541 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12542 return kvm_skip_emulated_instruction(vcpu);
12545 BUG(); /* We have already checked above that type <= 3 */
12548 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12550 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12552 struct kvm_run *run = vcpu->run;
12553 struct kvm_mmio_fragment *frag;
12556 BUG_ON(!vcpu->mmio_needed);
12558 /* Complete previous fragment */
12559 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12560 len = min(8u, frag->len);
12561 if (!vcpu->mmio_is_write)
12562 memcpy(frag->data, run->mmio.data, len);
12564 if (frag->len <= 8) {
12565 /* Switch to the next fragment. */
12567 vcpu->mmio_cur_fragment++;
12569 /* Go forward to the next mmio piece. */
12575 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12576 vcpu->mmio_needed = 0;
12578 // VMG change, at this point, we're always done
12579 // RIP has already been advanced
12583 // More MMIO is needed
12584 run->mmio.phys_addr = frag->gpa;
12585 run->mmio.len = min(8u, frag->len);
12586 run->mmio.is_write = vcpu->mmio_is_write;
12587 if (run->mmio.is_write)
12588 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12589 run->exit_reason = KVM_EXIT_MMIO;
12591 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12596 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12600 struct kvm_mmio_fragment *frag;
12605 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12606 if (handled == bytes)
12613 /*TODO: Check if need to increment number of frags */
12614 frag = vcpu->mmio_fragments;
12615 vcpu->mmio_nr_fragments = 1;
12620 vcpu->mmio_needed = 1;
12621 vcpu->mmio_cur_fragment = 0;
12623 vcpu->run->mmio.phys_addr = gpa;
12624 vcpu->run->mmio.len = min(8u, frag->len);
12625 vcpu->run->mmio.is_write = 1;
12626 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12627 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12629 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12633 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12635 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12639 struct kvm_mmio_fragment *frag;
12644 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12645 if (handled == bytes)
12652 /*TODO: Check if need to increment number of frags */
12653 frag = vcpu->mmio_fragments;
12654 vcpu->mmio_nr_fragments = 1;
12659 vcpu->mmio_needed = 1;
12660 vcpu->mmio_cur_fragment = 0;
12662 vcpu->run->mmio.phys_addr = gpa;
12663 vcpu->run->mmio.len = min(8u, frag->len);
12664 vcpu->run->mmio.is_write = 0;
12665 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12667 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12671 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12673 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12674 unsigned int port);
12676 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12678 int size = vcpu->arch.pio.size;
12679 int port = vcpu->arch.pio.port;
12681 vcpu->arch.pio.count = 0;
12682 if (vcpu->arch.sev_pio_count)
12683 return kvm_sev_es_outs(vcpu, size, port);
12687 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12691 unsigned int count =
12692 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12693 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12695 /* memcpy done already by emulator_pio_out. */
12696 vcpu->arch.sev_pio_count -= count;
12697 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12701 /* Emulation done by the kernel. */
12702 if (!vcpu->arch.sev_pio_count)
12706 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12710 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12711 unsigned int port);
12713 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12715 unsigned count = vcpu->arch.pio.count;
12716 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12717 vcpu->arch.sev_pio_count -= count;
12718 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12721 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12723 int size = vcpu->arch.pio.size;
12724 int port = vcpu->arch.pio.port;
12726 advance_sev_es_emulated_ins(vcpu);
12727 if (vcpu->arch.sev_pio_count)
12728 return kvm_sev_es_ins(vcpu, size, port);
12732 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12736 unsigned int count =
12737 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12738 if (!__emulator_pio_in(vcpu, size, port, count))
12741 /* Emulation done by the kernel. */
12742 advance_sev_es_emulated_ins(vcpu);
12743 if (!vcpu->arch.sev_pio_count)
12747 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12751 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12752 unsigned int port, void *data, unsigned int count,
12755 vcpu->arch.sev_pio_data = data;
12756 vcpu->arch.sev_pio_count = count;
12757 return in ? kvm_sev_es_ins(vcpu, size, port)
12758 : kvm_sev_es_outs(vcpu, size, port);
12760 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12762 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12763 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12764 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12765 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12766 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12767 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12768 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12769 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12770 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12771 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12772 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12773 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12774 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12775 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12776 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12777 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12778 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12779 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12780 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12781 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12782 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12783 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12784 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12785 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12786 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12787 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12788 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
12790 static int __init kvm_x86_init(void)
12792 kvm_mmu_x86_module_init();
12795 module_init(kvm_x86_init);
12797 static void __exit kvm_x86_exit(void)
12800 * If module_init() is implemented, module_exit() must also be
12801 * implemented to allow module unload.
12804 module_exit(kvm_x86_exit);