arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
  94
  95 #define emul_to_vcpu(ctxt) \
  96         ((struct kvm_vcpu *)(ctxt)->vcpu)
  97
  98 /* EFER defaults:
  99  * - enable syscall per default because its emulated by KVM
 100  * - enable LME and LMA per default on 64 bit KVM
 101  */
 102 #ifdef CONFIG_X86_64
 103 static
 104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 105 #else
 106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 107 #endif
 108
 109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 110
 111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 112
 113 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
 114
 115 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 116                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 117
 118 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 119 static void process_nmi(struct kvm_vcpu *vcpu);
 120 static void process_smi(struct kvm_vcpu *vcpu);
 121 static void enter_smm(struct kvm_vcpu *vcpu);
 122 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 123 static void store_regs(struct kvm_vcpu *vcpu);
 124 static int sync_regs(struct kvm_vcpu *vcpu);
 125 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 126
 127 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 128 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 129
 130 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 131
 132 #define KVM_X86_OP(func)                                             \
 133         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 134                                 *(((struct kvm_x86_ops *)0)->func));
 135 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
 136 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
 137 #include <asm/kvm-x86-ops.h>
 138 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 139 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 140
 141 static bool __read_mostly ignore_msrs = 0;
 142 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 143
 144 bool __read_mostly report_ignored_msrs = true;
 145 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 146 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 147
 148 unsigned int min_timer_period_us = 200;
 149 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 150
 151 static bool __read_mostly kvmclock_periodic_sync = true;
 152 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 153
 154 bool __read_mostly kvm_has_tsc_control;
 155 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 156 u32  __read_mostly kvm_max_guest_tsc_khz;
 157 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 158 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 159 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 160 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 161 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 162 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 163 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 164 bool __read_mostly kvm_has_bus_lock_exit;
 165 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 166
 167 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 168 static u32 __read_mostly tsc_tolerance_ppm = 250;
 169 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 170
 171 /*
 172  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 173  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 174  * advancement entirely.  Any other value is used as-is and disables adaptive
 175  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 176  */
 177 static int __read_mostly lapic_timer_advance_ns = -1;
 178 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 179
 180 static bool __read_mostly vector_hashing = true;
 181 module_param(vector_hashing, bool, S_IRUGO);
 182
 183 bool __read_mostly enable_vmware_backdoor = false;
 184 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 185 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 186
 187 static bool __read_mostly force_emulation_prefix = false;
 188 module_param(force_emulation_prefix, bool, S_IRUGO);
 189
 190 int __read_mostly pi_inject_timer = -1;
 191 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 192
 193 /* Enable/disable PMU virtualization */
 194 bool __read_mostly enable_pmu = true;
 195 EXPORT_SYMBOL_GPL(enable_pmu);
 196 module_param(enable_pmu, bool, 0444);
 197
 198 bool __read_mostly eager_page_split = true;
 199 module_param(eager_page_split, bool, 0644);
 200
 201 /*
 202  * Restoring the host value for MSRs that are only consumed when running in
 203  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 204  * returns to userspace, i.e. the kernel can run with the guest's value.
 205  */
 206 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 207
 208 struct kvm_user_return_msrs {
 209         struct user_return_notifier urn;
 210         bool registered;
 211         struct kvm_user_return_msr_values {
 212                 u64 host;
 213                 u64 curr;
 214         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 215 };
 216
 217 u32 __read_mostly kvm_nr_uret_msrs;
 218 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 219 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 220 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 221
 222 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 223                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 224                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 225                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 226
 227 u64 __read_mostly host_efer;
 228 EXPORT_SYMBOL_GPL(host_efer);
 229
 230 bool __read_mostly allow_smaller_maxphyaddr = 0;
 231 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 232
 233 bool __read_mostly enable_apicv = true;
 234 EXPORT_SYMBOL_GPL(enable_apicv);
 235
 236 u64 __read_mostly host_xss;
 237 EXPORT_SYMBOL_GPL(host_xss);
 238 u64 __read_mostly supported_xss;
 239 EXPORT_SYMBOL_GPL(supported_xss);
 240
 241 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 242         KVM_GENERIC_VM_STATS(),
 243         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 244         STATS_DESC_COUNTER(VM, mmu_pte_write),
 245         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 246         STATS_DESC_COUNTER(VM, mmu_flooded),
 247         STATS_DESC_COUNTER(VM, mmu_recycled),
 248         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 249         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 250         STATS_DESC_ICOUNTER(VM, pages_4k),
 251         STATS_DESC_ICOUNTER(VM, pages_2m),
 252         STATS_DESC_ICOUNTER(VM, pages_1g),
 253         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 254         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 255         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 256 };
 257
 258 const struct kvm_stats_header kvm_vm_stats_header = {
 259         .name_size = KVM_STATS_NAME_SIZE,
 260         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 261         .id_offset = sizeof(struct kvm_stats_header),
 262         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 263         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 264                        sizeof(kvm_vm_stats_desc),
 265 };
 266
 267 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 268         KVM_GENERIC_VCPU_STATS(),
 269         STATS_DESC_COUNTER(VCPU, pf_taken),
 270         STATS_DESC_COUNTER(VCPU, pf_fixed),
 271         STATS_DESC_COUNTER(VCPU, pf_emulate),
 272         STATS_DESC_COUNTER(VCPU, pf_spurious),
 273         STATS_DESC_COUNTER(VCPU, pf_fast),
 274         STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
 275         STATS_DESC_COUNTER(VCPU, pf_guest),
 276         STATS_DESC_COUNTER(VCPU, tlb_flush),
 277         STATS_DESC_COUNTER(VCPU, invlpg),
 278         STATS_DESC_COUNTER(VCPU, exits),
 279         STATS_DESC_COUNTER(VCPU, io_exits),
 280         STATS_DESC_COUNTER(VCPU, mmio_exits),
 281         STATS_DESC_COUNTER(VCPU, signal_exits),
 282         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 283         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 284         STATS_DESC_COUNTER(VCPU, l1d_flush),
 285         STATS_DESC_COUNTER(VCPU, halt_exits),
 286         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 287         STATS_DESC_COUNTER(VCPU, irq_exits),
 288         STATS_DESC_COUNTER(VCPU, host_state_reload),
 289         STATS_DESC_COUNTER(VCPU, fpu_reload),
 290         STATS_DESC_COUNTER(VCPU, insn_emulation),
 291         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 292         STATS_DESC_COUNTER(VCPU, hypercalls),
 293         STATS_DESC_COUNTER(VCPU, irq_injections),
 294         STATS_DESC_COUNTER(VCPU, nmi_injections),
 295         STATS_DESC_COUNTER(VCPU, req_event),
 296         STATS_DESC_COUNTER(VCPU, nested_run),
 297         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 298         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 299         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 300 };
 301
 302 const struct kvm_stats_header kvm_vcpu_stats_header = {
 303         .name_size = KVM_STATS_NAME_SIZE,
 304         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 305         .id_offset = sizeof(struct kvm_stats_header),
 306         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 307         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 308                        sizeof(kvm_vcpu_stats_desc),
 309 };
 310
 311 u64 __read_mostly host_xcr0;
 312 u64 __read_mostly supported_xcr0;
 313 EXPORT_SYMBOL_GPL(supported_xcr0);
 314
 315 static struct kmem_cache *x86_emulator_cache;
 316
 317 /*
 318  * When called, it means the previous get/set msr reached an invalid msr.
 319  * Return true if we want to ignore/silent this failed msr access.
 320  */
 321 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 322 {
 323         const char *op = write ? "wrmsr" : "rdmsr";
 324
 325         if (ignore_msrs) {
 326                 if (report_ignored_msrs)
 327                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 328                                       op, msr, data);
 329                 /* Mask the error */
 330                 return true;
 331         } else {
 332                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 333                                       op, msr, data);
 334                 return false;
 335         }
 336 }
 337
 338 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 339 {
 340         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 341         unsigned int size = sizeof(struct x86_emulate_ctxt);
 342
 343         return kmem_cache_create_usercopy("x86_emulator", size,
 344                                           __alignof__(struct x86_emulate_ctxt),
 345                                           SLAB_ACCOUNT, useroffset,
 346                                           size - useroffset, NULL);
 347 }
 348
 349 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 350
 351 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 352 {
 353         int i;
 354         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 355                 vcpu->arch.apf.gfns[i] = ~0;
 356 }
 357
 358 static void kvm_on_user_return(struct user_return_notifier *urn)
 359 {
 360         unsigned slot;
 361         struct kvm_user_return_msrs *msrs
 362                 = container_of(urn, struct kvm_user_return_msrs, urn);
 363         struct kvm_user_return_msr_values *values;
 364         unsigned long flags;
 365
 366         /*
 367          * Disabling irqs at this point since the following code could be
 368          * interrupted and executed through kvm_arch_hardware_disable()
 369          */
 370         local_irq_save(flags);
 371         if (msrs->registered) {
 372                 msrs->registered = false;
 373                 user_return_notifier_unregister(urn);
 374         }
 375         local_irq_restore(flags);
 376         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 377                 values = &msrs->values[slot];
 378                 if (values->host != values->curr) {
 379                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 380                         values->curr = values->host;
 381                 }
 382         }
 383 }
 384
 385 static int kvm_probe_user_return_msr(u32 msr)
 386 {
 387         u64 val;
 388         int ret;
 389
 390         preempt_disable();
 391         ret = rdmsrl_safe(msr, &val);
 392         if (ret)
 393                 goto out;
 394         ret = wrmsrl_safe(msr, val);
 395 out:
 396         preempt_enable();
 397         return ret;
 398 }
 399
 400 int kvm_add_user_return_msr(u32 msr)
 401 {
 402         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 403
 404         if (kvm_probe_user_return_msr(msr))
 405                 return -1;
 406
 407         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 408         return kvm_nr_uret_msrs++;
 409 }
 410 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 411
 412 int kvm_find_user_return_msr(u32 msr)
 413 {
 414         int i;
 415
 416         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 417                 if (kvm_uret_msrs_list[i] == msr)
 418                         return i;
 419         }
 420         return -1;
 421 }
 422 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 423
 424 static void kvm_user_return_msr_cpu_online(void)
 425 {
 426         unsigned int cpu = smp_processor_id();
 427         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 428         u64 value;
 429         int i;
 430
 431         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 432                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 433                 msrs->values[i].host = value;
 434                 msrs->values[i].curr = value;
 435         }
 436 }
 437
 438 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 439 {
 440         unsigned int cpu = smp_processor_id();
 441         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 442         int err;
 443
 444         value = (value & mask) | (msrs->values[slot].host & ~mask);
 445         if (value == msrs->values[slot].curr)
 446                 return 0;
 447         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 448         if (err)
 449                 return 1;
 450
 451         msrs->values[slot].curr = value;
 452         if (!msrs->registered) {
 453                 msrs->urn.on_user_return = kvm_on_user_return;
 454                 user_return_notifier_register(&msrs->urn);
 455                 msrs->registered = true;
 456         }
 457         return 0;
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 460
 461 static void drop_user_return_notifiers(void)
 462 {
 463         unsigned int cpu = smp_processor_id();
 464         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 465
 466         if (msrs->registered)
 467                 kvm_on_user_return(&msrs->urn);
 468 }
 469
 470 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 471 {
 472         return vcpu->arch.apic_base;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 475
 476 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 477 {
 478         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 479 }
 480 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 481
 482 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 483 {
 484         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 485         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 486         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 487                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 488
 489         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 490                 return 1;
 491         if (!msr_info->host_initiated) {
 492                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 493                         return 1;
 494                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 495                         return 1;
 496         }
 497
 498         kvm_lapic_set_base(vcpu, msr_info->data);
 499         kvm_recalculate_apic_map(vcpu->kvm);
 500         return 0;
 501 }
 502 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 503
 504 /*
 505  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 506  *
 507  * Hardware virtualization extension instructions may fault if a reboot turns
 508  * off virtualization while processes are running.  Usually after catching the
 509  * fault we just panic; during reboot instead the instruction is ignored.
 510  */
 511 noinstr void kvm_spurious_fault(void)
 512 {
 513         /* Fault while not rebooting.  We want the trace. */
 514         BUG_ON(!kvm_rebooting);
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 517
 518 #define EXCPT_BENIGN            0
 519 #define EXCPT_CONTRIBUTORY      1
 520 #define EXCPT_PF                2
 521
 522 static int exception_class(int vector)
 523 {
 524         switch (vector) {
 525         case PF_VECTOR:
 526                 return EXCPT_PF;
 527         case DE_VECTOR:
 528         case TS_VECTOR:
 529         case NP_VECTOR:
 530         case SS_VECTOR:
 531         case GP_VECTOR:
 532                 return EXCPT_CONTRIBUTORY;
 533         default:
 534                 break;
 535         }
 536         return EXCPT_BENIGN;
 537 }
 538
 539 #define EXCPT_FAULT             0
 540 #define EXCPT_TRAP              1
 541 #define EXCPT_ABORT             2
 542 #define EXCPT_INTERRUPT         3
 543
 544 static int exception_type(int vector)
 545 {
 546         unsigned int mask;
 547
 548         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 549                 return EXCPT_INTERRUPT;
 550
 551         mask = 1 << vector;
 552
 553         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 554         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 555                 return EXCPT_TRAP;
 556
 557         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 558                 return EXCPT_ABORT;
 559
 560         /* Reserved exceptions will result in fault */
 561         return EXCPT_FAULT;
 562 }
 563
 564 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 565 {
 566         unsigned nr = vcpu->arch.exception.nr;
 567         bool has_payload = vcpu->arch.exception.has_payload;
 568         unsigned long payload = vcpu->arch.exception.payload;
 569
 570         if (!has_payload)
 571                 return;
 572
 573         switch (nr) {
 574         case DB_VECTOR:
 575                 /*
 576                  * "Certain debug exceptions may clear bit 0-3.  The
 577                  * remaining contents of the DR6 register are never
 578                  * cleared by the processor".
 579                  */
 580                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 581                 /*
 582                  * In order to reflect the #DB exception payload in guest
 583                  * dr6, three components need to be considered: active low
 584                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 585                  * DR6_BS and DR6_BT)
 586                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 587                  * In the target guest dr6:
 588                  * FIXED_1 bits should always be set.
 589                  * Active low bits should be cleared if 1-setting in payload.
 590                  * Active high bits should be set if 1-setting in payload.
 591                  *
 592                  * Note, the payload is compatible with the pending debug
 593                  * exceptions/exit qualification under VMX, that active_low bits
 594                  * are active high in payload.
 595                  * So they need to be flipped for DR6.
 596                  */
 597                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 598                 vcpu->arch.dr6 |= payload;
 599                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 600
 601                 /*
 602                  * The #DB payload is defined as compatible with the 'pending
 603                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 604                  * defined in the 'pending debug exceptions' field (enabled
 605                  * breakpoint), it is reserved and must be zero in DR6.
 606                  */
 607                 vcpu->arch.dr6 &= ~BIT(12);
 608                 break;
 609         case PF_VECTOR:
 610                 vcpu->arch.cr2 = payload;
 611                 break;
 612         }
 613
 614         vcpu->arch.exception.has_payload = false;
 615         vcpu->arch.exception.payload = 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 618
 619 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 620                 unsigned nr, bool has_error, u32 error_code,
 621                 bool has_payload, unsigned long payload, bool reinject)
 622 {
 623         u32 prev_nr;
 624         int class1, class2;
 625
 626         kvm_make_request(KVM_REQ_EVENT, vcpu);
 627
 628         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 629         queue:
 630                 if (reinject) {
 631                         /*
 632                          * On vmentry, vcpu->arch.exception.pending is only
 633                          * true if an event injection was blocked by
 634                          * nested_run_pending.  In that case, however,
 635                          * vcpu_enter_guest requests an immediate exit,
 636                          * and the guest shouldn't proceed far enough to
 637                          * need reinjection.
 638                          */
 639                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 640                         vcpu->arch.exception.injected = true;
 641                         if (WARN_ON_ONCE(has_payload)) {
 642                                 /*
 643                                  * A reinjected event has already
 644                                  * delivered its payload.
 645                                  */
 646                                 has_payload = false;
 647                                 payload = 0;
 648                         }
 649                 } else {
 650                         vcpu->arch.exception.pending = true;
 651                         vcpu->arch.exception.injected = false;
 652                 }
 653                 vcpu->arch.exception.has_error_code = has_error;
 654                 vcpu->arch.exception.nr = nr;
 655                 vcpu->arch.exception.error_code = error_code;
 656                 vcpu->arch.exception.has_payload = has_payload;
 657                 vcpu->arch.exception.payload = payload;
 658                 if (!is_guest_mode(vcpu))
 659                         kvm_deliver_exception_payload(vcpu);
 660                 return;
 661         }
 662
 663         /* to check exception */
 664         prev_nr = vcpu->arch.exception.nr;
 665         if (prev_nr == DF_VECTOR) {
 666                 /* triple fault -> shutdown */
 667                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 668                 return;
 669         }
 670         class1 = exception_class(prev_nr);
 671         class2 = exception_class(nr);
 672         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 673                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 674                 /*
 675                  * Generate double fault per SDM Table 5-5.  Set
 676                  * exception.pending = true so that the double fault
 677                  * can trigger a nested vmexit.
 678                  */
 679                 vcpu->arch.exception.pending = true;
 680                 vcpu->arch.exception.injected = false;
 681                 vcpu->arch.exception.has_error_code = true;
 682                 vcpu->arch.exception.nr = DF_VECTOR;
 683                 vcpu->arch.exception.error_code = 0;
 684                 vcpu->arch.exception.has_payload = false;
 685                 vcpu->arch.exception.payload = 0;
 686         } else
 687                 /* replace previous exception with a new one in a hope
 688                    that instruction re-execution will regenerate lost
 689                    exception */
 690                 goto queue;
 691 }
 692
 693 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 694 {
 695         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 698
 699 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 700 {
 701         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 702 }
 703 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 704
 705 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 706                            unsigned long payload)
 707 {
 708         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 709 }
 710 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 711
 712 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 713                                     u32 error_code, unsigned long payload)
 714 {
 715         kvm_multiple_exception(vcpu, nr, true, error_code,
 716                                true, payload, false);
 717 }
 718
 719 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 720 {
 721         if (err)
 722                 kvm_inject_gp(vcpu, 0);
 723         else
 724                 return kvm_skip_emulated_instruction(vcpu);
 725
 726         return 1;
 727 }
 728 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 729
 730 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 731 {
 732         if (err) {
 733                 kvm_inject_gp(vcpu, 0);
 734                 return 1;
 735         }
 736
 737         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 738                                        EMULTYPE_COMPLETE_USER_EXIT);
 739 }
 740
 741 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 742 {
 743         ++vcpu->stat.pf_guest;
 744         vcpu->arch.exception.nested_apf =
 745                 is_guest_mode(vcpu) && fault->async_page_fault;
 746         if (vcpu->arch.exception.nested_apf) {
 747                 vcpu->arch.apf.nested_apf_token = fault->address;
 748                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 749         } else {
 750                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 751                                         fault->address);
 752         }
 753 }
 754 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 755
 756 /* Returns true if the page fault was immediately morphed into a VM-Exit. */
 757 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 758                                     struct x86_exception *fault)
 759 {
 760         struct kvm_mmu *fault_mmu;
 761         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 762
 763         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 764                                                vcpu->arch.walk_mmu;
 765
 766         /*
 767          * Invalidate the TLB entry for the faulting address, if it exists,
 768          * else the access will fault indefinitely (and to emulate hardware).
 769          */
 770         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 771             !(fault->error_code & PFERR_RSVD_MASK))
 772                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 773                                        fault_mmu->root.hpa);
 774
 775         /*
 776          * A workaround for KVM's bad exception handling.  If KVM injected an
 777          * exception into L2, and L2 encountered a #PF while vectoring the
 778          * injected exception, manually check to see if L1 wants to intercept
 779          * #PF, otherwise queuing the #PF will lead to #DF or a lost exception.
 780          * In all other cases, defer the check to nested_ops->check_events(),
 781          * which will correctly handle priority (this does not).  Note, other
 782          * exceptions, e.g. #GP, are theoretically affected, #PF is simply the
 783          * most problematic, e.g. when L0 and L1 are both intercepting #PF for
 784          * shadow paging.
 785          *
 786          * TODO: Rewrite exception handling to track injected and pending
 787          *       (VM-Exit) exceptions separately.
 788          */
 789         if (unlikely(vcpu->arch.exception.injected && is_guest_mode(vcpu)) &&
 790             kvm_x86_ops.nested_ops->handle_page_fault_workaround(vcpu, fault))
 791                 return true;
 792
 793         fault_mmu->inject_page_fault(vcpu, fault);
 794         return false;
 795 }
 796 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 797
 798 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 799 {
 800         atomic_inc(&vcpu->arch.nmi_queued);
 801         kvm_make_request(KVM_REQ_NMI, vcpu);
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 804
 805 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 806 {
 807         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 808 }
 809 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 810
 811 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 812 {
 813         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 816
 817 /*
 818  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 819  * a #GP and return false.
 820  */
 821 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 822 {
 823         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 824                 return true;
 825         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 826         return false;
 827 }
 828 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 829
 830 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 831 {
 832         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 833                 return true;
 834
 835         kvm_queue_exception(vcpu, UD_VECTOR);
 836         return false;
 837 }
 838 EXPORT_SYMBOL_GPL(kvm_require_dr);
 839
 840 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 841 {
 842         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 843 }
 844
 845 /*
 846  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 847  */
 848 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 849 {
 850         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 851         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 852         gpa_t real_gpa;
 853         int i;
 854         int ret;
 855         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 856
 857         /*
 858          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 859          * to an L1 GPA.
 860          */
 861         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 862                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 863         if (real_gpa == UNMAPPED_GVA)
 864                 return 0;
 865
 866         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 867         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 868                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 869         if (ret < 0)
 870                 return 0;
 871
 872         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 873                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 874                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 875                         return 0;
 876                 }
 877         }
 878
 879         /*
 880          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 881          * Shadow page roots need to be reconstructed instead.
 882          */
 883         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 884                 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
 885
 886         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 887         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 888         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 889         vcpu->arch.pdptrs_from_userspace = false;
 890
 891         return 1;
 892 }
 893 EXPORT_SYMBOL_GPL(load_pdptrs);
 894
 895 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 896 {
 897         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 898                 kvm_clear_async_pf_completion_queue(vcpu);
 899                 kvm_async_pf_hash_reset(vcpu);
 900
 901                 /*
 902                  * Clearing CR0.PG is defined to flush the TLB from the guest's
 903                  * perspective.
 904                  */
 905                 if (!(cr0 & X86_CR0_PG))
 906                         kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
 907         }
 908
 909         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 910                 kvm_mmu_reset_context(vcpu);
 911
 912         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 913             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 914             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 915                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 916 }
 917 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 918
 919 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 920 {
 921         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 922
 923         cr0 |= X86_CR0_ET;
 924
 925 #ifdef CONFIG_X86_64
 926         if (cr0 & 0xffffffff00000000UL)
 927                 return 1;
 928 #endif
 929
 930         cr0 &= ~CR0_RESERVED_BITS;
 931
 932         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 933                 return 1;
 934
 935         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 936                 return 1;
 937
 938 #ifdef CONFIG_X86_64
 939         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 940             (cr0 & X86_CR0_PG)) {
 941                 int cs_db, cs_l;
 942
 943                 if (!is_pae(vcpu))
 944                         return 1;
 945                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 946                 if (cs_l)
 947                         return 1;
 948         }
 949 #endif
 950         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 951             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 952             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 953                 return 1;
 954
 955         if (!(cr0 & X86_CR0_PG) &&
 956             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 957                 return 1;
 958
 959         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 960
 961         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 962
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 966
 967 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 968 {
 969         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 970 }
 971 EXPORT_SYMBOL_GPL(kvm_lmsw);
 972
 973 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 974 {
 975         if (vcpu->arch.guest_state_protected)
 976                 return;
 977
 978         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 979
 980                 if (vcpu->arch.xcr0 != host_xcr0)
 981                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 982
 983                 if (vcpu->arch.xsaves_enabled &&
 984                     vcpu->arch.ia32_xss != host_xss)
 985                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 986         }
 987
 988 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
 989         if (static_cpu_has(X86_FEATURE_PKU) &&
 990             vcpu->arch.pkru != vcpu->arch.host_pkru &&
 991             ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
 992              kvm_read_cr4_bits(vcpu, X86_CR4_PKE)))
 993                 write_pkru(vcpu->arch.pkru);
 994 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
 995 }
 996 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 997
 998 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 999 {
1000         if (vcpu->arch.guest_state_protected)
1001                 return;
1002
1003 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1004         if (static_cpu_has(X86_FEATURE_PKU) &&
1005             ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1006              kvm_read_cr4_bits(vcpu, X86_CR4_PKE))) {
1007                 vcpu->arch.pkru = rdpkru();
1008                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
1009                         write_pkru(vcpu->arch.host_pkru);
1010         }
1011 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1012
1013         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
1014
1015                 if (vcpu->arch.xcr0 != host_xcr0)
1016                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1017
1018                 if (vcpu->arch.xsaves_enabled &&
1019                     vcpu->arch.ia32_xss != host_xss)
1020                         wrmsrl(MSR_IA32_XSS, host_xss);
1021         }
1022
1023 }
1024 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1025
1026 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
1027 {
1028         return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
1029 }
1030
1031 #ifdef CONFIG_X86_64
1032 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1033 {
1034         return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
1035 }
1036 #endif
1037
1038 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1039 {
1040         u64 xcr0 = xcr;
1041         u64 old_xcr0 = vcpu->arch.xcr0;
1042         u64 valid_bits;
1043
1044         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
1045         if (index != XCR_XFEATURE_ENABLED_MASK)
1046                 return 1;
1047         if (!(xcr0 & XFEATURE_MASK_FP))
1048                 return 1;
1049         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1050                 return 1;
1051
1052         /*
1053          * Do not allow the guest to set bits that we do not support
1054          * saving.  However, xcr0 bit 0 is always set, even if the
1055          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1056          */
1057         valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1058         if (xcr0 & ~valid_bits)
1059                 return 1;
1060
1061         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1062             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1063                 return 1;
1064
1065         if (xcr0 & XFEATURE_MASK_AVX512) {
1066                 if (!(xcr0 & XFEATURE_MASK_YMM))
1067                         return 1;
1068                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1069                         return 1;
1070         }
1071
1072         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1073             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1074                 return 1;
1075
1076         vcpu->arch.xcr0 = xcr0;
1077
1078         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1079                 kvm_update_cpuid_runtime(vcpu);
1080         return 0;
1081 }
1082
1083 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1084 {
1085         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1086             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1087                 kvm_inject_gp(vcpu, 0);
1088                 return 1;
1089         }
1090
1091         return kvm_skip_emulated_instruction(vcpu);
1092 }
1093 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1094
1095 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1096 {
1097         if (cr4 & cr4_reserved_bits)
1098                 return false;
1099
1100         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1101                 return false;
1102
1103         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1104 }
1105 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1106
1107 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1108 {
1109         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1110                 kvm_mmu_reset_context(vcpu);
1111
1112         /*
1113          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1114          * according to the SDM; however, stale prev_roots could be reused
1115          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1116          * free them all.  This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1117          * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1118          * so fall through.
1119          */
1120         if (!tdp_enabled &&
1121             (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1122                 kvm_mmu_unload(vcpu);
1123
1124         /*
1125          * The TLB has to be flushed for all PCIDs if any of the following
1126          * (architecturally required) changes happen:
1127          * - CR4.PCIDE is changed from 1 to 0
1128          * - CR4.PGE is toggled
1129          *
1130          * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1131          */
1132         if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1133             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1134                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1135
1136         /*
1137          * The TLB has to be flushed for the current PCID if any of the
1138          * following (architecturally required) changes happen:
1139          * - CR4.SMEP is changed from 0 to 1
1140          * - CR4.PAE is toggled
1141          */
1142         else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1143                  ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1144                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1145
1146 }
1147 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1148
1149 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1150 {
1151         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1152
1153         if (!kvm_is_valid_cr4(vcpu, cr4))
1154                 return 1;
1155
1156         if (is_long_mode(vcpu)) {
1157                 if (!(cr4 & X86_CR4_PAE))
1158                         return 1;
1159                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1160                         return 1;
1161         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1162                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1163                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1164                 return 1;
1165
1166         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1167                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1168                         return 1;
1169
1170                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1171                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1172                         return 1;
1173         }
1174
1175         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1176
1177         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1178
1179         return 0;
1180 }
1181 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1182
1183 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1184 {
1185         struct kvm_mmu *mmu = vcpu->arch.mmu;
1186         unsigned long roots_to_free = 0;
1187         int i;
1188
1189         /*
1190          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1191          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1192          * also via the emulator.  KVM's TDP page tables are not in the scope of
1193          * the invalidation, but the guest's TLB entries need to be flushed as
1194          * the CPU may have cached entries in its TLB for the target PCID.
1195          */
1196         if (unlikely(tdp_enabled)) {
1197                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1198                 return;
1199         }
1200
1201         /*
1202          * If neither the current CR3 nor any of the prev_roots use the given
1203          * PCID, then nothing needs to be done here because a resync will
1204          * happen anyway before switching to any other CR3.
1205          */
1206         if (kvm_get_active_pcid(vcpu) == pcid) {
1207                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1208                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1209         }
1210
1211         /*
1212          * If PCID is disabled, there is no need to free prev_roots even if the
1213          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1214          * with PCIDE=0.
1215          */
1216         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1217                 return;
1218
1219         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1220                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1221                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1222
1223         kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1224 }
1225
1226 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1227 {
1228         bool skip_tlb_flush = false;
1229         unsigned long pcid = 0;
1230 #ifdef CONFIG_X86_64
1231         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1232
1233         if (pcid_enabled) {
1234                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1235                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1236                 pcid = cr3 & X86_CR3_PCID_MASK;
1237         }
1238 #endif
1239
1240         /* PDPTRs are always reloaded for PAE paging. */
1241         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1242                 goto handle_tlb_flush;
1243
1244         /*
1245          * Do not condition the GPA check on long mode, this helper is used to
1246          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1247          * the current vCPU mode is accurate.
1248          */
1249         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1250                 return 1;
1251
1252         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1253                 return 1;
1254
1255         if (cr3 != kvm_read_cr3(vcpu))
1256                 kvm_mmu_new_pgd(vcpu, cr3);
1257
1258         vcpu->arch.cr3 = cr3;
1259         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1260         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1261
1262 handle_tlb_flush:
1263         /*
1264          * A load of CR3 that flushes the TLB flushes only the current PCID,
1265          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1266          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1267          * and it's impossible to use a non-zero PCID when PCID is disabled,
1268          * i.e. only PCID=0 can be relevant.
1269          */
1270         if (!skip_tlb_flush)
1271                 kvm_invalidate_pcid(vcpu, pcid);
1272
1273         return 0;
1274 }
1275 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1276
1277 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1278 {
1279         if (cr8 & CR8_RESERVED_BITS)
1280                 return 1;
1281         if (lapic_in_kernel(vcpu))
1282                 kvm_lapic_set_tpr(vcpu, cr8);
1283         else
1284                 vcpu->arch.cr8 = cr8;
1285         return 0;
1286 }
1287 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1288
1289 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1290 {
1291         if (lapic_in_kernel(vcpu))
1292                 return kvm_lapic_get_cr8(vcpu);
1293         else
1294                 return vcpu->arch.cr8;
1295 }
1296 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1297
1298 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1299 {
1300         int i;
1301
1302         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1303                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1304                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1305         }
1306 }
1307
1308 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1309 {
1310         unsigned long dr7;
1311
1312         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1313                 dr7 = vcpu->arch.guest_debug_dr7;
1314         else
1315                 dr7 = vcpu->arch.dr7;
1316         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1317         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1318         if (dr7 & DR7_BP_EN_MASK)
1319                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1320 }
1321 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1322
1323 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1324 {
1325         u64 fixed = DR6_FIXED_1;
1326
1327         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1328                 fixed |= DR6_RTM;
1329
1330         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1331                 fixed |= DR6_BUS_LOCK;
1332         return fixed;
1333 }
1334
1335 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1336 {
1337         size_t size = ARRAY_SIZE(vcpu->arch.db);
1338
1339         switch (dr) {
1340         case 0 ... 3:
1341                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1342                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1343                         vcpu->arch.eff_db[dr] = val;
1344                 break;
1345         case 4:
1346         case 6:
1347                 if (!kvm_dr6_valid(val))
1348                         return 1; /* #GP */
1349                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1350                 break;
1351         case 5:
1352         default: /* 7 */
1353                 if (!kvm_dr7_valid(val))
1354                         return 1; /* #GP */
1355                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1356                 kvm_update_dr7(vcpu);
1357                 break;
1358         }
1359
1360         return 0;
1361 }
1362 EXPORT_SYMBOL_GPL(kvm_set_dr);
1363
1364 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1365 {
1366         size_t size = ARRAY_SIZE(vcpu->arch.db);
1367
1368         switch (dr) {
1369         case 0 ... 3:
1370                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1371                 break;
1372         case 4:
1373         case 6:
1374                 *val = vcpu->arch.dr6;
1375                 break;
1376         case 5:
1377         default: /* 7 */
1378                 *val = vcpu->arch.dr7;
1379                 break;
1380         }
1381 }
1382 EXPORT_SYMBOL_GPL(kvm_get_dr);
1383
1384 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1385 {
1386         u32 ecx = kvm_rcx_read(vcpu);
1387         u64 data;
1388
1389         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1390                 kvm_inject_gp(vcpu, 0);
1391                 return 1;
1392         }
1393
1394         kvm_rax_write(vcpu, (u32)data);
1395         kvm_rdx_write(vcpu, data >> 32);
1396         return kvm_skip_emulated_instruction(vcpu);
1397 }
1398 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1399
1400 /*
1401  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1402  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1403  *
1404  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1405  * extract the supported MSRs from the related const lists.
1406  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1407  * capabilities of the host cpu. This capabilities test skips MSRs that are
1408  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1409  * may depend on host virtualization features rather than host cpu features.
1410  */
1411
1412 static const u32 msrs_to_save_all[] = {
1413         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1414         MSR_STAR,
1415 #ifdef CONFIG_X86_64
1416         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1417 #endif
1418         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1419         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1420         MSR_IA32_SPEC_CTRL,
1421         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1422         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1423         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1424         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1425         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1426         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1427         MSR_IA32_UMWAIT_CONTROL,
1428
1429         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1430         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1431         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1432         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1433         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1434         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1435         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1436         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1437         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1438         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1439         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1440         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1441         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1442         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1443         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1444         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1445         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1446         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1447         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1448         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1449         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1450         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1451
1452         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1453         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1454         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1455         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1456         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1457         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1458         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1459 };
1460
1461 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1462 static unsigned num_msrs_to_save;
1463
1464 static const u32 emulated_msrs_all[] = {
1465         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1466         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1467         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1468         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1469         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1470         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1471         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1472         HV_X64_MSR_RESET,
1473         HV_X64_MSR_VP_INDEX,
1474         HV_X64_MSR_VP_RUNTIME,
1475         HV_X64_MSR_SCONTROL,
1476         HV_X64_MSR_STIMER0_CONFIG,
1477         HV_X64_MSR_VP_ASSIST_PAGE,
1478         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1479         HV_X64_MSR_TSC_EMULATION_STATUS,
1480         HV_X64_MSR_SYNDBG_OPTIONS,
1481         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1482         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1483         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1484
1485         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1486         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1487
1488         MSR_IA32_TSC_ADJUST,
1489         MSR_IA32_TSC_DEADLINE,
1490         MSR_IA32_ARCH_CAPABILITIES,
1491         MSR_IA32_PERF_CAPABILITIES,
1492         MSR_IA32_MISC_ENABLE,
1493         MSR_IA32_MCG_STATUS,
1494         MSR_IA32_MCG_CTL,
1495         MSR_IA32_MCG_EXT_CTL,
1496         MSR_IA32_SMBASE,
1497         MSR_SMI_COUNT,
1498         MSR_PLATFORM_INFO,
1499         MSR_MISC_FEATURES_ENABLES,
1500         MSR_AMD64_VIRT_SPEC_CTRL,
1501         MSR_AMD64_TSC_RATIO,
1502         MSR_IA32_POWER_CTL,
1503         MSR_IA32_UCODE_REV,
1504
1505         /*
1506          * The following list leaves out MSRs whose values are determined
1507          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1508          * We always support the "true" VMX control MSRs, even if the host
1509          * processor does not, so I am putting these registers here rather
1510          * than in msrs_to_save_all.
1511          */
1512         MSR_IA32_VMX_BASIC,
1513         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1514         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1515         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1516         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1517         MSR_IA32_VMX_MISC,
1518         MSR_IA32_VMX_CR0_FIXED0,
1519         MSR_IA32_VMX_CR4_FIXED0,
1520         MSR_IA32_VMX_VMCS_ENUM,
1521         MSR_IA32_VMX_PROCBASED_CTLS2,
1522         MSR_IA32_VMX_EPT_VPID_CAP,
1523         MSR_IA32_VMX_VMFUNC,
1524
1525         MSR_K7_HWCR,
1526         MSR_KVM_POLL_CONTROL,
1527 };
1528
1529 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1530 static unsigned num_emulated_msrs;
1531
1532 /*
1533  * List of msr numbers which are used to expose MSR-based features that
1534  * can be used by a hypervisor to validate requested CPU features.
1535  */
1536 static const u32 msr_based_features_all[] = {
1537         MSR_IA32_VMX_BASIC,
1538         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1539         MSR_IA32_VMX_PINBASED_CTLS,
1540         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1541         MSR_IA32_VMX_PROCBASED_CTLS,
1542         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1543         MSR_IA32_VMX_EXIT_CTLS,
1544         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1545         MSR_IA32_VMX_ENTRY_CTLS,
1546         MSR_IA32_VMX_MISC,
1547         MSR_IA32_VMX_CR0_FIXED0,
1548         MSR_IA32_VMX_CR0_FIXED1,
1549         MSR_IA32_VMX_CR4_FIXED0,
1550         MSR_IA32_VMX_CR4_FIXED1,
1551         MSR_IA32_VMX_VMCS_ENUM,
1552         MSR_IA32_VMX_PROCBASED_CTLS2,
1553         MSR_IA32_VMX_EPT_VPID_CAP,
1554         MSR_IA32_VMX_VMFUNC,
1555
1556         MSR_F10H_DECFG,
1557         MSR_IA32_UCODE_REV,
1558         MSR_IA32_ARCH_CAPABILITIES,
1559         MSR_IA32_PERF_CAPABILITIES,
1560 };
1561
1562 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1563 static unsigned int num_msr_based_features;
1564
1565 static u64 kvm_get_arch_capabilities(void)
1566 {
1567         u64 data = 0;
1568
1569         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1570                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1571
1572         /*
1573          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1574          * the nested hypervisor runs with NX huge pages.  If it is not,
1575          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1576          * L1 guests, so it need not worry about its own (L2) guests.
1577          */
1578         data |= ARCH_CAP_PSCHANGE_MC_NO;
1579
1580         /*
1581          * If we're doing cache flushes (either "always" or "cond")
1582          * we will do one whenever the guest does a vmlaunch/vmresume.
1583          * If an outer hypervisor is doing the cache flush for us
1584          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1585          * capability to the guest too, and if EPT is disabled we're not
1586          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1587          * require a nested hypervisor to do a flush of its own.
1588          */
1589         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1590                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1591
1592         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1593                 data |= ARCH_CAP_RDCL_NO;
1594         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1595                 data |= ARCH_CAP_SSB_NO;
1596         if (!boot_cpu_has_bug(X86_BUG_MDS))
1597                 data |= ARCH_CAP_MDS_NO;
1598
1599         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1600                 /*
1601                  * If RTM=0 because the kernel has disabled TSX, the host might
1602                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1603                  * and therefore knows that there cannot be TAA) but keep
1604                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1605                  * and we want to allow migrating those guests to tsx=off hosts.
1606                  */
1607                 data &= ~ARCH_CAP_TAA_NO;
1608         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1609                 data |= ARCH_CAP_TAA_NO;
1610         } else {
1611                 /*
1612                  * Nothing to do here; we emulate TSX_CTRL if present on the
1613                  * host so the guest can choose between disabling TSX or
1614                  * using VERW to clear CPU buffers.
1615                  */
1616         }
1617
1618         return data;
1619 }
1620
1621 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1622 {
1623         switch (msr->index) {
1624         case MSR_IA32_ARCH_CAPABILITIES:
1625                 msr->data = kvm_get_arch_capabilities();
1626                 break;
1627         case MSR_IA32_UCODE_REV:
1628                 rdmsrl_safe(msr->index, &msr->data);
1629                 break;
1630         default:
1631                 return static_call(kvm_x86_get_msr_feature)(msr);
1632         }
1633         return 0;
1634 }
1635
1636 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1637 {
1638         struct kvm_msr_entry msr;
1639         int r;
1640
1641         msr.index = index;
1642         r = kvm_get_msr_feature(&msr);
1643
1644         if (r == KVM_MSR_RET_INVALID) {
1645                 /* Unconditionally clear the output for simplicity */
1646                 *data = 0;
1647                 if (kvm_msr_ignored_check(index, 0, false))
1648                         r = 0;
1649         }
1650
1651         if (r)
1652                 return r;
1653
1654         *data = msr.data;
1655
1656         return 0;
1657 }
1658
1659 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1660 {
1661         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1662                 return false;
1663
1664         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1665                 return false;
1666
1667         if (efer & (EFER_LME | EFER_LMA) &&
1668             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1669                 return false;
1670
1671         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1672                 return false;
1673
1674         return true;
1675
1676 }
1677 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1678 {
1679         if (efer & efer_reserved_bits)
1680                 return false;
1681
1682         return __kvm_valid_efer(vcpu, efer);
1683 }
1684 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1685
1686 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1687 {
1688         u64 old_efer = vcpu->arch.efer;
1689         u64 efer = msr_info->data;
1690         int r;
1691
1692         if (efer & efer_reserved_bits)
1693                 return 1;
1694
1695         if (!msr_info->host_initiated) {
1696                 if (!__kvm_valid_efer(vcpu, efer))
1697                         return 1;
1698
1699                 if (is_paging(vcpu) &&
1700                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1701                         return 1;
1702         }
1703
1704         efer &= ~EFER_LMA;
1705         efer |= vcpu->arch.efer & EFER_LMA;
1706
1707         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1708         if (r) {
1709                 WARN_ON(r > 0);
1710                 return r;
1711         }
1712
1713         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1714                 kvm_mmu_reset_context(vcpu);
1715
1716         return 0;
1717 }
1718
1719 void kvm_enable_efer_bits(u64 mask)
1720 {
1721        efer_reserved_bits &= ~mask;
1722 }
1723 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1724
1725 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1726 {
1727         struct kvm_x86_msr_filter *msr_filter;
1728         struct msr_bitmap_range *ranges;
1729         struct kvm *kvm = vcpu->kvm;
1730         bool allowed;
1731         int idx;
1732         u32 i;
1733
1734         /* x2APIC MSRs do not support filtering. */
1735         if (index >= 0x800 && index <= 0x8ff)
1736                 return true;
1737
1738         idx = srcu_read_lock(&kvm->srcu);
1739
1740         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1741         if (!msr_filter) {
1742                 allowed = true;
1743                 goto out;
1744         }
1745
1746         allowed = msr_filter->default_allow;
1747         ranges = msr_filter->ranges;
1748
1749         for (i = 0; i < msr_filter->count; i++) {
1750                 u32 start = ranges[i].base;
1751                 u32 end = start + ranges[i].nmsrs;
1752                 u32 flags = ranges[i].flags;
1753                 unsigned long *bitmap = ranges[i].bitmap;
1754
1755                 if ((index >= start) && (index < end) && (flags & type)) {
1756                         allowed = !!test_bit(index - start, bitmap);
1757                         break;
1758                 }
1759         }
1760
1761 out:
1762         srcu_read_unlock(&kvm->srcu, idx);
1763
1764         return allowed;
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1767
1768 /*
1769  * Write @data into the MSR specified by @index.  Select MSR specific fault
1770  * checks are bypassed if @host_initiated is %true.
1771  * Returns 0 on success, non-0 otherwise.
1772  * Assumes vcpu_load() was already called.
1773  */
1774 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1775                          bool host_initiated)
1776 {
1777         struct msr_data msr;
1778
1779         switch (index) {
1780         case MSR_FS_BASE:
1781         case MSR_GS_BASE:
1782         case MSR_KERNEL_GS_BASE:
1783         case MSR_CSTAR:
1784         case MSR_LSTAR:
1785                 if (is_noncanonical_address(data, vcpu))
1786                         return 1;
1787                 break;
1788         case MSR_IA32_SYSENTER_EIP:
1789         case MSR_IA32_SYSENTER_ESP:
1790                 /*
1791                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1792                  * non-canonical address is written on Intel but not on
1793                  * AMD (which ignores the top 32-bits, because it does
1794                  * not implement 64-bit SYSENTER).
1795                  *
1796                  * 64-bit code should hence be able to write a non-canonical
1797                  * value on AMD.  Making the address canonical ensures that
1798                  * vmentry does not fail on Intel after writing a non-canonical
1799                  * value, and that something deterministic happens if the guest
1800                  * invokes 64-bit SYSENTER.
1801                  */
1802                 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1803                 break;
1804         case MSR_TSC_AUX:
1805                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1806                         return 1;
1807
1808                 if (!host_initiated &&
1809                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1810                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1811                         return 1;
1812
1813                 /*
1814                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1815                  * incomplete and conflicting architectural behavior.  Current
1816                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1817                  * reserved and always read as zeros.  Enforce Intel's reserved
1818                  * bits check if and only if the guest CPU is Intel, and clear
1819                  * the bits in all other cases.  This ensures cross-vendor
1820                  * migration will provide consistent behavior for the guest.
1821                  */
1822                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1823                         return 1;
1824
1825                 data = (u32)data;
1826                 break;
1827         }
1828
1829         msr.data = data;
1830         msr.index = index;
1831         msr.host_initiated = host_initiated;
1832
1833         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1834 }
1835
1836 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1837                                      u32 index, u64 data, bool host_initiated)
1838 {
1839         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1840
1841         if (ret == KVM_MSR_RET_INVALID)
1842                 if (kvm_msr_ignored_check(index, data, true))
1843                         ret = 0;
1844
1845         return ret;
1846 }
1847
1848 /*
1849  * Read the MSR specified by @index into @data.  Select MSR specific fault
1850  * checks are bypassed if @host_initiated is %true.
1851  * Returns 0 on success, non-0 otherwise.
1852  * Assumes vcpu_load() was already called.
1853  */
1854 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1855                   bool host_initiated)
1856 {
1857         struct msr_data msr;
1858         int ret;
1859
1860         switch (index) {
1861         case MSR_TSC_AUX:
1862                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1863                         return 1;
1864
1865                 if (!host_initiated &&
1866                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1867                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1868                         return 1;
1869                 break;
1870         }
1871
1872         msr.index = index;
1873         msr.host_initiated = host_initiated;
1874
1875         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1876         if (!ret)
1877                 *data = msr.data;
1878         return ret;
1879 }
1880
1881 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1882                                      u32 index, u64 *data, bool host_initiated)
1883 {
1884         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1885
1886         if (ret == KVM_MSR_RET_INVALID) {
1887                 /* Unconditionally clear *data for simplicity */
1888                 *data = 0;
1889                 if (kvm_msr_ignored_check(index, 0, false))
1890                         ret = 0;
1891         }
1892
1893         return ret;
1894 }
1895
1896 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1897 {
1898         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1899                 return KVM_MSR_RET_FILTERED;
1900         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1901 }
1902
1903 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1904 {
1905         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1906                 return KVM_MSR_RET_FILTERED;
1907         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1908 }
1909
1910 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1911 {
1912         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1913 }
1914 EXPORT_SYMBOL_GPL(kvm_get_msr);
1915
1916 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1917 {
1918         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1919 }
1920 EXPORT_SYMBOL_GPL(kvm_set_msr);
1921
1922 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1923 {
1924         if (!vcpu->run->msr.error) {
1925                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1926                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1927         }
1928 }
1929
1930 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1931 {
1932         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1933 }
1934
1935 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1936 {
1937         complete_userspace_rdmsr(vcpu);
1938         return complete_emulated_msr_access(vcpu);
1939 }
1940
1941 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1942 {
1943         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1944 }
1945
1946 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1947 {
1948         complete_userspace_rdmsr(vcpu);
1949         return complete_fast_msr_access(vcpu);
1950 }
1951
1952 static u64 kvm_msr_reason(int r)
1953 {
1954         switch (r) {
1955         case KVM_MSR_RET_INVALID:
1956                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1957         case KVM_MSR_RET_FILTERED:
1958                 return KVM_MSR_EXIT_REASON_FILTER;
1959         default:
1960                 return KVM_MSR_EXIT_REASON_INVAL;
1961         }
1962 }
1963
1964 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1965                               u32 exit_reason, u64 data,
1966                               int (*completion)(struct kvm_vcpu *vcpu),
1967                               int r)
1968 {
1969         u64 msr_reason = kvm_msr_reason(r);
1970
1971         /* Check if the user wanted to know about this MSR fault */
1972         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1973                 return 0;
1974
1975         vcpu->run->exit_reason = exit_reason;
1976         vcpu->run->msr.error = 0;
1977         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1978         vcpu->run->msr.reason = msr_reason;
1979         vcpu->run->msr.index = index;
1980         vcpu->run->msr.data = data;
1981         vcpu->arch.complete_userspace_io = completion;
1982
1983         return 1;
1984 }
1985
1986 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1987 {
1988         u32 ecx = kvm_rcx_read(vcpu);
1989         u64 data;
1990         int r;
1991
1992         r = kvm_get_msr_with_filter(vcpu, ecx, &data);
1993
1994         if (!r) {
1995                 trace_kvm_msr_read(ecx, data);
1996
1997                 kvm_rax_write(vcpu, data & -1u);
1998                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1999         } else {
2000                 /* MSR read failed? See if we should ask user space */
2001                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2002                                        complete_fast_rdmsr, r))
2003                         return 0;
2004                 trace_kvm_msr_read_ex(ecx);
2005         }
2006
2007         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2008 }
2009 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2010
2011 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2012 {
2013         u32 ecx = kvm_rcx_read(vcpu);
2014         u64 data = kvm_read_edx_eax(vcpu);
2015         int r;
2016
2017         r = kvm_set_msr_with_filter(vcpu, ecx, data);
2018
2019         if (!r) {
2020                 trace_kvm_msr_write(ecx, data);
2021         } else {
2022                 /* MSR write failed? See if we should ask user space */
2023                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2024                                        complete_fast_msr_access, r))
2025                         return 0;
2026                 /* Signal all other negative errors to userspace */
2027                 if (r < 0)
2028                         return r;
2029                 trace_kvm_msr_write_ex(ecx, data);
2030         }
2031
2032         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2033 }
2034 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2035
2036 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2037 {
2038         return kvm_skip_emulated_instruction(vcpu);
2039 }
2040 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
2041
2042 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2043 {
2044         /* Treat an INVD instruction as a NOP and just skip it. */
2045         return kvm_emulate_as_nop(vcpu);
2046 }
2047 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2048
2049 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2050 {
2051         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
2052         return kvm_emulate_as_nop(vcpu);
2053 }
2054 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2055
2056 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2057 {
2058         kvm_queue_exception(vcpu, UD_VECTOR);
2059         return 1;
2060 }
2061 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2062
2063 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2064 {
2065         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2066         return kvm_emulate_as_nop(vcpu);
2067 }
2068 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2069
2070 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2071 {
2072         xfer_to_guest_mode_prepare();
2073         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2074                 xfer_to_guest_mode_work_pending();
2075 }
2076
2077 /*
2078  * The fast path for frequent and performance sensitive wrmsr emulation,
2079  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2080  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2081  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2082  * other cases which must be called after interrupts are enabled on the host.
2083  */
2084 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2085 {
2086         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2087                 return 1;
2088
2089         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2090             ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2091             ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2092             ((u32)(data >> 32) != X2APIC_BROADCAST))
2093                 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2094
2095         return 1;
2096 }
2097
2098 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2099 {
2100         if (!kvm_can_use_hv_timer(vcpu))
2101                 return 1;
2102
2103         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2104         return 0;
2105 }
2106
2107 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2108 {
2109         u32 msr = kvm_rcx_read(vcpu);
2110         u64 data;
2111         fastpath_t ret = EXIT_FASTPATH_NONE;
2112
2113         switch (msr) {
2114         case APIC_BASE_MSR + (APIC_ICR >> 4):
2115                 data = kvm_read_edx_eax(vcpu);
2116                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2117                         kvm_skip_emulated_instruction(vcpu);
2118                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2119                 }
2120                 break;
2121         case MSR_IA32_TSC_DEADLINE:
2122                 data = kvm_read_edx_eax(vcpu);
2123                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2124                         kvm_skip_emulated_instruction(vcpu);
2125                         ret = EXIT_FASTPATH_REENTER_GUEST;
2126                 }
2127                 break;
2128         default:
2129                 break;
2130         }
2131
2132         if (ret != EXIT_FASTPATH_NONE)
2133                 trace_kvm_msr_write(msr, data);
2134
2135         return ret;
2136 }
2137 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2138
2139 /*
2140  * Adapt set_msr() to msr_io()'s calling convention
2141  */
2142 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2143 {
2144         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2145 }
2146
2147 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2148 {
2149         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2150 }
2151
2152 #ifdef CONFIG_X86_64
2153 struct pvclock_clock {
2154         int vclock_mode;
2155         u64 cycle_last;
2156         u64 mask;
2157         u32 mult;
2158         u32 shift;
2159         u64 base_cycles;
2160         u64 offset;
2161 };
2162
2163 struct pvclock_gtod_data {
2164         seqcount_t      seq;
2165
2166         struct pvclock_clock clock; /* extract of a clocksource struct */
2167         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2168
2169         ktime_t         offs_boot;
2170         u64             wall_time_sec;
2171 };
2172
2173 static struct pvclock_gtod_data pvclock_gtod_data;
2174
2175 static void update_pvclock_gtod(struct timekeeper *tk)
2176 {
2177         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2178
2179         write_seqcount_begin(&vdata->seq);
2180
2181         /* copy pvclock gtod data */
2182         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2183         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2184         vdata->clock.mask               = tk->tkr_mono.mask;
2185         vdata->clock.mult               = tk->tkr_mono.mult;
2186         vdata->clock.shift              = tk->tkr_mono.shift;
2187         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2188         vdata->clock.offset             = tk->tkr_mono.base;
2189
2190         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2191         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2192         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2193         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2194         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2195         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2196         vdata->raw_clock.offset         = tk->tkr_raw.base;
2197
2198         vdata->wall_time_sec            = tk->xtime_sec;
2199
2200         vdata->offs_boot                = tk->offs_boot;
2201
2202         write_seqcount_end(&vdata->seq);
2203 }
2204
2205 static s64 get_kvmclock_base_ns(void)
2206 {
2207         /* Count up from boot time, but with the frequency of the raw clock.  */
2208         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2209 }
2210 #else
2211 static s64 get_kvmclock_base_ns(void)
2212 {
2213         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2214         return ktime_get_boottime_ns();
2215 }
2216 #endif
2217
2218 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2219 {
2220         int version;
2221         int r;
2222         struct pvclock_wall_clock wc;
2223         u32 wc_sec_hi;
2224         u64 wall_nsec;
2225
2226         if (!wall_clock)
2227                 return;
2228
2229         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2230         if (r)
2231                 return;
2232
2233         if (version & 1)
2234                 ++version;  /* first time write, random junk */
2235
2236         ++version;
2237
2238         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2239                 return;
2240
2241         /*
2242          * The guest calculates current wall clock time by adding
2243          * system time (updated by kvm_guest_time_update below) to the
2244          * wall clock specified here.  We do the reverse here.
2245          */
2246         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2247
2248         wc.nsec = do_div(wall_nsec, 1000000000);
2249         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2250         wc.version = version;
2251
2252         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2253
2254         if (sec_hi_ofs) {
2255                 wc_sec_hi = wall_nsec >> 32;
2256                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2257                                 &wc_sec_hi, sizeof(wc_sec_hi));
2258         }
2259
2260         version++;
2261         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2262 }
2263
2264 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2265                                   bool old_msr, bool host_initiated)
2266 {
2267         struct kvm_arch *ka = &vcpu->kvm->arch;
2268
2269         if (vcpu->vcpu_id == 0 && !host_initiated) {
2270                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2271                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2272
2273                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2274         }
2275
2276         vcpu->arch.time = system_time;
2277         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2278
2279         /* we verify if the enable bit is set... */
2280         if (system_time & 1) {
2281                 kvm_gfn_to_pfn_cache_init(vcpu->kvm, &vcpu->arch.pv_time, vcpu,
2282                                           KVM_HOST_USES_PFN, system_time & ~1ULL,
2283                                           sizeof(struct pvclock_vcpu_time_info));
2284         } else {
2285                 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
2286         }
2287
2288         return;
2289 }
2290
2291 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2292 {
2293         do_shl32_div32(dividend, divisor);
2294         return dividend;
2295 }
2296
2297 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2298                                s8 *pshift, u32 *pmultiplier)
2299 {
2300         uint64_t scaled64;
2301         int32_t  shift = 0;
2302         uint64_t tps64;
2303         uint32_t tps32;
2304
2305         tps64 = base_hz;
2306         scaled64 = scaled_hz;
2307         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2308                 tps64 >>= 1;
2309                 shift--;
2310         }
2311
2312         tps32 = (uint32_t)tps64;
2313         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2314                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2315                         scaled64 >>= 1;
2316                 else
2317                         tps32 <<= 1;
2318                 shift++;
2319         }
2320
2321         *pshift = shift;
2322         *pmultiplier = div_frac(scaled64, tps32);
2323 }
2324
2325 #ifdef CONFIG_X86_64
2326 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2327 #endif
2328
2329 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2330 static unsigned long max_tsc_khz;
2331
2332 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2333 {
2334         u64 v = (u64)khz * (1000000 + ppm);
2335         do_div(v, 1000000);
2336         return v;
2337 }
2338
2339 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2340
2341 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2342 {
2343         u64 ratio;
2344
2345         /* Guest TSC same frequency as host TSC? */
2346         if (!scale) {
2347                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2348                 return 0;
2349         }
2350
2351         /* TSC scaling supported? */
2352         if (!kvm_has_tsc_control) {
2353                 if (user_tsc_khz > tsc_khz) {
2354                         vcpu->arch.tsc_catchup = 1;
2355                         vcpu->arch.tsc_always_catchup = 1;
2356                         return 0;
2357                 } else {
2358                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2359                         return -1;
2360                 }
2361         }
2362
2363         /* TSC scaling required  - calculate ratio */
2364         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2365                                 user_tsc_khz, tsc_khz);
2366
2367         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2368                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2369                                     user_tsc_khz);
2370                 return -1;
2371         }
2372
2373         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2374         return 0;
2375 }
2376
2377 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2378 {
2379         u32 thresh_lo, thresh_hi;
2380         int use_scaling = 0;
2381
2382         /* tsc_khz can be zero if TSC calibration fails */
2383         if (user_tsc_khz == 0) {
2384                 /* set tsc_scaling_ratio to a safe value */
2385                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2386                 return -1;
2387         }
2388
2389         /* Compute a scale to convert nanoseconds in TSC cycles */
2390         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2391                            &vcpu->arch.virtual_tsc_shift,
2392                            &vcpu->arch.virtual_tsc_mult);
2393         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2394
2395         /*
2396          * Compute the variation in TSC rate which is acceptable
2397          * within the range of tolerance and decide if the
2398          * rate being applied is within that bounds of the hardware
2399          * rate.  If so, no scaling or compensation need be done.
2400          */
2401         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2402         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2403         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2404                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2405                 use_scaling = 1;
2406         }
2407         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2408 }
2409
2410 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2411 {
2412         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2413                                       vcpu->arch.virtual_tsc_mult,
2414                                       vcpu->arch.virtual_tsc_shift);
2415         tsc += vcpu->arch.this_tsc_write;
2416         return tsc;
2417 }
2418
2419 #ifdef CONFIG_X86_64
2420 static inline int gtod_is_based_on_tsc(int mode)
2421 {
2422         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2423 }
2424 #endif
2425
2426 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2427 {
2428 #ifdef CONFIG_X86_64
2429         bool vcpus_matched;
2430         struct kvm_arch *ka = &vcpu->kvm->arch;
2431         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2432
2433         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2434                          atomic_read(&vcpu->kvm->online_vcpus));
2435
2436         /*
2437          * Once the masterclock is enabled, always perform request in
2438          * order to update it.
2439          *
2440          * In order to enable masterclock, the host clocksource must be TSC
2441          * and the vcpus need to have matched TSCs.  When that happens,
2442          * perform request to enable masterclock.
2443          */
2444         if (ka->use_master_clock ||
2445             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2446                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2447
2448         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2449                             atomic_read(&vcpu->kvm->online_vcpus),
2450                             ka->use_master_clock, gtod->clock.vclock_mode);
2451 #endif
2452 }
2453
2454 /*
2455  * Multiply tsc by a fixed point number represented by ratio.
2456  *
2457  * The most significant 64-N bits (mult) of ratio represent the
2458  * integral part of the fixed point number; the remaining N bits
2459  * (frac) represent the fractional part, ie. ratio represents a fixed
2460  * point number (mult + frac * 2^(-N)).
2461  *
2462  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2463  */
2464 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2465 {
2466         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2467 }
2468
2469 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2470 {
2471         u64 _tsc = tsc;
2472
2473         if (ratio != kvm_default_tsc_scaling_ratio)
2474                 _tsc = __scale_tsc(ratio, tsc);
2475
2476         return _tsc;
2477 }
2478 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2479
2480 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2481 {
2482         u64 tsc;
2483
2484         tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2485
2486         return target_tsc - tsc;
2487 }
2488
2489 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2490 {
2491         return vcpu->arch.l1_tsc_offset +
2492                 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2493 }
2494 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2495
2496 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2497 {
2498         u64 nested_offset;
2499
2500         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2501                 nested_offset = l1_offset;
2502         else
2503                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2504                                                 kvm_tsc_scaling_ratio_frac_bits);
2505
2506         nested_offset += l2_offset;
2507         return nested_offset;
2508 }
2509 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2510
2511 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2512 {
2513         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2514                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2515                                        kvm_tsc_scaling_ratio_frac_bits);
2516
2517         return l1_multiplier;
2518 }
2519 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2520
2521 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2522 {
2523         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2524                                    vcpu->arch.l1_tsc_offset,
2525                                    l1_offset);
2526
2527         vcpu->arch.l1_tsc_offset = l1_offset;
2528
2529         /*
2530          * If we are here because L1 chose not to trap WRMSR to TSC then
2531          * according to the spec this should set L1's TSC (as opposed to
2532          * setting L1's offset for L2).
2533          */
2534         if (is_guest_mode(vcpu))
2535                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2536                         l1_offset,
2537                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2538                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2539         else
2540                 vcpu->arch.tsc_offset = l1_offset;
2541
2542         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2543 }
2544
2545 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2546 {
2547         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2548
2549         /* Userspace is changing the multiplier while L2 is active */
2550         if (is_guest_mode(vcpu))
2551                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2552                         l1_multiplier,
2553                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2554         else
2555                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2556
2557         if (kvm_has_tsc_control)
2558                 static_call(kvm_x86_write_tsc_multiplier)(
2559                         vcpu, vcpu->arch.tsc_scaling_ratio);
2560 }
2561
2562 static inline bool kvm_check_tsc_unstable(void)
2563 {
2564 #ifdef CONFIG_X86_64
2565         /*
2566          * TSC is marked unstable when we're running on Hyper-V,
2567          * 'TSC page' clocksource is good.
2568          */
2569         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2570                 return false;
2571 #endif
2572         return check_tsc_unstable();
2573 }
2574
2575 /*
2576  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2577  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2578  * participates in.
2579  */
2580 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2581                                   u64 ns, bool matched)
2582 {
2583         struct kvm *kvm = vcpu->kvm;
2584
2585         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2586
2587         /*
2588          * We also track th most recent recorded KHZ, write and time to
2589          * allow the matching interval to be extended at each write.
2590          */
2591         kvm->arch.last_tsc_nsec = ns;
2592         kvm->arch.last_tsc_write = tsc;
2593         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2594         kvm->arch.last_tsc_offset = offset;
2595
2596         vcpu->arch.last_guest_tsc = tsc;
2597
2598         kvm_vcpu_write_tsc_offset(vcpu, offset);
2599
2600         if (!matched) {
2601                 /*
2602                  * We split periods of matched TSC writes into generations.
2603                  * For each generation, we track the original measured
2604                  * nanosecond time, offset, and write, so if TSCs are in
2605                  * sync, we can match exact offset, and if not, we can match
2606                  * exact software computation in compute_guest_tsc()
2607                  *
2608                  * These values are tracked in kvm->arch.cur_xxx variables.
2609                  */
2610                 kvm->arch.cur_tsc_generation++;
2611                 kvm->arch.cur_tsc_nsec = ns;
2612                 kvm->arch.cur_tsc_write = tsc;
2613                 kvm->arch.cur_tsc_offset = offset;
2614                 kvm->arch.nr_vcpus_matched_tsc = 0;
2615         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2616                 kvm->arch.nr_vcpus_matched_tsc++;
2617         }
2618
2619         /* Keep track of which generation this VCPU has synchronized to */
2620         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2621         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2622         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2623
2624         kvm_track_tsc_matching(vcpu);
2625 }
2626
2627 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2628 {
2629         struct kvm *kvm = vcpu->kvm;
2630         u64 offset, ns, elapsed;
2631         unsigned long flags;
2632         bool matched = false;
2633         bool synchronizing = false;
2634
2635         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2636         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2637         ns = get_kvmclock_base_ns();
2638         elapsed = ns - kvm->arch.last_tsc_nsec;
2639
2640         if (vcpu->arch.virtual_tsc_khz) {
2641                 if (data == 0) {
2642                         /*
2643                          * detection of vcpu initialization -- need to sync
2644                          * with other vCPUs. This particularly helps to keep
2645                          * kvm_clock stable after CPU hotplug
2646                          */
2647                         synchronizing = true;
2648                 } else {
2649                         u64 tsc_exp = kvm->arch.last_tsc_write +
2650                                                 nsec_to_cycles(vcpu, elapsed);
2651                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2652                         /*
2653                          * Special case: TSC write with a small delta (1 second)
2654                          * of virtual cycle time against real time is
2655                          * interpreted as an attempt to synchronize the CPU.
2656                          */
2657                         synchronizing = data < tsc_exp + tsc_hz &&
2658                                         data + tsc_hz > tsc_exp;
2659                 }
2660         }
2661
2662         /*
2663          * For a reliable TSC, we can match TSC offsets, and for an unstable
2664          * TSC, we add elapsed time in this computation.  We could let the
2665          * compensation code attempt to catch up if we fall behind, but
2666          * it's better to try to match offsets from the beginning.
2667          */
2668         if (synchronizing &&
2669             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2670                 if (!kvm_check_tsc_unstable()) {
2671                         offset = kvm->arch.cur_tsc_offset;
2672                 } else {
2673                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2674                         data += delta;
2675                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2676                 }
2677                 matched = true;
2678         }
2679
2680         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2681         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2682 }
2683
2684 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2685                                            s64 adjustment)
2686 {
2687         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2688         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2689 }
2690
2691 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2692 {
2693         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2694                 WARN_ON(adjustment < 0);
2695         adjustment = kvm_scale_tsc((u64) adjustment,
2696                                    vcpu->arch.l1_tsc_scaling_ratio);
2697         adjust_tsc_offset_guest(vcpu, adjustment);
2698 }
2699
2700 #ifdef CONFIG_X86_64
2701
2702 static u64 read_tsc(void)
2703 {
2704         u64 ret = (u64)rdtsc_ordered();
2705         u64 last = pvclock_gtod_data.clock.cycle_last;
2706
2707         if (likely(ret >= last))
2708                 return ret;
2709
2710         /*
2711          * GCC likes to generate cmov here, but this branch is extremely
2712          * predictable (it's just a function of time and the likely is
2713          * very likely) and there's a data dependence, so force GCC
2714          * to generate a branch instead.  I don't barrier() because
2715          * we don't actually need a barrier, and if this function
2716          * ever gets inlined it will generate worse code.
2717          */
2718         asm volatile ("");
2719         return last;
2720 }
2721
2722 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2723                           int *mode)
2724 {
2725         long v;
2726         u64 tsc_pg_val;
2727
2728         switch (clock->vclock_mode) {
2729         case VDSO_CLOCKMODE_HVCLOCK:
2730                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2731                                                   tsc_timestamp);
2732                 if (tsc_pg_val != U64_MAX) {
2733                         /* TSC page valid */
2734                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2735                         v = (tsc_pg_val - clock->cycle_last) &
2736                                 clock->mask;
2737                 } else {
2738                         /* TSC page invalid */
2739                         *mode = VDSO_CLOCKMODE_NONE;
2740                 }
2741                 break;
2742         case VDSO_CLOCKMODE_TSC:
2743                 *mode = VDSO_CLOCKMODE_TSC;
2744                 *tsc_timestamp = read_tsc();
2745                 v = (*tsc_timestamp - clock->cycle_last) &
2746                         clock->mask;
2747                 break;
2748         default:
2749                 *mode = VDSO_CLOCKMODE_NONE;
2750         }
2751
2752         if (*mode == VDSO_CLOCKMODE_NONE)
2753                 *tsc_timestamp = v = 0;
2754
2755         return v * clock->mult;
2756 }
2757
2758 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2759 {
2760         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2761         unsigned long seq;
2762         int mode;
2763         u64 ns;
2764
2765         do {
2766                 seq = read_seqcount_begin(&gtod->seq);
2767                 ns = gtod->raw_clock.base_cycles;
2768                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2769                 ns >>= gtod->raw_clock.shift;
2770                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2771         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2772         *t = ns;
2773
2774         return mode;
2775 }
2776
2777 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2778 {
2779         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2780         unsigned long seq;
2781         int mode;
2782         u64 ns;
2783
2784         do {
2785                 seq = read_seqcount_begin(&gtod->seq);
2786                 ts->tv_sec = gtod->wall_time_sec;
2787                 ns = gtod->clock.base_cycles;
2788                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2789                 ns >>= gtod->clock.shift;
2790         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2791
2792         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2793         ts->tv_nsec = ns;
2794
2795         return mode;
2796 }
2797
2798 /* returns true if host is using TSC based clocksource */
2799 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2800 {
2801         /* checked again under seqlock below */
2802         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2803                 return false;
2804
2805         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2806                                                       tsc_timestamp));
2807 }
2808
2809 /* returns true if host is using TSC based clocksource */
2810 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2811                                            u64 *tsc_timestamp)
2812 {
2813         /* checked again under seqlock below */
2814         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2815                 return false;
2816
2817         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2818 }
2819 #endif
2820
2821 /*
2822  *
2823  * Assuming a stable TSC across physical CPUS, and a stable TSC
2824  * across virtual CPUs, the following condition is possible.
2825  * Each numbered line represents an event visible to both
2826  * CPUs at the next numbered event.
2827  *
2828  * "timespecX" represents host monotonic time. "tscX" represents
2829  * RDTSC value.
2830  *
2831  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2832  *
2833  * 1.  read timespec0,tsc0
2834  * 2.                                   | timespec1 = timespec0 + N
2835  *                                      | tsc1 = tsc0 + M
2836  * 3. transition to guest               | transition to guest
2837  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2838  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2839  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2840  *
2841  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2842  *
2843  *      - ret0 < ret1
2844  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2845  *              ...
2846  *      - 0 < N - M => M < N
2847  *
2848  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2849  * always the case (the difference between two distinct xtime instances
2850  * might be smaller then the difference between corresponding TSC reads,
2851  * when updating guest vcpus pvclock areas).
2852  *
2853  * To avoid that problem, do not allow visibility of distinct
2854  * system_timestamp/tsc_timestamp values simultaneously: use a master
2855  * copy of host monotonic time values. Update that master copy
2856  * in lockstep.
2857  *
2858  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2859  *
2860  */
2861
2862 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2863 {
2864 #ifdef CONFIG_X86_64
2865         struct kvm_arch *ka = &kvm->arch;
2866         int vclock_mode;
2867         bool host_tsc_clocksource, vcpus_matched;
2868
2869         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2870         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2871                         atomic_read(&kvm->online_vcpus));
2872
2873         /*
2874          * If the host uses TSC clock, then passthrough TSC as stable
2875          * to the guest.
2876          */
2877         host_tsc_clocksource = kvm_get_time_and_clockread(
2878                                         &ka->master_kernel_ns,
2879                                         &ka->master_cycle_now);
2880
2881         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2882                                 && !ka->backwards_tsc_observed
2883                                 && !ka->boot_vcpu_runs_old_kvmclock;
2884
2885         if (ka->use_master_clock)
2886                 atomic_set(&kvm_guest_has_master_clock, 1);
2887
2888         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2889         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2890                                         vcpus_matched);
2891 #endif
2892 }
2893
2894 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2895 {
2896         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2897 }
2898
2899 static void __kvm_start_pvclock_update(struct kvm *kvm)
2900 {
2901         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2902         write_seqcount_begin(&kvm->arch.pvclock_sc);
2903 }
2904
2905 static void kvm_start_pvclock_update(struct kvm *kvm)
2906 {
2907         kvm_make_mclock_inprogress_request(kvm);
2908
2909         /* no guest entries from this point */
2910         __kvm_start_pvclock_update(kvm);
2911 }
2912
2913 static void kvm_end_pvclock_update(struct kvm *kvm)
2914 {
2915         struct kvm_arch *ka = &kvm->arch;
2916         struct kvm_vcpu *vcpu;
2917         unsigned long i;
2918
2919         write_seqcount_end(&ka->pvclock_sc);
2920         raw_spin_unlock_irq(&ka->tsc_write_lock);
2921         kvm_for_each_vcpu(i, vcpu, kvm)
2922                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2923
2924         /* guest entries allowed */
2925         kvm_for_each_vcpu(i, vcpu, kvm)
2926                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2927 }
2928
2929 static void kvm_update_masterclock(struct kvm *kvm)
2930 {
2931         kvm_hv_request_tsc_page_update(kvm);
2932         kvm_start_pvclock_update(kvm);
2933         pvclock_update_vm_gtod_copy(kvm);
2934         kvm_end_pvclock_update(kvm);
2935 }
2936
2937 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2938 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2939 {
2940         struct kvm_arch *ka = &kvm->arch;
2941         struct pvclock_vcpu_time_info hv_clock;
2942
2943         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2944         get_cpu();
2945
2946         data->flags = 0;
2947         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2948 #ifdef CONFIG_X86_64
2949                 struct timespec64 ts;
2950
2951                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2952                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2953                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2954                 } else
2955 #endif
2956                 data->host_tsc = rdtsc();
2957
2958                 data->flags |= KVM_CLOCK_TSC_STABLE;
2959                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2960                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2961                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2962                                    &hv_clock.tsc_shift,
2963                                    &hv_clock.tsc_to_system_mul);
2964                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2965         } else {
2966                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2967         }
2968
2969         put_cpu();
2970 }
2971
2972 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2973 {
2974         struct kvm_arch *ka = &kvm->arch;
2975         unsigned seq;
2976
2977         do {
2978                 seq = read_seqcount_begin(&ka->pvclock_sc);
2979                 __get_kvmclock(kvm, data);
2980         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2981 }
2982
2983 u64 get_kvmclock_ns(struct kvm *kvm)
2984 {
2985         struct kvm_clock_data data;
2986
2987         get_kvmclock(kvm, &data);
2988         return data.clock;
2989 }
2990
2991 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
2992                                     struct gfn_to_pfn_cache *gpc,
2993                                     unsigned int offset)
2994 {
2995         struct kvm_vcpu_arch *vcpu = &v->arch;
2996         struct pvclock_vcpu_time_info *guest_hv_clock;
2997         unsigned long flags;
2998
2999         read_lock_irqsave(&gpc->lock, flags);
3000         while (!kvm_gfn_to_pfn_cache_check(v->kvm, gpc, gpc->gpa,
3001                                            offset + sizeof(*guest_hv_clock))) {
3002                 read_unlock_irqrestore(&gpc->lock, flags);
3003
3004                 if (kvm_gfn_to_pfn_cache_refresh(v->kvm, gpc, gpc->gpa,
3005                                                  offset + sizeof(*guest_hv_clock)))
3006                         return;
3007
3008                 read_lock_irqsave(&gpc->lock, flags);
3009         }
3010
3011         guest_hv_clock = (void *)(gpc->khva + offset);
3012
3013         /*
3014          * This VCPU is paused, but it's legal for a guest to read another
3015          * VCPU's kvmclock, so we really have to follow the specification where
3016          * it says that version is odd if data is being modified, and even after
3017          * it is consistent.
3018          */
3019
3020         guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3021         smp_wmb();
3022
3023         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3024         vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3025
3026         if (vcpu->pvclock_set_guest_stopped_request) {
3027                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3028                 vcpu->pvclock_set_guest_stopped_request = false;
3029         }
3030
3031         memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3032         smp_wmb();
3033
3034         guest_hv_clock->version = ++vcpu->hv_clock.version;
3035
3036         mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3037         read_unlock_irqrestore(&gpc->lock, flags);
3038
3039         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3040 }
3041
3042 static int kvm_guest_time_update(struct kvm_vcpu *v)
3043 {
3044         unsigned long flags, tgt_tsc_khz;
3045         unsigned seq;
3046         struct kvm_vcpu_arch *vcpu = &v->arch;
3047         struct kvm_arch *ka = &v->kvm->arch;
3048         s64 kernel_ns;
3049         u64 tsc_timestamp, host_tsc;
3050         u8 pvclock_flags;
3051         bool use_master_clock;
3052
3053         kernel_ns = 0;
3054         host_tsc = 0;
3055
3056         /*
3057          * If the host uses TSC clock, then passthrough TSC as stable
3058          * to the guest.
3059          */
3060         do {
3061                 seq = read_seqcount_begin(&ka->pvclock_sc);
3062                 use_master_clock = ka->use_master_clock;
3063                 if (use_master_clock) {
3064                         host_tsc = ka->master_cycle_now;
3065                         kernel_ns = ka->master_kernel_ns;
3066                 }
3067         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3068
3069         /* Keep irq disabled to prevent changes to the clock */
3070         local_irq_save(flags);
3071         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3072         if (unlikely(tgt_tsc_khz == 0)) {
3073                 local_irq_restore(flags);
3074                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3075                 return 1;
3076         }
3077         if (!use_master_clock) {
3078                 host_tsc = rdtsc();
3079                 kernel_ns = get_kvmclock_base_ns();
3080         }
3081
3082         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3083
3084         /*
3085          * We may have to catch up the TSC to match elapsed wall clock
3086          * time for two reasons, even if kvmclock is used.
3087          *   1) CPU could have been running below the maximum TSC rate
3088          *   2) Broken TSC compensation resets the base at each VCPU
3089          *      entry to avoid unknown leaps of TSC even when running
3090          *      again on the same CPU.  This may cause apparent elapsed
3091          *      time to disappear, and the guest to stand still or run
3092          *      very slowly.
3093          */
3094         if (vcpu->tsc_catchup) {
3095                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3096                 if (tsc > tsc_timestamp) {
3097                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3098                         tsc_timestamp = tsc;
3099                 }
3100         }
3101
3102         local_irq_restore(flags);
3103
3104         /* With all the info we got, fill in the values */
3105
3106         if (kvm_has_tsc_control)
3107                 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3108                                             v->arch.l1_tsc_scaling_ratio);
3109
3110         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3111                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3112                                    &vcpu->hv_clock.tsc_shift,
3113                                    &vcpu->hv_clock.tsc_to_system_mul);
3114                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3115         }
3116
3117         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3118         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3119         vcpu->last_guest_tsc = tsc_timestamp;
3120
3121         /* If the host uses TSC clocksource, then it is stable */
3122         pvclock_flags = 0;
3123         if (use_master_clock)
3124                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3125
3126         vcpu->hv_clock.flags = pvclock_flags;
3127
3128         if (vcpu->pv_time.active)
3129                 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3130         if (vcpu->xen.vcpu_info_cache.active)
3131                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3132                                         offsetof(struct compat_vcpu_info, time));
3133         if (vcpu->xen.vcpu_time_info_cache.active)
3134                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3135         kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3136         return 0;
3137 }
3138
3139 /*
3140  * kvmclock updates which are isolated to a given vcpu, such as
3141  * vcpu->cpu migration, should not allow system_timestamp from
3142  * the rest of the vcpus to remain static. Otherwise ntp frequency
3143  * correction applies to one vcpu's system_timestamp but not
3144  * the others.
3145  *
3146  * So in those cases, request a kvmclock update for all vcpus.
3147  * We need to rate-limit these requests though, as they can
3148  * considerably slow guests that have a large number of vcpus.
3149  * The time for a remote vcpu to update its kvmclock is bound
3150  * by the delay we use to rate-limit the updates.
3151  */
3152
3153 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3154
3155 static void kvmclock_update_fn(struct work_struct *work)
3156 {
3157         unsigned long i;
3158         struct delayed_work *dwork = to_delayed_work(work);
3159         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3160                                            kvmclock_update_work);
3161         struct kvm *kvm = container_of(ka, struct kvm, arch);
3162         struct kvm_vcpu *vcpu;
3163
3164         kvm_for_each_vcpu(i, vcpu, kvm) {
3165                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3166                 kvm_vcpu_kick(vcpu);
3167         }
3168 }
3169
3170 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3171 {
3172         struct kvm *kvm = v->kvm;
3173
3174         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3175         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3176                                         KVMCLOCK_UPDATE_DELAY);
3177 }
3178
3179 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3180
3181 static void kvmclock_sync_fn(struct work_struct *work)
3182 {
3183         struct delayed_work *dwork = to_delayed_work(work);
3184         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3185                                            kvmclock_sync_work);
3186         struct kvm *kvm = container_of(ka, struct kvm, arch);
3187
3188         if (!kvmclock_periodic_sync)
3189                 return;
3190
3191         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3192         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3193                                         KVMCLOCK_SYNC_PERIOD);
3194 }
3195
3196 /*
3197  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3198  */
3199 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3200 {
3201         /* McStatusWrEn enabled? */
3202         if (guest_cpuid_is_amd_or_hygon(vcpu))
3203                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3204
3205         return false;
3206 }
3207
3208 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3209 {
3210         u64 mcg_cap = vcpu->arch.mcg_cap;
3211         unsigned bank_num = mcg_cap & 0xff;
3212         u32 msr = msr_info->index;
3213         u64 data = msr_info->data;
3214
3215         switch (msr) {
3216         case MSR_IA32_MCG_STATUS:
3217                 vcpu->arch.mcg_status = data;
3218                 break;
3219         case MSR_IA32_MCG_CTL:
3220                 if (!(mcg_cap & MCG_CTL_P) &&
3221                     (data || !msr_info->host_initiated))
3222                         return 1;
3223                 if (data != 0 && data != ~(u64)0)
3224                         return 1;
3225                 vcpu->arch.mcg_ctl = data;
3226                 break;
3227         default:
3228                 if (msr >= MSR_IA32_MC0_CTL &&
3229                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3230                         u32 offset = array_index_nospec(
3231                                 msr - MSR_IA32_MC0_CTL,
3232                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3233
3234                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3235                          * some Linux kernels though clear bit 10 in bank 4 to
3236                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3237                          * this to avoid an uncatched #GP in the guest
3238                          */
3239                         if ((offset & 0x3) == 0 &&
3240                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3241                                 return -1;
3242
3243                         /* MCi_STATUS */
3244                         if (!msr_info->host_initiated &&
3245                             (offset & 0x3) == 1 && data != 0) {
3246                                 if (!can_set_mci_status(vcpu))
3247                                         return -1;
3248                         }
3249
3250                         vcpu->arch.mce_banks[offset] = data;
3251                         break;
3252                 }
3253                 return 1;
3254         }
3255         return 0;
3256 }
3257
3258 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3259 {
3260         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3261
3262         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3263 }
3264
3265 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3266 {
3267         gpa_t gpa = data & ~0x3f;
3268
3269         /* Bits 4:5 are reserved, Should be zero */
3270         if (data & 0x30)
3271                 return 1;
3272
3273         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3274             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3275                 return 1;
3276
3277         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3278             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3279                 return 1;
3280
3281         if (!lapic_in_kernel(vcpu))
3282                 return data ? 1 : 0;
3283
3284         vcpu->arch.apf.msr_en_val = data;
3285
3286         if (!kvm_pv_async_pf_enabled(vcpu)) {
3287                 kvm_clear_async_pf_completion_queue(vcpu);
3288                 kvm_async_pf_hash_reset(vcpu);
3289                 return 0;
3290         }
3291
3292         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3293                                         sizeof(u64)))
3294                 return 1;
3295
3296         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3297         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3298
3299         kvm_async_pf_wakeup_all(vcpu);
3300
3301         return 0;
3302 }
3303
3304 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3305 {
3306         /* Bits 8-63 are reserved */
3307         if (data >> 8)
3308                 return 1;
3309
3310         if (!lapic_in_kernel(vcpu))
3311                 return 1;
3312
3313         vcpu->arch.apf.msr_int_val = data;
3314
3315         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3316
3317         return 0;
3318 }
3319
3320 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3321 {
3322         kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
3323         vcpu->arch.time = 0;
3324 }
3325
3326 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3327 {
3328         ++vcpu->stat.tlb_flush;
3329         static_call(kvm_x86_flush_tlb_all)(vcpu);
3330 }
3331
3332 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3333 {
3334         ++vcpu->stat.tlb_flush;
3335
3336         if (!tdp_enabled) {
3337                 /*
3338                  * A TLB flush on behalf of the guest is equivalent to
3339                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3340                  * a forced sync of the shadow page tables.  Ensure all the
3341                  * roots are synced and the guest TLB in hardware is clean.
3342                  */
3343                 kvm_mmu_sync_roots(vcpu);
3344                 kvm_mmu_sync_prev_roots(vcpu);
3345         }
3346
3347         static_call(kvm_x86_flush_tlb_guest)(vcpu);
3348 }
3349
3350
3351 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3352 {
3353         ++vcpu->stat.tlb_flush;
3354         static_call(kvm_x86_flush_tlb_current)(vcpu);
3355 }
3356
3357 /*
3358  * Service "local" TLB flush requests, which are specific to the current MMU
3359  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3360  * TLB flushes that are targeted at an MMU context also need to be serviced
3361  * prior before nested VM-Enter/VM-Exit.
3362  */
3363 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3364 {
3365         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3366                 kvm_vcpu_flush_tlb_current(vcpu);
3367
3368         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3369                 kvm_vcpu_flush_tlb_guest(vcpu);
3370 }
3371 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3372
3373 static void record_steal_time(struct kvm_vcpu *vcpu)
3374 {
3375         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3376         struct kvm_steal_time __user *st;
3377         struct kvm_memslots *slots;
3378         u64 steal;
3379         u32 version;
3380
3381         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3382                 kvm_xen_runstate_set_running(vcpu);
3383                 return;
3384         }
3385
3386         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3387                 return;
3388
3389         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3390                 return;
3391
3392         slots = kvm_memslots(vcpu->kvm);
3393
3394         if (unlikely(slots->generation != ghc->generation ||
3395                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3396                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3397
3398                 /* We rely on the fact that it fits in a single page. */
3399                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3400
3401                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3402                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3403                         return;
3404         }
3405
3406         st = (struct kvm_steal_time __user *)ghc->hva;
3407         /*
3408          * Doing a TLB flush here, on the guest's behalf, can avoid
3409          * expensive IPIs.
3410          */
3411         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3412                 u8 st_preempted = 0;
3413                 int err = -EFAULT;
3414
3415                 if (!user_access_begin(st, sizeof(*st)))
3416                         return;
3417
3418                 asm volatile("1: xchgb %0, %2\n"
3419                              "xor %1, %1\n"
3420                              "2:\n"
3421                              _ASM_EXTABLE_UA(1b, 2b)
3422                              : "+q" (st_preempted),
3423                                "+&r" (err),
3424                                "+m" (st->preempted));
3425                 if (err)
3426                         goto out;
3427
3428                 user_access_end();
3429
3430                 vcpu->arch.st.preempted = 0;
3431
3432                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3433                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3434                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3435                         kvm_vcpu_flush_tlb_guest(vcpu);
3436
3437                 if (!user_access_begin(st, sizeof(*st)))
3438                         goto dirty;
3439         } else {
3440                 if (!user_access_begin(st, sizeof(*st)))
3441                         return;
3442
3443                 unsafe_put_user(0, &st->preempted, out);
3444                 vcpu->arch.st.preempted = 0;
3445         }
3446
3447         unsafe_get_user(version, &st->version, out);
3448         if (version & 1)
3449                 version += 1;  /* first time write, random junk */
3450
3451         version += 1;
3452         unsafe_put_user(version, &st->version, out);
3453
3454         smp_wmb();
3455
3456         unsafe_get_user(steal, &st->steal, out);
3457         steal += current->sched_info.run_delay -
3458                 vcpu->arch.st.last_steal;
3459         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3460         unsafe_put_user(steal, &st->steal, out);
3461
3462         version += 1;
3463         unsafe_put_user(version, &st->version, out);
3464
3465  out:
3466         user_access_end();
3467  dirty:
3468         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3469 }
3470
3471 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3472 {
3473         bool pr = false;
3474         u32 msr = msr_info->index;
3475         u64 data = msr_info->data;
3476
3477         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3478                 return kvm_xen_write_hypercall_page(vcpu, data);
3479
3480         switch (msr) {
3481         case MSR_AMD64_NB_CFG:
3482         case MSR_IA32_UCODE_WRITE:
3483         case MSR_VM_HSAVE_PA:
3484         case MSR_AMD64_PATCH_LOADER:
3485         case MSR_AMD64_BU_CFG2:
3486         case MSR_AMD64_DC_CFG:
3487         case MSR_F15H_EX_CFG:
3488                 break;
3489
3490         case MSR_IA32_UCODE_REV:
3491                 if (msr_info->host_initiated)
3492                         vcpu->arch.microcode_version = data;
3493                 break;
3494         case MSR_IA32_ARCH_CAPABILITIES:
3495                 if (!msr_info->host_initiated)
3496                         return 1;
3497                 vcpu->arch.arch_capabilities = data;
3498                 break;
3499         case MSR_IA32_PERF_CAPABILITIES: {
3500                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3501
3502                 if (!msr_info->host_initiated)
3503                         return 1;
3504                 if (kvm_get_msr_feature(&msr_ent))
3505                         return 1;
3506                 if (data & ~msr_ent.data)
3507                         return 1;
3508
3509                 vcpu->arch.perf_capabilities = data;
3510
3511                 return 0;
3512                 }
3513         case MSR_EFER:
3514                 return set_efer(vcpu, msr_info);
3515         case MSR_K7_HWCR:
3516                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3517                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3518                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3519
3520                 /* Handle McStatusWrEn */
3521                 if (data == BIT_ULL(18)) {
3522                         vcpu->arch.msr_hwcr = data;
3523                 } else if (data != 0) {
3524                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3525                                     data);
3526                         return 1;
3527                 }
3528                 break;
3529         case MSR_FAM10H_MMIO_CONF_BASE:
3530                 if (data != 0) {
3531                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3532                                     "0x%llx\n", data);
3533                         return 1;
3534                 }
3535                 break;
3536         case 0x200 ... 0x2ff:
3537                 return kvm_mtrr_set_msr(vcpu, msr, data);
3538         case MSR_IA32_APICBASE:
3539                 return kvm_set_apic_base(vcpu, msr_info);
3540         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3541                 return kvm_x2apic_msr_write(vcpu, msr, data);
3542         case MSR_IA32_TSC_DEADLINE:
3543                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3544                 break;
3545         case MSR_IA32_TSC_ADJUST:
3546                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3547                         if (!msr_info->host_initiated) {
3548                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3549                                 adjust_tsc_offset_guest(vcpu, adj);
3550                                 /* Before back to guest, tsc_timestamp must be adjusted
3551                                  * as well, otherwise guest's percpu pvclock time could jump.
3552                                  */
3553                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3554                         }
3555                         vcpu->arch.ia32_tsc_adjust_msr = data;
3556                 }
3557                 break;
3558         case MSR_IA32_MISC_ENABLE:
3559                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3560                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3561                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3562                                 return 1;
3563                         vcpu->arch.ia32_misc_enable_msr = data;
3564                         kvm_update_cpuid_runtime(vcpu);
3565                 } else {
3566                         vcpu->arch.ia32_misc_enable_msr = data;
3567                 }
3568                 break;
3569         case MSR_IA32_SMBASE:
3570                 if (!msr_info->host_initiated)
3571                         return 1;
3572                 vcpu->arch.smbase = data;
3573                 break;
3574         case MSR_IA32_POWER_CTL:
3575                 vcpu->arch.msr_ia32_power_ctl = data;
3576                 break;
3577         case MSR_IA32_TSC:
3578                 if (msr_info->host_initiated) {
3579                         kvm_synchronize_tsc(vcpu, data);
3580                 } else {
3581                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3582                         adjust_tsc_offset_guest(vcpu, adj);
3583                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3584                 }
3585                 break;
3586         case MSR_IA32_XSS:
3587                 if (!msr_info->host_initiated &&
3588                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3589                         return 1;
3590                 /*
3591                  * KVM supports exposing PT to the guest, but does not support
3592                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3593                  * XSAVES/XRSTORS to save/restore PT MSRs.
3594                  */
3595                 if (data & ~supported_xss)
3596                         return 1;
3597                 vcpu->arch.ia32_xss = data;
3598                 kvm_update_cpuid_runtime(vcpu);
3599                 break;
3600         case MSR_SMI_COUNT:
3601                 if (!msr_info->host_initiated)
3602                         return 1;
3603                 vcpu->arch.smi_count = data;
3604                 break;
3605         case MSR_KVM_WALL_CLOCK_NEW:
3606                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3607                         return 1;
3608
3609                 vcpu->kvm->arch.wall_clock = data;
3610                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3611                 break;
3612         case MSR_KVM_WALL_CLOCK:
3613                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3614                         return 1;
3615
3616                 vcpu->kvm->arch.wall_clock = data;
3617                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3618                 break;
3619         case MSR_KVM_SYSTEM_TIME_NEW:
3620                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3621                         return 1;
3622
3623                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3624                 break;
3625         case MSR_KVM_SYSTEM_TIME:
3626                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3627                         return 1;
3628
3629                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3630                 break;
3631         case MSR_KVM_ASYNC_PF_EN:
3632                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3633                         return 1;
3634
3635                 if (kvm_pv_enable_async_pf(vcpu, data))
3636                         return 1;
3637                 break;
3638         case MSR_KVM_ASYNC_PF_INT:
3639                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3640                         return 1;
3641
3642                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3643                         return 1;
3644                 break;
3645         case MSR_KVM_ASYNC_PF_ACK:
3646                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3647                         return 1;
3648                 if (data & 0x1) {
3649                         vcpu->arch.apf.pageready_pending = false;
3650                         kvm_check_async_pf_completion(vcpu);
3651                 }
3652                 break;
3653         case MSR_KVM_STEAL_TIME:
3654                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3655                         return 1;
3656
3657                 if (unlikely(!sched_info_on()))
3658                         return 1;
3659
3660                 if (data & KVM_STEAL_RESERVED_MASK)
3661                         return 1;
3662
3663                 vcpu->arch.st.msr_val = data;
3664
3665                 if (!(data & KVM_MSR_ENABLED))
3666                         break;
3667
3668                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3669
3670                 break;
3671         case MSR_KVM_PV_EOI_EN:
3672                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3673                         return 1;
3674
3675                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3676                         return 1;
3677                 break;
3678
3679         case MSR_KVM_POLL_CONTROL:
3680                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3681                         return 1;
3682
3683                 /* only enable bit supported */
3684                 if (data & (-1ULL << 1))
3685                         return 1;
3686
3687                 vcpu->arch.msr_kvm_poll_control = data;
3688                 break;
3689
3690         case MSR_IA32_MCG_CTL:
3691         case MSR_IA32_MCG_STATUS:
3692         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3693                 return set_msr_mce(vcpu, msr_info);
3694
3695         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3696         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3697                 pr = true;
3698                 fallthrough;
3699         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3700         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3701                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3702                         return kvm_pmu_set_msr(vcpu, msr_info);
3703
3704                 if (pr || data != 0)
3705                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3706                                     "0x%x data 0x%llx\n", msr, data);
3707                 break;
3708         case MSR_K7_CLK_CTL:
3709                 /*
3710                  * Ignore all writes to this no longer documented MSR.
3711                  * Writes are only relevant for old K7 processors,
3712                  * all pre-dating SVM, but a recommended workaround from
3713                  * AMD for these chips. It is possible to specify the
3714                  * affected processor models on the command line, hence
3715                  * the need to ignore the workaround.
3716                  */
3717                 break;
3718         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3719         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3720         case HV_X64_MSR_SYNDBG_OPTIONS:
3721         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3722         case HV_X64_MSR_CRASH_CTL:
3723         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3724         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3725         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3726         case HV_X64_MSR_TSC_EMULATION_STATUS:
3727                 return kvm_hv_set_msr_common(vcpu, msr, data,
3728                                              msr_info->host_initiated);
3729         case MSR_IA32_BBL_CR_CTL3:
3730                 /* Drop writes to this legacy MSR -- see rdmsr
3731                  * counterpart for further detail.
3732                  */
3733                 if (report_ignored_msrs)
3734                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3735                                 msr, data);
3736                 break;
3737         case MSR_AMD64_OSVW_ID_LENGTH:
3738                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3739                         return 1;
3740                 vcpu->arch.osvw.length = data;
3741                 break;
3742         case MSR_AMD64_OSVW_STATUS:
3743                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3744                         return 1;
3745                 vcpu->arch.osvw.status = data;
3746                 break;
3747         case MSR_PLATFORM_INFO:
3748                 if (!msr_info->host_initiated ||
3749                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3750                      cpuid_fault_enabled(vcpu)))
3751                         return 1;
3752                 vcpu->arch.msr_platform_info = data;
3753                 break;
3754         case MSR_MISC_FEATURES_ENABLES:
3755                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3756                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3757                      !supports_cpuid_fault(vcpu)))
3758                         return 1;
3759                 vcpu->arch.msr_misc_features_enables = data;
3760                 break;
3761 #ifdef CONFIG_X86_64
3762         case MSR_IA32_XFD:
3763                 if (!msr_info->host_initiated &&
3764                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3765                         return 1;
3766
3767                 if (data & ~kvm_guest_supported_xfd(vcpu))
3768                         return 1;
3769
3770                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3771                 break;
3772         case MSR_IA32_XFD_ERR:
3773                 if (!msr_info->host_initiated &&
3774                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3775                         return 1;
3776
3777                 if (data & ~kvm_guest_supported_xfd(vcpu))
3778                         return 1;
3779
3780                 vcpu->arch.guest_fpu.xfd_err = data;
3781                 break;
3782 #endif
3783         default:
3784                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3785                         return kvm_pmu_set_msr(vcpu, msr_info);
3786                 return KVM_MSR_RET_INVALID;
3787         }
3788         return 0;
3789 }
3790 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3791
3792 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3793 {
3794         u64 data;
3795         u64 mcg_cap = vcpu->arch.mcg_cap;
3796         unsigned bank_num = mcg_cap & 0xff;
3797
3798         switch (msr) {
3799         case MSR_IA32_P5_MC_ADDR:
3800         case MSR_IA32_P5_MC_TYPE:
3801                 data = 0;
3802                 break;
3803         case MSR_IA32_MCG_CAP:
3804                 data = vcpu->arch.mcg_cap;
3805                 break;
3806         case MSR_IA32_MCG_CTL:
3807                 if (!(mcg_cap & MCG_CTL_P) && !host)
3808                         return 1;
3809                 data = vcpu->arch.mcg_ctl;
3810                 break;
3811         case MSR_IA32_MCG_STATUS:
3812                 data = vcpu->arch.mcg_status;
3813                 break;
3814         default:
3815                 if (msr >= MSR_IA32_MC0_CTL &&
3816                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3817                         u32 offset = array_index_nospec(
3818                                 msr - MSR_IA32_MC0_CTL,
3819                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3820
3821                         data = vcpu->arch.mce_banks[offset];
3822                         break;
3823                 }
3824                 return 1;
3825         }
3826         *pdata = data;
3827         return 0;
3828 }
3829
3830 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3831 {
3832         switch (msr_info->index) {
3833         case MSR_IA32_PLATFORM_ID:
3834         case MSR_IA32_EBL_CR_POWERON:
3835         case MSR_IA32_LASTBRANCHFROMIP:
3836         case MSR_IA32_LASTBRANCHTOIP:
3837         case MSR_IA32_LASTINTFROMIP:
3838         case MSR_IA32_LASTINTTOIP:
3839         case MSR_AMD64_SYSCFG:
3840         case MSR_K8_TSEG_ADDR:
3841         case MSR_K8_TSEG_MASK:
3842         case MSR_VM_HSAVE_PA:
3843         case MSR_K8_INT_PENDING_MSG:
3844         case MSR_AMD64_NB_CFG:
3845         case MSR_FAM10H_MMIO_CONF_BASE:
3846         case MSR_AMD64_BU_CFG2:
3847         case MSR_IA32_PERF_CTL:
3848         case MSR_AMD64_DC_CFG:
3849         case MSR_F15H_EX_CFG:
3850         /*
3851          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3852          * limit) MSRs. Just return 0, as we do not want to expose the host
3853          * data here. Do not conditionalize this on CPUID, as KVM does not do
3854          * so for existing CPU-specific MSRs.
3855          */
3856         case MSR_RAPL_POWER_UNIT:
3857         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3858         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3859         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3860         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3861                 msr_info->data = 0;
3862                 break;
3863         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3864                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3865                         return kvm_pmu_get_msr(vcpu, msr_info);
3866                 if (!msr_info->host_initiated)
3867                         return 1;
3868                 msr_info->data = 0;
3869                 break;
3870         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3871         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3872         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3873         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3874                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3875                         return kvm_pmu_get_msr(vcpu, msr_info);
3876                 msr_info->data = 0;
3877                 break;
3878         case MSR_IA32_UCODE_REV:
3879                 msr_info->data = vcpu->arch.microcode_version;
3880                 break;
3881         case MSR_IA32_ARCH_CAPABILITIES:
3882                 if (!msr_info->host_initiated &&
3883                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3884                         return 1;
3885                 msr_info->data = vcpu->arch.arch_capabilities;
3886                 break;
3887         case MSR_IA32_PERF_CAPABILITIES:
3888                 if (!msr_info->host_initiated &&
3889                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3890                         return 1;
3891                 msr_info->data = vcpu->arch.perf_capabilities;
3892                 break;
3893         case MSR_IA32_POWER_CTL:
3894                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3895                 break;
3896         case MSR_IA32_TSC: {
3897                 /*
3898                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3899                  * even when not intercepted. AMD manual doesn't explicitly
3900                  * state this but appears to behave the same.
3901                  *
3902                  * On userspace reads and writes, however, we unconditionally
3903                  * return L1's TSC value to ensure backwards-compatible
3904                  * behavior for migration.
3905                  */
3906                 u64 offset, ratio;
3907
3908                 if (msr_info->host_initiated) {
3909                         offset = vcpu->arch.l1_tsc_offset;
3910                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3911                 } else {
3912                         offset = vcpu->arch.tsc_offset;
3913                         ratio = vcpu->arch.tsc_scaling_ratio;
3914                 }
3915
3916                 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
3917                 break;
3918         }
3919         case MSR_MTRRcap:
3920         case 0x200 ... 0x2ff:
3921                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3922         case 0xcd: /* fsb frequency */
3923                 msr_info->data = 3;
3924                 break;
3925                 /*
3926                  * MSR_EBC_FREQUENCY_ID
3927                  * Conservative value valid for even the basic CPU models.
3928                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3929                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3930                  * and 266MHz for model 3, or 4. Set Core Clock
3931                  * Frequency to System Bus Frequency Ratio to 1 (bits
3932                  * 31:24) even though these are only valid for CPU
3933                  * models > 2, however guests may end up dividing or
3934                  * multiplying by zero otherwise.
3935                  */
3936         case MSR_EBC_FREQUENCY_ID:
3937                 msr_info->data = 1 << 24;
3938                 break;
3939         case MSR_IA32_APICBASE:
3940                 msr_info->data = kvm_get_apic_base(vcpu);
3941                 break;
3942         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3943                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3944         case MSR_IA32_TSC_DEADLINE:
3945                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3946                 break;
3947         case MSR_IA32_TSC_ADJUST:
3948                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3949                 break;
3950         case MSR_IA32_MISC_ENABLE:
3951                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3952                 break;
3953         case MSR_IA32_SMBASE:
3954                 if (!msr_info->host_initiated)
3955                         return 1;
3956                 msr_info->data = vcpu->arch.smbase;
3957                 break;
3958         case MSR_SMI_COUNT:
3959                 msr_info->data = vcpu->arch.smi_count;
3960                 break;
3961         case MSR_IA32_PERF_STATUS:
3962                 /* TSC increment by tick */
3963                 msr_info->data = 1000ULL;
3964                 /* CPU multiplier */
3965                 msr_info->data |= (((uint64_t)4ULL) << 40);
3966                 break;
3967         case MSR_EFER:
3968                 msr_info->data = vcpu->arch.efer;
3969                 break;
3970         case MSR_KVM_WALL_CLOCK:
3971                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3972                         return 1;
3973
3974                 msr_info->data = vcpu->kvm->arch.wall_clock;
3975                 break;
3976         case MSR_KVM_WALL_CLOCK_NEW:
3977                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3978                         return 1;
3979
3980                 msr_info->data = vcpu->kvm->arch.wall_clock;
3981                 break;
3982         case MSR_KVM_SYSTEM_TIME:
3983                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3984                         return 1;
3985
3986                 msr_info->data = vcpu->arch.time;
3987                 break;
3988         case MSR_KVM_SYSTEM_TIME_NEW:
3989                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3990                         return 1;
3991
3992                 msr_info->data = vcpu->arch.time;
3993                 break;
3994         case MSR_KVM_ASYNC_PF_EN:
3995                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3996                         return 1;
3997
3998                 msr_info->data = vcpu->arch.apf.msr_en_val;
3999                 break;
4000         case MSR_KVM_ASYNC_PF_INT:
4001                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4002                         return 1;
4003
4004                 msr_info->data = vcpu->arch.apf.msr_int_val;
4005                 break;
4006         case MSR_KVM_ASYNC_PF_ACK:
4007                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4008                         return 1;
4009
4010                 msr_info->data = 0;
4011                 break;
4012         case MSR_KVM_STEAL_TIME:
4013                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4014                         return 1;
4015
4016                 msr_info->data = vcpu->arch.st.msr_val;
4017                 break;
4018         case MSR_KVM_PV_EOI_EN:
4019                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4020                         return 1;
4021
4022                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4023                 break;
4024         case MSR_KVM_POLL_CONTROL:
4025                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4026                         return 1;
4027
4028                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4029                 break;
4030         case MSR_IA32_P5_MC_ADDR:
4031         case MSR_IA32_P5_MC_TYPE:
4032         case MSR_IA32_MCG_CAP:
4033         case MSR_IA32_MCG_CTL:
4034         case MSR_IA32_MCG_STATUS:
4035         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4036                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4037                                    msr_info->host_initiated);
4038         case MSR_IA32_XSS:
4039                 if (!msr_info->host_initiated &&
4040                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4041                         return 1;
4042                 msr_info->data = vcpu->arch.ia32_xss;
4043                 break;
4044         case MSR_K7_CLK_CTL:
4045                 /*
4046                  * Provide expected ramp-up count for K7. All other
4047                  * are set to zero, indicating minimum divisors for
4048                  * every field.
4049                  *
4050                  * This prevents guest kernels on AMD host with CPU
4051                  * type 6, model 8 and higher from exploding due to
4052                  * the rdmsr failing.
4053                  */
4054                 msr_info->data = 0x20000000;
4055                 break;
4056         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4057         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4058         case HV_X64_MSR_SYNDBG_OPTIONS:
4059         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4060         case HV_X64_MSR_CRASH_CTL:
4061         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4062         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4063         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4064         case HV_X64_MSR_TSC_EMULATION_STATUS:
4065                 return kvm_hv_get_msr_common(vcpu,
4066                                              msr_info->index, &msr_info->data,
4067                                              msr_info->host_initiated);
4068         case MSR_IA32_BBL_CR_CTL3:
4069                 /* This legacy MSR exists but isn't fully documented in current
4070                  * silicon.  It is however accessed by winxp in very narrow
4071                  * scenarios where it sets bit #19, itself documented as
4072                  * a "reserved" bit.  Best effort attempt to source coherent
4073                  * read data here should the balance of the register be
4074                  * interpreted by the guest:
4075                  *
4076                  * L2 cache control register 3: 64GB range, 256KB size,
4077                  * enabled, latency 0x1, configured
4078                  */
4079                 msr_info->data = 0xbe702111;
4080                 break;
4081         case MSR_AMD64_OSVW_ID_LENGTH:
4082                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4083                         return 1;
4084                 msr_info->data = vcpu->arch.osvw.length;
4085                 break;
4086         case MSR_AMD64_OSVW_STATUS:
4087                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4088                         return 1;
4089                 msr_info->data = vcpu->arch.osvw.status;
4090                 break;
4091         case MSR_PLATFORM_INFO:
4092                 if (!msr_info->host_initiated &&
4093                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4094                         return 1;
4095                 msr_info->data = vcpu->arch.msr_platform_info;
4096                 break;
4097         case MSR_MISC_FEATURES_ENABLES:
4098                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4099                 break;
4100         case MSR_K7_HWCR:
4101                 msr_info->data = vcpu->arch.msr_hwcr;
4102                 break;
4103 #ifdef CONFIG_X86_64
4104         case MSR_IA32_XFD:
4105                 if (!msr_info->host_initiated &&
4106                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4107                         return 1;
4108
4109                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4110                 break;
4111         case MSR_IA32_XFD_ERR:
4112                 if (!msr_info->host_initiated &&
4113                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4114                         return 1;
4115
4116                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4117                 break;
4118 #endif
4119         default:
4120                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4121                         return kvm_pmu_get_msr(vcpu, msr_info);
4122                 return KVM_MSR_RET_INVALID;
4123         }
4124         return 0;
4125 }
4126 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4127
4128 /*
4129  * Read or write a bunch of msrs. All parameters are kernel addresses.
4130  *
4131  * @return number of msrs set successfully.
4132  */
4133 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4134                     struct kvm_msr_entry *entries,
4135                     int (*do_msr)(struct kvm_vcpu *vcpu,
4136                                   unsigned index, u64 *data))
4137 {
4138         int i;
4139
4140         for (i = 0; i < msrs->nmsrs; ++i)
4141                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4142                         break;
4143
4144         return i;
4145 }
4146
4147 /*
4148  * Read or write a bunch of msrs. Parameters are user addresses.
4149  *
4150  * @return number of msrs set successfully.
4151  */
4152 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4153                   int (*do_msr)(struct kvm_vcpu *vcpu,
4154                                 unsigned index, u64 *data),
4155                   int writeback)
4156 {
4157         struct kvm_msrs msrs;
4158         struct kvm_msr_entry *entries;
4159         int r, n;
4160         unsigned size;
4161
4162         r = -EFAULT;
4163         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4164                 goto out;
4165
4166         r = -E2BIG;
4167         if (msrs.nmsrs >= MAX_IO_MSRS)
4168                 goto out;
4169
4170         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4171         entries = memdup_user(user_msrs->entries, size);
4172         if (IS_ERR(entries)) {
4173                 r = PTR_ERR(entries);
4174                 goto out;
4175         }
4176
4177         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4178         if (r < 0)
4179                 goto out_free;
4180
4181         r = -EFAULT;
4182         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4183                 goto out_free;
4184
4185         r = n;
4186
4187 out_free:
4188         kfree(entries);
4189 out:
4190         return r;
4191 }
4192
4193 static inline bool kvm_can_mwait_in_guest(void)
4194 {
4195         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4196                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4197                 boot_cpu_has(X86_FEATURE_ARAT);
4198 }
4199
4200 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4201                                             struct kvm_cpuid2 __user *cpuid_arg)
4202 {
4203         struct kvm_cpuid2 cpuid;
4204         int r;
4205
4206         r = -EFAULT;
4207         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4208                 return r;
4209
4210         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4211         if (r)
4212                 return r;
4213
4214         r = -EFAULT;
4215         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4216                 return r;
4217
4218         return 0;
4219 }
4220
4221 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4222 {
4223         int r = 0;
4224
4225         switch (ext) {
4226         case KVM_CAP_IRQCHIP:
4227         case KVM_CAP_HLT:
4228         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4229         case KVM_CAP_SET_TSS_ADDR:
4230         case KVM_CAP_EXT_CPUID:
4231         case KVM_CAP_EXT_EMUL_CPUID:
4232         case KVM_CAP_CLOCKSOURCE:
4233         case KVM_CAP_PIT:
4234         case KVM_CAP_NOP_IO_DELAY:
4235         case KVM_CAP_MP_STATE:
4236         case KVM_CAP_SYNC_MMU:
4237         case KVM_CAP_USER_NMI:
4238         case KVM_CAP_REINJECT_CONTROL:
4239         case KVM_CAP_IRQ_INJECT_STATUS:
4240         case KVM_CAP_IOEVENTFD:
4241         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4242         case KVM_CAP_PIT2:
4243         case KVM_CAP_PIT_STATE2:
4244         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4245         case KVM_CAP_VCPU_EVENTS:
4246         case KVM_CAP_HYPERV:
4247         case KVM_CAP_HYPERV_VAPIC:
4248         case KVM_CAP_HYPERV_SPIN:
4249         case KVM_CAP_HYPERV_SYNIC:
4250         case KVM_CAP_HYPERV_SYNIC2:
4251         case KVM_CAP_HYPERV_VP_INDEX:
4252         case KVM_CAP_HYPERV_EVENTFD:
4253         case KVM_CAP_HYPERV_TLBFLUSH:
4254         case KVM_CAP_HYPERV_SEND_IPI:
4255         case KVM_CAP_HYPERV_CPUID:
4256         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4257         case KVM_CAP_SYS_HYPERV_CPUID:
4258         case KVM_CAP_PCI_SEGMENT:
4259         case KVM_CAP_DEBUGREGS:
4260         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4261         case KVM_CAP_XSAVE:
4262         case KVM_CAP_ASYNC_PF:
4263         case KVM_CAP_ASYNC_PF_INT:
4264         case KVM_CAP_GET_TSC_KHZ:
4265         case KVM_CAP_KVMCLOCK_CTRL:
4266         case KVM_CAP_READONLY_MEM:
4267         case KVM_CAP_HYPERV_TIME:
4268         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4269         case KVM_CAP_TSC_DEADLINE_TIMER:
4270         case KVM_CAP_DISABLE_QUIRKS:
4271         case KVM_CAP_SET_BOOT_CPU_ID:
4272         case KVM_CAP_SPLIT_IRQCHIP:
4273         case KVM_CAP_IMMEDIATE_EXIT:
4274         case KVM_CAP_PMU_EVENT_FILTER:
4275         case KVM_CAP_GET_MSR_FEATURES:
4276         case KVM_CAP_MSR_PLATFORM_INFO:
4277         case KVM_CAP_EXCEPTION_PAYLOAD:
4278         case KVM_CAP_SET_GUEST_DEBUG:
4279         case KVM_CAP_LAST_CPU:
4280         case KVM_CAP_X86_USER_SPACE_MSR:
4281         case KVM_CAP_X86_MSR_FILTER:
4282         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4283 #ifdef CONFIG_X86_SGX_KVM
4284         case KVM_CAP_SGX_ATTRIBUTE:
4285 #endif
4286         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4287         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4288         case KVM_CAP_SREGS2:
4289         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4290         case KVM_CAP_VCPU_ATTRIBUTES:
4291         case KVM_CAP_SYS_ATTRIBUTES:
4292         case KVM_CAP_VAPIC:
4293         case KVM_CAP_ENABLE_CAP:
4294                 r = 1;
4295                 break;
4296         case KVM_CAP_EXIT_HYPERCALL:
4297                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4298                 break;
4299         case KVM_CAP_SET_GUEST_DEBUG2:
4300                 return KVM_GUESTDBG_VALID_MASK;
4301 #ifdef CONFIG_KVM_XEN
4302         case KVM_CAP_XEN_HVM:
4303                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4304                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4305                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4306                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4307                     KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4308                 if (sched_info_on())
4309                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4310                 break;
4311 #endif
4312         case KVM_CAP_SYNC_REGS:
4313                 r = KVM_SYNC_X86_VALID_FIELDS;
4314                 break;
4315         case KVM_CAP_ADJUST_CLOCK:
4316                 r = KVM_CLOCK_VALID_FLAGS;
4317                 break;
4318         case KVM_CAP_X86_DISABLE_EXITS:
4319                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4320                       KVM_X86_DISABLE_EXITS_CSTATE;
4321                 if(kvm_can_mwait_in_guest())
4322                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4323                 break;
4324         case KVM_CAP_X86_SMM:
4325                 /* SMBASE is usually relocated above 1M on modern chipsets,
4326                  * and SMM handlers might indeed rely on 4G segment limits,
4327                  * so do not report SMM to be available if real mode is
4328                  * emulated via vm86 mode.  Still, do not go to great lengths
4329                  * to avoid userspace's usage of the feature, because it is a
4330                  * fringe case that is not enabled except via specific settings
4331                  * of the module parameters.
4332                  */
4333                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4334                 break;
4335         case KVM_CAP_NR_VCPUS:
4336                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4337                 break;
4338         case KVM_CAP_MAX_VCPUS:
4339                 r = KVM_MAX_VCPUS;
4340                 break;
4341         case KVM_CAP_MAX_VCPU_ID:
4342                 r = KVM_MAX_VCPU_IDS;
4343                 break;
4344         case KVM_CAP_PV_MMU:    /* obsolete */
4345                 r = 0;
4346                 break;
4347         case KVM_CAP_MCE:
4348                 r = KVM_MAX_MCE_BANKS;
4349                 break;
4350         case KVM_CAP_XCRS:
4351                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4352                 break;
4353         case KVM_CAP_TSC_CONTROL:
4354         case KVM_CAP_VM_TSC_CONTROL:
4355                 r = kvm_has_tsc_control;
4356                 break;
4357         case KVM_CAP_X2APIC_API:
4358                 r = KVM_X2APIC_API_VALID_FLAGS;
4359                 break;
4360         case KVM_CAP_NESTED_STATE:
4361                 r = kvm_x86_ops.nested_ops->get_state ?
4362                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4363                 break;
4364         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4365                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4366                 break;
4367         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4368                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4369                 break;
4370         case KVM_CAP_SMALLER_MAXPHYADDR:
4371                 r = (int) allow_smaller_maxphyaddr;
4372                 break;
4373         case KVM_CAP_STEAL_TIME:
4374                 r = sched_info_on();
4375                 break;
4376         case KVM_CAP_X86_BUS_LOCK_EXIT:
4377                 if (kvm_has_bus_lock_exit)
4378                         r = KVM_BUS_LOCK_DETECTION_OFF |
4379                             KVM_BUS_LOCK_DETECTION_EXIT;
4380                 else
4381                         r = 0;
4382                 break;
4383         case KVM_CAP_XSAVE2: {
4384                 u64 guest_perm = xstate_get_guest_group_perm();
4385
4386                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4387                 if (r < sizeof(struct kvm_xsave))
4388                         r = sizeof(struct kvm_xsave);
4389                 break;
4390         case KVM_CAP_PMU_CAPABILITY:
4391                 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4392                 break;
4393         }
4394         case KVM_CAP_DISABLE_QUIRKS2:
4395                 r = KVM_X86_VALID_QUIRKS;
4396                 break;
4397         default:
4398                 break;
4399         }
4400         return r;
4401 }
4402
4403 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4404 {
4405         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4406
4407         if ((u64)(unsigned long)uaddr != attr->addr)
4408                 return ERR_PTR_USR(-EFAULT);
4409         return uaddr;
4410 }
4411
4412 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4413 {
4414         u64 __user *uaddr = kvm_get_attr_addr(attr);
4415
4416         if (attr->group)
4417                 return -ENXIO;
4418
4419         if (IS_ERR(uaddr))
4420                 return PTR_ERR(uaddr);
4421
4422         switch (attr->attr) {
4423         case KVM_X86_XCOMP_GUEST_SUPP:
4424                 if (put_user(supported_xcr0, uaddr))
4425                         return -EFAULT;
4426                 return 0;
4427         default:
4428                 return -ENXIO;
4429                 break;
4430         }
4431 }
4432
4433 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4434 {
4435         if (attr->group)
4436                 return -ENXIO;
4437
4438         switch (attr->attr) {
4439         case KVM_X86_XCOMP_GUEST_SUPP:
4440                 return 0;
4441         default:
4442                 return -ENXIO;
4443         }
4444 }
4445
4446 long kvm_arch_dev_ioctl(struct file *filp,
4447                         unsigned int ioctl, unsigned long arg)
4448 {
4449         void __user *argp = (void __user *)arg;
4450         long r;
4451
4452         switch (ioctl) {
4453         case KVM_GET_MSR_INDEX_LIST: {
4454                 struct kvm_msr_list __user *user_msr_list = argp;
4455                 struct kvm_msr_list msr_list;
4456                 unsigned n;
4457
4458                 r = -EFAULT;
4459                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4460                         goto out;
4461                 n = msr_list.nmsrs;
4462                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4463                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4464                         goto out;
4465                 r = -E2BIG;
4466                 if (n < msr_list.nmsrs)
4467                         goto out;
4468                 r = -EFAULT;
4469                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4470                                  num_msrs_to_save * sizeof(u32)))
4471                         goto out;
4472                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4473                                  &emulated_msrs,
4474                                  num_emulated_msrs * sizeof(u32)))
4475                         goto out;
4476                 r = 0;
4477                 break;
4478         }
4479         case KVM_GET_SUPPORTED_CPUID:
4480         case KVM_GET_EMULATED_CPUID: {
4481                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4482                 struct kvm_cpuid2 cpuid;
4483
4484                 r = -EFAULT;
4485                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4486                         goto out;
4487
4488                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4489                                             ioctl);
4490                 if (r)
4491                         goto out;
4492
4493                 r = -EFAULT;
4494                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4495                         goto out;
4496                 r = 0;
4497                 break;
4498         }
4499         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4500                 r = -EFAULT;
4501                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4502                                  sizeof(kvm_mce_cap_supported)))
4503                         goto out;
4504                 r = 0;
4505                 break;
4506         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4507                 struct kvm_msr_list __user *user_msr_list = argp;
4508                 struct kvm_msr_list msr_list;
4509                 unsigned int n;
4510
4511                 r = -EFAULT;
4512                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4513                         goto out;
4514                 n = msr_list.nmsrs;
4515                 msr_list.nmsrs = num_msr_based_features;
4516                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4517                         goto out;
4518                 r = -E2BIG;
4519                 if (n < msr_list.nmsrs)
4520                         goto out;
4521                 r = -EFAULT;
4522                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4523                                  num_msr_based_features * sizeof(u32)))
4524                         goto out;
4525                 r = 0;
4526                 break;
4527         }
4528         case KVM_GET_MSRS:
4529                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4530                 break;
4531         case KVM_GET_SUPPORTED_HV_CPUID:
4532                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4533                 break;
4534         case KVM_GET_DEVICE_ATTR: {
4535                 struct kvm_device_attr attr;
4536                 r = -EFAULT;
4537                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4538                         break;
4539                 r = kvm_x86_dev_get_attr(&attr);
4540                 break;
4541         }
4542         case KVM_HAS_DEVICE_ATTR: {
4543                 struct kvm_device_attr attr;
4544                 r = -EFAULT;
4545                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4546                         break;
4547                 r = kvm_x86_dev_has_attr(&attr);
4548                 break;
4549         }
4550         default:
4551                 r = -EINVAL;
4552                 break;
4553         }
4554 out:
4555         return r;
4556 }
4557
4558 static void wbinvd_ipi(void *garbage)
4559 {
4560         wbinvd();
4561 }
4562
4563 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4564 {
4565         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4566 }
4567
4568 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4569 {
4570         /* Address WBINVD may be executed by guest */
4571         if (need_emulate_wbinvd(vcpu)) {
4572                 if (static_call(kvm_x86_has_wbinvd_exit)())
4573                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4574                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4575                         smp_call_function_single(vcpu->cpu,
4576                                         wbinvd_ipi, NULL, 1);
4577         }
4578
4579         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4580
4581         /* Save host pkru register if supported */
4582         vcpu->arch.host_pkru = read_pkru();
4583
4584         /* Apply any externally detected TSC adjustments (due to suspend) */
4585         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4586                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4587                 vcpu->arch.tsc_offset_adjustment = 0;
4588                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4589         }
4590
4591         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4592                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4593                                 rdtsc() - vcpu->arch.last_host_tsc;
4594                 if (tsc_delta < 0)
4595                         mark_tsc_unstable("KVM discovered backwards TSC");
4596
4597                 if (kvm_check_tsc_unstable()) {
4598                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4599                                                 vcpu->arch.last_guest_tsc);
4600                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4601                         vcpu->arch.tsc_catchup = 1;
4602                 }
4603
4604                 if (kvm_lapic_hv_timer_in_use(vcpu))
4605                         kvm_lapic_restart_hv_timer(vcpu);
4606
4607                 /*
4608                  * On a host with synchronized TSC, there is no need to update
4609                  * kvmclock on vcpu->cpu migration
4610                  */
4611                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4612                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4613                 if (vcpu->cpu != cpu)
4614                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4615                 vcpu->cpu = cpu;
4616         }
4617
4618         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4619 }
4620
4621 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4622 {
4623         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4624         struct kvm_steal_time __user *st;
4625         struct kvm_memslots *slots;
4626         static const u8 preempted = KVM_VCPU_PREEMPTED;
4627
4628         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4629                 return;
4630
4631         if (vcpu->arch.st.preempted)
4632                 return;
4633
4634         /* This happens on process exit */
4635         if (unlikely(current->mm != vcpu->kvm->mm))
4636                 return;
4637
4638         slots = kvm_memslots(vcpu->kvm);
4639
4640         if (unlikely(slots->generation != ghc->generation ||
4641                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4642                 return;
4643
4644         st = (struct kvm_steal_time __user *)ghc->hva;
4645         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4646
4647         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4648                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4649
4650         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4651 }
4652
4653 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4654 {
4655         int idx;
4656
4657         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4658                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4659
4660         /*
4661          * Take the srcu lock as memslots will be accessed to check the gfn
4662          * cache generation against the memslots generation.
4663          */
4664         idx = srcu_read_lock(&vcpu->kvm->srcu);
4665         if (kvm_xen_msr_enabled(vcpu->kvm))
4666                 kvm_xen_runstate_set_preempted(vcpu);
4667         else
4668                 kvm_steal_time_set_preempted(vcpu);
4669         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4670
4671         static_call(kvm_x86_vcpu_put)(vcpu);
4672         vcpu->arch.last_host_tsc = rdtsc();
4673 }
4674
4675 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4676                                     struct kvm_lapic_state *s)
4677 {
4678         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4679
4680         return kvm_apic_get_state(vcpu, s);
4681 }
4682
4683 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4684                                     struct kvm_lapic_state *s)
4685 {
4686         int r;
4687
4688         r = kvm_apic_set_state(vcpu, s);
4689         if (r)
4690                 return r;
4691         update_cr8_intercept(vcpu);
4692
4693         return 0;
4694 }
4695
4696 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4697 {
4698         /*
4699          * We can accept userspace's request for interrupt injection
4700          * as long as we have a place to store the interrupt number.
4701          * The actual injection will happen when the CPU is able to
4702          * deliver the interrupt.
4703          */
4704         if (kvm_cpu_has_extint(vcpu))
4705                 return false;
4706
4707         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4708         return (!lapic_in_kernel(vcpu) ||
4709                 kvm_apic_accept_pic_intr(vcpu));
4710 }
4711
4712 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4713 {
4714         /*
4715          * Do not cause an interrupt window exit if an exception
4716          * is pending or an event needs reinjection; userspace
4717          * might want to inject the interrupt manually using KVM_SET_REGS
4718          * or KVM_SET_SREGS.  For that to work, we must be at an
4719          * instruction boundary and with no events half-injected.
4720          */
4721         return (kvm_arch_interrupt_allowed(vcpu) &&
4722                 kvm_cpu_accept_dm_intr(vcpu) &&
4723                 !kvm_event_needs_reinjection(vcpu) &&
4724                 !vcpu->arch.exception.pending);
4725 }
4726
4727 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4728                                     struct kvm_interrupt *irq)
4729 {
4730         if (irq->irq >= KVM_NR_INTERRUPTS)
4731                 return -EINVAL;
4732
4733         if (!irqchip_in_kernel(vcpu->kvm)) {
4734                 kvm_queue_interrupt(vcpu, irq->irq, false);
4735                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4736                 return 0;
4737         }
4738
4739         /*
4740          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4741          * fail for in-kernel 8259.
4742          */
4743         if (pic_in_kernel(vcpu->kvm))
4744                 return -ENXIO;
4745
4746         if (vcpu->arch.pending_external_vector != -1)
4747                 return -EEXIST;
4748
4749         vcpu->arch.pending_external_vector = irq->irq;
4750         kvm_make_request(KVM_REQ_EVENT, vcpu);
4751         return 0;
4752 }
4753
4754 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4755 {
4756         kvm_inject_nmi(vcpu);
4757
4758         return 0;
4759 }
4760
4761 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4762 {
4763         kvm_make_request(KVM_REQ_SMI, vcpu);
4764
4765         return 0;
4766 }
4767
4768 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4769                                            struct kvm_tpr_access_ctl *tac)
4770 {
4771         if (tac->flags)
4772                 return -EINVAL;
4773         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4774         return 0;
4775 }
4776
4777 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4778                                         u64 mcg_cap)
4779 {
4780         int r;
4781         unsigned bank_num = mcg_cap & 0xff, bank;
4782
4783         r = -EINVAL;
4784         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4785                 goto out;
4786         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4787                 goto out;
4788         r = 0;
4789         vcpu->arch.mcg_cap = mcg_cap;
4790         /* Init IA32_MCG_CTL to all 1s */
4791         if (mcg_cap & MCG_CTL_P)
4792                 vcpu->arch.mcg_ctl = ~(u64)0;
4793         /* Init IA32_MCi_CTL to all 1s */
4794         for (bank = 0; bank < bank_num; bank++)
4795                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4796
4797         static_call(kvm_x86_setup_mce)(vcpu);
4798 out:
4799         return r;
4800 }
4801
4802 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4803                                       struct kvm_x86_mce *mce)
4804 {
4805         u64 mcg_cap = vcpu->arch.mcg_cap;
4806         unsigned bank_num = mcg_cap & 0xff;
4807         u64 *banks = vcpu->arch.mce_banks;
4808
4809         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4810                 return -EINVAL;
4811         /*
4812          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4813          * reporting is disabled
4814          */
4815         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4816             vcpu->arch.mcg_ctl != ~(u64)0)
4817                 return 0;
4818         banks += 4 * mce->bank;
4819         /*
4820          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4821          * reporting is disabled for the bank
4822          */
4823         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4824                 return 0;
4825         if (mce->status & MCI_STATUS_UC) {
4826                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4827                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4828                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4829                         return 0;
4830                 }
4831                 if (banks[1] & MCI_STATUS_VAL)
4832                         mce->status |= MCI_STATUS_OVER;
4833                 banks[2] = mce->addr;
4834                 banks[3] = mce->misc;
4835                 vcpu->arch.mcg_status = mce->mcg_status;
4836                 banks[1] = mce->status;
4837                 kvm_queue_exception(vcpu, MC_VECTOR);
4838         } else if (!(banks[1] & MCI_STATUS_VAL)
4839                    || !(banks[1] & MCI_STATUS_UC)) {
4840                 if (banks[1] & MCI_STATUS_VAL)
4841                         mce->status |= MCI_STATUS_OVER;
4842                 banks[2] = mce->addr;
4843                 banks[3] = mce->misc;
4844                 banks[1] = mce->status;
4845         } else
4846                 banks[1] |= MCI_STATUS_OVER;
4847         return 0;
4848 }
4849
4850 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4851                                                struct kvm_vcpu_events *events)
4852 {
4853         process_nmi(vcpu);
4854
4855         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4856                 process_smi(vcpu);
4857
4858         /*
4859          * In guest mode, payload delivery should be deferred,
4860          * so that the L1 hypervisor can intercept #PF before
4861          * CR2 is modified (or intercept #DB before DR6 is
4862          * modified under nVMX). Unless the per-VM capability,
4863          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4864          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4865          * opportunistically defer the exception payload, deliver it if the
4866          * capability hasn't been requested before processing a
4867          * KVM_GET_VCPU_EVENTS.
4868          */
4869         if (!vcpu->kvm->arch.exception_payload_enabled &&
4870             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4871                 kvm_deliver_exception_payload(vcpu);
4872
4873         /*
4874          * The API doesn't provide the instruction length for software
4875          * exceptions, so don't report them. As long as the guest RIP
4876          * isn't advanced, we should expect to encounter the exception
4877          * again.
4878          */
4879         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4880                 events->exception.injected = 0;
4881                 events->exception.pending = 0;
4882         } else {
4883                 events->exception.injected = vcpu->arch.exception.injected;
4884                 events->exception.pending = vcpu->arch.exception.pending;
4885                 /*
4886                  * For ABI compatibility, deliberately conflate
4887                  * pending and injected exceptions when
4888                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4889                  */
4890                 if (!vcpu->kvm->arch.exception_payload_enabled)
4891                         events->exception.injected |=
4892                                 vcpu->arch.exception.pending;
4893         }
4894         events->exception.nr = vcpu->arch.exception.nr;
4895         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4896         events->exception.error_code = vcpu->arch.exception.error_code;
4897         events->exception_has_payload = vcpu->arch.exception.has_payload;
4898         events->exception_payload = vcpu->arch.exception.payload;
4899
4900         events->interrupt.injected =
4901                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4902         events->interrupt.nr = vcpu->arch.interrupt.nr;
4903         events->interrupt.soft = 0;
4904         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4905
4906         events->nmi.injected = vcpu->arch.nmi_injected;
4907         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4908         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4909         events->nmi.pad = 0;
4910
4911         events->sipi_vector = 0; /* never valid when reporting to user space */
4912
4913         events->smi.smm = is_smm(vcpu);
4914         events->smi.pending = vcpu->arch.smi_pending;
4915         events->smi.smm_inside_nmi =
4916                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4917         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4918
4919         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4920                          | KVM_VCPUEVENT_VALID_SHADOW
4921                          | KVM_VCPUEVENT_VALID_SMM);
4922         if (vcpu->kvm->arch.exception_payload_enabled)
4923                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4924
4925         memset(&events->reserved, 0, sizeof(events->reserved));
4926 }
4927
4928 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4929
4930 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4931                                               struct kvm_vcpu_events *events)
4932 {
4933         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4934                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4935                               | KVM_VCPUEVENT_VALID_SHADOW
4936                               | KVM_VCPUEVENT_VALID_SMM
4937                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4938                 return -EINVAL;
4939
4940         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4941                 if (!vcpu->kvm->arch.exception_payload_enabled)
4942                         return -EINVAL;
4943                 if (events->exception.pending)
4944                         events->exception.injected = 0;
4945                 else
4946                         events->exception_has_payload = 0;
4947         } else {
4948                 events->exception.pending = 0;
4949                 events->exception_has_payload = 0;
4950         }
4951
4952         if ((events->exception.injected || events->exception.pending) &&
4953             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4954                 return -EINVAL;
4955
4956         /* INITs are latched while in SMM */
4957         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4958             (events->smi.smm || events->smi.pending) &&
4959             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4960                 return -EINVAL;
4961
4962         process_nmi(vcpu);
4963         vcpu->arch.exception.injected = events->exception.injected;
4964         vcpu->arch.exception.pending = events->exception.pending;
4965         vcpu->arch.exception.nr = events->exception.nr;
4966         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4967         vcpu->arch.exception.error_code = events->exception.error_code;
4968         vcpu->arch.exception.has_payload = events->exception_has_payload;
4969         vcpu->arch.exception.payload = events->exception_payload;
4970
4971         vcpu->arch.interrupt.injected = events->interrupt.injected;
4972         vcpu->arch.interrupt.nr = events->interrupt.nr;
4973         vcpu->arch.interrupt.soft = events->interrupt.soft;
4974         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4975                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4976                                                 events->interrupt.shadow);
4977
4978         vcpu->arch.nmi_injected = events->nmi.injected;
4979         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4980                 vcpu->arch.nmi_pending = events->nmi.pending;
4981         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4982
4983         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4984             lapic_in_kernel(vcpu))
4985                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4986
4987         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4988                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4989                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4990                         kvm_smm_changed(vcpu, events->smi.smm);
4991                 }
4992
4993                 vcpu->arch.smi_pending = events->smi.pending;
4994
4995                 if (events->smi.smm) {
4996                         if (events->smi.smm_inside_nmi)
4997                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4998                         else
4999                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5000                 }
5001
5002                 if (lapic_in_kernel(vcpu)) {
5003                         if (events->smi.latched_init)
5004                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5005                         else
5006                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5007                 }
5008         }
5009
5010         kvm_make_request(KVM_REQ_EVENT, vcpu);
5011
5012         return 0;
5013 }
5014
5015 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5016                                              struct kvm_debugregs *dbgregs)
5017 {
5018         unsigned long val;
5019
5020         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5021         kvm_get_dr(vcpu, 6, &val);
5022         dbgregs->dr6 = val;
5023         dbgregs->dr7 = vcpu->arch.dr7;
5024         dbgregs->flags = 0;
5025         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
5026 }
5027
5028 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5029                                             struct kvm_debugregs *dbgregs)
5030 {
5031         if (dbgregs->flags)
5032                 return -EINVAL;
5033
5034         if (!kvm_dr6_valid(dbgregs->dr6))
5035                 return -EINVAL;
5036         if (!kvm_dr7_valid(dbgregs->dr7))
5037                 return -EINVAL;
5038
5039         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5040         kvm_update_dr0123(vcpu);
5041         vcpu->arch.dr6 = dbgregs->dr6;
5042         vcpu->arch.dr7 = dbgregs->dr7;
5043         kvm_update_dr7(vcpu);
5044
5045         return 0;
5046 }
5047
5048 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5049                                          struct kvm_xsave *guest_xsave)
5050 {
5051         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5052                 return;
5053
5054         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5055                                        guest_xsave->region,
5056                                        sizeof(guest_xsave->region),
5057                                        vcpu->arch.pkru);
5058 }
5059
5060 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5061                                           u8 *state, unsigned int size)
5062 {
5063         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5064                 return;
5065
5066         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5067                                        state, size, vcpu->arch.pkru);
5068 }
5069
5070 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5071                                         struct kvm_xsave *guest_xsave)
5072 {
5073         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5074                 return 0;
5075
5076         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5077                                               guest_xsave->region,
5078                                               supported_xcr0, &vcpu->arch.pkru);
5079 }
5080
5081 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5082                                         struct kvm_xcrs *guest_xcrs)
5083 {
5084         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5085                 guest_xcrs->nr_xcrs = 0;
5086                 return;
5087         }
5088
5089         guest_xcrs->nr_xcrs = 1;
5090         guest_xcrs->flags = 0;
5091         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5092         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5093 }
5094
5095 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5096                                        struct kvm_xcrs *guest_xcrs)
5097 {
5098         int i, r = 0;
5099
5100         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5101                 return -EINVAL;
5102
5103         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5104                 return -EINVAL;
5105
5106         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5107                 /* Only support XCR0 currently */
5108                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5109                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5110                                 guest_xcrs->xcrs[i].value);
5111                         break;
5112                 }
5113         if (r)
5114                 r = -EINVAL;
5115         return r;
5116 }
5117
5118 /*
5119  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5120  * stopped by the hypervisor.  This function will be called from the host only.
5121  * EINVAL is returned when the host attempts to set the flag for a guest that
5122  * does not support pv clocks.
5123  */
5124 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5125 {
5126         if (!vcpu->arch.pv_time.active)
5127                 return -EINVAL;
5128         vcpu->arch.pvclock_set_guest_stopped_request = true;
5129         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5130         return 0;
5131 }
5132
5133 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5134                                  struct kvm_device_attr *attr)
5135 {
5136         int r;
5137
5138         switch (attr->attr) {
5139         case KVM_VCPU_TSC_OFFSET:
5140                 r = 0;
5141                 break;
5142         default:
5143                 r = -ENXIO;
5144         }
5145
5146         return r;
5147 }
5148
5149 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5150                                  struct kvm_device_attr *attr)
5151 {
5152         u64 __user *uaddr = kvm_get_attr_addr(attr);
5153         int r;
5154
5155         if (IS_ERR(uaddr))
5156                 return PTR_ERR(uaddr);
5157
5158         switch (attr->attr) {
5159         case KVM_VCPU_TSC_OFFSET:
5160                 r = -EFAULT;
5161                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5162                         break;
5163                 r = 0;
5164                 break;
5165         default:
5166                 r = -ENXIO;
5167         }
5168
5169         return r;
5170 }
5171
5172 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5173                                  struct kvm_device_attr *attr)
5174 {
5175         u64 __user *uaddr = kvm_get_attr_addr(attr);
5176         struct kvm *kvm = vcpu->kvm;
5177         int r;
5178
5179         if (IS_ERR(uaddr))
5180                 return PTR_ERR(uaddr);
5181
5182         switch (attr->attr) {
5183         case KVM_VCPU_TSC_OFFSET: {
5184                 u64 offset, tsc, ns;
5185                 unsigned long flags;
5186                 bool matched;
5187
5188                 r = -EFAULT;
5189                 if (get_user(offset, uaddr))
5190                         break;
5191
5192                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5193
5194                 matched = (vcpu->arch.virtual_tsc_khz &&
5195                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5196                            kvm->arch.last_tsc_offset == offset);
5197
5198                 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5199                 ns = get_kvmclock_base_ns();
5200
5201                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5202                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5203
5204                 r = 0;
5205                 break;
5206         }
5207         default:
5208                 r = -ENXIO;
5209         }
5210
5211         return r;
5212 }
5213
5214 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5215                                       unsigned int ioctl,
5216                                       void __user *argp)
5217 {
5218         struct kvm_device_attr attr;
5219         int r;
5220
5221         if (copy_from_user(&attr, argp, sizeof(attr)))
5222                 return -EFAULT;
5223
5224         if (attr.group != KVM_VCPU_TSC_CTRL)
5225                 return -ENXIO;
5226
5227         switch (ioctl) {
5228         case KVM_HAS_DEVICE_ATTR:
5229                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5230                 break;
5231         case KVM_GET_DEVICE_ATTR:
5232                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5233                 break;
5234         case KVM_SET_DEVICE_ATTR:
5235                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5236                 break;
5237         }
5238
5239         return r;
5240 }
5241
5242 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5243                                      struct kvm_enable_cap *cap)
5244 {
5245         int r;
5246         uint16_t vmcs_version;
5247         void __user *user_ptr;
5248
5249         if (cap->flags)
5250                 return -EINVAL;
5251
5252         switch (cap->cap) {
5253         case KVM_CAP_HYPERV_SYNIC2:
5254                 if (cap->args[0])
5255                         return -EINVAL;
5256                 fallthrough;
5257
5258         case KVM_CAP_HYPERV_SYNIC:
5259                 if (!irqchip_in_kernel(vcpu->kvm))
5260                         return -EINVAL;
5261                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5262                                              KVM_CAP_HYPERV_SYNIC2);
5263         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5264                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5265                         return -ENOTTY;
5266                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5267                 if (!r) {
5268                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5269                         if (copy_to_user(user_ptr, &vmcs_version,
5270                                          sizeof(vmcs_version)))
5271                                 r = -EFAULT;
5272                 }
5273                 return r;
5274         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5275                 if (!kvm_x86_ops.enable_direct_tlbflush)
5276                         return -ENOTTY;
5277
5278                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5279
5280         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5281                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5282
5283         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5284                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5285                 if (vcpu->arch.pv_cpuid.enforce)
5286                         kvm_update_pv_runtime(vcpu);
5287
5288                 return 0;
5289         default:
5290                 return -EINVAL;
5291         }
5292 }
5293
5294 long kvm_arch_vcpu_ioctl(struct file *filp,
5295                          unsigned int ioctl, unsigned long arg)
5296 {
5297         struct kvm_vcpu *vcpu = filp->private_data;
5298         void __user *argp = (void __user *)arg;
5299         int r;
5300         union {
5301                 struct kvm_sregs2 *sregs2;
5302                 struct kvm_lapic_state *lapic;
5303                 struct kvm_xsave *xsave;
5304                 struct kvm_xcrs *xcrs;
5305                 void *buffer;
5306         } u;
5307
5308         vcpu_load(vcpu);
5309
5310         u.buffer = NULL;
5311         switch (ioctl) {
5312         case KVM_GET_LAPIC: {
5313                 r = -EINVAL;
5314                 if (!lapic_in_kernel(vcpu))
5315                         goto out;
5316                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5317                                 GFP_KERNEL_ACCOUNT);
5318
5319                 r = -ENOMEM;
5320                 if (!u.lapic)
5321                         goto out;
5322                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5323                 if (r)
5324                         goto out;
5325                 r = -EFAULT;
5326                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5327                         goto out;
5328                 r = 0;
5329                 break;
5330         }
5331         case KVM_SET_LAPIC: {
5332                 r = -EINVAL;
5333                 if (!lapic_in_kernel(vcpu))
5334                         goto out;
5335                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5336                 if (IS_ERR(u.lapic)) {
5337                         r = PTR_ERR(u.lapic);
5338                         goto out_nofree;
5339                 }
5340
5341                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5342                 break;
5343         }
5344         case KVM_INTERRUPT: {
5345                 struct kvm_interrupt irq;
5346
5347                 r = -EFAULT;
5348                 if (copy_from_user(&irq, argp, sizeof(irq)))
5349                         goto out;
5350                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5351                 break;
5352         }
5353         case KVM_NMI: {
5354                 r = kvm_vcpu_ioctl_nmi(vcpu);
5355                 break;
5356         }
5357         case KVM_SMI: {
5358                 r = kvm_vcpu_ioctl_smi(vcpu);
5359                 break;
5360         }
5361         case KVM_SET_CPUID: {
5362                 struct kvm_cpuid __user *cpuid_arg = argp;
5363                 struct kvm_cpuid cpuid;
5364
5365                 r = -EFAULT;
5366                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5367                         goto out;
5368                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5369                 break;
5370         }
5371         case KVM_SET_CPUID2: {
5372                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5373                 struct kvm_cpuid2 cpuid;
5374
5375                 r = -EFAULT;
5376                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5377                         goto out;
5378                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5379                                               cpuid_arg->entries);
5380                 break;
5381         }
5382         case KVM_GET_CPUID2: {
5383                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5384                 struct kvm_cpuid2 cpuid;
5385
5386                 r = -EFAULT;
5387                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5388                         goto out;
5389                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5390                                               cpuid_arg->entries);
5391                 if (r)
5392                         goto out;
5393                 r = -EFAULT;
5394                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5395                         goto out;
5396                 r = 0;
5397                 break;
5398         }
5399         case KVM_GET_MSRS: {
5400                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5401                 r = msr_io(vcpu, argp, do_get_msr, 1);
5402                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5403                 break;
5404         }
5405         case KVM_SET_MSRS: {
5406                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5407                 r = msr_io(vcpu, argp, do_set_msr, 0);
5408                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5409                 break;
5410         }
5411         case KVM_TPR_ACCESS_REPORTING: {
5412                 struct kvm_tpr_access_ctl tac;
5413
5414                 r = -EFAULT;
5415                 if (copy_from_user(&tac, argp, sizeof(tac)))
5416                         goto out;
5417                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5418                 if (r)
5419                         goto out;
5420                 r = -EFAULT;
5421                 if (copy_to_user(argp, &tac, sizeof(tac)))
5422                         goto out;
5423                 r = 0;
5424                 break;
5425         };
5426         case KVM_SET_VAPIC_ADDR: {
5427                 struct kvm_vapic_addr va;
5428                 int idx;
5429
5430                 r = -EINVAL;
5431                 if (!lapic_in_kernel(vcpu))
5432                         goto out;
5433                 r = -EFAULT;
5434                 if (copy_from_user(&va, argp, sizeof(va)))
5435                         goto out;
5436                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5437                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5438                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5439                 break;
5440         }
5441         case KVM_X86_SETUP_MCE: {
5442                 u64 mcg_cap;
5443
5444                 r = -EFAULT;
5445                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5446                         goto out;
5447                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5448                 break;
5449         }
5450         case KVM_X86_SET_MCE: {
5451                 struct kvm_x86_mce mce;
5452
5453                 r = -EFAULT;
5454                 if (copy_from_user(&mce, argp, sizeof(mce)))
5455                         goto out;
5456                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5457                 break;
5458         }
5459         case KVM_GET_VCPU_EVENTS: {
5460                 struct kvm_vcpu_events events;
5461
5462                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5463
5464                 r = -EFAULT;
5465                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5466                         break;
5467                 r = 0;
5468                 break;
5469         }
5470         case KVM_SET_VCPU_EVENTS: {
5471                 struct kvm_vcpu_events events;
5472
5473                 r = -EFAULT;
5474                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5475                         break;
5476
5477                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5478                 break;
5479         }
5480         case KVM_GET_DEBUGREGS: {
5481                 struct kvm_debugregs dbgregs;
5482
5483                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5484
5485                 r = -EFAULT;
5486                 if (copy_to_user(argp, &dbgregs,
5487                                  sizeof(struct kvm_debugregs)))
5488                         break;
5489                 r = 0;
5490                 break;
5491         }
5492         case KVM_SET_DEBUGREGS: {
5493                 struct kvm_debugregs dbgregs;
5494
5495                 r = -EFAULT;
5496                 if (copy_from_user(&dbgregs, argp,
5497                                    sizeof(struct kvm_debugregs)))
5498                         break;
5499
5500                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5501                 break;
5502         }
5503         case KVM_GET_XSAVE: {
5504                 r = -EINVAL;
5505                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5506                         break;
5507
5508                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5509                 r = -ENOMEM;
5510                 if (!u.xsave)
5511                         break;
5512
5513                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5514
5515                 r = -EFAULT;
5516                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5517                         break;
5518                 r = 0;
5519                 break;
5520         }
5521         case KVM_SET_XSAVE: {
5522                 int size = vcpu->arch.guest_fpu.uabi_size;
5523
5524                 u.xsave = memdup_user(argp, size);
5525                 if (IS_ERR(u.xsave)) {
5526                         r = PTR_ERR(u.xsave);
5527                         goto out_nofree;
5528                 }
5529
5530                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5531                 break;
5532         }
5533
5534         case KVM_GET_XSAVE2: {
5535                 int size = vcpu->arch.guest_fpu.uabi_size;
5536
5537                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5538                 r = -ENOMEM;
5539                 if (!u.xsave)
5540                         break;
5541
5542                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5543
5544                 r = -EFAULT;
5545                 if (copy_to_user(argp, u.xsave, size))
5546                         break;
5547
5548                 r = 0;
5549                 break;
5550         }
5551
5552         case KVM_GET_XCRS: {
5553                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5554                 r = -ENOMEM;
5555                 if (!u.xcrs)
5556                         break;
5557
5558                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5559
5560                 r = -EFAULT;
5561                 if (copy_to_user(argp, u.xcrs,
5562                                  sizeof(struct kvm_xcrs)))
5563                         break;
5564                 r = 0;
5565                 break;
5566         }
5567         case KVM_SET_XCRS: {
5568                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5569                 if (IS_ERR(u.xcrs)) {
5570                         r = PTR_ERR(u.xcrs);
5571                         goto out_nofree;
5572                 }
5573
5574                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5575                 break;
5576         }
5577         case KVM_SET_TSC_KHZ: {
5578                 u32 user_tsc_khz;
5579
5580                 r = -EINVAL;
5581                 user_tsc_khz = (u32)arg;
5582
5583                 if (kvm_has_tsc_control &&
5584                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5585                         goto out;
5586
5587                 if (user_tsc_khz == 0)
5588                         user_tsc_khz = tsc_khz;
5589
5590                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5591                         r = 0;
5592
5593                 goto out;
5594         }
5595         case KVM_GET_TSC_KHZ: {
5596                 r = vcpu->arch.virtual_tsc_khz;
5597                 goto out;
5598         }
5599         case KVM_KVMCLOCK_CTRL: {
5600                 r = kvm_set_guest_paused(vcpu);
5601                 goto out;
5602         }
5603         case KVM_ENABLE_CAP: {
5604                 struct kvm_enable_cap cap;
5605
5606                 r = -EFAULT;
5607                 if (copy_from_user(&cap, argp, sizeof(cap)))
5608                         goto out;
5609                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5610                 break;
5611         }
5612         case KVM_GET_NESTED_STATE: {
5613                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5614                 u32 user_data_size;
5615
5616                 r = -EINVAL;
5617                 if (!kvm_x86_ops.nested_ops->get_state)
5618                         break;
5619
5620                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5621                 r = -EFAULT;
5622                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5623                         break;
5624
5625                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5626                                                      user_data_size);
5627                 if (r < 0)
5628                         break;
5629
5630                 if (r > user_data_size) {
5631                         if (put_user(r, &user_kvm_nested_state->size))
5632                                 r = -EFAULT;
5633                         else
5634                                 r = -E2BIG;
5635                         break;
5636                 }
5637
5638                 r = 0;
5639                 break;
5640         }
5641         case KVM_SET_NESTED_STATE: {
5642                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5643                 struct kvm_nested_state kvm_state;
5644                 int idx;
5645
5646                 r = -EINVAL;
5647                 if (!kvm_x86_ops.nested_ops->set_state)
5648                         break;
5649
5650                 r = -EFAULT;
5651                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5652                         break;
5653
5654                 r = -EINVAL;
5655                 if (kvm_state.size < sizeof(kvm_state))
5656                         break;
5657
5658                 if (kvm_state.flags &
5659                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5660                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5661                       | KVM_STATE_NESTED_GIF_SET))
5662                         break;
5663
5664                 /* nested_run_pending implies guest_mode.  */
5665                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5666                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5667                         break;
5668
5669                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5670                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5671                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5672                 break;
5673         }
5674         case KVM_GET_SUPPORTED_HV_CPUID:
5675                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5676                 break;
5677 #ifdef CONFIG_KVM_XEN
5678         case KVM_XEN_VCPU_GET_ATTR: {
5679                 struct kvm_xen_vcpu_attr xva;
5680
5681                 r = -EFAULT;
5682                 if (copy_from_user(&xva, argp, sizeof(xva)))
5683                         goto out;
5684                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5685                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5686                         r = -EFAULT;
5687                 break;
5688         }
5689         case KVM_XEN_VCPU_SET_ATTR: {
5690                 struct kvm_xen_vcpu_attr xva;
5691
5692                 r = -EFAULT;
5693                 if (copy_from_user(&xva, argp, sizeof(xva)))
5694                         goto out;
5695                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5696                 break;
5697         }
5698 #endif
5699         case KVM_GET_SREGS2: {
5700                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5701                 r = -ENOMEM;
5702                 if (!u.sregs2)
5703                         goto out;
5704                 __get_sregs2(vcpu, u.sregs2);
5705                 r = -EFAULT;
5706                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5707                         goto out;
5708                 r = 0;
5709                 break;
5710         }
5711         case KVM_SET_SREGS2: {
5712                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5713                 if (IS_ERR(u.sregs2)) {
5714                         r = PTR_ERR(u.sregs2);
5715                         u.sregs2 = NULL;
5716                         goto out;
5717                 }
5718                 r = __set_sregs2(vcpu, u.sregs2);
5719                 break;
5720         }
5721         case KVM_HAS_DEVICE_ATTR:
5722         case KVM_GET_DEVICE_ATTR:
5723         case KVM_SET_DEVICE_ATTR:
5724                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5725                 break;
5726         default:
5727                 r = -EINVAL;
5728         }
5729 out:
5730         kfree(u.buffer);
5731 out_nofree:
5732         vcpu_put(vcpu);
5733         return r;
5734 }
5735
5736 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5737 {
5738         return VM_FAULT_SIGBUS;
5739 }
5740
5741 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5742 {
5743         int ret;
5744
5745         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5746                 return -EINVAL;
5747         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5748         return ret;
5749 }
5750
5751 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5752                                               u64 ident_addr)
5753 {
5754         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5755 }
5756
5757 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5758                                          unsigned long kvm_nr_mmu_pages)
5759 {
5760         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5761                 return -EINVAL;
5762
5763         mutex_lock(&kvm->slots_lock);
5764
5765         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5766         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5767
5768         mutex_unlock(&kvm->slots_lock);
5769         return 0;
5770 }
5771
5772 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5773 {
5774         return kvm->arch.n_max_mmu_pages;
5775 }
5776
5777 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5778 {
5779         struct kvm_pic *pic = kvm->arch.vpic;
5780         int r;
5781
5782         r = 0;
5783         switch (chip->chip_id) {
5784         case KVM_IRQCHIP_PIC_MASTER:
5785                 memcpy(&chip->chip.pic, &pic->pics[0],
5786                         sizeof(struct kvm_pic_state));
5787                 break;
5788         case KVM_IRQCHIP_PIC_SLAVE:
5789                 memcpy(&chip->chip.pic, &pic->pics[1],
5790                         sizeof(struct kvm_pic_state));
5791                 break;
5792         case KVM_IRQCHIP_IOAPIC:
5793                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5794                 break;
5795         default:
5796                 r = -EINVAL;
5797                 break;
5798         }
5799         return r;
5800 }
5801
5802 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5803 {
5804         struct kvm_pic *pic = kvm->arch.vpic;
5805         int r;
5806
5807         r = 0;
5808         switch (chip->chip_id) {
5809         case KVM_IRQCHIP_PIC_MASTER:
5810                 spin_lock(&pic->lock);
5811                 memcpy(&pic->pics[0], &chip->chip.pic,
5812                         sizeof(struct kvm_pic_state));
5813                 spin_unlock(&pic->lock);
5814                 break;
5815         case KVM_IRQCHIP_PIC_SLAVE:
5816                 spin_lock(&pic->lock);
5817                 memcpy(&pic->pics[1], &chip->chip.pic,
5818                         sizeof(struct kvm_pic_state));
5819                 spin_unlock(&pic->lock);
5820                 break;
5821         case KVM_IRQCHIP_IOAPIC:
5822                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5823                 break;
5824         default:
5825                 r = -EINVAL;
5826                 break;
5827         }
5828         kvm_pic_update_irq(pic);
5829         return r;
5830 }
5831
5832 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5833 {
5834         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5835
5836         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5837
5838         mutex_lock(&kps->lock);
5839         memcpy(ps, &kps->channels, sizeof(*ps));
5840         mutex_unlock(&kps->lock);
5841         return 0;
5842 }
5843
5844 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5845 {
5846         int i;
5847         struct kvm_pit *pit = kvm->arch.vpit;
5848
5849         mutex_lock(&pit->pit_state.lock);
5850         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5851         for (i = 0; i < 3; i++)
5852                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5853         mutex_unlock(&pit->pit_state.lock);
5854         return 0;
5855 }
5856
5857 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5858 {
5859         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5860         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5861                 sizeof(ps->channels));
5862         ps->flags = kvm->arch.vpit->pit_state.flags;
5863         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5864         memset(&ps->reserved, 0, sizeof(ps->reserved));
5865         return 0;
5866 }
5867
5868 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5869 {
5870         int start = 0;
5871         int i;
5872         u32 prev_legacy, cur_legacy;
5873         struct kvm_pit *pit = kvm->arch.vpit;
5874
5875         mutex_lock(&pit->pit_state.lock);
5876         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5877         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5878         if (!prev_legacy && cur_legacy)
5879                 start = 1;
5880         memcpy(&pit->pit_state.channels, &ps->channels,
5881                sizeof(pit->pit_state.channels));
5882         pit->pit_state.flags = ps->flags;
5883         for (i = 0; i < 3; i++)
5884                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5885                                    start && i == 0);
5886         mutex_unlock(&pit->pit_state.lock);
5887         return 0;
5888 }
5889
5890 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5891                                  struct kvm_reinject_control *control)
5892 {
5893         struct kvm_pit *pit = kvm->arch.vpit;
5894
5895         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5896          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5897          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5898          */
5899         mutex_lock(&pit->pit_state.lock);
5900         kvm_pit_set_reinject(pit, control->pit_reinject);
5901         mutex_unlock(&pit->pit_state.lock);
5902
5903         return 0;
5904 }
5905
5906 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5907 {
5908
5909         /*
5910          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5911          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5912          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5913          * VM-Exit.
5914          */
5915         struct kvm_vcpu *vcpu;
5916         unsigned long i;
5917
5918         kvm_for_each_vcpu(i, vcpu, kvm)
5919                 kvm_vcpu_kick(vcpu);
5920 }
5921
5922 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5923                         bool line_status)
5924 {
5925         if (!irqchip_in_kernel(kvm))
5926                 return -ENXIO;
5927
5928         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5929                                         irq_event->irq, irq_event->level,
5930                                         line_status);
5931         return 0;
5932 }
5933
5934 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5935                             struct kvm_enable_cap *cap)
5936 {
5937         int r;
5938
5939         if (cap->flags)
5940                 return -EINVAL;
5941
5942         switch (cap->cap) {
5943         case KVM_CAP_DISABLE_QUIRKS2:
5944                 r = -EINVAL;
5945                 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
5946                         break;
5947                 fallthrough;
5948         case KVM_CAP_DISABLE_QUIRKS:
5949                 kvm->arch.disabled_quirks = cap->args[0];
5950                 r = 0;
5951                 break;
5952         case KVM_CAP_SPLIT_IRQCHIP: {
5953                 mutex_lock(&kvm->lock);
5954                 r = -EINVAL;
5955                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5956                         goto split_irqchip_unlock;
5957                 r = -EEXIST;
5958                 if (irqchip_in_kernel(kvm))
5959                         goto split_irqchip_unlock;
5960                 if (kvm->created_vcpus)
5961                         goto split_irqchip_unlock;
5962                 r = kvm_setup_empty_irq_routing(kvm);
5963                 if (r)
5964                         goto split_irqchip_unlock;
5965                 /* Pairs with irqchip_in_kernel. */
5966                 smp_wmb();
5967                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5968                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5969                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
5970                 r = 0;
5971 split_irqchip_unlock:
5972                 mutex_unlock(&kvm->lock);
5973                 break;
5974         }
5975         case KVM_CAP_X2APIC_API:
5976                 r = -EINVAL;
5977                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5978                         break;
5979
5980                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5981                         kvm->arch.x2apic_format = true;
5982                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5983                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5984
5985                 r = 0;
5986                 break;
5987         case KVM_CAP_X86_DISABLE_EXITS:
5988                 r = -EINVAL;
5989                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5990                         break;
5991
5992                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5993                         kvm_can_mwait_in_guest())
5994                         kvm->arch.mwait_in_guest = true;
5995                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5996                         kvm->arch.hlt_in_guest = true;
5997                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5998                         kvm->arch.pause_in_guest = true;
5999                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6000                         kvm->arch.cstate_in_guest = true;
6001                 r = 0;
6002                 break;
6003         case KVM_CAP_MSR_PLATFORM_INFO:
6004                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6005                 r = 0;
6006                 break;
6007         case KVM_CAP_EXCEPTION_PAYLOAD:
6008                 kvm->arch.exception_payload_enabled = cap->args[0];
6009                 r = 0;
6010                 break;
6011         case KVM_CAP_X86_USER_SPACE_MSR:
6012                 kvm->arch.user_space_msr_mask = cap->args[0];
6013                 r = 0;
6014                 break;
6015         case KVM_CAP_X86_BUS_LOCK_EXIT:
6016                 r = -EINVAL;
6017                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6018                         break;
6019
6020                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6021                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6022                         break;
6023
6024                 if (kvm_has_bus_lock_exit &&
6025                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6026                         kvm->arch.bus_lock_detection_enabled = true;
6027                 r = 0;
6028                 break;
6029 #ifdef CONFIG_X86_SGX_KVM
6030         case KVM_CAP_SGX_ATTRIBUTE: {
6031                 unsigned long allowed_attributes = 0;
6032
6033                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6034                 if (r)
6035                         break;
6036
6037                 /* KVM only supports the PROVISIONKEY privileged attribute. */
6038                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6039                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6040                         kvm->arch.sgx_provisioning_allowed = true;
6041                 else
6042                         r = -EINVAL;
6043                 break;
6044         }
6045 #endif
6046         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6047                 r = -EINVAL;
6048                 if (!kvm_x86_ops.vm_copy_enc_context_from)
6049                         break;
6050
6051                 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6052                 break;
6053         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6054                 r = -EINVAL;
6055                 if (!kvm_x86_ops.vm_move_enc_context_from)
6056                         break;
6057
6058                 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6059                 break;
6060         case KVM_CAP_EXIT_HYPERCALL:
6061                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6062                         r = -EINVAL;
6063                         break;
6064                 }
6065                 kvm->arch.hypercall_exit_enabled = cap->args[0];
6066                 r = 0;
6067                 break;
6068         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6069                 r = -EINVAL;
6070                 if (cap->args[0] & ~1)
6071                         break;
6072                 kvm->arch.exit_on_emulation_error = cap->args[0];
6073                 r = 0;
6074                 break;
6075         case KVM_CAP_PMU_CAPABILITY:
6076                 r = -EINVAL;
6077                 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6078                         break;
6079
6080                 mutex_lock(&kvm->lock);
6081                 if (!kvm->created_vcpus) {
6082                         kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6083                         r = 0;
6084                 }
6085                 mutex_unlock(&kvm->lock);
6086                 break;
6087         default:
6088                 r = -EINVAL;
6089                 break;
6090         }
6091         return r;
6092 }
6093
6094 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6095 {
6096         struct kvm_x86_msr_filter *msr_filter;
6097
6098         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6099         if (!msr_filter)
6100                 return NULL;
6101
6102         msr_filter->default_allow = default_allow;
6103         return msr_filter;
6104 }
6105
6106 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6107 {
6108         u32 i;
6109
6110         if (!msr_filter)
6111                 return;
6112
6113         for (i = 0; i < msr_filter->count; i++)
6114                 kfree(msr_filter->ranges[i].bitmap);
6115
6116         kfree(msr_filter);
6117 }
6118
6119 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6120                               struct kvm_msr_filter_range *user_range)
6121 {
6122         unsigned long *bitmap = NULL;
6123         size_t bitmap_size;
6124
6125         if (!user_range->nmsrs)
6126                 return 0;
6127
6128         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6129                 return -EINVAL;
6130
6131         if (!user_range->flags)
6132                 return -EINVAL;
6133
6134         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6135         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6136                 return -EINVAL;
6137
6138         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6139         if (IS_ERR(bitmap))
6140                 return PTR_ERR(bitmap);
6141
6142         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6143                 .flags = user_range->flags,
6144                 .base = user_range->base,
6145                 .nmsrs = user_range->nmsrs,
6146                 .bitmap = bitmap,
6147         };
6148
6149         msr_filter->count++;
6150         return 0;
6151 }
6152
6153 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6154 {
6155         struct kvm_msr_filter __user *user_msr_filter = argp;
6156         struct kvm_x86_msr_filter *new_filter, *old_filter;
6157         struct kvm_msr_filter filter;
6158         bool default_allow;
6159         bool empty = true;
6160         int r = 0;
6161         u32 i;
6162
6163         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6164                 return -EFAULT;
6165
6166         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6167                 empty &= !filter.ranges[i].nmsrs;
6168
6169         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6170         if (empty && !default_allow)
6171                 return -EINVAL;
6172
6173         new_filter = kvm_alloc_msr_filter(default_allow);
6174         if (!new_filter)
6175                 return -ENOMEM;
6176
6177         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6178                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6179                 if (r) {
6180                         kvm_free_msr_filter(new_filter);
6181                         return r;
6182                 }
6183         }
6184
6185         mutex_lock(&kvm->lock);
6186
6187         /* The per-VM filter is protected by kvm->lock... */
6188         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6189
6190         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6191         synchronize_srcu(&kvm->srcu);
6192
6193         kvm_free_msr_filter(old_filter);
6194
6195         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6196         mutex_unlock(&kvm->lock);
6197
6198         return 0;
6199 }
6200
6201 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6202 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6203 {
6204         struct kvm_vcpu *vcpu;
6205         unsigned long i;
6206         int ret = 0;
6207
6208         mutex_lock(&kvm->lock);
6209         kvm_for_each_vcpu(i, vcpu, kvm) {
6210                 if (!vcpu->arch.pv_time.active)
6211                         continue;
6212
6213                 ret = kvm_set_guest_paused(vcpu);
6214                 if (ret) {
6215                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6216                                 vcpu->vcpu_id, ret);
6217                         break;
6218                 }
6219         }
6220         mutex_unlock(&kvm->lock);
6221
6222         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6223 }
6224
6225 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6226 {
6227         switch (state) {
6228         case PM_HIBERNATION_PREPARE:
6229         case PM_SUSPEND_PREPARE:
6230                 return kvm_arch_suspend_notifier(kvm);
6231         }
6232
6233         return NOTIFY_DONE;
6234 }
6235 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6236
6237 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6238 {
6239         struct kvm_clock_data data = { 0 };
6240
6241         get_kvmclock(kvm, &data);
6242         if (copy_to_user(argp, &data, sizeof(data)))
6243                 return -EFAULT;
6244
6245         return 0;
6246 }
6247
6248 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6249 {
6250         struct kvm_arch *ka = &kvm->arch;
6251         struct kvm_clock_data data;
6252         u64 now_raw_ns;
6253
6254         if (copy_from_user(&data, argp, sizeof(data)))
6255                 return -EFAULT;
6256
6257         /*
6258          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6259          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6260          */
6261         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6262                 return -EINVAL;
6263
6264         kvm_hv_request_tsc_page_update(kvm);
6265         kvm_start_pvclock_update(kvm);
6266         pvclock_update_vm_gtod_copy(kvm);
6267
6268         /*
6269          * This pairs with kvm_guest_time_update(): when masterclock is
6270          * in use, we use master_kernel_ns + kvmclock_offset to set
6271          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6272          * is slightly ahead) here we risk going negative on unsigned
6273          * 'system_time' when 'data.clock' is very small.
6274          */
6275         if (data.flags & KVM_CLOCK_REALTIME) {
6276                 u64 now_real_ns = ktime_get_real_ns();
6277
6278                 /*
6279                  * Avoid stepping the kvmclock backwards.
6280                  */
6281                 if (now_real_ns > data.realtime)
6282                         data.clock += now_real_ns - data.realtime;
6283         }
6284
6285         if (ka->use_master_clock)
6286                 now_raw_ns = ka->master_kernel_ns;
6287         else
6288                 now_raw_ns = get_kvmclock_base_ns();
6289         ka->kvmclock_offset = data.clock - now_raw_ns;
6290         kvm_end_pvclock_update(kvm);
6291         return 0;
6292 }
6293
6294 long kvm_arch_vm_ioctl(struct file *filp,
6295                        unsigned int ioctl, unsigned long arg)
6296 {
6297         struct kvm *kvm = filp->private_data;
6298         void __user *argp = (void __user *)arg;
6299         int r = -ENOTTY;
6300         /*
6301          * This union makes it completely explicit to gcc-3.x
6302          * that these two variables' stack usage should be
6303          * combined, not added together.
6304          */
6305         union {
6306                 struct kvm_pit_state ps;
6307                 struct kvm_pit_state2 ps2;
6308                 struct kvm_pit_config pit_config;
6309         } u;
6310
6311         switch (ioctl) {
6312         case KVM_SET_TSS_ADDR:
6313                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6314                 break;
6315         case KVM_SET_IDENTITY_MAP_ADDR: {
6316                 u64 ident_addr;
6317
6318                 mutex_lock(&kvm->lock);
6319                 r = -EINVAL;
6320                 if (kvm->created_vcpus)
6321                         goto set_identity_unlock;
6322                 r = -EFAULT;
6323                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6324                         goto set_identity_unlock;
6325                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6326 set_identity_unlock:
6327                 mutex_unlock(&kvm->lock);
6328                 break;
6329         }
6330         case KVM_SET_NR_MMU_PAGES:
6331                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6332                 break;
6333         case KVM_GET_NR_MMU_PAGES:
6334                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6335                 break;
6336         case KVM_CREATE_IRQCHIP: {
6337                 mutex_lock(&kvm->lock);
6338
6339                 r = -EEXIST;
6340                 if (irqchip_in_kernel(kvm))
6341                         goto create_irqchip_unlock;
6342
6343                 r = -EINVAL;
6344                 if (kvm->created_vcpus)
6345                         goto create_irqchip_unlock;
6346
6347                 r = kvm_pic_init(kvm);
6348                 if (r)
6349                         goto create_irqchip_unlock;
6350
6351                 r = kvm_ioapic_init(kvm);
6352                 if (r) {
6353                         kvm_pic_destroy(kvm);
6354                         goto create_irqchip_unlock;
6355                 }
6356
6357                 r = kvm_setup_default_irq_routing(kvm);
6358                 if (r) {
6359                         kvm_ioapic_destroy(kvm);
6360                         kvm_pic_destroy(kvm);
6361                         goto create_irqchip_unlock;
6362                 }
6363                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6364                 smp_wmb();
6365                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6366                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6367         create_irqchip_unlock:
6368                 mutex_unlock(&kvm->lock);
6369                 break;
6370         }
6371         case KVM_CREATE_PIT:
6372                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6373                 goto create_pit;
6374         case KVM_CREATE_PIT2:
6375                 r = -EFAULT;
6376                 if (copy_from_user(&u.pit_config, argp,
6377                                    sizeof(struct kvm_pit_config)))
6378                         goto out;
6379         create_pit:
6380                 mutex_lock(&kvm->lock);
6381                 r = -EEXIST;
6382                 if (kvm->arch.vpit)
6383                         goto create_pit_unlock;
6384                 r = -ENOMEM;
6385                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6386                 if (kvm->arch.vpit)
6387                         r = 0;
6388         create_pit_unlock:
6389                 mutex_unlock(&kvm->lock);
6390                 break;
6391         case KVM_GET_IRQCHIP: {
6392                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6393                 struct kvm_irqchip *chip;
6394
6395                 chip = memdup_user(argp, sizeof(*chip));
6396                 if (IS_ERR(chip)) {
6397                         r = PTR_ERR(chip);
6398                         goto out;
6399                 }
6400
6401                 r = -ENXIO;
6402                 if (!irqchip_kernel(kvm))
6403                         goto get_irqchip_out;
6404                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6405                 if (r)
6406                         goto get_irqchip_out;
6407                 r = -EFAULT;
6408                 if (copy_to_user(argp, chip, sizeof(*chip)))
6409                         goto get_irqchip_out;
6410                 r = 0;
6411         get_irqchip_out:
6412                 kfree(chip);
6413                 break;
6414         }
6415         case KVM_SET_IRQCHIP: {
6416                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6417                 struct kvm_irqchip *chip;
6418
6419                 chip = memdup_user(argp, sizeof(*chip));
6420                 if (IS_ERR(chip)) {
6421                         r = PTR_ERR(chip);
6422                         goto out;
6423                 }
6424
6425                 r = -ENXIO;
6426                 if (!irqchip_kernel(kvm))
6427                         goto set_irqchip_out;
6428                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6429         set_irqchip_out:
6430                 kfree(chip);
6431                 break;
6432         }
6433         case KVM_GET_PIT: {
6434                 r = -EFAULT;
6435                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6436                         goto out;
6437                 r = -ENXIO;
6438                 if (!kvm->arch.vpit)
6439                         goto out;
6440                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6441                 if (r)
6442                         goto out;
6443                 r = -EFAULT;
6444                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6445                         goto out;
6446                 r = 0;
6447                 break;
6448         }
6449         case KVM_SET_PIT: {
6450                 r = -EFAULT;
6451                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6452                         goto out;
6453                 mutex_lock(&kvm->lock);
6454                 r = -ENXIO;
6455                 if (!kvm->arch.vpit)
6456                         goto set_pit_out;
6457                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6458 set_pit_out:
6459                 mutex_unlock(&kvm->lock);
6460                 break;
6461         }
6462         case KVM_GET_PIT2: {
6463                 r = -ENXIO;
6464                 if (!kvm->arch.vpit)
6465                         goto out;
6466                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6467                 if (r)
6468                         goto out;
6469                 r = -EFAULT;
6470                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6471                         goto out;
6472                 r = 0;
6473                 break;
6474         }
6475         case KVM_SET_PIT2: {
6476                 r = -EFAULT;
6477                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6478                         goto out;
6479                 mutex_lock(&kvm->lock);
6480                 r = -ENXIO;
6481                 if (!kvm->arch.vpit)
6482                         goto set_pit2_out;
6483                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6484 set_pit2_out:
6485                 mutex_unlock(&kvm->lock);
6486                 break;
6487         }
6488         case KVM_REINJECT_CONTROL: {
6489                 struct kvm_reinject_control control;
6490                 r =  -EFAULT;
6491                 if (copy_from_user(&control, argp, sizeof(control)))
6492                         goto out;
6493                 r = -ENXIO;
6494                 if (!kvm->arch.vpit)
6495                         goto out;
6496                 r = kvm_vm_ioctl_reinject(kvm, &control);
6497                 break;
6498         }
6499         case KVM_SET_BOOT_CPU_ID:
6500                 r = 0;
6501                 mutex_lock(&kvm->lock);
6502                 if (kvm->created_vcpus)
6503                         r = -EBUSY;
6504                 else
6505                         kvm->arch.bsp_vcpu_id = arg;
6506                 mutex_unlock(&kvm->lock);
6507                 break;
6508 #ifdef CONFIG_KVM_XEN
6509         case KVM_XEN_HVM_CONFIG: {
6510                 struct kvm_xen_hvm_config xhc;
6511                 r = -EFAULT;
6512                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6513                         goto out;
6514                 r = kvm_xen_hvm_config(kvm, &xhc);
6515                 break;
6516         }
6517         case KVM_XEN_HVM_GET_ATTR: {
6518                 struct kvm_xen_hvm_attr xha;
6519
6520                 r = -EFAULT;
6521                 if (copy_from_user(&xha, argp, sizeof(xha)))
6522                         goto out;
6523                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6524                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6525                         r = -EFAULT;
6526                 break;
6527         }
6528         case KVM_XEN_HVM_SET_ATTR: {
6529                 struct kvm_xen_hvm_attr xha;
6530
6531                 r = -EFAULT;
6532                 if (copy_from_user(&xha, argp, sizeof(xha)))
6533                         goto out;
6534                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6535                 break;
6536         }
6537         case KVM_XEN_HVM_EVTCHN_SEND: {
6538                 struct kvm_irq_routing_xen_evtchn uxe;
6539
6540                 r = -EFAULT;
6541                 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6542                         goto out;
6543                 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6544                 break;
6545         }
6546 #endif
6547         case KVM_SET_CLOCK:
6548                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6549                 break;
6550         case KVM_GET_CLOCK:
6551                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6552                 break;
6553         case KVM_SET_TSC_KHZ: {
6554                 u32 user_tsc_khz;
6555
6556                 r = -EINVAL;
6557                 user_tsc_khz = (u32)arg;
6558
6559                 if (kvm_has_tsc_control &&
6560                     user_tsc_khz >= kvm_max_guest_tsc_khz)
6561                         goto out;
6562
6563                 if (user_tsc_khz == 0)
6564                         user_tsc_khz = tsc_khz;
6565
6566                 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6567                 r = 0;
6568
6569                 goto out;
6570         }
6571         case KVM_GET_TSC_KHZ: {
6572                 r = READ_ONCE(kvm->arch.default_tsc_khz);
6573                 goto out;
6574         }
6575         case KVM_MEMORY_ENCRYPT_OP: {
6576                 r = -ENOTTY;
6577                 if (!kvm_x86_ops.mem_enc_ioctl)
6578                         goto out;
6579
6580                 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6581                 break;
6582         }
6583         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6584                 struct kvm_enc_region region;
6585
6586                 r = -EFAULT;
6587                 if (copy_from_user(&region, argp, sizeof(region)))
6588                         goto out;
6589
6590                 r = -ENOTTY;
6591                 if (!kvm_x86_ops.mem_enc_register_region)
6592                         goto out;
6593
6594                 r = static_call(kvm_x86_mem_enc_register_region)(kvm, &region);
6595                 break;
6596         }
6597         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6598                 struct kvm_enc_region region;
6599
6600                 r = -EFAULT;
6601                 if (copy_from_user(&region, argp, sizeof(region)))
6602                         goto out;
6603
6604                 r = -ENOTTY;
6605                 if (!kvm_x86_ops.mem_enc_unregister_region)
6606                         goto out;
6607
6608                 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, &region);
6609                 break;
6610         }
6611         case KVM_HYPERV_EVENTFD: {
6612                 struct kvm_hyperv_eventfd hvevfd;
6613
6614                 r = -EFAULT;
6615                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6616                         goto out;
6617                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6618                 break;
6619         }
6620         case KVM_SET_PMU_EVENT_FILTER:
6621                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6622                 break;
6623         case KVM_X86_SET_MSR_FILTER:
6624                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6625                 break;
6626         default:
6627                 r = -ENOTTY;
6628         }
6629 out:
6630         return r;
6631 }
6632
6633 static void kvm_init_msr_list(void)
6634 {
6635         struct x86_pmu_capability x86_pmu;
6636         u32 dummy[2];
6637         unsigned i;
6638
6639         BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
6640                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6641
6642         perf_get_x86_pmu_capability(&x86_pmu);
6643
6644         num_msrs_to_save = 0;
6645         num_emulated_msrs = 0;
6646         num_msr_based_features = 0;
6647
6648         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6649                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6650                         continue;
6651
6652                 /*
6653                  * Even MSRs that are valid in the host may not be exposed
6654                  * to the guests in some cases.
6655                  */
6656                 switch (msrs_to_save_all[i]) {
6657                 case MSR_IA32_BNDCFGS:
6658                         if (!kvm_mpx_supported())
6659                                 continue;
6660                         break;
6661                 case MSR_TSC_AUX:
6662                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6663                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6664                                 continue;
6665                         break;
6666                 case MSR_IA32_UMWAIT_CONTROL:
6667                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6668                                 continue;
6669                         break;
6670                 case MSR_IA32_RTIT_CTL:
6671                 case MSR_IA32_RTIT_STATUS:
6672                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6673                                 continue;
6674                         break;
6675                 case MSR_IA32_RTIT_CR3_MATCH:
6676                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6677                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6678                                 continue;
6679                         break;
6680                 case MSR_IA32_RTIT_OUTPUT_BASE:
6681                 case MSR_IA32_RTIT_OUTPUT_MASK:
6682                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6683                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6684                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6685                                 continue;
6686                         break;
6687                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6688                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6689                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6690                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6691                                 continue;
6692                         break;
6693                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6694                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6695                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6696                                 continue;
6697                         break;
6698                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6699                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6700                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6701                                 continue;
6702                         break;
6703                 case MSR_IA32_XFD:
6704                 case MSR_IA32_XFD_ERR:
6705                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6706                                 continue;
6707                         break;
6708                 default:
6709                         break;
6710                 }
6711
6712                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6713         }
6714
6715         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6716                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6717                         continue;
6718
6719                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6720         }
6721
6722         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6723                 struct kvm_msr_entry msr;
6724
6725                 msr.index = msr_based_features_all[i];
6726                 if (kvm_get_msr_feature(&msr))
6727                         continue;
6728
6729                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6730         }
6731 }
6732
6733 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6734                            const void *v)
6735 {
6736         int handled = 0;
6737         int n;
6738
6739         do {
6740                 n = min(len, 8);
6741                 if (!(lapic_in_kernel(vcpu) &&
6742                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6743                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6744                         break;
6745                 handled += n;
6746                 addr += n;
6747                 len -= n;
6748                 v += n;
6749         } while (len);
6750
6751         return handled;
6752 }
6753
6754 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6755 {
6756         int handled = 0;
6757         int n;
6758
6759         do {
6760                 n = min(len, 8);
6761                 if (!(lapic_in_kernel(vcpu) &&
6762                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6763                                          addr, n, v))
6764                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6765                         break;
6766                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6767                 handled += n;
6768                 addr += n;
6769                 len -= n;
6770                 v += n;
6771         } while (len);
6772
6773         return handled;
6774 }
6775
6776 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6777                         struct kvm_segment *var, int seg)
6778 {
6779         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6780 }
6781
6782 void kvm_get_segment(struct kvm_vcpu *vcpu,
6783                      struct kvm_segment *var, int seg)
6784 {
6785         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6786 }
6787
6788 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
6789                            struct x86_exception *exception)
6790 {
6791         struct kvm_mmu *mmu = vcpu->arch.mmu;
6792         gpa_t t_gpa;
6793
6794         BUG_ON(!mmu_is_nested(vcpu));
6795
6796         /* NPT walks are always user-walks */
6797         access |= PFERR_USER_MASK;
6798         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6799
6800         return t_gpa;
6801 }
6802
6803 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6804                               struct x86_exception *exception)
6805 {
6806         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6807
6808         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6809         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6810 }
6811 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6812
6813  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6814                                 struct x86_exception *exception)
6815 {
6816         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6817
6818         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6819         access |= PFERR_FETCH_MASK;
6820         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6821 }
6822
6823 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6824                                struct x86_exception *exception)
6825 {
6826         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6827
6828         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6829         access |= PFERR_WRITE_MASK;
6830         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6831 }
6832 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6833
6834 /* uses this to access any guest's mapped memory without checking CPL */
6835 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6836                                 struct x86_exception *exception)
6837 {
6838         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6839
6840         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6841 }
6842
6843 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6844                                       struct kvm_vcpu *vcpu, u64 access,
6845                                       struct x86_exception *exception)
6846 {
6847         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6848         void *data = val;
6849         int r = X86EMUL_CONTINUE;
6850
6851         while (bytes) {
6852                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6853                 unsigned offset = addr & (PAGE_SIZE-1);
6854                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6855                 int ret;
6856
6857                 if (gpa == UNMAPPED_GVA)
6858                         return X86EMUL_PROPAGATE_FAULT;
6859                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6860                                                offset, toread);
6861                 if (ret < 0) {
6862                         r = X86EMUL_IO_NEEDED;
6863                         goto out;
6864                 }
6865
6866                 bytes -= toread;
6867                 data += toread;
6868                 addr += toread;
6869         }
6870 out:
6871         return r;
6872 }
6873
6874 /* used for instruction fetching */
6875 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6876                                 gva_t addr, void *val, unsigned int bytes,
6877                                 struct x86_exception *exception)
6878 {
6879         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6880         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6881         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6882         unsigned offset;
6883         int ret;
6884
6885         /* Inline kvm_read_guest_virt_helper for speed.  */
6886         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6887                                     exception);
6888         if (unlikely(gpa == UNMAPPED_GVA))
6889                 return X86EMUL_PROPAGATE_FAULT;
6890
6891         offset = addr & (PAGE_SIZE-1);
6892         if (WARN_ON(offset + bytes > PAGE_SIZE))
6893                 bytes = (unsigned)PAGE_SIZE - offset;
6894         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6895                                        offset, bytes);
6896         if (unlikely(ret < 0))
6897                 return X86EMUL_IO_NEEDED;
6898
6899         return X86EMUL_CONTINUE;
6900 }
6901
6902 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6903                                gva_t addr, void *val, unsigned int bytes,
6904                                struct x86_exception *exception)
6905 {
6906         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6907
6908         /*
6909          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6910          * is returned, but our callers are not ready for that and they blindly
6911          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6912          * uninitialized kernel stack memory into cr2 and error code.
6913          */
6914         memset(exception, 0, sizeof(*exception));
6915         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6916                                           exception);
6917 }
6918 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6919
6920 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6921                              gva_t addr, void *val, unsigned int bytes,
6922                              struct x86_exception *exception, bool system)
6923 {
6924         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6925         u64 access = 0;
6926
6927         if (system)
6928                 access |= PFERR_IMPLICIT_ACCESS;
6929         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6930                 access |= PFERR_USER_MASK;
6931
6932         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6933 }
6934
6935 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6936                 unsigned long addr, void *val, unsigned int bytes)
6937 {
6938         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6939         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6940
6941         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6942 }
6943
6944 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6945                                       struct kvm_vcpu *vcpu, u64 access,
6946                                       struct x86_exception *exception)
6947 {
6948         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6949         void *data = val;
6950         int r = X86EMUL_CONTINUE;
6951
6952         while (bytes) {
6953                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6954                 unsigned offset = addr & (PAGE_SIZE-1);
6955                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6956                 int ret;
6957
6958                 if (gpa == UNMAPPED_GVA)
6959                         return X86EMUL_PROPAGATE_FAULT;
6960                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6961                 if (ret < 0) {
6962                         r = X86EMUL_IO_NEEDED;
6963                         goto out;
6964                 }
6965
6966                 bytes -= towrite;
6967                 data += towrite;
6968                 addr += towrite;
6969         }
6970 out:
6971         return r;
6972 }
6973
6974 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6975                               unsigned int bytes, struct x86_exception *exception,
6976                               bool system)
6977 {
6978         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6979         u64 access = PFERR_WRITE_MASK;
6980
6981         if (system)
6982                 access |= PFERR_IMPLICIT_ACCESS;
6983         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6984                 access |= PFERR_USER_MASK;
6985
6986         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6987                                            access, exception);
6988 }
6989
6990 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6991                                 unsigned int bytes, struct x86_exception *exception)
6992 {
6993         /* kvm_write_guest_virt_system can pull in tons of pages. */
6994         vcpu->arch.l1tf_flush_l1d = true;
6995
6996         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6997                                            PFERR_WRITE_MASK, exception);
6998 }
6999 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7000
7001 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7002                                 void *insn, int insn_len)
7003 {
7004         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7005                                                             insn, insn_len);
7006 }
7007
7008 int handle_ud(struct kvm_vcpu *vcpu)
7009 {
7010         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7011         int emul_type = EMULTYPE_TRAP_UD;
7012         char sig[5]; /* ud2; .ascii "kvm" */
7013         struct x86_exception e;
7014
7015         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7016                 return 1;
7017
7018         if (force_emulation_prefix &&
7019             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7020                                 sig, sizeof(sig), &e) == 0 &&
7021             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7022                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7023                 emul_type = EMULTYPE_TRAP_UD_FORCED;
7024         }
7025
7026         return kvm_emulate_instruction(vcpu, emul_type);
7027 }
7028 EXPORT_SYMBOL_GPL(handle_ud);
7029
7030 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7031                             gpa_t gpa, bool write)
7032 {
7033         /* For APIC access vmexit */
7034         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7035                 return 1;
7036
7037         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7038                 trace_vcpu_match_mmio(gva, gpa, write, true);
7039                 return 1;
7040         }
7041
7042         return 0;
7043 }
7044
7045 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7046                                 gpa_t *gpa, struct x86_exception *exception,
7047                                 bool write)
7048 {
7049         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7050         u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7051                 | (write ? PFERR_WRITE_MASK : 0);
7052
7053         /*
7054          * currently PKRU is only applied to ept enabled guest so
7055          * there is no pkey in EPT page table for L1 guest or EPT
7056          * shadow page table for L2 guest.
7057          */
7058         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7059             !permission_fault(vcpu, vcpu->arch.walk_mmu,
7060                               vcpu->arch.mmio_access, 0, access))) {
7061                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7062                                         (gva & (PAGE_SIZE - 1));
7063                 trace_vcpu_match_mmio(gva, *gpa, write, false);
7064                 return 1;
7065         }
7066
7067         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7068
7069         if (*gpa == UNMAPPED_GVA)
7070                 return -1;
7071
7072         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7073 }
7074
7075 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7076                         const void *val, int bytes)
7077 {
7078         int ret;
7079
7080         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7081         if (ret < 0)
7082                 return 0;
7083         kvm_page_track_write(vcpu, gpa, val, bytes);
7084         return 1;
7085 }
7086
7087 struct read_write_emulator_ops {
7088         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7089                                   int bytes);
7090         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7091                                   void *val, int bytes);
7092         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7093                                int bytes, void *val);
7094         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7095                                     void *val, int bytes);
7096         bool write;
7097 };
7098
7099 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7100 {
7101         if (vcpu->mmio_read_completed) {
7102                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7103                                vcpu->mmio_fragments[0].gpa, val);
7104                 vcpu->mmio_read_completed = 0;
7105                 return 1;
7106         }
7107
7108         return 0;
7109 }
7110
7111 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7112                         void *val, int bytes)
7113 {
7114         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7115 }
7116
7117 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7118                          void *val, int bytes)
7119 {
7120         return emulator_write_phys(vcpu, gpa, val, bytes);
7121 }
7122
7123 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7124 {
7125         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7126         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7127 }
7128
7129 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7130                           void *val, int bytes)
7131 {
7132         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7133         return X86EMUL_IO_NEEDED;
7134 }
7135
7136 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7137                            void *val, int bytes)
7138 {
7139         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7140
7141         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7142         return X86EMUL_CONTINUE;
7143 }
7144
7145 static const struct read_write_emulator_ops read_emultor = {
7146         .read_write_prepare = read_prepare,
7147         .read_write_emulate = read_emulate,
7148         .read_write_mmio = vcpu_mmio_read,
7149         .read_write_exit_mmio = read_exit_mmio,
7150 };
7151
7152 static const struct read_write_emulator_ops write_emultor = {
7153         .read_write_emulate = write_emulate,
7154         .read_write_mmio = write_mmio,
7155         .read_write_exit_mmio = write_exit_mmio,
7156         .write = true,
7157 };
7158
7159 static int emulator_read_write_onepage(unsigned long addr, void *val,
7160                                        unsigned int bytes,
7161                                        struct x86_exception *exception,
7162                                        struct kvm_vcpu *vcpu,
7163                                        const struct read_write_emulator_ops *ops)
7164 {
7165         gpa_t gpa;
7166         int handled, ret;
7167         bool write = ops->write;
7168         struct kvm_mmio_fragment *frag;
7169         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7170
7171         /*
7172          * If the exit was due to a NPF we may already have a GPA.
7173          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7174          * Note, this cannot be used on string operations since string
7175          * operation using rep will only have the initial GPA from the NPF
7176          * occurred.
7177          */
7178         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7179             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7180                 gpa = ctxt->gpa_val;
7181                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7182         } else {
7183                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7184                 if (ret < 0)
7185                         return X86EMUL_PROPAGATE_FAULT;
7186         }
7187
7188         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7189                 return X86EMUL_CONTINUE;
7190
7191         /*
7192          * Is this MMIO handled locally?
7193          */
7194         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7195         if (handled == bytes)
7196                 return X86EMUL_CONTINUE;
7197
7198         gpa += handled;
7199         bytes -= handled;
7200         val += handled;
7201
7202         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7203         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7204         frag->gpa = gpa;
7205         frag->data = val;
7206         frag->len = bytes;
7207         return X86EMUL_CONTINUE;
7208 }
7209
7210 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7211                         unsigned long addr,
7212                         void *val, unsigned int bytes,
7213                         struct x86_exception *exception,
7214                         const struct read_write_emulator_ops *ops)
7215 {
7216         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7217         gpa_t gpa;
7218         int rc;
7219
7220         if (ops->read_write_prepare &&
7221                   ops->read_write_prepare(vcpu, val, bytes))
7222                 return X86EMUL_CONTINUE;
7223
7224         vcpu->mmio_nr_fragments = 0;
7225
7226         /* Crossing a page boundary? */
7227         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7228                 int now;
7229
7230                 now = -addr & ~PAGE_MASK;
7231                 rc = emulator_read_write_onepage(addr, val, now, exception,
7232                                                  vcpu, ops);
7233
7234                 if (rc != X86EMUL_CONTINUE)
7235                         return rc;
7236                 addr += now;
7237                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7238                         addr = (u32)addr;
7239                 val += now;
7240                 bytes -= now;
7241         }
7242
7243         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7244                                          vcpu, ops);
7245         if (rc != X86EMUL_CONTINUE)
7246                 return rc;
7247
7248         if (!vcpu->mmio_nr_fragments)
7249                 return rc;
7250
7251         gpa = vcpu->mmio_fragments[0].gpa;
7252
7253         vcpu->mmio_needed = 1;
7254         vcpu->mmio_cur_fragment = 0;
7255
7256         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7257         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7258         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7259         vcpu->run->mmio.phys_addr = gpa;
7260
7261         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7262 }
7263
7264 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7265                                   unsigned long addr,
7266                                   void *val,
7267                                   unsigned int bytes,
7268                                   struct x86_exception *exception)
7269 {
7270         return emulator_read_write(ctxt, addr, val, bytes,
7271                                    exception, &read_emultor);
7272 }
7273
7274 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7275                             unsigned long addr,
7276                             const void *val,
7277                             unsigned int bytes,
7278                             struct x86_exception *exception)
7279 {
7280         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7281                                    exception, &write_emultor);
7282 }
7283
7284 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7285         (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7286
7287 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7288                                      unsigned long addr,
7289                                      const void *old,
7290                                      const void *new,
7291                                      unsigned int bytes,
7292                                      struct x86_exception *exception)
7293 {
7294         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7295         u64 page_line_mask;
7296         unsigned long hva;
7297         gpa_t gpa;
7298         int r;
7299
7300         /* guests cmpxchg8b have to be emulated atomically */
7301         if (bytes > 8 || (bytes & (bytes - 1)))
7302                 goto emul_write;
7303
7304         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7305
7306         if (gpa == UNMAPPED_GVA ||
7307             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7308                 goto emul_write;
7309
7310         /*
7311          * Emulate the atomic as a straight write to avoid #AC if SLD is
7312          * enabled in the host and the access splits a cache line.
7313          */
7314         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7315                 page_line_mask = ~(cache_line_size() - 1);
7316         else
7317                 page_line_mask = PAGE_MASK;
7318
7319         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7320                 goto emul_write;
7321
7322         hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7323         if (kvm_is_error_hva(hva))
7324                 goto emul_write;
7325
7326         hva += offset_in_page(gpa);
7327
7328         switch (bytes) {
7329         case 1:
7330                 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7331                 break;
7332         case 2:
7333                 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7334                 break;
7335         case 4:
7336                 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7337                 break;
7338         case 8:
7339                 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7340                 break;
7341         default:
7342                 BUG();
7343         }
7344
7345         if (r < 0)
7346                 return X86EMUL_UNHANDLEABLE;
7347         if (r)
7348                 return X86EMUL_CMPXCHG_FAILED;
7349
7350         kvm_page_track_write(vcpu, gpa, new, bytes);
7351
7352         return X86EMUL_CONTINUE;
7353
7354 emul_write:
7355         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7356
7357         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7358 }
7359
7360 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7361 {
7362         int r = 0, i;
7363
7364         for (i = 0; i < vcpu->arch.pio.count; i++) {
7365                 if (vcpu->arch.pio.in)
7366                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7367                                             vcpu->arch.pio.size, pd);
7368                 else
7369                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7370                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7371                                              pd);
7372                 if (r)
7373                         break;
7374                 pd += vcpu->arch.pio.size;
7375         }
7376         return r;
7377 }
7378
7379 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7380                                unsigned short port,
7381                                unsigned int count, bool in)
7382 {
7383         vcpu->arch.pio.port = port;
7384         vcpu->arch.pio.in = in;
7385         vcpu->arch.pio.count  = count;
7386         vcpu->arch.pio.size = size;
7387
7388         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7389                 return 1;
7390
7391         vcpu->run->exit_reason = KVM_EXIT_IO;
7392         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7393         vcpu->run->io.size = size;
7394         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7395         vcpu->run->io.count = count;
7396         vcpu->run->io.port = port;
7397
7398         return 0;
7399 }
7400
7401 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7402                              unsigned short port, unsigned int count)
7403 {
7404         WARN_ON(vcpu->arch.pio.count);
7405         memset(vcpu->arch.pio_data, 0, size * count);
7406         return emulator_pio_in_out(vcpu, size, port, count, true);
7407 }
7408
7409 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7410 {
7411         int size = vcpu->arch.pio.size;
7412         unsigned count = vcpu->arch.pio.count;
7413         memcpy(val, vcpu->arch.pio_data, size * count);
7414         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7415         vcpu->arch.pio.count = 0;
7416 }
7417
7418 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7419                            unsigned short port, void *val, unsigned int count)
7420 {
7421         if (vcpu->arch.pio.count) {
7422                 /*
7423                  * Complete a previous iteration that required userspace I/O.
7424                  * Note, @count isn't guaranteed to match pio.count as userspace
7425                  * can modify ECX before rerunning the vCPU.  Ignore any such
7426                  * shenanigans as KVM doesn't support modifying the rep count,
7427                  * and the emulator ensures @count doesn't overflow the buffer.
7428                  */
7429         } else {
7430                 int r = __emulator_pio_in(vcpu, size, port, count);
7431                 if (!r)
7432                         return r;
7433
7434                 /* Results already available, fall through.  */
7435         }
7436
7437         complete_emulator_pio_in(vcpu, val);
7438         return 1;
7439 }
7440
7441 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7442                                     int size, unsigned short port, void *val,
7443                                     unsigned int count)
7444 {
7445         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7446
7447 }
7448
7449 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7450                             unsigned short port, const void *val,
7451                             unsigned int count)
7452 {
7453         int ret;
7454
7455         memcpy(vcpu->arch.pio_data, val, size * count);
7456         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7457         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7458         if (ret)
7459                 vcpu->arch.pio.count = 0;
7460
7461         return ret;
7462 }
7463
7464 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7465                                      int size, unsigned short port,
7466                                      const void *val, unsigned int count)
7467 {
7468         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7469 }
7470
7471 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7472 {
7473         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7474 }
7475
7476 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7477 {
7478         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7479 }
7480
7481 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7482 {
7483         if (!need_emulate_wbinvd(vcpu))
7484                 return X86EMUL_CONTINUE;
7485
7486         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7487                 int cpu = get_cpu();
7488
7489                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7490                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7491                                 wbinvd_ipi, NULL, 1);
7492                 put_cpu();
7493                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7494         } else
7495                 wbinvd();
7496         return X86EMUL_CONTINUE;
7497 }
7498
7499 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7500 {
7501         kvm_emulate_wbinvd_noskip(vcpu);
7502         return kvm_skip_emulated_instruction(vcpu);
7503 }
7504 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7505
7506
7507
7508 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7509 {
7510         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7511 }
7512
7513 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7514                             unsigned long *dest)
7515 {
7516         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7517 }
7518
7519 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7520                            unsigned long value)
7521 {
7522
7523         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7524 }
7525
7526 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7527 {
7528         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7529 }
7530
7531 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7532 {
7533         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7534         unsigned long value;
7535
7536         switch (cr) {
7537         case 0:
7538                 value = kvm_read_cr0(vcpu);
7539                 break;
7540         case 2:
7541                 value = vcpu->arch.cr2;
7542                 break;
7543         case 3:
7544                 value = kvm_read_cr3(vcpu);
7545                 break;
7546         case 4:
7547                 value = kvm_read_cr4(vcpu);
7548                 break;
7549         case 8:
7550                 value = kvm_get_cr8(vcpu);
7551                 break;
7552         default:
7553                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7554                 return 0;
7555         }
7556
7557         return value;
7558 }
7559
7560 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7561 {
7562         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7563         int res = 0;
7564
7565         switch (cr) {
7566         case 0:
7567                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7568                 break;
7569         case 2:
7570                 vcpu->arch.cr2 = val;
7571                 break;
7572         case 3:
7573                 res = kvm_set_cr3(vcpu, val);
7574                 break;
7575         case 4:
7576                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7577                 break;
7578         case 8:
7579                 res = kvm_set_cr8(vcpu, val);
7580                 break;
7581         default:
7582                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7583                 res = -1;
7584         }
7585
7586         return res;
7587 }
7588
7589 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7590 {
7591         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7592 }
7593
7594 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7595 {
7596         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7597 }
7598
7599 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7600 {
7601         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7602 }
7603
7604 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7605 {
7606         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7607 }
7608
7609 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7610 {
7611         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7612 }
7613
7614 static unsigned long emulator_get_cached_segment_base(
7615         struct x86_emulate_ctxt *ctxt, int seg)
7616 {
7617         return get_segment_base(emul_to_vcpu(ctxt), seg);
7618 }
7619
7620 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7621                                  struct desc_struct *desc, u32 *base3,
7622                                  int seg)
7623 {
7624         struct kvm_segment var;
7625
7626         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7627         *selector = var.selector;
7628
7629         if (var.unusable) {
7630                 memset(desc, 0, sizeof(*desc));
7631                 if (base3)
7632                         *base3 = 0;
7633                 return false;
7634         }
7635
7636         if (var.g)
7637                 var.limit >>= 12;
7638         set_desc_limit(desc, var.limit);
7639         set_desc_base(desc, (unsigned long)var.base);
7640 #ifdef CONFIG_X86_64
7641         if (base3)
7642                 *base3 = var.base >> 32;
7643 #endif
7644         desc->type = var.type;
7645         desc->s = var.s;
7646         desc->dpl = var.dpl;
7647         desc->p = var.present;
7648         desc->avl = var.avl;
7649         desc->l = var.l;
7650         desc->d = var.db;
7651         desc->g = var.g;
7652
7653         return true;
7654 }
7655
7656 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7657                                  struct desc_struct *desc, u32 base3,
7658                                  int seg)
7659 {
7660         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7661         struct kvm_segment var;
7662
7663         var.selector = selector;
7664         var.base = get_desc_base(desc);
7665 #ifdef CONFIG_X86_64
7666         var.base |= ((u64)base3) << 32;
7667 #endif
7668         var.limit = get_desc_limit(desc);
7669         if (desc->g)
7670                 var.limit = (var.limit << 12) | 0xfff;
7671         var.type = desc->type;
7672         var.dpl = desc->dpl;
7673         var.db = desc->d;
7674         var.s = desc->s;
7675         var.l = desc->l;
7676         var.g = desc->g;
7677         var.avl = desc->avl;
7678         var.present = desc->p;
7679         var.unusable = !var.present;
7680         var.padding = 0;
7681
7682         kvm_set_segment(vcpu, &var, seg);
7683         return;
7684 }
7685
7686 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7687                                         u32 msr_index, u64 *pdata)
7688 {
7689         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7690         int r;
7691
7692         r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
7693
7694         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7695                                     complete_emulated_rdmsr, r)) {
7696                 /* Bounce to user space */
7697                 return X86EMUL_IO_NEEDED;
7698         }
7699
7700         return r;
7701 }
7702
7703 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7704                                         u32 msr_index, u64 data)
7705 {
7706         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7707         int r;
7708
7709         r = kvm_set_msr_with_filter(vcpu, msr_index, data);
7710
7711         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7712                                     complete_emulated_msr_access, r)) {
7713                 /* Bounce to user space */
7714                 return X86EMUL_IO_NEEDED;
7715         }
7716
7717         return r;
7718 }
7719
7720 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7721                             u32 msr_index, u64 *pdata)
7722 {
7723         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
7724 }
7725
7726 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7727                             u32 msr_index, u64 data)
7728 {
7729         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
7730 }
7731
7732 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7733 {
7734         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7735
7736         return vcpu->arch.smbase;
7737 }
7738
7739 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7740 {
7741         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7742
7743         vcpu->arch.smbase = smbase;
7744 }
7745
7746 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7747                               u32 pmc)
7748 {
7749         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7750                 return 0;
7751         return -EINVAL;
7752 }
7753
7754 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7755                              u32 pmc, u64 *pdata)
7756 {
7757         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7758 }
7759
7760 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7761 {
7762         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7763 }
7764
7765 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7766                               struct x86_instruction_info *info,
7767                               enum x86_intercept_stage stage)
7768 {
7769         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7770                                             &ctxt->exception);
7771 }
7772
7773 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7774                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7775                               bool exact_only)
7776 {
7777         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7778 }
7779
7780 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7781 {
7782         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7783 }
7784
7785 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7786 {
7787         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7788 }
7789
7790 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7791 {
7792         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7793 }
7794
7795 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7796 {
7797         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7798 }
7799
7800 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7801 {
7802         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7803 }
7804
7805 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7806 {
7807         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7808 }
7809
7810 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7811 {
7812         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7813 }
7814
7815 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7816 {
7817         return emul_to_vcpu(ctxt)->arch.hflags;
7818 }
7819
7820 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7821 {
7822         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7823
7824         kvm_smm_changed(vcpu, false);
7825 }
7826
7827 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7828                                   const char *smstate)
7829 {
7830         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7831 }
7832
7833 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7834 {
7835         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7836 }
7837
7838 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7839 {
7840         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7841 }
7842
7843 static const struct x86_emulate_ops emulate_ops = {
7844         .read_gpr            = emulator_read_gpr,
7845         .write_gpr           = emulator_write_gpr,
7846         .read_std            = emulator_read_std,
7847         .write_std           = emulator_write_std,
7848         .read_phys           = kvm_read_guest_phys_system,
7849         .fetch               = kvm_fetch_guest_virt,
7850         .read_emulated       = emulator_read_emulated,
7851         .write_emulated      = emulator_write_emulated,
7852         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7853         .invlpg              = emulator_invlpg,
7854         .pio_in_emulated     = emulator_pio_in_emulated,
7855         .pio_out_emulated    = emulator_pio_out_emulated,
7856         .get_segment         = emulator_get_segment,
7857         .set_segment         = emulator_set_segment,
7858         .get_cached_segment_base = emulator_get_cached_segment_base,
7859         .get_gdt             = emulator_get_gdt,
7860         .get_idt             = emulator_get_idt,
7861         .set_gdt             = emulator_set_gdt,
7862         .set_idt             = emulator_set_idt,
7863         .get_cr              = emulator_get_cr,
7864         .set_cr              = emulator_set_cr,
7865         .cpl                 = emulator_get_cpl,
7866         .get_dr              = emulator_get_dr,
7867         .set_dr              = emulator_set_dr,
7868         .get_smbase          = emulator_get_smbase,
7869         .set_smbase          = emulator_set_smbase,
7870         .set_msr_with_filter = emulator_set_msr_with_filter,
7871         .get_msr_with_filter = emulator_get_msr_with_filter,
7872         .set_msr             = emulator_set_msr,
7873         .get_msr             = emulator_get_msr,
7874         .check_pmc           = emulator_check_pmc,
7875         .read_pmc            = emulator_read_pmc,
7876         .halt                = emulator_halt,
7877         .wbinvd              = emulator_wbinvd,
7878         .fix_hypercall       = emulator_fix_hypercall,
7879         .intercept           = emulator_intercept,
7880         .get_cpuid           = emulator_get_cpuid,
7881         .guest_has_long_mode = emulator_guest_has_long_mode,
7882         .guest_has_movbe     = emulator_guest_has_movbe,
7883         .guest_has_fxsr      = emulator_guest_has_fxsr,
7884         .guest_has_rdpid     = emulator_guest_has_rdpid,
7885         .set_nmi_mask        = emulator_set_nmi_mask,
7886         .get_hflags          = emulator_get_hflags,
7887         .exiting_smm         = emulator_exiting_smm,
7888         .leave_smm           = emulator_leave_smm,
7889         .triple_fault        = emulator_triple_fault,
7890         .set_xcr             = emulator_set_xcr,
7891 };
7892
7893 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7894 {
7895         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7896         /*
7897          * an sti; sti; sequence only disable interrupts for the first
7898          * instruction. So, if the last instruction, be it emulated or
7899          * not, left the system with the INT_STI flag enabled, it
7900          * means that the last instruction is an sti. We should not
7901          * leave the flag on in this case. The same goes for mov ss
7902          */
7903         if (int_shadow & mask)
7904                 mask = 0;
7905         if (unlikely(int_shadow || mask)) {
7906                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7907                 if (!mask)
7908                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7909         }
7910 }
7911
7912 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7913 {
7914         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7915         if (ctxt->exception.vector == PF_VECTOR)
7916                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7917
7918         if (ctxt->exception.error_code_valid)
7919                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7920                                       ctxt->exception.error_code);
7921         else
7922                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7923         return false;
7924 }
7925
7926 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7927 {
7928         struct x86_emulate_ctxt *ctxt;
7929
7930         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7931         if (!ctxt) {
7932                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7933                 return NULL;
7934         }
7935
7936         ctxt->vcpu = vcpu;
7937         ctxt->ops = &emulate_ops;
7938         vcpu->arch.emulate_ctxt = ctxt;
7939
7940         return ctxt;
7941 }
7942
7943 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7944 {
7945         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7946         int cs_db, cs_l;
7947
7948         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7949
7950         ctxt->gpa_available = false;
7951         ctxt->eflags = kvm_get_rflags(vcpu);
7952         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7953
7954         ctxt->eip = kvm_rip_read(vcpu);
7955         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7956                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7957                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7958                      cs_db                              ? X86EMUL_MODE_PROT32 :
7959                                                           X86EMUL_MODE_PROT16;
7960         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7961         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7962         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7963
7964         ctxt->interruptibility = 0;
7965         ctxt->have_exception = false;
7966         ctxt->exception.vector = -1;
7967         ctxt->perm_ok = false;
7968
7969         init_decode_cache(ctxt);
7970         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7971 }
7972
7973 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7974 {
7975         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7976         int ret;
7977
7978         init_emulate_ctxt(vcpu);
7979
7980         ctxt->op_bytes = 2;
7981         ctxt->ad_bytes = 2;
7982         ctxt->_eip = ctxt->eip + inc_eip;
7983         ret = emulate_int_real(ctxt, irq);
7984
7985         if (ret != X86EMUL_CONTINUE) {
7986                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7987         } else {
7988                 ctxt->eip = ctxt->_eip;
7989                 kvm_rip_write(vcpu, ctxt->eip);
7990                 kvm_set_rflags(vcpu, ctxt->eflags);
7991         }
7992 }
7993 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7994
7995 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7996                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7997 {
7998         struct kvm_run *run = vcpu->run;
7999         u64 info[5];
8000         u8 info_start;
8001
8002         /*
8003          * Zero the whole array used to retrieve the exit info, as casting to
8004          * u32 for select entries will leave some chunks uninitialized.
8005          */
8006         memset(&info, 0, sizeof(info));
8007
8008         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8009                                            &info[2], (u32 *)&info[3],
8010                                            (u32 *)&info[4]);
8011
8012         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8013         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8014
8015         /*
8016          * There's currently space for 13 entries, but 5 are used for the exit
8017          * reason and info.  Restrict to 4 to reduce the maintenance burden
8018          * when expanding kvm_run.emulation_failure in the future.
8019          */
8020         if (WARN_ON_ONCE(ndata > 4))
8021                 ndata = 4;
8022
8023         /* Always include the flags as a 'data' entry. */
8024         info_start = 1;
8025         run->emulation_failure.flags = 0;
8026
8027         if (insn_size) {
8028                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8029                               sizeof(run->emulation_failure.insn_bytes) != 16));
8030                 info_start += 2;
8031                 run->emulation_failure.flags |=
8032                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8033                 run->emulation_failure.insn_size = insn_size;
8034                 memset(run->emulation_failure.insn_bytes, 0x90,
8035                        sizeof(run->emulation_failure.insn_bytes));
8036                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8037         }
8038
8039         memcpy(&run->internal.data[info_start], info, sizeof(info));
8040         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8041                ndata * sizeof(data[0]));
8042
8043         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8044 }
8045
8046 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8047 {
8048         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8049
8050         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8051                                        ctxt->fetch.end - ctxt->fetch.data);
8052 }
8053
8054 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8055                                           u8 ndata)
8056 {
8057         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8058 }
8059 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8060
8061 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8062 {
8063         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8064 }
8065 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8066
8067 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8068 {
8069         struct kvm *kvm = vcpu->kvm;
8070
8071         ++vcpu->stat.insn_emulation_fail;
8072         trace_kvm_emulate_insn_failed(vcpu);
8073
8074         if (emulation_type & EMULTYPE_VMWARE_GP) {
8075                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8076                 return 1;
8077         }
8078
8079         if (kvm->arch.exit_on_emulation_error ||
8080             (emulation_type & EMULTYPE_SKIP)) {
8081                 prepare_emulation_ctxt_failure_exit(vcpu);
8082                 return 0;
8083         }
8084
8085         kvm_queue_exception(vcpu, UD_VECTOR);
8086
8087         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8088                 prepare_emulation_ctxt_failure_exit(vcpu);
8089                 return 0;
8090         }
8091
8092         return 1;
8093 }
8094
8095 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8096                                   bool write_fault_to_shadow_pgtable,
8097                                   int emulation_type)
8098 {
8099         gpa_t gpa = cr2_or_gpa;
8100         kvm_pfn_t pfn;
8101
8102         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8103                 return false;
8104
8105         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8106             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8107                 return false;
8108
8109         if (!vcpu->arch.mmu->root_role.direct) {
8110                 /*
8111                  * Write permission should be allowed since only
8112                  * write access need to be emulated.
8113                  */
8114                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8115
8116                 /*
8117                  * If the mapping is invalid in guest, let cpu retry
8118                  * it to generate fault.
8119                  */
8120                 if (gpa == UNMAPPED_GVA)
8121                         return true;
8122         }
8123
8124         /*
8125          * Do not retry the unhandleable instruction if it faults on the
8126          * readonly host memory, otherwise it will goto a infinite loop:
8127          * retry instruction -> write #PF -> emulation fail -> retry
8128          * instruction -> ...
8129          */
8130         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8131
8132         /*
8133          * If the instruction failed on the error pfn, it can not be fixed,
8134          * report the error to userspace.
8135          */
8136         if (is_error_noslot_pfn(pfn))
8137                 return false;
8138
8139         kvm_release_pfn_clean(pfn);
8140
8141         /* The instructions are well-emulated on direct mmu. */
8142         if (vcpu->arch.mmu->root_role.direct) {
8143                 unsigned int indirect_shadow_pages;
8144
8145                 write_lock(&vcpu->kvm->mmu_lock);
8146                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8147                 write_unlock(&vcpu->kvm->mmu_lock);
8148
8149                 if (indirect_shadow_pages)
8150                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8151
8152                 return true;
8153         }
8154
8155         /*
8156          * if emulation was due to access to shadowed page table
8157          * and it failed try to unshadow page and re-enter the
8158          * guest to let CPU execute the instruction.
8159          */
8160         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8161
8162         /*
8163          * If the access faults on its page table, it can not
8164          * be fixed by unprotecting shadow page and it should
8165          * be reported to userspace.
8166          */
8167         return !write_fault_to_shadow_pgtable;
8168 }
8169
8170 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8171                               gpa_t cr2_or_gpa,  int emulation_type)
8172 {
8173         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8174         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8175
8176         last_retry_eip = vcpu->arch.last_retry_eip;
8177         last_retry_addr = vcpu->arch.last_retry_addr;
8178
8179         /*
8180          * If the emulation is caused by #PF and it is non-page_table
8181          * writing instruction, it means the VM-EXIT is caused by shadow
8182          * page protected, we can zap the shadow page and retry this
8183          * instruction directly.
8184          *
8185          * Note: if the guest uses a non-page-table modifying instruction
8186          * on the PDE that points to the instruction, then we will unmap
8187          * the instruction and go to an infinite loop. So, we cache the
8188          * last retried eip and the last fault address, if we meet the eip
8189          * and the address again, we can break out of the potential infinite
8190          * loop.
8191          */
8192         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8193
8194         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8195                 return false;
8196
8197         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8198             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8199                 return false;
8200
8201         if (x86_page_table_writing_insn(ctxt))
8202                 return false;
8203
8204         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8205                 return false;
8206
8207         vcpu->arch.last_retry_eip = ctxt->eip;
8208         vcpu->arch.last_retry_addr = cr2_or_gpa;
8209
8210         if (!vcpu->arch.mmu->root_role.direct)
8211                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8212
8213         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8214
8215         return true;
8216 }
8217
8218 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8219 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8220
8221 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8222 {
8223         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8224
8225         if (entering_smm) {
8226                 vcpu->arch.hflags |= HF_SMM_MASK;
8227         } else {
8228                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8229
8230                 /* Process a latched INIT or SMI, if any.  */
8231                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8232
8233                 /*
8234                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8235                  * on SMM exit we still need to reload them from
8236                  * guest memory
8237                  */
8238                 vcpu->arch.pdptrs_from_userspace = false;
8239         }
8240
8241         kvm_mmu_reset_context(vcpu);
8242 }
8243
8244 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8245                                 unsigned long *db)
8246 {
8247         u32 dr6 = 0;
8248         int i;
8249         u32 enable, rwlen;
8250
8251         enable = dr7;
8252         rwlen = dr7 >> 16;
8253         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8254                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8255                         dr6 |= (1 << i);
8256         return dr6;
8257 }
8258
8259 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8260 {
8261         struct kvm_run *kvm_run = vcpu->run;
8262
8263         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8264                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8265                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8266                 kvm_run->debug.arch.exception = DB_VECTOR;
8267                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8268                 return 0;
8269         }
8270         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8271         return 1;
8272 }
8273
8274 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8275 {
8276         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8277         int r;
8278
8279         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8280         if (unlikely(!r))
8281                 return 0;
8282
8283         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8284
8285         /*
8286          * rflags is the old, "raw" value of the flags.  The new value has
8287          * not been saved yet.
8288          *
8289          * This is correct even for TF set by the guest, because "the
8290          * processor will not generate this exception after the instruction
8291          * that sets the TF flag".
8292          */
8293         if (unlikely(rflags & X86_EFLAGS_TF))
8294                 r = kvm_vcpu_do_singlestep(vcpu);
8295         return r;
8296 }
8297 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8298
8299 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
8300 {
8301         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8302             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8303                 struct kvm_run *kvm_run = vcpu->run;
8304                 unsigned long eip = kvm_get_linear_rip(vcpu);
8305                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8306                                            vcpu->arch.guest_debug_dr7,
8307                                            vcpu->arch.eff_db);
8308
8309                 if (dr6 != 0) {
8310                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8311                         kvm_run->debug.arch.pc = eip;
8312                         kvm_run->debug.arch.exception = DB_VECTOR;
8313                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8314                         *r = 0;
8315                         return true;
8316                 }
8317         }
8318
8319         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8320             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8321                 unsigned long eip = kvm_get_linear_rip(vcpu);
8322                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8323                                            vcpu->arch.dr7,
8324                                            vcpu->arch.db);
8325
8326                 if (dr6 != 0) {
8327                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8328                         *r = 1;
8329                         return true;
8330                 }
8331         }
8332
8333         return false;
8334 }
8335
8336 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8337 {
8338         switch (ctxt->opcode_len) {
8339         case 1:
8340                 switch (ctxt->b) {
8341                 case 0xe4:      /* IN */
8342                 case 0xe5:
8343                 case 0xec:
8344                 case 0xed:
8345                 case 0xe6:      /* OUT */
8346                 case 0xe7:
8347                 case 0xee:
8348                 case 0xef:
8349                 case 0x6c:      /* INS */
8350                 case 0x6d:
8351                 case 0x6e:      /* OUTS */
8352                 case 0x6f:
8353                         return true;
8354                 }
8355                 break;
8356         case 2:
8357                 switch (ctxt->b) {
8358                 case 0x33:      /* RDPMC */
8359                         return true;
8360                 }
8361                 break;
8362         }
8363
8364         return false;
8365 }
8366
8367 /*
8368  * Decode an instruction for emulation.  The caller is responsible for handling
8369  * code breakpoints.  Note, manually detecting code breakpoints is unnecessary
8370  * (and wrong) when emulating on an intercepted fault-like exception[*], as
8371  * code breakpoints have higher priority and thus have already been done by
8372  * hardware.
8373  *
8374  * [*] Except #MC, which is higher priority, but KVM should never emulate in
8375  *     response to a machine check.
8376  */
8377 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8378                                     void *insn, int insn_len)
8379 {
8380         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8381         int r;
8382
8383         init_emulate_ctxt(vcpu);
8384
8385         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8386
8387         trace_kvm_emulate_insn_start(vcpu);
8388         ++vcpu->stat.insn_emulation;
8389
8390         return r;
8391 }
8392 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8393
8394 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8395                             int emulation_type, void *insn, int insn_len)
8396 {
8397         int r;
8398         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8399         bool writeback = true;
8400         bool write_fault_to_spt;
8401
8402         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8403                 return 1;
8404
8405         vcpu->arch.l1tf_flush_l1d = true;
8406
8407         /*
8408          * Clear write_fault_to_shadow_pgtable here to ensure it is
8409          * never reused.
8410          */
8411         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8412         vcpu->arch.write_fault_to_shadow_pgtable = false;
8413
8414         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8415                 kvm_clear_exception_queue(vcpu);
8416
8417                 /*
8418                  * Return immediately if RIP hits a code breakpoint, such #DBs
8419                  * are fault-like and are higher priority than any faults on
8420                  * the code fetch itself.
8421                  */
8422                 if (!(emulation_type & EMULTYPE_SKIP) &&
8423                     kvm_vcpu_check_code_breakpoint(vcpu, &r))
8424                         return r;
8425
8426                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8427                                                     insn, insn_len);
8428                 if (r != EMULATION_OK)  {
8429                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8430                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8431                                 kvm_queue_exception(vcpu, UD_VECTOR);
8432                                 return 1;
8433                         }
8434                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8435                                                   write_fault_to_spt,
8436                                                   emulation_type))
8437                                 return 1;
8438                         if (ctxt->have_exception) {
8439                                 /*
8440                                  * #UD should result in just EMULATION_FAILED, and trap-like
8441                                  * exception should not be encountered during decode.
8442                                  */
8443                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8444                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8445                                 inject_emulated_exception(vcpu);
8446                                 return 1;
8447                         }
8448                         return handle_emulation_failure(vcpu, emulation_type);
8449                 }
8450         }
8451
8452         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8453             !is_vmware_backdoor_opcode(ctxt)) {
8454                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8455                 return 1;
8456         }
8457
8458         /*
8459          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8460          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8461          * The caller is responsible for updating interruptibility state and
8462          * injecting single-step #DBs.
8463          */
8464         if (emulation_type & EMULTYPE_SKIP) {
8465                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8466                         ctxt->eip = (u32)ctxt->_eip;
8467                 else
8468                         ctxt->eip = ctxt->_eip;
8469
8470                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8471                         r = 1;
8472                         goto writeback;
8473                 }
8474
8475                 kvm_rip_write(vcpu, ctxt->eip);
8476                 if (ctxt->eflags & X86_EFLAGS_RF)
8477                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8478                 return 1;
8479         }
8480
8481         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8482                 return 1;
8483
8484         /* this is needed for vmware backdoor interface to work since it
8485            changes registers values  during IO operation */
8486         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8487                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8488                 emulator_invalidate_register_cache(ctxt);
8489         }
8490
8491 restart:
8492         if (emulation_type & EMULTYPE_PF) {
8493                 /* Save the faulting GPA (cr2) in the address field */
8494                 ctxt->exception.address = cr2_or_gpa;
8495
8496                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8497                 if (vcpu->arch.mmu->root_role.direct) {
8498                         ctxt->gpa_available = true;
8499                         ctxt->gpa_val = cr2_or_gpa;
8500                 }
8501         } else {
8502                 /* Sanitize the address out of an abundance of paranoia. */
8503                 ctxt->exception.address = 0;
8504         }
8505
8506         r = x86_emulate_insn(ctxt);
8507
8508         if (r == EMULATION_INTERCEPTED)
8509                 return 1;
8510
8511         if (r == EMULATION_FAILED) {
8512                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8513                                         emulation_type))
8514                         return 1;
8515
8516                 return handle_emulation_failure(vcpu, emulation_type);
8517         }
8518
8519         if (ctxt->have_exception) {
8520                 r = 1;
8521                 if (inject_emulated_exception(vcpu))
8522                         return r;
8523         } else if (vcpu->arch.pio.count) {
8524                 if (!vcpu->arch.pio.in) {
8525                         /* FIXME: return into emulator if single-stepping.  */
8526                         vcpu->arch.pio.count = 0;
8527                 } else {
8528                         writeback = false;
8529                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8530                 }
8531                 r = 0;
8532         } else if (vcpu->mmio_needed) {
8533                 ++vcpu->stat.mmio_exits;
8534
8535                 if (!vcpu->mmio_is_write)
8536                         writeback = false;
8537                 r = 0;
8538                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8539         } else if (vcpu->arch.complete_userspace_io) {
8540                 writeback = false;
8541                 r = 0;
8542         } else if (r == EMULATION_RESTART)
8543                 goto restart;
8544         else
8545                 r = 1;
8546
8547 writeback:
8548         if (writeback) {
8549                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8550                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8551                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8552                 if (!ctxt->have_exception ||
8553                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8554                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8555                         if (ctxt->is_branch)
8556                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8557                         kvm_rip_write(vcpu, ctxt->eip);
8558                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8559                                 r = kvm_vcpu_do_singlestep(vcpu);
8560                         static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8561                         __kvm_set_rflags(vcpu, ctxt->eflags);
8562                 }
8563
8564                 /*
8565                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8566                  * do nothing, and it will be requested again as soon as
8567                  * the shadow expires.  But we still need to check here,
8568                  * because POPF has no interrupt shadow.
8569                  */
8570                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8571                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8572         } else
8573                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8574
8575         return r;
8576 }
8577
8578 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8579 {
8580         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8581 }
8582 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8583
8584 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8585                                         void *insn, int insn_len)
8586 {
8587         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8588 }
8589 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8590
8591 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8592 {
8593         vcpu->arch.pio.count = 0;
8594         return 1;
8595 }
8596
8597 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8598 {
8599         vcpu->arch.pio.count = 0;
8600
8601         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8602                 return 1;
8603
8604         return kvm_skip_emulated_instruction(vcpu);
8605 }
8606
8607 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8608                             unsigned short port)
8609 {
8610         unsigned long val = kvm_rax_read(vcpu);
8611         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8612
8613         if (ret)
8614                 return ret;
8615
8616         /*
8617          * Workaround userspace that relies on old KVM behavior of %rip being
8618          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8619          */
8620         if (port == 0x7e &&
8621             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8622                 vcpu->arch.complete_userspace_io =
8623                         complete_fast_pio_out_port_0x7e;
8624                 kvm_skip_emulated_instruction(vcpu);
8625         } else {
8626                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8627                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8628         }
8629         return 0;
8630 }
8631
8632 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8633 {
8634         unsigned long val;
8635
8636         /* We should only ever be called with arch.pio.count equal to 1 */
8637         BUG_ON(vcpu->arch.pio.count != 1);
8638
8639         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8640                 vcpu->arch.pio.count = 0;
8641                 return 1;
8642         }
8643
8644         /* For size less than 4 we merge, else we zero extend */
8645         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8646
8647         /*
8648          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8649          * the copy and tracing
8650          */
8651         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8652         kvm_rax_write(vcpu, val);
8653
8654         return kvm_skip_emulated_instruction(vcpu);
8655 }
8656
8657 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8658                            unsigned short port)
8659 {
8660         unsigned long val;
8661         int ret;
8662
8663         /* For size less than 4 we merge, else we zero extend */
8664         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8665
8666         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8667         if (ret) {
8668                 kvm_rax_write(vcpu, val);
8669                 return ret;
8670         }
8671
8672         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8673         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8674
8675         return 0;
8676 }
8677
8678 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8679 {
8680         int ret;
8681
8682         if (in)
8683                 ret = kvm_fast_pio_in(vcpu, size, port);
8684         else
8685                 ret = kvm_fast_pio_out(vcpu, size, port);
8686         return ret && kvm_skip_emulated_instruction(vcpu);
8687 }
8688 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8689
8690 static int kvmclock_cpu_down_prep(unsigned int cpu)
8691 {
8692         __this_cpu_write(cpu_tsc_khz, 0);
8693         return 0;
8694 }
8695
8696 static void tsc_khz_changed(void *data)
8697 {
8698         struct cpufreq_freqs *freq = data;
8699         unsigned long khz = 0;
8700
8701         if (data)
8702                 khz = freq->new;
8703         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8704                 khz = cpufreq_quick_get(raw_smp_processor_id());
8705         if (!khz)
8706                 khz = tsc_khz;
8707         __this_cpu_write(cpu_tsc_khz, khz);
8708 }
8709
8710 #ifdef CONFIG_X86_64
8711 static void kvm_hyperv_tsc_notifier(void)
8712 {
8713         struct kvm *kvm;
8714         int cpu;
8715
8716         mutex_lock(&kvm_lock);
8717         list_for_each_entry(kvm, &vm_list, vm_list)
8718                 kvm_make_mclock_inprogress_request(kvm);
8719
8720         /* no guest entries from this point */
8721         hyperv_stop_tsc_emulation();
8722
8723         /* TSC frequency always matches when on Hyper-V */
8724         for_each_present_cpu(cpu)
8725                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8726         kvm_max_guest_tsc_khz = tsc_khz;
8727
8728         list_for_each_entry(kvm, &vm_list, vm_list) {
8729                 __kvm_start_pvclock_update(kvm);
8730                 pvclock_update_vm_gtod_copy(kvm);
8731                 kvm_end_pvclock_update(kvm);
8732         }
8733
8734         mutex_unlock(&kvm_lock);
8735 }
8736 #endif
8737
8738 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8739 {
8740         struct kvm *kvm;
8741         struct kvm_vcpu *vcpu;
8742         int send_ipi = 0;
8743         unsigned long i;
8744
8745         /*
8746          * We allow guests to temporarily run on slowing clocks,
8747          * provided we notify them after, or to run on accelerating
8748          * clocks, provided we notify them before.  Thus time never
8749          * goes backwards.
8750          *
8751          * However, we have a problem.  We can't atomically update
8752          * the frequency of a given CPU from this function; it is
8753          * merely a notifier, which can be called from any CPU.
8754          * Changing the TSC frequency at arbitrary points in time
8755          * requires a recomputation of local variables related to
8756          * the TSC for each VCPU.  We must flag these local variables
8757          * to be updated and be sure the update takes place with the
8758          * new frequency before any guests proceed.
8759          *
8760          * Unfortunately, the combination of hotplug CPU and frequency
8761          * change creates an intractable locking scenario; the order
8762          * of when these callouts happen is undefined with respect to
8763          * CPU hotplug, and they can race with each other.  As such,
8764          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8765          * undefined; you can actually have a CPU frequency change take
8766          * place in between the computation of X and the setting of the
8767          * variable.  To protect against this problem, all updates of
8768          * the per_cpu tsc_khz variable are done in an interrupt
8769          * protected IPI, and all callers wishing to update the value
8770          * must wait for a synchronous IPI to complete (which is trivial
8771          * if the caller is on the CPU already).  This establishes the
8772          * necessary total order on variable updates.
8773          *
8774          * Note that because a guest time update may take place
8775          * anytime after the setting of the VCPU's request bit, the
8776          * correct TSC value must be set before the request.  However,
8777          * to ensure the update actually makes it to any guest which
8778          * starts running in hardware virtualization between the set
8779          * and the acquisition of the spinlock, we must also ping the
8780          * CPU after setting the request bit.
8781          *
8782          */
8783
8784         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8785
8786         mutex_lock(&kvm_lock);
8787         list_for_each_entry(kvm, &vm_list, vm_list) {
8788                 kvm_for_each_vcpu(i, vcpu, kvm) {
8789                         if (vcpu->cpu != cpu)
8790                                 continue;
8791                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8792                         if (vcpu->cpu != raw_smp_processor_id())
8793                                 send_ipi = 1;
8794                 }
8795         }
8796         mutex_unlock(&kvm_lock);
8797
8798         if (freq->old < freq->new && send_ipi) {
8799                 /*
8800                  * We upscale the frequency.  Must make the guest
8801                  * doesn't see old kvmclock values while running with
8802                  * the new frequency, otherwise we risk the guest sees
8803                  * time go backwards.
8804                  *
8805                  * In case we update the frequency for another cpu
8806                  * (which might be in guest context) send an interrupt
8807                  * to kick the cpu out of guest context.  Next time
8808                  * guest context is entered kvmclock will be updated,
8809                  * so the guest will not see stale values.
8810                  */
8811                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8812         }
8813 }
8814
8815 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8816                                      void *data)
8817 {
8818         struct cpufreq_freqs *freq = data;
8819         int cpu;
8820
8821         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8822                 return 0;
8823         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8824                 return 0;
8825
8826         for_each_cpu(cpu, freq->policy->cpus)
8827                 __kvmclock_cpufreq_notifier(freq, cpu);
8828
8829         return 0;
8830 }
8831
8832 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8833         .notifier_call  = kvmclock_cpufreq_notifier
8834 };
8835
8836 static int kvmclock_cpu_online(unsigned int cpu)
8837 {
8838         tsc_khz_changed(NULL);
8839         return 0;
8840 }
8841
8842 static void kvm_timer_init(void)
8843 {
8844         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8845                 max_tsc_khz = tsc_khz;
8846
8847                 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
8848                         struct cpufreq_policy *policy;
8849                         int cpu;
8850
8851                         cpu = get_cpu();
8852                         policy = cpufreq_cpu_get(cpu);
8853                         if (policy) {
8854                                 if (policy->cpuinfo.max_freq)
8855                                         max_tsc_khz = policy->cpuinfo.max_freq;
8856                                 cpufreq_cpu_put(policy);
8857                         }
8858                         put_cpu();
8859                 }
8860                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8861                                           CPUFREQ_TRANSITION_NOTIFIER);
8862         }
8863
8864         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8865                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8866 }
8867
8868 #ifdef CONFIG_X86_64
8869 static void pvclock_gtod_update_fn(struct work_struct *work)
8870 {
8871         struct kvm *kvm;
8872         struct kvm_vcpu *vcpu;
8873         unsigned long i;
8874
8875         mutex_lock(&kvm_lock);
8876         list_for_each_entry(kvm, &vm_list, vm_list)
8877                 kvm_for_each_vcpu(i, vcpu, kvm)
8878                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8879         atomic_set(&kvm_guest_has_master_clock, 0);
8880         mutex_unlock(&kvm_lock);
8881 }
8882
8883 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8884
8885 /*
8886  * Indirection to move queue_work() out of the tk_core.seq write held
8887  * region to prevent possible deadlocks against time accessors which
8888  * are invoked with work related locks held.
8889  */
8890 static void pvclock_irq_work_fn(struct irq_work *w)
8891 {
8892         queue_work(system_long_wq, &pvclock_gtod_work);
8893 }
8894
8895 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8896
8897 /*
8898  * Notification about pvclock gtod data update.
8899  */
8900 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8901                                void *priv)
8902 {
8903         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8904         struct timekeeper *tk = priv;
8905
8906         update_pvclock_gtod(tk);
8907
8908         /*
8909          * Disable master clock if host does not trust, or does not use,
8910          * TSC based clocksource. Delegate queue_work() to irq_work as
8911          * this is invoked with tk_core.seq write held.
8912          */
8913         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8914             atomic_read(&kvm_guest_has_master_clock) != 0)
8915                 irq_work_queue(&pvclock_irq_work);
8916         return 0;
8917 }
8918
8919 static struct notifier_block pvclock_gtod_notifier = {
8920         .notifier_call = pvclock_gtod_notify,
8921 };
8922 #endif
8923
8924 int kvm_arch_init(void *opaque)
8925 {
8926         struct kvm_x86_init_ops *ops = opaque;
8927         int r;
8928
8929         if (kvm_x86_ops.hardware_enable) {
8930                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8931                 r = -EEXIST;
8932                 goto out;
8933         }
8934
8935         if (!ops->cpu_has_kvm_support()) {
8936                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8937                                    ops->runtime_ops->name);
8938                 r = -EOPNOTSUPP;
8939                 goto out;
8940         }
8941         if (ops->disabled_by_bios()) {
8942                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8943                                    ops->runtime_ops->name);
8944                 r = -EOPNOTSUPP;
8945                 goto out;
8946         }
8947
8948         /*
8949          * KVM explicitly assumes that the guest has an FPU and
8950          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8951          * vCPU's FPU state as a fxregs_state struct.
8952          */
8953         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8954                 printk(KERN_ERR "kvm: inadequate fpu\n");
8955                 r = -EOPNOTSUPP;
8956                 goto out;
8957         }
8958
8959         if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8960                 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
8961                 r = -EOPNOTSUPP;
8962                 goto out;
8963         }
8964
8965         r = -ENOMEM;
8966
8967         x86_emulator_cache = kvm_alloc_emulator_cache();
8968         if (!x86_emulator_cache) {
8969                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8970                 goto out;
8971         }
8972
8973         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8974         if (!user_return_msrs) {
8975                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8976                 goto out_free_x86_emulator_cache;
8977         }
8978         kvm_nr_uret_msrs = 0;
8979
8980         r = kvm_mmu_vendor_module_init();
8981         if (r)
8982                 goto out_free_percpu;
8983
8984         kvm_timer_init();
8985
8986         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8987                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8988                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8989         }
8990
8991         if (pi_inject_timer == -1)
8992                 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
8993 #ifdef CONFIG_X86_64
8994         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8995
8996         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8997                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8998 #endif
8999
9000         return 0;
9001
9002 out_free_percpu:
9003         free_percpu(user_return_msrs);
9004 out_free_x86_emulator_cache:
9005         kmem_cache_destroy(x86_emulator_cache);
9006 out:
9007         return r;
9008 }
9009
9010 void kvm_arch_exit(void)
9011 {
9012 #ifdef CONFIG_X86_64
9013         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9014                 clear_hv_tscchange_cb();
9015 #endif
9016         kvm_lapic_exit();
9017
9018         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
9019                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9020                                             CPUFREQ_TRANSITION_NOTIFIER);
9021         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9022 #ifdef CONFIG_X86_64
9023         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9024         irq_work_sync(&pvclock_irq_work);
9025         cancel_work_sync(&pvclock_gtod_work);
9026 #endif
9027         kvm_x86_ops.hardware_enable = NULL;
9028         kvm_mmu_vendor_module_exit();
9029         free_percpu(user_return_msrs);
9030         kmem_cache_destroy(x86_emulator_cache);
9031 #ifdef CONFIG_KVM_XEN
9032         static_key_deferred_flush(&kvm_xen_enabled);
9033         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9034 #endif
9035 }
9036
9037 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9038 {
9039         /*
9040          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
9041          * local APIC is in-kernel, the run loop will detect the non-runnable
9042          * state and halt the vCPU.  Exit to userspace if the local APIC is
9043          * managed by userspace, in which case userspace is responsible for
9044          * handling wake events.
9045          */
9046         ++vcpu->stat.halt_exits;
9047         if (lapic_in_kernel(vcpu)) {
9048                 vcpu->arch.mp_state = state;
9049                 return 1;
9050         } else {
9051                 vcpu->run->exit_reason = reason;
9052                 return 0;
9053         }
9054 }
9055
9056 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9057 {
9058         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9059 }
9060 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9061
9062 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9063 {
9064         int ret = kvm_skip_emulated_instruction(vcpu);
9065         /*
9066          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9067          * KVM_EXIT_DEBUG here.
9068          */
9069         return kvm_emulate_halt_noskip(vcpu) && ret;
9070 }
9071 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9072
9073 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9074 {
9075         int ret = kvm_skip_emulated_instruction(vcpu);
9076
9077         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9078                                         KVM_EXIT_AP_RESET_HOLD) && ret;
9079 }
9080 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9081
9082 #ifdef CONFIG_X86_64
9083 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9084                                 unsigned long clock_type)
9085 {
9086         struct kvm_clock_pairing clock_pairing;
9087         struct timespec64 ts;
9088         u64 cycle;
9089         int ret;
9090
9091         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9092                 return -KVM_EOPNOTSUPP;
9093
9094         /*
9095          * When tsc is in permanent catchup mode guests won't be able to use
9096          * pvclock_read_retry loop to get consistent view of pvclock
9097          */
9098         if (vcpu->arch.tsc_always_catchup)
9099                 return -KVM_EOPNOTSUPP;
9100
9101         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9102                 return -KVM_EOPNOTSUPP;
9103
9104         clock_pairing.sec = ts.tv_sec;
9105         clock_pairing.nsec = ts.tv_nsec;
9106         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9107         clock_pairing.flags = 0;
9108         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9109
9110         ret = 0;
9111         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9112                             sizeof(struct kvm_clock_pairing)))
9113                 ret = -KVM_EFAULT;
9114
9115         return ret;
9116 }
9117 #endif
9118
9119 /*
9120  * kvm_pv_kick_cpu_op:  Kick a vcpu.
9121  *
9122  * @apicid - apicid of vcpu to be kicked.
9123  */
9124 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9125 {
9126         struct kvm_lapic_irq lapic_irq;
9127
9128         lapic_irq.shorthand = APIC_DEST_NOSHORT;
9129         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
9130         lapic_irq.level = 0;
9131         lapic_irq.dest_id = apicid;
9132         lapic_irq.msi_redir_hint = false;
9133
9134         lapic_irq.delivery_mode = APIC_DM_REMRD;
9135         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9136 }
9137
9138 bool kvm_apicv_activated(struct kvm *kvm)
9139 {
9140         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9141 }
9142 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9143
9144 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9145 {
9146         ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9147         ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9148
9149         return (vm_reasons | vcpu_reasons) == 0;
9150 }
9151 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9152
9153 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9154                                        enum kvm_apicv_inhibit reason, bool set)
9155 {
9156         if (set)
9157                 __set_bit(reason, inhibits);
9158         else
9159                 __clear_bit(reason, inhibits);
9160
9161         trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9162 }
9163
9164 static void kvm_apicv_init(struct kvm *kvm)
9165 {
9166         unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9167
9168         init_rwsem(&kvm->arch.apicv_update_lock);
9169
9170         set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9171
9172         if (!enable_apicv)
9173                 set_or_clear_apicv_inhibit(inhibits,
9174                                            APICV_INHIBIT_REASON_DISABLE, true);
9175 }
9176
9177 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9178 {
9179         struct kvm_vcpu *target = NULL;
9180         struct kvm_apic_map *map;
9181
9182         vcpu->stat.directed_yield_attempted++;
9183
9184         if (single_task_running())
9185                 goto no_yield;
9186
9187         rcu_read_lock();
9188         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9189
9190         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9191                 target = map->phys_map[dest_id]->vcpu;
9192
9193         rcu_read_unlock();
9194
9195         if (!target || !READ_ONCE(target->ready))
9196                 goto no_yield;
9197
9198         /* Ignore requests to yield to self */
9199         if (vcpu == target)
9200                 goto no_yield;
9201
9202         if (kvm_vcpu_yield_to(target) <= 0)
9203                 goto no_yield;
9204
9205         vcpu->stat.directed_yield_successful++;
9206
9207 no_yield:
9208         return;
9209 }
9210
9211 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9212 {
9213         u64 ret = vcpu->run->hypercall.ret;
9214
9215         if (!is_64_bit_mode(vcpu))
9216                 ret = (u32)ret;
9217         kvm_rax_write(vcpu, ret);
9218         ++vcpu->stat.hypercalls;
9219         return kvm_skip_emulated_instruction(vcpu);
9220 }
9221
9222 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9223 {
9224         unsigned long nr, a0, a1, a2, a3, ret;
9225         int op_64_bit;
9226
9227         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9228                 return kvm_xen_hypercall(vcpu);
9229
9230         if (kvm_hv_hypercall_enabled(vcpu))
9231                 return kvm_hv_hypercall(vcpu);
9232
9233         nr = kvm_rax_read(vcpu);
9234         a0 = kvm_rbx_read(vcpu);
9235         a1 = kvm_rcx_read(vcpu);
9236         a2 = kvm_rdx_read(vcpu);
9237         a3 = kvm_rsi_read(vcpu);
9238
9239         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9240
9241         op_64_bit = is_64_bit_hypercall(vcpu);
9242         if (!op_64_bit) {
9243                 nr &= 0xFFFFFFFF;
9244                 a0 &= 0xFFFFFFFF;
9245                 a1 &= 0xFFFFFFFF;
9246                 a2 &= 0xFFFFFFFF;
9247                 a3 &= 0xFFFFFFFF;
9248         }
9249
9250         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9251                 ret = -KVM_EPERM;
9252                 goto out;
9253         }
9254
9255         ret = -KVM_ENOSYS;
9256
9257         switch (nr) {
9258         case KVM_HC_VAPIC_POLL_IRQ:
9259                 ret = 0;
9260                 break;
9261         case KVM_HC_KICK_CPU:
9262                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9263                         break;
9264
9265                 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9266                 kvm_sched_yield(vcpu, a1);
9267                 ret = 0;
9268                 break;
9269 #ifdef CONFIG_X86_64
9270         case KVM_HC_CLOCK_PAIRING:
9271                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9272                 break;
9273 #endif
9274         case KVM_HC_SEND_IPI:
9275                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9276                         break;
9277
9278                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9279                 break;
9280         case KVM_HC_SCHED_YIELD:
9281                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9282                         break;
9283
9284                 kvm_sched_yield(vcpu, a0);
9285                 ret = 0;
9286                 break;
9287         case KVM_HC_MAP_GPA_RANGE: {
9288                 u64 gpa = a0, npages = a1, attrs = a2;
9289
9290                 ret = -KVM_ENOSYS;
9291                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9292                         break;
9293
9294                 if (!PAGE_ALIGNED(gpa) || !npages ||
9295                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9296                         ret = -KVM_EINVAL;
9297                         break;
9298                 }
9299
9300                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9301                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9302                 vcpu->run->hypercall.args[0]  = gpa;
9303                 vcpu->run->hypercall.args[1]  = npages;
9304                 vcpu->run->hypercall.args[2]  = attrs;
9305                 vcpu->run->hypercall.longmode = op_64_bit;
9306                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9307                 return 0;
9308         }
9309         default:
9310                 ret = -KVM_ENOSYS;
9311                 break;
9312         }
9313 out:
9314         if (!op_64_bit)
9315                 ret = (u32)ret;
9316         kvm_rax_write(vcpu, ret);
9317
9318         ++vcpu->stat.hypercalls;
9319         return kvm_skip_emulated_instruction(vcpu);
9320 }
9321 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9322
9323 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9324 {
9325         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9326         char instruction[3];
9327         unsigned long rip = kvm_rip_read(vcpu);
9328
9329         /*
9330          * If the quirk is disabled, synthesize a #UD and let the guest pick up
9331          * the pieces.
9332          */
9333         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9334                 ctxt->exception.error_code_valid = false;
9335                 ctxt->exception.vector = UD_VECTOR;
9336                 ctxt->have_exception = true;
9337                 return X86EMUL_PROPAGATE_FAULT;
9338         }
9339
9340         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9341
9342         return emulator_write_emulated(ctxt, rip, instruction, 3,
9343                 &ctxt->exception);
9344 }
9345
9346 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9347 {
9348         return vcpu->run->request_interrupt_window &&
9349                 likely(!pic_in_kernel(vcpu->kvm));
9350 }
9351
9352 /* Called within kvm->srcu read side.  */
9353 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9354 {
9355         struct kvm_run *kvm_run = vcpu->run;
9356
9357         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9358         kvm_run->cr8 = kvm_get_cr8(vcpu);
9359         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9360
9361         kvm_run->ready_for_interrupt_injection =
9362                 pic_in_kernel(vcpu->kvm) ||
9363                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9364
9365         if (is_smm(vcpu))
9366                 kvm_run->flags |= KVM_RUN_X86_SMM;
9367 }
9368
9369 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9370 {
9371         int max_irr, tpr;
9372
9373         if (!kvm_x86_ops.update_cr8_intercept)
9374                 return;
9375
9376         if (!lapic_in_kernel(vcpu))
9377                 return;
9378
9379         if (vcpu->arch.apicv_active)
9380                 return;
9381
9382         if (!vcpu->arch.apic->vapic_addr)
9383                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9384         else
9385                 max_irr = -1;
9386
9387         if (max_irr != -1)
9388                 max_irr >>= 4;
9389
9390         tpr = kvm_lapic_get_cr8(vcpu);
9391
9392         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9393 }
9394
9395
9396 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9397 {
9398         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9399                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9400                 return 1;
9401         }
9402
9403         return kvm_x86_ops.nested_ops->check_events(vcpu);
9404 }
9405
9406 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9407 {
9408         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9409                 vcpu->arch.exception.error_code = false;
9410         static_call(kvm_x86_queue_exception)(vcpu);
9411 }
9412
9413 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9414 {
9415         int r;
9416         bool can_inject = true;
9417
9418         /* try to reinject previous events if any */
9419
9420         if (vcpu->arch.exception.injected) {
9421                 kvm_inject_exception(vcpu);
9422                 can_inject = false;
9423         }
9424         /*
9425          * Do not inject an NMI or interrupt if there is a pending
9426          * exception.  Exceptions and interrupts are recognized at
9427          * instruction boundaries, i.e. the start of an instruction.
9428          * Trap-like exceptions, e.g. #DB, have higher priority than
9429          * NMIs and interrupts, i.e. traps are recognized before an
9430          * NMI/interrupt that's pending on the same instruction.
9431          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9432          * priority, but are only generated (pended) during instruction
9433          * execution, i.e. a pending fault-like exception means the
9434          * fault occurred on the *previous* instruction and must be
9435          * serviced prior to recognizing any new events in order to
9436          * fully complete the previous instruction.
9437          */
9438         else if (!vcpu->arch.exception.pending) {
9439                 if (vcpu->arch.nmi_injected) {
9440                         static_call(kvm_x86_inject_nmi)(vcpu);
9441                         can_inject = false;
9442                 } else if (vcpu->arch.interrupt.injected) {
9443                         static_call(kvm_x86_inject_irq)(vcpu);
9444                         can_inject = false;
9445                 }
9446         }
9447
9448         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9449                      vcpu->arch.exception.pending);
9450
9451         /*
9452          * Call check_nested_events() even if we reinjected a previous event
9453          * in order for caller to determine if it should require immediate-exit
9454          * from L2 to L1 due to pending L1 events which require exit
9455          * from L2 to L1.
9456          */
9457         if (is_guest_mode(vcpu)) {
9458                 r = kvm_check_nested_events(vcpu);
9459                 if (r < 0)
9460                         goto out;
9461         }
9462
9463         /* try to inject new event if pending */
9464         if (vcpu->arch.exception.pending) {
9465                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9466                                         vcpu->arch.exception.has_error_code,
9467                                         vcpu->arch.exception.error_code);
9468
9469                 vcpu->arch.exception.pending = false;
9470                 vcpu->arch.exception.injected = true;
9471
9472                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9473                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9474                                              X86_EFLAGS_RF);
9475
9476                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9477                         kvm_deliver_exception_payload(vcpu);
9478                         if (vcpu->arch.dr7 & DR7_GD) {
9479                                 vcpu->arch.dr7 &= ~DR7_GD;
9480                                 kvm_update_dr7(vcpu);
9481                         }
9482                 }
9483
9484                 kvm_inject_exception(vcpu);
9485                 can_inject = false;
9486         }
9487
9488         /* Don't inject interrupts if the user asked to avoid doing so */
9489         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9490                 return 0;
9491
9492         /*
9493          * Finally, inject interrupt events.  If an event cannot be injected
9494          * due to architectural conditions (e.g. IF=0) a window-open exit
9495          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9496          * and can architecturally be injected, but we cannot do it right now:
9497          * an interrupt could have arrived just now and we have to inject it
9498          * as a vmexit, or there could already an event in the queue, which is
9499          * indicated by can_inject.  In that case we request an immediate exit
9500          * in order to make progress and get back here for another iteration.
9501          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9502          */
9503         if (vcpu->arch.smi_pending) {
9504                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9505                 if (r < 0)
9506                         goto out;
9507                 if (r) {
9508                         vcpu->arch.smi_pending = false;
9509                         ++vcpu->arch.smi_count;
9510                         enter_smm(vcpu);
9511                         can_inject = false;
9512                 } else
9513                         static_call(kvm_x86_enable_smi_window)(vcpu);
9514         }
9515
9516         if (vcpu->arch.nmi_pending) {
9517                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9518                 if (r < 0)
9519                         goto out;
9520                 if (r) {
9521                         --vcpu->arch.nmi_pending;
9522                         vcpu->arch.nmi_injected = true;
9523                         static_call(kvm_x86_inject_nmi)(vcpu);
9524                         can_inject = false;
9525                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9526                 }
9527                 if (vcpu->arch.nmi_pending)
9528                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9529         }
9530
9531         if (kvm_cpu_has_injectable_intr(vcpu)) {
9532                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9533                 if (r < 0)
9534                         goto out;
9535                 if (r) {
9536                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9537                         static_call(kvm_x86_inject_irq)(vcpu);
9538                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9539                 }
9540                 if (kvm_cpu_has_injectable_intr(vcpu))
9541                         static_call(kvm_x86_enable_irq_window)(vcpu);
9542         }
9543
9544         if (is_guest_mode(vcpu) &&
9545             kvm_x86_ops.nested_ops->hv_timer_pending &&
9546             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9547                 *req_immediate_exit = true;
9548
9549         WARN_ON(vcpu->arch.exception.pending);
9550         return 0;
9551
9552 out:
9553         if (r == -EBUSY) {
9554                 *req_immediate_exit = true;
9555                 r = 0;
9556         }
9557         return r;
9558 }
9559
9560 static void process_nmi(struct kvm_vcpu *vcpu)
9561 {
9562         unsigned limit = 2;
9563
9564         /*
9565          * x86 is limited to one NMI running, and one NMI pending after it.
9566          * If an NMI is already in progress, limit further NMIs to just one.
9567          * Otherwise, allow two (and we'll inject the first one immediately).
9568          */
9569         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9570                 limit = 1;
9571
9572         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9573         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9574         kvm_make_request(KVM_REQ_EVENT, vcpu);
9575 }
9576
9577 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9578 {
9579         u32 flags = 0;
9580         flags |= seg->g       << 23;
9581         flags |= seg->db      << 22;
9582         flags |= seg->l       << 21;
9583         flags |= seg->avl     << 20;
9584         flags |= seg->present << 15;
9585         flags |= seg->dpl     << 13;
9586         flags |= seg->s       << 12;
9587         flags |= seg->type    << 8;
9588         return flags;
9589 }
9590
9591 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9592 {
9593         struct kvm_segment seg;
9594         int offset;
9595
9596         kvm_get_segment(vcpu, &seg, n);
9597         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9598
9599         if (n < 3)
9600                 offset = 0x7f84 + n * 12;
9601         else
9602                 offset = 0x7f2c + (n - 3) * 12;
9603
9604         put_smstate(u32, buf, offset + 8, seg.base);
9605         put_smstate(u32, buf, offset + 4, seg.limit);
9606         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9607 }
9608
9609 #ifdef CONFIG_X86_64
9610 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9611 {
9612         struct kvm_segment seg;
9613         int offset;
9614         u16 flags;
9615
9616         kvm_get_segment(vcpu, &seg, n);
9617         offset = 0x7e00 + n * 16;
9618
9619         flags = enter_smm_get_segment_flags(&seg) >> 8;
9620         put_smstate(u16, buf, offset, seg.selector);
9621         put_smstate(u16, buf, offset + 2, flags);
9622         put_smstate(u32, buf, offset + 4, seg.limit);
9623         put_smstate(u64, buf, offset + 8, seg.base);
9624 }
9625 #endif
9626
9627 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9628 {
9629         struct desc_ptr dt;
9630         struct kvm_segment seg;
9631         unsigned long val;
9632         int i;
9633
9634         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9635         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9636         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9637         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9638
9639         for (i = 0; i < 8; i++)
9640                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9641
9642         kvm_get_dr(vcpu, 6, &val);
9643         put_smstate(u32, buf, 0x7fcc, (u32)val);
9644         kvm_get_dr(vcpu, 7, &val);
9645         put_smstate(u32, buf, 0x7fc8, (u32)val);
9646
9647         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9648         put_smstate(u32, buf, 0x7fc4, seg.selector);
9649         put_smstate(u32, buf, 0x7f64, seg.base);
9650         put_smstate(u32, buf, 0x7f60, seg.limit);
9651         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9652
9653         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9654         put_smstate(u32, buf, 0x7fc0, seg.selector);
9655         put_smstate(u32, buf, 0x7f80, seg.base);
9656         put_smstate(u32, buf, 0x7f7c, seg.limit);
9657         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9658
9659         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9660         put_smstate(u32, buf, 0x7f74, dt.address);
9661         put_smstate(u32, buf, 0x7f70, dt.size);
9662
9663         static_call(kvm_x86_get_idt)(vcpu, &dt);
9664         put_smstate(u32, buf, 0x7f58, dt.address);
9665         put_smstate(u32, buf, 0x7f54, dt.size);
9666
9667         for (i = 0; i < 6; i++)
9668                 enter_smm_save_seg_32(vcpu, buf, i);
9669
9670         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9671
9672         /* revision id */
9673         put_smstate(u32, buf, 0x7efc, 0x00020000);
9674         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9675 }
9676
9677 #ifdef CONFIG_X86_64
9678 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9679 {
9680         struct desc_ptr dt;
9681         struct kvm_segment seg;
9682         unsigned long val;
9683         int i;
9684
9685         for (i = 0; i < 16; i++)
9686                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9687
9688         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9689         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9690
9691         kvm_get_dr(vcpu, 6, &val);
9692         put_smstate(u64, buf, 0x7f68, val);
9693         kvm_get_dr(vcpu, 7, &val);
9694         put_smstate(u64, buf, 0x7f60, val);
9695
9696         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9697         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9698         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9699
9700         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9701
9702         /* revision id */
9703         put_smstate(u32, buf, 0x7efc, 0x00020064);
9704
9705         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9706
9707         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9708         put_smstate(u16, buf, 0x7e90, seg.selector);
9709         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9710         put_smstate(u32, buf, 0x7e94, seg.limit);
9711         put_smstate(u64, buf, 0x7e98, seg.base);
9712
9713         static_call(kvm_x86_get_idt)(vcpu, &dt);
9714         put_smstate(u32, buf, 0x7e84, dt.size);
9715         put_smstate(u64, buf, 0x7e88, dt.address);
9716
9717         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9718         put_smstate(u16, buf, 0x7e70, seg.selector);
9719         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9720         put_smstate(u32, buf, 0x7e74, seg.limit);
9721         put_smstate(u64, buf, 0x7e78, seg.base);
9722
9723         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9724         put_smstate(u32, buf, 0x7e64, dt.size);
9725         put_smstate(u64, buf, 0x7e68, dt.address);
9726
9727         for (i = 0; i < 6; i++)
9728                 enter_smm_save_seg_64(vcpu, buf, i);
9729 }
9730 #endif
9731
9732 static void enter_smm(struct kvm_vcpu *vcpu)
9733 {
9734         struct kvm_segment cs, ds;
9735         struct desc_ptr dt;
9736         unsigned long cr0;
9737         char buf[512];
9738
9739         memset(buf, 0, 512);
9740 #ifdef CONFIG_X86_64
9741         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9742                 enter_smm_save_state_64(vcpu, buf);
9743         else
9744 #endif
9745                 enter_smm_save_state_32(vcpu, buf);
9746
9747         /*
9748          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9749          * state (e.g. leave guest mode) after we've saved the state into the
9750          * SMM state-save area.
9751          */
9752         static_call(kvm_x86_enter_smm)(vcpu, buf);
9753
9754         kvm_smm_changed(vcpu, true);
9755         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9756
9757         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9758                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9759         else
9760                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9761
9762         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9763         kvm_rip_write(vcpu, 0x8000);
9764
9765         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9766         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9767         vcpu->arch.cr0 = cr0;
9768
9769         static_call(kvm_x86_set_cr4)(vcpu, 0);
9770
9771         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9772         dt.address = dt.size = 0;
9773         static_call(kvm_x86_set_idt)(vcpu, &dt);
9774
9775         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9776
9777         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9778         cs.base = vcpu->arch.smbase;
9779
9780         ds.selector = 0;
9781         ds.base = 0;
9782
9783         cs.limit    = ds.limit = 0xffffffff;
9784         cs.type     = ds.type = 0x3;
9785         cs.dpl      = ds.dpl = 0;
9786         cs.db       = ds.db = 0;
9787         cs.s        = ds.s = 1;
9788         cs.l        = ds.l = 0;
9789         cs.g        = ds.g = 1;
9790         cs.avl      = ds.avl = 0;
9791         cs.present  = ds.present = 1;
9792         cs.unusable = ds.unusable = 0;
9793         cs.padding  = ds.padding = 0;
9794
9795         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9796         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9797         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9798         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9799         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9800         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9801
9802 #ifdef CONFIG_X86_64
9803         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9804                 static_call(kvm_x86_set_efer)(vcpu, 0);
9805 #endif
9806
9807         kvm_update_cpuid_runtime(vcpu);
9808         kvm_mmu_reset_context(vcpu);
9809 }
9810
9811 static void process_smi(struct kvm_vcpu *vcpu)
9812 {
9813         vcpu->arch.smi_pending = true;
9814         kvm_make_request(KVM_REQ_EVENT, vcpu);
9815 }
9816
9817 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9818                                        unsigned long *vcpu_bitmap)
9819 {
9820         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9821 }
9822
9823 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9824 {
9825         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9826 }
9827
9828 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9829 {
9830         bool activate;
9831
9832         if (!lapic_in_kernel(vcpu))
9833                 return;
9834
9835         down_read(&vcpu->kvm->arch.apicv_update_lock);
9836
9837         activate = kvm_vcpu_apicv_activated(vcpu);
9838
9839         if (vcpu->arch.apicv_active == activate)
9840                 goto out;
9841
9842         vcpu->arch.apicv_active = activate;
9843         kvm_apic_update_apicv(vcpu);
9844         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9845
9846         /*
9847          * When APICv gets disabled, we may still have injected interrupts
9848          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9849          * still active when the interrupt got accepted. Make sure
9850          * inject_pending_event() is called to check for that.
9851          */
9852         if (!vcpu->arch.apicv_active)
9853                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9854
9855 out:
9856         up_read(&vcpu->kvm->arch.apicv_update_lock);
9857 }
9858 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9859
9860 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9861                                       enum kvm_apicv_inhibit reason, bool set)
9862 {
9863         unsigned long old, new;
9864
9865         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9866
9867         if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
9868                 return;
9869
9870         old = new = kvm->arch.apicv_inhibit_reasons;
9871
9872         set_or_clear_apicv_inhibit(&new, reason, set);
9873
9874         if (!!old != !!new) {
9875                 /*
9876                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9877                  * false positives in the sanity check WARN in svm_vcpu_run().
9878                  * This task will wait for all vCPUs to ack the kick IRQ before
9879                  * updating apicv_inhibit_reasons, and all other vCPUs will
9880                  * block on acquiring apicv_update_lock so that vCPUs can't
9881                  * redo svm_vcpu_run() without seeing the new inhibit state.
9882                  *
9883                  * Note, holding apicv_update_lock and taking it in the read
9884                  * side (handling the request) also prevents other vCPUs from
9885                  * servicing the request with a stale apicv_inhibit_reasons.
9886                  */
9887                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9888                 kvm->arch.apicv_inhibit_reasons = new;
9889                 if (new) {
9890                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9891                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9892                 }
9893         } else {
9894                 kvm->arch.apicv_inhibit_reasons = new;
9895         }
9896 }
9897
9898 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9899                                     enum kvm_apicv_inhibit reason, bool set)
9900 {
9901         if (!enable_apicv)
9902                 return;
9903
9904         down_write(&kvm->arch.apicv_update_lock);
9905         __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
9906         up_write(&kvm->arch.apicv_update_lock);
9907 }
9908 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
9909
9910 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9911 {
9912         if (!kvm_apic_present(vcpu))
9913                 return;
9914
9915         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9916
9917         if (irqchip_split(vcpu->kvm))
9918                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9919         else {
9920                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9921                 if (ioapic_in_kernel(vcpu->kvm))
9922                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9923         }
9924
9925         if (is_guest_mode(vcpu))
9926                 vcpu->arch.load_eoi_exitmap_pending = true;
9927         else
9928                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9929 }
9930
9931 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9932 {
9933         u64 eoi_exit_bitmap[4];
9934
9935         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9936                 return;
9937
9938         if (to_hv_vcpu(vcpu)) {
9939                 bitmap_or((ulong *)eoi_exit_bitmap,
9940                           vcpu->arch.ioapic_handled_vectors,
9941                           to_hv_synic(vcpu)->vec_bitmap, 256);
9942                 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9943                 return;
9944         }
9945
9946         static_call_cond(kvm_x86_load_eoi_exitmap)(
9947                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9948 }
9949
9950 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9951                                             unsigned long start, unsigned long end)
9952 {
9953         unsigned long apic_address;
9954
9955         /*
9956          * The physical address of apic access page is stored in the VMCS.
9957          * Update it when it becomes invalid.
9958          */
9959         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9960         if (start <= apic_address && apic_address < end)
9961                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9962 }
9963
9964 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
9965 {
9966         static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
9967 }
9968
9969 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9970 {
9971         if (!lapic_in_kernel(vcpu))
9972                 return;
9973
9974         static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
9975 }
9976
9977 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9978 {
9979         smp_send_reschedule(vcpu->cpu);
9980 }
9981 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9982
9983 /*
9984  * Called within kvm->srcu read side.
9985  * Returns 1 to let vcpu_run() continue the guest execution loop without
9986  * exiting to the userspace.  Otherwise, the value will be returned to the
9987  * userspace.
9988  */
9989 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9990 {
9991         int r;
9992         bool req_int_win =
9993                 dm_request_for_irq_injection(vcpu) &&
9994                 kvm_cpu_accept_dm_intr(vcpu);
9995         fastpath_t exit_fastpath;
9996
9997         bool req_immediate_exit = false;
9998
9999         /* Forbid vmenter if vcpu dirty ring is soft-full */
10000         if (unlikely(vcpu->kvm->dirty_ring_size &&
10001                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
10002                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
10003                 trace_kvm_dirty_ring_exit(vcpu);
10004                 r = 0;
10005                 goto out;
10006         }
10007
10008         if (kvm_request_pending(vcpu)) {
10009                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10010                         r = -EIO;
10011                         goto out;
10012                 }
10013                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10014                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10015                                 r = 0;
10016                                 goto out;
10017                         }
10018                 }
10019                 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10020                         kvm_mmu_free_obsolete_roots(vcpu);
10021                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10022                         __kvm_migrate_timers(vcpu);
10023                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10024                         kvm_update_masterclock(vcpu->kvm);
10025                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10026                         kvm_gen_kvmclock_update(vcpu);
10027                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10028                         r = kvm_guest_time_update(vcpu);
10029                         if (unlikely(r))
10030                                 goto out;
10031                 }
10032                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10033                         kvm_mmu_sync_roots(vcpu);
10034                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10035                         kvm_mmu_load_pgd(vcpu);
10036                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
10037                         kvm_vcpu_flush_tlb_all(vcpu);
10038
10039                         /* Flushing all ASIDs flushes the current ASID... */
10040                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
10041                 }
10042                 kvm_service_local_tlb_flush_requests(vcpu);
10043
10044                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10045                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10046                         r = 0;
10047                         goto out;
10048                 }
10049                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10050                         if (is_guest_mode(vcpu)) {
10051                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10052                         } else {
10053                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10054                                 vcpu->mmio_needed = 0;
10055                                 r = 0;
10056                                 goto out;
10057                         }
10058                 }
10059                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10060                         /* Page is swapped out. Do synthetic halt */
10061                         vcpu->arch.apf.halted = true;
10062                         r = 1;
10063                         goto out;
10064                 }
10065                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10066                         record_steal_time(vcpu);
10067                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10068                         process_smi(vcpu);
10069                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10070                         process_nmi(vcpu);
10071                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10072                         kvm_pmu_handle_event(vcpu);
10073                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10074                         kvm_pmu_deliver_pmi(vcpu);
10075                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10076                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10077                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
10078                                      vcpu->arch.ioapic_handled_vectors)) {
10079                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10080                                 vcpu->run->eoi.vector =
10081                                                 vcpu->arch.pending_ioapic_eoi;
10082                                 r = 0;
10083                                 goto out;
10084                         }
10085                 }
10086                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10087                         vcpu_scan_ioapic(vcpu);
10088                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10089                         vcpu_load_eoi_exitmap(vcpu);
10090                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10091                         kvm_vcpu_reload_apic_access_page(vcpu);
10092                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10093                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10094                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10095                         vcpu->run->system_event.ndata = 0;
10096                         r = 0;
10097                         goto out;
10098                 }
10099                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10100                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10101                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10102                         vcpu->run->system_event.ndata = 0;
10103                         r = 0;
10104                         goto out;
10105                 }
10106                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10107                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10108
10109                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10110                         vcpu->run->hyperv = hv_vcpu->exit;
10111                         r = 0;
10112                         goto out;
10113                 }
10114
10115                 /*
10116                  * KVM_REQ_HV_STIMER has to be processed after
10117                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10118                  * depend on the guest clock being up-to-date
10119                  */
10120                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10121                         kvm_hv_process_stimers(vcpu);
10122                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10123                         kvm_vcpu_update_apicv(vcpu);
10124                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10125                         kvm_check_async_pf_completion(vcpu);
10126                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10127                         static_call(kvm_x86_msr_filter_changed)(vcpu);
10128
10129                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10130                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10131         }
10132
10133         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10134             kvm_xen_has_interrupt(vcpu)) {
10135                 ++vcpu->stat.req_event;
10136                 r = kvm_apic_accept_events(vcpu);
10137                 if (r < 0) {
10138                         r = 0;
10139                         goto out;
10140                 }
10141                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10142                         r = 1;
10143                         goto out;
10144                 }
10145
10146                 r = inject_pending_event(vcpu, &req_immediate_exit);
10147                 if (r < 0) {
10148                         r = 0;
10149                         goto out;
10150                 }
10151                 if (req_int_win)
10152                         static_call(kvm_x86_enable_irq_window)(vcpu);
10153
10154                 if (kvm_lapic_enabled(vcpu)) {
10155                         update_cr8_intercept(vcpu);
10156                         kvm_lapic_sync_to_vapic(vcpu);
10157                 }
10158         }
10159
10160         r = kvm_mmu_reload(vcpu);
10161         if (unlikely(r)) {
10162                 goto cancel_injection;
10163         }
10164
10165         preempt_disable();
10166
10167         static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10168
10169         /*
10170          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
10171          * IPI are then delayed after guest entry, which ensures that they
10172          * result in virtual interrupt delivery.
10173          */
10174         local_irq_disable();
10175
10176         /* Store vcpu->apicv_active before vcpu->mode.  */
10177         smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10178
10179         kvm_vcpu_srcu_read_unlock(vcpu);
10180
10181         /*
10182          * 1) We should set ->mode before checking ->requests.  Please see
10183          * the comment in kvm_vcpu_exiting_guest_mode().
10184          *
10185          * 2) For APICv, we should set ->mode before checking PID.ON. This
10186          * pairs with the memory barrier implicit in pi_test_and_set_on
10187          * (see vmx_deliver_posted_interrupt).
10188          *
10189          * 3) This also orders the write to mode from any reads to the page
10190          * tables done while the VCPU is running.  Please see the comment
10191          * in kvm_flush_remote_tlbs.
10192          */
10193         smp_mb__after_srcu_read_unlock();
10194
10195         /*
10196          * Process pending posted interrupts to handle the case where the
10197          * notification IRQ arrived in the host, or was never sent (because the
10198          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10199          * status, KVM doesn't update assigned devices when APICv is inhibited,
10200          * i.e. they can post interrupts even if APICv is temporarily disabled.
10201          */
10202         if (kvm_lapic_enabled(vcpu))
10203                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10204
10205         if (kvm_vcpu_exit_request(vcpu)) {
10206                 vcpu->mode = OUTSIDE_GUEST_MODE;
10207                 smp_wmb();
10208                 local_irq_enable();
10209                 preempt_enable();
10210                 kvm_vcpu_srcu_read_lock(vcpu);
10211                 r = 1;
10212                 goto cancel_injection;
10213         }
10214
10215         if (req_immediate_exit) {
10216                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10217                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10218         }
10219
10220         fpregs_assert_state_consistent();
10221         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10222                 switch_fpu_return();
10223
10224         if (vcpu->arch.guest_fpu.xfd_err)
10225                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10226
10227         if (unlikely(vcpu->arch.switch_db_regs)) {
10228                 set_debugreg(0, 7);
10229                 set_debugreg(vcpu->arch.eff_db[0], 0);
10230                 set_debugreg(vcpu->arch.eff_db[1], 1);
10231                 set_debugreg(vcpu->arch.eff_db[2], 2);
10232                 set_debugreg(vcpu->arch.eff_db[3], 3);
10233         } else if (unlikely(hw_breakpoint_active())) {
10234                 set_debugreg(0, 7);
10235         }
10236
10237         guest_timing_enter_irqoff();
10238
10239         for (;;) {
10240                 /*
10241                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10242                  * update must kick and wait for all vCPUs before toggling the
10243                  * per-VM state, and responsing vCPUs must wait for the update
10244                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10245                  */
10246                 WARN_ON_ONCE(kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu));
10247
10248                 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10249                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10250                         break;
10251
10252                 if (kvm_lapic_enabled(vcpu))
10253                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10254
10255                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10256                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10257                         break;
10258                 }
10259         }
10260
10261         /*
10262          * Do this here before restoring debug registers on the host.  And
10263          * since we do this before handling the vmexit, a DR access vmexit
10264          * can (a) read the correct value of the debug registers, (b) set
10265          * KVM_DEBUGREG_WONT_EXIT again.
10266          */
10267         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10268                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10269                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10270                 kvm_update_dr0123(vcpu);
10271                 kvm_update_dr7(vcpu);
10272         }
10273
10274         /*
10275          * If the guest has used debug registers, at least dr7
10276          * will be disabled while returning to the host.
10277          * If we don't have active breakpoints in the host, we don't
10278          * care about the messed up debug address registers. But if
10279          * we have some of them active, restore the old state.
10280          */
10281         if (hw_breakpoint_active())
10282                 hw_breakpoint_restore();
10283
10284         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10285         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10286
10287         vcpu->mode = OUTSIDE_GUEST_MODE;
10288         smp_wmb();
10289
10290         /*
10291          * Sync xfd before calling handle_exit_irqoff() which may
10292          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10293          * in #NM irqoff handler).
10294          */
10295         if (vcpu->arch.xfd_no_write_intercept)
10296                 fpu_sync_guest_vmexit_xfd_state();
10297
10298         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10299
10300         if (vcpu->arch.guest_fpu.xfd_err)
10301                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10302
10303         /*
10304          * Consume any pending interrupts, including the possible source of
10305          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10306          * An instruction is required after local_irq_enable() to fully unblock
10307          * interrupts on processors that implement an interrupt shadow, the
10308          * stat.exits increment will do nicely.
10309          */
10310         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10311         local_irq_enable();
10312         ++vcpu->stat.exits;
10313         local_irq_disable();
10314         kvm_after_interrupt(vcpu);
10315
10316         /*
10317          * Wait until after servicing IRQs to account guest time so that any
10318          * ticks that occurred while running the guest are properly accounted
10319          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10320          * of accounting via context tracking, but the loss of accuracy is
10321          * acceptable for all known use cases.
10322          */
10323         guest_timing_exit_irqoff();
10324
10325         local_irq_enable();
10326         preempt_enable();
10327
10328         kvm_vcpu_srcu_read_lock(vcpu);
10329
10330         /*
10331          * Profile KVM exit RIPs:
10332          */
10333         if (unlikely(prof_on == KVM_PROFILING)) {
10334                 unsigned long rip = kvm_rip_read(vcpu);
10335                 profile_hit(KVM_PROFILING, (void *)rip);
10336         }
10337
10338         if (unlikely(vcpu->arch.tsc_always_catchup))
10339                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10340
10341         if (vcpu->arch.apic_attention)
10342                 kvm_lapic_sync_from_vapic(vcpu);
10343
10344         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10345         return r;
10346
10347 cancel_injection:
10348         if (req_immediate_exit)
10349                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10350         static_call(kvm_x86_cancel_injection)(vcpu);
10351         if (unlikely(vcpu->arch.apic_attention))
10352                 kvm_lapic_sync_from_vapic(vcpu);
10353 out:
10354         return r;
10355 }
10356
10357 /* Called within kvm->srcu read side.  */
10358 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10359 {
10360         bool hv_timer;
10361
10362         if (!kvm_arch_vcpu_runnable(vcpu)) {
10363                 /*
10364                  * Switch to the software timer before halt-polling/blocking as
10365                  * the guest's timer may be a break event for the vCPU, and the
10366                  * hypervisor timer runs only when the CPU is in guest mode.
10367                  * Switch before halt-polling so that KVM recognizes an expired
10368                  * timer before blocking.
10369                  */
10370                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10371                 if (hv_timer)
10372                         kvm_lapic_switch_to_sw_timer(vcpu);
10373
10374                 kvm_vcpu_srcu_read_unlock(vcpu);
10375                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10376                         kvm_vcpu_halt(vcpu);
10377                 else
10378                         kvm_vcpu_block(vcpu);
10379                 kvm_vcpu_srcu_read_lock(vcpu);
10380
10381                 if (hv_timer)
10382                         kvm_lapic_switch_to_hv_timer(vcpu);
10383
10384                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10385                         return 1;
10386         }
10387
10388         if (kvm_apic_accept_events(vcpu) < 0)
10389                 return 0;
10390         switch(vcpu->arch.mp_state) {
10391         case KVM_MP_STATE_HALTED:
10392         case KVM_MP_STATE_AP_RESET_HOLD:
10393                 vcpu->arch.pv.pv_unhalted = false;
10394                 vcpu->arch.mp_state =
10395                         KVM_MP_STATE_RUNNABLE;
10396                 fallthrough;
10397         case KVM_MP_STATE_RUNNABLE:
10398                 vcpu->arch.apf.halted = false;
10399                 break;
10400         case KVM_MP_STATE_INIT_RECEIVED:
10401                 break;
10402         default:
10403                 return -EINTR;
10404         }
10405         return 1;
10406 }
10407
10408 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10409 {
10410         if (is_guest_mode(vcpu))
10411                 kvm_check_nested_events(vcpu);
10412
10413         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10414                 !vcpu->arch.apf.halted);
10415 }
10416
10417 /* Called within kvm->srcu read side.  */
10418 static int vcpu_run(struct kvm_vcpu *vcpu)
10419 {
10420         int r;
10421
10422         vcpu->arch.l1tf_flush_l1d = true;
10423
10424         for (;;) {
10425                 if (kvm_vcpu_running(vcpu)) {
10426                         r = vcpu_enter_guest(vcpu);
10427                 } else {
10428                         r = vcpu_block(vcpu);
10429                 }
10430
10431                 if (r <= 0)
10432                         break;
10433
10434                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10435                 if (kvm_xen_has_pending_events(vcpu))
10436                         kvm_xen_inject_pending_events(vcpu);
10437
10438                 if (kvm_cpu_has_pending_timer(vcpu))
10439                         kvm_inject_pending_timer_irqs(vcpu);
10440
10441                 if (dm_request_for_irq_injection(vcpu) &&
10442                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10443                         r = 0;
10444                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10445                         ++vcpu->stat.request_irq_exits;
10446                         break;
10447                 }
10448
10449                 if (__xfer_to_guest_mode_work_pending()) {
10450                         kvm_vcpu_srcu_read_unlock(vcpu);
10451                         r = xfer_to_guest_mode_handle_work(vcpu);
10452                         kvm_vcpu_srcu_read_lock(vcpu);
10453                         if (r)
10454                                 return r;
10455                 }
10456         }
10457
10458         return r;
10459 }
10460
10461 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10462 {
10463         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10464 }
10465
10466 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10467 {
10468         BUG_ON(!vcpu->arch.pio.count);
10469
10470         return complete_emulated_io(vcpu);
10471 }
10472
10473 /*
10474  * Implements the following, as a state machine:
10475  *
10476  * read:
10477  *   for each fragment
10478  *     for each mmio piece in the fragment
10479  *       write gpa, len
10480  *       exit
10481  *       copy data
10482  *   execute insn
10483  *
10484  * write:
10485  *   for each fragment
10486  *     for each mmio piece in the fragment
10487  *       write gpa, len
10488  *       copy data
10489  *       exit
10490  */
10491 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10492 {
10493         struct kvm_run *run = vcpu->run;
10494         struct kvm_mmio_fragment *frag;
10495         unsigned len;
10496
10497         BUG_ON(!vcpu->mmio_needed);
10498
10499         /* Complete previous fragment */
10500         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10501         len = min(8u, frag->len);
10502         if (!vcpu->mmio_is_write)
10503                 memcpy(frag->data, run->mmio.data, len);
10504
10505         if (frag->len <= 8) {
10506                 /* Switch to the next fragment. */
10507                 frag++;
10508                 vcpu->mmio_cur_fragment++;
10509         } else {
10510                 /* Go forward to the next mmio piece. */
10511                 frag->data += len;
10512                 frag->gpa += len;
10513                 frag->len -= len;
10514         }
10515
10516         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10517                 vcpu->mmio_needed = 0;
10518
10519                 /* FIXME: return into emulator if single-stepping.  */
10520                 if (vcpu->mmio_is_write)
10521                         return 1;
10522                 vcpu->mmio_read_completed = 1;
10523                 return complete_emulated_io(vcpu);
10524         }
10525
10526         run->exit_reason = KVM_EXIT_MMIO;
10527         run->mmio.phys_addr = frag->gpa;
10528         if (vcpu->mmio_is_write)
10529                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10530         run->mmio.len = min(8u, frag->len);
10531         run->mmio.is_write = vcpu->mmio_is_write;
10532         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10533         return 0;
10534 }
10535
10536 /* Swap (qemu) user FPU context for the guest FPU context. */
10537 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10538 {
10539         /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10540         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10541         trace_kvm_fpu(1);
10542 }
10543
10544 /* When vcpu_run ends, restore user space FPU context. */
10545 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10546 {
10547         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10548         ++vcpu->stat.fpu_reload;
10549         trace_kvm_fpu(0);
10550 }
10551
10552 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10553 {
10554         struct kvm_run *kvm_run = vcpu->run;
10555         int r;
10556
10557         vcpu_load(vcpu);
10558         kvm_sigset_activate(vcpu);
10559         kvm_run->flags = 0;
10560         kvm_load_guest_fpu(vcpu);
10561
10562         kvm_vcpu_srcu_read_lock(vcpu);
10563         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10564                 if (kvm_run->immediate_exit) {
10565                         r = -EINTR;
10566                         goto out;
10567                 }
10568                 /*
10569                  * It should be impossible for the hypervisor timer to be in
10570                  * use before KVM has ever run the vCPU.
10571                  */
10572                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10573
10574                 kvm_vcpu_srcu_read_unlock(vcpu);
10575                 kvm_vcpu_block(vcpu);
10576                 kvm_vcpu_srcu_read_lock(vcpu);
10577
10578                 if (kvm_apic_accept_events(vcpu) < 0) {
10579                         r = 0;
10580                         goto out;
10581                 }
10582                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10583                 r = -EAGAIN;
10584                 if (signal_pending(current)) {
10585                         r = -EINTR;
10586                         kvm_run->exit_reason = KVM_EXIT_INTR;
10587                         ++vcpu->stat.signal_exits;
10588                 }
10589                 goto out;
10590         }
10591
10592         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10593             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10594                 r = -EINVAL;
10595                 goto out;
10596         }
10597
10598         if (kvm_run->kvm_dirty_regs) {
10599                 r = sync_regs(vcpu);
10600                 if (r != 0)
10601                         goto out;
10602         }
10603
10604         /* re-sync apic's tpr */
10605         if (!lapic_in_kernel(vcpu)) {
10606                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10607                         r = -EINVAL;
10608                         goto out;
10609                 }
10610         }
10611
10612         if (unlikely(vcpu->arch.complete_userspace_io)) {
10613                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10614                 vcpu->arch.complete_userspace_io = NULL;
10615                 r = cui(vcpu);
10616                 if (r <= 0)
10617                         goto out;
10618         } else
10619                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10620
10621         if (kvm_run->immediate_exit) {
10622                 r = -EINTR;
10623                 goto out;
10624         }
10625
10626         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10627         if (r <= 0)
10628                 goto out;
10629
10630         r = vcpu_run(vcpu);
10631
10632 out:
10633         kvm_put_guest_fpu(vcpu);
10634         if (kvm_run->kvm_valid_regs)
10635                 store_regs(vcpu);
10636         post_kvm_run_save(vcpu);
10637         kvm_vcpu_srcu_read_unlock(vcpu);
10638
10639         kvm_sigset_deactivate(vcpu);
10640         vcpu_put(vcpu);
10641         return r;
10642 }
10643
10644 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10645 {
10646         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10647                 /*
10648                  * We are here if userspace calls get_regs() in the middle of
10649                  * instruction emulation. Registers state needs to be copied
10650                  * back from emulation context to vcpu. Userspace shouldn't do
10651                  * that usually, but some bad designed PV devices (vmware
10652                  * backdoor interface) need this to work
10653                  */
10654                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10655                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10656         }
10657         regs->rax = kvm_rax_read(vcpu);
10658         regs->rbx = kvm_rbx_read(vcpu);
10659         regs->rcx = kvm_rcx_read(vcpu);
10660         regs->rdx = kvm_rdx_read(vcpu);
10661         regs->rsi = kvm_rsi_read(vcpu);
10662         regs->rdi = kvm_rdi_read(vcpu);
10663         regs->rsp = kvm_rsp_read(vcpu);
10664         regs->rbp = kvm_rbp_read(vcpu);
10665 #ifdef CONFIG_X86_64
10666         regs->r8 = kvm_r8_read(vcpu);
10667         regs->r9 = kvm_r9_read(vcpu);
10668         regs->r10 = kvm_r10_read(vcpu);
10669         regs->r11 = kvm_r11_read(vcpu);
10670         regs->r12 = kvm_r12_read(vcpu);
10671         regs->r13 = kvm_r13_read(vcpu);
10672         regs->r14 = kvm_r14_read(vcpu);
10673         regs->r15 = kvm_r15_read(vcpu);
10674 #endif
10675
10676         regs->rip = kvm_rip_read(vcpu);
10677         regs->rflags = kvm_get_rflags(vcpu);
10678 }
10679
10680 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10681 {
10682         vcpu_load(vcpu);
10683         __get_regs(vcpu, regs);
10684         vcpu_put(vcpu);
10685         return 0;
10686 }
10687
10688 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10689 {
10690         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10691         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10692
10693         kvm_rax_write(vcpu, regs->rax);
10694         kvm_rbx_write(vcpu, regs->rbx);
10695         kvm_rcx_write(vcpu, regs->rcx);
10696         kvm_rdx_write(vcpu, regs->rdx);
10697         kvm_rsi_write(vcpu, regs->rsi);
10698         kvm_rdi_write(vcpu, regs->rdi);
10699         kvm_rsp_write(vcpu, regs->rsp);
10700         kvm_rbp_write(vcpu, regs->rbp);
10701 #ifdef CONFIG_X86_64
10702         kvm_r8_write(vcpu, regs->r8);
10703         kvm_r9_write(vcpu, regs->r9);
10704         kvm_r10_write(vcpu, regs->r10);
10705         kvm_r11_write(vcpu, regs->r11);
10706         kvm_r12_write(vcpu, regs->r12);
10707         kvm_r13_write(vcpu, regs->r13);
10708         kvm_r14_write(vcpu, regs->r14);
10709         kvm_r15_write(vcpu, regs->r15);
10710 #endif
10711
10712         kvm_rip_write(vcpu, regs->rip);
10713         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10714
10715         vcpu->arch.exception.pending = false;
10716
10717         kvm_make_request(KVM_REQ_EVENT, vcpu);
10718 }
10719
10720 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10721 {
10722         vcpu_load(vcpu);
10723         __set_regs(vcpu, regs);
10724         vcpu_put(vcpu);
10725         return 0;
10726 }
10727
10728 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10729 {
10730         struct desc_ptr dt;
10731
10732         if (vcpu->arch.guest_state_protected)
10733                 goto skip_protected_regs;
10734
10735         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10736         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10737         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10738         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10739         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10740         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10741
10742         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10743         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10744
10745         static_call(kvm_x86_get_idt)(vcpu, &dt);
10746         sregs->idt.limit = dt.size;
10747         sregs->idt.base = dt.address;
10748         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10749         sregs->gdt.limit = dt.size;
10750         sregs->gdt.base = dt.address;
10751
10752         sregs->cr2 = vcpu->arch.cr2;
10753         sregs->cr3 = kvm_read_cr3(vcpu);
10754
10755 skip_protected_regs:
10756         sregs->cr0 = kvm_read_cr0(vcpu);
10757         sregs->cr4 = kvm_read_cr4(vcpu);
10758         sregs->cr8 = kvm_get_cr8(vcpu);
10759         sregs->efer = vcpu->arch.efer;
10760         sregs->apic_base = kvm_get_apic_base(vcpu);
10761 }
10762
10763 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10764 {
10765         __get_sregs_common(vcpu, sregs);
10766
10767         if (vcpu->arch.guest_state_protected)
10768                 return;
10769
10770         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10771                 set_bit(vcpu->arch.interrupt.nr,
10772                         (unsigned long *)sregs->interrupt_bitmap);
10773 }
10774
10775 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10776 {
10777         int i;
10778
10779         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10780
10781         if (vcpu->arch.guest_state_protected)
10782                 return;
10783
10784         if (is_pae_paging(vcpu)) {
10785                 for (i = 0 ; i < 4 ; i++)
10786                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10787                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10788         }
10789 }
10790
10791 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10792                                   struct kvm_sregs *sregs)
10793 {
10794         vcpu_load(vcpu);
10795         __get_sregs(vcpu, sregs);
10796         vcpu_put(vcpu);
10797         return 0;
10798 }
10799
10800 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10801                                     struct kvm_mp_state *mp_state)
10802 {
10803         int r;
10804
10805         vcpu_load(vcpu);
10806         if (kvm_mpx_supported())
10807                 kvm_load_guest_fpu(vcpu);
10808
10809         r = kvm_apic_accept_events(vcpu);
10810         if (r < 0)
10811                 goto out;
10812         r = 0;
10813
10814         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10815              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10816             vcpu->arch.pv.pv_unhalted)
10817                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10818         else
10819                 mp_state->mp_state = vcpu->arch.mp_state;
10820
10821 out:
10822         if (kvm_mpx_supported())
10823                 kvm_put_guest_fpu(vcpu);
10824         vcpu_put(vcpu);
10825         return r;
10826 }
10827
10828 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10829                                     struct kvm_mp_state *mp_state)
10830 {
10831         int ret = -EINVAL;
10832
10833         vcpu_load(vcpu);
10834
10835         if (!lapic_in_kernel(vcpu) &&
10836             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10837                 goto out;
10838
10839         /*
10840          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10841          * INIT state; latched init should be reported using
10842          * KVM_SET_VCPU_EVENTS, so reject it here.
10843          */
10844         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10845             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10846              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10847                 goto out;
10848
10849         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10850                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10851                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10852         } else
10853                 vcpu->arch.mp_state = mp_state->mp_state;
10854         kvm_make_request(KVM_REQ_EVENT, vcpu);
10855
10856         ret = 0;
10857 out:
10858         vcpu_put(vcpu);
10859         return ret;
10860 }
10861
10862 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10863                     int reason, bool has_error_code, u32 error_code)
10864 {
10865         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10866         int ret;
10867
10868         init_emulate_ctxt(vcpu);
10869
10870         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10871                                    has_error_code, error_code);
10872         if (ret) {
10873                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10874                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10875                 vcpu->run->internal.ndata = 0;
10876                 return 0;
10877         }
10878
10879         kvm_rip_write(vcpu, ctxt->eip);
10880         kvm_set_rflags(vcpu, ctxt->eflags);
10881         return 1;
10882 }
10883 EXPORT_SYMBOL_GPL(kvm_task_switch);
10884
10885 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10886 {
10887         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10888                 /*
10889                  * When EFER.LME and CR0.PG are set, the processor is in
10890                  * 64-bit mode (though maybe in a 32-bit code segment).
10891                  * CR4.PAE and EFER.LMA must be set.
10892                  */
10893                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10894                         return false;
10895                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10896                         return false;
10897         } else {
10898                 /*
10899                  * Not in 64-bit mode: EFER.LMA is clear and the code
10900                  * segment cannot be 64-bit.
10901                  */
10902                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10903                         return false;
10904         }
10905
10906         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10907 }
10908
10909 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10910                 int *mmu_reset_needed, bool update_pdptrs)
10911 {
10912         struct msr_data apic_base_msr;
10913         int idx;
10914         struct desc_ptr dt;
10915
10916         if (!kvm_is_valid_sregs(vcpu, sregs))
10917                 return -EINVAL;
10918
10919         apic_base_msr.data = sregs->apic_base;
10920         apic_base_msr.host_initiated = true;
10921         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10922                 return -EINVAL;
10923
10924         if (vcpu->arch.guest_state_protected)
10925                 return 0;
10926
10927         dt.size = sregs->idt.limit;
10928         dt.address = sregs->idt.base;
10929         static_call(kvm_x86_set_idt)(vcpu, &dt);
10930         dt.size = sregs->gdt.limit;
10931         dt.address = sregs->gdt.base;
10932         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10933
10934         vcpu->arch.cr2 = sregs->cr2;
10935         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10936         vcpu->arch.cr3 = sregs->cr3;
10937         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10938         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10939
10940         kvm_set_cr8(vcpu, sregs->cr8);
10941
10942         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10943         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10944
10945         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10946         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10947         vcpu->arch.cr0 = sregs->cr0;
10948
10949         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10950         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10951
10952         if (update_pdptrs) {
10953                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10954                 if (is_pae_paging(vcpu)) {
10955                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10956                         *mmu_reset_needed = 1;
10957                 }
10958                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10959         }
10960
10961         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10962         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10963         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10964         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10965         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10966         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10967
10968         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10969         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10970
10971         update_cr8_intercept(vcpu);
10972
10973         /* Older userspace won't unhalt the vcpu on reset. */
10974         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10975             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10976             !is_protmode(vcpu))
10977                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10978
10979         return 0;
10980 }
10981
10982 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10983 {
10984         int pending_vec, max_bits;
10985         int mmu_reset_needed = 0;
10986         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10987
10988         if (ret)
10989                 return ret;
10990
10991         if (mmu_reset_needed)
10992                 kvm_mmu_reset_context(vcpu);
10993
10994         max_bits = KVM_NR_INTERRUPTS;
10995         pending_vec = find_first_bit(
10996                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10997
10998         if (pending_vec < max_bits) {
10999                 kvm_queue_interrupt(vcpu, pending_vec, false);
11000                 pr_debug("Set back pending irq %d\n", pending_vec);
11001                 kvm_make_request(KVM_REQ_EVENT, vcpu);
11002         }
11003         return 0;
11004 }
11005
11006 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11007 {
11008         int mmu_reset_needed = 0;
11009         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11010         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11011                 !(sregs2->efer & EFER_LMA);
11012         int i, ret;
11013
11014         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11015                 return -EINVAL;
11016
11017         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11018                 return -EINVAL;
11019
11020         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11021                                  &mmu_reset_needed, !valid_pdptrs);
11022         if (ret)
11023                 return ret;
11024
11025         if (valid_pdptrs) {
11026                 for (i = 0; i < 4 ; i++)
11027                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11028
11029                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11030                 mmu_reset_needed = 1;
11031                 vcpu->arch.pdptrs_from_userspace = true;
11032         }
11033         if (mmu_reset_needed)
11034                 kvm_mmu_reset_context(vcpu);
11035         return 0;
11036 }
11037
11038 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11039                                   struct kvm_sregs *sregs)
11040 {
11041         int ret;
11042
11043         vcpu_load(vcpu);
11044         ret = __set_sregs(vcpu, sregs);
11045         vcpu_put(vcpu);
11046         return ret;
11047 }
11048
11049 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11050 {
11051         bool set = false;
11052         struct kvm_vcpu *vcpu;
11053         unsigned long i;
11054
11055         if (!enable_apicv)
11056                 return;
11057
11058         down_write(&kvm->arch.apicv_update_lock);
11059
11060         kvm_for_each_vcpu(i, vcpu, kvm) {
11061                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11062                         set = true;
11063                         break;
11064                 }
11065         }
11066         __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11067         up_write(&kvm->arch.apicv_update_lock);
11068 }
11069
11070 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11071                                         struct kvm_guest_debug *dbg)
11072 {
11073         unsigned long rflags;
11074         int i, r;
11075
11076         if (vcpu->arch.guest_state_protected)
11077                 return -EINVAL;
11078
11079         vcpu_load(vcpu);
11080
11081         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11082                 r = -EBUSY;
11083                 if (vcpu->arch.exception.pending)
11084                         goto out;
11085                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11086                         kvm_queue_exception(vcpu, DB_VECTOR);
11087                 else
11088                         kvm_queue_exception(vcpu, BP_VECTOR);
11089         }
11090
11091         /*
11092          * Read rflags as long as potentially injected trace flags are still
11093          * filtered out.
11094          */
11095         rflags = kvm_get_rflags(vcpu);
11096
11097         vcpu->guest_debug = dbg->control;
11098         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11099                 vcpu->guest_debug = 0;
11100
11101         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11102                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11103                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11104                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11105         } else {
11106                 for (i = 0; i < KVM_NR_DB_REGS; i++)
11107                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11108         }
11109         kvm_update_dr7(vcpu);
11110
11111         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11112                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11113
11114         /*
11115          * Trigger an rflags update that will inject or remove the trace
11116          * flags.
11117          */
11118         kvm_set_rflags(vcpu, rflags);
11119
11120         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11121
11122         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11123
11124         r = 0;
11125
11126 out:
11127         vcpu_put(vcpu);
11128         return r;
11129 }
11130
11131 /*
11132  * Translate a guest virtual address to a guest physical address.
11133  */
11134 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11135                                     struct kvm_translation *tr)
11136 {
11137         unsigned long vaddr = tr->linear_address;
11138         gpa_t gpa;
11139         int idx;
11140
11141         vcpu_load(vcpu);
11142
11143         idx = srcu_read_lock(&vcpu->kvm->srcu);
11144         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11145         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11146         tr->physical_address = gpa;
11147         tr->valid = gpa != UNMAPPED_GVA;
11148         tr->writeable = 1;
11149         tr->usermode = 0;
11150
11151         vcpu_put(vcpu);
11152         return 0;
11153 }
11154
11155 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11156 {
11157         struct fxregs_state *fxsave;
11158
11159         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11160                 return 0;
11161
11162         vcpu_load(vcpu);
11163
11164         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11165         memcpy(fpu->fpr, fxsave->st_space, 128);
11166         fpu->fcw = fxsave->cwd;
11167         fpu->fsw = fxsave->swd;
11168         fpu->ftwx = fxsave->twd;
11169         fpu->last_opcode = fxsave->fop;
11170         fpu->last_ip = fxsave->rip;
11171         fpu->last_dp = fxsave->rdp;
11172         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11173
11174         vcpu_put(vcpu);
11175         return 0;
11176 }
11177
11178 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11179 {
11180         struct fxregs_state *fxsave;
11181
11182         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11183                 return 0;
11184
11185         vcpu_load(vcpu);
11186
11187         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11188
11189         memcpy(fxsave->st_space, fpu->fpr, 128);
11190         fxsave->cwd = fpu->fcw;
11191         fxsave->swd = fpu->fsw;
11192         fxsave->twd = fpu->ftwx;
11193         fxsave->fop = fpu->last_opcode;
11194         fxsave->rip = fpu->last_ip;
11195         fxsave->rdp = fpu->last_dp;
11196         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11197
11198         vcpu_put(vcpu);
11199         return 0;
11200 }
11201
11202 static void store_regs(struct kvm_vcpu *vcpu)
11203 {
11204         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11205
11206         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11207                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11208
11209         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11210                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11211
11212         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11213                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11214                                 vcpu, &vcpu->run->s.regs.events);
11215 }
11216
11217 static int sync_regs(struct kvm_vcpu *vcpu)
11218 {
11219         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11220                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11221                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11222         }
11223         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11224                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11225                         return -EINVAL;
11226                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11227         }
11228         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11229                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11230                                 vcpu, &vcpu->run->s.regs.events))
11231                         return -EINVAL;
11232                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11233         }
11234
11235         return 0;
11236 }
11237
11238 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11239 {
11240         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11241                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11242                              "guest TSC will not be reliable\n");
11243
11244         return 0;
11245 }
11246
11247 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11248 {
11249         struct page *page;
11250         int r;
11251
11252         vcpu->arch.last_vmentry_cpu = -1;
11253         vcpu->arch.regs_avail = ~0;
11254         vcpu->arch.regs_dirty = ~0;
11255
11256         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11257                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11258         else
11259                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11260
11261         r = kvm_mmu_create(vcpu);
11262         if (r < 0)
11263                 return r;
11264
11265         if (irqchip_in_kernel(vcpu->kvm)) {
11266                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11267                 if (r < 0)
11268                         goto fail_mmu_destroy;
11269
11270                 /*
11271                  * Defer evaluating inhibits until the vCPU is first run, as
11272                  * this vCPU will not get notified of any changes until this
11273                  * vCPU is visible to other vCPUs (marked online and added to
11274                  * the set of vCPUs).  Opportunistically mark APICv active as
11275                  * VMX in particularly is highly unlikely to have inhibits.
11276                  * Ignore the current per-VM APICv state so that vCPU creation
11277                  * is guaranteed to run with a deterministic value, the request
11278                  * will ensure the vCPU gets the correct state before VM-Entry.
11279                  */
11280                 if (enable_apicv) {
11281                         vcpu->arch.apicv_active = true;
11282                         kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11283                 }
11284         } else
11285                 static_branch_inc(&kvm_has_noapic_vcpu);
11286
11287         r = -ENOMEM;
11288
11289         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11290         if (!page)
11291                 goto fail_free_lapic;
11292         vcpu->arch.pio_data = page_address(page);
11293
11294         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11295                                        GFP_KERNEL_ACCOUNT);
11296         if (!vcpu->arch.mce_banks)
11297                 goto fail_free_pio_data;
11298         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11299
11300         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11301                                 GFP_KERNEL_ACCOUNT))
11302                 goto fail_free_mce_banks;
11303
11304         if (!alloc_emulate_ctxt(vcpu))
11305                 goto free_wbinvd_dirty_mask;
11306
11307         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11308                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11309                 goto free_emulate_ctxt;
11310         }
11311
11312         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11313         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11314
11315         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11316
11317         kvm_async_pf_hash_reset(vcpu);
11318         kvm_pmu_init(vcpu);
11319
11320         vcpu->arch.pending_external_vector = -1;
11321         vcpu->arch.preempted_in_kernel = false;
11322
11323 #if IS_ENABLED(CONFIG_HYPERV)
11324         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11325 #endif
11326
11327         r = static_call(kvm_x86_vcpu_create)(vcpu);
11328         if (r)
11329                 goto free_guest_fpu;
11330
11331         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11332         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11333         kvm_xen_init_vcpu(vcpu);
11334         kvm_vcpu_mtrr_init(vcpu);
11335         vcpu_load(vcpu);
11336         kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11337         kvm_vcpu_reset(vcpu, false);
11338         kvm_init_mmu(vcpu);
11339         vcpu_put(vcpu);
11340         return 0;
11341
11342 free_guest_fpu:
11343         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11344 free_emulate_ctxt:
11345         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11346 free_wbinvd_dirty_mask:
11347         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11348 fail_free_mce_banks:
11349         kfree(vcpu->arch.mce_banks);
11350 fail_free_pio_data:
11351         free_page((unsigned long)vcpu->arch.pio_data);
11352 fail_free_lapic:
11353         kvm_free_lapic(vcpu);
11354 fail_mmu_destroy:
11355         kvm_mmu_destroy(vcpu);
11356         return r;
11357 }
11358
11359 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11360 {
11361         struct kvm *kvm = vcpu->kvm;
11362
11363         if (mutex_lock_killable(&vcpu->mutex))
11364                 return;
11365         vcpu_load(vcpu);
11366         kvm_synchronize_tsc(vcpu, 0);
11367         vcpu_put(vcpu);
11368
11369         /* poll control enabled by default */
11370         vcpu->arch.msr_kvm_poll_control = 1;
11371
11372         mutex_unlock(&vcpu->mutex);
11373
11374         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11375                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11376                                                 KVMCLOCK_SYNC_PERIOD);
11377 }
11378
11379 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11380 {
11381         int idx;
11382
11383         kvmclock_reset(vcpu);
11384
11385         static_call(kvm_x86_vcpu_free)(vcpu);
11386
11387         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11388         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11389         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11390
11391         kvm_xen_destroy_vcpu(vcpu);
11392         kvm_hv_vcpu_uninit(vcpu);
11393         kvm_pmu_destroy(vcpu);
11394         kfree(vcpu->arch.mce_banks);
11395         kvm_free_lapic(vcpu);
11396         idx = srcu_read_lock(&vcpu->kvm->srcu);
11397         kvm_mmu_destroy(vcpu);
11398         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11399         free_page((unsigned long)vcpu->arch.pio_data);
11400         kvfree(vcpu->arch.cpuid_entries);
11401         if (!lapic_in_kernel(vcpu))
11402                 static_branch_dec(&kvm_has_noapic_vcpu);
11403 }
11404
11405 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11406 {
11407         struct kvm_cpuid_entry2 *cpuid_0x1;
11408         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11409         unsigned long new_cr0;
11410
11411         /*
11412          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11413          * to handle side effects.  RESET emulation hits those flows and relies
11414          * on emulated/virtualized registers, including those that are loaded
11415          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11416          * to detect improper or missing initialization.
11417          */
11418         WARN_ON_ONCE(!init_event &&
11419                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11420
11421         kvm_lapic_reset(vcpu, init_event);
11422
11423         vcpu->arch.hflags = 0;
11424
11425         vcpu->arch.smi_pending = 0;
11426         vcpu->arch.smi_count = 0;
11427         atomic_set(&vcpu->arch.nmi_queued, 0);
11428         vcpu->arch.nmi_pending = 0;
11429         vcpu->arch.nmi_injected = false;
11430         kvm_clear_interrupt_queue(vcpu);
11431         kvm_clear_exception_queue(vcpu);
11432
11433         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11434         kvm_update_dr0123(vcpu);
11435         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11436         vcpu->arch.dr7 = DR7_FIXED_1;
11437         kvm_update_dr7(vcpu);
11438
11439         vcpu->arch.cr2 = 0;
11440
11441         kvm_make_request(KVM_REQ_EVENT, vcpu);
11442         vcpu->arch.apf.msr_en_val = 0;
11443         vcpu->arch.apf.msr_int_val = 0;
11444         vcpu->arch.st.msr_val = 0;
11445
11446         kvmclock_reset(vcpu);
11447
11448         kvm_clear_async_pf_completion_queue(vcpu);
11449         kvm_async_pf_hash_reset(vcpu);
11450         vcpu->arch.apf.halted = false;
11451
11452         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11453                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11454
11455                 /*
11456                  * To avoid have the INIT path from kvm_apic_has_events() that be
11457                  * called with loaded FPU and does not let userspace fix the state.
11458                  */
11459                 if (init_event)
11460                         kvm_put_guest_fpu(vcpu);
11461
11462                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11463                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11464
11465                 if (init_event)
11466                         kvm_load_guest_fpu(vcpu);
11467         }
11468
11469         if (!init_event) {
11470                 kvm_pmu_reset(vcpu);
11471                 vcpu->arch.smbase = 0x30000;
11472
11473                 vcpu->arch.msr_misc_features_enables = 0;
11474
11475                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11476                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11477         }
11478
11479         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11480         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11481         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11482
11483         /*
11484          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11485          * if no CPUID match is found.  Note, it's impossible to get a match at
11486          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11487          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11488          * on RESET.  But, go through the motions in case that's ever remedied.
11489          */
11490         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11491         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11492
11493         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11494
11495         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11496         kvm_rip_write(vcpu, 0xfff0);
11497
11498         vcpu->arch.cr3 = 0;
11499         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11500
11501         /*
11502          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11503          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11504          * (or qualify) that with a footnote stating that CD/NW are preserved.
11505          */
11506         new_cr0 = X86_CR0_ET;
11507         if (init_event)
11508                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11509         else
11510                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11511
11512         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11513         static_call(kvm_x86_set_cr4)(vcpu, 0);
11514         static_call(kvm_x86_set_efer)(vcpu, 0);
11515         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11516
11517         /*
11518          * On the standard CR0/CR4/EFER modification paths, there are several
11519          * complex conditions determining whether the MMU has to be reset and/or
11520          * which PCIDs have to be flushed.  However, CR0.WP and the paging-related
11521          * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11522          * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11523          * CR0 will be '0' prior to RESET).  So we only need to check CR0.PG here.
11524          */
11525         if (old_cr0 & X86_CR0_PG) {
11526                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11527                 kvm_mmu_reset_context(vcpu);
11528         }
11529
11530         /*
11531          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11532          * APM states the TLBs are untouched by INIT, but it also states that
11533          * the TLBs are flushed on "External initialization of the processor."
11534          * Flush the guest TLB regardless of vendor, there is no meaningful
11535          * benefit in relying on the guest to flush the TLB immediately after
11536          * INIT.  A spurious TLB flush is benign and likely negligible from a
11537          * performance perspective.
11538          */
11539         if (init_event)
11540                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11541 }
11542 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11543
11544 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11545 {
11546         struct kvm_segment cs;
11547
11548         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11549         cs.selector = vector << 8;
11550         cs.base = vector << 12;
11551         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11552         kvm_rip_write(vcpu, 0);
11553 }
11554 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11555
11556 int kvm_arch_hardware_enable(void)
11557 {
11558         struct kvm *kvm;
11559         struct kvm_vcpu *vcpu;
11560         unsigned long i;
11561         int ret;
11562         u64 local_tsc;
11563         u64 max_tsc = 0;
11564         bool stable, backwards_tsc = false;
11565
11566         kvm_user_return_msr_cpu_online();
11567         ret = static_call(kvm_x86_hardware_enable)();
11568         if (ret != 0)
11569                 return ret;
11570
11571         local_tsc = rdtsc();
11572         stable = !kvm_check_tsc_unstable();
11573         list_for_each_entry(kvm, &vm_list, vm_list) {
11574                 kvm_for_each_vcpu(i, vcpu, kvm) {
11575                         if (!stable && vcpu->cpu == smp_processor_id())
11576                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11577                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11578                                 backwards_tsc = true;
11579                                 if (vcpu->arch.last_host_tsc > max_tsc)
11580                                         max_tsc = vcpu->arch.last_host_tsc;
11581                         }
11582                 }
11583         }
11584
11585         /*
11586          * Sometimes, even reliable TSCs go backwards.  This happens on
11587          * platforms that reset TSC during suspend or hibernate actions, but
11588          * maintain synchronization.  We must compensate.  Fortunately, we can
11589          * detect that condition here, which happens early in CPU bringup,
11590          * before any KVM threads can be running.  Unfortunately, we can't
11591          * bring the TSCs fully up to date with real time, as we aren't yet far
11592          * enough into CPU bringup that we know how much real time has actually
11593          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11594          * variables that haven't been updated yet.
11595          *
11596          * So we simply find the maximum observed TSC above, then record the
11597          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11598          * the adjustment will be applied.  Note that we accumulate
11599          * adjustments, in case multiple suspend cycles happen before some VCPU
11600          * gets a chance to run again.  In the event that no KVM threads get a
11601          * chance to run, we will miss the entire elapsed period, as we'll have
11602          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11603          * loose cycle time.  This isn't too big a deal, since the loss will be
11604          * uniform across all VCPUs (not to mention the scenario is extremely
11605          * unlikely). It is possible that a second hibernate recovery happens
11606          * much faster than a first, causing the observed TSC here to be
11607          * smaller; this would require additional padding adjustment, which is
11608          * why we set last_host_tsc to the local tsc observed here.
11609          *
11610          * N.B. - this code below runs only on platforms with reliable TSC,
11611          * as that is the only way backwards_tsc is set above.  Also note
11612          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11613          * have the same delta_cyc adjustment applied if backwards_tsc
11614          * is detected.  Note further, this adjustment is only done once,
11615          * as we reset last_host_tsc on all VCPUs to stop this from being
11616          * called multiple times (one for each physical CPU bringup).
11617          *
11618          * Platforms with unreliable TSCs don't have to deal with this, they
11619          * will be compensated by the logic in vcpu_load, which sets the TSC to
11620          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11621          * guarantee that they stay in perfect synchronization.
11622          */
11623         if (backwards_tsc) {
11624                 u64 delta_cyc = max_tsc - local_tsc;
11625                 list_for_each_entry(kvm, &vm_list, vm_list) {
11626                         kvm->arch.backwards_tsc_observed = true;
11627                         kvm_for_each_vcpu(i, vcpu, kvm) {
11628                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11629                                 vcpu->arch.last_host_tsc = local_tsc;
11630                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11631                         }
11632
11633                         /*
11634                          * We have to disable TSC offset matching.. if you were
11635                          * booting a VM while issuing an S4 host suspend....
11636                          * you may have some problem.  Solving this issue is
11637                          * left as an exercise to the reader.
11638                          */
11639                         kvm->arch.last_tsc_nsec = 0;
11640                         kvm->arch.last_tsc_write = 0;
11641                 }
11642
11643         }
11644         return 0;
11645 }
11646
11647 void kvm_arch_hardware_disable(void)
11648 {
11649         static_call(kvm_x86_hardware_disable)();
11650         drop_user_return_notifiers();
11651 }
11652
11653 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
11654 {
11655         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11656
11657 #define __KVM_X86_OP(func) \
11658         static_call_update(kvm_x86_##func, kvm_x86_ops.func);
11659 #define KVM_X86_OP(func) \
11660         WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
11661 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
11662 #define KVM_X86_OP_OPTIONAL_RET0(func) \
11663         static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
11664                                            (void *)__static_call_return0);
11665 #include <asm/kvm-x86-ops.h>
11666 #undef __KVM_X86_OP
11667
11668         kvm_pmu_ops_update(ops->pmu_ops);
11669 }
11670
11671 int kvm_arch_hardware_setup(void *opaque)
11672 {
11673         struct kvm_x86_init_ops *ops = opaque;
11674         int r;
11675
11676         rdmsrl_safe(MSR_EFER, &host_efer);
11677
11678         if (boot_cpu_has(X86_FEATURE_XSAVES))
11679                 rdmsrl(MSR_IA32_XSS, host_xss);
11680
11681         r = ops->hardware_setup();
11682         if (r != 0)
11683                 return r;
11684
11685         kvm_ops_update(ops);
11686
11687         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11688
11689         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11690                 supported_xss = 0;
11691
11692 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11693         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11694 #undef __kvm_cpu_cap_has
11695
11696         if (kvm_has_tsc_control) {
11697                 /*
11698                  * Make sure the user can only configure tsc_khz values that
11699                  * fit into a signed integer.
11700                  * A min value is not calculated because it will always
11701                  * be 1 on all machines.
11702                  */
11703                 u64 max = min(0x7fffffffULL,
11704                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11705                 kvm_max_guest_tsc_khz = max;
11706         }
11707         kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11708         kvm_init_msr_list();
11709         return 0;
11710 }
11711
11712 void kvm_arch_hardware_unsetup(void)
11713 {
11714         kvm_unregister_perf_callbacks();
11715
11716         static_call(kvm_x86_hardware_unsetup)();
11717 }
11718
11719 int kvm_arch_check_processor_compat(void *opaque)
11720 {
11721         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11722         struct kvm_x86_init_ops *ops = opaque;
11723
11724         WARN_ON(!irqs_disabled());
11725
11726         if (__cr4_reserved_bits(cpu_has, c) !=
11727             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11728                 return -EIO;
11729
11730         return ops->check_processor_compatibility();
11731 }
11732
11733 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11734 {
11735         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11736 }
11737 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11738
11739 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11740 {
11741         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11742 }
11743
11744 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11745 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11746
11747 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11748 {
11749         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11750
11751         vcpu->arch.l1tf_flush_l1d = true;
11752         if (pmu->version && unlikely(pmu->event_count)) {
11753                 pmu->need_cleanup = true;
11754                 kvm_make_request(KVM_REQ_PMU, vcpu);
11755         }
11756         static_call(kvm_x86_sched_in)(vcpu, cpu);
11757 }
11758
11759 void kvm_arch_free_vm(struct kvm *kvm)
11760 {
11761         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11762         __kvm_arch_free_vm(kvm);
11763 }
11764
11765
11766 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11767 {
11768         int ret;
11769         unsigned long flags;
11770
11771         if (type)
11772                 return -EINVAL;
11773
11774         ret = kvm_page_track_init(kvm);
11775         if (ret)
11776                 goto out;
11777
11778         ret = kvm_mmu_init_vm(kvm);
11779         if (ret)
11780                 goto out_page_track;
11781
11782         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11783         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11784         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11785
11786         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11787         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11788         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11789         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11790                 &kvm->arch.irq_sources_bitmap);
11791
11792         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11793         mutex_init(&kvm->arch.apic_map_lock);
11794         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11795         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11796
11797         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11798         pvclock_update_vm_gtod_copy(kvm);
11799         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11800
11801         kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
11802         kvm->arch.guest_can_read_msr_platform_info = true;
11803         kvm->arch.enable_pmu = enable_pmu;
11804
11805 #if IS_ENABLED(CONFIG_HYPERV)
11806         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11807         kvm->arch.hv_root_tdp = INVALID_PAGE;
11808 #endif
11809
11810         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11811         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11812
11813         kvm_apicv_init(kvm);
11814         kvm_hv_init_vm(kvm);
11815         kvm_xen_init_vm(kvm);
11816
11817         return static_call(kvm_x86_vm_init)(kvm);
11818
11819 out_page_track:
11820         kvm_page_track_cleanup(kvm);
11821 out:
11822         return ret;
11823 }
11824
11825 int kvm_arch_post_init_vm(struct kvm *kvm)
11826 {
11827         return kvm_mmu_post_init_vm(kvm);
11828 }
11829
11830 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11831 {
11832         vcpu_load(vcpu);
11833         kvm_mmu_unload(vcpu);
11834         vcpu_put(vcpu);
11835 }
11836
11837 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
11838 {
11839         unsigned long i;
11840         struct kvm_vcpu *vcpu;
11841
11842         kvm_for_each_vcpu(i, vcpu, kvm) {
11843                 kvm_clear_async_pf_completion_queue(vcpu);
11844                 kvm_unload_vcpu_mmu(vcpu);
11845         }
11846 }
11847
11848 void kvm_arch_sync_events(struct kvm *kvm)
11849 {
11850         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11851         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11852         kvm_free_pit(kvm);
11853 }
11854
11855 /**
11856  * __x86_set_memory_region: Setup KVM internal memory slot
11857  *
11858  * @kvm: the kvm pointer to the VM.
11859  * @id: the slot ID to setup.
11860  * @gpa: the GPA to install the slot (unused when @size == 0).
11861  * @size: the size of the slot. Set to zero to uninstall a slot.
11862  *
11863  * This function helps to setup a KVM internal memory slot.  Specify
11864  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11865  * slot.  The return code can be one of the following:
11866  *
11867  *   HVA:           on success (uninstall will return a bogus HVA)
11868  *   -errno:        on error
11869  *
11870  * The caller should always use IS_ERR() to check the return value
11871  * before use.  Note, the KVM internal memory slots are guaranteed to
11872  * remain valid and unchanged until the VM is destroyed, i.e., the
11873  * GPA->HVA translation will not change.  However, the HVA is a user
11874  * address, i.e. its accessibility is not guaranteed, and must be
11875  * accessed via __copy_{to,from}_user().
11876  */
11877 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11878                                       u32 size)
11879 {
11880         int i, r;
11881         unsigned long hva, old_npages;
11882         struct kvm_memslots *slots = kvm_memslots(kvm);
11883         struct kvm_memory_slot *slot;
11884
11885         /* Called with kvm->slots_lock held.  */
11886         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11887                 return ERR_PTR_USR(-EINVAL);
11888
11889         slot = id_to_memslot(slots, id);
11890         if (size) {
11891                 if (slot && slot->npages)
11892                         return ERR_PTR_USR(-EEXIST);
11893
11894                 /*
11895                  * MAP_SHARED to prevent internal slot pages from being moved
11896                  * by fork()/COW.
11897                  */
11898                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11899                               MAP_SHARED | MAP_ANONYMOUS, 0);
11900                 if (IS_ERR((void *)hva))
11901                         return (void __user *)hva;
11902         } else {
11903                 if (!slot || !slot->npages)
11904                         return NULL;
11905
11906                 old_npages = slot->npages;
11907                 hva = slot->userspace_addr;
11908         }
11909
11910         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11911                 struct kvm_userspace_memory_region m;
11912
11913                 m.slot = id | (i << 16);
11914                 m.flags = 0;
11915                 m.guest_phys_addr = gpa;
11916                 m.userspace_addr = hva;
11917                 m.memory_size = size;
11918                 r = __kvm_set_memory_region(kvm, &m);
11919                 if (r < 0)
11920                         return ERR_PTR_USR(r);
11921         }
11922
11923         if (!size)
11924                 vm_munmap(hva, old_npages * PAGE_SIZE);
11925
11926         return (void __user *)hva;
11927 }
11928 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11929
11930 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11931 {
11932         kvm_mmu_pre_destroy_vm(kvm);
11933 }
11934
11935 void kvm_arch_destroy_vm(struct kvm *kvm)
11936 {
11937         if (current->mm == kvm->mm) {
11938                 /*
11939                  * Free memory regions allocated on behalf of userspace,
11940                  * unless the memory map has changed due to process exit
11941                  * or fd copying.
11942                  */
11943                 mutex_lock(&kvm->slots_lock);
11944                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11945                                         0, 0);
11946                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11947                                         0, 0);
11948                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11949                 mutex_unlock(&kvm->slots_lock);
11950         }
11951         kvm_unload_vcpu_mmus(kvm);
11952         static_call_cond(kvm_x86_vm_destroy)(kvm);
11953         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11954         kvm_pic_destroy(kvm);
11955         kvm_ioapic_destroy(kvm);
11956         kvm_destroy_vcpus(kvm);
11957         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11958         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11959         kvm_mmu_uninit_vm(kvm);
11960         kvm_page_track_cleanup(kvm);
11961         kvm_xen_destroy_vm(kvm);
11962         kvm_hv_destroy_vm(kvm);
11963 }
11964
11965 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11966 {
11967         int i;
11968
11969         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11970                 kvfree(slot->arch.rmap[i]);
11971                 slot->arch.rmap[i] = NULL;
11972         }
11973 }
11974
11975 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11976 {
11977         int i;
11978
11979         memslot_rmap_free(slot);
11980
11981         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11982                 kvfree(slot->arch.lpage_info[i - 1]);
11983                 slot->arch.lpage_info[i - 1] = NULL;
11984         }
11985
11986         kvm_page_track_free_memslot(slot);
11987 }
11988
11989 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11990 {
11991         const int sz = sizeof(*slot->arch.rmap[0]);
11992         int i;
11993
11994         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11995                 int level = i + 1;
11996                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11997
11998                 if (slot->arch.rmap[i])
11999                         continue;
12000
12001                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12002                 if (!slot->arch.rmap[i]) {
12003                         memslot_rmap_free(slot);
12004                         return -ENOMEM;
12005                 }
12006         }
12007
12008         return 0;
12009 }
12010
12011 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12012                                       struct kvm_memory_slot *slot)
12013 {
12014         unsigned long npages = slot->npages;
12015         int i, r;
12016
12017         /*
12018          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
12019          * old arrays will be freed by __kvm_set_memory_region() if installing
12020          * the new memslot is successful.
12021          */
12022         memset(&slot->arch, 0, sizeof(slot->arch));
12023
12024         if (kvm_memslots_have_rmaps(kvm)) {
12025                 r = memslot_rmap_alloc(slot, npages);
12026                 if (r)
12027                         return r;
12028         }
12029
12030         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12031                 struct kvm_lpage_info *linfo;
12032                 unsigned long ugfn;
12033                 int lpages;
12034                 int level = i + 1;
12035
12036                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12037
12038                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12039                 if (!linfo)
12040                         goto out_free;
12041
12042                 slot->arch.lpage_info[i - 1] = linfo;
12043
12044                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12045                         linfo[0].disallow_lpage = 1;
12046                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12047                         linfo[lpages - 1].disallow_lpage = 1;
12048                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12049                 /*
12050                  * If the gfn and userspace address are not aligned wrt each
12051                  * other, disable large page support for this slot.
12052                  */
12053                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12054                         unsigned long j;
12055
12056                         for (j = 0; j < lpages; ++j)
12057                                 linfo[j].disallow_lpage = 1;
12058                 }
12059         }
12060
12061         if (kvm_page_track_create_memslot(kvm, slot, npages))
12062                 goto out_free;
12063
12064         return 0;
12065
12066 out_free:
12067         memslot_rmap_free(slot);
12068
12069         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12070                 kvfree(slot->arch.lpage_info[i - 1]);
12071                 slot->arch.lpage_info[i - 1] = NULL;
12072         }
12073         return -ENOMEM;
12074 }
12075
12076 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12077 {
12078         struct kvm_vcpu *vcpu;
12079         unsigned long i;
12080
12081         /*
12082          * memslots->generation has been incremented.
12083          * mmio generation may have reached its maximum value.
12084          */
12085         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12086
12087         /* Force re-initialization of steal_time cache */
12088         kvm_for_each_vcpu(i, vcpu, kvm)
12089                 kvm_vcpu_kick(vcpu);
12090 }
12091
12092 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12093                                    const struct kvm_memory_slot *old,
12094                                    struct kvm_memory_slot *new,
12095                                    enum kvm_mr_change change)
12096 {
12097         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12098                 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12099                         return -EINVAL;
12100
12101                 return kvm_alloc_memslot_metadata(kvm, new);
12102         }
12103
12104         if (change == KVM_MR_FLAGS_ONLY)
12105                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12106         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12107                 return -EIO;
12108
12109         return 0;
12110 }
12111
12112
12113 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12114 {
12115         struct kvm_arch *ka = &kvm->arch;
12116
12117         if (!kvm_x86_ops.cpu_dirty_log_size)
12118                 return;
12119
12120         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12121             (!enable && --ka->cpu_dirty_logging_count == 0))
12122                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12123
12124         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12125 }
12126
12127 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12128                                      struct kvm_memory_slot *old,
12129                                      const struct kvm_memory_slot *new,
12130                                      enum kvm_mr_change change)
12131 {
12132         u32 old_flags = old ? old->flags : 0;
12133         u32 new_flags = new ? new->flags : 0;
12134         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12135
12136         /*
12137          * Update CPU dirty logging if dirty logging is being toggled.  This
12138          * applies to all operations.
12139          */
12140         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12141                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12142
12143         /*
12144          * Nothing more to do for RO slots (which can't be dirtied and can't be
12145          * made writable) or CREATE/MOVE/DELETE of a slot.
12146          *
12147          * For a memslot with dirty logging disabled:
12148          * CREATE:      No dirty mappings will already exist.
12149          * MOVE/DELETE: The old mappings will already have been cleaned up by
12150          *              kvm_arch_flush_shadow_memslot()
12151          *
12152          * For a memslot with dirty logging enabled:
12153          * CREATE:      No shadow pages exist, thus nothing to write-protect
12154          *              and no dirty bits to clear.
12155          * MOVE/DELETE: The old mappings will already have been cleaned up by
12156          *              kvm_arch_flush_shadow_memslot().
12157          */
12158         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12159                 return;
12160
12161         /*
12162          * READONLY and non-flags changes were filtered out above, and the only
12163          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12164          * logging isn't being toggled on or off.
12165          */
12166         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12167                 return;
12168
12169         if (!log_dirty_pages) {
12170                 /*
12171                  * Dirty logging tracks sptes in 4k granularity, meaning that
12172                  * large sptes have to be split.  If live migration succeeds,
12173                  * the guest in the source machine will be destroyed and large
12174                  * sptes will be created in the destination.  However, if the
12175                  * guest continues to run in the source machine (for example if
12176                  * live migration fails), small sptes will remain around and
12177                  * cause bad performance.
12178                  *
12179                  * Scan sptes if dirty logging has been stopped, dropping those
12180                  * which can be collapsed into a single large-page spte.  Later
12181                  * page faults will create the large-page sptes.
12182                  */
12183                 kvm_mmu_zap_collapsible_sptes(kvm, new);
12184         } else {
12185                 /*
12186                  * Initially-all-set does not require write protecting any page,
12187                  * because they're all assumed to be dirty.
12188                  */
12189                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12190                         return;
12191
12192                 if (READ_ONCE(eager_page_split))
12193                         kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12194
12195                 if (kvm_x86_ops.cpu_dirty_log_size) {
12196                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12197                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12198                 } else {
12199                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12200                 }
12201         }
12202 }
12203
12204 void kvm_arch_commit_memory_region(struct kvm *kvm,
12205                                 struct kvm_memory_slot *old,
12206                                 const struct kvm_memory_slot *new,
12207                                 enum kvm_mr_change change)
12208 {
12209         if (!kvm->arch.n_requested_mmu_pages &&
12210             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12211                 unsigned long nr_mmu_pages;
12212
12213                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12214                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12215                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12216         }
12217
12218         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12219
12220         /* Free the arrays associated with the old memslot. */
12221         if (change == KVM_MR_MOVE)
12222                 kvm_arch_free_memslot(kvm, old);
12223 }
12224
12225 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12226 {
12227         kvm_mmu_zap_all(kvm);
12228 }
12229
12230 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12231                                    struct kvm_memory_slot *slot)
12232 {
12233         kvm_page_track_flush_slot(kvm, slot);
12234 }
12235
12236 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12237 {
12238         return (is_guest_mode(vcpu) &&
12239                 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12240 }
12241
12242 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12243 {
12244         if (!list_empty_careful(&vcpu->async_pf.done))
12245                 return true;
12246
12247         if (kvm_apic_has_events(vcpu))
12248                 return true;
12249
12250         if (vcpu->arch.pv.pv_unhalted)
12251                 return true;
12252
12253         if (vcpu->arch.exception.pending)
12254                 return true;
12255
12256         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12257             (vcpu->arch.nmi_pending &&
12258              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12259                 return true;
12260
12261         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12262             (vcpu->arch.smi_pending &&
12263              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12264                 return true;
12265
12266         if (kvm_arch_interrupt_allowed(vcpu) &&
12267             (kvm_cpu_has_interrupt(vcpu) ||
12268             kvm_guest_apic_has_interrupt(vcpu)))
12269                 return true;
12270
12271         if (kvm_hv_has_stimer_pending(vcpu))
12272                 return true;
12273
12274         if (is_guest_mode(vcpu) &&
12275             kvm_x86_ops.nested_ops->hv_timer_pending &&
12276             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12277                 return true;
12278
12279         if (kvm_xen_has_pending_events(vcpu))
12280                 return true;
12281
12282         if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu))
12283                 return true;
12284
12285         return false;
12286 }
12287
12288 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12289 {
12290         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12291 }
12292
12293 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12294 {
12295         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12296                 return true;
12297
12298         return false;
12299 }
12300
12301 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12302 {
12303         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12304                 return true;
12305
12306         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12307                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12308                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12309                 return true;
12310
12311         return kvm_arch_dy_has_pending_interrupt(vcpu);
12312 }
12313
12314 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12315 {
12316         if (vcpu->arch.guest_state_protected)
12317                 return true;
12318
12319         return vcpu->arch.preempted_in_kernel;
12320 }
12321
12322 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12323 {
12324         return kvm_rip_read(vcpu);
12325 }
12326
12327 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12328 {
12329         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12330 }
12331
12332 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12333 {
12334         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12335 }
12336
12337 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12338 {
12339         /* Can't read the RIP when guest state is protected, just return 0 */
12340         if (vcpu->arch.guest_state_protected)
12341                 return 0;
12342
12343         if (is_64_bit_mode(vcpu))
12344                 return kvm_rip_read(vcpu);
12345         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12346                      kvm_rip_read(vcpu));
12347 }
12348 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12349
12350 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12351 {
12352         return kvm_get_linear_rip(vcpu) == linear_rip;
12353 }
12354 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12355
12356 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12357 {
12358         unsigned long rflags;
12359
12360         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12361         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12362                 rflags &= ~X86_EFLAGS_TF;
12363         return rflags;
12364 }
12365 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12366
12367 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12368 {
12369         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12370             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12371                 rflags |= X86_EFLAGS_TF;
12372         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12373 }
12374
12375 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12376 {
12377         __kvm_set_rflags(vcpu, rflags);
12378         kvm_make_request(KVM_REQ_EVENT, vcpu);
12379 }
12380 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12381
12382 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12383 {
12384         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12385
12386         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12387 }
12388
12389 static inline u32 kvm_async_pf_next_probe(u32 key)
12390 {
12391         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12392 }
12393
12394 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12395 {
12396         u32 key = kvm_async_pf_hash_fn(gfn);
12397
12398         while (vcpu->arch.apf.gfns[key] != ~0)
12399                 key = kvm_async_pf_next_probe(key);
12400
12401         vcpu->arch.apf.gfns[key] = gfn;
12402 }
12403
12404 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12405 {
12406         int i;
12407         u32 key = kvm_async_pf_hash_fn(gfn);
12408
12409         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12410                      (vcpu->arch.apf.gfns[key] != gfn &&
12411                       vcpu->arch.apf.gfns[key] != ~0); i++)
12412                 key = kvm_async_pf_next_probe(key);
12413
12414         return key;
12415 }
12416
12417 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12418 {
12419         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12420 }
12421
12422 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12423 {
12424         u32 i, j, k;
12425
12426         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12427
12428         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12429                 return;
12430
12431         while (true) {
12432                 vcpu->arch.apf.gfns[i] = ~0;
12433                 do {
12434                         j = kvm_async_pf_next_probe(j);
12435                         if (vcpu->arch.apf.gfns[j] == ~0)
12436                                 return;
12437                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12438                         /*
12439                          * k lies cyclically in ]i,j]
12440                          * |    i.k.j |
12441                          * |....j i.k.| or  |.k..j i...|
12442                          */
12443                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12444                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12445                 i = j;
12446         }
12447 }
12448
12449 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12450 {
12451         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12452
12453         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12454                                       sizeof(reason));
12455 }
12456
12457 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12458 {
12459         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12460
12461         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12462                                              &token, offset, sizeof(token));
12463 }
12464
12465 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12466 {
12467         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12468         u32 val;
12469
12470         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12471                                          &val, offset, sizeof(val)))
12472                 return false;
12473
12474         return !val;
12475 }
12476
12477 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12478 {
12479
12480         if (!kvm_pv_async_pf_enabled(vcpu))
12481                 return false;
12482
12483         if (vcpu->arch.apf.send_user_only &&
12484             static_call(kvm_x86_get_cpl)(vcpu) == 0)
12485                 return false;
12486
12487         if (is_guest_mode(vcpu)) {
12488                 /*
12489                  * L1 needs to opt into the special #PF vmexits that are
12490                  * used to deliver async page faults.
12491                  */
12492                 return vcpu->arch.apf.delivery_as_pf_vmexit;
12493         } else {
12494                 /*
12495                  * Play it safe in case the guest temporarily disables paging.
12496                  * The real mode IDT in particular is unlikely to have a #PF
12497                  * exception setup.
12498                  */
12499                 return is_paging(vcpu);
12500         }
12501 }
12502
12503 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12504 {
12505         if (unlikely(!lapic_in_kernel(vcpu) ||
12506                      kvm_event_needs_reinjection(vcpu) ||
12507                      vcpu->arch.exception.pending))
12508                 return false;
12509
12510         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12511                 return false;
12512
12513         /*
12514          * If interrupts are off we cannot even use an artificial
12515          * halt state.
12516          */
12517         return kvm_arch_interrupt_allowed(vcpu);
12518 }
12519
12520 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12521                                      struct kvm_async_pf *work)
12522 {
12523         struct x86_exception fault;
12524
12525         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12526         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12527
12528         if (kvm_can_deliver_async_pf(vcpu) &&
12529             !apf_put_user_notpresent(vcpu)) {
12530                 fault.vector = PF_VECTOR;
12531                 fault.error_code_valid = true;
12532                 fault.error_code = 0;
12533                 fault.nested_page_fault = false;
12534                 fault.address = work->arch.token;
12535                 fault.async_page_fault = true;
12536                 kvm_inject_page_fault(vcpu, &fault);
12537                 return true;
12538         } else {
12539                 /*
12540                  * It is not possible to deliver a paravirtualized asynchronous
12541                  * page fault, but putting the guest in an artificial halt state
12542                  * can be beneficial nevertheless: if an interrupt arrives, we
12543                  * can deliver it timely and perhaps the guest will schedule
12544                  * another process.  When the instruction that triggered a page
12545                  * fault is retried, hopefully the page will be ready in the host.
12546                  */
12547                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12548                 return false;
12549         }
12550 }
12551
12552 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12553                                  struct kvm_async_pf *work)
12554 {
12555         struct kvm_lapic_irq irq = {
12556                 .delivery_mode = APIC_DM_FIXED,
12557                 .vector = vcpu->arch.apf.vec
12558         };
12559
12560         if (work->wakeup_all)
12561                 work->arch.token = ~0; /* broadcast wakeup */
12562         else
12563                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12564         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12565
12566         if ((work->wakeup_all || work->notpresent_injected) &&
12567             kvm_pv_async_pf_enabled(vcpu) &&
12568             !apf_put_user_ready(vcpu, work->arch.token)) {
12569                 vcpu->arch.apf.pageready_pending = true;
12570                 kvm_apic_set_irq(vcpu, &irq, NULL);
12571         }
12572
12573         vcpu->arch.apf.halted = false;
12574         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12575 }
12576
12577 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12578 {
12579         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12580         if (!vcpu->arch.apf.pageready_pending)
12581                 kvm_vcpu_kick(vcpu);
12582 }
12583
12584 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12585 {
12586         if (!kvm_pv_async_pf_enabled(vcpu))
12587                 return true;
12588         else
12589                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12590 }
12591
12592 void kvm_arch_start_assignment(struct kvm *kvm)
12593 {
12594         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12595                 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12596 }
12597 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12598
12599 void kvm_arch_end_assignment(struct kvm *kvm)
12600 {
12601         atomic_dec(&kvm->arch.assigned_device_count);
12602 }
12603 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12604
12605 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12606 {
12607         return atomic_read(&kvm->arch.assigned_device_count);
12608 }
12609 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12610
12611 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12612 {
12613         atomic_inc(&kvm->arch.noncoherent_dma_count);
12614 }
12615 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12616
12617 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12618 {
12619         atomic_dec(&kvm->arch.noncoherent_dma_count);
12620 }
12621 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12622
12623 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12624 {
12625         return atomic_read(&kvm->arch.noncoherent_dma_count);
12626 }
12627 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12628
12629 bool kvm_arch_has_irq_bypass(void)
12630 {
12631         return true;
12632 }
12633
12634 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12635                                       struct irq_bypass_producer *prod)
12636 {
12637         struct kvm_kernel_irqfd *irqfd =
12638                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12639         int ret;
12640
12641         irqfd->producer = prod;
12642         kvm_arch_start_assignment(irqfd->kvm);
12643         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12644                                          prod->irq, irqfd->gsi, 1);
12645
12646         if (ret)
12647                 kvm_arch_end_assignment(irqfd->kvm);
12648
12649         return ret;
12650 }
12651
12652 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12653                                       struct irq_bypass_producer *prod)
12654 {
12655         int ret;
12656         struct kvm_kernel_irqfd *irqfd =
12657                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12658
12659         WARN_ON(irqfd->producer != prod);
12660         irqfd->producer = NULL;
12661
12662         /*
12663          * When producer of consumer is unregistered, we change back to
12664          * remapped mode, so we can re-use the current implementation
12665          * when the irq is masked/disabled or the consumer side (KVM
12666          * int this case doesn't want to receive the interrupts.
12667         */
12668         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12669         if (ret)
12670                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12671                        " fails: %d\n", irqfd->consumer.token, ret);
12672
12673         kvm_arch_end_assignment(irqfd->kvm);
12674 }
12675
12676 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12677                                    uint32_t guest_irq, bool set)
12678 {
12679         return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12680 }
12681
12682 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12683                                   struct kvm_kernel_irq_routing_entry *new)
12684 {
12685         if (new->type != KVM_IRQ_ROUTING_MSI)
12686                 return true;
12687
12688         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12689 }
12690
12691 bool kvm_vector_hashing_enabled(void)
12692 {
12693         return vector_hashing;
12694 }
12695
12696 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12697 {
12698         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12699 }
12700 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12701
12702
12703 int kvm_spec_ctrl_test_value(u64 value)
12704 {
12705         /*
12706          * test that setting IA32_SPEC_CTRL to given value
12707          * is allowed by the host processor
12708          */
12709
12710         u64 saved_value;
12711         unsigned long flags;
12712         int ret = 0;
12713
12714         local_irq_save(flags);
12715
12716         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12717                 ret = 1;
12718         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12719                 ret = 1;
12720         else
12721                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12722
12723         local_irq_restore(flags);
12724
12725         return ret;
12726 }
12727 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12728
12729 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12730 {
12731         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12732         struct x86_exception fault;
12733         u64 access = error_code &
12734                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12735
12736         if (!(error_code & PFERR_PRESENT_MASK) ||
12737             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12738                 /*
12739                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12740                  * tables probably do not match the TLB.  Just proceed
12741                  * with the error code that the processor gave.
12742                  */
12743                 fault.vector = PF_VECTOR;
12744                 fault.error_code_valid = true;
12745                 fault.error_code = error_code;
12746                 fault.nested_page_fault = false;
12747                 fault.address = gva;
12748         }
12749         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12750 }
12751 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12752
12753 /*
12754  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12755  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12756  * indicates whether exit to userspace is needed.
12757  */
12758 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12759                               struct x86_exception *e)
12760 {
12761         if (r == X86EMUL_PROPAGATE_FAULT) {
12762                 kvm_inject_emulated_page_fault(vcpu, e);
12763                 return 1;
12764         }
12765
12766         /*
12767          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12768          * while handling a VMX instruction KVM could've handled the request
12769          * correctly by exiting to userspace and performing I/O but there
12770          * doesn't seem to be a real use-case behind such requests, just return
12771          * KVM_EXIT_INTERNAL_ERROR for now.
12772          */
12773         kvm_prepare_emulation_failure_exit(vcpu);
12774
12775         return 0;
12776 }
12777 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12778
12779 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12780 {
12781         bool pcid_enabled;
12782         struct x86_exception e;
12783         struct {
12784                 u64 pcid;
12785                 u64 gla;
12786         } operand;
12787         int r;
12788
12789         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12790         if (r != X86EMUL_CONTINUE)
12791                 return kvm_handle_memory_failure(vcpu, r, &e);
12792
12793         if (operand.pcid >> 12 != 0) {
12794                 kvm_inject_gp(vcpu, 0);
12795                 return 1;
12796         }
12797
12798         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12799
12800         switch (type) {
12801         case INVPCID_TYPE_INDIV_ADDR:
12802                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12803                     is_noncanonical_address(operand.gla, vcpu)) {
12804                         kvm_inject_gp(vcpu, 0);
12805                         return 1;
12806                 }
12807                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12808                 return kvm_skip_emulated_instruction(vcpu);
12809
12810         case INVPCID_TYPE_SINGLE_CTXT:
12811                 if (!pcid_enabled && (operand.pcid != 0)) {
12812                         kvm_inject_gp(vcpu, 0);
12813                         return 1;
12814                 }
12815
12816                 kvm_invalidate_pcid(vcpu, operand.pcid);
12817                 return kvm_skip_emulated_instruction(vcpu);
12818
12819         case INVPCID_TYPE_ALL_NON_GLOBAL:
12820                 /*
12821                  * Currently, KVM doesn't mark global entries in the shadow
12822                  * page tables, so a non-global flush just degenerates to a
12823                  * global flush. If needed, we could optimize this later by
12824                  * keeping track of global entries in shadow page tables.
12825                  */
12826
12827                 fallthrough;
12828         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12829                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12830                 return kvm_skip_emulated_instruction(vcpu);
12831
12832         default:
12833                 kvm_inject_gp(vcpu, 0);
12834                 return 1;
12835         }
12836 }
12837 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12838
12839 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12840 {
12841         struct kvm_run *run = vcpu->run;
12842         struct kvm_mmio_fragment *frag;
12843         unsigned int len;
12844
12845         BUG_ON(!vcpu->mmio_needed);
12846
12847         /* Complete previous fragment */
12848         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12849         len = min(8u, frag->len);
12850         if (!vcpu->mmio_is_write)
12851                 memcpy(frag->data, run->mmio.data, len);
12852
12853         if (frag->len <= 8) {
12854                 /* Switch to the next fragment. */
12855                 frag++;
12856                 vcpu->mmio_cur_fragment++;
12857         } else {
12858                 /* Go forward to the next mmio piece. */
12859                 frag->data += len;
12860                 frag->gpa += len;
12861                 frag->len -= len;
12862         }
12863
12864         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12865                 vcpu->mmio_needed = 0;
12866
12867                 // VMG change, at this point, we're always done
12868                 // RIP has already been advanced
12869                 return 1;
12870         }
12871
12872         // More MMIO is needed
12873         run->mmio.phys_addr = frag->gpa;
12874         run->mmio.len = min(8u, frag->len);
12875         run->mmio.is_write = vcpu->mmio_is_write;
12876         if (run->mmio.is_write)
12877                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12878         run->exit_reason = KVM_EXIT_MMIO;
12879
12880         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12881
12882         return 0;
12883 }
12884
12885 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12886                           void *data)
12887 {
12888         int handled;
12889         struct kvm_mmio_fragment *frag;
12890
12891         if (!data)
12892                 return -EINVAL;
12893
12894         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12895         if (handled == bytes)
12896                 return 1;
12897
12898         bytes -= handled;
12899         gpa += handled;
12900         data += handled;
12901
12902         /*TODO: Check if need to increment number of frags */
12903         frag = vcpu->mmio_fragments;
12904         vcpu->mmio_nr_fragments = 1;
12905         frag->len = bytes;
12906         frag->gpa = gpa;
12907         frag->data = data;
12908
12909         vcpu->mmio_needed = 1;
12910         vcpu->mmio_cur_fragment = 0;
12911
12912         vcpu->run->mmio.phys_addr = gpa;
12913         vcpu->run->mmio.len = min(8u, frag->len);
12914         vcpu->run->mmio.is_write = 1;
12915         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12916         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12917
12918         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12919
12920         return 0;
12921 }
12922 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12923
12924 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12925                          void *data)
12926 {
12927         int handled;
12928         struct kvm_mmio_fragment *frag;
12929
12930         if (!data)
12931                 return -EINVAL;
12932
12933         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12934         if (handled == bytes)
12935                 return 1;
12936
12937         bytes -= handled;
12938         gpa += handled;
12939         data += handled;
12940
12941         /*TODO: Check if need to increment number of frags */
12942         frag = vcpu->mmio_fragments;
12943         vcpu->mmio_nr_fragments = 1;
12944         frag->len = bytes;
12945         frag->gpa = gpa;
12946         frag->data = data;
12947
12948         vcpu->mmio_needed = 1;
12949         vcpu->mmio_cur_fragment = 0;
12950
12951         vcpu->run->mmio.phys_addr = gpa;
12952         vcpu->run->mmio.len = min(8u, frag->len);
12953         vcpu->run->mmio.is_write = 0;
12954         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12955
12956         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12957
12958         return 0;
12959 }
12960 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12961
12962 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12963                            unsigned int port);
12964
12965 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12966 {
12967         int size = vcpu->arch.pio.size;
12968         int port = vcpu->arch.pio.port;
12969
12970         vcpu->arch.pio.count = 0;
12971         if (vcpu->arch.sev_pio_count)
12972                 return kvm_sev_es_outs(vcpu, size, port);
12973         return 1;
12974 }
12975
12976 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12977                            unsigned int port)
12978 {
12979         for (;;) {
12980                 unsigned int count =
12981                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12982                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12983
12984                 /* memcpy done already by emulator_pio_out.  */
12985                 vcpu->arch.sev_pio_count -= count;
12986                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12987                 if (!ret)
12988                         break;
12989
12990                 /* Emulation done by the kernel.  */
12991                 if (!vcpu->arch.sev_pio_count)
12992                         return 1;
12993         }
12994
12995         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12996         return 0;
12997 }
12998
12999 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13000                           unsigned int port);
13001
13002 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13003 {
13004         unsigned count = vcpu->arch.pio.count;
13005         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13006         vcpu->arch.sev_pio_count -= count;
13007         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
13008 }
13009
13010 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13011 {
13012         int size = vcpu->arch.pio.size;
13013         int port = vcpu->arch.pio.port;
13014
13015         advance_sev_es_emulated_ins(vcpu);
13016         if (vcpu->arch.sev_pio_count)
13017                 return kvm_sev_es_ins(vcpu, size, port);
13018         return 1;
13019 }
13020
13021 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13022                           unsigned int port)
13023 {
13024         for (;;) {
13025                 unsigned int count =
13026                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13027                 if (!__emulator_pio_in(vcpu, size, port, count))
13028                         break;
13029
13030                 /* Emulation done by the kernel.  */
13031                 advance_sev_es_emulated_ins(vcpu);
13032                 if (!vcpu->arch.sev_pio_count)
13033                         return 1;
13034         }
13035
13036         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13037         return 0;
13038 }
13039
13040 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13041                          unsigned int port, void *data,  unsigned int count,
13042                          int in)
13043 {
13044         vcpu->arch.sev_pio_data = data;
13045         vcpu->arch.sev_pio_count = count;
13046         return in ? kvm_sev_es_ins(vcpu, size, port)
13047                   : kvm_sev_es_outs(vcpu, size, port);
13048 }
13049 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13050
13051 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13052 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13053 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13054 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13055 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
13059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13064 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13065 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13066 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13067 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13068 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13069 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13070 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13071 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13072 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13073 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13074 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13075 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13079
13080 static int __init kvm_x86_init(void)
13081 {
13082         kvm_mmu_x86_module_init();
13083         return 0;
13084 }
13085 module_init(kvm_x86_init);
13086
13087 static void __exit kvm_x86_exit(void)
13088 {
13089         /*
13090          * If module_init() is implemented, module_exit() must also be
13091          * implemented to allow module unload.
13092          */
13093 }
13094 module_exit(kvm_x86_exit);