arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, pages_4k),
 237         STATS_DESC_ICOUNTER(VM, pages_2m),
 238         STATS_DESC_ICOUNTER(VM, pages_1g),
 239         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 240         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 241         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 242 };
 243
 244 const struct kvm_stats_header kvm_vm_stats_header = {
 245         .name_size = KVM_STATS_NAME_SIZE,
 246         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 247         .id_offset = sizeof(struct kvm_stats_header),
 248         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 249         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 250                        sizeof(kvm_vm_stats_desc),
 251 };
 252
 253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 254         KVM_GENERIC_VCPU_STATS(),
 255         STATS_DESC_COUNTER(VCPU, pf_fixed),
 256         STATS_DESC_COUNTER(VCPU, pf_guest),
 257         STATS_DESC_COUNTER(VCPU, tlb_flush),
 258         STATS_DESC_COUNTER(VCPU, invlpg),
 259         STATS_DESC_COUNTER(VCPU, exits),
 260         STATS_DESC_COUNTER(VCPU, io_exits),
 261         STATS_DESC_COUNTER(VCPU, mmio_exits),
 262         STATS_DESC_COUNTER(VCPU, signal_exits),
 263         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 264         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 265         STATS_DESC_COUNTER(VCPU, l1d_flush),
 266         STATS_DESC_COUNTER(VCPU, halt_exits),
 267         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 268         STATS_DESC_COUNTER(VCPU, irq_exits),
 269         STATS_DESC_COUNTER(VCPU, host_state_reload),
 270         STATS_DESC_COUNTER(VCPU, fpu_reload),
 271         STATS_DESC_COUNTER(VCPU, insn_emulation),
 272         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 273         STATS_DESC_COUNTER(VCPU, hypercalls),
 274         STATS_DESC_COUNTER(VCPU, irq_injections),
 275         STATS_DESC_COUNTER(VCPU, nmi_injections),
 276         STATS_DESC_COUNTER(VCPU, req_event),
 277         STATS_DESC_COUNTER(VCPU, nested_run),
 278         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 279         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 280         STATS_DESC_COUNTER(VCPU, preemption_reported),
 281         STATS_DESC_COUNTER(VCPU, preemption_other),
 282         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 283 };
 284
 285 const struct kvm_stats_header kvm_vcpu_stats_header = {
 286         .name_size = KVM_STATS_NAME_SIZE,
 287         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 288         .id_offset = sizeof(struct kvm_stats_header),
 289         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 290         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 291                        sizeof(kvm_vcpu_stats_desc),
 292 };
 293
 294 u64 __read_mostly host_xcr0;
 295 u64 __read_mostly supported_xcr0;
 296 EXPORT_SYMBOL_GPL(supported_xcr0);
 297
 298 static struct kmem_cache *x86_fpu_cache;
 299
 300 static struct kmem_cache *x86_emulator_cache;
 301
 302 /*
 303  * When called, it means the previous get/set msr reached an invalid msr.
 304  * Return true if we want to ignore/silent this failed msr access.
 305  */
 306 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 307 {
 308         const char *op = write ? "wrmsr" : "rdmsr";
 309
 310         if (ignore_msrs) {
 311                 if (report_ignored_msrs)
 312                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 313                                       op, msr, data);
 314                 /* Mask the error */
 315                 return true;
 316         } else {
 317                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 318                                       op, msr, data);
 319                 return false;
 320         }
 321 }
 322
 323 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 324 {
 325         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 326         unsigned int size = sizeof(struct x86_emulate_ctxt);
 327
 328         return kmem_cache_create_usercopy("x86_emulator", size,
 329                                           __alignof__(struct x86_emulate_ctxt),
 330                                           SLAB_ACCOUNT, useroffset,
 331                                           size - useroffset, NULL);
 332 }
 333
 334 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 335
 336 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 337 {
 338         int i;
 339         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 340                 vcpu->arch.apf.gfns[i] = ~0;
 341 }
 342
 343 static void kvm_on_user_return(struct user_return_notifier *urn)
 344 {
 345         unsigned slot;
 346         struct kvm_user_return_msrs *msrs
 347                 = container_of(urn, struct kvm_user_return_msrs, urn);
 348         struct kvm_user_return_msr_values *values;
 349         unsigned long flags;
 350
 351         /*
 352          * Disabling irqs at this point since the following code could be
 353          * interrupted and executed through kvm_arch_hardware_disable()
 354          */
 355         local_irq_save(flags);
 356         if (msrs->registered) {
 357                 msrs->registered = false;
 358                 user_return_notifier_unregister(urn);
 359         }
 360         local_irq_restore(flags);
 361         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 362                 values = &msrs->values[slot];
 363                 if (values->host != values->curr) {
 364                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 365                         values->curr = values->host;
 366                 }
 367         }
 368 }
 369
 370 static int kvm_probe_user_return_msr(u32 msr)
 371 {
 372         u64 val;
 373         int ret;
 374
 375         preempt_disable();
 376         ret = rdmsrl_safe(msr, &val);
 377         if (ret)
 378                 goto out;
 379         ret = wrmsrl_safe(msr, val);
 380 out:
 381         preempt_enable();
 382         return ret;
 383 }
 384
 385 int kvm_add_user_return_msr(u32 msr)
 386 {
 387         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 388
 389         if (kvm_probe_user_return_msr(msr))
 390                 return -1;
 391
 392         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 393         return kvm_nr_uret_msrs++;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 396
 397 int kvm_find_user_return_msr(u32 msr)
 398 {
 399         int i;
 400
 401         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 402                 if (kvm_uret_msrs_list[i] == msr)
 403                         return i;
 404         }
 405         return -1;
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 408
 409 static void kvm_user_return_msr_cpu_online(void)
 410 {
 411         unsigned int cpu = smp_processor_id();
 412         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 413         u64 value;
 414         int i;
 415
 416         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 417                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 418                 msrs->values[i].host = value;
 419                 msrs->values[i].curr = value;
 420         }
 421 }
 422
 423 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 424 {
 425         unsigned int cpu = smp_processor_id();
 426         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 427         int err;
 428
 429         value = (value & mask) | (msrs->values[slot].host & ~mask);
 430         if (value == msrs->values[slot].curr)
 431                 return 0;
 432         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 433         if (err)
 434                 return 1;
 435
 436         msrs->values[slot].curr = value;
 437         if (!msrs->registered) {
 438                 msrs->urn.on_user_return = kvm_on_user_return;
 439                 user_return_notifier_register(&msrs->urn);
 440                 msrs->registered = true;
 441         }
 442         return 0;
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 445
 446 static void drop_user_return_notifiers(void)
 447 {
 448         unsigned int cpu = smp_processor_id();
 449         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 450
 451         if (msrs->registered)
 452                 kvm_on_user_return(&msrs->urn);
 453 }
 454
 455 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 456 {
 457         return vcpu->arch.apic_base;
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 460
 461 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 462 {
 463         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 466
 467 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 468 {
 469         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 470         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 471         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 472                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 473
 474         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 475                 return 1;
 476         if (!msr_info->host_initiated) {
 477                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 478                         return 1;
 479                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 480                         return 1;
 481         }
 482
 483         kvm_lapic_set_base(vcpu, msr_info->data);
 484         kvm_recalculate_apic_map(vcpu->kvm);
 485         return 0;
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 488
 489 /*
 490  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 491  *
 492  * Hardware virtualization extension instructions may fault if a reboot turns
 493  * off virtualization while processes are running.  Usually after catching the
 494  * fault we just panic; during reboot instead the instruction is ignored.
 495  */
 496 noinstr void kvm_spurious_fault(void)
 497 {
 498         /* Fault while not rebooting.  We want the trace. */
 499         BUG_ON(!kvm_rebooting);
 500 }
 501 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 502
 503 #define EXCPT_BENIGN            0
 504 #define EXCPT_CONTRIBUTORY      1
 505 #define EXCPT_PF                2
 506
 507 static int exception_class(int vector)
 508 {
 509         switch (vector) {
 510         case PF_VECTOR:
 511                 return EXCPT_PF;
 512         case DE_VECTOR:
 513         case TS_VECTOR:
 514         case NP_VECTOR:
 515         case SS_VECTOR:
 516         case GP_VECTOR:
 517                 return EXCPT_CONTRIBUTORY;
 518         default:
 519                 break;
 520         }
 521         return EXCPT_BENIGN;
 522 }
 523
 524 #define EXCPT_FAULT             0
 525 #define EXCPT_TRAP              1
 526 #define EXCPT_ABORT             2
 527 #define EXCPT_INTERRUPT         3
 528 #define EXCPT_DB                4
 529
 530 static int exception_type(int vector)
 531 {
 532         unsigned int mask;
 533
 534         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 535                 return EXCPT_INTERRUPT;
 536
 537         mask = 1 << vector;
 538
 539         /*
 540          * #DBs can be trap-like or fault-like, the caller must check other CPU
 541          * state, e.g. DR6, to determine whether a #DB is a trap or fault.
 542          */
 543         if (mask & (1 << DB_VECTOR))
 544                 return EXCPT_DB;
 545
 546         if (mask & ((1 << BP_VECTOR) | (1 << OF_VECTOR)))
 547                 return EXCPT_TRAP;
 548
 549         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 550                 return EXCPT_ABORT;
 551
 552         /* Reserved exceptions will result in fault */
 553         return EXCPT_FAULT;
 554 }
 555
 556 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 557 {
 558         unsigned nr = vcpu->arch.exception.nr;
 559         bool has_payload = vcpu->arch.exception.has_payload;
 560         unsigned long payload = vcpu->arch.exception.payload;
 561
 562         if (!has_payload)
 563                 return;
 564
 565         switch (nr) {
 566         case DB_VECTOR:
 567                 /*
 568                  * "Certain debug exceptions may clear bit 0-3.  The
 569                  * remaining contents of the DR6 register are never
 570                  * cleared by the processor".
 571                  */
 572                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 573                 /*
 574                  * In order to reflect the #DB exception payload in guest
 575                  * dr6, three components need to be considered: active low
 576                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 577                  * DR6_BS and DR6_BT)
 578                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 579                  * In the target guest dr6:
 580                  * FIXED_1 bits should always be set.
 581                  * Active low bits should be cleared if 1-setting in payload.
 582                  * Active high bits should be set if 1-setting in payload.
 583                  *
 584                  * Note, the payload is compatible with the pending debug
 585                  * exceptions/exit qualification under VMX, that active_low bits
 586                  * are active high in payload.
 587                  * So they need to be flipped for DR6.
 588                  */
 589                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 590                 vcpu->arch.dr6 |= payload;
 591                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 592
 593                 /*
 594                  * The #DB payload is defined as compatible with the 'pending
 595                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 596                  * defined in the 'pending debug exceptions' field (enabled
 597                  * breakpoint), it is reserved and must be zero in DR6.
 598                  */
 599                 vcpu->arch.dr6 &= ~BIT(12);
 600                 break;
 601         case PF_VECTOR:
 602                 vcpu->arch.cr2 = payload;
 603                 break;
 604         }
 605
 606         vcpu->arch.exception.has_payload = false;
 607         vcpu->arch.exception.payload = 0;
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 610
 611 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 612                 unsigned nr, bool has_error, u32 error_code,
 613                 bool has_payload, unsigned long payload, bool reinject)
 614 {
 615         u32 prev_nr;
 616         int class1, class2;
 617
 618         kvm_make_request(KVM_REQ_EVENT, vcpu);
 619
 620         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 621         queue:
 622                 if (reinject) {
 623                         /*
 624                          * On vmentry, vcpu->arch.exception.pending is only
 625                          * true if an event injection was blocked by
 626                          * nested_run_pending.  In that case, however,
 627                          * vcpu_enter_guest requests an immediate exit,
 628                          * and the guest shouldn't proceed far enough to
 629                          * need reinjection.
 630                          */
 631                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 632                         vcpu->arch.exception.injected = true;
 633                         if (WARN_ON_ONCE(has_payload)) {
 634                                 /*
 635                                  * A reinjected event has already
 636                                  * delivered its payload.
 637                                  */
 638                                 has_payload = false;
 639                                 payload = 0;
 640                         }
 641                 } else {
 642                         vcpu->arch.exception.pending = true;
 643                         vcpu->arch.exception.injected = false;
 644                 }
 645                 vcpu->arch.exception.has_error_code = has_error;
 646                 vcpu->arch.exception.nr = nr;
 647                 vcpu->arch.exception.error_code = error_code;
 648                 vcpu->arch.exception.has_payload = has_payload;
 649                 vcpu->arch.exception.payload = payload;
 650                 if (!is_guest_mode(vcpu))
 651                         kvm_deliver_exception_payload(vcpu);
 652                 return;
 653         }
 654
 655         /* to check exception */
 656         prev_nr = vcpu->arch.exception.nr;
 657         if (prev_nr == DF_VECTOR) {
 658                 /* triple fault -> shutdown */
 659                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 660                 return;
 661         }
 662         class1 = exception_class(prev_nr);
 663         class2 = exception_class(nr);
 664         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 665                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 666                 /*
 667                  * Generate double fault per SDM Table 5-5.  Set
 668                  * exception.pending = true so that the double fault
 669                  * can trigger a nested vmexit.
 670                  */
 671                 vcpu->arch.exception.pending = true;
 672                 vcpu->arch.exception.injected = false;
 673                 vcpu->arch.exception.has_error_code = true;
 674                 vcpu->arch.exception.nr = DF_VECTOR;
 675                 vcpu->arch.exception.error_code = 0;
 676                 vcpu->arch.exception.has_payload = false;
 677                 vcpu->arch.exception.payload = 0;
 678         } else
 679                 /* replace previous exception with a new one in a hope
 680                    that instruction re-execution will regenerate lost
 681                    exception */
 682                 goto queue;
 683 }
 684
 685 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 686 {
 687         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 688 }
 689 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 690
 691 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 692 {
 693         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 696
 697 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 698                            unsigned long payload)
 699 {
 700         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 703
 704 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 705                                     u32 error_code, unsigned long payload)
 706 {
 707         kvm_multiple_exception(vcpu, nr, true, error_code,
 708                                true, payload, false);
 709 }
 710
 711 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 712 {
 713         if (err)
 714                 kvm_inject_gp(vcpu, 0);
 715         else
 716                 return kvm_skip_emulated_instruction(vcpu);
 717
 718         return 1;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 721
 722 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 723 {
 724         ++vcpu->stat.pf_guest;
 725         vcpu->arch.exception.nested_apf =
 726                 is_guest_mode(vcpu) && fault->async_page_fault;
 727         if (vcpu->arch.exception.nested_apf) {
 728                 vcpu->arch.apf.nested_apf_token = fault->address;
 729                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 730         } else {
 731                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 732                                         fault->address);
 733         }
 734 }
 735 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 736
 737 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 738                                     struct x86_exception *fault)
 739 {
 740         struct kvm_mmu *fault_mmu;
 741         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 742
 743         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 744                                                vcpu->arch.walk_mmu;
 745
 746         /*
 747          * Invalidate the TLB entry for the faulting address, if it exists,
 748          * else the access will fault indefinitely (and to emulate hardware).
 749          */
 750         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 751             !(fault->error_code & PFERR_RSVD_MASK))
 752                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 753                                        fault_mmu->root_hpa);
 754
 755         fault_mmu->inject_page_fault(vcpu, fault);
 756         return fault->nested_page_fault;
 757 }
 758 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 759
 760 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 761 {
 762         atomic_inc(&vcpu->arch.nmi_queued);
 763         kvm_make_request(KVM_REQ_NMI, vcpu);
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 766
 767 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 768 {
 769         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 770 }
 771 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 772
 773 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 774 {
 775         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 776 }
 777 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 778
 779 /*
 780  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 781  * a #GP and return false.
 782  */
 783 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 784 {
 785         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 786                 return true;
 787         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 788         return false;
 789 }
 790 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 791
 792 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 793 {
 794         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 795                 return true;
 796
 797         kvm_queue_exception(vcpu, UD_VECTOR);
 798         return false;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_require_dr);
 801
 802 /*
 803  * This function will be used to read from the physical memory of the currently
 804  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 805  * can read from guest physical or from the guest's guest physical memory.
 806  */
 807 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 808                             gfn_t ngfn, void *data, int offset, int len,
 809                             u32 access)
 810 {
 811         struct x86_exception exception;
 812         gfn_t real_gfn;
 813         gpa_t ngpa;
 814
 815         ngpa     = gfn_to_gpa(ngfn);
 816         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 817         if (real_gfn == UNMAPPED_GVA)
 818                 return -EFAULT;
 819
 820         real_gfn = gpa_to_gfn(real_gfn);
 821
 822         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 825
 826 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 827 {
 828         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 829 }
 830
 831 /*
 832  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 833  */
 834 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 835 {
 836         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 837         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 838         int i;
 839         int ret;
 840         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 841
 842         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 843                                       offset * sizeof(u64), sizeof(pdpte),
 844                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 845         if (ret < 0) {
 846                 ret = 0;
 847                 goto out;
 848         }
 849         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 850                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 851                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 852                         ret = 0;
 853                         goto out;
 854                 }
 855         }
 856         ret = 1;
 857
 858         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 859         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 860         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 861         vcpu->arch.pdptrs_from_userspace = false;
 862
 863 out:
 864
 865         return ret;
 866 }
 867 EXPORT_SYMBOL_GPL(load_pdptrs);
 868
 869 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 870 {
 871         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 872                 kvm_clear_async_pf_completion_queue(vcpu);
 873                 kvm_async_pf_hash_reset(vcpu);
 874         }
 875
 876         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 877                 kvm_mmu_reset_context(vcpu);
 878
 879         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 880             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 881             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 882                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 883 }
 884 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 885
 886 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 887 {
 888         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 889         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 890
 891         cr0 |= X86_CR0_ET;
 892
 893 #ifdef CONFIG_X86_64
 894         if (cr0 & 0xffffffff00000000UL)
 895                 return 1;
 896 #endif
 897
 898         cr0 &= ~CR0_RESERVED_BITS;
 899
 900         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 901                 return 1;
 902
 903         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 904                 return 1;
 905
 906 #ifdef CONFIG_X86_64
 907         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 908             (cr0 & X86_CR0_PG)) {
 909                 int cs_db, cs_l;
 910
 911                 if (!is_pae(vcpu))
 912                         return 1;
 913                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 914                 if (cs_l)
 915                         return 1;
 916         }
 917 #endif
 918         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 919             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 920             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 921                 return 1;
 922
 923         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 924                 return 1;
 925
 926         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 927
 928         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 929
 930         return 0;
 931 }
 932 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 933
 934 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 935 {
 936         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 937 }
 938 EXPORT_SYMBOL_GPL(kvm_lmsw);
 939
 940 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 941 {
 942         if (vcpu->arch.guest_state_protected)
 943                 return;
 944
 945         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 946
 947                 if (vcpu->arch.xcr0 != host_xcr0)
 948                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 949
 950                 if (vcpu->arch.xsaves_enabled &&
 951                     vcpu->arch.ia32_xss != host_xss)
 952                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 953         }
 954
 955         if (static_cpu_has(X86_FEATURE_PKU) &&
 956             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 957              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 958             vcpu->arch.pkru != vcpu->arch.host_pkru)
 959                 write_pkru(vcpu->arch.pkru);
 960 }
 961 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 962
 963 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 964 {
 965         if (vcpu->arch.guest_state_protected)
 966                 return;
 967
 968         if (static_cpu_has(X86_FEATURE_PKU) &&
 969             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 970              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 971                 vcpu->arch.pkru = rdpkru();
 972                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 973                         write_pkru(vcpu->arch.host_pkru);
 974         }
 975
 976         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 977
 978                 if (vcpu->arch.xcr0 != host_xcr0)
 979                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 980
 981                 if (vcpu->arch.xsaves_enabled &&
 982                     vcpu->arch.ia32_xss != host_xss)
 983                         wrmsrl(MSR_IA32_XSS, host_xss);
 984         }
 985
 986 }
 987 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 988
 989 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 990 {
 991         u64 xcr0 = xcr;
 992         u64 old_xcr0 = vcpu->arch.xcr0;
 993         u64 valid_bits;
 994
 995         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 996         if (index != XCR_XFEATURE_ENABLED_MASK)
 997                 return 1;
 998         if (!(xcr0 & XFEATURE_MASK_FP))
 999                 return 1;
1000         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1001                 return 1;
1002
1003         /*
1004          * Do not allow the guest to set bits that we do not support
1005          * saving.  However, xcr0 bit 0 is always set, even if the
1006          * emulated CPU does not support XSAVE (see fx_init).
1007          */
1008         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1009         if (xcr0 & ~valid_bits)
1010                 return 1;
1011
1012         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1013             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1014                 return 1;
1015
1016         if (xcr0 & XFEATURE_MASK_AVX512) {
1017                 if (!(xcr0 & XFEATURE_MASK_YMM))
1018                         return 1;
1019                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1020                         return 1;
1021         }
1022         vcpu->arch.xcr0 = xcr0;
1023
1024         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1025                 kvm_update_cpuid_runtime(vcpu);
1026         return 0;
1027 }
1028
1029 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1030 {
1031         /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1032         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1033             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1034                 kvm_inject_gp(vcpu, 0);
1035                 return 1;
1036         }
1037
1038         return kvm_skip_emulated_instruction(vcpu);
1039 }
1040 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1041
1042 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1043 {
1044         if (cr4 & cr4_reserved_bits)
1045                 return false;
1046
1047         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1048                 return false;
1049
1050         return true;
1051 }
1052 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4);
1053
1054 static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1055 {
1056         return __kvm_is_valid_cr4(vcpu, cr4) &&
1057                static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1058 }
1059
1060 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1061 {
1062         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1063             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1064                 kvm_mmu_reset_context(vcpu);
1065 }
1066 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1067
1068 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1069 {
1070         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1071         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1072                                    X86_CR4_SMEP;
1073
1074         if (!kvm_is_valid_cr4(vcpu, cr4))
1075                 return 1;
1076
1077         if (is_long_mode(vcpu)) {
1078                 if (!(cr4 & X86_CR4_PAE))
1079                         return 1;
1080                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1081                         return 1;
1082         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1083                    && ((cr4 ^ old_cr4) & pdptr_bits)
1084                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1085                                    kvm_read_cr3(vcpu)))
1086                 return 1;
1087
1088         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1089                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1090                         return 1;
1091
1092                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1093                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1094                         return 1;
1095         }
1096
1097         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1098
1099         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1100
1101         return 0;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1104
1105 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1106 {
1107         struct kvm_mmu *mmu = vcpu->arch.mmu;
1108         unsigned long roots_to_free = 0;
1109         int i;
1110
1111         /*
1112          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1113          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1114          * also via the emulator.  KVM's TDP page tables are not in the scope of
1115          * the invalidation, but the guest's TLB entries need to be flushed as
1116          * the CPU may have cached entries in its TLB for the target PCID.
1117          */
1118         if (unlikely(tdp_enabled)) {
1119                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1120                 return;
1121         }
1122
1123         /*
1124          * If neither the current CR3 nor any of the prev_roots use the given
1125          * PCID, then nothing needs to be done here because a resync will
1126          * happen anyway before switching to any other CR3.
1127          */
1128         if (kvm_get_active_pcid(vcpu) == pcid) {
1129                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1130                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1131         }
1132
1133         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1134                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1135                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1136
1137         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1138 }
1139
1140 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1141 {
1142         bool skip_tlb_flush = false;
1143         unsigned long pcid = 0;
1144 #ifdef CONFIG_X86_64
1145         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1146
1147         if (pcid_enabled) {
1148                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1149                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1150                 pcid = cr3 & X86_CR3_PCID_MASK;
1151         }
1152 #endif
1153
1154         /* PDPTRs are always reloaded for PAE paging. */
1155         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1156                 goto handle_tlb_flush;
1157
1158         /*
1159          * Do not condition the GPA check on long mode, this helper is used to
1160          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1161          * the current vCPU mode is accurate.
1162          */
1163         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1164                 return 1;
1165
1166         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1167                 return 1;
1168
1169         if (cr3 != kvm_read_cr3(vcpu))
1170                 kvm_mmu_new_pgd(vcpu, cr3);
1171
1172         vcpu->arch.cr3 = cr3;
1173         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1174
1175 handle_tlb_flush:
1176         /*
1177          * A load of CR3 that flushes the TLB flushes only the current PCID,
1178          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1179          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1180          * and it's impossible to use a non-zero PCID when PCID is disabled,
1181          * i.e. only PCID=0 can be relevant.
1182          */
1183         if (!skip_tlb_flush)
1184                 kvm_invalidate_pcid(vcpu, pcid);
1185
1186         return 0;
1187 }
1188 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1189
1190 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1191 {
1192         if (cr8 & CR8_RESERVED_BITS)
1193                 return 1;
1194         if (lapic_in_kernel(vcpu))
1195                 kvm_lapic_set_tpr(vcpu, cr8);
1196         else
1197                 vcpu->arch.cr8 = cr8;
1198         return 0;
1199 }
1200 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1201
1202 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1203 {
1204         if (lapic_in_kernel(vcpu))
1205                 return kvm_lapic_get_cr8(vcpu);
1206         else
1207                 return vcpu->arch.cr8;
1208 }
1209 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1210
1211 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1212 {
1213         int i;
1214
1215         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1216                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1217                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1218         }
1219 }
1220
1221 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1222 {
1223         unsigned long dr7;
1224
1225         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1226                 dr7 = vcpu->arch.guest_debug_dr7;
1227         else
1228                 dr7 = vcpu->arch.dr7;
1229         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1230         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1231         if (dr7 & DR7_BP_EN_MASK)
1232                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1233 }
1234 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1235
1236 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1237 {
1238         u64 fixed = DR6_FIXED_1;
1239
1240         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1241                 fixed |= DR6_RTM;
1242
1243         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1244                 fixed |= DR6_BUS_LOCK;
1245         return fixed;
1246 }
1247
1248 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1249 {
1250         size_t size = ARRAY_SIZE(vcpu->arch.db);
1251
1252         switch (dr) {
1253         case 0 ... 3:
1254                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1255                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1256                         vcpu->arch.eff_db[dr] = val;
1257                 break;
1258         case 4:
1259         case 6:
1260                 if (!kvm_dr6_valid(val))
1261                         return 1; /* #GP */
1262                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1263                 break;
1264         case 5:
1265         default: /* 7 */
1266                 if (!kvm_dr7_valid(val))
1267                         return 1; /* #GP */
1268                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1269                 kvm_update_dr7(vcpu);
1270                 break;
1271         }
1272
1273         return 0;
1274 }
1275 EXPORT_SYMBOL_GPL(kvm_set_dr);
1276
1277 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1278 {
1279         size_t size = ARRAY_SIZE(vcpu->arch.db);
1280
1281         switch (dr) {
1282         case 0 ... 3:
1283                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1284                 break;
1285         case 4:
1286         case 6:
1287                 *val = vcpu->arch.dr6;
1288                 break;
1289         case 5:
1290         default: /* 7 */
1291                 *val = vcpu->arch.dr7;
1292                 break;
1293         }
1294 }
1295 EXPORT_SYMBOL_GPL(kvm_get_dr);
1296
1297 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1298 {
1299         u32 ecx = kvm_rcx_read(vcpu);
1300         u64 data;
1301
1302         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1303                 kvm_inject_gp(vcpu, 0);
1304                 return 1;
1305         }
1306
1307         kvm_rax_write(vcpu, (u32)data);
1308         kvm_rdx_write(vcpu, data >> 32);
1309         return kvm_skip_emulated_instruction(vcpu);
1310 }
1311 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1312
1313 /*
1314  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1315  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1316  *
1317  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1318  * extract the supported MSRs from the related const lists.
1319  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1320  * capabilities of the host cpu. This capabilities test skips MSRs that are
1321  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1322  * may depend on host virtualization features rather than host cpu features.
1323  */
1324
1325 static const u32 msrs_to_save_all[] = {
1326         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1327         MSR_STAR,
1328 #ifdef CONFIG_X86_64
1329         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1330 #endif
1331         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1332         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1333         MSR_IA32_SPEC_CTRL,
1334         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1335         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1336         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1337         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1338         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1339         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1340         MSR_IA32_UMWAIT_CONTROL,
1341
1342         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1343         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1344         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1345         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1346         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1347         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1348         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1349         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1350         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1351         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1352         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1353         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1354         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1355         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1356         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1357         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1358         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1359         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1360         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1361         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1362         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1363         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1364
1365         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1366         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1367         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1368         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1369         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1370         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1371 };
1372
1373 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1374 static unsigned num_msrs_to_save;
1375
1376 static const u32 emulated_msrs_all[] = {
1377         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1378         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1379         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1380         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1381         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1382         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1383         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1384         HV_X64_MSR_RESET,
1385         HV_X64_MSR_VP_INDEX,
1386         HV_X64_MSR_VP_RUNTIME,
1387         HV_X64_MSR_SCONTROL,
1388         HV_X64_MSR_STIMER0_CONFIG,
1389         HV_X64_MSR_VP_ASSIST_PAGE,
1390         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1391         HV_X64_MSR_TSC_EMULATION_STATUS,
1392         HV_X64_MSR_SYNDBG_OPTIONS,
1393         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1394         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1395         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1396
1397         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1398         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1399
1400         MSR_IA32_TSC_ADJUST,
1401         MSR_IA32_TSC_DEADLINE,
1402         MSR_IA32_ARCH_CAPABILITIES,
1403         MSR_IA32_PERF_CAPABILITIES,
1404         MSR_IA32_MISC_ENABLE,
1405         MSR_IA32_MCG_STATUS,
1406         MSR_IA32_MCG_CTL,
1407         MSR_IA32_MCG_EXT_CTL,
1408         MSR_IA32_SMBASE,
1409         MSR_SMI_COUNT,
1410         MSR_PLATFORM_INFO,
1411         MSR_MISC_FEATURES_ENABLES,
1412         MSR_AMD64_VIRT_SPEC_CTRL,
1413         MSR_IA32_POWER_CTL,
1414         MSR_IA32_UCODE_REV,
1415
1416         /*
1417          * The following list leaves out MSRs whose values are determined
1418          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1419          * We always support the "true" VMX control MSRs, even if the host
1420          * processor does not, so I am putting these registers here rather
1421          * than in msrs_to_save_all.
1422          */
1423         MSR_IA32_VMX_BASIC,
1424         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1425         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1426         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1427         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1428         MSR_IA32_VMX_MISC,
1429         MSR_IA32_VMX_CR0_FIXED0,
1430         MSR_IA32_VMX_CR4_FIXED0,
1431         MSR_IA32_VMX_VMCS_ENUM,
1432         MSR_IA32_VMX_PROCBASED_CTLS2,
1433         MSR_IA32_VMX_EPT_VPID_CAP,
1434         MSR_IA32_VMX_VMFUNC,
1435
1436         MSR_K7_HWCR,
1437         MSR_KVM_POLL_CONTROL,
1438 };
1439
1440 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1441 static unsigned num_emulated_msrs;
1442
1443 /*
1444  * List of msr numbers which are used to expose MSR-based features that
1445  * can be used by a hypervisor to validate requested CPU features.
1446  */
1447 static const u32 msr_based_features_all[] = {
1448         MSR_IA32_VMX_BASIC,
1449         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1450         MSR_IA32_VMX_PINBASED_CTLS,
1451         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1452         MSR_IA32_VMX_PROCBASED_CTLS,
1453         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1454         MSR_IA32_VMX_EXIT_CTLS,
1455         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1456         MSR_IA32_VMX_ENTRY_CTLS,
1457         MSR_IA32_VMX_MISC,
1458         MSR_IA32_VMX_CR0_FIXED0,
1459         MSR_IA32_VMX_CR0_FIXED1,
1460         MSR_IA32_VMX_CR4_FIXED0,
1461         MSR_IA32_VMX_CR4_FIXED1,
1462         MSR_IA32_VMX_VMCS_ENUM,
1463         MSR_IA32_VMX_PROCBASED_CTLS2,
1464         MSR_IA32_VMX_EPT_VPID_CAP,
1465         MSR_IA32_VMX_VMFUNC,
1466
1467         MSR_AMD64_DE_CFG,
1468         MSR_IA32_UCODE_REV,
1469         MSR_IA32_ARCH_CAPABILITIES,
1470         MSR_IA32_PERF_CAPABILITIES,
1471 };
1472
1473 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1474 static unsigned int num_msr_based_features;
1475
1476 /*
1477  * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1478  * does not yet virtualize. These include:
1479  *   10 - MISC_PACKAGE_CTRLS
1480  *   11 - ENERGY_FILTERING_CTL
1481  *   12 - DOITM
1482  *   18 - FB_CLEAR_CTRL
1483  *   21 - XAPIC_DISABLE_STATUS
1484  *   23 - OVERCLOCKING_STATUS
1485  */
1486
1487 #define KVM_SUPPORTED_ARCH_CAP \
1488         (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1489          ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1490          ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1491          ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1492          ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO)
1493
1494 static u64 kvm_get_arch_capabilities(void)
1495 {
1496         u64 data = 0;
1497
1498         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {
1499                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1500                 data &= KVM_SUPPORTED_ARCH_CAP;
1501         }
1502
1503         /*
1504          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1505          * the nested hypervisor runs with NX huge pages.  If it is not,
1506          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1507          * L1 guests, so it need not worry about its own (L2) guests.
1508          */
1509         data |= ARCH_CAP_PSCHANGE_MC_NO;
1510
1511         /*
1512          * If we're doing cache flushes (either "always" or "cond")
1513          * we will do one whenever the guest does a vmlaunch/vmresume.
1514          * If an outer hypervisor is doing the cache flush for us
1515          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1516          * capability to the guest too, and if EPT is disabled we're not
1517          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1518          * require a nested hypervisor to do a flush of its own.
1519          */
1520         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1521                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1522
1523         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1524                 data |= ARCH_CAP_RDCL_NO;
1525         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1526                 data |= ARCH_CAP_SSB_NO;
1527         if (!boot_cpu_has_bug(X86_BUG_MDS))
1528                 data |= ARCH_CAP_MDS_NO;
1529
1530         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1531                 /*
1532                  * If RTM=0 because the kernel has disabled TSX, the host might
1533                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1534                  * and therefore knows that there cannot be TAA) but keep
1535                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1536                  * and we want to allow migrating those guests to tsx=off hosts.
1537                  */
1538                 data &= ~ARCH_CAP_TAA_NO;
1539         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1540                 data |= ARCH_CAP_TAA_NO;
1541         } else {
1542                 /*
1543                  * Nothing to do here; we emulate TSX_CTRL if present on the
1544                  * host so the guest can choose between disabling TSX or
1545                  * using VERW to clear CPU buffers.
1546                  */
1547         }
1548
1549         return data;
1550 }
1551
1552 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1553 {
1554         switch (msr->index) {
1555         case MSR_IA32_ARCH_CAPABILITIES:
1556                 msr->data = kvm_get_arch_capabilities();
1557                 break;
1558         case MSR_IA32_UCODE_REV:
1559                 rdmsrl_safe(msr->index, &msr->data);
1560                 break;
1561         default:
1562                 return static_call(kvm_x86_get_msr_feature)(msr);
1563         }
1564         return 0;
1565 }
1566
1567 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1568 {
1569         struct kvm_msr_entry msr;
1570         int r;
1571
1572         msr.index = index;
1573         r = kvm_get_msr_feature(&msr);
1574
1575         if (r == KVM_MSR_RET_INVALID) {
1576                 /* Unconditionally clear the output for simplicity */
1577                 *data = 0;
1578                 if (kvm_msr_ignored_check(index, 0, false))
1579                         r = 0;
1580         }
1581
1582         if (r)
1583                 return r;
1584
1585         *data = msr.data;
1586
1587         return 0;
1588 }
1589
1590 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1591 {
1592         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1593                 return false;
1594
1595         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1596                 return false;
1597
1598         if (efer & (EFER_LME | EFER_LMA) &&
1599             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1600                 return false;
1601
1602         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1603                 return false;
1604
1605         return true;
1606
1607 }
1608 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1609 {
1610         if (efer & efer_reserved_bits)
1611                 return false;
1612
1613         return __kvm_valid_efer(vcpu, efer);
1614 }
1615 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1616
1617 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1618 {
1619         u64 old_efer = vcpu->arch.efer;
1620         u64 efer = msr_info->data;
1621         int r;
1622
1623         if (efer & efer_reserved_bits)
1624                 return 1;
1625
1626         if (!msr_info->host_initiated) {
1627                 if (!__kvm_valid_efer(vcpu, efer))
1628                         return 1;
1629
1630                 if (is_paging(vcpu) &&
1631                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1632                         return 1;
1633         }
1634
1635         efer &= ~EFER_LMA;
1636         efer |= vcpu->arch.efer & EFER_LMA;
1637
1638         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1639         if (r) {
1640                 WARN_ON(r > 0);
1641                 return r;
1642         }
1643
1644         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1645                 kvm_mmu_reset_context(vcpu);
1646
1647         return 0;
1648 }
1649
1650 void kvm_enable_efer_bits(u64 mask)
1651 {
1652        efer_reserved_bits &= ~mask;
1653 }
1654 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1655
1656 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1657 {
1658         struct kvm_x86_msr_filter *msr_filter;
1659         struct msr_bitmap_range *ranges;
1660         struct kvm *kvm = vcpu->kvm;
1661         bool allowed;
1662         int idx;
1663         u32 i;
1664
1665         /* x2APIC MSRs do not support filtering. */
1666         if (index >= 0x800 && index <= 0x8ff)
1667                 return true;
1668
1669         idx = srcu_read_lock(&kvm->srcu);
1670
1671         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1672         if (!msr_filter) {
1673                 allowed = true;
1674                 goto out;
1675         }
1676
1677         allowed = msr_filter->default_allow;
1678         ranges = msr_filter->ranges;
1679
1680         for (i = 0; i < msr_filter->count; i++) {
1681                 u32 start = ranges[i].base;
1682                 u32 end = start + ranges[i].nmsrs;
1683                 u32 flags = ranges[i].flags;
1684                 unsigned long *bitmap = ranges[i].bitmap;
1685
1686                 if ((index >= start) && (index < end) && (flags & type)) {
1687                         allowed = !!test_bit(index - start, bitmap);
1688                         break;
1689                 }
1690         }
1691
1692 out:
1693         srcu_read_unlock(&kvm->srcu, idx);
1694
1695         return allowed;
1696 }
1697 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1698
1699 /*
1700  * Write @data into the MSR specified by @index.  Select MSR specific fault
1701  * checks are bypassed if @host_initiated is %true.
1702  * Returns 0 on success, non-0 otherwise.
1703  * Assumes vcpu_load() was already called.
1704  */
1705 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1706                          bool host_initiated)
1707 {
1708         struct msr_data msr;
1709
1710         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1711                 return KVM_MSR_RET_FILTERED;
1712
1713         switch (index) {
1714         case MSR_FS_BASE:
1715         case MSR_GS_BASE:
1716         case MSR_KERNEL_GS_BASE:
1717         case MSR_CSTAR:
1718         case MSR_LSTAR:
1719                 if (is_noncanonical_address(data, vcpu))
1720                         return 1;
1721                 break;
1722         case MSR_IA32_SYSENTER_EIP:
1723         case MSR_IA32_SYSENTER_ESP:
1724                 /*
1725                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1726                  * non-canonical address is written on Intel but not on
1727                  * AMD (which ignores the top 32-bits, because it does
1728                  * not implement 64-bit SYSENTER).
1729                  *
1730                  * 64-bit code should hence be able to write a non-canonical
1731                  * value on AMD.  Making the address canonical ensures that
1732                  * vmentry does not fail on Intel after writing a non-canonical
1733                  * value, and that something deterministic happens if the guest
1734                  * invokes 64-bit SYSENTER.
1735                  */
1736                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1737                 break;
1738         case MSR_TSC_AUX:
1739                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1740                         return 1;
1741
1742                 if (!host_initiated &&
1743                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1744                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1745                         return 1;
1746
1747                 /*
1748                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1749                  * incomplete and conflicting architectural behavior.  Current
1750                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1751                  * reserved and always read as zeros.  Enforce Intel's reserved
1752                  * bits check if and only if the guest CPU is Intel, and clear
1753                  * the bits in all other cases.  This ensures cross-vendor
1754                  * migration will provide consistent behavior for the guest.
1755                  */
1756                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1757                         return 1;
1758
1759                 data = (u32)data;
1760                 break;
1761         }
1762
1763         msr.data = data;
1764         msr.index = index;
1765         msr.host_initiated = host_initiated;
1766
1767         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1768 }
1769
1770 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1771                                      u32 index, u64 data, bool host_initiated)
1772 {
1773         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1774
1775         if (ret == KVM_MSR_RET_INVALID)
1776                 if (kvm_msr_ignored_check(index, data, true))
1777                         ret = 0;
1778
1779         return ret;
1780 }
1781
1782 /*
1783  * Read the MSR specified by @index into @data.  Select MSR specific fault
1784  * checks are bypassed if @host_initiated is %true.
1785  * Returns 0 on success, non-0 otherwise.
1786  * Assumes vcpu_load() was already called.
1787  */
1788 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1789                   bool host_initiated)
1790 {
1791         struct msr_data msr;
1792         int ret;
1793
1794         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1795                 return KVM_MSR_RET_FILTERED;
1796
1797         switch (index) {
1798         case MSR_TSC_AUX:
1799                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1800                         return 1;
1801
1802                 if (!host_initiated &&
1803                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1804                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1805                         return 1;
1806                 break;
1807         }
1808
1809         msr.index = index;
1810         msr.host_initiated = host_initiated;
1811
1812         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1813         if (!ret)
1814                 *data = msr.data;
1815         return ret;
1816 }
1817
1818 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1819                                      u32 index, u64 *data, bool host_initiated)
1820 {
1821         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1822
1823         if (ret == KVM_MSR_RET_INVALID) {
1824                 /* Unconditionally clear *data for simplicity */
1825                 *data = 0;
1826                 if (kvm_msr_ignored_check(index, 0, false))
1827                         ret = 0;
1828         }
1829
1830         return ret;
1831 }
1832
1833 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1834 {
1835         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1836 }
1837 EXPORT_SYMBOL_GPL(kvm_get_msr);
1838
1839 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1840 {
1841         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1842 }
1843 EXPORT_SYMBOL_GPL(kvm_set_msr);
1844
1845 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1846 {
1847         int err = vcpu->run->msr.error;
1848         if (!err) {
1849                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1850                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1851         }
1852
1853         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1854 }
1855
1856 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1857 {
1858         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1859 }
1860
1861 static u64 kvm_msr_reason(int r)
1862 {
1863         switch (r) {
1864         case KVM_MSR_RET_INVALID:
1865                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1866         case KVM_MSR_RET_FILTERED:
1867                 return KVM_MSR_EXIT_REASON_FILTER;
1868         default:
1869                 return KVM_MSR_EXIT_REASON_INVAL;
1870         }
1871 }
1872
1873 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1874                               u32 exit_reason, u64 data,
1875                               int (*completion)(struct kvm_vcpu *vcpu),
1876                               int r)
1877 {
1878         u64 msr_reason = kvm_msr_reason(r);
1879
1880         /* Check if the user wanted to know about this MSR fault */
1881         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1882                 return 0;
1883
1884         vcpu->run->exit_reason = exit_reason;
1885         vcpu->run->msr.error = 0;
1886         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1887         vcpu->run->msr.reason = msr_reason;
1888         vcpu->run->msr.index = index;
1889         vcpu->run->msr.data = data;
1890         vcpu->arch.complete_userspace_io = completion;
1891
1892         return 1;
1893 }
1894
1895 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1896 {
1897         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1898                                    complete_emulated_rdmsr, r);
1899 }
1900
1901 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1902 {
1903         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1904                                    complete_emulated_wrmsr, r);
1905 }
1906
1907 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1908 {
1909         u32 ecx = kvm_rcx_read(vcpu);
1910         u64 data;
1911         int r;
1912
1913         r = kvm_get_msr(vcpu, ecx, &data);
1914
1915         /* MSR read failed? See if we should ask user space */
1916         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1917                 /* Bounce to user space */
1918                 return 0;
1919         }
1920
1921         if (!r) {
1922                 trace_kvm_msr_read(ecx, data);
1923
1924                 kvm_rax_write(vcpu, data & -1u);
1925                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1926         } else {
1927                 trace_kvm_msr_read_ex(ecx);
1928         }
1929
1930         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1931 }
1932 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1933
1934 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1935 {
1936         u32 ecx = kvm_rcx_read(vcpu);
1937         u64 data = kvm_read_edx_eax(vcpu);
1938         int r;
1939
1940         r = kvm_set_msr(vcpu, ecx, data);
1941
1942         /* MSR write failed? See if we should ask user space */
1943         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1944                 /* Bounce to user space */
1945                 return 0;
1946
1947         /* Signal all other negative errors to userspace */
1948         if (r < 0)
1949                 return r;
1950
1951         if (!r)
1952                 trace_kvm_msr_write(ecx, data);
1953         else
1954                 trace_kvm_msr_write_ex(ecx, data);
1955
1956         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1957 }
1958 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1959
1960 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1961 {
1962         return kvm_skip_emulated_instruction(vcpu);
1963 }
1964 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1965
1966 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1967 {
1968         /* Treat an INVD instruction as a NOP and just skip it. */
1969         return kvm_emulate_as_nop(vcpu);
1970 }
1971 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1972
1973 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1974 {
1975         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1976         return kvm_emulate_as_nop(vcpu);
1977 }
1978 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1979
1980 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1981 {
1982         kvm_queue_exception(vcpu, UD_VECTOR);
1983         return 1;
1984 }
1985 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1986
1987 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1988 {
1989         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1990         return kvm_emulate_as_nop(vcpu);
1991 }
1992 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1993
1994 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1995 {
1996         xfer_to_guest_mode_prepare();
1997         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1998                 xfer_to_guest_mode_work_pending();
1999 }
2000
2001 /*
2002  * The fast path for frequent and performance sensitive wrmsr emulation,
2003  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2004  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2005  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2006  * other cases which must be called after interrupts are enabled on the host.
2007  */
2008 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2009 {
2010         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2011                 return 1;
2012
2013         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2014                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2015                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2016                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2017
2018                 data &= ~(1 << 12);
2019                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2020                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2021                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2022                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2023                 return 0;
2024         }
2025
2026         return 1;
2027 }
2028
2029 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2030 {
2031         if (!kvm_can_use_hv_timer(vcpu))
2032                 return 1;
2033
2034         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2035         return 0;
2036 }
2037
2038 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2039 {
2040         u32 msr = kvm_rcx_read(vcpu);
2041         u64 data;
2042         fastpath_t ret = EXIT_FASTPATH_NONE;
2043
2044         switch (msr) {
2045         case APIC_BASE_MSR + (APIC_ICR >> 4):
2046                 data = kvm_read_edx_eax(vcpu);
2047                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2048                         kvm_skip_emulated_instruction(vcpu);
2049                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2050                 }
2051                 break;
2052         case MSR_IA32_TSC_DEADLINE:
2053                 data = kvm_read_edx_eax(vcpu);
2054                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2055                         kvm_skip_emulated_instruction(vcpu);
2056                         ret = EXIT_FASTPATH_REENTER_GUEST;
2057                 }
2058                 break;
2059         default:
2060                 break;
2061         }
2062
2063         if (ret != EXIT_FASTPATH_NONE)
2064                 trace_kvm_msr_write(msr, data);
2065
2066         return ret;
2067 }
2068 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2069
2070 /*
2071  * Adapt set_msr() to msr_io()'s calling convention
2072  */
2073 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2074 {
2075         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2076 }
2077
2078 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2079 {
2080         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2081 }
2082
2083 #ifdef CONFIG_X86_64
2084 struct pvclock_clock {
2085         int vclock_mode;
2086         u64 cycle_last;
2087         u64 mask;
2088         u32 mult;
2089         u32 shift;
2090         u64 base_cycles;
2091         u64 offset;
2092 };
2093
2094 struct pvclock_gtod_data {
2095         seqcount_t      seq;
2096
2097         struct pvclock_clock clock; /* extract of a clocksource struct */
2098         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2099
2100         ktime_t         offs_boot;
2101         u64             wall_time_sec;
2102 };
2103
2104 static struct pvclock_gtod_data pvclock_gtod_data;
2105
2106 static void update_pvclock_gtod(struct timekeeper *tk)
2107 {
2108         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2109
2110         write_seqcount_begin(&vdata->seq);
2111
2112         /* copy pvclock gtod data */
2113         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2114         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2115         vdata->clock.mask               = tk->tkr_mono.mask;
2116         vdata->clock.mult               = tk->tkr_mono.mult;
2117         vdata->clock.shift              = tk->tkr_mono.shift;
2118         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2119         vdata->clock.offset             = tk->tkr_mono.base;
2120
2121         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2122         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2123         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2124         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2125         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2126         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2127         vdata->raw_clock.offset         = tk->tkr_raw.base;
2128
2129         vdata->wall_time_sec            = tk->xtime_sec;
2130
2131         vdata->offs_boot                = tk->offs_boot;
2132
2133         write_seqcount_end(&vdata->seq);
2134 }
2135
2136 static s64 get_kvmclock_base_ns(void)
2137 {
2138         /* Count up from boot time, but with the frequency of the raw clock.  */
2139         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2140 }
2141 #else
2142 static s64 get_kvmclock_base_ns(void)
2143 {
2144         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2145         return ktime_get_boottime_ns();
2146 }
2147 #endif
2148
2149 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2150 {
2151         int version;
2152         int r;
2153         struct pvclock_wall_clock wc;
2154         u32 wc_sec_hi;
2155         u64 wall_nsec;
2156
2157         if (!wall_clock)
2158                 return;
2159
2160         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2161         if (r)
2162                 return;
2163
2164         if (version & 1)
2165                 ++version;  /* first time write, random junk */
2166
2167         ++version;
2168
2169         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2170                 return;
2171
2172         /*
2173          * The guest calculates current wall clock time by adding
2174          * system time (updated by kvm_guest_time_update below) to the
2175          * wall clock specified here.  We do the reverse here.
2176          */
2177         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2178
2179         wc.nsec = do_div(wall_nsec, 1000000000);
2180         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2181         wc.version = version;
2182
2183         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2184
2185         if (sec_hi_ofs) {
2186                 wc_sec_hi = wall_nsec >> 32;
2187                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2188                                 &wc_sec_hi, sizeof(wc_sec_hi));
2189         }
2190
2191         version++;
2192         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2193 }
2194
2195 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2196                                   bool old_msr, bool host_initiated)
2197 {
2198         struct kvm_arch *ka = &vcpu->kvm->arch;
2199
2200         if (vcpu->vcpu_id == 0 && !host_initiated) {
2201                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2202                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2203
2204                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2205         }
2206
2207         vcpu->arch.time = system_time;
2208         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2209
2210         /* we verify if the enable bit is set... */
2211         vcpu->arch.pv_time_enabled = false;
2212         if (!(system_time & 1))
2213                 return;
2214
2215         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2216                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2217                                        sizeof(struct pvclock_vcpu_time_info)))
2218                 vcpu->arch.pv_time_enabled = true;
2219
2220         return;
2221 }
2222
2223 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2224 {
2225         do_shl32_div32(dividend, divisor);
2226         return dividend;
2227 }
2228
2229 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2230                                s8 *pshift, u32 *pmultiplier)
2231 {
2232         uint64_t scaled64;
2233         int32_t  shift = 0;
2234         uint64_t tps64;
2235         uint32_t tps32;
2236
2237         tps64 = base_hz;
2238         scaled64 = scaled_hz;
2239         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2240                 tps64 >>= 1;
2241                 shift--;
2242         }
2243
2244         tps32 = (uint32_t)tps64;
2245         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2246                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2247                         scaled64 >>= 1;
2248                 else
2249                         tps32 <<= 1;
2250                 shift++;
2251         }
2252
2253         *pshift = shift;
2254         *pmultiplier = div_frac(scaled64, tps32);
2255 }
2256
2257 #ifdef CONFIG_X86_64
2258 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2259 #endif
2260
2261 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2262 static unsigned long max_tsc_khz;
2263
2264 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2265 {
2266         u64 v = (u64)khz * (1000000 + ppm);
2267         do_div(v, 1000000);
2268         return v;
2269 }
2270
2271 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2272
2273 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2274 {
2275         u64 ratio;
2276
2277         /* Guest TSC same frequency as host TSC? */
2278         if (!scale) {
2279                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2280                 return 0;
2281         }
2282
2283         /* TSC scaling supported? */
2284         if (!kvm_has_tsc_control) {
2285                 if (user_tsc_khz > tsc_khz) {
2286                         vcpu->arch.tsc_catchup = 1;
2287                         vcpu->arch.tsc_always_catchup = 1;
2288                         return 0;
2289                 } else {
2290                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2291                         return -1;
2292                 }
2293         }
2294
2295         /* TSC scaling required  - calculate ratio */
2296         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2297                                 user_tsc_khz, tsc_khz);
2298
2299         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2300                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2301                                     user_tsc_khz);
2302                 return -1;
2303         }
2304
2305         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2306         return 0;
2307 }
2308
2309 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2310 {
2311         u32 thresh_lo, thresh_hi;
2312         int use_scaling = 0;
2313
2314         /* tsc_khz can be zero if TSC calibration fails */
2315         if (user_tsc_khz == 0) {
2316                 /* set tsc_scaling_ratio to a safe value */
2317                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2318                 return -1;
2319         }
2320
2321         /* Compute a scale to convert nanoseconds in TSC cycles */
2322         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2323                            &vcpu->arch.virtual_tsc_shift,
2324                            &vcpu->arch.virtual_tsc_mult);
2325         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2326
2327         /*
2328          * Compute the variation in TSC rate which is acceptable
2329          * within the range of tolerance and decide if the
2330          * rate being applied is within that bounds of the hardware
2331          * rate.  If so, no scaling or compensation need be done.
2332          */
2333         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2334         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2335         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2336                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2337                 use_scaling = 1;
2338         }
2339         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2340 }
2341
2342 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2343 {
2344         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2345                                       vcpu->arch.virtual_tsc_mult,
2346                                       vcpu->arch.virtual_tsc_shift);
2347         tsc += vcpu->arch.this_tsc_write;
2348         return tsc;
2349 }
2350
2351 static inline int gtod_is_based_on_tsc(int mode)
2352 {
2353         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2354 }
2355
2356 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2357 {
2358 #ifdef CONFIG_X86_64
2359         bool vcpus_matched;
2360         struct kvm_arch *ka = &vcpu->kvm->arch;
2361         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2362
2363         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2364                          atomic_read(&vcpu->kvm->online_vcpus));
2365
2366         /*
2367          * Once the masterclock is enabled, always perform request in
2368          * order to update it.
2369          *
2370          * In order to enable masterclock, the host clocksource must be TSC
2371          * and the vcpus need to have matched TSCs.  When that happens,
2372          * perform request to enable masterclock.
2373          */
2374         if (ka->use_master_clock ||
2375             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2376                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2377
2378         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2379                             atomic_read(&vcpu->kvm->online_vcpus),
2380                             ka->use_master_clock, gtod->clock.vclock_mode);
2381 #endif
2382 }
2383
2384 /*
2385  * Multiply tsc by a fixed point number represented by ratio.
2386  *
2387  * The most significant 64-N bits (mult) of ratio represent the
2388  * integral part of the fixed point number; the remaining N bits
2389  * (frac) represent the fractional part, ie. ratio represents a fixed
2390  * point number (mult + frac * 2^(-N)).
2391  *
2392  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2393  */
2394 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2395 {
2396         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2397 }
2398
2399 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2400 {
2401         u64 _tsc = tsc;
2402
2403         if (ratio != kvm_default_tsc_scaling_ratio)
2404                 _tsc = __scale_tsc(ratio, tsc);
2405
2406         return _tsc;
2407 }
2408 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2409
2410 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2411 {
2412         u64 tsc;
2413
2414         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2415
2416         return target_tsc - tsc;
2417 }
2418
2419 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2420 {
2421         return vcpu->arch.l1_tsc_offset +
2422                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2423 }
2424 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2425
2426 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2427 {
2428         u64 nested_offset;
2429
2430         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2431                 nested_offset = l1_offset;
2432         else
2433                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2434                                                 kvm_tsc_scaling_ratio_frac_bits);
2435
2436         nested_offset += l2_offset;
2437         return nested_offset;
2438 }
2439 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2440
2441 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2442 {
2443         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2444                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2445                                        kvm_tsc_scaling_ratio_frac_bits);
2446
2447         return l1_multiplier;
2448 }
2449 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2450
2451 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2452 {
2453         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2454                                    vcpu->arch.l1_tsc_offset,
2455                                    l1_offset);
2456
2457         vcpu->arch.l1_tsc_offset = l1_offset;
2458
2459         /*
2460          * If we are here because L1 chose not to trap WRMSR to TSC then
2461          * according to the spec this should set L1's TSC (as opposed to
2462          * setting L1's offset for L2).
2463          */
2464         if (is_guest_mode(vcpu))
2465                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2466                         l1_offset,
2467                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2468                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2469         else
2470                 vcpu->arch.tsc_offset = l1_offset;
2471
2472         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2473 }
2474
2475 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2476 {
2477         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2478
2479         /* Userspace is changing the multiplier while L2 is active */
2480         if (is_guest_mode(vcpu))
2481                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2482                         l1_multiplier,
2483                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2484         else
2485                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2486
2487         if (kvm_has_tsc_control)
2488                 static_call(kvm_x86_write_tsc_multiplier)(
2489                         vcpu, vcpu->arch.tsc_scaling_ratio);
2490 }
2491
2492 static inline bool kvm_check_tsc_unstable(void)
2493 {
2494 #ifdef CONFIG_X86_64
2495         /*
2496          * TSC is marked unstable when we're running on Hyper-V,
2497          * 'TSC page' clocksource is good.
2498          */
2499         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2500                 return false;
2501 #endif
2502         return check_tsc_unstable();
2503 }
2504
2505 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2506 {
2507         struct kvm *kvm = vcpu->kvm;
2508         u64 offset, ns, elapsed;
2509         unsigned long flags;
2510         bool matched;
2511         bool already_matched;
2512         bool synchronizing = false;
2513
2514         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2515         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2516         ns = get_kvmclock_base_ns();
2517         elapsed = ns - kvm->arch.last_tsc_nsec;
2518
2519         if (vcpu->arch.virtual_tsc_khz) {
2520                 if (data == 0) {
2521                         /*
2522                          * detection of vcpu initialization -- need to sync
2523                          * with other vCPUs. This particularly helps to keep
2524                          * kvm_clock stable after CPU hotplug
2525                          */
2526                         synchronizing = true;
2527                 } else {
2528                         u64 tsc_exp = kvm->arch.last_tsc_write +
2529                                                 nsec_to_cycles(vcpu, elapsed);
2530                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2531                         /*
2532                          * Special case: TSC write with a small delta (1 second)
2533                          * of virtual cycle time against real time is
2534                          * interpreted as an attempt to synchronize the CPU.
2535                          */
2536                         synchronizing = data < tsc_exp + tsc_hz &&
2537                                         data + tsc_hz > tsc_exp;
2538                 }
2539         }
2540
2541         /*
2542          * For a reliable TSC, we can match TSC offsets, and for an unstable
2543          * TSC, we add elapsed time in this computation.  We could let the
2544          * compensation code attempt to catch up if we fall behind, but
2545          * it's better to try to match offsets from the beginning.
2546          */
2547         if (synchronizing &&
2548             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2549                 if (!kvm_check_tsc_unstable()) {
2550                         offset = kvm->arch.cur_tsc_offset;
2551                 } else {
2552                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2553                         data += delta;
2554                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2555                 }
2556                 matched = true;
2557                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2558         } else {
2559                 /*
2560                  * We split periods of matched TSC writes into generations.
2561                  * For each generation, we track the original measured
2562                  * nanosecond time, offset, and write, so if TSCs are in
2563                  * sync, we can match exact offset, and if not, we can match
2564                  * exact software computation in compute_guest_tsc()
2565                  *
2566                  * These values are tracked in kvm->arch.cur_xxx variables.
2567                  */
2568                 kvm->arch.cur_tsc_generation++;
2569                 kvm->arch.cur_tsc_nsec = ns;
2570                 kvm->arch.cur_tsc_write = data;
2571                 kvm->arch.cur_tsc_offset = offset;
2572                 matched = false;
2573         }
2574
2575         /*
2576          * We also track th most recent recorded KHZ, write and time to
2577          * allow the matching interval to be extended at each write.
2578          */
2579         kvm->arch.last_tsc_nsec = ns;
2580         kvm->arch.last_tsc_write = data;
2581         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2582
2583         vcpu->arch.last_guest_tsc = data;
2584
2585         /* Keep track of which generation this VCPU has synchronized to */
2586         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2587         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2588         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2589
2590         kvm_vcpu_write_tsc_offset(vcpu, offset);
2591         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2592
2593         raw_spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2594         if (!matched) {
2595                 kvm->arch.nr_vcpus_matched_tsc = 0;
2596         } else if (!already_matched) {
2597                 kvm->arch.nr_vcpus_matched_tsc++;
2598         }
2599
2600         kvm_track_tsc_matching(vcpu);
2601         raw_spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2602 }
2603
2604 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2605                                            s64 adjustment)
2606 {
2607         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2608         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2609 }
2610
2611 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2612 {
2613         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2614                 WARN_ON(adjustment < 0);
2615         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2616                                    vcpu->arch.l1_tsc_scaling_ratio);
2617         adjust_tsc_offset_guest(vcpu, adjustment);
2618 }
2619
2620 #ifdef CONFIG_X86_64
2621
2622 static u64 read_tsc(void)
2623 {
2624         u64 ret = (u64)rdtsc_ordered();
2625         u64 last = pvclock_gtod_data.clock.cycle_last;
2626
2627         if (likely(ret >= last))
2628                 return ret;
2629
2630         /*
2631          * GCC likes to generate cmov here, but this branch is extremely
2632          * predictable (it's just a function of time and the likely is
2633          * very likely) and there's a data dependence, so force GCC
2634          * to generate a branch instead.  I don't barrier() because
2635          * we don't actually need a barrier, and if this function
2636          * ever gets inlined it will generate worse code.
2637          */
2638         asm volatile ("");
2639         return last;
2640 }
2641
2642 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2643                           int *mode)
2644 {
2645         long v;
2646         u64 tsc_pg_val;
2647
2648         switch (clock->vclock_mode) {
2649         case VDSO_CLOCKMODE_HVCLOCK:
2650                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2651                                                   tsc_timestamp);
2652                 if (tsc_pg_val != U64_MAX) {
2653                         /* TSC page valid */
2654                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2655                         v = (tsc_pg_val - clock->cycle_last) &
2656                                 clock->mask;
2657                 } else {
2658                         /* TSC page invalid */
2659                         *mode = VDSO_CLOCKMODE_NONE;
2660                 }
2661                 break;
2662         case VDSO_CLOCKMODE_TSC:
2663                 *mode = VDSO_CLOCKMODE_TSC;
2664                 *tsc_timestamp = read_tsc();
2665                 v = (*tsc_timestamp - clock->cycle_last) &
2666                         clock->mask;
2667                 break;
2668         default:
2669                 *mode = VDSO_CLOCKMODE_NONE;
2670         }
2671
2672         if (*mode == VDSO_CLOCKMODE_NONE)
2673                 *tsc_timestamp = v = 0;
2674
2675         return v * clock->mult;
2676 }
2677
2678 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2679 {
2680         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2681         unsigned long seq;
2682         int mode;
2683         u64 ns;
2684
2685         do {
2686                 seq = read_seqcount_begin(&gtod->seq);
2687                 ns = gtod->raw_clock.base_cycles;
2688                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2689                 ns >>= gtod->raw_clock.shift;
2690                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2691         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2692         *t = ns;
2693
2694         return mode;
2695 }
2696
2697 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2698 {
2699         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2700         unsigned long seq;
2701         int mode;
2702         u64 ns;
2703
2704         do {
2705                 seq = read_seqcount_begin(&gtod->seq);
2706                 ts->tv_sec = gtod->wall_time_sec;
2707                 ns = gtod->clock.base_cycles;
2708                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2709                 ns >>= gtod->clock.shift;
2710         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2711
2712         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2713         ts->tv_nsec = ns;
2714
2715         return mode;
2716 }
2717
2718 /* returns true if host is using TSC based clocksource */
2719 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2720 {
2721         /* checked again under seqlock below */
2722         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2723                 return false;
2724
2725         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2726                                                       tsc_timestamp));
2727 }
2728
2729 /* returns true if host is using TSC based clocksource */
2730 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2731                                            u64 *tsc_timestamp)
2732 {
2733         /* checked again under seqlock below */
2734         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2735                 return false;
2736
2737         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2738 }
2739 #endif
2740
2741 /*
2742  *
2743  * Assuming a stable TSC across physical CPUS, and a stable TSC
2744  * across virtual CPUs, the following condition is possible.
2745  * Each numbered line represents an event visible to both
2746  * CPUs at the next numbered event.
2747  *
2748  * "timespecX" represents host monotonic time. "tscX" represents
2749  * RDTSC value.
2750  *
2751  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2752  *
2753  * 1.  read timespec0,tsc0
2754  * 2.                                   | timespec1 = timespec0 + N
2755  *                                      | tsc1 = tsc0 + M
2756  * 3. transition to guest               | transition to guest
2757  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2758  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2759  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2760  *
2761  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2762  *
2763  *      - ret0 < ret1
2764  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2765  *              ...
2766  *      - 0 < N - M => M < N
2767  *
2768  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2769  * always the case (the difference between two distinct xtime instances
2770  * might be smaller then the difference between corresponding TSC reads,
2771  * when updating guest vcpus pvclock areas).
2772  *
2773  * To avoid that problem, do not allow visibility of distinct
2774  * system_timestamp/tsc_timestamp values simultaneously: use a master
2775  * copy of host monotonic time values. Update that master copy
2776  * in lockstep.
2777  *
2778  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2779  *
2780  */
2781
2782 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2783 {
2784 #ifdef CONFIG_X86_64
2785         struct kvm_arch *ka = &kvm->arch;
2786         int vclock_mode;
2787         bool host_tsc_clocksource, vcpus_matched;
2788
2789         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2790                         atomic_read(&kvm->online_vcpus));
2791
2792         /*
2793          * If the host uses TSC clock, then passthrough TSC as stable
2794          * to the guest.
2795          */
2796         host_tsc_clocksource = kvm_get_time_and_clockread(
2797                                         &ka->master_kernel_ns,
2798                                         &ka->master_cycle_now);
2799
2800         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2801                                 && !ka->backwards_tsc_observed
2802                                 && !ka->boot_vcpu_runs_old_kvmclock;
2803
2804         if (ka->use_master_clock)
2805                 atomic_set(&kvm_guest_has_master_clock, 1);
2806
2807         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2808         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2809                                         vcpus_matched);
2810 #endif
2811 }
2812
2813 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2814 {
2815         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2816 }
2817
2818 static void kvm_gen_update_masterclock(struct kvm *kvm)
2819 {
2820 #ifdef CONFIG_X86_64
2821         int i;
2822         struct kvm_vcpu *vcpu;
2823         struct kvm_arch *ka = &kvm->arch;
2824         unsigned long flags;
2825
2826         kvm_hv_invalidate_tsc_page(kvm);
2827
2828         kvm_make_mclock_inprogress_request(kvm);
2829
2830         /* no guest entries from this point */
2831         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2832         pvclock_update_vm_gtod_copy(kvm);
2833         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2834
2835         kvm_for_each_vcpu(i, vcpu, kvm)
2836                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2837
2838         /* guest entries allowed */
2839         kvm_for_each_vcpu(i, vcpu, kvm)
2840                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2841 #endif
2842 }
2843
2844 u64 get_kvmclock_ns(struct kvm *kvm)
2845 {
2846         struct kvm_arch *ka = &kvm->arch;
2847         struct pvclock_vcpu_time_info hv_clock;
2848         unsigned long flags;
2849         u64 ret;
2850
2851         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2852         if (!ka->use_master_clock) {
2853                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2854                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2855         }
2856
2857         hv_clock.tsc_timestamp = ka->master_cycle_now;
2858         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2859         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2860
2861         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2862         get_cpu();
2863
2864         if (__this_cpu_read(cpu_tsc_khz)) {
2865                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2866                                    &hv_clock.tsc_shift,
2867                                    &hv_clock.tsc_to_system_mul);
2868                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2869         } else
2870                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2871
2872         put_cpu();
2873
2874         return ret;
2875 }
2876
2877 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2878                                    struct gfn_to_hva_cache *cache,
2879                                    unsigned int offset)
2880 {
2881         struct kvm_vcpu_arch *vcpu = &v->arch;
2882         struct pvclock_vcpu_time_info guest_hv_clock;
2883
2884         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2885                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2886                 return;
2887
2888         /* This VCPU is paused, but it's legal for a guest to read another
2889          * VCPU's kvmclock, so we really have to follow the specification where
2890          * it says that version is odd if data is being modified, and even after
2891          * it is consistent.
2892          *
2893          * Version field updates must be kept separate.  This is because
2894          * kvm_write_guest_cached might use a "rep movs" instruction, and
2895          * writes within a string instruction are weakly ordered.  So there
2896          * are three writes overall.
2897          *
2898          * As a small optimization, only write the version field in the first
2899          * and third write.  The vcpu->pv_time cache is still valid, because the
2900          * version field is the first in the struct.
2901          */
2902         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2903
2904         if (guest_hv_clock.version & 1)
2905                 ++guest_hv_clock.version;  /* first time write, random junk */
2906
2907         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2908         kvm_write_guest_offset_cached(v->kvm, cache,
2909                                       &vcpu->hv_clock, offset,
2910                                       sizeof(vcpu->hv_clock.version));
2911
2912         smp_wmb();
2913
2914         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2915         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2916
2917         if (vcpu->pvclock_set_guest_stopped_request) {
2918                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2919                 vcpu->pvclock_set_guest_stopped_request = false;
2920         }
2921
2922         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2923
2924         kvm_write_guest_offset_cached(v->kvm, cache,
2925                                       &vcpu->hv_clock, offset,
2926                                       sizeof(vcpu->hv_clock));
2927
2928         smp_wmb();
2929
2930         vcpu->hv_clock.version++;
2931         kvm_write_guest_offset_cached(v->kvm, cache,
2932                                      &vcpu->hv_clock, offset,
2933                                      sizeof(vcpu->hv_clock.version));
2934 }
2935
2936 static int kvm_guest_time_update(struct kvm_vcpu *v)
2937 {
2938         unsigned long flags, tgt_tsc_khz;
2939         struct kvm_vcpu_arch *vcpu = &v->arch;
2940         struct kvm_arch *ka = &v->kvm->arch;
2941         s64 kernel_ns;
2942         u64 tsc_timestamp, host_tsc;
2943         u8 pvclock_flags;
2944         bool use_master_clock;
2945
2946         kernel_ns = 0;
2947         host_tsc = 0;
2948
2949         /*
2950          * If the host uses TSC clock, then passthrough TSC as stable
2951          * to the guest.
2952          */
2953         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2954         use_master_clock = ka->use_master_clock;
2955         if (use_master_clock) {
2956                 host_tsc = ka->master_cycle_now;
2957                 kernel_ns = ka->master_kernel_ns;
2958         }
2959         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2960
2961         /* Keep irq disabled to prevent changes to the clock */
2962         local_irq_save(flags);
2963         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2964         if (unlikely(tgt_tsc_khz == 0)) {
2965                 local_irq_restore(flags);
2966                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2967                 return 1;
2968         }
2969         if (!use_master_clock) {
2970                 host_tsc = rdtsc();
2971                 kernel_ns = get_kvmclock_base_ns();
2972         }
2973
2974         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2975
2976         /*
2977          * We may have to catch up the TSC to match elapsed wall clock
2978          * time for two reasons, even if kvmclock is used.
2979          *   1) CPU could have been running below the maximum TSC rate
2980          *   2) Broken TSC compensation resets the base at each VCPU
2981          *      entry to avoid unknown leaps of TSC even when running
2982          *      again on the same CPU.  This may cause apparent elapsed
2983          *      time to disappear, and the guest to stand still or run
2984          *      very slowly.
2985          */
2986         if (vcpu->tsc_catchup) {
2987                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2988                 if (tsc > tsc_timestamp) {
2989                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2990                         tsc_timestamp = tsc;
2991                 }
2992         }
2993
2994         local_irq_restore(flags);
2995
2996         /* With all the info we got, fill in the values */
2997
2998         if (kvm_has_tsc_control)
2999                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3000                                             v->arch.l1_tsc_scaling_ratio);
3001
3002         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3003                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3004                                    &vcpu->hv_clock.tsc_shift,
3005                                    &vcpu->hv_clock.tsc_to_system_mul);
3006                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3007         }
3008
3009         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3010         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3011         vcpu->last_guest_tsc = tsc_timestamp;
3012
3013         /* If the host uses TSC clocksource, then it is stable */
3014         pvclock_flags = 0;
3015         if (use_master_clock)
3016                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3017
3018         vcpu->hv_clock.flags = pvclock_flags;
3019
3020         if (vcpu->pv_time_enabled)
3021                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3022         if (vcpu->xen.vcpu_info_set)
3023                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3024                                        offsetof(struct compat_vcpu_info, time));
3025         if (vcpu->xen.vcpu_time_info_set)
3026                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3027         if (!v->vcpu_idx)
3028                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3029         return 0;
3030 }
3031
3032 /*
3033  * kvmclock updates which are isolated to a given vcpu, such as
3034  * vcpu->cpu migration, should not allow system_timestamp from
3035  * the rest of the vcpus to remain static. Otherwise ntp frequency
3036  * correction applies to one vcpu's system_timestamp but not
3037  * the others.
3038  *
3039  * So in those cases, request a kvmclock update for all vcpus.
3040  * We need to rate-limit these requests though, as they can
3041  * considerably slow guests that have a large number of vcpus.
3042  * The time for a remote vcpu to update its kvmclock is bound
3043  * by the delay we use to rate-limit the updates.
3044  */
3045
3046 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3047
3048 static void kvmclock_update_fn(struct work_struct *work)
3049 {
3050         int i;
3051         struct delayed_work *dwork = to_delayed_work(work);
3052         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3053                                            kvmclock_update_work);
3054         struct kvm *kvm = container_of(ka, struct kvm, arch);
3055         struct kvm_vcpu *vcpu;
3056
3057         kvm_for_each_vcpu(i, vcpu, kvm) {
3058                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3059                 kvm_vcpu_kick(vcpu);
3060         }
3061 }
3062
3063 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3064 {
3065         struct kvm *kvm = v->kvm;
3066
3067         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3068         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3069                                         KVMCLOCK_UPDATE_DELAY);
3070 }
3071
3072 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3073
3074 static void kvmclock_sync_fn(struct work_struct *work)
3075 {
3076         struct delayed_work *dwork = to_delayed_work(work);
3077         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3078                                            kvmclock_sync_work);
3079         struct kvm *kvm = container_of(ka, struct kvm, arch);
3080
3081         if (!kvmclock_periodic_sync)
3082                 return;
3083
3084         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3085         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3086                                         KVMCLOCK_SYNC_PERIOD);
3087 }
3088
3089 /*
3090  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3091  */
3092 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3093 {
3094         /* McStatusWrEn enabled? */
3095         if (guest_cpuid_is_amd_or_hygon(vcpu))
3096                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3097
3098         return false;
3099 }
3100
3101 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3102 {
3103         u64 mcg_cap = vcpu->arch.mcg_cap;
3104         unsigned bank_num = mcg_cap & 0xff;
3105         u32 msr = msr_info->index;
3106         u64 data = msr_info->data;
3107
3108         switch (msr) {
3109         case MSR_IA32_MCG_STATUS:
3110                 vcpu->arch.mcg_status = data;
3111                 break;
3112         case MSR_IA32_MCG_CTL:
3113                 if (!(mcg_cap & MCG_CTL_P) &&
3114                     (data || !msr_info->host_initiated))
3115                         return 1;
3116                 if (data != 0 && data != ~(u64)0)
3117                         return 1;
3118                 vcpu->arch.mcg_ctl = data;
3119                 break;
3120         default:
3121                 if (msr >= MSR_IA32_MC0_CTL &&
3122                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3123                         u32 offset = array_index_nospec(
3124                                 msr - MSR_IA32_MC0_CTL,
3125                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3126
3127                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3128                          * some Linux kernels though clear bit 10 in bank 4 to
3129                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3130                          * this to avoid an uncatched #GP in the guest.
3131                          *
3132                          * UNIXWARE clears bit 0 of MC1_CTL to ignore
3133                          * correctable, single-bit ECC data errors.
3134                          */
3135                         if ((offset & 0x3) == 0 &&
3136                             data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3137                                 return 1;
3138
3139                         /* MCi_STATUS */
3140                         if (!msr_info->host_initiated &&
3141                             (offset & 0x3) == 1 && data != 0) {
3142                                 if (!can_set_mci_status(vcpu))
3143                                         return 1;
3144                         }
3145
3146                         vcpu->arch.mce_banks[offset] = data;
3147                         break;
3148                 }
3149                 return 1;
3150         }
3151         return 0;
3152 }
3153
3154 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3155 {
3156         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3157
3158         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3159 }
3160
3161 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3162 {
3163         gpa_t gpa = data & ~0x3f;
3164
3165         /* Bits 4:5 are reserved, Should be zero */
3166         if (data & 0x30)
3167                 return 1;
3168
3169         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3170             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3171                 return 1;
3172
3173         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3174             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3175                 return 1;
3176
3177         if (!lapic_in_kernel(vcpu))
3178                 return data ? 1 : 0;
3179
3180         vcpu->arch.apf.msr_en_val = data;
3181
3182         if (!kvm_pv_async_pf_enabled(vcpu)) {
3183                 kvm_clear_async_pf_completion_queue(vcpu);
3184                 kvm_async_pf_hash_reset(vcpu);
3185                 return 0;
3186         }
3187
3188         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3189                                         sizeof(u64)))
3190                 return 1;
3191
3192         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3193         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3194
3195         kvm_async_pf_wakeup_all(vcpu);
3196
3197         return 0;
3198 }
3199
3200 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3201 {
3202         /* Bits 8-63 are reserved */
3203         if (data >> 8)
3204                 return 1;
3205
3206         if (!lapic_in_kernel(vcpu))
3207                 return 1;
3208
3209         vcpu->arch.apf.msr_int_val = data;
3210
3211         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3212
3213         return 0;
3214 }
3215
3216 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3217 {
3218         vcpu->arch.pv_time_enabled = false;
3219         vcpu->arch.time = 0;
3220 }
3221
3222 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3223 {
3224         ++vcpu->stat.tlb_flush;
3225         static_call(kvm_x86_tlb_flush_all)(vcpu);
3226 }
3227
3228 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3229 {
3230         ++vcpu->stat.tlb_flush;
3231
3232         if (!tdp_enabled) {
3233                /*
3234                  * A TLB flush on behalf of the guest is equivalent to
3235                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3236                  * a forced sync of the shadow page tables.  Unload the
3237                  * entire MMU here and the subsequent load will sync the
3238                  * shadow page tables, and also flush the TLB.
3239                  */
3240                 kvm_mmu_unload(vcpu);
3241                 return;
3242         }
3243
3244         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3245 }
3246
3247
3248 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3249 {
3250         ++vcpu->stat.tlb_flush;
3251         static_call(kvm_x86_tlb_flush_current)(vcpu);
3252 }
3253
3254 /*
3255  * Service "local" TLB flush requests, which are specific to the current MMU
3256  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3257  * TLB flushes that are targeted at an MMU context also need to be serviced
3258  * prior before nested VM-Enter/VM-Exit.
3259  */
3260 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3261 {
3262         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3263                 kvm_vcpu_flush_tlb_current(vcpu);
3264
3265         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3266                 kvm_vcpu_flush_tlb_guest(vcpu);
3267 }
3268 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3269
3270 static void record_steal_time(struct kvm_vcpu *vcpu)
3271 {
3272         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3273         struct kvm_steal_time __user *st;
3274         struct kvm_memslots *slots;
3275         gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3276         u64 steal;
3277         u32 version;
3278
3279         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3280                 kvm_xen_runstate_set_running(vcpu);
3281                 return;
3282         }
3283
3284         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3285                 return;
3286
3287         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3288                 return;
3289
3290         slots = kvm_memslots(vcpu->kvm);
3291
3292         if (unlikely(slots->generation != ghc->generation ||
3293                      gpa != ghc->gpa ||
3294                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3295                 /* We rely on the fact that it fits in a single page. */
3296                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3297
3298                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gpa, sizeof(*st)) ||
3299                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3300                         return;
3301         }
3302
3303         st = (struct kvm_steal_time __user *)ghc->hva;
3304         /*
3305          * Doing a TLB flush here, on the guest's behalf, can avoid
3306          * expensive IPIs.
3307          */
3308         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3309                 u8 st_preempted = 0;
3310                 int err = -EFAULT;
3311
3312                 if (!user_access_begin(st, sizeof(*st)))
3313                         return;
3314
3315                 asm volatile("1: xchgb %0, %2\n"
3316                              "xor %1, %1\n"
3317                              "2:\n"
3318                              _ASM_EXTABLE_UA(1b, 2b)
3319                              : "+q" (st_preempted),
3320                                "+&r" (err),
3321                                "+m" (st->preempted));
3322                 if (err)
3323                         goto out;
3324
3325                 user_access_end();
3326
3327                 vcpu->arch.st.preempted = 0;
3328
3329                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3330                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3331                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3332                         kvm_vcpu_flush_tlb_guest(vcpu);
3333
3334                 if (!user_access_begin(st, sizeof(*st)))
3335                         goto dirty;
3336         } else {
3337                 if (!user_access_begin(st, sizeof(*st)))
3338                         return;
3339
3340                 unsafe_put_user(0, &st->preempted, out);
3341                 vcpu->arch.st.preempted = 0;
3342         }
3343
3344         unsafe_get_user(version, &st->version, out);
3345         if (version & 1)
3346                 version += 1;  /* first time write, random junk */
3347
3348         version += 1;
3349         unsafe_put_user(version, &st->version, out);
3350
3351         smp_wmb();
3352
3353         unsafe_get_user(steal, &st->steal, out);
3354         steal += current->sched_info.run_delay -
3355                 vcpu->arch.st.last_steal;
3356         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3357         unsafe_put_user(steal, &st->steal, out);
3358
3359         version += 1;
3360         unsafe_put_user(version, &st->version, out);
3361
3362  out:
3363         user_access_end();
3364  dirty:
3365         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3366 }
3367
3368 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3369 {
3370         bool pr = false;
3371         u32 msr = msr_info->index;
3372         u64 data = msr_info->data;
3373
3374         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3375                 return kvm_xen_write_hypercall_page(vcpu, data);
3376
3377         switch (msr) {
3378         case MSR_AMD64_NB_CFG:
3379         case MSR_IA32_UCODE_WRITE:
3380         case MSR_VM_HSAVE_PA:
3381         case MSR_AMD64_PATCH_LOADER:
3382         case MSR_AMD64_BU_CFG2:
3383         case MSR_AMD64_DC_CFG:
3384         case MSR_F15H_EX_CFG:
3385                 break;
3386
3387         case MSR_IA32_UCODE_REV:
3388                 if (msr_info->host_initiated)
3389                         vcpu->arch.microcode_version = data;
3390                 break;
3391         case MSR_IA32_ARCH_CAPABILITIES:
3392                 if (!msr_info->host_initiated)
3393                         return 1;
3394                 vcpu->arch.arch_capabilities = data;
3395                 break;
3396         case MSR_IA32_PERF_CAPABILITIES: {
3397                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3398
3399                 if (!msr_info->host_initiated)
3400                         return 1;
3401                 if (kvm_get_msr_feature(&msr_ent))
3402                         return 1;
3403                 if (data & ~msr_ent.data)
3404                         return 1;
3405
3406                 vcpu->arch.perf_capabilities = data;
3407
3408                 return 0;
3409                 }
3410         case MSR_EFER:
3411                 return set_efer(vcpu, msr_info);
3412         case MSR_K7_HWCR:
3413                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3414                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3415                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3416
3417                 /* Handle McStatusWrEn */
3418                 if (data == BIT_ULL(18)) {
3419                         vcpu->arch.msr_hwcr = data;
3420                 } else if (data != 0) {
3421                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3422                                     data);
3423                         return 1;
3424                 }
3425                 break;
3426         case MSR_FAM10H_MMIO_CONF_BASE:
3427                 if (data != 0) {
3428                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3429                                     "0x%llx\n", data);
3430                         return 1;
3431                 }
3432                 break;
3433         case 0x200 ... 0x2ff:
3434                 return kvm_mtrr_set_msr(vcpu, msr, data);
3435         case MSR_IA32_APICBASE:
3436                 return kvm_set_apic_base(vcpu, msr_info);
3437         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3438                 return kvm_x2apic_msr_write(vcpu, msr, data);
3439         case MSR_IA32_TSC_DEADLINE:
3440                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3441                 break;
3442         case MSR_IA32_TSC_ADJUST:
3443                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3444                         if (!msr_info->host_initiated) {
3445                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3446                                 adjust_tsc_offset_guest(vcpu, adj);
3447                                 /* Before back to guest, tsc_timestamp must be adjusted
3448                                  * as well, otherwise guest's percpu pvclock time could jump.
3449                                  */
3450                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3451                         }
3452                         vcpu->arch.ia32_tsc_adjust_msr = data;
3453                 }
3454                 break;
3455         case MSR_IA32_MISC_ENABLE:
3456                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3457                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3458                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3459                                 return 1;
3460                         vcpu->arch.ia32_misc_enable_msr = data;
3461                         kvm_update_cpuid_runtime(vcpu);
3462                 } else {
3463                         vcpu->arch.ia32_misc_enable_msr = data;
3464                 }
3465                 break;
3466         case MSR_IA32_SMBASE:
3467                 if (!msr_info->host_initiated)
3468                         return 1;
3469                 vcpu->arch.smbase = data;
3470                 break;
3471         case MSR_IA32_POWER_CTL:
3472                 vcpu->arch.msr_ia32_power_ctl = data;
3473                 break;
3474         case MSR_IA32_TSC:
3475                 if (msr_info->host_initiated) {
3476                         kvm_synchronize_tsc(vcpu, data);
3477                 } else {
3478                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3479                         adjust_tsc_offset_guest(vcpu, adj);
3480                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3481                 }
3482                 break;
3483         case MSR_IA32_XSS:
3484                 if (!msr_info->host_initiated &&
3485                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3486                         return 1;
3487                 /*
3488                  * KVM supports exposing PT to the guest, but does not support
3489                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3490                  * XSAVES/XRSTORS to save/restore PT MSRs.
3491                  */
3492                 if (data & ~supported_xss)
3493                         return 1;
3494                 vcpu->arch.ia32_xss = data;
3495                 kvm_update_cpuid_runtime(vcpu);
3496                 break;
3497         case MSR_SMI_COUNT:
3498                 if (!msr_info->host_initiated)
3499                         return 1;
3500                 vcpu->arch.smi_count = data;
3501                 break;
3502         case MSR_KVM_WALL_CLOCK_NEW:
3503                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3504                         return 1;
3505
3506                 vcpu->kvm->arch.wall_clock = data;
3507                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3508                 break;
3509         case MSR_KVM_WALL_CLOCK:
3510                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3511                         return 1;
3512
3513                 vcpu->kvm->arch.wall_clock = data;
3514                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3515                 break;
3516         case MSR_KVM_SYSTEM_TIME_NEW:
3517                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3518                         return 1;
3519
3520                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3521                 break;
3522         case MSR_KVM_SYSTEM_TIME:
3523                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3524                         return 1;
3525
3526                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3527                 break;
3528         case MSR_KVM_ASYNC_PF_EN:
3529                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3530                         return 1;
3531
3532                 if (kvm_pv_enable_async_pf(vcpu, data))
3533                         return 1;
3534                 break;
3535         case MSR_KVM_ASYNC_PF_INT:
3536                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3537                         return 1;
3538
3539                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3540                         return 1;
3541                 break;
3542         case MSR_KVM_ASYNC_PF_ACK:
3543                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3544                         return 1;
3545                 if (data & 0x1) {
3546                         vcpu->arch.apf.pageready_pending = false;
3547                         kvm_check_async_pf_completion(vcpu);
3548                 }
3549                 break;
3550         case MSR_KVM_STEAL_TIME:
3551                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3552                         return 1;
3553
3554                 if (unlikely(!sched_info_on()))
3555                         return 1;
3556
3557                 if (data & KVM_STEAL_RESERVED_MASK)
3558                         return 1;
3559
3560                 vcpu->arch.st.msr_val = data;
3561
3562                 if (!(data & KVM_MSR_ENABLED))
3563                         break;
3564
3565                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3566
3567                 break;
3568         case MSR_KVM_PV_EOI_EN:
3569                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3570                         return 1;
3571
3572                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3573                         return 1;
3574                 break;
3575
3576         case MSR_KVM_POLL_CONTROL:
3577                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3578                         return 1;
3579
3580                 /* only enable bit supported */
3581                 if (data & (-1ULL << 1))
3582                         return 1;
3583
3584                 vcpu->arch.msr_kvm_poll_control = data;
3585                 break;
3586
3587         case MSR_IA32_MCG_CTL:
3588         case MSR_IA32_MCG_STATUS:
3589         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3590                 return set_msr_mce(vcpu, msr_info);
3591
3592         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3593         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3594                 pr = true;
3595                 fallthrough;
3596         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3597         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3598                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3599                         return kvm_pmu_set_msr(vcpu, msr_info);
3600
3601                 if (pr || data != 0)
3602                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3603                                     "0x%x data 0x%llx\n", msr, data);
3604                 break;
3605         case MSR_K7_CLK_CTL:
3606                 /*
3607                  * Ignore all writes to this no longer documented MSR.
3608                  * Writes are only relevant for old K7 processors,
3609                  * all pre-dating SVM, but a recommended workaround from
3610                  * AMD for these chips. It is possible to specify the
3611                  * affected processor models on the command line, hence
3612                  * the need to ignore the workaround.
3613                  */
3614                 break;
3615         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3616         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3617         case HV_X64_MSR_SYNDBG_OPTIONS:
3618         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3619         case HV_X64_MSR_CRASH_CTL:
3620         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3621         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3622         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3623         case HV_X64_MSR_TSC_EMULATION_STATUS:
3624                 return kvm_hv_set_msr_common(vcpu, msr, data,
3625                                              msr_info->host_initiated);
3626         case MSR_IA32_BBL_CR_CTL3:
3627                 /* Drop writes to this legacy MSR -- see rdmsr
3628                  * counterpart for further detail.
3629                  */
3630                 if (report_ignored_msrs)
3631                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3632                                 msr, data);
3633                 break;
3634         case MSR_AMD64_OSVW_ID_LENGTH:
3635                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3636                         return 1;
3637                 vcpu->arch.osvw.length = data;
3638                 break;
3639         case MSR_AMD64_OSVW_STATUS:
3640                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3641                         return 1;
3642                 vcpu->arch.osvw.status = data;
3643                 break;
3644         case MSR_PLATFORM_INFO:
3645                 if (!msr_info->host_initiated ||
3646                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3647                      cpuid_fault_enabled(vcpu)))
3648                         return 1;
3649                 vcpu->arch.msr_platform_info = data;
3650                 break;
3651         case MSR_MISC_FEATURES_ENABLES:
3652                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3653                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3654                      !supports_cpuid_fault(vcpu)))
3655                         return 1;
3656                 vcpu->arch.msr_misc_features_enables = data;
3657                 break;
3658         default:
3659                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3660                         return kvm_pmu_set_msr(vcpu, msr_info);
3661                 return KVM_MSR_RET_INVALID;
3662         }
3663         return 0;
3664 }
3665 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3666
3667 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3668 {
3669         u64 data;
3670         u64 mcg_cap = vcpu->arch.mcg_cap;
3671         unsigned bank_num = mcg_cap & 0xff;
3672
3673         switch (msr) {
3674         case MSR_IA32_P5_MC_ADDR:
3675         case MSR_IA32_P5_MC_TYPE:
3676                 data = 0;
3677                 break;
3678         case MSR_IA32_MCG_CAP:
3679                 data = vcpu->arch.mcg_cap;
3680                 break;
3681         case MSR_IA32_MCG_CTL:
3682                 if (!(mcg_cap & MCG_CTL_P) && !host)
3683                         return 1;
3684                 data = vcpu->arch.mcg_ctl;
3685                 break;
3686         case MSR_IA32_MCG_STATUS:
3687                 data = vcpu->arch.mcg_status;
3688                 break;
3689         default:
3690                 if (msr >= MSR_IA32_MC0_CTL &&
3691                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3692                         u32 offset = array_index_nospec(
3693                                 msr - MSR_IA32_MC0_CTL,
3694                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3695
3696                         data = vcpu->arch.mce_banks[offset];
3697                         break;
3698                 }
3699                 return 1;
3700         }
3701         *pdata = data;
3702         return 0;
3703 }
3704
3705 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3706 {
3707         switch (msr_info->index) {
3708         case MSR_IA32_PLATFORM_ID:
3709         case MSR_IA32_EBL_CR_POWERON:
3710         case MSR_IA32_LASTBRANCHFROMIP:
3711         case MSR_IA32_LASTBRANCHTOIP:
3712         case MSR_IA32_LASTINTFROMIP:
3713         case MSR_IA32_LASTINTTOIP:
3714         case MSR_AMD64_SYSCFG:
3715         case MSR_K8_TSEG_ADDR:
3716         case MSR_K8_TSEG_MASK:
3717         case MSR_VM_HSAVE_PA:
3718         case MSR_K8_INT_PENDING_MSG:
3719         case MSR_AMD64_NB_CFG:
3720         case MSR_FAM10H_MMIO_CONF_BASE:
3721         case MSR_AMD64_BU_CFG2:
3722         case MSR_IA32_PERF_CTL:
3723         case MSR_AMD64_DC_CFG:
3724         case MSR_F15H_EX_CFG:
3725         /*
3726          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3727          * limit) MSRs. Just return 0, as we do not want to expose the host
3728          * data here. Do not conditionalize this on CPUID, as KVM does not do
3729          * so for existing CPU-specific MSRs.
3730          */
3731         case MSR_RAPL_POWER_UNIT:
3732         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3733         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3734         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3735         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3736                 msr_info->data = 0;
3737                 break;
3738         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3739                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3740                         return kvm_pmu_get_msr(vcpu, msr_info);
3741                 if (!msr_info->host_initiated)
3742                         return 1;
3743                 msr_info->data = 0;
3744                 break;
3745         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3746         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3747         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3748         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3749                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3750                         return kvm_pmu_get_msr(vcpu, msr_info);
3751                 msr_info->data = 0;
3752                 break;
3753         case MSR_IA32_UCODE_REV:
3754                 msr_info->data = vcpu->arch.microcode_version;
3755                 break;
3756         case MSR_IA32_ARCH_CAPABILITIES:
3757                 if (!msr_info->host_initiated &&
3758                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3759                         return 1;
3760                 msr_info->data = vcpu->arch.arch_capabilities;
3761                 break;
3762         case MSR_IA32_PERF_CAPABILITIES:
3763                 if (!msr_info->host_initiated &&
3764                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3765                         return 1;
3766                 msr_info->data = vcpu->arch.perf_capabilities;
3767                 break;
3768         case MSR_IA32_POWER_CTL:
3769                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3770                 break;
3771         case MSR_IA32_TSC: {
3772                 /*
3773                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3774                  * even when not intercepted. AMD manual doesn't explicitly
3775                  * state this but appears to behave the same.
3776                  *
3777                  * On userspace reads and writes, however, we unconditionally
3778                  * return L1's TSC value to ensure backwards-compatible
3779                  * behavior for migration.
3780                  */
3781                 u64 offset, ratio;
3782
3783                 if (msr_info->host_initiated) {
3784                         offset = vcpu->arch.l1_tsc_offset;
3785                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3786                 } else {
3787                         offset = vcpu->arch.tsc_offset;
3788                         ratio = vcpu->arch.tsc_scaling_ratio;
3789                 }
3790
3791                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3792                 break;
3793         }
3794         case MSR_MTRRcap:
3795         case 0x200 ... 0x2ff:
3796                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3797         case 0xcd: /* fsb frequency */
3798                 msr_info->data = 3;
3799                 break;
3800                 /*
3801                  * MSR_EBC_FREQUENCY_ID
3802                  * Conservative value valid for even the basic CPU models.
3803                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3804                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3805                  * and 266MHz for model 3, or 4. Set Core Clock
3806                  * Frequency to System Bus Frequency Ratio to 1 (bits
3807                  * 31:24) even though these are only valid for CPU
3808                  * models > 2, however guests may end up dividing or
3809                  * multiplying by zero otherwise.
3810                  */
3811         case MSR_EBC_FREQUENCY_ID:
3812                 msr_info->data = 1 << 24;
3813                 break;
3814         case MSR_IA32_APICBASE:
3815                 msr_info->data = kvm_get_apic_base(vcpu);
3816                 break;
3817         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3818                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3819         case MSR_IA32_TSC_DEADLINE:
3820                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3821                 break;
3822         case MSR_IA32_TSC_ADJUST:
3823                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3824                 break;
3825         case MSR_IA32_MISC_ENABLE:
3826                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3827                 break;
3828         case MSR_IA32_SMBASE:
3829                 if (!msr_info->host_initiated)
3830                         return 1;
3831                 msr_info->data = vcpu->arch.smbase;
3832                 break;
3833         case MSR_SMI_COUNT:
3834                 msr_info->data = vcpu->arch.smi_count;
3835                 break;
3836         case MSR_IA32_PERF_STATUS:
3837                 /* TSC increment by tick */
3838                 msr_info->data = 1000ULL;
3839                 /* CPU multiplier */
3840                 msr_info->data |= (((uint64_t)4ULL) << 40);
3841                 break;
3842         case MSR_EFER:
3843                 msr_info->data = vcpu->arch.efer;
3844                 break;
3845         case MSR_KVM_WALL_CLOCK:
3846                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3847                         return 1;
3848
3849                 msr_info->data = vcpu->kvm->arch.wall_clock;
3850                 break;
3851         case MSR_KVM_WALL_CLOCK_NEW:
3852                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3853                         return 1;
3854
3855                 msr_info->data = vcpu->kvm->arch.wall_clock;
3856                 break;
3857         case MSR_KVM_SYSTEM_TIME:
3858                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3859                         return 1;
3860
3861                 msr_info->data = vcpu->arch.time;
3862                 break;
3863         case MSR_KVM_SYSTEM_TIME_NEW:
3864                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3865                         return 1;
3866
3867                 msr_info->data = vcpu->arch.time;
3868                 break;
3869         case MSR_KVM_ASYNC_PF_EN:
3870                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3871                         return 1;
3872
3873                 msr_info->data = vcpu->arch.apf.msr_en_val;
3874                 break;
3875         case MSR_KVM_ASYNC_PF_INT:
3876                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3877                         return 1;
3878
3879                 msr_info->data = vcpu->arch.apf.msr_int_val;
3880                 break;
3881         case MSR_KVM_ASYNC_PF_ACK:
3882                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3883                         return 1;
3884
3885                 msr_info->data = 0;
3886                 break;
3887         case MSR_KVM_STEAL_TIME:
3888                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3889                         return 1;
3890
3891                 msr_info->data = vcpu->arch.st.msr_val;
3892                 break;
3893         case MSR_KVM_PV_EOI_EN:
3894                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3895                         return 1;
3896
3897                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3898                 break;
3899         case MSR_KVM_POLL_CONTROL:
3900                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3901                         return 1;
3902
3903                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3904                 break;
3905         case MSR_IA32_P5_MC_ADDR:
3906         case MSR_IA32_P5_MC_TYPE:
3907         case MSR_IA32_MCG_CAP:
3908         case MSR_IA32_MCG_CTL:
3909         case MSR_IA32_MCG_STATUS:
3910         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3911                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3912                                    msr_info->host_initiated);
3913         case MSR_IA32_XSS:
3914                 if (!msr_info->host_initiated &&
3915                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3916                         return 1;
3917                 msr_info->data = vcpu->arch.ia32_xss;
3918                 break;
3919         case MSR_K7_CLK_CTL:
3920                 /*
3921                  * Provide expected ramp-up count for K7. All other
3922                  * are set to zero, indicating minimum divisors for
3923                  * every field.
3924                  *
3925                  * This prevents guest kernels on AMD host with CPU
3926                  * type 6, model 8 and higher from exploding due to
3927                  * the rdmsr failing.
3928                  */
3929                 msr_info->data = 0x20000000;
3930                 break;
3931         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3932         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3933         case HV_X64_MSR_SYNDBG_OPTIONS:
3934         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3935         case HV_X64_MSR_CRASH_CTL:
3936         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3937         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3938         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3939         case HV_X64_MSR_TSC_EMULATION_STATUS:
3940                 return kvm_hv_get_msr_common(vcpu,
3941                                              msr_info->index, &msr_info->data,
3942                                              msr_info->host_initiated);
3943         case MSR_IA32_BBL_CR_CTL3:
3944                 /* This legacy MSR exists but isn't fully documented in current
3945                  * silicon.  It is however accessed by winxp in very narrow
3946                  * scenarios where it sets bit #19, itself documented as
3947                  * a "reserved" bit.  Best effort attempt to source coherent
3948                  * read data here should the balance of the register be
3949                  * interpreted by the guest:
3950                  *
3951                  * L2 cache control register 3: 64GB range, 256KB size,
3952                  * enabled, latency 0x1, configured
3953                  */
3954                 msr_info->data = 0xbe702111;
3955                 break;
3956         case MSR_AMD64_OSVW_ID_LENGTH:
3957                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3958                         return 1;
3959                 msr_info->data = vcpu->arch.osvw.length;
3960                 break;
3961         case MSR_AMD64_OSVW_STATUS:
3962                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3963                         return 1;
3964                 msr_info->data = vcpu->arch.osvw.status;
3965                 break;
3966         case MSR_PLATFORM_INFO:
3967                 if (!msr_info->host_initiated &&
3968                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3969                         return 1;
3970                 msr_info->data = vcpu->arch.msr_platform_info;
3971                 break;
3972         case MSR_MISC_FEATURES_ENABLES:
3973                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3974                 break;
3975         case MSR_K7_HWCR:
3976                 msr_info->data = vcpu->arch.msr_hwcr;
3977                 break;
3978         default:
3979                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3980                         return kvm_pmu_get_msr(vcpu, msr_info);
3981                 return KVM_MSR_RET_INVALID;
3982         }
3983         return 0;
3984 }
3985 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3986
3987 /*
3988  * Read or write a bunch of msrs. All parameters are kernel addresses.
3989  *
3990  * @return number of msrs set successfully.
3991  */
3992 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3993                     struct kvm_msr_entry *entries,
3994                     int (*do_msr)(struct kvm_vcpu *vcpu,
3995                                   unsigned index, u64 *data))
3996 {
3997         int i;
3998
3999         for (i = 0; i < msrs->nmsrs; ++i)
4000                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4001                         break;
4002
4003         return i;
4004 }
4005
4006 /*
4007  * Read or write a bunch of msrs. Parameters are user addresses.
4008  *
4009  * @return number of msrs set successfully.
4010  */
4011 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4012                   int (*do_msr)(struct kvm_vcpu *vcpu,
4013                                 unsigned index, u64 *data),
4014                   int writeback)
4015 {
4016         struct kvm_msrs msrs;
4017         struct kvm_msr_entry *entries;
4018         int r, n;
4019         unsigned size;
4020
4021         r = -EFAULT;
4022         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4023                 goto out;
4024
4025         r = -E2BIG;
4026         if (msrs.nmsrs >= MAX_IO_MSRS)
4027                 goto out;
4028
4029         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4030         entries = memdup_user(user_msrs->entries, size);
4031         if (IS_ERR(entries)) {
4032                 r = PTR_ERR(entries);
4033                 goto out;
4034         }
4035
4036         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4037         if (r < 0)
4038                 goto out_free;
4039
4040         r = -EFAULT;
4041         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4042                 goto out_free;
4043
4044         r = n;
4045
4046 out_free:
4047         kfree(entries);
4048 out:
4049         return r;
4050 }
4051
4052 static inline bool kvm_can_mwait_in_guest(void)
4053 {
4054         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4055                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4056                 boot_cpu_has(X86_FEATURE_ARAT);
4057 }
4058
4059 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4060                                             struct kvm_cpuid2 __user *cpuid_arg)
4061 {
4062         struct kvm_cpuid2 cpuid;
4063         int r;
4064
4065         r = -EFAULT;
4066         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4067                 return r;
4068
4069         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4070         if (r)
4071                 return r;
4072
4073         r = -EFAULT;
4074         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4075                 return r;
4076
4077         return 0;
4078 }
4079
4080 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4081 {
4082         int r = 0;
4083
4084         switch (ext) {
4085         case KVM_CAP_IRQCHIP:
4086         case KVM_CAP_HLT:
4087         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4088         case KVM_CAP_SET_TSS_ADDR:
4089         case KVM_CAP_EXT_CPUID:
4090         case KVM_CAP_EXT_EMUL_CPUID:
4091         case KVM_CAP_CLOCKSOURCE:
4092         case KVM_CAP_PIT:
4093         case KVM_CAP_NOP_IO_DELAY:
4094         case KVM_CAP_MP_STATE:
4095         case KVM_CAP_SYNC_MMU:
4096         case KVM_CAP_USER_NMI:
4097         case KVM_CAP_REINJECT_CONTROL:
4098         case KVM_CAP_IRQ_INJECT_STATUS:
4099         case KVM_CAP_IOEVENTFD:
4100         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4101         case KVM_CAP_PIT2:
4102         case KVM_CAP_PIT_STATE2:
4103         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4104         case KVM_CAP_VCPU_EVENTS:
4105         case KVM_CAP_HYPERV:
4106         case KVM_CAP_HYPERV_VAPIC:
4107         case KVM_CAP_HYPERV_SPIN:
4108         case KVM_CAP_HYPERV_SYNIC:
4109         case KVM_CAP_HYPERV_SYNIC2:
4110         case KVM_CAP_HYPERV_VP_INDEX:
4111         case KVM_CAP_HYPERV_EVENTFD:
4112         case KVM_CAP_HYPERV_TLBFLUSH:
4113         case KVM_CAP_HYPERV_SEND_IPI:
4114         case KVM_CAP_HYPERV_CPUID:
4115         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4116         case KVM_CAP_SYS_HYPERV_CPUID:
4117         case KVM_CAP_PCI_SEGMENT:
4118         case KVM_CAP_DEBUGREGS:
4119         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4120         case KVM_CAP_XSAVE:
4121         case KVM_CAP_ASYNC_PF:
4122         case KVM_CAP_ASYNC_PF_INT:
4123         case KVM_CAP_GET_TSC_KHZ:
4124         case KVM_CAP_KVMCLOCK_CTRL:
4125         case KVM_CAP_READONLY_MEM:
4126         case KVM_CAP_HYPERV_TIME:
4127         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4128         case KVM_CAP_TSC_DEADLINE_TIMER:
4129         case KVM_CAP_DISABLE_QUIRKS:
4130         case KVM_CAP_SET_BOOT_CPU_ID:
4131         case KVM_CAP_SPLIT_IRQCHIP:
4132         case KVM_CAP_IMMEDIATE_EXIT:
4133         case KVM_CAP_PMU_EVENT_FILTER:
4134         case KVM_CAP_GET_MSR_FEATURES:
4135         case KVM_CAP_MSR_PLATFORM_INFO:
4136         case KVM_CAP_EXCEPTION_PAYLOAD:
4137         case KVM_CAP_SET_GUEST_DEBUG:
4138         case KVM_CAP_LAST_CPU:
4139         case KVM_CAP_X86_USER_SPACE_MSR:
4140         case KVM_CAP_X86_MSR_FILTER:
4141         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4142 #ifdef CONFIG_X86_SGX_KVM
4143         case KVM_CAP_SGX_ATTRIBUTE:
4144 #endif
4145         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4146         case KVM_CAP_SREGS2:
4147         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4148                 r = 1;
4149                 break;
4150         case KVM_CAP_EXIT_HYPERCALL:
4151                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4152                 break;
4153         case KVM_CAP_SET_GUEST_DEBUG2:
4154                 return KVM_GUESTDBG_VALID_MASK;
4155 #ifdef CONFIG_KVM_XEN
4156         case KVM_CAP_XEN_HVM:
4157                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4158                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4159                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4160                 if (sched_info_on())
4161                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4162                 break;
4163 #endif
4164         case KVM_CAP_SYNC_REGS:
4165                 r = KVM_SYNC_X86_VALID_FIELDS;
4166                 break;
4167         case KVM_CAP_ADJUST_CLOCK:
4168                 r = KVM_CLOCK_TSC_STABLE;
4169                 break;
4170         case KVM_CAP_X86_DISABLE_EXITS:
4171                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4172                       KVM_X86_DISABLE_EXITS_CSTATE;
4173                 if(kvm_can_mwait_in_guest())
4174                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4175                 break;
4176         case KVM_CAP_X86_SMM:
4177                 /* SMBASE is usually relocated above 1M on modern chipsets,
4178                  * and SMM handlers might indeed rely on 4G segment limits,
4179                  * so do not report SMM to be available if real mode is
4180                  * emulated via vm86 mode.  Still, do not go to great lengths
4181                  * to avoid userspace's usage of the feature, because it is a
4182                  * fringe case that is not enabled except via specific settings
4183                  * of the module parameters.
4184                  */
4185                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4186                 break;
4187         case KVM_CAP_VAPIC:
4188                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4189                 break;
4190         case KVM_CAP_NR_VCPUS:
4191                 r = KVM_SOFT_MAX_VCPUS;
4192                 break;
4193         case KVM_CAP_MAX_VCPUS:
4194                 r = KVM_MAX_VCPUS;
4195                 break;
4196         case KVM_CAP_MAX_VCPU_ID:
4197                 r = KVM_MAX_VCPU_ID;
4198                 break;
4199         case KVM_CAP_PV_MMU:    /* obsolete */
4200                 r = 0;
4201                 break;
4202         case KVM_CAP_MCE:
4203                 r = KVM_MAX_MCE_BANKS;
4204                 break;
4205         case KVM_CAP_XCRS:
4206                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4207                 break;
4208         case KVM_CAP_TSC_CONTROL:
4209                 r = kvm_has_tsc_control;
4210                 break;
4211         case KVM_CAP_X2APIC_API:
4212                 r = KVM_X2APIC_API_VALID_FLAGS;
4213                 break;
4214         case KVM_CAP_NESTED_STATE:
4215                 r = kvm_x86_ops.nested_ops->get_state ?
4216                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4217                 break;
4218         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4219                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4220                 break;
4221         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4222                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4223                 break;
4224         case KVM_CAP_SMALLER_MAXPHYADDR:
4225                 r = (int) allow_smaller_maxphyaddr;
4226                 break;
4227         case KVM_CAP_STEAL_TIME:
4228                 r = sched_info_on();
4229                 break;
4230         case KVM_CAP_X86_BUS_LOCK_EXIT:
4231                 if (kvm_has_bus_lock_exit)
4232                         r = KVM_BUS_LOCK_DETECTION_OFF |
4233                             KVM_BUS_LOCK_DETECTION_EXIT;
4234                 else
4235                         r = 0;
4236                 break;
4237         default:
4238                 break;
4239         }
4240         return r;
4241
4242 }
4243
4244 long kvm_arch_dev_ioctl(struct file *filp,
4245                         unsigned int ioctl, unsigned long arg)
4246 {
4247         void __user *argp = (void __user *)arg;
4248         long r;
4249
4250         switch (ioctl) {
4251         case KVM_GET_MSR_INDEX_LIST: {
4252                 struct kvm_msr_list __user *user_msr_list = argp;
4253                 struct kvm_msr_list msr_list;
4254                 unsigned n;
4255
4256                 r = -EFAULT;
4257                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4258                         goto out;
4259                 n = msr_list.nmsrs;
4260                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4261                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4262                         goto out;
4263                 r = -E2BIG;
4264                 if (n < msr_list.nmsrs)
4265                         goto out;
4266                 r = -EFAULT;
4267                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4268                                  num_msrs_to_save * sizeof(u32)))
4269                         goto out;
4270                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4271                                  &emulated_msrs,
4272                                  num_emulated_msrs * sizeof(u32)))
4273                         goto out;
4274                 r = 0;
4275                 break;
4276         }
4277         case KVM_GET_SUPPORTED_CPUID:
4278         case KVM_GET_EMULATED_CPUID: {
4279                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4280                 struct kvm_cpuid2 cpuid;
4281
4282                 r = -EFAULT;
4283                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4284                         goto out;
4285
4286                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4287                                             ioctl);
4288                 if (r)
4289                         goto out;
4290
4291                 r = -EFAULT;
4292                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4293                         goto out;
4294                 r = 0;
4295                 break;
4296         }
4297         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4298                 r = -EFAULT;
4299                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4300                                  sizeof(kvm_mce_cap_supported)))
4301                         goto out;
4302                 r = 0;
4303                 break;
4304         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4305                 struct kvm_msr_list __user *user_msr_list = argp;
4306                 struct kvm_msr_list msr_list;
4307                 unsigned int n;
4308
4309                 r = -EFAULT;
4310                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4311                         goto out;
4312                 n = msr_list.nmsrs;
4313                 msr_list.nmsrs = num_msr_based_features;
4314                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4315                         goto out;
4316                 r = -E2BIG;
4317                 if (n < msr_list.nmsrs)
4318                         goto out;
4319                 r = -EFAULT;
4320                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4321                                  num_msr_based_features * sizeof(u32)))
4322                         goto out;
4323                 r = 0;
4324                 break;
4325         }
4326         case KVM_GET_MSRS:
4327                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4328                 break;
4329         case KVM_GET_SUPPORTED_HV_CPUID:
4330                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4331                 break;
4332         default:
4333                 r = -EINVAL;
4334                 break;
4335         }
4336 out:
4337         return r;
4338 }
4339
4340 static void wbinvd_ipi(void *garbage)
4341 {
4342         wbinvd();
4343 }
4344
4345 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4346 {
4347         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4348 }
4349
4350 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4351 {
4352         /* Address WBINVD may be executed by guest */
4353         if (need_emulate_wbinvd(vcpu)) {
4354                 if (static_call(kvm_x86_has_wbinvd_exit)())
4355                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4356                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4357                         smp_call_function_single(vcpu->cpu,
4358                                         wbinvd_ipi, NULL, 1);
4359         }
4360
4361         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4362
4363         /* Save host pkru register if supported */
4364         vcpu->arch.host_pkru = read_pkru();
4365
4366         /* Apply any externally detected TSC adjustments (due to suspend) */
4367         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4368                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4369                 vcpu->arch.tsc_offset_adjustment = 0;
4370                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4371         }
4372
4373         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4374                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4375                                 rdtsc() - vcpu->arch.last_host_tsc;
4376                 if (tsc_delta < 0)
4377                         mark_tsc_unstable("KVM discovered backwards TSC");
4378
4379                 if (kvm_check_tsc_unstable()) {
4380                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4381                                                 vcpu->arch.last_guest_tsc);
4382                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4383                         vcpu->arch.tsc_catchup = 1;
4384                 }
4385
4386                 if (kvm_lapic_hv_timer_in_use(vcpu))
4387                         kvm_lapic_restart_hv_timer(vcpu);
4388
4389                 /*
4390                  * On a host with synchronized TSC, there is no need to update
4391                  * kvmclock on vcpu->cpu migration
4392                  */
4393                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4394                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4395                 if (vcpu->cpu != cpu)
4396                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4397                 vcpu->cpu = cpu;
4398         }
4399
4400         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4401 }
4402
4403 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4404 {
4405         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4406         struct kvm_steal_time __user *st;
4407         struct kvm_memslots *slots;
4408         static const u8 preempted = KVM_VCPU_PREEMPTED;
4409         gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
4410
4411         /*
4412          * The vCPU can be marked preempted if and only if the VM-Exit was on
4413          * an instruction boundary and will not trigger guest emulation of any
4414          * kind (see vcpu_run).  Vendor specific code controls (conservatively)
4415          * when this is true, for example allowing the vCPU to be marked
4416          * preempted if and only if the VM-Exit was due to a host interrupt.
4417          */
4418         if (!vcpu->arch.at_instruction_boundary) {
4419                 vcpu->stat.preemption_other++;
4420                 return;
4421         }
4422
4423         vcpu->stat.preemption_reported++;
4424         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4425                 return;
4426
4427         if (vcpu->arch.st.preempted)
4428                 return;
4429
4430         /* This happens on process exit */
4431         if (unlikely(current->mm != vcpu->kvm->mm))
4432                 return;
4433
4434         slots = kvm_memslots(vcpu->kvm);
4435
4436         if (unlikely(slots->generation != ghc->generation ||
4437                      gpa != ghc->gpa ||
4438                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4439                 return;
4440
4441         st = (struct kvm_steal_time __user *)ghc->hva;
4442         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4443
4444         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4445                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4446
4447         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4448 }
4449
4450 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4451 {
4452         int idx;
4453
4454         if (vcpu->preempted) {
4455                 if (!vcpu->arch.guest_state_protected)
4456                         vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4457
4458                 /*
4459                  * Take the srcu lock as memslots will be accessed to check the gfn
4460                  * cache generation against the memslots generation.
4461                  */
4462                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4463                 if (kvm_xen_msr_enabled(vcpu->kvm))
4464                         kvm_xen_runstate_set_preempted(vcpu);
4465                 else
4466                         kvm_steal_time_set_preempted(vcpu);
4467                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4468         }
4469
4470         static_call(kvm_x86_vcpu_put)(vcpu);
4471         vcpu->arch.last_host_tsc = rdtsc();
4472 }
4473
4474 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4475                                     struct kvm_lapic_state *s)
4476 {
4477         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4478
4479         return kvm_apic_get_state(vcpu, s);
4480 }
4481
4482 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4483                                     struct kvm_lapic_state *s)
4484 {
4485         int r;
4486
4487         r = kvm_apic_set_state(vcpu, s);
4488         if (r)
4489                 return r;
4490         update_cr8_intercept(vcpu);
4491
4492         return 0;
4493 }
4494
4495 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4496 {
4497         /*
4498          * We can accept userspace's request for interrupt injection
4499          * as long as we have a place to store the interrupt number.
4500          * The actual injection will happen when the CPU is able to
4501          * deliver the interrupt.
4502          */
4503         if (kvm_cpu_has_extint(vcpu))
4504                 return false;
4505
4506         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4507         return (!lapic_in_kernel(vcpu) ||
4508                 kvm_apic_accept_pic_intr(vcpu));
4509 }
4510
4511 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4512 {
4513         /*
4514          * Do not cause an interrupt window exit if an exception
4515          * is pending or an event needs reinjection; userspace
4516          * might want to inject the interrupt manually using KVM_SET_REGS
4517          * or KVM_SET_SREGS.  For that to work, we must be at an
4518          * instruction boundary and with no events half-injected.
4519          */
4520         return (kvm_arch_interrupt_allowed(vcpu) &&
4521                 kvm_cpu_accept_dm_intr(vcpu) &&
4522                 !kvm_event_needs_reinjection(vcpu) &&
4523                 !vcpu->arch.exception.pending);
4524 }
4525
4526 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4527                                     struct kvm_interrupt *irq)
4528 {
4529         if (irq->irq >= KVM_NR_INTERRUPTS)
4530                 return -EINVAL;
4531
4532         if (!irqchip_in_kernel(vcpu->kvm)) {
4533                 kvm_queue_interrupt(vcpu, irq->irq, false);
4534                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4535                 return 0;
4536         }
4537
4538         /*
4539          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4540          * fail for in-kernel 8259.
4541          */
4542         if (pic_in_kernel(vcpu->kvm))
4543                 return -ENXIO;
4544
4545         if (vcpu->arch.pending_external_vector != -1)
4546                 return -EEXIST;
4547
4548         vcpu->arch.pending_external_vector = irq->irq;
4549         kvm_make_request(KVM_REQ_EVENT, vcpu);
4550         return 0;
4551 }
4552
4553 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4554 {
4555         kvm_inject_nmi(vcpu);
4556
4557         return 0;
4558 }
4559
4560 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4561 {
4562         kvm_make_request(KVM_REQ_SMI, vcpu);
4563
4564         return 0;
4565 }
4566
4567 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4568                                            struct kvm_tpr_access_ctl *tac)
4569 {
4570         if (tac->flags)
4571                 return -EINVAL;
4572         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4573         return 0;
4574 }
4575
4576 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4577                                         u64 mcg_cap)
4578 {
4579         int r;
4580         unsigned bank_num = mcg_cap & 0xff, bank;
4581
4582         r = -EINVAL;
4583         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4584                 goto out;
4585         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4586                 goto out;
4587         r = 0;
4588         vcpu->arch.mcg_cap = mcg_cap;
4589         /* Init IA32_MCG_CTL to all 1s */
4590         if (mcg_cap & MCG_CTL_P)
4591                 vcpu->arch.mcg_ctl = ~(u64)0;
4592         /* Init IA32_MCi_CTL to all 1s */
4593         for (bank = 0; bank < bank_num; bank++)
4594                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4595
4596         static_call(kvm_x86_setup_mce)(vcpu);
4597 out:
4598         return r;
4599 }
4600
4601 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4602                                       struct kvm_x86_mce *mce)
4603 {
4604         u64 mcg_cap = vcpu->arch.mcg_cap;
4605         unsigned bank_num = mcg_cap & 0xff;
4606         u64 *banks = vcpu->arch.mce_banks;
4607
4608         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4609                 return -EINVAL;
4610         /*
4611          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4612          * reporting is disabled
4613          */
4614         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4615             vcpu->arch.mcg_ctl != ~(u64)0)
4616                 return 0;
4617         banks += 4 * mce->bank;
4618         /*
4619          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4620          * reporting is disabled for the bank
4621          */
4622         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4623                 return 0;
4624         if (mce->status & MCI_STATUS_UC) {
4625                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4626                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4627                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4628                         return 0;
4629                 }
4630                 if (banks[1] & MCI_STATUS_VAL)
4631                         mce->status |= MCI_STATUS_OVER;
4632                 banks[2] = mce->addr;
4633                 banks[3] = mce->misc;
4634                 vcpu->arch.mcg_status = mce->mcg_status;
4635                 banks[1] = mce->status;
4636                 kvm_queue_exception(vcpu, MC_VECTOR);
4637         } else if (!(banks[1] & MCI_STATUS_VAL)
4638                    || !(banks[1] & MCI_STATUS_UC)) {
4639                 if (banks[1] & MCI_STATUS_VAL)
4640                         mce->status |= MCI_STATUS_OVER;
4641                 banks[2] = mce->addr;
4642                 banks[3] = mce->misc;
4643                 banks[1] = mce->status;
4644         } else
4645                 banks[1] |= MCI_STATUS_OVER;
4646         return 0;
4647 }
4648
4649 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4650                                                struct kvm_vcpu_events *events)
4651 {
4652         process_nmi(vcpu);
4653
4654         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4655                 process_smi(vcpu);
4656
4657         /*
4658          * In guest mode, payload delivery should be deferred,
4659          * so that the L1 hypervisor can intercept #PF before
4660          * CR2 is modified (or intercept #DB before DR6 is
4661          * modified under nVMX). Unless the per-VM capability,
4662          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4663          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4664          * opportunistically defer the exception payload, deliver it if the
4665          * capability hasn't been requested before processing a
4666          * KVM_GET_VCPU_EVENTS.
4667          */
4668         if (!vcpu->kvm->arch.exception_payload_enabled &&
4669             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4670                 kvm_deliver_exception_payload(vcpu);
4671
4672         /*
4673          * The API doesn't provide the instruction length for software
4674          * exceptions, so don't report them. As long as the guest RIP
4675          * isn't advanced, we should expect to encounter the exception
4676          * again.
4677          */
4678         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4679                 events->exception.injected = 0;
4680                 events->exception.pending = 0;
4681         } else {
4682                 events->exception.injected = vcpu->arch.exception.injected;
4683                 events->exception.pending = vcpu->arch.exception.pending;
4684                 /*
4685                  * For ABI compatibility, deliberately conflate
4686                  * pending and injected exceptions when
4687                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4688                  */
4689                 if (!vcpu->kvm->arch.exception_payload_enabled)
4690                         events->exception.injected |=
4691                                 vcpu->arch.exception.pending;
4692         }
4693         events->exception.nr = vcpu->arch.exception.nr;
4694         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4695         events->exception.error_code = vcpu->arch.exception.error_code;
4696         events->exception_has_payload = vcpu->arch.exception.has_payload;
4697         events->exception_payload = vcpu->arch.exception.payload;
4698
4699         events->interrupt.injected =
4700                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4701         events->interrupt.nr = vcpu->arch.interrupt.nr;
4702         events->interrupt.soft = 0;
4703         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4704
4705         events->nmi.injected = vcpu->arch.nmi_injected;
4706         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4707         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4708         events->nmi.pad = 0;
4709
4710         events->sipi_vector = 0; /* never valid when reporting to user space */
4711
4712         events->smi.smm = is_smm(vcpu);
4713         events->smi.pending = vcpu->arch.smi_pending;
4714         events->smi.smm_inside_nmi =
4715                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4716         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4717
4718         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4719                          | KVM_VCPUEVENT_VALID_SHADOW
4720                          | KVM_VCPUEVENT_VALID_SMM);
4721         if (vcpu->kvm->arch.exception_payload_enabled)
4722                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4723
4724         memset(&events->reserved, 0, sizeof(events->reserved));
4725 }
4726
4727 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4728
4729 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4730                                               struct kvm_vcpu_events *events)
4731 {
4732         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4733                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4734                               | KVM_VCPUEVENT_VALID_SHADOW
4735                               | KVM_VCPUEVENT_VALID_SMM
4736                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4737                 return -EINVAL;
4738
4739         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4740                 if (!vcpu->kvm->arch.exception_payload_enabled)
4741                         return -EINVAL;
4742                 if (events->exception.pending)
4743                         events->exception.injected = 0;
4744                 else
4745                         events->exception_has_payload = 0;
4746         } else {
4747                 events->exception.pending = 0;
4748                 events->exception_has_payload = 0;
4749         }
4750
4751         if ((events->exception.injected || events->exception.pending) &&
4752             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4753                 return -EINVAL;
4754
4755         /* INITs are latched while in SMM */
4756         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4757             (events->smi.smm || events->smi.pending) &&
4758             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4759                 return -EINVAL;
4760
4761         process_nmi(vcpu);
4762         vcpu->arch.exception.injected = events->exception.injected;
4763         vcpu->arch.exception.pending = events->exception.pending;
4764         vcpu->arch.exception.nr = events->exception.nr;
4765         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4766         vcpu->arch.exception.error_code = events->exception.error_code;
4767         vcpu->arch.exception.has_payload = events->exception_has_payload;
4768         vcpu->arch.exception.payload = events->exception_payload;
4769
4770         vcpu->arch.interrupt.injected = events->interrupt.injected;
4771         vcpu->arch.interrupt.nr = events->interrupt.nr;
4772         vcpu->arch.interrupt.soft = events->interrupt.soft;
4773         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4774                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4775                                                 events->interrupt.shadow);
4776
4777         vcpu->arch.nmi_injected = events->nmi.injected;
4778         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4779                 vcpu->arch.nmi_pending = events->nmi.pending;
4780         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4781
4782         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4783             lapic_in_kernel(vcpu))
4784                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4785
4786         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4787                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4788                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4789                         kvm_smm_changed(vcpu, events->smi.smm);
4790                 }
4791
4792                 vcpu->arch.smi_pending = events->smi.pending;
4793
4794                 if (events->smi.smm) {
4795                         if (events->smi.smm_inside_nmi)
4796                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4797                         else
4798                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4799                 }
4800
4801                 if (lapic_in_kernel(vcpu)) {
4802                         if (events->smi.latched_init)
4803                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4804                         else
4805                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4806                 }
4807         }
4808
4809         kvm_make_request(KVM_REQ_EVENT, vcpu);
4810
4811         return 0;
4812 }
4813
4814 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4815                                              struct kvm_debugregs *dbgregs)
4816 {
4817         unsigned long val;
4818
4819         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4820         kvm_get_dr(vcpu, 6, &val);
4821         dbgregs->dr6 = val;
4822         dbgregs->dr7 = vcpu->arch.dr7;
4823         dbgregs->flags = 0;
4824         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4825 }
4826
4827 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4828                                             struct kvm_debugregs *dbgregs)
4829 {
4830         if (dbgregs->flags)
4831                 return -EINVAL;
4832
4833         if (!kvm_dr6_valid(dbgregs->dr6))
4834                 return -EINVAL;
4835         if (!kvm_dr7_valid(dbgregs->dr7))
4836                 return -EINVAL;
4837
4838         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4839         kvm_update_dr0123(vcpu);
4840         vcpu->arch.dr6 = dbgregs->dr6;
4841         vcpu->arch.dr7 = dbgregs->dr7;
4842         kvm_update_dr7(vcpu);
4843
4844         return 0;
4845 }
4846
4847 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4848
4849 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4850 {
4851         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4852         u64 xstate_bv = xsave->header.xfeatures;
4853         u64 valid;
4854
4855         /*
4856          * Copy legacy XSAVE area, to avoid complications with CPUID
4857          * leaves 0 and 1 in the loop below.
4858          */
4859         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4860
4861         /* Set XSTATE_BV */
4862         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4863         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4864
4865         /*
4866          * Copy each region from the possibly compacted offset to the
4867          * non-compacted offset.
4868          */
4869         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4870         while (valid) {
4871                 u32 size, offset, ecx, edx;
4872                 u64 xfeature_mask = valid & -valid;
4873                 int xfeature_nr = fls64(xfeature_mask) - 1;
4874                 void *src;
4875
4876                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4877                             &size, &offset, &ecx, &edx);
4878
4879                 if (xfeature_nr == XFEATURE_PKRU) {
4880                         memcpy(dest + offset, &vcpu->arch.pkru,
4881                                sizeof(vcpu->arch.pkru));
4882                 } else {
4883                         src = get_xsave_addr(xsave, xfeature_nr);
4884                         if (src)
4885                                 memcpy(dest + offset, src, size);
4886                 }
4887
4888                 valid -= xfeature_mask;
4889         }
4890 }
4891
4892 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4893 {
4894         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4895         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4896         u64 valid;
4897
4898         /*
4899          * Copy legacy XSAVE area, to avoid complications with CPUID
4900          * leaves 0 and 1 in the loop below.
4901          */
4902         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4903
4904         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4905         xsave->header.xfeatures = xstate_bv;
4906         if (boot_cpu_has(X86_FEATURE_XSAVES))
4907                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4908
4909         /*
4910          * Copy each region from the non-compacted offset to the
4911          * possibly compacted offset.
4912          */
4913         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4914         while (valid) {
4915                 u32 size, offset, ecx, edx;
4916                 u64 xfeature_mask = valid & -valid;
4917                 int xfeature_nr = fls64(xfeature_mask) - 1;
4918
4919                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4920                             &size, &offset, &ecx, &edx);
4921
4922                 if (xfeature_nr == XFEATURE_PKRU) {
4923                         memcpy(&vcpu->arch.pkru, src + offset,
4924                                sizeof(vcpu->arch.pkru));
4925                 } else {
4926                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4927
4928                         if (dest)
4929                                 memcpy(dest, src + offset, size);
4930                 }
4931
4932                 valid -= xfeature_mask;
4933         }
4934 }
4935
4936 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4937                                          struct kvm_xsave *guest_xsave)
4938 {
4939         if (!vcpu->arch.guest_fpu)
4940                 return;
4941
4942         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4943                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4944                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4945         } else {
4946                 memcpy(guest_xsave->region,
4947                         &vcpu->arch.guest_fpu->state.fxsave,
4948                         sizeof(struct fxregs_state));
4949                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4950                         XFEATURE_MASK_FPSSE;
4951         }
4952 }
4953
4954 #define XSAVE_MXCSR_OFFSET 24
4955
4956 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4957                                         struct kvm_xsave *guest_xsave)
4958 {
4959         u64 xstate_bv;
4960         u32 mxcsr;
4961
4962         if (!vcpu->arch.guest_fpu)
4963                 return 0;
4964
4965         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4966         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4967
4968         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4969                 /*
4970                  * Here we allow setting states that are not present in
4971                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4972                  * with old userspace.
4973                  */
4974                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4975                         return -EINVAL;
4976                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4977         } else {
4978                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4979                         mxcsr & ~mxcsr_feature_mask)
4980                         return -EINVAL;
4981                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4982                         guest_xsave->region, sizeof(struct fxregs_state));
4983         }
4984         return 0;
4985 }
4986
4987 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4988                                         struct kvm_xcrs *guest_xcrs)
4989 {
4990         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4991                 guest_xcrs->nr_xcrs = 0;
4992                 return;
4993         }
4994
4995         guest_xcrs->nr_xcrs = 1;
4996         guest_xcrs->flags = 0;
4997         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4998         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4999 }
5000
5001 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5002                                        struct kvm_xcrs *guest_xcrs)
5003 {
5004         int i, r = 0;
5005
5006         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5007                 return -EINVAL;
5008
5009         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5010                 return -EINVAL;
5011
5012         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5013                 /* Only support XCR0 currently */
5014                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5015                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5016                                 guest_xcrs->xcrs[i].value);
5017                         break;
5018                 }
5019         if (r)
5020                 r = -EINVAL;
5021         return r;
5022 }
5023
5024 /*
5025  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5026  * stopped by the hypervisor.  This function will be called from the host only.
5027  * EINVAL is returned when the host attempts to set the flag for a guest that
5028  * does not support pv clocks.
5029  */
5030 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5031 {
5032         if (!vcpu->arch.pv_time_enabled)
5033                 return -EINVAL;
5034         vcpu->arch.pvclock_set_guest_stopped_request = true;
5035         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5036         return 0;
5037 }
5038
5039 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5040                                      struct kvm_enable_cap *cap)
5041 {
5042         int r;
5043         uint16_t vmcs_version;
5044         void __user *user_ptr;
5045
5046         if (cap->flags)
5047                 return -EINVAL;
5048
5049         switch (cap->cap) {
5050         case KVM_CAP_HYPERV_SYNIC2:
5051                 if (cap->args[0])
5052                         return -EINVAL;
5053                 fallthrough;
5054
5055         case KVM_CAP_HYPERV_SYNIC:
5056                 if (!irqchip_in_kernel(vcpu->kvm))
5057                         return -EINVAL;
5058                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5059                                              KVM_CAP_HYPERV_SYNIC2);
5060         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5061                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5062                         return -ENOTTY;
5063                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5064                 if (!r) {
5065                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5066                         if (copy_to_user(user_ptr, &vmcs_version,
5067                                          sizeof(vmcs_version)))
5068                                 r = -EFAULT;
5069                 }
5070                 return r;
5071         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5072                 if (!kvm_x86_ops.enable_direct_tlbflush)
5073                         return -ENOTTY;
5074
5075                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5076
5077         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5078                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5079
5080         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5081                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5082                 if (vcpu->arch.pv_cpuid.enforce)
5083                         kvm_update_pv_runtime(vcpu);
5084
5085                 return 0;
5086         default:
5087                 return -EINVAL;
5088         }
5089 }
5090
5091 long kvm_arch_vcpu_ioctl(struct file *filp,
5092                          unsigned int ioctl, unsigned long arg)
5093 {
5094         struct kvm_vcpu *vcpu = filp->private_data;
5095         void __user *argp = (void __user *)arg;
5096         int r;
5097         union {
5098                 struct kvm_sregs2 *sregs2;
5099                 struct kvm_lapic_state *lapic;
5100                 struct kvm_xsave *xsave;
5101                 struct kvm_xcrs *xcrs;
5102                 void *buffer;
5103         } u;
5104
5105         vcpu_load(vcpu);
5106
5107         u.buffer = NULL;
5108         switch (ioctl) {
5109         case KVM_GET_LAPIC: {
5110                 r = -EINVAL;
5111                 if (!lapic_in_kernel(vcpu))
5112                         goto out;
5113                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5114                                 GFP_KERNEL_ACCOUNT);
5115
5116                 r = -ENOMEM;
5117                 if (!u.lapic)
5118                         goto out;
5119                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5120                 if (r)
5121                         goto out;
5122                 r = -EFAULT;
5123                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5124                         goto out;
5125                 r = 0;
5126                 break;
5127         }
5128         case KVM_SET_LAPIC: {
5129                 r = -EINVAL;
5130                 if (!lapic_in_kernel(vcpu))
5131                         goto out;
5132                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5133                 if (IS_ERR(u.lapic)) {
5134                         r = PTR_ERR(u.lapic);
5135                         goto out_nofree;
5136                 }
5137
5138                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5139                 break;
5140         }
5141         case KVM_INTERRUPT: {
5142                 struct kvm_interrupt irq;
5143
5144                 r = -EFAULT;
5145                 if (copy_from_user(&irq, argp, sizeof(irq)))
5146                         goto out;
5147                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5148                 break;
5149         }
5150         case KVM_NMI: {
5151                 r = kvm_vcpu_ioctl_nmi(vcpu);
5152                 break;
5153         }
5154         case KVM_SMI: {
5155                 r = kvm_vcpu_ioctl_smi(vcpu);
5156                 break;
5157         }
5158         case KVM_SET_CPUID: {
5159                 struct kvm_cpuid __user *cpuid_arg = argp;
5160                 struct kvm_cpuid cpuid;
5161
5162                 r = -EFAULT;
5163                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5164                         goto out;
5165                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5166                 break;
5167         }
5168         case KVM_SET_CPUID2: {
5169                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5170                 struct kvm_cpuid2 cpuid;
5171
5172                 r = -EFAULT;
5173                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5174                         goto out;
5175                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5176                                               cpuid_arg->entries);
5177                 break;
5178         }
5179         case KVM_GET_CPUID2: {
5180                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5181                 struct kvm_cpuid2 cpuid;
5182
5183                 r = -EFAULT;
5184                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5185                         goto out;
5186                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5187                                               cpuid_arg->entries);
5188                 if (r)
5189                         goto out;
5190                 r = -EFAULT;
5191                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5192                         goto out;
5193                 r = 0;
5194                 break;
5195         }
5196         case KVM_GET_MSRS: {
5197                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5198                 r = msr_io(vcpu, argp, do_get_msr, 1);
5199                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5200                 break;
5201         }
5202         case KVM_SET_MSRS: {
5203                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5204                 r = msr_io(vcpu, argp, do_set_msr, 0);
5205                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5206                 break;
5207         }
5208         case KVM_TPR_ACCESS_REPORTING: {
5209                 struct kvm_tpr_access_ctl tac;
5210
5211                 r = -EFAULT;
5212                 if (copy_from_user(&tac, argp, sizeof(tac)))
5213                         goto out;
5214                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5215                 if (r)
5216                         goto out;
5217                 r = -EFAULT;
5218                 if (copy_to_user(argp, &tac, sizeof(tac)))
5219                         goto out;
5220                 r = 0;
5221                 break;
5222         };
5223         case KVM_SET_VAPIC_ADDR: {
5224                 struct kvm_vapic_addr va;
5225                 int idx;
5226
5227                 r = -EINVAL;
5228                 if (!lapic_in_kernel(vcpu))
5229                         goto out;
5230                 r = -EFAULT;
5231                 if (copy_from_user(&va, argp, sizeof(va)))
5232                         goto out;
5233                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5234                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5235                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5236                 break;
5237         }
5238         case KVM_X86_SETUP_MCE: {
5239                 u64 mcg_cap;
5240
5241                 r = -EFAULT;
5242                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5243                         goto out;
5244                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5245                 break;
5246         }
5247         case KVM_X86_SET_MCE: {
5248                 struct kvm_x86_mce mce;
5249
5250                 r = -EFAULT;
5251                 if (copy_from_user(&mce, argp, sizeof(mce)))
5252                         goto out;
5253                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5254                 break;
5255         }
5256         case KVM_GET_VCPU_EVENTS: {
5257                 struct kvm_vcpu_events events;
5258
5259                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5260
5261                 r = -EFAULT;
5262                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5263                         break;
5264                 r = 0;
5265                 break;
5266         }
5267         case KVM_SET_VCPU_EVENTS: {
5268                 struct kvm_vcpu_events events;
5269
5270                 r = -EFAULT;
5271                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5272                         break;
5273
5274                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5275                 break;
5276         }
5277         case KVM_GET_DEBUGREGS: {
5278                 struct kvm_debugregs dbgregs;
5279
5280                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5281
5282                 r = -EFAULT;
5283                 if (copy_to_user(argp, &dbgregs,
5284                                  sizeof(struct kvm_debugregs)))
5285                         break;
5286                 r = 0;
5287                 break;
5288         }
5289         case KVM_SET_DEBUGREGS: {
5290                 struct kvm_debugregs dbgregs;
5291
5292                 r = -EFAULT;
5293                 if (copy_from_user(&dbgregs, argp,
5294                                    sizeof(struct kvm_debugregs)))
5295                         break;
5296
5297                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5298                 break;
5299         }
5300         case KVM_GET_XSAVE: {
5301                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5302                 r = -ENOMEM;
5303                 if (!u.xsave)
5304                         break;
5305
5306                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5307
5308                 r = -EFAULT;
5309                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5310                         break;
5311                 r = 0;
5312                 break;
5313         }
5314         case KVM_SET_XSAVE: {
5315                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5316                 if (IS_ERR(u.xsave)) {
5317                         r = PTR_ERR(u.xsave);
5318                         goto out_nofree;
5319                 }
5320
5321                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5322                 break;
5323         }
5324         case KVM_GET_XCRS: {
5325                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5326                 r = -ENOMEM;
5327                 if (!u.xcrs)
5328                         break;
5329
5330                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5331
5332                 r = -EFAULT;
5333                 if (copy_to_user(argp, u.xcrs,
5334                                  sizeof(struct kvm_xcrs)))
5335                         break;
5336                 r = 0;
5337                 break;
5338         }
5339         case KVM_SET_XCRS: {
5340                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5341                 if (IS_ERR(u.xcrs)) {
5342                         r = PTR_ERR(u.xcrs);
5343                         goto out_nofree;
5344                 }
5345
5346                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5347                 break;
5348         }
5349         case KVM_SET_TSC_KHZ: {
5350                 u32 user_tsc_khz;
5351
5352                 r = -EINVAL;
5353                 user_tsc_khz = (u32)arg;
5354
5355                 if (kvm_has_tsc_control &&
5356                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5357                         goto out;
5358
5359                 if (user_tsc_khz == 0)
5360                         user_tsc_khz = tsc_khz;
5361
5362                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5363                         r = 0;
5364
5365                 goto out;
5366         }
5367         case KVM_GET_TSC_KHZ: {
5368                 r = vcpu->arch.virtual_tsc_khz;
5369                 goto out;
5370         }
5371         case KVM_KVMCLOCK_CTRL: {
5372                 r = kvm_set_guest_paused(vcpu);
5373                 goto out;
5374         }
5375         case KVM_ENABLE_CAP: {
5376                 struct kvm_enable_cap cap;
5377
5378                 r = -EFAULT;
5379                 if (copy_from_user(&cap, argp, sizeof(cap)))
5380                         goto out;
5381                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5382                 break;
5383         }
5384         case KVM_GET_NESTED_STATE: {
5385                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5386                 u32 user_data_size;
5387
5388                 r = -EINVAL;
5389                 if (!kvm_x86_ops.nested_ops->get_state)
5390                         break;
5391
5392                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5393                 r = -EFAULT;
5394                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5395                         break;
5396
5397                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5398                                                      user_data_size);
5399                 if (r < 0)
5400                         break;
5401
5402                 if (r > user_data_size) {
5403                         if (put_user(r, &user_kvm_nested_state->size))
5404                                 r = -EFAULT;
5405                         else
5406                                 r = -E2BIG;
5407                         break;
5408                 }
5409
5410                 r = 0;
5411                 break;
5412         }
5413         case KVM_SET_NESTED_STATE: {
5414                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5415                 struct kvm_nested_state kvm_state;
5416                 int idx;
5417
5418                 r = -EINVAL;
5419                 if (!kvm_x86_ops.nested_ops->set_state)
5420                         break;
5421
5422                 r = -EFAULT;
5423                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5424                         break;
5425
5426                 r = -EINVAL;
5427                 if (kvm_state.size < sizeof(kvm_state))
5428                         break;
5429
5430                 if (kvm_state.flags &
5431                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5432                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5433                       | KVM_STATE_NESTED_GIF_SET))
5434                         break;
5435
5436                 /* nested_run_pending implies guest_mode.  */
5437                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5438                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5439                         break;
5440
5441                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5442                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5443                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5444                 break;
5445         }
5446         case KVM_GET_SUPPORTED_HV_CPUID:
5447                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5448                 break;
5449 #ifdef CONFIG_KVM_XEN
5450         case KVM_XEN_VCPU_GET_ATTR: {
5451                 struct kvm_xen_vcpu_attr xva;
5452
5453                 r = -EFAULT;
5454                 if (copy_from_user(&xva, argp, sizeof(xva)))
5455                         goto out;
5456                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5457                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5458                         r = -EFAULT;
5459                 break;
5460         }
5461         case KVM_XEN_VCPU_SET_ATTR: {
5462                 struct kvm_xen_vcpu_attr xva;
5463
5464                 r = -EFAULT;
5465                 if (copy_from_user(&xva, argp, sizeof(xva)))
5466                         goto out;
5467                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5468                 break;
5469         }
5470 #endif
5471         case KVM_GET_SREGS2: {
5472                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5473                 r = -ENOMEM;
5474                 if (!u.sregs2)
5475                         goto out;
5476                 __get_sregs2(vcpu, u.sregs2);
5477                 r = -EFAULT;
5478                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5479                         goto out;
5480                 r = 0;
5481                 break;
5482         }
5483         case KVM_SET_SREGS2: {
5484                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5485                 if (IS_ERR(u.sregs2)) {
5486                         r = PTR_ERR(u.sregs2);
5487                         u.sregs2 = NULL;
5488                         goto out;
5489                 }
5490                 r = __set_sregs2(vcpu, u.sregs2);
5491                 break;
5492         }
5493         default:
5494                 r = -EINVAL;
5495         }
5496 out:
5497         kfree(u.buffer);
5498 out_nofree:
5499         vcpu_put(vcpu);
5500         return r;
5501 }
5502
5503 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5504 {
5505         return VM_FAULT_SIGBUS;
5506 }
5507
5508 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5509 {
5510         int ret;
5511
5512         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5513                 return -EINVAL;
5514         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5515         return ret;
5516 }
5517
5518 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5519                                               u64 ident_addr)
5520 {
5521         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5522 }
5523
5524 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5525                                          unsigned long kvm_nr_mmu_pages)
5526 {
5527         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5528                 return -EINVAL;
5529
5530         mutex_lock(&kvm->slots_lock);
5531
5532         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5533         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5534
5535         mutex_unlock(&kvm->slots_lock);
5536         return 0;
5537 }
5538
5539 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5540 {
5541         return kvm->arch.n_max_mmu_pages;
5542 }
5543
5544 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5545 {
5546         struct kvm_pic *pic = kvm->arch.vpic;
5547         int r;
5548
5549         r = 0;
5550         switch (chip->chip_id) {
5551         case KVM_IRQCHIP_PIC_MASTER:
5552                 memcpy(&chip->chip.pic, &pic->pics[0],
5553                         sizeof(struct kvm_pic_state));
5554                 break;
5555         case KVM_IRQCHIP_PIC_SLAVE:
5556                 memcpy(&chip->chip.pic, &pic->pics[1],
5557                         sizeof(struct kvm_pic_state));
5558                 break;
5559         case KVM_IRQCHIP_IOAPIC:
5560                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5561                 break;
5562         default:
5563                 r = -EINVAL;
5564                 break;
5565         }
5566         return r;
5567 }
5568
5569 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5570 {
5571         struct kvm_pic *pic = kvm->arch.vpic;
5572         int r;
5573
5574         r = 0;
5575         switch (chip->chip_id) {
5576         case KVM_IRQCHIP_PIC_MASTER:
5577                 spin_lock(&pic->lock);
5578                 memcpy(&pic->pics[0], &chip->chip.pic,
5579                         sizeof(struct kvm_pic_state));
5580                 spin_unlock(&pic->lock);
5581                 break;
5582         case KVM_IRQCHIP_PIC_SLAVE:
5583                 spin_lock(&pic->lock);
5584                 memcpy(&pic->pics[1], &chip->chip.pic,
5585                         sizeof(struct kvm_pic_state));
5586                 spin_unlock(&pic->lock);
5587                 break;
5588         case KVM_IRQCHIP_IOAPIC:
5589                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5590                 break;
5591         default:
5592                 r = -EINVAL;
5593                 break;
5594         }
5595         kvm_pic_update_irq(pic);
5596         return r;
5597 }
5598
5599 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5600 {
5601         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5602
5603         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5604
5605         mutex_lock(&kps->lock);
5606         memcpy(ps, &kps->channels, sizeof(*ps));
5607         mutex_unlock(&kps->lock);
5608         return 0;
5609 }
5610
5611 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5612 {
5613         int i;
5614         struct kvm_pit *pit = kvm->arch.vpit;
5615
5616         mutex_lock(&pit->pit_state.lock);
5617         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5618         for (i = 0; i < 3; i++)
5619                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5620         mutex_unlock(&pit->pit_state.lock);
5621         return 0;
5622 }
5623
5624 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5625 {
5626         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5627         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5628                 sizeof(ps->channels));
5629         ps->flags = kvm->arch.vpit->pit_state.flags;
5630         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5631         memset(&ps->reserved, 0, sizeof(ps->reserved));
5632         return 0;
5633 }
5634
5635 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5636 {
5637         int start = 0;
5638         int i;
5639         u32 prev_legacy, cur_legacy;
5640         struct kvm_pit *pit = kvm->arch.vpit;
5641
5642         mutex_lock(&pit->pit_state.lock);
5643         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5644         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5645         if (!prev_legacy && cur_legacy)
5646                 start = 1;
5647         memcpy(&pit->pit_state.channels, &ps->channels,
5648                sizeof(pit->pit_state.channels));
5649         pit->pit_state.flags = ps->flags;
5650         for (i = 0; i < 3; i++)
5651                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5652                                    start && i == 0);
5653         mutex_unlock(&pit->pit_state.lock);
5654         return 0;
5655 }
5656
5657 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5658                                  struct kvm_reinject_control *control)
5659 {
5660         struct kvm_pit *pit = kvm->arch.vpit;
5661
5662         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5663          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5664          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5665          */
5666         mutex_lock(&pit->pit_state.lock);
5667         kvm_pit_set_reinject(pit, control->pit_reinject);
5668         mutex_unlock(&pit->pit_state.lock);
5669
5670         return 0;
5671 }
5672
5673 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5674 {
5675
5676         /*
5677          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5678          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5679          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5680          * VM-Exit.
5681          */
5682         struct kvm_vcpu *vcpu;
5683         int i;
5684
5685         kvm_for_each_vcpu(i, vcpu, kvm)
5686                 kvm_vcpu_kick(vcpu);
5687 }
5688
5689 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5690                         bool line_status)
5691 {
5692         if (!irqchip_in_kernel(kvm))
5693                 return -ENXIO;
5694
5695         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5696                                         irq_event->irq, irq_event->level,
5697                                         line_status);
5698         return 0;
5699 }
5700
5701 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5702                             struct kvm_enable_cap *cap)
5703 {
5704         int r;
5705
5706         if (cap->flags)
5707                 return -EINVAL;
5708
5709         switch (cap->cap) {
5710         case KVM_CAP_DISABLE_QUIRKS:
5711                 kvm->arch.disabled_quirks = cap->args[0];
5712                 r = 0;
5713                 break;
5714         case KVM_CAP_SPLIT_IRQCHIP: {
5715                 mutex_lock(&kvm->lock);
5716                 r = -EINVAL;
5717                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5718                         goto split_irqchip_unlock;
5719                 r = -EEXIST;
5720                 if (irqchip_in_kernel(kvm))
5721                         goto split_irqchip_unlock;
5722                 if (kvm->created_vcpus)
5723                         goto split_irqchip_unlock;
5724                 r = kvm_setup_empty_irq_routing(kvm);
5725                 if (r)
5726                         goto split_irqchip_unlock;
5727                 /* Pairs with irqchip_in_kernel. */
5728                 smp_wmb();
5729                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5730                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5731                 r = 0;
5732 split_irqchip_unlock:
5733                 mutex_unlock(&kvm->lock);
5734                 break;
5735         }
5736         case KVM_CAP_X2APIC_API:
5737                 r = -EINVAL;
5738                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5739                         break;
5740
5741                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5742                         kvm->arch.x2apic_format = true;
5743                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5744                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5745
5746                 r = 0;
5747                 break;
5748         case KVM_CAP_X86_DISABLE_EXITS:
5749                 r = -EINVAL;
5750                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5751                         break;
5752
5753                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5754                         kvm_can_mwait_in_guest())
5755                         kvm->arch.mwait_in_guest = true;
5756                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5757                         kvm->arch.hlt_in_guest = true;
5758                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5759                         kvm->arch.pause_in_guest = true;
5760                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5761                         kvm->arch.cstate_in_guest = true;
5762                 r = 0;
5763                 break;
5764         case KVM_CAP_MSR_PLATFORM_INFO:
5765                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5766                 r = 0;
5767                 break;
5768         case KVM_CAP_EXCEPTION_PAYLOAD:
5769                 kvm->arch.exception_payload_enabled = cap->args[0];
5770                 r = 0;
5771                 break;
5772         case KVM_CAP_X86_USER_SPACE_MSR:
5773                 r = -EINVAL;
5774                 if (cap->args[0] & ~(KVM_MSR_EXIT_REASON_INVAL |
5775                                      KVM_MSR_EXIT_REASON_UNKNOWN |
5776                                      KVM_MSR_EXIT_REASON_FILTER))
5777                         break;
5778                 kvm->arch.user_space_msr_mask = cap->args[0];
5779                 r = 0;
5780                 break;
5781         case KVM_CAP_X86_BUS_LOCK_EXIT:
5782                 r = -EINVAL;
5783                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5784                         break;
5785
5786                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5787                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5788                         break;
5789
5790                 if (kvm_has_bus_lock_exit &&
5791                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5792                         kvm->arch.bus_lock_detection_enabled = true;
5793                 r = 0;
5794                 break;
5795 #ifdef CONFIG_X86_SGX_KVM
5796         case KVM_CAP_SGX_ATTRIBUTE: {
5797                 unsigned long allowed_attributes = 0;
5798
5799                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5800                 if (r)
5801                         break;
5802
5803                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5804                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5805                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5806                         kvm->arch.sgx_provisioning_allowed = true;
5807                 else
5808                         r = -EINVAL;
5809                 break;
5810         }
5811 #endif
5812         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5813                 r = -EINVAL;
5814                 if (kvm_x86_ops.vm_copy_enc_context_from)
5815                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5816                 return r;
5817         case KVM_CAP_EXIT_HYPERCALL:
5818                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5819                         r = -EINVAL;
5820                         break;
5821                 }
5822                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5823                 r = 0;
5824                 break;
5825         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5826                 r = -EINVAL;
5827                 if (cap->args[0] & ~1)
5828                         break;
5829                 kvm->arch.exit_on_emulation_error = cap->args[0];
5830                 r = 0;
5831                 break;
5832         default:
5833                 r = -EINVAL;
5834                 break;
5835         }
5836         return r;
5837 }
5838
5839 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5840 {
5841         struct kvm_x86_msr_filter *msr_filter;
5842
5843         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5844         if (!msr_filter)
5845                 return NULL;
5846
5847         msr_filter->default_allow = default_allow;
5848         return msr_filter;
5849 }
5850
5851 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5852 {
5853         u32 i;
5854
5855         if (!msr_filter)
5856                 return;
5857
5858         for (i = 0; i < msr_filter->count; i++)
5859                 kfree(msr_filter->ranges[i].bitmap);
5860
5861         kfree(msr_filter);
5862 }
5863
5864 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5865                               struct kvm_msr_filter_range *user_range)
5866 {
5867         unsigned long *bitmap = NULL;
5868         size_t bitmap_size;
5869
5870         if (!user_range->nmsrs)
5871                 return 0;
5872
5873         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5874                 return -EINVAL;
5875
5876         if (!user_range->flags)
5877                 return -EINVAL;
5878
5879         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5880         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5881                 return -EINVAL;
5882
5883         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5884         if (IS_ERR(bitmap))
5885                 return PTR_ERR(bitmap);
5886
5887         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5888                 .flags = user_range->flags,
5889                 .base = user_range->base,
5890                 .nmsrs = user_range->nmsrs,
5891                 .bitmap = bitmap,
5892         };
5893
5894         msr_filter->count++;
5895         return 0;
5896 }
5897
5898 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm,
5899                                        struct kvm_msr_filter *filter)
5900 {
5901         struct kvm_x86_msr_filter *new_filter, *old_filter;
5902         bool default_allow;
5903         bool empty = true;
5904         int r = 0;
5905         u32 i;
5906
5907         if (filter->flags & ~KVM_MSR_FILTER_DEFAULT_DENY)
5908                 return -EINVAL;
5909
5910         for (i = 0; i < ARRAY_SIZE(filter->ranges); i++)
5911                 empty &= !filter->ranges[i].nmsrs;
5912
5913         default_allow = !(filter->flags & KVM_MSR_FILTER_DEFAULT_DENY);
5914         if (empty && !default_allow)
5915                 return -EINVAL;
5916
5917         new_filter = kvm_alloc_msr_filter(default_allow);
5918         if (!new_filter)
5919                 return -ENOMEM;
5920
5921         for (i = 0; i < ARRAY_SIZE(filter->ranges); i++) {
5922                 r = kvm_add_msr_filter(new_filter, &filter->ranges[i]);
5923                 if (r) {
5924                         kvm_free_msr_filter(new_filter);
5925                         return r;
5926                 }
5927         }
5928
5929         mutex_lock(&kvm->lock);
5930
5931         /* The per-VM filter is protected by kvm->lock... */
5932         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5933
5934         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5935         synchronize_srcu(&kvm->srcu);
5936
5937         kvm_free_msr_filter(old_filter);
5938
5939         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5940         mutex_unlock(&kvm->lock);
5941
5942         return 0;
5943 }
5944
5945 #ifdef CONFIG_KVM_COMPAT
5946 /* for KVM_X86_SET_MSR_FILTER */
5947 struct kvm_msr_filter_range_compat {
5948         __u32 flags;
5949         __u32 nmsrs;
5950         __u32 base;
5951         __u32 bitmap;
5952 };
5953
5954 struct kvm_msr_filter_compat {
5955         __u32 flags;
5956         struct kvm_msr_filter_range_compat ranges[KVM_MSR_FILTER_MAX_RANGES];
5957 };
5958
5959 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
5960
5961 long kvm_arch_vm_compat_ioctl(struct file *filp, unsigned int ioctl,
5962                               unsigned long arg)
5963 {
5964         void __user *argp = (void __user *)arg;
5965         struct kvm *kvm = filp->private_data;
5966         long r = -ENOTTY;
5967
5968         switch (ioctl) {
5969         case KVM_X86_SET_MSR_FILTER_COMPAT: {
5970                 struct kvm_msr_filter __user *user_msr_filter = argp;
5971                 struct kvm_msr_filter_compat filter_compat;
5972                 struct kvm_msr_filter filter;
5973                 int i;
5974
5975                 if (copy_from_user(&filter_compat, user_msr_filter,
5976                                    sizeof(filter_compat)))
5977                         return -EFAULT;
5978
5979                 filter.flags = filter_compat.flags;
5980                 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5981                         struct kvm_msr_filter_range_compat *cr;
5982
5983                         cr = &filter_compat.ranges[i];
5984                         filter.ranges[i] = (struct kvm_msr_filter_range) {
5985                                 .flags = cr->flags,
5986                                 .nmsrs = cr->nmsrs,
5987                                 .base = cr->base,
5988                                 .bitmap = (__u8 *)(ulong)cr->bitmap,
5989                         };
5990                 }
5991
5992                 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
5993                 break;
5994         }
5995         }
5996
5997         return r;
5998 }
5999 #endif
6000
6001 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6002 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6003 {
6004         struct kvm_vcpu *vcpu;
6005         int i, ret = 0;
6006
6007         mutex_lock(&kvm->lock);
6008         kvm_for_each_vcpu(i, vcpu, kvm) {
6009                 if (!vcpu->arch.pv_time_enabled)
6010                         continue;
6011
6012                 ret = kvm_set_guest_paused(vcpu);
6013                 if (ret) {
6014                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6015                                 vcpu->vcpu_id, ret);
6016                         break;
6017                 }
6018         }
6019         mutex_unlock(&kvm->lock);
6020
6021         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6022 }
6023
6024 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6025 {
6026         switch (state) {
6027         case PM_HIBERNATION_PREPARE:
6028         case PM_SUSPEND_PREPARE:
6029                 return kvm_arch_suspend_notifier(kvm);
6030         }
6031
6032         return NOTIFY_DONE;
6033 }
6034 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6035
6036 long kvm_arch_vm_ioctl(struct file *filp,
6037                        unsigned int ioctl, unsigned long arg)
6038 {
6039         struct kvm *kvm = filp->private_data;
6040         void __user *argp = (void __user *)arg;
6041         int r = -ENOTTY;
6042         /*
6043          * This union makes it completely explicit to gcc-3.x
6044          * that these two variables' stack usage should be
6045          * combined, not added together.
6046          */
6047         union {
6048                 struct kvm_pit_state ps;
6049                 struct kvm_pit_state2 ps2;
6050                 struct kvm_pit_config pit_config;
6051         } u;
6052
6053         switch (ioctl) {
6054         case KVM_SET_TSS_ADDR:
6055                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6056                 break;
6057         case KVM_SET_IDENTITY_MAP_ADDR: {
6058                 u64 ident_addr;
6059
6060                 mutex_lock(&kvm->lock);
6061                 r = -EINVAL;
6062                 if (kvm->created_vcpus)
6063                         goto set_identity_unlock;
6064                 r = -EFAULT;
6065                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6066                         goto set_identity_unlock;
6067                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6068 set_identity_unlock:
6069                 mutex_unlock(&kvm->lock);
6070                 break;
6071         }
6072         case KVM_SET_NR_MMU_PAGES:
6073                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6074                 break;
6075         case KVM_GET_NR_MMU_PAGES:
6076                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6077                 break;
6078         case KVM_CREATE_IRQCHIP: {
6079                 mutex_lock(&kvm->lock);
6080
6081                 r = -EEXIST;
6082                 if (irqchip_in_kernel(kvm))
6083                         goto create_irqchip_unlock;
6084
6085                 r = -EINVAL;
6086                 if (kvm->created_vcpus)
6087                         goto create_irqchip_unlock;
6088
6089                 r = kvm_pic_init(kvm);
6090                 if (r)
6091                         goto create_irqchip_unlock;
6092
6093                 r = kvm_ioapic_init(kvm);
6094                 if (r) {
6095                         kvm_pic_destroy(kvm);
6096                         goto create_irqchip_unlock;
6097                 }
6098
6099                 r = kvm_setup_default_irq_routing(kvm);
6100                 if (r) {
6101                         kvm_ioapic_destroy(kvm);
6102                         kvm_pic_destroy(kvm);
6103                         goto create_irqchip_unlock;
6104                 }
6105                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6106                 smp_wmb();
6107                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6108         create_irqchip_unlock:
6109                 mutex_unlock(&kvm->lock);
6110                 break;
6111         }
6112         case KVM_CREATE_PIT:
6113                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6114                 goto create_pit;
6115         case KVM_CREATE_PIT2:
6116                 r = -EFAULT;
6117                 if (copy_from_user(&u.pit_config, argp,
6118                                    sizeof(struct kvm_pit_config)))
6119                         goto out;
6120         create_pit:
6121                 mutex_lock(&kvm->lock);
6122                 r = -EEXIST;
6123                 if (kvm->arch.vpit)
6124                         goto create_pit_unlock;
6125                 r = -ENOMEM;
6126                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6127                 if (kvm->arch.vpit)
6128                         r = 0;
6129         create_pit_unlock:
6130                 mutex_unlock(&kvm->lock);
6131                 break;
6132         case KVM_GET_IRQCHIP: {
6133                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6134                 struct kvm_irqchip *chip;
6135
6136                 chip = memdup_user(argp, sizeof(*chip));
6137                 if (IS_ERR(chip)) {
6138                         r = PTR_ERR(chip);
6139                         goto out;
6140                 }
6141
6142                 r = -ENXIO;
6143                 if (!irqchip_kernel(kvm))
6144                         goto get_irqchip_out;
6145                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6146                 if (r)
6147                         goto get_irqchip_out;
6148                 r = -EFAULT;
6149                 if (copy_to_user(argp, chip, sizeof(*chip)))
6150                         goto get_irqchip_out;
6151                 r = 0;
6152         get_irqchip_out:
6153                 kfree(chip);
6154                 break;
6155         }
6156         case KVM_SET_IRQCHIP: {
6157                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6158                 struct kvm_irqchip *chip;
6159
6160                 chip = memdup_user(argp, sizeof(*chip));
6161                 if (IS_ERR(chip)) {
6162                         r = PTR_ERR(chip);
6163                         goto out;
6164                 }
6165
6166                 r = -ENXIO;
6167                 if (!irqchip_kernel(kvm))
6168                         goto set_irqchip_out;
6169                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6170         set_irqchip_out:
6171                 kfree(chip);
6172                 break;
6173         }
6174         case KVM_GET_PIT: {
6175                 r = -EFAULT;
6176                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6177                         goto out;
6178                 r = -ENXIO;
6179                 if (!kvm->arch.vpit)
6180                         goto out;
6181                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6182                 if (r)
6183                         goto out;
6184                 r = -EFAULT;
6185                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6186                         goto out;
6187                 r = 0;
6188                 break;
6189         }
6190         case KVM_SET_PIT: {
6191                 r = -EFAULT;
6192                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6193                         goto out;
6194                 mutex_lock(&kvm->lock);
6195                 r = -ENXIO;
6196                 if (!kvm->arch.vpit)
6197                         goto set_pit_out;
6198                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6199 set_pit_out:
6200                 mutex_unlock(&kvm->lock);
6201                 break;
6202         }
6203         case KVM_GET_PIT2: {
6204                 r = -ENXIO;
6205                 if (!kvm->arch.vpit)
6206                         goto out;
6207                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6208                 if (r)
6209                         goto out;
6210                 r = -EFAULT;
6211                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6212                         goto out;
6213                 r = 0;
6214                 break;
6215         }
6216         case KVM_SET_PIT2: {
6217                 r = -EFAULT;
6218                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6219                         goto out;
6220                 mutex_lock(&kvm->lock);
6221                 r = -ENXIO;
6222                 if (!kvm->arch.vpit)
6223                         goto set_pit2_out;
6224                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6225 set_pit2_out:
6226                 mutex_unlock(&kvm->lock);
6227                 break;
6228         }
6229         case KVM_REINJECT_CONTROL: {
6230                 struct kvm_reinject_control control;
6231                 r =  -EFAULT;
6232                 if (copy_from_user(&control, argp, sizeof(control)))
6233                         goto out;
6234                 r = -ENXIO;
6235                 if (!kvm->arch.vpit)
6236                         goto out;
6237                 r = kvm_vm_ioctl_reinject(kvm, &control);
6238                 break;
6239         }
6240         case KVM_SET_BOOT_CPU_ID:
6241                 r = 0;
6242                 mutex_lock(&kvm->lock);
6243                 if (kvm->created_vcpus)
6244                         r = -EBUSY;
6245                 else
6246                         kvm->arch.bsp_vcpu_id = arg;
6247                 mutex_unlock(&kvm->lock);
6248                 break;
6249 #ifdef CONFIG_KVM_XEN
6250         case KVM_XEN_HVM_CONFIG: {
6251                 struct kvm_xen_hvm_config xhc;
6252                 r = -EFAULT;
6253                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6254                         goto out;
6255                 r = kvm_xen_hvm_config(kvm, &xhc);
6256                 break;
6257         }
6258         case KVM_XEN_HVM_GET_ATTR: {
6259                 struct kvm_xen_hvm_attr xha;
6260
6261                 r = -EFAULT;
6262                 if (copy_from_user(&xha, argp, sizeof(xha)))
6263                         goto out;
6264                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6265                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6266                         r = -EFAULT;
6267                 break;
6268         }
6269         case KVM_XEN_HVM_SET_ATTR: {
6270                 struct kvm_xen_hvm_attr xha;
6271
6272                 r = -EFAULT;
6273                 if (copy_from_user(&xha, argp, sizeof(xha)))
6274                         goto out;
6275                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6276                 break;
6277         }
6278 #endif
6279         case KVM_SET_CLOCK: {
6280                 struct kvm_arch *ka = &kvm->arch;
6281                 struct kvm_clock_data user_ns;
6282                 u64 now_ns;
6283
6284                 r = -EFAULT;
6285                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6286                         goto out;
6287
6288                 r = -EINVAL;
6289                 if (user_ns.flags)
6290                         goto out;
6291
6292                 r = 0;
6293                 /*
6294                  * TODO: userspace has to take care of races with VCPU_RUN, so
6295                  * kvm_gen_update_masterclock() can be cut down to locked
6296                  * pvclock_update_vm_gtod_copy().
6297                  */
6298                 kvm_gen_update_masterclock(kvm);
6299
6300                 /*
6301                  * This pairs with kvm_guest_time_update(): when masterclock is
6302                  * in use, we use master_kernel_ns + kvmclock_offset to set
6303                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6304                  * is slightly ahead) here we risk going negative on unsigned
6305                  * 'system_time' when 'user_ns.clock' is very small.
6306                  */
6307                 raw_spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6308                 if (kvm->arch.use_master_clock)
6309                         now_ns = ka->master_kernel_ns;
6310                 else
6311                         now_ns = get_kvmclock_base_ns();
6312                 ka->kvmclock_offset = user_ns.clock - now_ns;
6313                 raw_spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6314
6315                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6316                 break;
6317         }
6318         case KVM_GET_CLOCK: {
6319                 struct kvm_clock_data user_ns;
6320                 u64 now_ns;
6321
6322                 now_ns = get_kvmclock_ns(kvm);
6323                 user_ns.clock = now_ns;
6324                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6325                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6326
6327                 r = -EFAULT;
6328                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6329                         goto out;
6330                 r = 0;
6331                 break;
6332         }
6333         case KVM_MEMORY_ENCRYPT_OP: {
6334                 r = -ENOTTY;
6335                 if (kvm_x86_ops.mem_enc_op)
6336                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6337                 break;
6338         }
6339         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6340                 struct kvm_enc_region region;
6341
6342                 r = -EFAULT;
6343                 if (copy_from_user(&region, argp, sizeof(region)))
6344                         goto out;
6345
6346                 r = -ENOTTY;
6347                 if (kvm_x86_ops.mem_enc_reg_region)
6348                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6349                 break;
6350         }
6351         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6352                 struct kvm_enc_region region;
6353
6354                 r = -EFAULT;
6355                 if (copy_from_user(&region, argp, sizeof(region)))
6356                         goto out;
6357
6358                 r = -ENOTTY;
6359                 if (kvm_x86_ops.mem_enc_unreg_region)
6360                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6361                 break;
6362         }
6363         case KVM_HYPERV_EVENTFD: {
6364                 struct kvm_hyperv_eventfd hvevfd;
6365
6366                 r = -EFAULT;
6367                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6368                         goto out;
6369                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6370                 break;
6371         }
6372         case KVM_SET_PMU_EVENT_FILTER:
6373                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6374                 break;
6375         case KVM_X86_SET_MSR_FILTER: {
6376                 struct kvm_msr_filter __user *user_msr_filter = argp;
6377                 struct kvm_msr_filter filter;
6378
6379                 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6380                         return -EFAULT;
6381
6382                 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6383                 break;
6384         }
6385         default:
6386                 r = -ENOTTY;
6387         }
6388 out:
6389         return r;
6390 }
6391
6392 static void kvm_init_msr_list(void)
6393 {
6394         struct x86_pmu_capability x86_pmu;
6395         u32 dummy[2];
6396         unsigned i;
6397
6398         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6399                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6400
6401         perf_get_x86_pmu_capability(&x86_pmu);
6402
6403         num_msrs_to_save = 0;
6404         num_emulated_msrs = 0;
6405         num_msr_based_features = 0;
6406
6407         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6408                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6409                         continue;
6410
6411                 /*
6412                  * Even MSRs that are valid in the host may not be exposed
6413                  * to the guests in some cases.
6414                  */
6415                 switch (msrs_to_save_all[i]) {
6416                 case MSR_IA32_BNDCFGS:
6417                         if (!kvm_mpx_supported())
6418                                 continue;
6419                         break;
6420                 case MSR_TSC_AUX:
6421                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6422                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6423                                 continue;
6424                         break;
6425                 case MSR_IA32_UMWAIT_CONTROL:
6426                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6427                                 continue;
6428                         break;
6429                 case MSR_IA32_RTIT_CTL:
6430                 case MSR_IA32_RTIT_STATUS:
6431                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6432                                 continue;
6433                         break;
6434                 case MSR_IA32_RTIT_CR3_MATCH:
6435                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6436                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6437                                 continue;
6438                         break;
6439                 case MSR_IA32_RTIT_OUTPUT_BASE:
6440                 case MSR_IA32_RTIT_OUTPUT_MASK:
6441                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6442                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6443                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6444                                 continue;
6445                         break;
6446                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6447                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6448                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6449                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6450                                 continue;
6451                         break;
6452                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6453                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6454                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6455                                 continue;
6456                         break;
6457                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6458                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6459                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6460                                 continue;
6461                         break;
6462                 default:
6463                         break;
6464                 }
6465
6466                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6467         }
6468
6469         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6470                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6471                         continue;
6472
6473                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6474         }
6475
6476         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6477                 struct kvm_msr_entry msr;
6478
6479                 msr.index = msr_based_features_all[i];
6480                 if (kvm_get_msr_feature(&msr))
6481                         continue;
6482
6483                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6484         }
6485 }
6486
6487 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6488                            const void *v)
6489 {
6490         int handled = 0;
6491         int n;
6492
6493         do {
6494                 n = min(len, 8);
6495                 if (!(lapic_in_kernel(vcpu) &&
6496                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6497                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6498                         break;
6499                 handled += n;
6500                 addr += n;
6501                 len -= n;
6502                 v += n;
6503         } while (len);
6504
6505         return handled;
6506 }
6507
6508 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6509 {
6510         int handled = 0;
6511         int n;
6512
6513         do {
6514                 n = min(len, 8);
6515                 if (!(lapic_in_kernel(vcpu) &&
6516                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6517                                          addr, n, v))
6518                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6519                         break;
6520                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6521                 handled += n;
6522                 addr += n;
6523                 len -= n;
6524                 v += n;
6525         } while (len);
6526
6527         return handled;
6528 }
6529
6530 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6531                         struct kvm_segment *var, int seg)
6532 {
6533         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6534 }
6535
6536 void kvm_get_segment(struct kvm_vcpu *vcpu,
6537                      struct kvm_segment *var, int seg)
6538 {
6539         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6540 }
6541
6542 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6543                            struct x86_exception *exception)
6544 {
6545         gpa_t t_gpa;
6546
6547         BUG_ON(!mmu_is_nested(vcpu));
6548
6549         /* NPT walks are always user-walks */
6550         access |= PFERR_USER_MASK;
6551         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6552
6553         return t_gpa;
6554 }
6555
6556 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6557                               struct x86_exception *exception)
6558 {
6559         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6560         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6561 }
6562 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6563
6564  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6565                                 struct x86_exception *exception)
6566 {
6567         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6568         access |= PFERR_FETCH_MASK;
6569         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6570 }
6571
6572 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6573                                struct x86_exception *exception)
6574 {
6575         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6576         access |= PFERR_WRITE_MASK;
6577         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6578 }
6579 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6580
6581 /* uses this to access any guest's mapped memory without checking CPL */
6582 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6583                                 struct x86_exception *exception)
6584 {
6585         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6586 }
6587
6588 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6589                                       struct kvm_vcpu *vcpu, u32 access,
6590                                       struct x86_exception *exception)
6591 {
6592         void *data = val;
6593         int r = X86EMUL_CONTINUE;
6594
6595         while (bytes) {
6596                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6597                                                             exception);
6598                 unsigned offset = addr & (PAGE_SIZE-1);
6599                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6600                 int ret;
6601
6602                 if (gpa == UNMAPPED_GVA)
6603                         return X86EMUL_PROPAGATE_FAULT;
6604                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6605                                                offset, toread);
6606                 if (ret < 0) {
6607                         r = X86EMUL_IO_NEEDED;
6608                         goto out;
6609                 }
6610
6611                 bytes -= toread;
6612                 data += toread;
6613                 addr += toread;
6614         }
6615 out:
6616         return r;
6617 }
6618
6619 /* used for instruction fetching */
6620 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6621                                 gva_t addr, void *val, unsigned int bytes,
6622                                 struct x86_exception *exception)
6623 {
6624         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6625         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6626         unsigned offset;
6627         int ret;
6628
6629         /* Inline kvm_read_guest_virt_helper for speed.  */
6630         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6631                                                     exception);
6632         if (unlikely(gpa == UNMAPPED_GVA))
6633                 return X86EMUL_PROPAGATE_FAULT;
6634
6635         offset = addr & (PAGE_SIZE-1);
6636         if (WARN_ON(offset + bytes > PAGE_SIZE))
6637                 bytes = (unsigned)PAGE_SIZE - offset;
6638         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6639                                        offset, bytes);
6640         if (unlikely(ret < 0))
6641                 return X86EMUL_IO_NEEDED;
6642
6643         return X86EMUL_CONTINUE;
6644 }
6645
6646 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6647                                gva_t addr, void *val, unsigned int bytes,
6648                                struct x86_exception *exception)
6649 {
6650         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6651
6652         /*
6653          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6654          * is returned, but our callers are not ready for that and they blindly
6655          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6656          * uninitialized kernel stack memory into cr2 and error code.
6657          */
6658         memset(exception, 0, sizeof(*exception));
6659         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6660                                           exception);
6661 }
6662 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6663
6664 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6665                              gva_t addr, void *val, unsigned int bytes,
6666                              struct x86_exception *exception, bool system)
6667 {
6668         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6669         u32 access = 0;
6670
6671         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6672                 access |= PFERR_USER_MASK;
6673
6674         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6675 }
6676
6677 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6678                 unsigned long addr, void *val, unsigned int bytes)
6679 {
6680         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6681         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6682
6683         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6684 }
6685
6686 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6687                                       struct kvm_vcpu *vcpu, u32 access,
6688                                       struct x86_exception *exception)
6689 {
6690         void *data = val;
6691         int r = X86EMUL_CONTINUE;
6692
6693         while (bytes) {
6694                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6695                                                              access,
6696                                                              exception);
6697                 unsigned offset = addr & (PAGE_SIZE-1);
6698                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6699                 int ret;
6700
6701                 if (gpa == UNMAPPED_GVA)
6702                         return X86EMUL_PROPAGATE_FAULT;
6703                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6704                 if (ret < 0) {
6705                         r = X86EMUL_IO_NEEDED;
6706                         goto out;
6707                 }
6708
6709                 bytes -= towrite;
6710                 data += towrite;
6711                 addr += towrite;
6712         }
6713 out:
6714         return r;
6715 }
6716
6717 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6718                               unsigned int bytes, struct x86_exception *exception,
6719                               bool system)
6720 {
6721         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6722         u32 access = PFERR_WRITE_MASK;
6723
6724         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6725                 access |= PFERR_USER_MASK;
6726
6727         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6728                                            access, exception);
6729 }
6730
6731 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6732                                 unsigned int bytes, struct x86_exception *exception)
6733 {
6734         /* kvm_write_guest_virt_system can pull in tons of pages. */
6735         vcpu->arch.l1tf_flush_l1d = true;
6736
6737         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6738                                            PFERR_WRITE_MASK, exception);
6739 }
6740 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6741
6742 int handle_ud(struct kvm_vcpu *vcpu)
6743 {
6744         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6745         int emul_type = EMULTYPE_TRAP_UD;
6746         char sig[5]; /* ud2; .ascii "kvm" */
6747         struct x86_exception e;
6748
6749         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6750                 return 1;
6751
6752         if (force_emulation_prefix &&
6753             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6754                                 sig, sizeof(sig), &e) == 0 &&
6755             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6756                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6757                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6758         }
6759
6760         return kvm_emulate_instruction(vcpu, emul_type);
6761 }
6762 EXPORT_SYMBOL_GPL(handle_ud);
6763
6764 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6765                             gpa_t gpa, bool write)
6766 {
6767         /* For APIC access vmexit */
6768         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6769                 return 1;
6770
6771         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6772                 trace_vcpu_match_mmio(gva, gpa, write, true);
6773                 return 1;
6774         }
6775
6776         return 0;
6777 }
6778
6779 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6780                                 gpa_t *gpa, struct x86_exception *exception,
6781                                 bool write)
6782 {
6783         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6784                 | (write ? PFERR_WRITE_MASK : 0);
6785
6786         /*
6787          * currently PKRU is only applied to ept enabled guest so
6788          * there is no pkey in EPT page table for L1 guest or EPT
6789          * shadow page table for L2 guest.
6790          */
6791         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6792             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6793                               vcpu->arch.mmio_access, 0, access))) {
6794                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6795                                         (gva & (PAGE_SIZE - 1));
6796                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6797                 return 1;
6798         }
6799
6800         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6801
6802         if (*gpa == UNMAPPED_GVA)
6803                 return -1;
6804
6805         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6806 }
6807
6808 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6809                         const void *val, int bytes)
6810 {
6811         int ret;
6812
6813         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6814         if (ret < 0)
6815                 return 0;
6816         kvm_page_track_write(vcpu, gpa, val, bytes);
6817         return 1;
6818 }
6819
6820 struct read_write_emulator_ops {
6821         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6822                                   int bytes);
6823         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6824                                   void *val, int bytes);
6825         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6826                                int bytes, void *val);
6827         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6828                                     void *val, int bytes);
6829         bool write;
6830 };
6831
6832 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6833 {
6834         if (vcpu->mmio_read_completed) {
6835                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6836                                vcpu->mmio_fragments[0].gpa, val);
6837                 vcpu->mmio_read_completed = 0;
6838                 return 1;
6839         }
6840
6841         return 0;
6842 }
6843
6844 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6845                         void *val, int bytes)
6846 {
6847         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6848 }
6849
6850 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6851                          void *val, int bytes)
6852 {
6853         return emulator_write_phys(vcpu, gpa, val, bytes);
6854 }
6855
6856 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6857 {
6858         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6859         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6860 }
6861
6862 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6863                           void *val, int bytes)
6864 {
6865         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6866         return X86EMUL_IO_NEEDED;
6867 }
6868
6869 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6870                            void *val, int bytes)
6871 {
6872         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6873
6874         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6875         return X86EMUL_CONTINUE;
6876 }
6877
6878 static const struct read_write_emulator_ops read_emultor = {
6879         .read_write_prepare = read_prepare,
6880         .read_write_emulate = read_emulate,
6881         .read_write_mmio = vcpu_mmio_read,
6882         .read_write_exit_mmio = read_exit_mmio,
6883 };
6884
6885 static const struct read_write_emulator_ops write_emultor = {
6886         .read_write_emulate = write_emulate,
6887         .read_write_mmio = write_mmio,
6888         .read_write_exit_mmio = write_exit_mmio,
6889         .write = true,
6890 };
6891
6892 static int emulator_read_write_onepage(unsigned long addr, void *val,
6893                                        unsigned int bytes,
6894                                        struct x86_exception *exception,
6895                                        struct kvm_vcpu *vcpu,
6896                                        const struct read_write_emulator_ops *ops)
6897 {
6898         gpa_t gpa;
6899         int handled, ret;
6900         bool write = ops->write;
6901         struct kvm_mmio_fragment *frag;
6902         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6903
6904         /*
6905          * If the exit was due to a NPF we may already have a GPA.
6906          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6907          * Note, this cannot be used on string operations since string
6908          * operation using rep will only have the initial GPA from the NPF
6909          * occurred.
6910          */
6911         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6912             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6913                 gpa = ctxt->gpa_val;
6914                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6915         } else {
6916                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6917                 if (ret < 0)
6918                         return X86EMUL_PROPAGATE_FAULT;
6919         }
6920
6921         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6922                 return X86EMUL_CONTINUE;
6923
6924         /*
6925          * Is this MMIO handled locally?
6926          */
6927         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6928         if (handled == bytes)
6929                 return X86EMUL_CONTINUE;
6930
6931         gpa += handled;
6932         bytes -= handled;
6933         val += handled;
6934
6935         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6936         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6937         frag->gpa = gpa;
6938         frag->data = val;
6939         frag->len = bytes;
6940         return X86EMUL_CONTINUE;
6941 }
6942
6943 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6944                         unsigned long addr,
6945                         void *val, unsigned int bytes,
6946                         struct x86_exception *exception,
6947                         const struct read_write_emulator_ops *ops)
6948 {
6949         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6950         gpa_t gpa;
6951         int rc;
6952
6953         if (ops->read_write_prepare &&
6954                   ops->read_write_prepare(vcpu, val, bytes))
6955                 return X86EMUL_CONTINUE;
6956
6957         vcpu->mmio_nr_fragments = 0;
6958
6959         /* Crossing a page boundary? */
6960         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6961                 int now;
6962
6963                 now = -addr & ~PAGE_MASK;
6964                 rc = emulator_read_write_onepage(addr, val, now, exception,
6965                                                  vcpu, ops);
6966
6967                 if (rc != X86EMUL_CONTINUE)
6968                         return rc;
6969                 addr += now;
6970                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6971                         addr = (u32)addr;
6972                 val += now;
6973                 bytes -= now;
6974         }
6975
6976         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6977                                          vcpu, ops);
6978         if (rc != X86EMUL_CONTINUE)
6979                 return rc;
6980
6981         if (!vcpu->mmio_nr_fragments)
6982                 return rc;
6983
6984         gpa = vcpu->mmio_fragments[0].gpa;
6985
6986         vcpu->mmio_needed = 1;
6987         vcpu->mmio_cur_fragment = 0;
6988
6989         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6990         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6991         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6992         vcpu->run->mmio.phys_addr = gpa;
6993
6994         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6995 }
6996
6997 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6998                                   unsigned long addr,
6999                                   void *val,
7000                                   unsigned int bytes,
7001                                   struct x86_exception *exception)
7002 {
7003         return emulator_read_write(ctxt, addr, val, bytes,
7004                                    exception, &read_emultor);
7005 }
7006
7007 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7008                             unsigned long addr,
7009                             const void *val,
7010                             unsigned int bytes,
7011                             struct x86_exception *exception)
7012 {
7013         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7014                                    exception, &write_emultor);
7015 }
7016
7017 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7018         (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7019
7020 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7021                                      unsigned long addr,
7022                                      const void *old,
7023                                      const void *new,
7024                                      unsigned int bytes,
7025                                      struct x86_exception *exception)
7026 {
7027         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7028         u64 page_line_mask;
7029         unsigned long hva;
7030         gpa_t gpa;
7031         int r;
7032
7033         /* guests cmpxchg8b have to be emulated atomically */
7034         if (bytes > 8 || (bytes & (bytes - 1)))
7035                 goto emul_write;
7036
7037         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7038
7039         if (gpa == UNMAPPED_GVA ||
7040             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7041                 goto emul_write;
7042
7043         /*
7044          * Emulate the atomic as a straight write to avoid #AC if SLD is
7045          * enabled in the host and the access splits a cache line.
7046          */
7047         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7048                 page_line_mask = ~(cache_line_size() - 1);
7049         else
7050                 page_line_mask = PAGE_MASK;
7051
7052         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7053                 goto emul_write;
7054
7055         hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7056         if (kvm_is_error_hva(hva))
7057                 goto emul_write;
7058
7059         hva += offset_in_page(gpa);
7060
7061         switch (bytes) {
7062         case 1:
7063                 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7064                 break;
7065         case 2:
7066                 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7067                 break;
7068         case 4:
7069                 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7070                 break;
7071         case 8:
7072                 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7073                 break;
7074         default:
7075                 BUG();
7076         }
7077
7078         if (r < 0)
7079                 goto emul_write;
7080         if (r)
7081                 return X86EMUL_CMPXCHG_FAILED;
7082
7083         kvm_page_track_write(vcpu, gpa, new, bytes);
7084
7085         return X86EMUL_CONTINUE;
7086
7087 emul_write:
7088         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7089
7090         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7091 }
7092
7093 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7094 {
7095         int r = 0, i;
7096
7097         for (i = 0; i < vcpu->arch.pio.count; i++) {
7098                 if (vcpu->arch.pio.in)
7099                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7100                                             vcpu->arch.pio.size, pd);
7101                 else
7102                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7103                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7104                                              pd);
7105                 if (r)
7106                         break;
7107                 pd += vcpu->arch.pio.size;
7108         }
7109         return r;
7110 }
7111
7112 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7113                                unsigned short port,
7114                                unsigned int count, bool in)
7115 {
7116         vcpu->arch.pio.port = port;
7117         vcpu->arch.pio.in = in;
7118         vcpu->arch.pio.count  = count;
7119         vcpu->arch.pio.size = size;
7120
7121         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7122                 return 1;
7123
7124         vcpu->run->exit_reason = KVM_EXIT_IO;
7125         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7126         vcpu->run->io.size = size;
7127         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7128         vcpu->run->io.count = count;
7129         vcpu->run->io.port = port;
7130
7131         return 0;
7132 }
7133
7134 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7135                              unsigned short port, unsigned int count)
7136 {
7137         WARN_ON(vcpu->arch.pio.count);
7138         memset(vcpu->arch.pio_data, 0, size * count);
7139         return emulator_pio_in_out(vcpu, size, port, count, true);
7140 }
7141
7142 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7143 {
7144         int size = vcpu->arch.pio.size;
7145         unsigned count = vcpu->arch.pio.count;
7146         memcpy(val, vcpu->arch.pio_data, size * count);
7147         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7148         vcpu->arch.pio.count = 0;
7149 }
7150
7151 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7152                            unsigned short port, void *val, unsigned int count)
7153 {
7154         if (vcpu->arch.pio.count) {
7155                 /*
7156                  * Complete a previous iteration that required userspace I/O.
7157                  * Note, @count isn't guaranteed to match pio.count as userspace
7158                  * can modify ECX before rerunning the vCPU.  Ignore any such
7159                  * shenanigans as KVM doesn't support modifying the rep count,
7160                  * and the emulator ensures @count doesn't overflow the buffer.
7161                  */
7162         } else {
7163                 int r = __emulator_pio_in(vcpu, size, port, count);
7164                 if (!r)
7165                         return r;
7166
7167                 /* Results already available, fall through.  */
7168         }
7169
7170         complete_emulator_pio_in(vcpu, val);
7171         return 1;
7172 }
7173
7174 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7175                                     int size, unsigned short port, void *val,
7176                                     unsigned int count)
7177 {
7178         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7179
7180 }
7181
7182 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7183                             unsigned short port, const void *val,
7184                             unsigned int count)
7185 {
7186         int ret;
7187
7188         memcpy(vcpu->arch.pio_data, val, size * count);
7189         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7190         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7191         if (ret)
7192                 vcpu->arch.pio.count = 0;
7193
7194         return ret;
7195 }
7196
7197 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7198                                      int size, unsigned short port,
7199                                      const void *val, unsigned int count)
7200 {
7201         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7202 }
7203
7204 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7205 {
7206         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7207 }
7208
7209 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7210 {
7211         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7212 }
7213
7214 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7215 {
7216         if (!need_emulate_wbinvd(vcpu))
7217                 return X86EMUL_CONTINUE;
7218
7219         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7220                 int cpu = get_cpu();
7221
7222                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7223                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7224                                 wbinvd_ipi, NULL, 1);
7225                 put_cpu();
7226                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7227         } else
7228                 wbinvd();
7229         return X86EMUL_CONTINUE;
7230 }
7231
7232 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7233 {
7234         kvm_emulate_wbinvd_noskip(vcpu);
7235         return kvm_skip_emulated_instruction(vcpu);
7236 }
7237 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7238
7239
7240
7241 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7242 {
7243         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7244 }
7245
7246 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7247                             unsigned long *dest)
7248 {
7249         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7250 }
7251
7252 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7253                            unsigned long value)
7254 {
7255
7256         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7257 }
7258
7259 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7260 {
7261         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7262 }
7263
7264 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7265 {
7266         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7267         unsigned long value;
7268
7269         switch (cr) {
7270         case 0:
7271                 value = kvm_read_cr0(vcpu);
7272                 break;
7273         case 2:
7274                 value = vcpu->arch.cr2;
7275                 break;
7276         case 3:
7277                 value = kvm_read_cr3(vcpu);
7278                 break;
7279         case 4:
7280                 value = kvm_read_cr4(vcpu);
7281                 break;
7282         case 8:
7283                 value = kvm_get_cr8(vcpu);
7284                 break;
7285         default:
7286                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7287                 return 0;
7288         }
7289
7290         return value;
7291 }
7292
7293 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7294 {
7295         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7296         int res = 0;
7297
7298         switch (cr) {
7299         case 0:
7300                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7301                 break;
7302         case 2:
7303                 vcpu->arch.cr2 = val;
7304                 break;
7305         case 3:
7306                 res = kvm_set_cr3(vcpu, val);
7307                 break;
7308         case 4:
7309                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7310                 break;
7311         case 8:
7312                 res = kvm_set_cr8(vcpu, val);
7313                 break;
7314         default:
7315                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7316                 res = -1;
7317         }
7318
7319         return res;
7320 }
7321
7322 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7323 {
7324         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7325 }
7326
7327 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7328 {
7329         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7330 }
7331
7332 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7333 {
7334         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7335 }
7336
7337 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7338 {
7339         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7340 }
7341
7342 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7343 {
7344         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7345 }
7346
7347 static unsigned long emulator_get_cached_segment_base(
7348         struct x86_emulate_ctxt *ctxt, int seg)
7349 {
7350         return get_segment_base(emul_to_vcpu(ctxt), seg);
7351 }
7352
7353 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7354                                  struct desc_struct *desc, u32 *base3,
7355                                  int seg)
7356 {
7357         struct kvm_segment var;
7358
7359         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7360         *selector = var.selector;
7361
7362         if (var.unusable) {
7363                 memset(desc, 0, sizeof(*desc));
7364                 if (base3)
7365                         *base3 = 0;
7366                 return false;
7367         }
7368
7369         if (var.g)
7370                 var.limit >>= 12;
7371         set_desc_limit(desc, var.limit);
7372         set_desc_base(desc, (unsigned long)var.base);
7373 #ifdef CONFIG_X86_64
7374         if (base3)
7375                 *base3 = var.base >> 32;
7376 #endif
7377         desc->type = var.type;
7378         desc->s = var.s;
7379         desc->dpl = var.dpl;
7380         desc->p = var.present;
7381         desc->avl = var.avl;
7382         desc->l = var.l;
7383         desc->d = var.db;
7384         desc->g = var.g;
7385
7386         return true;
7387 }
7388
7389 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7390                                  struct desc_struct *desc, u32 base3,
7391                                  int seg)
7392 {
7393         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7394         struct kvm_segment var;
7395
7396         var.selector = selector;
7397         var.base = get_desc_base(desc);
7398 #ifdef CONFIG_X86_64
7399         var.base |= ((u64)base3) << 32;
7400 #endif
7401         var.limit = get_desc_limit(desc);
7402         if (desc->g)
7403                 var.limit = (var.limit << 12) | 0xfff;
7404         var.type = desc->type;
7405         var.dpl = desc->dpl;
7406         var.db = desc->d;
7407         var.s = desc->s;
7408         var.l = desc->l;
7409         var.g = desc->g;
7410         var.avl = desc->avl;
7411         var.present = desc->p;
7412         var.unusable = !var.present;
7413         var.padding = 0;
7414
7415         kvm_set_segment(vcpu, &var, seg);
7416         return;
7417 }
7418
7419 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7420                             u32 msr_index, u64 *pdata)
7421 {
7422         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7423         int r;
7424
7425         r = kvm_get_msr(vcpu, msr_index, pdata);
7426
7427         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7428                 /* Bounce to user space */
7429                 return X86EMUL_IO_NEEDED;
7430         }
7431
7432         return r;
7433 }
7434
7435 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7436                             u32 msr_index, u64 data)
7437 {
7438         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7439         int r;
7440
7441         r = kvm_set_msr(vcpu, msr_index, data);
7442
7443         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7444                 /* Bounce to user space */
7445                 return X86EMUL_IO_NEEDED;
7446         }
7447
7448         return r;
7449 }
7450
7451 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7452 {
7453         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7454
7455         return vcpu->arch.smbase;
7456 }
7457
7458 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7459 {
7460         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7461
7462         vcpu->arch.smbase = smbase;
7463 }
7464
7465 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7466                               u32 pmc)
7467 {
7468         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7469 }
7470
7471 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7472                              u32 pmc, u64 *pdata)
7473 {
7474         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7475 }
7476
7477 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7478 {
7479         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7480 }
7481
7482 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7483                               struct x86_instruction_info *info,
7484                               enum x86_intercept_stage stage)
7485 {
7486         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7487                                             &ctxt->exception);
7488 }
7489
7490 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7491                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7492                               bool exact_only)
7493 {
7494         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7495 }
7496
7497 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7498 {
7499         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7500 }
7501
7502 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7503 {
7504         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7505 }
7506
7507 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7508 {
7509         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7510 }
7511
7512 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7513 {
7514         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7515 }
7516
7517 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7518 {
7519         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7520 }
7521
7522 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7523 {
7524         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7525 }
7526
7527 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7528 {
7529         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7530 }
7531
7532 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7533 {
7534         return emul_to_vcpu(ctxt)->arch.hflags;
7535 }
7536
7537 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7538 {
7539         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7540
7541         kvm_smm_changed(vcpu, false);
7542 }
7543
7544 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7545                                   const char *smstate)
7546 {
7547         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7548 }
7549
7550 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7551 {
7552         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7553 }
7554
7555 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7556 {
7557         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7558 }
7559
7560 static const struct x86_emulate_ops emulate_ops = {
7561         .read_gpr            = emulator_read_gpr,
7562         .write_gpr           = emulator_write_gpr,
7563         .read_std            = emulator_read_std,
7564         .write_std           = emulator_write_std,
7565         .read_phys           = kvm_read_guest_phys_system,
7566         .fetch               = kvm_fetch_guest_virt,
7567         .read_emulated       = emulator_read_emulated,
7568         .write_emulated      = emulator_write_emulated,
7569         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7570         .invlpg              = emulator_invlpg,
7571         .pio_in_emulated     = emulator_pio_in_emulated,
7572         .pio_out_emulated    = emulator_pio_out_emulated,
7573         .get_segment         = emulator_get_segment,
7574         .set_segment         = emulator_set_segment,
7575         .get_cached_segment_base = emulator_get_cached_segment_base,
7576         .get_gdt             = emulator_get_gdt,
7577         .get_idt             = emulator_get_idt,
7578         .set_gdt             = emulator_set_gdt,
7579         .set_idt             = emulator_set_idt,
7580         .get_cr              = emulator_get_cr,
7581         .set_cr              = emulator_set_cr,
7582         .cpl                 = emulator_get_cpl,
7583         .get_dr              = emulator_get_dr,
7584         .set_dr              = emulator_set_dr,
7585         .get_smbase          = emulator_get_smbase,
7586         .set_smbase          = emulator_set_smbase,
7587         .set_msr             = emulator_set_msr,
7588         .get_msr             = emulator_get_msr,
7589         .check_pmc           = emulator_check_pmc,
7590         .read_pmc            = emulator_read_pmc,
7591         .halt                = emulator_halt,
7592         .wbinvd              = emulator_wbinvd,
7593         .fix_hypercall       = emulator_fix_hypercall,
7594         .intercept           = emulator_intercept,
7595         .get_cpuid           = emulator_get_cpuid,
7596         .guest_has_long_mode = emulator_guest_has_long_mode,
7597         .guest_has_movbe     = emulator_guest_has_movbe,
7598         .guest_has_fxsr      = emulator_guest_has_fxsr,
7599         .guest_has_rdpid     = emulator_guest_has_rdpid,
7600         .set_nmi_mask        = emulator_set_nmi_mask,
7601         .get_hflags          = emulator_get_hflags,
7602         .exiting_smm         = emulator_exiting_smm,
7603         .leave_smm           = emulator_leave_smm,
7604         .triple_fault        = emulator_triple_fault,
7605         .set_xcr             = emulator_set_xcr,
7606 };
7607
7608 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7609 {
7610         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7611         /*
7612          * an sti; sti; sequence only disable interrupts for the first
7613          * instruction. So, if the last instruction, be it emulated or
7614          * not, left the system with the INT_STI flag enabled, it
7615          * means that the last instruction is an sti. We should not
7616          * leave the flag on in this case. The same goes for mov ss
7617          */
7618         if (int_shadow & mask)
7619                 mask = 0;
7620         if (unlikely(int_shadow || mask)) {
7621                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7622                 if (!mask)
7623                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7624         }
7625 }
7626
7627 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7628 {
7629         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7630         if (ctxt->exception.vector == PF_VECTOR)
7631                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7632
7633         if (ctxt->exception.error_code_valid)
7634                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7635                                       ctxt->exception.error_code);
7636         else
7637                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7638         return false;
7639 }
7640
7641 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7642 {
7643         struct x86_emulate_ctxt *ctxt;
7644
7645         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7646         if (!ctxt) {
7647                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7648                 return NULL;
7649         }
7650
7651         ctxt->vcpu = vcpu;
7652         ctxt->ops = &emulate_ops;
7653         vcpu->arch.emulate_ctxt = ctxt;
7654
7655         return ctxt;
7656 }
7657
7658 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7659 {
7660         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7661         int cs_db, cs_l;
7662
7663         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7664
7665         ctxt->gpa_available = false;
7666         ctxt->eflags = kvm_get_rflags(vcpu);
7667         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7668
7669         ctxt->eip = kvm_rip_read(vcpu);
7670         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7671                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7672                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7673                      cs_db                              ? X86EMUL_MODE_PROT32 :
7674                                                           X86EMUL_MODE_PROT16;
7675         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7676         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7677         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7678
7679         ctxt->interruptibility = 0;
7680         ctxt->have_exception = false;
7681         ctxt->exception.vector = -1;
7682         ctxt->perm_ok = false;
7683
7684         init_decode_cache(ctxt);
7685         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7686 }
7687
7688 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7689 {
7690         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7691         int ret;
7692
7693         init_emulate_ctxt(vcpu);
7694
7695         ctxt->op_bytes = 2;
7696         ctxt->ad_bytes = 2;
7697         ctxt->_eip = ctxt->eip + inc_eip;
7698         ret = emulate_int_real(ctxt, irq);
7699
7700         if (ret != X86EMUL_CONTINUE) {
7701                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7702         } else {
7703                 ctxt->eip = ctxt->_eip;
7704                 kvm_rip_write(vcpu, ctxt->eip);
7705                 kvm_set_rflags(vcpu, ctxt->eflags);
7706         }
7707 }
7708 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7709
7710 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7711 {
7712         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7713         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7714         struct kvm_run *run = vcpu->run;
7715
7716         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7717         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7718         run->emulation_failure.ndata = 0;
7719         run->emulation_failure.flags = 0;
7720
7721         if (insn_size) {
7722                 run->emulation_failure.ndata = 3;
7723                 run->emulation_failure.flags |=
7724                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7725                 run->emulation_failure.insn_size = insn_size;
7726                 memset(run->emulation_failure.insn_bytes, 0x90,
7727                        sizeof(run->emulation_failure.insn_bytes));
7728                 memcpy(run->emulation_failure.insn_bytes,
7729                        ctxt->fetch.data, insn_size);
7730         }
7731 }
7732
7733 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7734 {
7735         struct kvm *kvm = vcpu->kvm;
7736
7737         ++vcpu->stat.insn_emulation_fail;
7738         trace_kvm_emulate_insn_failed(vcpu);
7739
7740         if (emulation_type & EMULTYPE_VMWARE_GP) {
7741                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7742                 return 1;
7743         }
7744
7745         if (kvm->arch.exit_on_emulation_error ||
7746             (emulation_type & EMULTYPE_SKIP)) {
7747                 prepare_emulation_failure_exit(vcpu);
7748                 return 0;
7749         }
7750
7751         kvm_queue_exception(vcpu, UD_VECTOR);
7752
7753         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7754                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7755                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7756                 vcpu->run->internal.ndata = 0;
7757                 return 0;
7758         }
7759
7760         return 1;
7761 }
7762
7763 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7764                                   bool write_fault_to_shadow_pgtable,
7765                                   int emulation_type)
7766 {
7767         gpa_t gpa = cr2_or_gpa;
7768         kvm_pfn_t pfn;
7769
7770         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7771                 return false;
7772
7773         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7774             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7775                 return false;
7776
7777         if (!vcpu->arch.mmu->direct_map) {
7778                 /*
7779                  * Write permission should be allowed since only
7780                  * write access need to be emulated.
7781                  */
7782                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7783
7784                 /*
7785                  * If the mapping is invalid in guest, let cpu retry
7786                  * it to generate fault.
7787                  */
7788                 if (gpa == UNMAPPED_GVA)
7789                         return true;
7790         }
7791
7792         /*
7793          * Do not retry the unhandleable instruction if it faults on the
7794          * readonly host memory, otherwise it will goto a infinite loop:
7795          * retry instruction -> write #PF -> emulation fail -> retry
7796          * instruction -> ...
7797          */
7798         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7799
7800         /*
7801          * If the instruction failed on the error pfn, it can not be fixed,
7802          * report the error to userspace.
7803          */
7804         if (is_error_noslot_pfn(pfn))
7805                 return false;
7806
7807         kvm_release_pfn_clean(pfn);
7808
7809         /* The instructions are well-emulated on direct mmu. */
7810         if (vcpu->arch.mmu->direct_map) {
7811                 unsigned int indirect_shadow_pages;
7812
7813                 write_lock(&vcpu->kvm->mmu_lock);
7814                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7815                 write_unlock(&vcpu->kvm->mmu_lock);
7816
7817                 if (indirect_shadow_pages)
7818                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7819
7820                 return true;
7821         }
7822
7823         /*
7824          * if emulation was due to access to shadowed page table
7825          * and it failed try to unshadow page and re-enter the
7826          * guest to let CPU execute the instruction.
7827          */
7828         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7829
7830         /*
7831          * If the access faults on its page table, it can not
7832          * be fixed by unprotecting shadow page and it should
7833          * be reported to userspace.
7834          */
7835         return !write_fault_to_shadow_pgtable;
7836 }
7837
7838 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7839                               gpa_t cr2_or_gpa,  int emulation_type)
7840 {
7841         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7842         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7843
7844         last_retry_eip = vcpu->arch.last_retry_eip;
7845         last_retry_addr = vcpu->arch.last_retry_addr;
7846
7847         /*
7848          * If the emulation is caused by #PF and it is non-page_table
7849          * writing instruction, it means the VM-EXIT is caused by shadow
7850          * page protected, we can zap the shadow page and retry this
7851          * instruction directly.
7852          *
7853          * Note: if the guest uses a non-page-table modifying instruction
7854          * on the PDE that points to the instruction, then we will unmap
7855          * the instruction and go to an infinite loop. So, we cache the
7856          * last retried eip and the last fault address, if we meet the eip
7857          * and the address again, we can break out of the potential infinite
7858          * loop.
7859          */
7860         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7861
7862         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7863                 return false;
7864
7865         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7866             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7867                 return false;
7868
7869         if (x86_page_table_writing_insn(ctxt))
7870                 return false;
7871
7872         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7873                 return false;
7874
7875         vcpu->arch.last_retry_eip = ctxt->eip;
7876         vcpu->arch.last_retry_addr = cr2_or_gpa;
7877
7878         if (!vcpu->arch.mmu->direct_map)
7879                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7880
7881         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7882
7883         return true;
7884 }
7885
7886 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7887 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7888
7889 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7890 {
7891         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7892
7893         if (entering_smm) {
7894                 vcpu->arch.hflags |= HF_SMM_MASK;
7895         } else {
7896                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7897
7898                 /* Process a latched INIT or SMI, if any.  */
7899                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7900
7901                 /*
7902                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7903                  * on SMM exit we still need to reload them from
7904                  * guest memory
7905                  */
7906                 vcpu->arch.pdptrs_from_userspace = false;
7907         }
7908
7909         kvm_mmu_reset_context(vcpu);
7910 }
7911
7912 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7913                                 unsigned long *db)
7914 {
7915         u32 dr6 = 0;
7916         int i;
7917         u32 enable, rwlen;
7918
7919         enable = dr7;
7920         rwlen = dr7 >> 16;
7921         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7922                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7923                         dr6 |= (1 << i);
7924         return dr6;
7925 }
7926
7927 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7928 {
7929         struct kvm_run *kvm_run = vcpu->run;
7930
7931         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7932                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7933                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7934                 kvm_run->debug.arch.exception = DB_VECTOR;
7935                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7936                 return 0;
7937         }
7938         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7939         return 1;
7940 }
7941
7942 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7943 {
7944         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7945         int r;
7946
7947         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7948         if (unlikely(!r))
7949                 return 0;
7950
7951         /*
7952          * rflags is the old, "raw" value of the flags.  The new value has
7953          * not been saved yet.
7954          *
7955          * This is correct even for TF set by the guest, because "the
7956          * processor will not generate this exception after the instruction
7957          * that sets the TF flag".
7958          */
7959         if (unlikely(rflags & X86_EFLAGS_TF))
7960                 r = kvm_vcpu_do_singlestep(vcpu);
7961         return r;
7962 }
7963 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7964
7965 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
7966 {
7967         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7968             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7969                 struct kvm_run *kvm_run = vcpu->run;
7970                 unsigned long eip = kvm_get_linear_rip(vcpu);
7971                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7972                                            vcpu->arch.guest_debug_dr7,
7973                                            vcpu->arch.eff_db);
7974
7975                 if (dr6 != 0) {
7976                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7977                         kvm_run->debug.arch.pc = eip;
7978                         kvm_run->debug.arch.exception = DB_VECTOR;
7979                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7980                         *r = 0;
7981                         return true;
7982                 }
7983         }
7984
7985         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7986             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7987                 unsigned long eip = kvm_get_linear_rip(vcpu);
7988                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7989                                            vcpu->arch.dr7,
7990                                            vcpu->arch.db);
7991
7992                 if (dr6 != 0) {
7993                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7994                         *r = 1;
7995                         return true;
7996                 }
7997         }
7998
7999         return false;
8000 }
8001
8002 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8003 {
8004         switch (ctxt->opcode_len) {
8005         case 1:
8006                 switch (ctxt->b) {
8007                 case 0xe4:      /* IN */
8008                 case 0xe5:
8009                 case 0xec:
8010                 case 0xed:
8011                 case 0xe6:      /* OUT */
8012                 case 0xe7:
8013                 case 0xee:
8014                 case 0xef:
8015                 case 0x6c:      /* INS */
8016                 case 0x6d:
8017                 case 0x6e:      /* OUTS */
8018                 case 0x6f:
8019                         return true;
8020                 }
8021                 break;
8022         case 2:
8023                 switch (ctxt->b) {
8024                 case 0x33:      /* RDPMC */
8025                         return true;
8026                 }
8027                 break;
8028         }
8029
8030         return false;
8031 }
8032
8033 /*
8034  * Decode an instruction for emulation.  The caller is responsible for handling
8035  * code breakpoints.  Note, manually detecting code breakpoints is unnecessary
8036  * (and wrong) when emulating on an intercepted fault-like exception[*], as
8037  * code breakpoints have higher priority and thus have already been done by
8038  * hardware.
8039  *
8040  * [*] Except #MC, which is higher priority, but KVM should never emulate in
8041  *     response to a machine check.
8042  */
8043 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8044                                     void *insn, int insn_len)
8045 {
8046         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8047         int r;
8048
8049         init_emulate_ctxt(vcpu);
8050
8051         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8052
8053         trace_kvm_emulate_insn_start(vcpu);
8054         ++vcpu->stat.insn_emulation;
8055
8056         return r;
8057 }
8058 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8059
8060 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8061                             int emulation_type, void *insn, int insn_len)
8062 {
8063         int r;
8064         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8065         bool writeback = true;
8066         bool write_fault_to_spt;
8067
8068         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
8069                 return 1;
8070
8071         vcpu->arch.l1tf_flush_l1d = true;
8072
8073         /*
8074          * Clear write_fault_to_shadow_pgtable here to ensure it is
8075          * never reused.
8076          */
8077         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8078         vcpu->arch.write_fault_to_shadow_pgtable = false;
8079
8080         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8081                 kvm_clear_exception_queue(vcpu);
8082
8083                 /*
8084                  * Return immediately if RIP hits a code breakpoint, such #DBs
8085                  * are fault-like and are higher priority than any faults on
8086                  * the code fetch itself.
8087                  */
8088                 if (!(emulation_type & EMULTYPE_SKIP) &&
8089                     kvm_vcpu_check_code_breakpoint(vcpu, &r))
8090                         return r;
8091
8092                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8093                                                     insn, insn_len);
8094                 if (r != EMULATION_OK)  {
8095                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8096                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8097                                 kvm_queue_exception(vcpu, UD_VECTOR);
8098                                 return 1;
8099                         }
8100                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8101                                                   write_fault_to_spt,
8102                                                   emulation_type))
8103                                 return 1;
8104                         if (ctxt->have_exception) {
8105                                 /*
8106                                  * #UD should result in just EMULATION_FAILED, and trap-like
8107                                  * exception should not be encountered during decode.
8108                                  */
8109                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8110                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8111                                 inject_emulated_exception(vcpu);
8112                                 return 1;
8113                         }
8114                         return handle_emulation_failure(vcpu, emulation_type);
8115                 }
8116         }
8117
8118         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8119             !is_vmware_backdoor_opcode(ctxt)) {
8120                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8121                 return 1;
8122         }
8123
8124         /*
8125          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8126          * for kvm_skip_emulated_instruction().  The caller is responsible for
8127          * updating interruptibility state and injecting single-step #DBs.
8128          */
8129         if (emulation_type & EMULTYPE_SKIP) {
8130                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8131                         ctxt->eip = (u32)ctxt->_eip;
8132                 else
8133                         ctxt->eip = ctxt->_eip;
8134
8135                 kvm_rip_write(vcpu, ctxt->eip);
8136                 if (ctxt->eflags & X86_EFLAGS_RF)
8137                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8138                 return 1;
8139         }
8140
8141         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8142                 return 1;
8143
8144         /* this is needed for vmware backdoor interface to work since it
8145            changes registers values  during IO operation */
8146         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8147                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8148                 emulator_invalidate_register_cache(ctxt);
8149         }
8150
8151 restart:
8152         if (emulation_type & EMULTYPE_PF) {
8153                 /* Save the faulting GPA (cr2) in the address field */
8154                 ctxt->exception.address = cr2_or_gpa;
8155
8156                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8157                 if (vcpu->arch.mmu->direct_map) {
8158                         ctxt->gpa_available = true;
8159                         ctxt->gpa_val = cr2_or_gpa;
8160                 }
8161         } else {
8162                 /* Sanitize the address out of an abundance of paranoia. */
8163                 ctxt->exception.address = 0;
8164         }
8165
8166         r = x86_emulate_insn(ctxt);
8167
8168         if (r == EMULATION_INTERCEPTED)
8169                 return 1;
8170
8171         if (r == EMULATION_FAILED) {
8172                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8173                                         emulation_type))
8174                         return 1;
8175
8176                 return handle_emulation_failure(vcpu, emulation_type);
8177         }
8178
8179         if (ctxt->have_exception) {
8180                 r = 1;
8181                 if (inject_emulated_exception(vcpu))
8182                         return r;
8183         } else if (vcpu->arch.pio.count) {
8184                 if (!vcpu->arch.pio.in) {
8185                         /* FIXME: return into emulator if single-stepping.  */
8186                         vcpu->arch.pio.count = 0;
8187                 } else {
8188                         writeback = false;
8189                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8190                 }
8191                 r = 0;
8192         } else if (vcpu->mmio_needed) {
8193                 ++vcpu->stat.mmio_exits;
8194
8195                 if (!vcpu->mmio_is_write)
8196                         writeback = false;
8197                 r = 0;
8198                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8199         } else if (vcpu->arch.complete_userspace_io) {
8200                 writeback = false;
8201                 r = 0;
8202         } else if (r == EMULATION_RESTART)
8203                 goto restart;
8204         else
8205                 r = 1;
8206
8207         if (writeback) {
8208                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8209                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8210                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8211
8212                 /*
8213                  * Note, EXCPT_DB is assumed to be fault-like as the emulator
8214                  * only supports code breakpoints and general detect #DB, both
8215                  * of which are fault-like.
8216                  */
8217                 if (!ctxt->have_exception ||
8218                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8219                         kvm_rip_write(vcpu, ctxt->eip);
8220                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8221                                 r = kvm_vcpu_do_singlestep(vcpu);
8222                         if (kvm_x86_ops.update_emulated_instruction)
8223                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8224                         __kvm_set_rflags(vcpu, ctxt->eflags);
8225                 }
8226
8227                 /*
8228                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8229                  * do nothing, and it will be requested again as soon as
8230                  * the shadow expires.  But we still need to check here,
8231                  * because POPF has no interrupt shadow.
8232                  */
8233                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8234                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8235         } else
8236                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8237
8238         return r;
8239 }
8240
8241 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8242 {
8243         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8244 }
8245 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8246
8247 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8248                                         void *insn, int insn_len)
8249 {
8250         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8251 }
8252 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8253
8254 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8255 {
8256         vcpu->arch.pio.count = 0;
8257         return 1;
8258 }
8259
8260 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8261 {
8262         vcpu->arch.pio.count = 0;
8263
8264         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8265                 return 1;
8266
8267         return kvm_skip_emulated_instruction(vcpu);
8268 }
8269
8270 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8271                             unsigned short port)
8272 {
8273         unsigned long val = kvm_rax_read(vcpu);
8274         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8275
8276         if (ret)
8277                 return ret;
8278
8279         /*
8280          * Workaround userspace that relies on old KVM behavior of %rip being
8281          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8282          */
8283         if (port == 0x7e &&
8284             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8285                 vcpu->arch.complete_userspace_io =
8286                         complete_fast_pio_out_port_0x7e;
8287                 kvm_skip_emulated_instruction(vcpu);
8288         } else {
8289                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8290                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8291         }
8292         return 0;
8293 }
8294
8295 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8296 {
8297         unsigned long val;
8298
8299         /* We should only ever be called with arch.pio.count equal to 1 */
8300         BUG_ON(vcpu->arch.pio.count != 1);
8301
8302         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8303                 vcpu->arch.pio.count = 0;
8304                 return 1;
8305         }
8306
8307         /* For size less than 4 we merge, else we zero extend */
8308         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8309
8310         /*
8311          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8312          * the copy and tracing
8313          */
8314         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8315         kvm_rax_write(vcpu, val);
8316
8317         return kvm_skip_emulated_instruction(vcpu);
8318 }
8319
8320 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8321                            unsigned short port)
8322 {
8323         unsigned long val;
8324         int ret;
8325
8326         /* For size less than 4 we merge, else we zero extend */
8327         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8328
8329         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8330         if (ret) {
8331                 kvm_rax_write(vcpu, val);
8332                 return ret;
8333         }
8334
8335         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8336         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8337
8338         return 0;
8339 }
8340
8341 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8342 {
8343         int ret;
8344
8345         if (in)
8346                 ret = kvm_fast_pio_in(vcpu, size, port);
8347         else
8348                 ret = kvm_fast_pio_out(vcpu, size, port);
8349         return ret && kvm_skip_emulated_instruction(vcpu);
8350 }
8351 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8352
8353 static int kvmclock_cpu_down_prep(unsigned int cpu)
8354 {
8355         __this_cpu_write(cpu_tsc_khz, 0);
8356         return 0;
8357 }
8358
8359 static void tsc_khz_changed(void *data)
8360 {
8361         struct cpufreq_freqs *freq = data;
8362         unsigned long khz = 0;
8363
8364         if (data)
8365                 khz = freq->new;
8366         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8367                 khz = cpufreq_quick_get(raw_smp_processor_id());
8368         if (!khz)
8369                 khz = tsc_khz;
8370         __this_cpu_write(cpu_tsc_khz, khz);
8371 }
8372
8373 #ifdef CONFIG_X86_64
8374 static void kvm_hyperv_tsc_notifier(void)
8375 {
8376         struct kvm *kvm;
8377         struct kvm_vcpu *vcpu;
8378         int cpu;
8379         unsigned long flags;
8380
8381         mutex_lock(&kvm_lock);
8382         list_for_each_entry(kvm, &vm_list, vm_list)
8383                 kvm_make_mclock_inprogress_request(kvm);
8384
8385         hyperv_stop_tsc_emulation();
8386
8387         /* TSC frequency always matches when on Hyper-V */
8388         for_each_present_cpu(cpu)
8389                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8390         kvm_max_guest_tsc_khz = tsc_khz;
8391
8392         list_for_each_entry(kvm, &vm_list, vm_list) {
8393                 struct kvm_arch *ka = &kvm->arch;
8394
8395                 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8396                 pvclock_update_vm_gtod_copy(kvm);
8397                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8398
8399                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8400                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8401
8402                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8403                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8404         }
8405         mutex_unlock(&kvm_lock);
8406 }
8407 #endif
8408
8409 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8410 {
8411         struct kvm *kvm;
8412         struct kvm_vcpu *vcpu;
8413         int i, send_ipi = 0;
8414
8415         /*
8416          * We allow guests to temporarily run on slowing clocks,
8417          * provided we notify them after, or to run on accelerating
8418          * clocks, provided we notify them before.  Thus time never
8419          * goes backwards.
8420          *
8421          * However, we have a problem.  We can't atomically update
8422          * the frequency of a given CPU from this function; it is
8423          * merely a notifier, which can be called from any CPU.
8424          * Changing the TSC frequency at arbitrary points in time
8425          * requires a recomputation of local variables related to
8426          * the TSC for each VCPU.  We must flag these local variables
8427          * to be updated and be sure the update takes place with the
8428          * new frequency before any guests proceed.
8429          *
8430          * Unfortunately, the combination of hotplug CPU and frequency
8431          * change creates an intractable locking scenario; the order
8432          * of when these callouts happen is undefined with respect to
8433          * CPU hotplug, and they can race with each other.  As such,
8434          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8435          * undefined; you can actually have a CPU frequency change take
8436          * place in between the computation of X and the setting of the
8437          * variable.  To protect against this problem, all updates of
8438          * the per_cpu tsc_khz variable are done in an interrupt
8439          * protected IPI, and all callers wishing to update the value
8440          * must wait for a synchronous IPI to complete (which is trivial
8441          * if the caller is on the CPU already).  This establishes the
8442          * necessary total order on variable updates.
8443          *
8444          * Note that because a guest time update may take place
8445          * anytime after the setting of the VCPU's request bit, the
8446          * correct TSC value must be set before the request.  However,
8447          * to ensure the update actually makes it to any guest which
8448          * starts running in hardware virtualization between the set
8449          * and the acquisition of the spinlock, we must also ping the
8450          * CPU after setting the request bit.
8451          *
8452          */
8453
8454         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8455
8456         mutex_lock(&kvm_lock);
8457         list_for_each_entry(kvm, &vm_list, vm_list) {
8458                 kvm_for_each_vcpu(i, vcpu, kvm) {
8459                         if (vcpu->cpu != cpu)
8460                                 continue;
8461                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8462                         if (vcpu->cpu != raw_smp_processor_id())
8463                                 send_ipi = 1;
8464                 }
8465         }
8466         mutex_unlock(&kvm_lock);
8467
8468         if (freq->old < freq->new && send_ipi) {
8469                 /*
8470                  * We upscale the frequency.  Must make the guest
8471                  * doesn't see old kvmclock values while running with
8472                  * the new frequency, otherwise we risk the guest sees
8473                  * time go backwards.
8474                  *
8475                  * In case we update the frequency for another cpu
8476                  * (which might be in guest context) send an interrupt
8477                  * to kick the cpu out of guest context.  Next time
8478                  * guest context is entered kvmclock will be updated,
8479                  * so the guest will not see stale values.
8480                  */
8481                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8482         }
8483 }
8484
8485 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8486                                      void *data)
8487 {
8488         struct cpufreq_freqs *freq = data;
8489         int cpu;
8490
8491         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8492                 return 0;
8493         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8494                 return 0;
8495
8496         for_each_cpu(cpu, freq->policy->cpus)
8497                 __kvmclock_cpufreq_notifier(freq, cpu);
8498
8499         return 0;
8500 }
8501
8502 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8503         .notifier_call  = kvmclock_cpufreq_notifier
8504 };
8505
8506 static int kvmclock_cpu_online(unsigned int cpu)
8507 {
8508         tsc_khz_changed(NULL);
8509         return 0;
8510 }
8511
8512 static void kvm_timer_init(void)
8513 {
8514         max_tsc_khz = tsc_khz;
8515
8516         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8517 #ifdef CONFIG_CPU_FREQ
8518                 struct cpufreq_policy *policy;
8519                 int cpu;
8520
8521                 cpu = get_cpu();
8522                 policy = cpufreq_cpu_get(cpu);
8523                 if (policy) {
8524                         if (policy->cpuinfo.max_freq)
8525                                 max_tsc_khz = policy->cpuinfo.max_freq;
8526                         cpufreq_cpu_put(policy);
8527                 }
8528                 put_cpu();
8529 #endif
8530                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8531                                           CPUFREQ_TRANSITION_NOTIFIER);
8532         }
8533
8534         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8535                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8536 }
8537
8538 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8539 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8540
8541 int kvm_is_in_guest(void)
8542 {
8543         return __this_cpu_read(current_vcpu) != NULL;
8544 }
8545
8546 static int kvm_is_user_mode(void)
8547 {
8548         int user_mode = 3;
8549
8550         if (__this_cpu_read(current_vcpu))
8551                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8552
8553         return user_mode != 0;
8554 }
8555
8556 static unsigned long kvm_get_guest_ip(void)
8557 {
8558         unsigned long ip = 0;
8559
8560         if (__this_cpu_read(current_vcpu))
8561                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8562
8563         return ip;
8564 }
8565
8566 static void kvm_handle_intel_pt_intr(void)
8567 {
8568         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8569
8570         kvm_make_request(KVM_REQ_PMI, vcpu);
8571         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8572                         (unsigned long *)&vcpu->arch.pmu.global_status);
8573 }
8574
8575 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8576         .is_in_guest            = kvm_is_in_guest,
8577         .is_user_mode           = kvm_is_user_mode,
8578         .get_guest_ip           = kvm_get_guest_ip,
8579         .handle_intel_pt_intr   = NULL,
8580 };
8581
8582 #ifdef CONFIG_X86_64
8583 static void pvclock_gtod_update_fn(struct work_struct *work)
8584 {
8585         struct kvm *kvm;
8586
8587         struct kvm_vcpu *vcpu;
8588         int i;
8589
8590         mutex_lock(&kvm_lock);
8591         list_for_each_entry(kvm, &vm_list, vm_list)
8592                 kvm_for_each_vcpu(i, vcpu, kvm)
8593                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8594         atomic_set(&kvm_guest_has_master_clock, 0);
8595         mutex_unlock(&kvm_lock);
8596 }
8597
8598 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8599
8600 /*
8601  * Indirection to move queue_work() out of the tk_core.seq write held
8602  * region to prevent possible deadlocks against time accessors which
8603  * are invoked with work related locks held.
8604  */
8605 static void pvclock_irq_work_fn(struct irq_work *w)
8606 {
8607         queue_work(system_long_wq, &pvclock_gtod_work);
8608 }
8609
8610 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8611
8612 /*
8613  * Notification about pvclock gtod data update.
8614  */
8615 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8616                                void *priv)
8617 {
8618         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8619         struct timekeeper *tk = priv;
8620
8621         update_pvclock_gtod(tk);
8622
8623         /*
8624          * Disable master clock if host does not trust, or does not use,
8625          * TSC based clocksource. Delegate queue_work() to irq_work as
8626          * this is invoked with tk_core.seq write held.
8627          */
8628         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8629             atomic_read(&kvm_guest_has_master_clock) != 0)
8630                 irq_work_queue(&pvclock_irq_work);
8631         return 0;
8632 }
8633
8634 static struct notifier_block pvclock_gtod_notifier = {
8635         .notifier_call = pvclock_gtod_notify,
8636 };
8637 #endif
8638
8639 int kvm_arch_init(void *opaque)
8640 {
8641         struct kvm_x86_init_ops *ops = opaque;
8642         int r;
8643
8644         if (kvm_x86_ops.hardware_enable) {
8645                 printk(KERN_ERR "kvm: already loaded the other module\n");
8646                 r = -EEXIST;
8647                 goto out;
8648         }
8649
8650         if (!ops->cpu_has_kvm_support()) {
8651                 pr_err_ratelimited("kvm: no hardware support\n");
8652                 r = -EOPNOTSUPP;
8653                 goto out;
8654         }
8655         if (ops->disabled_by_bios()) {
8656                 pr_err_ratelimited("kvm: disabled by bios\n");
8657                 r = -EOPNOTSUPP;
8658                 goto out;
8659         }
8660
8661         /*
8662          * KVM explicitly assumes that the guest has an FPU and
8663          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8664          * vCPU's FPU state as a fxregs_state struct.
8665          */
8666         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8667                 printk(KERN_ERR "kvm: inadequate fpu\n");
8668                 r = -EOPNOTSUPP;
8669                 goto out;
8670         }
8671
8672 #ifdef CONFIG_PREEMPT_RT
8673         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8674                 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
8675                 r = -EOPNOTSUPP;
8676                 goto out;
8677         }
8678 #endif
8679
8680         r = -ENOMEM;
8681         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8682                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8683                                           NULL);
8684         if (!x86_fpu_cache) {
8685                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8686                 goto out;
8687         }
8688
8689         x86_emulator_cache = kvm_alloc_emulator_cache();
8690         if (!x86_emulator_cache) {
8691                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8692                 goto out_free_x86_fpu_cache;
8693         }
8694
8695         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8696         if (!user_return_msrs) {
8697                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8698                 goto out_free_x86_emulator_cache;
8699         }
8700         kvm_nr_uret_msrs = 0;
8701
8702         r = kvm_mmu_vendor_module_init();
8703         if (r)
8704                 goto out_free_percpu;
8705
8706         kvm_timer_init();
8707
8708         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8709                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8710                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8711         }
8712
8713         if (pi_inject_timer == -1)
8714                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8715 #ifdef CONFIG_X86_64
8716         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8717
8718         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8719                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8720 #endif
8721
8722         return 0;
8723
8724 out_free_percpu:
8725         free_percpu(user_return_msrs);
8726 out_free_x86_emulator_cache:
8727         kmem_cache_destroy(x86_emulator_cache);
8728 out_free_x86_fpu_cache:
8729         kmem_cache_destroy(x86_fpu_cache);
8730 out:
8731         return r;
8732 }
8733
8734 void kvm_arch_exit(void)
8735 {
8736 #ifdef CONFIG_X86_64
8737         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8738                 clear_hv_tscchange_cb();
8739 #endif
8740         kvm_lapic_exit();
8741
8742         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8743                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8744                                             CPUFREQ_TRANSITION_NOTIFIER);
8745         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8746 #ifdef CONFIG_X86_64
8747         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8748         irq_work_sync(&pvclock_irq_work);
8749         cancel_work_sync(&pvclock_gtod_work);
8750 #endif
8751         kvm_x86_ops.hardware_enable = NULL;
8752         kvm_mmu_vendor_module_exit();
8753         free_percpu(user_return_msrs);
8754         kmem_cache_destroy(x86_emulator_cache);
8755         kmem_cache_destroy(x86_fpu_cache);
8756 #ifdef CONFIG_KVM_XEN
8757         static_key_deferred_flush(&kvm_xen_enabled);
8758         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8759 #endif
8760 }
8761
8762 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8763 {
8764         ++vcpu->stat.halt_exits;
8765         if (lapic_in_kernel(vcpu)) {
8766                 vcpu->arch.mp_state = state;
8767                 return 1;
8768         } else {
8769                 vcpu->run->exit_reason = reason;
8770                 return 0;
8771         }
8772 }
8773
8774 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8775 {
8776         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8777 }
8778 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8779
8780 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8781 {
8782         int ret = kvm_skip_emulated_instruction(vcpu);
8783         /*
8784          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8785          * KVM_EXIT_DEBUG here.
8786          */
8787         return kvm_vcpu_halt(vcpu) && ret;
8788 }
8789 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8790
8791 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8792 {
8793         int ret = kvm_skip_emulated_instruction(vcpu);
8794
8795         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8796 }
8797 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8798
8799 #ifdef CONFIG_X86_64
8800 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8801                                 unsigned long clock_type)
8802 {
8803         struct kvm_clock_pairing clock_pairing;
8804         struct timespec64 ts;
8805         u64 cycle;
8806         int ret;
8807
8808         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8809                 return -KVM_EOPNOTSUPP;
8810
8811         /*
8812          * When tsc is in permanent catchup mode guests won't be able to use
8813          * pvclock_read_retry loop to get consistent view of pvclock
8814          */
8815         if (vcpu->arch.tsc_always_catchup)
8816                 return -KVM_EOPNOTSUPP;
8817
8818         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8819                 return -KVM_EOPNOTSUPP;
8820
8821         clock_pairing.sec = ts.tv_sec;
8822         clock_pairing.nsec = ts.tv_nsec;
8823         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8824         clock_pairing.flags = 0;
8825         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8826
8827         ret = 0;
8828         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8829                             sizeof(struct kvm_clock_pairing)))
8830                 ret = -KVM_EFAULT;
8831
8832         return ret;
8833 }
8834 #endif
8835
8836 /*
8837  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8838  *
8839  * @apicid - apicid of vcpu to be kicked.
8840  */
8841 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8842 {
8843         /*
8844          * All other fields are unused for APIC_DM_REMRD, but may be consumed by
8845          * common code, e.g. for tracing. Defer initialization to the compiler.
8846          */
8847         struct kvm_lapic_irq lapic_irq = {
8848                 .delivery_mode = APIC_DM_REMRD,
8849                 .dest_mode = APIC_DEST_PHYSICAL,
8850                 .shorthand = APIC_DEST_NOSHORT,
8851                 .dest_id = apicid,
8852         };
8853
8854         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8855 }
8856
8857 bool kvm_apicv_activated(struct kvm *kvm)
8858 {
8859         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8860 }
8861 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8862
8863 static void kvm_apicv_init(struct kvm *kvm)
8864 {
8865         mutex_init(&kvm->arch.apicv_update_lock);
8866
8867         if (enable_apicv)
8868                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8869                           &kvm->arch.apicv_inhibit_reasons);
8870         else
8871                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8872                         &kvm->arch.apicv_inhibit_reasons);
8873 }
8874
8875 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8876 {
8877         struct kvm_vcpu *target = NULL;
8878         struct kvm_apic_map *map;
8879
8880         vcpu->stat.directed_yield_attempted++;
8881
8882         if (single_task_running())
8883                 goto no_yield;
8884
8885         rcu_read_lock();
8886         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8887
8888         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8889                 target = map->phys_map[dest_id]->vcpu;
8890
8891         rcu_read_unlock();
8892
8893         if (!target || !READ_ONCE(target->ready))
8894                 goto no_yield;
8895
8896         /* Ignore requests to yield to self */
8897         if (vcpu == target)
8898                 goto no_yield;
8899
8900         if (kvm_vcpu_yield_to(target) <= 0)
8901                 goto no_yield;
8902
8903         vcpu->stat.directed_yield_successful++;
8904
8905 no_yield:
8906         return;
8907 }
8908
8909 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8910 {
8911         u64 ret = vcpu->run->hypercall.ret;
8912
8913         if (!is_64_bit_mode(vcpu))
8914                 ret = (u32)ret;
8915         kvm_rax_write(vcpu, ret);
8916         ++vcpu->stat.hypercalls;
8917         return kvm_skip_emulated_instruction(vcpu);
8918 }
8919
8920 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8921 {
8922         unsigned long nr, a0, a1, a2, a3, ret;
8923         int op_64_bit;
8924
8925         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8926                 return kvm_xen_hypercall(vcpu);
8927
8928         if (kvm_hv_hypercall_enabled(vcpu))
8929                 return kvm_hv_hypercall(vcpu);
8930
8931         nr = kvm_rax_read(vcpu);
8932         a0 = kvm_rbx_read(vcpu);
8933         a1 = kvm_rcx_read(vcpu);
8934         a2 = kvm_rdx_read(vcpu);
8935         a3 = kvm_rsi_read(vcpu);
8936
8937         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8938
8939         op_64_bit = is_64_bit_hypercall(vcpu);
8940         if (!op_64_bit) {
8941                 nr &= 0xFFFFFFFF;
8942                 a0 &= 0xFFFFFFFF;
8943                 a1 &= 0xFFFFFFFF;
8944                 a2 &= 0xFFFFFFFF;
8945                 a3 &= 0xFFFFFFFF;
8946         }
8947
8948         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8949                 ret = -KVM_EPERM;
8950                 goto out;
8951         }
8952
8953         ret = -KVM_ENOSYS;
8954
8955         switch (nr) {
8956         case KVM_HC_VAPIC_POLL_IRQ:
8957                 ret = 0;
8958                 break;
8959         case KVM_HC_KICK_CPU:
8960                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8961                         break;
8962
8963                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8964                 kvm_sched_yield(vcpu, a1);
8965                 ret = 0;
8966                 break;
8967 #ifdef CONFIG_X86_64
8968         case KVM_HC_CLOCK_PAIRING:
8969                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8970                 break;
8971 #endif
8972         case KVM_HC_SEND_IPI:
8973                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8974                         break;
8975
8976                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8977                 break;
8978         case KVM_HC_SCHED_YIELD:
8979                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8980                         break;
8981
8982                 kvm_sched_yield(vcpu, a0);
8983                 ret = 0;
8984                 break;
8985         case KVM_HC_MAP_GPA_RANGE: {
8986                 u64 gpa = a0, npages = a1, attrs = a2;
8987
8988                 ret = -KVM_ENOSYS;
8989                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8990                         break;
8991
8992                 if (!PAGE_ALIGNED(gpa) || !npages ||
8993                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8994                         ret = -KVM_EINVAL;
8995                         break;
8996                 }
8997
8998                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8999                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9000                 vcpu->run->hypercall.args[0]  = gpa;
9001                 vcpu->run->hypercall.args[1]  = npages;
9002                 vcpu->run->hypercall.args[2]  = attrs;
9003                 vcpu->run->hypercall.longmode = op_64_bit;
9004                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9005                 return 0;
9006         }
9007         default:
9008                 ret = -KVM_ENOSYS;
9009                 break;
9010         }
9011 out:
9012         if (!op_64_bit)
9013                 ret = (u32)ret;
9014         kvm_rax_write(vcpu, ret);
9015
9016         ++vcpu->stat.hypercalls;
9017         return kvm_skip_emulated_instruction(vcpu);
9018 }
9019 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9020
9021 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9022 {
9023         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9024         char instruction[3];
9025         unsigned long rip = kvm_rip_read(vcpu);
9026
9027         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9028
9029         return emulator_write_emulated(ctxt, rip, instruction, 3,
9030                 &ctxt->exception);
9031 }
9032
9033 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9034 {
9035         return vcpu->run->request_interrupt_window &&
9036                 likely(!pic_in_kernel(vcpu->kvm));
9037 }
9038
9039 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9040 {
9041         struct kvm_run *kvm_run = vcpu->run;
9042
9043         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9044         kvm_run->cr8 = kvm_get_cr8(vcpu);
9045         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9046
9047         /*
9048          * The call to kvm_ready_for_interrupt_injection() may end up in
9049          * kvm_xen_has_interrupt() which may require the srcu lock to be
9050          * held, to protect against changes in the vcpu_info address.
9051          */
9052         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9053         kvm_run->ready_for_interrupt_injection =
9054                 pic_in_kernel(vcpu->kvm) ||
9055                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9056         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9057
9058         if (is_smm(vcpu))
9059                 kvm_run->flags |= KVM_RUN_X86_SMM;
9060 }
9061
9062 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9063 {
9064         int max_irr, tpr;
9065
9066         if (!kvm_x86_ops.update_cr8_intercept)
9067                 return;
9068
9069         if (!lapic_in_kernel(vcpu))
9070                 return;
9071
9072         if (vcpu->arch.apicv_active)
9073                 return;
9074
9075         if (!vcpu->arch.apic->vapic_addr)
9076                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9077         else
9078                 max_irr = -1;
9079
9080         if (max_irr != -1)
9081                 max_irr >>= 4;
9082
9083         tpr = kvm_lapic_get_cr8(vcpu);
9084
9085         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9086 }
9087
9088
9089 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9090 {
9091         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9092                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9093                 return 1;
9094         }
9095
9096         return kvm_x86_ops.nested_ops->check_events(vcpu);
9097 }
9098
9099 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9100 {
9101         trace_kvm_inj_exception(vcpu->arch.exception.nr,
9102                                 vcpu->arch.exception.has_error_code,
9103                                 vcpu->arch.exception.error_code,
9104                                 vcpu->arch.exception.injected);
9105
9106         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9107                 vcpu->arch.exception.error_code = false;
9108         static_call(kvm_x86_queue_exception)(vcpu);
9109 }
9110
9111 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9112 {
9113         int r;
9114         bool can_inject = true;
9115
9116         /* try to reinject previous events if any */
9117
9118         if (vcpu->arch.exception.injected) {
9119                 kvm_inject_exception(vcpu);
9120                 can_inject = false;
9121         }
9122         /*
9123          * Do not inject an NMI or interrupt if there is a pending
9124          * exception.  Exceptions and interrupts are recognized at
9125          * instruction boundaries, i.e. the start of an instruction.
9126          * Trap-like exceptions, e.g. #DB, have higher priority than
9127          * NMIs and interrupts, i.e. traps are recognized before an
9128          * NMI/interrupt that's pending on the same instruction.
9129          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9130          * priority, but are only generated (pended) during instruction
9131          * execution, i.e. a pending fault-like exception means the
9132          * fault occurred on the *previous* instruction and must be
9133          * serviced prior to recognizing any new events in order to
9134          * fully complete the previous instruction.
9135          */
9136         else if (!vcpu->arch.exception.pending) {
9137                 if (vcpu->arch.nmi_injected) {
9138                         static_call(kvm_x86_set_nmi)(vcpu);
9139                         can_inject = false;
9140                 } else if (vcpu->arch.interrupt.injected) {
9141                         static_call(kvm_x86_set_irq)(vcpu);
9142                         can_inject = false;
9143                 }
9144         }
9145
9146         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9147                      vcpu->arch.exception.pending);
9148
9149         /*
9150          * Call check_nested_events() even if we reinjected a previous event
9151          * in order for caller to determine if it should require immediate-exit
9152          * from L2 to L1 due to pending L1 events which require exit
9153          * from L2 to L1.
9154          */
9155         if (is_guest_mode(vcpu)) {
9156                 r = kvm_check_nested_events(vcpu);
9157                 if (r < 0)
9158                         goto out;
9159         }
9160
9161         /* try to inject new event if pending */
9162         if (vcpu->arch.exception.pending) {
9163                 /*
9164                  * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
9165                  * value pushed on the stack.  Trap-like exception and all #DBs
9166                  * leave RF as-is (KVM follows Intel's behavior in this regard;
9167                  * AMD states that code breakpoint #DBs excplitly clear RF=0).
9168                  *
9169                  * Note, most versions of Intel's SDM and AMD's APM incorrectly
9170                  * describe the behavior of General Detect #DBs, which are
9171                  * fault-like.  They do _not_ set RF, a la code breakpoints.
9172                  */
9173                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9174                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9175                                              X86_EFLAGS_RF);
9176
9177                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9178                         kvm_deliver_exception_payload(vcpu);
9179                         if (vcpu->arch.dr7 & DR7_GD) {
9180                                 vcpu->arch.dr7 &= ~DR7_GD;
9181                                 kvm_update_dr7(vcpu);
9182                         }
9183                 }
9184
9185                 kvm_inject_exception(vcpu);
9186
9187                 vcpu->arch.exception.pending = false;
9188                 vcpu->arch.exception.injected = true;
9189
9190                 can_inject = false;
9191         }
9192
9193         /* Don't inject interrupts if the user asked to avoid doing so */
9194         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9195                 return 0;
9196
9197         /*
9198          * Finally, inject interrupt events.  If an event cannot be injected
9199          * due to architectural conditions (e.g. IF=0) a window-open exit
9200          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9201          * and can architecturally be injected, but we cannot do it right now:
9202          * an interrupt could have arrived just now and we have to inject it
9203          * as a vmexit, or there could already an event in the queue, which is
9204          * indicated by can_inject.  In that case we request an immediate exit
9205          * in order to make progress and get back here for another iteration.
9206          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9207          */
9208         if (vcpu->arch.smi_pending) {
9209                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9210                 if (r < 0)
9211                         goto out;
9212                 if (r) {
9213                         vcpu->arch.smi_pending = false;
9214                         ++vcpu->arch.smi_count;
9215                         enter_smm(vcpu);
9216                         can_inject = false;
9217                 } else
9218                         static_call(kvm_x86_enable_smi_window)(vcpu);
9219         }
9220
9221         if (vcpu->arch.nmi_pending) {
9222                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9223                 if (r < 0)
9224                         goto out;
9225                 if (r) {
9226                         --vcpu->arch.nmi_pending;
9227                         vcpu->arch.nmi_injected = true;
9228                         static_call(kvm_x86_set_nmi)(vcpu);
9229                         can_inject = false;
9230                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9231                 }
9232                 if (vcpu->arch.nmi_pending)
9233                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9234         }
9235
9236         if (kvm_cpu_has_injectable_intr(vcpu)) {
9237                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9238                 if (r < 0)
9239                         goto out;
9240                 if (r) {
9241                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9242                         static_call(kvm_x86_set_irq)(vcpu);
9243                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9244                 }
9245                 if (kvm_cpu_has_injectable_intr(vcpu))
9246                         static_call(kvm_x86_enable_irq_window)(vcpu);
9247         }
9248
9249         if (is_guest_mode(vcpu) &&
9250             kvm_x86_ops.nested_ops->hv_timer_pending &&
9251             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9252                 *req_immediate_exit = true;
9253
9254         WARN_ON(vcpu->arch.exception.pending);
9255         return 0;
9256
9257 out:
9258         if (r == -EBUSY) {
9259                 *req_immediate_exit = true;
9260                 r = 0;
9261         }
9262         return r;
9263 }
9264
9265 static void process_nmi(struct kvm_vcpu *vcpu)
9266 {
9267         unsigned limit = 2;
9268
9269         /*
9270          * x86 is limited to one NMI running, and one NMI pending after it.
9271          * If an NMI is already in progress, limit further NMIs to just one.
9272          * Otherwise, allow two (and we'll inject the first one immediately).
9273          */
9274         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9275                 limit = 1;
9276
9277         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9278         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9279         kvm_make_request(KVM_REQ_EVENT, vcpu);
9280 }
9281
9282 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9283 {
9284         u32 flags = 0;
9285         flags |= seg->g       << 23;
9286         flags |= seg->db      << 22;
9287         flags |= seg->l       << 21;
9288         flags |= seg->avl     << 20;
9289         flags |= seg->present << 15;
9290         flags |= seg->dpl     << 13;
9291         flags |= seg->s       << 12;
9292         flags |= seg->type    << 8;
9293         return flags;
9294 }
9295
9296 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9297 {
9298         struct kvm_segment seg;
9299         int offset;
9300
9301         kvm_get_segment(vcpu, &seg, n);
9302         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9303
9304         if (n < 3)
9305                 offset = 0x7f84 + n * 12;
9306         else
9307                 offset = 0x7f2c + (n - 3) * 12;
9308
9309         put_smstate(u32, buf, offset + 8, seg.base);
9310         put_smstate(u32, buf, offset + 4, seg.limit);
9311         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9312 }
9313
9314 #ifdef CONFIG_X86_64
9315 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9316 {
9317         struct kvm_segment seg;
9318         int offset;
9319         u16 flags;
9320
9321         kvm_get_segment(vcpu, &seg, n);
9322         offset = 0x7e00 + n * 16;
9323
9324         flags = enter_smm_get_segment_flags(&seg) >> 8;
9325         put_smstate(u16, buf, offset, seg.selector);
9326         put_smstate(u16, buf, offset + 2, flags);
9327         put_smstate(u32, buf, offset + 4, seg.limit);
9328         put_smstate(u64, buf, offset + 8, seg.base);
9329 }
9330 #endif
9331
9332 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9333 {
9334         struct desc_ptr dt;
9335         struct kvm_segment seg;
9336         unsigned long val;
9337         int i;
9338
9339         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9340         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9341         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9342         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9343
9344         for (i = 0; i < 8; i++)
9345                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9346
9347         kvm_get_dr(vcpu, 6, &val);
9348         put_smstate(u32, buf, 0x7fcc, (u32)val);
9349         kvm_get_dr(vcpu, 7, &val);
9350         put_smstate(u32, buf, 0x7fc8, (u32)val);
9351
9352         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9353         put_smstate(u32, buf, 0x7fc4, seg.selector);
9354         put_smstate(u32, buf, 0x7f64, seg.base);
9355         put_smstate(u32, buf, 0x7f60, seg.limit);
9356         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9357
9358         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9359         put_smstate(u32, buf, 0x7fc0, seg.selector);
9360         put_smstate(u32, buf, 0x7f80, seg.base);
9361         put_smstate(u32, buf, 0x7f7c, seg.limit);
9362         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9363
9364         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9365         put_smstate(u32, buf, 0x7f74, dt.address);
9366         put_smstate(u32, buf, 0x7f70, dt.size);
9367
9368         static_call(kvm_x86_get_idt)(vcpu, &dt);
9369         put_smstate(u32, buf, 0x7f58, dt.address);
9370         put_smstate(u32, buf, 0x7f54, dt.size);
9371
9372         for (i = 0; i < 6; i++)
9373                 enter_smm_save_seg_32(vcpu, buf, i);
9374
9375         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9376
9377         /* revision id */
9378         put_smstate(u32, buf, 0x7efc, 0x00020000);
9379         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9380 }
9381
9382 #ifdef CONFIG_X86_64
9383 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9384 {
9385         struct desc_ptr dt;
9386         struct kvm_segment seg;
9387         unsigned long val;
9388         int i;
9389
9390         for (i = 0; i < 16; i++)
9391                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9392
9393         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9394         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9395
9396         kvm_get_dr(vcpu, 6, &val);
9397         put_smstate(u64, buf, 0x7f68, val);
9398         kvm_get_dr(vcpu, 7, &val);
9399         put_smstate(u64, buf, 0x7f60, val);
9400
9401         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9402         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9403         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9404
9405         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9406
9407         /* revision id */
9408         put_smstate(u32, buf, 0x7efc, 0x00020064);
9409
9410         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9411
9412         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9413         put_smstate(u16, buf, 0x7e90, seg.selector);
9414         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9415         put_smstate(u32, buf, 0x7e94, seg.limit);
9416         put_smstate(u64, buf, 0x7e98, seg.base);
9417
9418         static_call(kvm_x86_get_idt)(vcpu, &dt);
9419         put_smstate(u32, buf, 0x7e84, dt.size);
9420         put_smstate(u64, buf, 0x7e88, dt.address);
9421
9422         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9423         put_smstate(u16, buf, 0x7e70, seg.selector);
9424         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9425         put_smstate(u32, buf, 0x7e74, seg.limit);
9426         put_smstate(u64, buf, 0x7e78, seg.base);
9427
9428         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9429         put_smstate(u32, buf, 0x7e64, dt.size);
9430         put_smstate(u64, buf, 0x7e68, dt.address);
9431
9432         for (i = 0; i < 6; i++)
9433                 enter_smm_save_seg_64(vcpu, buf, i);
9434 }
9435 #endif
9436
9437 static void enter_smm(struct kvm_vcpu *vcpu)
9438 {
9439         struct kvm_segment cs, ds;
9440         struct desc_ptr dt;
9441         unsigned long cr0;
9442         char buf[512];
9443
9444         memset(buf, 0, 512);
9445 #ifdef CONFIG_X86_64
9446         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9447                 enter_smm_save_state_64(vcpu, buf);
9448         else
9449 #endif
9450                 enter_smm_save_state_32(vcpu, buf);
9451
9452         /*
9453          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9454          * state (e.g. leave guest mode) after we've saved the state into the
9455          * SMM state-save area.
9456          */
9457         static_call(kvm_x86_enter_smm)(vcpu, buf);
9458
9459         kvm_smm_changed(vcpu, true);
9460         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9461
9462         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9463                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9464         else
9465                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9466
9467         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9468         kvm_rip_write(vcpu, 0x8000);
9469
9470         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9471         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9472         vcpu->arch.cr0 = cr0;
9473
9474         static_call(kvm_x86_set_cr4)(vcpu, 0);
9475
9476         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9477         dt.address = dt.size = 0;
9478         static_call(kvm_x86_set_idt)(vcpu, &dt);
9479
9480         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9481
9482         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9483         cs.base = vcpu->arch.smbase;
9484
9485         ds.selector = 0;
9486         ds.base = 0;
9487
9488         cs.limit    = ds.limit = 0xffffffff;
9489         cs.type     = ds.type = 0x3;
9490         cs.dpl      = ds.dpl = 0;
9491         cs.db       = ds.db = 0;
9492         cs.s        = ds.s = 1;
9493         cs.l        = ds.l = 0;
9494         cs.g        = ds.g = 1;
9495         cs.avl      = ds.avl = 0;
9496         cs.present  = ds.present = 1;
9497         cs.unusable = ds.unusable = 0;
9498         cs.padding  = ds.padding = 0;
9499
9500         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9501         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9502         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9503         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9504         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9505         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9506
9507 #ifdef CONFIG_X86_64
9508         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9509                 static_call(kvm_x86_set_efer)(vcpu, 0);
9510 #endif
9511
9512         kvm_update_cpuid_runtime(vcpu);
9513         kvm_mmu_reset_context(vcpu);
9514 }
9515
9516 static void process_smi(struct kvm_vcpu *vcpu)
9517 {
9518         vcpu->arch.smi_pending = true;
9519         kvm_make_request(KVM_REQ_EVENT, vcpu);
9520 }
9521
9522 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9523                                        unsigned long *vcpu_bitmap)
9524 {
9525         cpumask_var_t cpus;
9526
9527         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9528
9529         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9530                                     NULL, vcpu_bitmap, cpus);
9531
9532         free_cpumask_var(cpus);
9533 }
9534
9535 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9536 {
9537         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9538 }
9539
9540 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9541 {
9542         bool activate;
9543
9544         if (!lapic_in_kernel(vcpu))
9545                 return;
9546
9547         mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9548
9549         activate = kvm_apicv_activated(vcpu->kvm);
9550         if (vcpu->arch.apicv_active == activate)
9551                 goto out;
9552
9553         vcpu->arch.apicv_active = activate;
9554         kvm_apic_update_apicv(vcpu);
9555         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9556
9557         /*
9558          * When APICv gets disabled, we may still have injected interrupts
9559          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9560          * still active when the interrupt got accepted. Make sure
9561          * inject_pending_event() is called to check for that.
9562          */
9563         if (!vcpu->arch.apicv_active)
9564                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9565
9566 out:
9567         mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9568 }
9569 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9570
9571 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9572 {
9573         unsigned long old, new;
9574
9575         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9576             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9577                 return;
9578
9579         old = new = kvm->arch.apicv_inhibit_reasons;
9580
9581         if (activate)
9582                 __clear_bit(bit, &new);
9583         else
9584                 __set_bit(bit, &new);
9585
9586         if (!!old != !!new) {
9587                 trace_kvm_apicv_update_request(activate, bit);
9588                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9589                 kvm->arch.apicv_inhibit_reasons = new;
9590                 if (new) {
9591                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9592                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9593                 }
9594         } else
9595                 kvm->arch.apicv_inhibit_reasons = new;
9596 }
9597 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9598
9599 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9600 {
9601         mutex_lock(&kvm->arch.apicv_update_lock);
9602         __kvm_request_apicv_update(kvm, activate, bit);
9603         mutex_unlock(&kvm->arch.apicv_update_lock);
9604 }
9605 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9606
9607 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9608 {
9609         if (!kvm_apic_present(vcpu))
9610                 return;
9611
9612         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9613
9614         if (irqchip_split(vcpu->kvm))
9615                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9616         else {
9617                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9618                 if (ioapic_in_kernel(vcpu->kvm))
9619                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9620         }
9621
9622         if (is_guest_mode(vcpu))
9623                 vcpu->arch.load_eoi_exitmap_pending = true;
9624         else
9625                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9626 }
9627
9628 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9629 {
9630         u64 eoi_exit_bitmap[4];
9631
9632         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9633                 return;
9634
9635         if (to_hv_vcpu(vcpu)) {
9636                 bitmap_or((ulong *)eoi_exit_bitmap,
9637                           vcpu->arch.ioapic_handled_vectors,
9638                           to_hv_synic(vcpu)->vec_bitmap, 256);
9639                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9640                 return;
9641         }
9642
9643         static_call(kvm_x86_load_eoi_exitmap)(
9644                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9645 }
9646
9647 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9648                                             unsigned long start, unsigned long end)
9649 {
9650         unsigned long apic_address;
9651
9652         /*
9653          * The physical address of apic access page is stored in the VMCS.
9654          * Update it when it becomes invalid.
9655          */
9656         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9657         if (start <= apic_address && apic_address < end)
9658                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9659 }
9660
9661 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
9662 {
9663         static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
9664 }
9665
9666 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9667 {
9668         if (!lapic_in_kernel(vcpu))
9669                 return;
9670
9671         if (!kvm_x86_ops.set_apic_access_page_addr)
9672                 return;
9673
9674         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9675 }
9676
9677 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9678 {
9679         smp_send_reschedule(vcpu->cpu);
9680 }
9681 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9682
9683 /*
9684  * Returns 1 to let vcpu_run() continue the guest execution loop without
9685  * exiting to the userspace.  Otherwise, the value will be returned to the
9686  * userspace.
9687  */
9688 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9689 {
9690         int r;
9691         bool req_int_win =
9692                 dm_request_for_irq_injection(vcpu) &&
9693                 kvm_cpu_accept_dm_intr(vcpu);
9694         fastpath_t exit_fastpath;
9695
9696         bool req_immediate_exit = false;
9697
9698         /* Forbid vmenter if vcpu dirty ring is soft-full */
9699         if (unlikely(vcpu->kvm->dirty_ring_size &&
9700                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9701                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9702                 trace_kvm_dirty_ring_exit(vcpu);
9703                 r = 0;
9704                 goto out;
9705         }
9706
9707         if (kvm_request_pending(vcpu)) {
9708                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9709                         r = -EIO;
9710                         goto out;
9711                 }
9712                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9713                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9714                                 r = 0;
9715                                 goto out;
9716                         }
9717                 }
9718                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9719                         kvm_mmu_unload(vcpu);
9720                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9721                         __kvm_migrate_timers(vcpu);
9722                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9723                         kvm_gen_update_masterclock(vcpu->kvm);
9724                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9725                         kvm_gen_kvmclock_update(vcpu);
9726                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9727                         r = kvm_guest_time_update(vcpu);
9728                         if (unlikely(r))
9729                                 goto out;
9730                 }
9731                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9732                         kvm_mmu_sync_roots(vcpu);
9733                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9734                         kvm_mmu_load_pgd(vcpu);
9735                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9736                         kvm_vcpu_flush_tlb_all(vcpu);
9737
9738                         /* Flushing all ASIDs flushes the current ASID... */
9739                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9740                 }
9741                 kvm_service_local_tlb_flush_requests(vcpu);
9742
9743                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9744                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9745                         r = 0;
9746                         goto out;
9747                 }
9748                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9749                         if (is_guest_mode(vcpu)) {
9750                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9751                         } else {
9752                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9753                                 vcpu->mmio_needed = 0;
9754                                 r = 0;
9755                                 goto out;
9756                         }
9757                 }
9758                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9759                         /* Page is swapped out. Do synthetic halt */
9760                         vcpu->arch.apf.halted = true;
9761                         r = 1;
9762                         goto out;
9763                 }
9764                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9765                         record_steal_time(vcpu);
9766                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9767                         process_smi(vcpu);
9768                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9769                         process_nmi(vcpu);
9770                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9771                         kvm_pmu_handle_event(vcpu);
9772                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9773                         kvm_pmu_deliver_pmi(vcpu);
9774                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9775                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9776                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9777                                      vcpu->arch.ioapic_handled_vectors)) {
9778                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9779                                 vcpu->run->eoi.vector =
9780                                                 vcpu->arch.pending_ioapic_eoi;
9781                                 r = 0;
9782                                 goto out;
9783                         }
9784                 }
9785                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9786                         vcpu_scan_ioapic(vcpu);
9787                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9788                         vcpu_load_eoi_exitmap(vcpu);
9789                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9790                         kvm_vcpu_reload_apic_access_page(vcpu);
9791                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9792                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9793                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9794                         r = 0;
9795                         goto out;
9796                 }
9797                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9798                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9799                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9800                         r = 0;
9801                         goto out;
9802                 }
9803                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9804                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9805
9806                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9807                         vcpu->run->hyperv = hv_vcpu->exit;
9808                         r = 0;
9809                         goto out;
9810                 }
9811
9812                 /*
9813                  * KVM_REQ_HV_STIMER has to be processed after
9814                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9815                  * depend on the guest clock being up-to-date
9816                  */
9817                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9818                         kvm_hv_process_stimers(vcpu);
9819                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9820                         kvm_vcpu_update_apicv(vcpu);
9821                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9822                         kvm_check_async_pf_completion(vcpu);
9823                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9824                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9825
9826                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9827                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9828         }
9829
9830         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9831             kvm_xen_has_interrupt(vcpu)) {
9832                 ++vcpu->stat.req_event;
9833                 r = kvm_apic_accept_events(vcpu);
9834                 if (r < 0) {
9835                         r = 0;
9836                         goto out;
9837                 }
9838                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9839                         r = 1;
9840                         goto out;
9841                 }
9842
9843                 r = inject_pending_event(vcpu, &req_immediate_exit);
9844                 if (r < 0) {
9845                         r = 0;
9846                         goto out;
9847                 }
9848                 if (req_int_win)
9849                         static_call(kvm_x86_enable_irq_window)(vcpu);
9850
9851                 if (kvm_lapic_enabled(vcpu)) {
9852                         update_cr8_intercept(vcpu);
9853                         kvm_lapic_sync_to_vapic(vcpu);
9854                 }
9855         }
9856
9857         r = kvm_mmu_reload(vcpu);
9858         if (unlikely(r)) {
9859                 goto cancel_injection;
9860         }
9861
9862         preempt_disable();
9863
9864         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9865
9866         /*
9867          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9868          * IPI are then delayed after guest entry, which ensures that they
9869          * result in virtual interrupt delivery.
9870          */
9871         local_irq_disable();
9872         vcpu->mode = IN_GUEST_MODE;
9873
9874         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9875
9876         /*
9877          * 1) We should set ->mode before checking ->requests.  Please see
9878          * the comment in kvm_vcpu_exiting_guest_mode().
9879          *
9880          * 2) For APICv, we should set ->mode before checking PID.ON. This
9881          * pairs with the memory barrier implicit in pi_test_and_set_on
9882          * (see vmx_deliver_posted_interrupt).
9883          *
9884          * 3) This also orders the write to mode from any reads to the page
9885          * tables done while the VCPU is running.  Please see the comment
9886          * in kvm_flush_remote_tlbs.
9887          */
9888         smp_mb__after_srcu_read_unlock();
9889
9890         /*
9891          * This handles the case where a posted interrupt was
9892          * notified with kvm_vcpu_kick.  Assigned devices can
9893          * use the POSTED_INTR_VECTOR even if APICv is disabled,
9894          * so do it even if APICv is disabled on this vCPU.
9895          */
9896         if (kvm_lapic_enabled(vcpu))
9897                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9898
9899         if (kvm_vcpu_exit_request(vcpu)) {
9900                 vcpu->mode = OUTSIDE_GUEST_MODE;
9901                 smp_wmb();
9902                 local_irq_enable();
9903                 preempt_enable();
9904                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9905                 r = 1;
9906                 goto cancel_injection;
9907         }
9908
9909         if (req_immediate_exit) {
9910                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9911                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9912         }
9913
9914         fpregs_assert_state_consistent();
9915         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9916                 switch_fpu_return();
9917
9918         if (unlikely(vcpu->arch.switch_db_regs)) {
9919                 set_debugreg(0, 7);
9920                 set_debugreg(vcpu->arch.eff_db[0], 0);
9921                 set_debugreg(vcpu->arch.eff_db[1], 1);
9922                 set_debugreg(vcpu->arch.eff_db[2], 2);
9923                 set_debugreg(vcpu->arch.eff_db[3], 3);
9924         } else if (unlikely(hw_breakpoint_active())) {
9925                 set_debugreg(0, 7);
9926         }
9927
9928         for (;;) {
9929                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9930                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9931                         break;
9932
9933                 if (kvm_lapic_enabled(vcpu))
9934                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9935
9936                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9937                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9938                         break;
9939                 }
9940         }
9941
9942         /*
9943          * Do this here before restoring debug registers on the host.  And
9944          * since we do this before handling the vmexit, a DR access vmexit
9945          * can (a) read the correct value of the debug registers, (b) set
9946          * KVM_DEBUGREG_WONT_EXIT again.
9947          */
9948         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9949                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9950                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9951                 kvm_update_dr0123(vcpu);
9952                 kvm_update_dr7(vcpu);
9953         }
9954
9955         /*
9956          * If the guest has used debug registers, at least dr7
9957          * will be disabled while returning to the host.
9958          * If we don't have active breakpoints in the host, we don't
9959          * care about the messed up debug address registers. But if
9960          * we have some of them active, restore the old state.
9961          */
9962         if (hw_breakpoint_active())
9963                 hw_breakpoint_restore();
9964
9965         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9966         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9967
9968         vcpu->mode = OUTSIDE_GUEST_MODE;
9969         smp_wmb();
9970
9971         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9972
9973         /*
9974          * Consume any pending interrupts, including the possible source of
9975          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9976          * An instruction is required after local_irq_enable() to fully unblock
9977          * interrupts on processors that implement an interrupt shadow, the
9978          * stat.exits increment will do nicely.
9979          */
9980         kvm_before_interrupt(vcpu);
9981         local_irq_enable();
9982         ++vcpu->stat.exits;
9983         local_irq_disable();
9984         kvm_after_interrupt(vcpu);
9985
9986         /*
9987          * Wait until after servicing IRQs to account guest time so that any
9988          * ticks that occurred while running the guest are properly accounted
9989          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9990          * of accounting via context tracking, but the loss of accuracy is
9991          * acceptable for all known use cases.
9992          */
9993         vtime_account_guest_exit();
9994
9995         if (lapic_in_kernel(vcpu)) {
9996                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9997                 if (delta != S64_MIN) {
9998                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9999                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10000                 }
10001         }
10002
10003         local_irq_enable();
10004         preempt_enable();
10005
10006         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10007
10008         /*
10009          * Profile KVM exit RIPs:
10010          */
10011         if (unlikely(prof_on == KVM_PROFILING)) {
10012                 unsigned long rip = kvm_rip_read(vcpu);
10013                 profile_hit(KVM_PROFILING, (void *)rip);
10014         }
10015
10016         if (unlikely(vcpu->arch.tsc_always_catchup))
10017                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10018
10019         if (vcpu->arch.apic_attention)
10020                 kvm_lapic_sync_from_vapic(vcpu);
10021
10022         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10023         return r;
10024
10025 cancel_injection:
10026         if (req_immediate_exit)
10027                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10028         static_call(kvm_x86_cancel_injection)(vcpu);
10029         if (unlikely(vcpu->arch.apic_attention))
10030                 kvm_lapic_sync_from_vapic(vcpu);
10031 out:
10032         return r;
10033 }
10034
10035 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10036 {
10037         if (!kvm_arch_vcpu_runnable(vcpu) &&
10038             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
10039                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10040                 kvm_vcpu_block(vcpu);
10041                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10042
10043                 if (kvm_x86_ops.post_block)
10044                         static_call(kvm_x86_post_block)(vcpu);
10045
10046                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10047                         return 1;
10048         }
10049
10050         if (kvm_apic_accept_events(vcpu) < 0)
10051                 return 0;
10052         switch(vcpu->arch.mp_state) {
10053         case KVM_MP_STATE_HALTED:
10054         case KVM_MP_STATE_AP_RESET_HOLD:
10055                 vcpu->arch.pv.pv_unhalted = false;
10056                 vcpu->arch.mp_state =
10057                         KVM_MP_STATE_RUNNABLE;
10058                 fallthrough;
10059         case KVM_MP_STATE_RUNNABLE:
10060                 vcpu->arch.apf.halted = false;
10061                 break;
10062         case KVM_MP_STATE_INIT_RECEIVED:
10063                 break;
10064         default:
10065                 return -EINTR;
10066         }
10067         return 1;
10068 }
10069
10070 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10071 {
10072         if (is_guest_mode(vcpu))
10073                 kvm_check_nested_events(vcpu);
10074
10075         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10076                 !vcpu->arch.apf.halted);
10077 }
10078
10079 static int vcpu_run(struct kvm_vcpu *vcpu)
10080 {
10081         int r;
10082         struct kvm *kvm = vcpu->kvm;
10083
10084         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10085         vcpu->arch.l1tf_flush_l1d = true;
10086
10087         for (;;) {
10088                 /*
10089                  * If another guest vCPU requests a PV TLB flush in the middle
10090                  * of instruction emulation, the rest of the emulation could
10091                  * use a stale page translation. Assume that any code after
10092                  * this point can start executing an instruction.
10093                  */
10094                 vcpu->arch.at_instruction_boundary = false;
10095                 if (kvm_vcpu_running(vcpu)) {
10096                         r = vcpu_enter_guest(vcpu);
10097                 } else {
10098                         r = vcpu_block(kvm, vcpu);
10099                 }
10100
10101                 if (r <= 0)
10102                         break;
10103
10104                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10105                 if (kvm_cpu_has_pending_timer(vcpu))
10106                         kvm_inject_pending_timer_irqs(vcpu);
10107
10108                 if (dm_request_for_irq_injection(vcpu) &&
10109                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10110                         r = 0;
10111                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10112                         ++vcpu->stat.request_irq_exits;
10113                         break;
10114                 }
10115
10116                 if (__xfer_to_guest_mode_work_pending()) {
10117                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10118                         r = xfer_to_guest_mode_handle_work(vcpu);
10119                         if (r)
10120                                 return r;
10121                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10122                 }
10123         }
10124
10125         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10126
10127         return r;
10128 }
10129
10130 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10131 {
10132         int r;
10133
10134         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10135         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10136         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10137         return r;
10138 }
10139
10140 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10141 {
10142         BUG_ON(!vcpu->arch.pio.count);
10143
10144         return complete_emulated_io(vcpu);
10145 }
10146
10147 /*
10148  * Implements the following, as a state machine:
10149  *
10150  * read:
10151  *   for each fragment
10152  *     for each mmio piece in the fragment
10153  *       write gpa, len
10154  *       exit
10155  *       copy data
10156  *   execute insn
10157  *
10158  * write:
10159  *   for each fragment
10160  *     for each mmio piece in the fragment
10161  *       write gpa, len
10162  *       copy data
10163  *       exit
10164  */
10165 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10166 {
10167         struct kvm_run *run = vcpu->run;
10168         struct kvm_mmio_fragment *frag;
10169         unsigned len;
10170
10171         BUG_ON(!vcpu->mmio_needed);
10172
10173         /* Complete previous fragment */
10174         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10175         len = min(8u, frag->len);
10176         if (!vcpu->mmio_is_write)
10177                 memcpy(frag->data, run->mmio.data, len);
10178
10179         if (frag->len <= 8) {
10180                 /* Switch to the next fragment. */
10181                 frag++;
10182                 vcpu->mmio_cur_fragment++;
10183         } else {
10184                 /* Go forward to the next mmio piece. */
10185                 frag->data += len;
10186                 frag->gpa += len;
10187                 frag->len -= len;
10188         }
10189
10190         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10191                 vcpu->mmio_needed = 0;
10192
10193                 /* FIXME: return into emulator if single-stepping.  */
10194                 if (vcpu->mmio_is_write)
10195                         return 1;
10196                 vcpu->mmio_read_completed = 1;
10197                 return complete_emulated_io(vcpu);
10198         }
10199
10200         run->exit_reason = KVM_EXIT_MMIO;
10201         run->mmio.phys_addr = frag->gpa;
10202         if (vcpu->mmio_is_write)
10203                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10204         run->mmio.len = min(8u, frag->len);
10205         run->mmio.is_write = vcpu->mmio_is_write;
10206         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10207         return 0;
10208 }
10209
10210 static void kvm_save_current_fpu(struct fpu *fpu)
10211 {
10212         /*
10213          * If the target FPU state is not resident in the CPU registers, just
10214          * memcpy() from current, else save CPU state directly to the target.
10215          */
10216         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10217                 memcpy(&fpu->state, &current->thread.fpu.state,
10218                        fpu_kernel_xstate_size);
10219         else
10220                 save_fpregs_to_fpstate(fpu);
10221 }
10222
10223 /* Swap (qemu) user FPU context for the guest FPU context. */
10224 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10225 {
10226         fpregs_lock();
10227
10228         kvm_save_current_fpu(vcpu->arch.user_fpu);
10229
10230         /*
10231          * Guests with protected state can't have it set by the hypervisor,
10232          * so skip trying to set it.
10233          */
10234         if (vcpu->arch.guest_fpu)
10235                 /* PKRU is separately restored in kvm_x86_ops.run. */
10236                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
10237                                         ~XFEATURE_MASK_PKRU);
10238
10239         fpregs_mark_activate();
10240         fpregs_unlock();
10241
10242         trace_kvm_fpu(1);
10243 }
10244
10245 /* When vcpu_run ends, restore user space FPU context. */
10246 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10247 {
10248         fpregs_lock();
10249
10250         /*
10251          * Guests with protected state can't have it read by the hypervisor,
10252          * so skip trying to save it.
10253          */
10254         if (vcpu->arch.guest_fpu)
10255                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
10256
10257         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
10258
10259         fpregs_mark_activate();
10260         fpregs_unlock();
10261
10262         ++vcpu->stat.fpu_reload;
10263         trace_kvm_fpu(0);
10264 }
10265
10266 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10267 {
10268         struct kvm_run *kvm_run = vcpu->run;
10269         int r;
10270
10271         vcpu_load(vcpu);
10272         kvm_sigset_activate(vcpu);
10273         kvm_run->flags = 0;
10274         kvm_load_guest_fpu(vcpu);
10275
10276         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10277                 if (kvm_run->immediate_exit) {
10278                         r = -EINTR;
10279                         goto out;
10280                 }
10281                 kvm_vcpu_block(vcpu);
10282                 if (kvm_apic_accept_events(vcpu) < 0) {
10283                         r = 0;
10284                         goto out;
10285                 }
10286                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10287                 r = -EAGAIN;
10288                 if (signal_pending(current)) {
10289                         r = -EINTR;
10290                         kvm_run->exit_reason = KVM_EXIT_INTR;
10291                         ++vcpu->stat.signal_exits;
10292                 }
10293                 goto out;
10294         }
10295
10296         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10297             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10298                 r = -EINVAL;
10299                 goto out;
10300         }
10301
10302         if (kvm_run->kvm_dirty_regs) {
10303                 r = sync_regs(vcpu);
10304                 if (r != 0)
10305                         goto out;
10306         }
10307
10308         /* re-sync apic's tpr */
10309         if (!lapic_in_kernel(vcpu)) {
10310                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10311                         r = -EINVAL;
10312                         goto out;
10313                 }
10314         }
10315
10316         if (unlikely(vcpu->arch.complete_userspace_io)) {
10317                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10318                 vcpu->arch.complete_userspace_io = NULL;
10319                 r = cui(vcpu);
10320                 if (r <= 0)
10321                         goto out;
10322         } else
10323                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10324
10325         if (kvm_run->immediate_exit)
10326                 r = -EINTR;
10327         else
10328                 r = vcpu_run(vcpu);
10329
10330 out:
10331         kvm_put_guest_fpu(vcpu);
10332         if (kvm_run->kvm_valid_regs)
10333                 store_regs(vcpu);
10334         post_kvm_run_save(vcpu);
10335         kvm_sigset_deactivate(vcpu);
10336
10337         vcpu_put(vcpu);
10338         return r;
10339 }
10340
10341 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10342 {
10343         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10344                 /*
10345                  * We are here if userspace calls get_regs() in the middle of
10346                  * instruction emulation. Registers state needs to be copied
10347                  * back from emulation context to vcpu. Userspace shouldn't do
10348                  * that usually, but some bad designed PV devices (vmware
10349                  * backdoor interface) need this to work
10350                  */
10351                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10352                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10353         }
10354         regs->rax = kvm_rax_read(vcpu);
10355         regs->rbx = kvm_rbx_read(vcpu);
10356         regs->rcx = kvm_rcx_read(vcpu);
10357         regs->rdx = kvm_rdx_read(vcpu);
10358         regs->rsi = kvm_rsi_read(vcpu);
10359         regs->rdi = kvm_rdi_read(vcpu);
10360         regs->rsp = kvm_rsp_read(vcpu);
10361         regs->rbp = kvm_rbp_read(vcpu);
10362 #ifdef CONFIG_X86_64
10363         regs->r8 = kvm_r8_read(vcpu);
10364         regs->r9 = kvm_r9_read(vcpu);
10365         regs->r10 = kvm_r10_read(vcpu);
10366         regs->r11 = kvm_r11_read(vcpu);
10367         regs->r12 = kvm_r12_read(vcpu);
10368         regs->r13 = kvm_r13_read(vcpu);
10369         regs->r14 = kvm_r14_read(vcpu);
10370         regs->r15 = kvm_r15_read(vcpu);
10371 #endif
10372
10373         regs->rip = kvm_rip_read(vcpu);
10374         regs->rflags = kvm_get_rflags(vcpu);
10375 }
10376
10377 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10378 {
10379         vcpu_load(vcpu);
10380         __get_regs(vcpu, regs);
10381         vcpu_put(vcpu);
10382         return 0;
10383 }
10384
10385 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10386 {
10387         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10388         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10389
10390         kvm_rax_write(vcpu, regs->rax);
10391         kvm_rbx_write(vcpu, regs->rbx);
10392         kvm_rcx_write(vcpu, regs->rcx);
10393         kvm_rdx_write(vcpu, regs->rdx);
10394         kvm_rsi_write(vcpu, regs->rsi);
10395         kvm_rdi_write(vcpu, regs->rdi);
10396         kvm_rsp_write(vcpu, regs->rsp);
10397         kvm_rbp_write(vcpu, regs->rbp);
10398 #ifdef CONFIG_X86_64
10399         kvm_r8_write(vcpu, regs->r8);
10400         kvm_r9_write(vcpu, regs->r9);
10401         kvm_r10_write(vcpu, regs->r10);
10402         kvm_r11_write(vcpu, regs->r11);
10403         kvm_r12_write(vcpu, regs->r12);
10404         kvm_r13_write(vcpu, regs->r13);
10405         kvm_r14_write(vcpu, regs->r14);
10406         kvm_r15_write(vcpu, regs->r15);
10407 #endif
10408
10409         kvm_rip_write(vcpu, regs->rip);
10410         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10411
10412         vcpu->arch.exception.pending = false;
10413
10414         kvm_make_request(KVM_REQ_EVENT, vcpu);
10415 }
10416
10417 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10418 {
10419         vcpu_load(vcpu);
10420         __set_regs(vcpu, regs);
10421         vcpu_put(vcpu);
10422         return 0;
10423 }
10424
10425 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10426 {
10427         struct kvm_segment cs;
10428
10429         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10430         *db = cs.db;
10431         *l = cs.l;
10432 }
10433 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10434
10435 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10436 {
10437         struct desc_ptr dt;
10438
10439         if (vcpu->arch.guest_state_protected)
10440                 goto skip_protected_regs;
10441
10442         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10443         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10444         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10445         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10446         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10447         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10448
10449         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10450         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10451
10452         static_call(kvm_x86_get_idt)(vcpu, &dt);
10453         sregs->idt.limit = dt.size;
10454         sregs->idt.base = dt.address;
10455         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10456         sregs->gdt.limit = dt.size;
10457         sregs->gdt.base = dt.address;
10458
10459         sregs->cr2 = vcpu->arch.cr2;
10460         sregs->cr3 = kvm_read_cr3(vcpu);
10461
10462 skip_protected_regs:
10463         sregs->cr0 = kvm_read_cr0(vcpu);
10464         sregs->cr4 = kvm_read_cr4(vcpu);
10465         sregs->cr8 = kvm_get_cr8(vcpu);
10466         sregs->efer = vcpu->arch.efer;
10467         sregs->apic_base = kvm_get_apic_base(vcpu);
10468 }
10469
10470 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10471 {
10472         __get_sregs_common(vcpu, sregs);
10473
10474         if (vcpu->arch.guest_state_protected)
10475                 return;
10476
10477         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10478                 set_bit(vcpu->arch.interrupt.nr,
10479                         (unsigned long *)sregs->interrupt_bitmap);
10480 }
10481
10482 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10483 {
10484         int i;
10485
10486         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10487
10488         if (vcpu->arch.guest_state_protected)
10489                 return;
10490
10491         if (is_pae_paging(vcpu)) {
10492                 for (i = 0 ; i < 4 ; i++)
10493                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10494                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10495         }
10496 }
10497
10498 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10499                                   struct kvm_sregs *sregs)
10500 {
10501         vcpu_load(vcpu);
10502         __get_sregs(vcpu, sregs);
10503         vcpu_put(vcpu);
10504         return 0;
10505 }
10506
10507 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10508                                     struct kvm_mp_state *mp_state)
10509 {
10510         int r;
10511
10512         vcpu_load(vcpu);
10513         if (kvm_mpx_supported())
10514                 kvm_load_guest_fpu(vcpu);
10515
10516         r = kvm_apic_accept_events(vcpu);
10517         if (r < 0)
10518                 goto out;
10519         r = 0;
10520
10521         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10522              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10523             vcpu->arch.pv.pv_unhalted)
10524                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10525         else
10526                 mp_state->mp_state = vcpu->arch.mp_state;
10527
10528 out:
10529         if (kvm_mpx_supported())
10530                 kvm_put_guest_fpu(vcpu);
10531         vcpu_put(vcpu);
10532         return r;
10533 }
10534
10535 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10536                                     struct kvm_mp_state *mp_state)
10537 {
10538         int ret = -EINVAL;
10539
10540         vcpu_load(vcpu);
10541
10542         if (!lapic_in_kernel(vcpu) &&
10543             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10544                 goto out;
10545
10546         /*
10547          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10548          * INIT state; latched init should be reported using
10549          * KVM_SET_VCPU_EVENTS, so reject it here.
10550          */
10551         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10552             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10553              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10554                 goto out;
10555
10556         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10557                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10558                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10559         } else
10560                 vcpu->arch.mp_state = mp_state->mp_state;
10561         kvm_make_request(KVM_REQ_EVENT, vcpu);
10562
10563         ret = 0;
10564 out:
10565         vcpu_put(vcpu);
10566         return ret;
10567 }
10568
10569 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10570                     int reason, bool has_error_code, u32 error_code)
10571 {
10572         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10573         int ret;
10574
10575         init_emulate_ctxt(vcpu);
10576
10577         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10578                                    has_error_code, error_code);
10579         if (ret) {
10580                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10581                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10582                 vcpu->run->internal.ndata = 0;
10583                 return 0;
10584         }
10585
10586         kvm_rip_write(vcpu, ctxt->eip);
10587         kvm_set_rflags(vcpu, ctxt->eflags);
10588         return 1;
10589 }
10590 EXPORT_SYMBOL_GPL(kvm_task_switch);
10591
10592 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10593 {
10594         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10595                 /*
10596                  * When EFER.LME and CR0.PG are set, the processor is in
10597                  * 64-bit mode (though maybe in a 32-bit code segment).
10598                  * CR4.PAE and EFER.LMA must be set.
10599                  */
10600                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10601                         return false;
10602                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10603                         return false;
10604         } else {
10605                 /*
10606                  * Not in 64-bit mode: EFER.LMA is clear and the code
10607                  * segment cannot be 64-bit.
10608                  */
10609                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10610                         return false;
10611         }
10612
10613         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10614 }
10615
10616 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10617                 int *mmu_reset_needed, bool update_pdptrs)
10618 {
10619         struct msr_data apic_base_msr;
10620         int idx;
10621         struct desc_ptr dt;
10622
10623         if (!kvm_is_valid_sregs(vcpu, sregs))
10624                 return -EINVAL;
10625
10626         apic_base_msr.data = sregs->apic_base;
10627         apic_base_msr.host_initiated = true;
10628         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10629                 return -EINVAL;
10630
10631         if (vcpu->arch.guest_state_protected)
10632                 return 0;
10633
10634         dt.size = sregs->idt.limit;
10635         dt.address = sregs->idt.base;
10636         static_call(kvm_x86_set_idt)(vcpu, &dt);
10637         dt.size = sregs->gdt.limit;
10638         dt.address = sregs->gdt.base;
10639         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10640
10641         vcpu->arch.cr2 = sregs->cr2;
10642         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10643         vcpu->arch.cr3 = sregs->cr3;
10644         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10645
10646         kvm_set_cr8(vcpu, sregs->cr8);
10647
10648         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10649         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10650
10651         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10652         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10653         vcpu->arch.cr0 = sregs->cr0;
10654
10655         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10656         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10657
10658         if (update_pdptrs) {
10659                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10660                 if (is_pae_paging(vcpu)) {
10661                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10662                         *mmu_reset_needed = 1;
10663                 }
10664                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10665         }
10666
10667         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10668         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10669         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10670         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10671         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10672         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10673
10674         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10675         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10676
10677         update_cr8_intercept(vcpu);
10678
10679         /* Older userspace won't unhalt the vcpu on reset. */
10680         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10681             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10682             !is_protmode(vcpu))
10683                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10684
10685         return 0;
10686 }
10687
10688 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10689 {
10690         int pending_vec, max_bits;
10691         int mmu_reset_needed = 0;
10692         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10693
10694         if (ret)
10695                 return ret;
10696
10697         if (mmu_reset_needed)
10698                 kvm_mmu_reset_context(vcpu);
10699
10700         max_bits = KVM_NR_INTERRUPTS;
10701         pending_vec = find_first_bit(
10702                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10703
10704         if (pending_vec < max_bits) {
10705                 kvm_queue_interrupt(vcpu, pending_vec, false);
10706                 pr_debug("Set back pending irq %d\n", pending_vec);
10707                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10708         }
10709         return 0;
10710 }
10711
10712 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10713 {
10714         int mmu_reset_needed = 0;
10715         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10716         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10717                 !(sregs2->efer & EFER_LMA);
10718         int i, ret;
10719
10720         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10721                 return -EINVAL;
10722
10723         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10724                 return -EINVAL;
10725
10726         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10727                                  &mmu_reset_needed, !valid_pdptrs);
10728         if (ret)
10729                 return ret;
10730
10731         if (valid_pdptrs) {
10732                 for (i = 0; i < 4 ; i++)
10733                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10734
10735                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10736                 mmu_reset_needed = 1;
10737                 vcpu->arch.pdptrs_from_userspace = true;
10738         }
10739         if (mmu_reset_needed)
10740                 kvm_mmu_reset_context(vcpu);
10741         return 0;
10742 }
10743
10744 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10745                                   struct kvm_sregs *sregs)
10746 {
10747         int ret;
10748
10749         vcpu_load(vcpu);
10750         ret = __set_sregs(vcpu, sregs);
10751         vcpu_put(vcpu);
10752         return ret;
10753 }
10754
10755 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10756                                         struct kvm_guest_debug *dbg)
10757 {
10758         unsigned long rflags;
10759         int i, r;
10760
10761         if (vcpu->arch.guest_state_protected)
10762                 return -EINVAL;
10763
10764         vcpu_load(vcpu);
10765
10766         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10767                 r = -EBUSY;
10768                 if (vcpu->arch.exception.pending)
10769                         goto out;
10770                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10771                         kvm_queue_exception(vcpu, DB_VECTOR);
10772                 else
10773                         kvm_queue_exception(vcpu, BP_VECTOR);
10774         }
10775
10776         /*
10777          * Read rflags as long as potentially injected trace flags are still
10778          * filtered out.
10779          */
10780         rflags = kvm_get_rflags(vcpu);
10781
10782         vcpu->guest_debug = dbg->control;
10783         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10784                 vcpu->guest_debug = 0;
10785
10786         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10787                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10788                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10789                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10790         } else {
10791                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10792                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10793         }
10794         kvm_update_dr7(vcpu);
10795
10796         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10797                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10798
10799         /*
10800          * Trigger an rflags update that will inject or remove the trace
10801          * flags.
10802          */
10803         kvm_set_rflags(vcpu, rflags);
10804
10805         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10806
10807         r = 0;
10808
10809 out:
10810         vcpu_put(vcpu);
10811         return r;
10812 }
10813
10814 /*
10815  * Translate a guest virtual address to a guest physical address.
10816  */
10817 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10818                                     struct kvm_translation *tr)
10819 {
10820         unsigned long vaddr = tr->linear_address;
10821         gpa_t gpa;
10822         int idx;
10823
10824         vcpu_load(vcpu);
10825
10826         idx = srcu_read_lock(&vcpu->kvm->srcu);
10827         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10828         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10829         tr->physical_address = gpa;
10830         tr->valid = gpa != UNMAPPED_GVA;
10831         tr->writeable = 1;
10832         tr->usermode = 0;
10833
10834         vcpu_put(vcpu);
10835         return 0;
10836 }
10837
10838 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10839 {
10840         struct fxregs_state *fxsave;
10841
10842         if (!vcpu->arch.guest_fpu)
10843                 return 0;
10844
10845         vcpu_load(vcpu);
10846
10847         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10848         memcpy(fpu->fpr, fxsave->st_space, 128);
10849         fpu->fcw = fxsave->cwd;
10850         fpu->fsw = fxsave->swd;
10851         fpu->ftwx = fxsave->twd;
10852         fpu->last_opcode = fxsave->fop;
10853         fpu->last_ip = fxsave->rip;
10854         fpu->last_dp = fxsave->rdp;
10855         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10856
10857         vcpu_put(vcpu);
10858         return 0;
10859 }
10860
10861 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10862 {
10863         struct fxregs_state *fxsave;
10864
10865         if (!vcpu->arch.guest_fpu)
10866                 return 0;
10867
10868         vcpu_load(vcpu);
10869
10870         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10871
10872         memcpy(fxsave->st_space, fpu->fpr, 128);
10873         fxsave->cwd = fpu->fcw;
10874         fxsave->swd = fpu->fsw;
10875         fxsave->twd = fpu->ftwx;
10876         fxsave->fop = fpu->last_opcode;
10877         fxsave->rip = fpu->last_ip;
10878         fxsave->rdp = fpu->last_dp;
10879         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10880
10881         vcpu_put(vcpu);
10882         return 0;
10883 }
10884
10885 static void store_regs(struct kvm_vcpu *vcpu)
10886 {
10887         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10888
10889         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10890                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10891
10892         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10893                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10894
10895         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10896                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10897                                 vcpu, &vcpu->run->s.regs.events);
10898 }
10899
10900 static int sync_regs(struct kvm_vcpu *vcpu)
10901 {
10902         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10903                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10904                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10905         }
10906         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10907                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10908                         return -EINVAL;
10909                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10910         }
10911         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10912                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10913                                 vcpu, &vcpu->run->s.regs.events))
10914                         return -EINVAL;
10915                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10916         }
10917
10918         return 0;
10919 }
10920
10921 static void fx_init(struct kvm_vcpu *vcpu)
10922 {
10923         if (!vcpu->arch.guest_fpu)
10924                 return;
10925
10926         fpstate_init(&vcpu->arch.guest_fpu->state);
10927         if (boot_cpu_has(X86_FEATURE_XSAVES))
10928                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10929                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10930
10931         /*
10932          * Ensure guest xcr0 is valid for loading
10933          */
10934         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10935
10936         vcpu->arch.cr0 |= X86_CR0_ET;
10937 }
10938
10939 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10940 {
10941         if (vcpu->arch.guest_fpu) {
10942                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10943                 vcpu->arch.guest_fpu = NULL;
10944         }
10945 }
10946 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10947
10948 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10949 {
10950         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10951                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10952                              "guest TSC will not be reliable\n");
10953
10954         return 0;
10955 }
10956
10957 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10958 {
10959         struct page *page;
10960         int r;
10961
10962         vcpu->arch.last_vmentry_cpu = -1;
10963         vcpu->arch.regs_avail = ~0;
10964         vcpu->arch.regs_dirty = ~0;
10965
10966         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10967                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10968         else
10969                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10970
10971         r = kvm_mmu_create(vcpu);
10972         if (r < 0)
10973                 return r;
10974
10975         if (irqchip_in_kernel(vcpu->kvm)) {
10976                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10977                 if (r < 0)
10978                         goto fail_mmu_destroy;
10979
10980                 /*
10981                  * Defer evaluating inhibits until the vCPU is first run, as
10982                  * this vCPU will not get notified of any changes until this
10983                  * vCPU is visible to other vCPUs (marked online and added to
10984                  * the set of vCPUs).  Opportunistically mark APICv active as
10985                  * VMX in particularly is highly unlikely to have inhibits.
10986                  * Ignore the current per-VM APICv state so that vCPU creation
10987                  * is guaranteed to run with a deterministic value, the request
10988                  * will ensure the vCPU gets the correct state before VM-Entry.
10989                  */
10990                 if (enable_apicv) {
10991                         vcpu->arch.apicv_active = true;
10992                         kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
10993                 }
10994         } else
10995                 static_branch_inc(&kvm_has_noapic_vcpu);
10996
10997         r = -ENOMEM;
10998
10999         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11000         if (!page)
11001                 goto fail_free_lapic;
11002         vcpu->arch.pio_data = page_address(page);
11003
11004         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11005                                        GFP_KERNEL_ACCOUNT);
11006         if (!vcpu->arch.mce_banks)
11007                 goto fail_free_pio_data;
11008         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11009
11010         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11011                                 GFP_KERNEL_ACCOUNT))
11012                 goto fail_free_mce_banks;
11013
11014         if (!alloc_emulate_ctxt(vcpu))
11015                 goto free_wbinvd_dirty_mask;
11016
11017         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
11018                                                 GFP_KERNEL_ACCOUNT);
11019         if (!vcpu->arch.user_fpu) {
11020                 pr_err("kvm: failed to allocate userspace's fpu\n");
11021                 goto free_emulate_ctxt;
11022         }
11023
11024         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
11025                                                  GFP_KERNEL_ACCOUNT);
11026         if (!vcpu->arch.guest_fpu) {
11027                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11028                 goto free_user_fpu;
11029         }
11030         fx_init(vcpu);
11031
11032         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11033         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11034
11035         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11036
11037         kvm_async_pf_hash_reset(vcpu);
11038         kvm_pmu_init(vcpu);
11039
11040         vcpu->arch.pending_external_vector = -1;
11041         vcpu->arch.preempted_in_kernel = false;
11042
11043 #if IS_ENABLED(CONFIG_HYPERV)
11044         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11045 #endif
11046
11047         r = static_call(kvm_x86_vcpu_create)(vcpu);
11048         if (r)
11049                 goto free_guest_fpu;
11050
11051         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11052         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11053         kvm_vcpu_mtrr_init(vcpu);
11054         vcpu_load(vcpu);
11055         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11056         kvm_vcpu_reset(vcpu, false);
11057         kvm_init_mmu(vcpu);
11058         vcpu_put(vcpu);
11059         return 0;
11060
11061 free_guest_fpu:
11062         kvm_free_guest_fpu(vcpu);
11063 free_user_fpu:
11064         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11065 free_emulate_ctxt:
11066         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11067 free_wbinvd_dirty_mask:
11068         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11069 fail_free_mce_banks:
11070         kfree(vcpu->arch.mce_banks);
11071 fail_free_pio_data:
11072         free_page((unsigned long)vcpu->arch.pio_data);
11073 fail_free_lapic:
11074         kvm_free_lapic(vcpu);
11075 fail_mmu_destroy:
11076         kvm_mmu_destroy(vcpu);
11077         return r;
11078 }
11079
11080 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11081 {
11082         struct kvm *kvm = vcpu->kvm;
11083
11084         if (mutex_lock_killable(&vcpu->mutex))
11085                 return;
11086         vcpu_load(vcpu);
11087         kvm_synchronize_tsc(vcpu, 0);
11088         vcpu_put(vcpu);
11089
11090         /* poll control enabled by default */
11091         vcpu->arch.msr_kvm_poll_control = 1;
11092
11093         mutex_unlock(&vcpu->mutex);
11094
11095         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11096                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11097                                                 KVMCLOCK_SYNC_PERIOD);
11098 }
11099
11100 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11101 {
11102         int idx;
11103
11104         kvmclock_reset(vcpu);
11105
11106         static_call(kvm_x86_vcpu_free)(vcpu);
11107
11108         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11109         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11110         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11111         kvm_free_guest_fpu(vcpu);
11112
11113         kvm_hv_vcpu_uninit(vcpu);
11114         kvm_pmu_destroy(vcpu);
11115         kfree(vcpu->arch.mce_banks);
11116         kvm_free_lapic(vcpu);
11117         idx = srcu_read_lock(&vcpu->kvm->srcu);
11118         kvm_mmu_destroy(vcpu);
11119         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11120         free_page((unsigned long)vcpu->arch.pio_data);
11121         kvfree(vcpu->arch.cpuid_entries);
11122         if (!lapic_in_kernel(vcpu))
11123                 static_branch_dec(&kvm_has_noapic_vcpu);
11124 }
11125
11126 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11127 {
11128         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11129         unsigned long new_cr0;
11130         u32 eax, dummy;
11131
11132         kvm_lapic_reset(vcpu, init_event);
11133
11134         vcpu->arch.hflags = 0;
11135
11136         vcpu->arch.smi_pending = 0;
11137         vcpu->arch.smi_count = 0;
11138         atomic_set(&vcpu->arch.nmi_queued, 0);
11139         vcpu->arch.nmi_pending = 0;
11140         vcpu->arch.nmi_injected = false;
11141         kvm_clear_interrupt_queue(vcpu);
11142         kvm_clear_exception_queue(vcpu);
11143
11144         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11145         kvm_update_dr0123(vcpu);
11146         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11147         vcpu->arch.dr7 = DR7_FIXED_1;
11148         kvm_update_dr7(vcpu);
11149
11150         vcpu->arch.cr2 = 0;
11151
11152         kvm_make_request(KVM_REQ_EVENT, vcpu);
11153         vcpu->arch.apf.msr_en_val = 0;
11154         vcpu->arch.apf.msr_int_val = 0;
11155         vcpu->arch.st.msr_val = 0;
11156
11157         kvmclock_reset(vcpu);
11158
11159         kvm_clear_async_pf_completion_queue(vcpu);
11160         kvm_async_pf_hash_reset(vcpu);
11161         vcpu->arch.apf.halted = false;
11162
11163         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
11164                 void *mpx_state_buffer;
11165
11166                 /*
11167                  * To avoid have the INIT path from kvm_apic_has_events() that be
11168                  * called with loaded FPU and does not let userspace fix the state.
11169                  */
11170                 if (init_event)
11171                         kvm_put_guest_fpu(vcpu);
11172                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11173                                         XFEATURE_BNDREGS);
11174                 if (mpx_state_buffer)
11175                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
11176                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11177                                         XFEATURE_BNDCSR);
11178                 if (mpx_state_buffer)
11179                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
11180                 if (init_event)
11181                         kvm_load_guest_fpu(vcpu);
11182         }
11183
11184         if (!init_event) {
11185                 kvm_pmu_reset(vcpu);
11186                 vcpu->arch.smbase = 0x30000;
11187
11188                 vcpu->arch.msr_misc_features_enables = 0;
11189
11190                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11191                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11192         }
11193
11194         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11195         vcpu->arch.regs_avail = ~0;
11196         vcpu->arch.regs_dirty = ~0;
11197
11198         /*
11199          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11200          * if no CPUID match is found.  Note, it's impossible to get a match at
11201          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11202          * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11203          * But, go through the motions in case that's ever remedied.
11204          */
11205         eax = 1;
11206         if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
11207                 eax = 0x600;
11208         kvm_rdx_write(vcpu, eax);
11209
11210         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11211
11212         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11213         kvm_rip_write(vcpu, 0xfff0);
11214
11215         vcpu->arch.cr3 = 0;
11216         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11217
11218         /*
11219          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11220          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11221          * (or qualify) that with a footnote stating that CD/NW are preserved.
11222          */
11223         new_cr0 = X86_CR0_ET;
11224         if (init_event)
11225                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11226         else
11227                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11228
11229         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11230         static_call(kvm_x86_set_cr4)(vcpu, 0);
11231         static_call(kvm_x86_set_efer)(vcpu, 0);
11232         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11233
11234         /*
11235          * Reset the MMU context if paging was enabled prior to INIT (which is
11236          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11237          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11238          * checked because it is unconditionally cleared on INIT and all other
11239          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11240          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11241          */
11242         if (old_cr0 & X86_CR0_PG)
11243                 kvm_mmu_reset_context(vcpu);
11244
11245         /*
11246          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11247          * APM states the TLBs are untouched by INIT, but it also states that
11248          * the TLBs are flushed on "External initialization of the processor."
11249          * Flush the guest TLB regardless of vendor, there is no meaningful
11250          * benefit in relying on the guest to flush the TLB immediately after
11251          * INIT.  A spurious TLB flush is benign and likely negligible from a
11252          * performance perspective.
11253          */
11254         if (init_event)
11255                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11256 }
11257 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11258
11259 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11260 {
11261         struct kvm_segment cs;
11262
11263         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11264         cs.selector = vector << 8;
11265         cs.base = vector << 12;
11266         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11267         kvm_rip_write(vcpu, 0);
11268 }
11269 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11270
11271 int kvm_arch_hardware_enable(void)
11272 {
11273         struct kvm *kvm;
11274         struct kvm_vcpu *vcpu;
11275         int i;
11276         int ret;
11277         u64 local_tsc;
11278         u64 max_tsc = 0;
11279         bool stable, backwards_tsc = false;
11280
11281         kvm_user_return_msr_cpu_online();
11282         ret = static_call(kvm_x86_hardware_enable)();
11283         if (ret != 0)
11284                 return ret;
11285
11286         local_tsc = rdtsc();
11287         stable = !kvm_check_tsc_unstable();
11288         list_for_each_entry(kvm, &vm_list, vm_list) {
11289                 kvm_for_each_vcpu(i, vcpu, kvm) {
11290                         if (!stable && vcpu->cpu == smp_processor_id())
11291                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11292                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11293                                 backwards_tsc = true;
11294                                 if (vcpu->arch.last_host_tsc > max_tsc)
11295                                         max_tsc = vcpu->arch.last_host_tsc;
11296                         }
11297                 }
11298         }
11299
11300         /*
11301          * Sometimes, even reliable TSCs go backwards.  This happens on
11302          * platforms that reset TSC during suspend or hibernate actions, but
11303          * maintain synchronization.  We must compensate.  Fortunately, we can
11304          * detect that condition here, which happens early in CPU bringup,
11305          * before any KVM threads can be running.  Unfortunately, we can't
11306          * bring the TSCs fully up to date with real time, as we aren't yet far
11307          * enough into CPU bringup that we know how much real time has actually
11308          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11309          * variables that haven't been updated yet.
11310          *
11311          * So we simply find the maximum observed TSC above, then record the
11312          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11313          * the adjustment will be applied.  Note that we accumulate
11314          * adjustments, in case multiple suspend cycles happen before some VCPU
11315          * gets a chance to run again.  In the event that no KVM threads get a
11316          * chance to run, we will miss the entire elapsed period, as we'll have
11317          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11318          * loose cycle time.  This isn't too big a deal, since the loss will be
11319          * uniform across all VCPUs (not to mention the scenario is extremely
11320          * unlikely). It is possible that a second hibernate recovery happens
11321          * much faster than a first, causing the observed TSC here to be
11322          * smaller; this would require additional padding adjustment, which is
11323          * why we set last_host_tsc to the local tsc observed here.
11324          *
11325          * N.B. - this code below runs only on platforms with reliable TSC,
11326          * as that is the only way backwards_tsc is set above.  Also note
11327          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11328          * have the same delta_cyc adjustment applied if backwards_tsc
11329          * is detected.  Note further, this adjustment is only done once,
11330          * as we reset last_host_tsc on all VCPUs to stop this from being
11331          * called multiple times (one for each physical CPU bringup).
11332          *
11333          * Platforms with unreliable TSCs don't have to deal with this, they
11334          * will be compensated by the logic in vcpu_load, which sets the TSC to
11335          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11336          * guarantee that they stay in perfect synchronization.
11337          */
11338         if (backwards_tsc) {
11339                 u64 delta_cyc = max_tsc - local_tsc;
11340                 list_for_each_entry(kvm, &vm_list, vm_list) {
11341                         kvm->arch.backwards_tsc_observed = true;
11342                         kvm_for_each_vcpu(i, vcpu, kvm) {
11343                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11344                                 vcpu->arch.last_host_tsc = local_tsc;
11345                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11346                         }
11347
11348                         /*
11349                          * We have to disable TSC offset matching.. if you were
11350                          * booting a VM while issuing an S4 host suspend....
11351                          * you may have some problem.  Solving this issue is
11352                          * left as an exercise to the reader.
11353                          */
11354                         kvm->arch.last_tsc_nsec = 0;
11355                         kvm->arch.last_tsc_write = 0;
11356                 }
11357
11358         }
11359         return 0;
11360 }
11361
11362 void kvm_arch_hardware_disable(void)
11363 {
11364         static_call(kvm_x86_hardware_disable)();
11365         drop_user_return_notifiers();
11366 }
11367
11368 int kvm_arch_hardware_setup(void *opaque)
11369 {
11370         struct kvm_x86_init_ops *ops = opaque;
11371         int r;
11372
11373         rdmsrl_safe(MSR_EFER, &host_efer);
11374
11375         if (boot_cpu_has(X86_FEATURE_XSAVES))
11376                 rdmsrl(MSR_IA32_XSS, host_xss);
11377
11378         r = ops->hardware_setup();
11379         if (r != 0)
11380                 return r;
11381
11382         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11383         kvm_ops_static_call_update();
11384
11385         if (ops->intel_pt_intr_in_guest && ops->intel_pt_intr_in_guest())
11386                 kvm_guest_cbs.handle_intel_pt_intr = kvm_handle_intel_pt_intr;
11387         perf_register_guest_info_callbacks(&kvm_guest_cbs);
11388
11389         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11390                 supported_xss = 0;
11391
11392 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11393         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11394 #undef __kvm_cpu_cap_has
11395
11396         if (kvm_has_tsc_control) {
11397                 /*
11398                  * Make sure the user can only configure tsc_khz values that
11399                  * fit into a signed integer.
11400                  * A min value is not calculated because it will always
11401                  * be 1 on all machines.
11402                  */
11403                 u64 max = min(0x7fffffffULL,
11404                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11405                 kvm_max_guest_tsc_khz = max;
11406
11407                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11408         }
11409
11410         kvm_init_msr_list();
11411         return 0;
11412 }
11413
11414 void kvm_arch_hardware_unsetup(void)
11415 {
11416         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
11417         kvm_guest_cbs.handle_intel_pt_intr = NULL;
11418
11419         static_call(kvm_x86_hardware_unsetup)();
11420 }
11421
11422 int kvm_arch_check_processor_compat(void *opaque)
11423 {
11424         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11425         struct kvm_x86_init_ops *ops = opaque;
11426
11427         WARN_ON(!irqs_disabled());
11428
11429         if (__cr4_reserved_bits(cpu_has, c) !=
11430             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11431                 return -EIO;
11432
11433         return ops->check_processor_compatibility();
11434 }
11435
11436 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11437 {
11438         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11439 }
11440 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11441
11442 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11443 {
11444         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11445 }
11446
11447 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11448 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11449
11450 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11451 {
11452         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11453
11454         vcpu->arch.l1tf_flush_l1d = true;
11455         if (pmu->version && unlikely(pmu->event_count)) {
11456                 pmu->need_cleanup = true;
11457                 kvm_make_request(KVM_REQ_PMU, vcpu);
11458         }
11459         static_call(kvm_x86_sched_in)(vcpu, cpu);
11460 }
11461
11462 void kvm_arch_free_vm(struct kvm *kvm)
11463 {
11464         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11465         vfree(kvm);
11466 }
11467
11468
11469 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11470 {
11471         int ret;
11472
11473         if (type)
11474                 return -EINVAL;
11475
11476         ret = kvm_page_track_init(kvm);
11477         if (ret)
11478                 return ret;
11479
11480         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11481         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11482         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11483         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11484         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11485         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11486
11487         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11488         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11489         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11490         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11491                 &kvm->arch.irq_sources_bitmap);
11492
11493         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11494         mutex_init(&kvm->arch.apic_map_lock);
11495         raw_spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11496
11497         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11498         pvclock_update_vm_gtod_copy(kvm);
11499
11500         kvm->arch.guest_can_read_msr_platform_info = true;
11501
11502 #if IS_ENABLED(CONFIG_HYPERV)
11503         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11504         kvm->arch.hv_root_tdp = INVALID_PAGE;
11505 #endif
11506
11507         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11508         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11509
11510         kvm_apicv_init(kvm);
11511         kvm_hv_init_vm(kvm);
11512         kvm_mmu_init_vm(kvm);
11513         kvm_xen_init_vm(kvm);
11514
11515         return static_call(kvm_x86_vm_init)(kvm);
11516 }
11517
11518 int kvm_arch_post_init_vm(struct kvm *kvm)
11519 {
11520         return kvm_mmu_post_init_vm(kvm);
11521 }
11522
11523 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11524 {
11525         vcpu_load(vcpu);
11526         kvm_mmu_unload(vcpu);
11527         vcpu_put(vcpu);
11528 }
11529
11530 static void kvm_free_vcpus(struct kvm *kvm)
11531 {
11532         unsigned int i;
11533         struct kvm_vcpu *vcpu;
11534
11535         /*
11536          * Unpin any mmu pages first.
11537          */
11538         kvm_for_each_vcpu(i, vcpu, kvm) {
11539                 kvm_clear_async_pf_completion_queue(vcpu);
11540                 kvm_unload_vcpu_mmu(vcpu);
11541         }
11542         kvm_for_each_vcpu(i, vcpu, kvm)
11543                 kvm_vcpu_destroy(vcpu);
11544
11545         mutex_lock(&kvm->lock);
11546         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11547                 kvm->vcpus[i] = NULL;
11548
11549         atomic_set(&kvm->online_vcpus, 0);
11550         mutex_unlock(&kvm->lock);
11551 }
11552
11553 void kvm_arch_sync_events(struct kvm *kvm)
11554 {
11555         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11556         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11557         kvm_free_pit(kvm);
11558 }
11559
11560 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11561
11562 /**
11563  * __x86_set_memory_region: Setup KVM internal memory slot
11564  *
11565  * @kvm: the kvm pointer to the VM.
11566  * @id: the slot ID to setup.
11567  * @gpa: the GPA to install the slot (unused when @size == 0).
11568  * @size: the size of the slot. Set to zero to uninstall a slot.
11569  *
11570  * This function helps to setup a KVM internal memory slot.  Specify
11571  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11572  * slot.  The return code can be one of the following:
11573  *
11574  *   HVA:           on success (uninstall will return a bogus HVA)
11575  *   -errno:        on error
11576  *
11577  * The caller should always use IS_ERR() to check the return value
11578  * before use.  Note, the KVM internal memory slots are guaranteed to
11579  * remain valid and unchanged until the VM is destroyed, i.e., the
11580  * GPA->HVA translation will not change.  However, the HVA is a user
11581  * address, i.e. its accessibility is not guaranteed, and must be
11582  * accessed via __copy_{to,from}_user().
11583  */
11584 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11585                                       u32 size)
11586 {
11587         int i, r;
11588         unsigned long hva, old_npages;
11589         struct kvm_memslots *slots = kvm_memslots(kvm);
11590         struct kvm_memory_slot *slot;
11591
11592         /* Called with kvm->slots_lock held.  */
11593         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11594                 return ERR_PTR_USR(-EINVAL);
11595
11596         slot = id_to_memslot(slots, id);
11597         if (size) {
11598                 if (slot && slot->npages)
11599                         return ERR_PTR_USR(-EEXIST);
11600
11601                 /*
11602                  * MAP_SHARED to prevent internal slot pages from being moved
11603                  * by fork()/COW.
11604                  */
11605                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11606                               MAP_SHARED | MAP_ANONYMOUS, 0);
11607                 if (IS_ERR((void *)hva))
11608                         return (void __user *)hva;
11609         } else {
11610                 if (!slot || !slot->npages)
11611                         return NULL;
11612
11613                 old_npages = slot->npages;
11614                 hva = slot->userspace_addr;
11615         }
11616
11617         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11618                 struct kvm_userspace_memory_region m;
11619
11620                 m.slot = id | (i << 16);
11621                 m.flags = 0;
11622                 m.guest_phys_addr = gpa;
11623                 m.userspace_addr = hva;
11624                 m.memory_size = size;
11625                 r = __kvm_set_memory_region(kvm, &m);
11626                 if (r < 0)
11627                         return ERR_PTR_USR(r);
11628         }
11629
11630         if (!size)
11631                 vm_munmap(hva, old_npages * PAGE_SIZE);
11632
11633         return (void __user *)hva;
11634 }
11635 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11636
11637 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11638 {
11639         kvm_mmu_pre_destroy_vm(kvm);
11640 }
11641
11642 void kvm_arch_destroy_vm(struct kvm *kvm)
11643 {
11644         if (current->mm == kvm->mm) {
11645                 /*
11646                  * Free memory regions allocated on behalf of userspace,
11647                  * unless the the memory map has changed due to process exit
11648                  * or fd copying.
11649                  */
11650                 mutex_lock(&kvm->slots_lock);
11651                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11652                                         0, 0);
11653                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11654                                         0, 0);
11655                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11656                 mutex_unlock(&kvm->slots_lock);
11657         }
11658         static_call_cond(kvm_x86_vm_destroy)(kvm);
11659         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11660         kvm_pic_destroy(kvm);
11661         kvm_ioapic_destroy(kvm);
11662         kvm_free_vcpus(kvm);
11663         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11664         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11665         kvm_mmu_uninit_vm(kvm);
11666         kvm_page_track_cleanup(kvm);
11667         kvm_xen_destroy_vm(kvm);
11668         kvm_hv_destroy_vm(kvm);
11669 }
11670
11671 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11672 {
11673         int i;
11674
11675         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11676                 kvfree(slot->arch.rmap[i]);
11677                 slot->arch.rmap[i] = NULL;
11678         }
11679 }
11680
11681 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11682 {
11683         int i;
11684
11685         memslot_rmap_free(slot);
11686
11687         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11688                 kvfree(slot->arch.lpage_info[i - 1]);
11689                 slot->arch.lpage_info[i - 1] = NULL;
11690         }
11691
11692         kvm_page_track_free_memslot(slot);
11693 }
11694
11695 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11696                               unsigned long npages)
11697 {
11698         const int sz = sizeof(*slot->arch.rmap[0]);
11699         int i;
11700
11701         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11702                 int level = i + 1;
11703                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11704
11705                 if (slot->arch.rmap[i])
11706                         continue;
11707
11708                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11709                 if (!slot->arch.rmap[i]) {
11710                         memslot_rmap_free(slot);
11711                         return -ENOMEM;
11712                 }
11713         }
11714
11715         return 0;
11716 }
11717
11718 int alloc_all_memslots_rmaps(struct kvm *kvm)
11719 {
11720         struct kvm_memslots *slots;
11721         struct kvm_memory_slot *slot;
11722         int r, i;
11723
11724         /*
11725          * Check if memslots alreday have rmaps early before acquiring
11726          * the slots_arch_lock below.
11727          */
11728         if (kvm_memslots_have_rmaps(kvm))
11729                 return 0;
11730
11731         mutex_lock(&kvm->slots_arch_lock);
11732
11733         /*
11734          * Read memslots_have_rmaps again, under the slots arch lock,
11735          * before allocating the rmaps
11736          */
11737         if (kvm_memslots_have_rmaps(kvm)) {
11738                 mutex_unlock(&kvm->slots_arch_lock);
11739                 return 0;
11740         }
11741
11742         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11743                 slots = __kvm_memslots(kvm, i);
11744                 kvm_for_each_memslot(slot, slots) {
11745                         r = memslot_rmap_alloc(slot, slot->npages);
11746                         if (r) {
11747                                 mutex_unlock(&kvm->slots_arch_lock);
11748                                 return r;
11749                         }
11750                 }
11751         }
11752
11753         /*
11754          * Ensure that memslots_have_rmaps becomes true strictly after
11755          * all the rmap pointers are set.
11756          */
11757         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11758         mutex_unlock(&kvm->slots_arch_lock);
11759         return 0;
11760 }
11761
11762 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11763                                       struct kvm_memory_slot *slot,
11764                                       unsigned long npages)
11765 {
11766         int i, r;
11767
11768         /*
11769          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11770          * old arrays will be freed by __kvm_set_memory_region() if installing
11771          * the new memslot is successful.
11772          */
11773         memset(&slot->arch, 0, sizeof(slot->arch));
11774
11775         if (kvm_memslots_have_rmaps(kvm)) {
11776                 r = memslot_rmap_alloc(slot, npages);
11777                 if (r)
11778                         return r;
11779         }
11780
11781         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11782                 struct kvm_lpage_info *linfo;
11783                 unsigned long ugfn;
11784                 int lpages;
11785                 int level = i + 1;
11786
11787                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11788
11789                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11790                 if (!linfo)
11791                         goto out_free;
11792
11793                 slot->arch.lpage_info[i - 1] = linfo;
11794
11795                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11796                         linfo[0].disallow_lpage = 1;
11797                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11798                         linfo[lpages - 1].disallow_lpage = 1;
11799                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11800                 /*
11801                  * If the gfn and userspace address are not aligned wrt each
11802                  * other, disable large page support for this slot.
11803                  */
11804                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11805                         unsigned long j;
11806
11807                         for (j = 0; j < lpages; ++j)
11808                                 linfo[j].disallow_lpage = 1;
11809                 }
11810         }
11811
11812         if (kvm_page_track_create_memslot(slot, npages))
11813                 goto out_free;
11814
11815         return 0;
11816
11817 out_free:
11818         memslot_rmap_free(slot);
11819
11820         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11821                 kvfree(slot->arch.lpage_info[i - 1]);
11822                 slot->arch.lpage_info[i - 1] = NULL;
11823         }
11824         return -ENOMEM;
11825 }
11826
11827 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11828 {
11829         struct kvm_vcpu *vcpu;
11830         int i;
11831
11832         /*
11833          * memslots->generation has been incremented.
11834          * mmio generation may have reached its maximum value.
11835          */
11836         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11837
11838         /* Force re-initialization of steal_time cache */
11839         kvm_for_each_vcpu(i, vcpu, kvm)
11840                 kvm_vcpu_kick(vcpu);
11841 }
11842
11843 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11844                                 struct kvm_memory_slot *memslot,
11845                                 const struct kvm_userspace_memory_region *mem,
11846                                 enum kvm_mr_change change)
11847 {
11848         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11849                 return kvm_alloc_memslot_metadata(kvm, memslot,
11850                                                   mem->memory_size >> PAGE_SHIFT);
11851         return 0;
11852 }
11853
11854
11855 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11856 {
11857         struct kvm_arch *ka = &kvm->arch;
11858
11859         if (!kvm_x86_ops.cpu_dirty_log_size)
11860                 return;
11861
11862         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11863             (!enable && --ka->cpu_dirty_logging_count == 0))
11864                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11865
11866         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11867 }
11868
11869 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11870                                      struct kvm_memory_slot *old,
11871                                      const struct kvm_memory_slot *new,
11872                                      enum kvm_mr_change change)
11873 {
11874         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11875
11876         /*
11877          * Update CPU dirty logging if dirty logging is being toggled.  This
11878          * applies to all operations.
11879          */
11880         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11881                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11882
11883         /*
11884          * Nothing more to do for RO slots (which can't be dirtied and can't be
11885          * made writable) or CREATE/MOVE/DELETE of a slot.
11886          *
11887          * For a memslot with dirty logging disabled:
11888          * CREATE:      No dirty mappings will already exist.
11889          * MOVE/DELETE: The old mappings will already have been cleaned up by
11890          *              kvm_arch_flush_shadow_memslot()
11891          *
11892          * For a memslot with dirty logging enabled:
11893          * CREATE:      No shadow pages exist, thus nothing to write-protect
11894          *              and no dirty bits to clear.
11895          * MOVE/DELETE: The old mappings will already have been cleaned up by
11896          *              kvm_arch_flush_shadow_memslot().
11897          */
11898         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11899                 return;
11900
11901         /*
11902          * READONLY and non-flags changes were filtered out above, and the only
11903          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11904          * logging isn't being toggled on or off.
11905          */
11906         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11907                 return;
11908
11909         if (!log_dirty_pages) {
11910                 /*
11911                  * Dirty logging tracks sptes in 4k granularity, meaning that
11912                  * large sptes have to be split.  If live migration succeeds,
11913                  * the guest in the source machine will be destroyed and large
11914                  * sptes will be created in the destination.  However, if the
11915                  * guest continues to run in the source machine (for example if
11916                  * live migration fails), small sptes will remain around and
11917                  * cause bad performance.
11918                  *
11919                  * Scan sptes if dirty logging has been stopped, dropping those
11920                  * which can be collapsed into a single large-page spte.  Later
11921                  * page faults will create the large-page sptes.
11922                  */
11923                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11924         } else {
11925                 /*
11926                  * Initially-all-set does not require write protecting any page,
11927                  * because they're all assumed to be dirty.
11928                  */
11929                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11930                         return;
11931
11932                 if (kvm_x86_ops.cpu_dirty_log_size) {
11933                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11934                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11935                 } else {
11936                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11937                 }
11938         }
11939 }
11940
11941 void kvm_arch_commit_memory_region(struct kvm *kvm,
11942                                 const struct kvm_userspace_memory_region *mem,
11943                                 struct kvm_memory_slot *old,
11944                                 const struct kvm_memory_slot *new,
11945                                 enum kvm_mr_change change)
11946 {
11947         if (!kvm->arch.n_requested_mmu_pages)
11948                 kvm_mmu_change_mmu_pages(kvm,
11949                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11950
11951         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11952
11953         /* Free the arrays associated with the old memslot. */
11954         if (change == KVM_MR_MOVE)
11955                 kvm_arch_free_memslot(kvm, old);
11956 }
11957
11958 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11959 {
11960         kvm_mmu_zap_all(kvm);
11961 }
11962
11963 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11964                                    struct kvm_memory_slot *slot)
11965 {
11966         kvm_page_track_flush_slot(kvm, slot);
11967 }
11968
11969 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11970 {
11971         return (is_guest_mode(vcpu) &&
11972                         kvm_x86_ops.guest_apic_has_interrupt &&
11973                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11974 }
11975
11976 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11977 {
11978         if (!list_empty_careful(&vcpu->async_pf.done))
11979                 return true;
11980
11981         if (kvm_apic_has_events(vcpu))
11982                 return true;
11983
11984         if (vcpu->arch.pv.pv_unhalted)
11985                 return true;
11986
11987         if (vcpu->arch.exception.pending)
11988                 return true;
11989
11990         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11991             (vcpu->arch.nmi_pending &&
11992              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11993                 return true;
11994
11995         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11996             (vcpu->arch.smi_pending &&
11997              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11998                 return true;
11999
12000         if (kvm_arch_interrupt_allowed(vcpu) &&
12001             (kvm_cpu_has_interrupt(vcpu) ||
12002             kvm_guest_apic_has_interrupt(vcpu)))
12003                 return true;
12004
12005         if (kvm_hv_has_stimer_pending(vcpu))
12006                 return true;
12007
12008         if (is_guest_mode(vcpu) &&
12009             kvm_x86_ops.nested_ops->hv_timer_pending &&
12010             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12011                 return true;
12012
12013         return false;
12014 }
12015
12016 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12017 {
12018         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12019 }
12020
12021 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12022 {
12023         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12024                 return true;
12025
12026         return false;
12027 }
12028
12029 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12030 {
12031         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12032                 return true;
12033
12034         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12035                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12036                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12037                 return true;
12038
12039         return kvm_arch_dy_has_pending_interrupt(vcpu);
12040 }
12041
12042 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12043 {
12044         if (vcpu->arch.guest_state_protected)
12045                 return true;
12046
12047         return vcpu->arch.preempted_in_kernel;
12048 }
12049
12050 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12051 {
12052         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12053 }
12054
12055 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12056 {
12057         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12058 }
12059
12060 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12061 {
12062         /* Can't read the RIP when guest state is protected, just return 0 */
12063         if (vcpu->arch.guest_state_protected)
12064                 return 0;
12065
12066         if (is_64_bit_mode(vcpu))
12067                 return kvm_rip_read(vcpu);
12068         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12069                      kvm_rip_read(vcpu));
12070 }
12071 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12072
12073 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12074 {
12075         return kvm_get_linear_rip(vcpu) == linear_rip;
12076 }
12077 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12078
12079 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12080 {
12081         unsigned long rflags;
12082
12083         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12084         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12085                 rflags &= ~X86_EFLAGS_TF;
12086         return rflags;
12087 }
12088 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12089
12090 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12091 {
12092         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12093             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12094                 rflags |= X86_EFLAGS_TF;
12095         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12096 }
12097
12098 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12099 {
12100         __kvm_set_rflags(vcpu, rflags);
12101         kvm_make_request(KVM_REQ_EVENT, vcpu);
12102 }
12103 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12104
12105 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12106 {
12107         int r;
12108
12109         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12110               work->wakeup_all)
12111                 return;
12112
12113         r = kvm_mmu_reload(vcpu);
12114         if (unlikely(r))
12115                 return;
12116
12117         if (!vcpu->arch.mmu->direct_map &&
12118               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12119                 return;
12120
12121         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12122 }
12123
12124 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12125 {
12126         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12127
12128         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12129 }
12130
12131 static inline u32 kvm_async_pf_next_probe(u32 key)
12132 {
12133         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12134 }
12135
12136 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12137 {
12138         u32 key = kvm_async_pf_hash_fn(gfn);
12139
12140         while (vcpu->arch.apf.gfns[key] != ~0)
12141                 key = kvm_async_pf_next_probe(key);
12142
12143         vcpu->arch.apf.gfns[key] = gfn;
12144 }
12145
12146 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12147 {
12148         int i;
12149         u32 key = kvm_async_pf_hash_fn(gfn);
12150
12151         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12152                      (vcpu->arch.apf.gfns[key] != gfn &&
12153                       vcpu->arch.apf.gfns[key] != ~0); i++)
12154                 key = kvm_async_pf_next_probe(key);
12155
12156         return key;
12157 }
12158
12159 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12160 {
12161         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12162 }
12163
12164 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12165 {
12166         u32 i, j, k;
12167
12168         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12169
12170         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12171                 return;
12172
12173         while (true) {
12174                 vcpu->arch.apf.gfns[i] = ~0;
12175                 do {
12176                         j = kvm_async_pf_next_probe(j);
12177                         if (vcpu->arch.apf.gfns[j] == ~0)
12178                                 return;
12179                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12180                         /*
12181                          * k lies cyclically in ]i,j]
12182                          * |    i.k.j |
12183                          * |....j i.k.| or  |.k..j i...|
12184                          */
12185                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12186                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12187                 i = j;
12188         }
12189 }
12190
12191 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12192 {
12193         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12194
12195         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12196                                       sizeof(reason));
12197 }
12198
12199 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12200 {
12201         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12202
12203         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12204                                              &token, offset, sizeof(token));
12205 }
12206
12207 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12208 {
12209         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12210         u32 val;
12211
12212         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12213                                          &val, offset, sizeof(val)))
12214                 return false;
12215
12216         return !val;
12217 }
12218
12219 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12220 {
12221         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12222                 return false;
12223
12224         if (!kvm_pv_async_pf_enabled(vcpu) ||
12225             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12226                 return false;
12227
12228         return true;
12229 }
12230
12231 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12232 {
12233         if (unlikely(!lapic_in_kernel(vcpu) ||
12234                      kvm_event_needs_reinjection(vcpu) ||
12235                      vcpu->arch.exception.pending))
12236                 return false;
12237
12238         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12239                 return false;
12240
12241         /*
12242          * If interrupts are off we cannot even use an artificial
12243          * halt state.
12244          */
12245         return kvm_arch_interrupt_allowed(vcpu);
12246 }
12247
12248 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12249                                      struct kvm_async_pf *work)
12250 {
12251         struct x86_exception fault;
12252
12253         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12254         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12255
12256         if (kvm_can_deliver_async_pf(vcpu) &&
12257             !apf_put_user_notpresent(vcpu)) {
12258                 fault.vector = PF_VECTOR;
12259                 fault.error_code_valid = true;
12260                 fault.error_code = 0;
12261                 fault.nested_page_fault = false;
12262                 fault.address = work->arch.token;
12263                 fault.async_page_fault = true;
12264                 kvm_inject_page_fault(vcpu, &fault);
12265                 return true;
12266         } else {
12267                 /*
12268                  * It is not possible to deliver a paravirtualized asynchronous
12269                  * page fault, but putting the guest in an artificial halt state
12270                  * can be beneficial nevertheless: if an interrupt arrives, we
12271                  * can deliver it timely and perhaps the guest will schedule
12272                  * another process.  When the instruction that triggered a page
12273                  * fault is retried, hopefully the page will be ready in the host.
12274                  */
12275                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12276                 return false;
12277         }
12278 }
12279
12280 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12281                                  struct kvm_async_pf *work)
12282 {
12283         struct kvm_lapic_irq irq = {
12284                 .delivery_mode = APIC_DM_FIXED,
12285                 .vector = vcpu->arch.apf.vec
12286         };
12287
12288         if (work->wakeup_all)
12289                 work->arch.token = ~0; /* broadcast wakeup */
12290         else
12291                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12292         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12293
12294         if ((work->wakeup_all || work->notpresent_injected) &&
12295             kvm_pv_async_pf_enabled(vcpu) &&
12296             !apf_put_user_ready(vcpu, work->arch.token)) {
12297                 vcpu->arch.apf.pageready_pending = true;
12298                 kvm_apic_set_irq(vcpu, &irq, NULL);
12299         }
12300
12301         vcpu->arch.apf.halted = false;
12302         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12303 }
12304
12305 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12306 {
12307         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12308         if (!vcpu->arch.apf.pageready_pending)
12309                 kvm_vcpu_kick(vcpu);
12310 }
12311
12312 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12313 {
12314         if (!kvm_pv_async_pf_enabled(vcpu))
12315                 return true;
12316         else
12317                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12318 }
12319
12320 void kvm_arch_start_assignment(struct kvm *kvm)
12321 {
12322         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12323                 static_call_cond(kvm_x86_start_assignment)(kvm);
12324 }
12325 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12326
12327 void kvm_arch_end_assignment(struct kvm *kvm)
12328 {
12329         atomic_dec(&kvm->arch.assigned_device_count);
12330 }
12331 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12332
12333 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
12334 {
12335         return arch_atomic_read(&kvm->arch.assigned_device_count);
12336 }
12337 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12338
12339 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12340 {
12341         atomic_inc(&kvm->arch.noncoherent_dma_count);
12342 }
12343 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12344
12345 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12346 {
12347         atomic_dec(&kvm->arch.noncoherent_dma_count);
12348 }
12349 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12350
12351 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12352 {
12353         return atomic_read(&kvm->arch.noncoherent_dma_count);
12354 }
12355 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12356
12357 bool kvm_arch_has_irq_bypass(void)
12358 {
12359         return true;
12360 }
12361
12362 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12363                                       struct irq_bypass_producer *prod)
12364 {
12365         struct kvm_kernel_irqfd *irqfd =
12366                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12367         int ret;
12368
12369         irqfd->producer = prod;
12370         kvm_arch_start_assignment(irqfd->kvm);
12371         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12372                                          prod->irq, irqfd->gsi, 1);
12373
12374         if (ret)
12375                 kvm_arch_end_assignment(irqfd->kvm);
12376
12377         return ret;
12378 }
12379
12380 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12381                                       struct irq_bypass_producer *prod)
12382 {
12383         int ret;
12384         struct kvm_kernel_irqfd *irqfd =
12385                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12386
12387         WARN_ON(irqfd->producer != prod);
12388         irqfd->producer = NULL;
12389
12390         /*
12391          * When producer of consumer is unregistered, we change back to
12392          * remapped mode, so we can re-use the current implementation
12393          * when the irq is masked/disabled or the consumer side (KVM
12394          * int this case doesn't want to receive the interrupts.
12395         */
12396         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12397         if (ret)
12398                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12399                        " fails: %d\n", irqfd->consumer.token, ret);
12400
12401         kvm_arch_end_assignment(irqfd->kvm);
12402 }
12403
12404 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12405                                    uint32_t guest_irq, bool set)
12406 {
12407         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12408 }
12409
12410 bool kvm_vector_hashing_enabled(void)
12411 {
12412         return vector_hashing;
12413 }
12414
12415 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12416 {
12417         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12418 }
12419 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12420
12421
12422 int kvm_spec_ctrl_test_value(u64 value)
12423 {
12424         /*
12425          * test that setting IA32_SPEC_CTRL to given value
12426          * is allowed by the host processor
12427          */
12428
12429         u64 saved_value;
12430         unsigned long flags;
12431         int ret = 0;
12432
12433         local_irq_save(flags);
12434
12435         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12436                 ret = 1;
12437         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12438                 ret = 1;
12439         else
12440                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12441
12442         local_irq_restore(flags);
12443
12444         return ret;
12445 }
12446 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12447
12448 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12449 {
12450         struct x86_exception fault;
12451         u32 access = error_code &
12452                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12453
12454         if (!(error_code & PFERR_PRESENT_MASK) ||
12455             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12456                 /*
12457                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12458                  * tables probably do not match the TLB.  Just proceed
12459                  * with the error code that the processor gave.
12460                  */
12461                 fault.vector = PF_VECTOR;
12462                 fault.error_code_valid = true;
12463                 fault.error_code = error_code;
12464                 fault.nested_page_fault = false;
12465                 fault.address = gva;
12466         }
12467         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12468 }
12469 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12470
12471 /*
12472  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12473  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12474  * indicates whether exit to userspace is needed.
12475  */
12476 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12477                               struct x86_exception *e)
12478 {
12479         if (r == X86EMUL_PROPAGATE_FAULT) {
12480                 kvm_inject_emulated_page_fault(vcpu, e);
12481                 return 1;
12482         }
12483
12484         /*
12485          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12486          * while handling a VMX instruction KVM could've handled the request
12487          * correctly by exiting to userspace and performing I/O but there
12488          * doesn't seem to be a real use-case behind such requests, just return
12489          * KVM_EXIT_INTERNAL_ERROR for now.
12490          */
12491         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12492         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12493         vcpu->run->internal.ndata = 0;
12494
12495         return 0;
12496 }
12497 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12498
12499 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12500 {
12501         bool pcid_enabled;
12502         struct x86_exception e;
12503         struct {
12504                 u64 pcid;
12505                 u64 gla;
12506         } operand;
12507         int r;
12508
12509         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12510         if (r != X86EMUL_CONTINUE)
12511                 return kvm_handle_memory_failure(vcpu, r, &e);
12512
12513         if (operand.pcid >> 12 != 0) {
12514                 kvm_inject_gp(vcpu, 0);
12515                 return 1;
12516         }
12517
12518         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12519
12520         switch (type) {
12521         case INVPCID_TYPE_INDIV_ADDR:
12522                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12523                     is_noncanonical_address(operand.gla, vcpu)) {
12524                         kvm_inject_gp(vcpu, 0);
12525                         return 1;
12526                 }
12527                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12528                 return kvm_skip_emulated_instruction(vcpu);
12529
12530         case INVPCID_TYPE_SINGLE_CTXT:
12531                 if (!pcid_enabled && (operand.pcid != 0)) {
12532                         kvm_inject_gp(vcpu, 0);
12533                         return 1;
12534                 }
12535
12536                 kvm_invalidate_pcid(vcpu, operand.pcid);
12537                 return kvm_skip_emulated_instruction(vcpu);
12538
12539         case INVPCID_TYPE_ALL_NON_GLOBAL:
12540                 /*
12541                  * Currently, KVM doesn't mark global entries in the shadow
12542                  * page tables, so a non-global flush just degenerates to a
12543                  * global flush. If needed, we could optimize this later by
12544                  * keeping track of global entries in shadow page tables.
12545                  */
12546
12547                 fallthrough;
12548         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12549                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12550                 return kvm_skip_emulated_instruction(vcpu);
12551
12552         default:
12553                 BUG(); /* We have already checked above that type <= 3 */
12554         }
12555 }
12556 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12557
12558 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12559 {
12560         struct kvm_run *run = vcpu->run;
12561         struct kvm_mmio_fragment *frag;
12562         unsigned int len;
12563
12564         BUG_ON(!vcpu->mmio_needed);
12565
12566         /* Complete previous fragment */
12567         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12568         len = min(8u, frag->len);
12569         if (!vcpu->mmio_is_write)
12570                 memcpy(frag->data, run->mmio.data, len);
12571
12572         if (frag->len <= 8) {
12573                 /* Switch to the next fragment. */
12574                 frag++;
12575                 vcpu->mmio_cur_fragment++;
12576         } else {
12577                 /* Go forward to the next mmio piece. */
12578                 frag->data += len;
12579                 frag->gpa += len;
12580                 frag->len -= len;
12581         }
12582
12583         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12584                 vcpu->mmio_needed = 0;
12585
12586                 // VMG change, at this point, we're always done
12587                 // RIP has already been advanced
12588                 return 1;
12589         }
12590
12591         // More MMIO is needed
12592         run->mmio.phys_addr = frag->gpa;
12593         run->mmio.len = min(8u, frag->len);
12594         run->mmio.is_write = vcpu->mmio_is_write;
12595         if (run->mmio.is_write)
12596                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12597         run->exit_reason = KVM_EXIT_MMIO;
12598
12599         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12600
12601         return 0;
12602 }
12603
12604 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12605                           void *data)
12606 {
12607         int handled;
12608         struct kvm_mmio_fragment *frag;
12609
12610         if (!data)
12611                 return -EINVAL;
12612
12613         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12614         if (handled == bytes)
12615                 return 1;
12616
12617         bytes -= handled;
12618         gpa += handled;
12619         data += handled;
12620
12621         /*TODO: Check if need to increment number of frags */
12622         frag = vcpu->mmio_fragments;
12623         vcpu->mmio_nr_fragments = 1;
12624         frag->len = bytes;
12625         frag->gpa = gpa;
12626         frag->data = data;
12627
12628         vcpu->mmio_needed = 1;
12629         vcpu->mmio_cur_fragment = 0;
12630
12631         vcpu->run->mmio.phys_addr = gpa;
12632         vcpu->run->mmio.len = min(8u, frag->len);
12633         vcpu->run->mmio.is_write = 1;
12634         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12635         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12636
12637         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12638
12639         return 0;
12640 }
12641 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12642
12643 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12644                          void *data)
12645 {
12646         int handled;
12647         struct kvm_mmio_fragment *frag;
12648
12649         if (!data)
12650                 return -EINVAL;
12651
12652         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12653         if (handled == bytes)
12654                 return 1;
12655
12656         bytes -= handled;
12657         gpa += handled;
12658         data += handled;
12659
12660         /*TODO: Check if need to increment number of frags */
12661         frag = vcpu->mmio_fragments;
12662         vcpu->mmio_nr_fragments = 1;
12663         frag->len = bytes;
12664         frag->gpa = gpa;
12665         frag->data = data;
12666
12667         vcpu->mmio_needed = 1;
12668         vcpu->mmio_cur_fragment = 0;
12669
12670         vcpu->run->mmio.phys_addr = gpa;
12671         vcpu->run->mmio.len = min(8u, frag->len);
12672         vcpu->run->mmio.is_write = 0;
12673         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12674
12675         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12676
12677         return 0;
12678 }
12679 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12680
12681 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12682                            unsigned int port);
12683
12684 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12685 {
12686         int size = vcpu->arch.pio.size;
12687         int port = vcpu->arch.pio.port;
12688
12689         vcpu->arch.pio.count = 0;
12690         if (vcpu->arch.sev_pio_count)
12691                 return kvm_sev_es_outs(vcpu, size, port);
12692         return 1;
12693 }
12694
12695 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12696                            unsigned int port)
12697 {
12698         for (;;) {
12699                 unsigned int count =
12700                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12701                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12702
12703                 /* memcpy done already by emulator_pio_out.  */
12704                 vcpu->arch.sev_pio_count -= count;
12705                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12706                 if (!ret)
12707                         break;
12708
12709                 /* Emulation done by the kernel.  */
12710                 if (!vcpu->arch.sev_pio_count)
12711                         return 1;
12712         }
12713
12714         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12715         return 0;
12716 }
12717
12718 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12719                           unsigned int port);
12720
12721 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12722 {
12723         unsigned count = vcpu->arch.pio.count;
12724         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12725         vcpu->arch.sev_pio_count -= count;
12726         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12727 }
12728
12729 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12730 {
12731         int size = vcpu->arch.pio.size;
12732         int port = vcpu->arch.pio.port;
12733
12734         advance_sev_es_emulated_ins(vcpu);
12735         if (vcpu->arch.sev_pio_count)
12736                 return kvm_sev_es_ins(vcpu, size, port);
12737         return 1;
12738 }
12739
12740 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12741                           unsigned int port)
12742 {
12743         for (;;) {
12744                 unsigned int count =
12745                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12746                 if (!__emulator_pio_in(vcpu, size, port, count))
12747                         break;
12748
12749                 /* Emulation done by the kernel.  */
12750                 advance_sev_es_emulated_ins(vcpu);
12751                 if (!vcpu->arch.sev_pio_count)
12752                         return 1;
12753         }
12754
12755         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12756         return 0;
12757 }
12758
12759 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12760                          unsigned int port, void *data,  unsigned int count,
12761                          int in)
12762 {
12763         vcpu->arch.sev_pio_data = data;
12764         vcpu->arch.sev_pio_count = count;
12765         return in ? kvm_sev_es_ins(vcpu, size, port)
12766                   : kvm_sev_es_outs(vcpu, size, port);
12767 }
12768 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12769
12770 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12771 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12772 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12773 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12774 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12775 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12776 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12777 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12778 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12779 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12780 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12781 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12782 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12783 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12784 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12785 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12786 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12787 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12788 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12789 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12790 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12791 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12792 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12793 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12794 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12795 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12796 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
12797
12798 static int __init kvm_x86_init(void)
12799 {
12800         kvm_mmu_x86_module_init();
12801         return 0;
12802 }
12803 module_init(kvm_x86_init);
12804
12805 static void __exit kvm_x86_exit(void)
12806 {
12807         /*
12808          * If module_init() is implemented, module_exit() must also be
12809          * implemented to allow module unload.
12810          */
12811 }
12812 module_exit(kvm_x86_exit);