arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define CREATE_TRACE_POINTS
  72 #include "trace.h"
  73
  74 #define MAX_IO_MSRS 256
  75 #define KVM_MAX_MCE_BANKS 32
  76 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  78
  79 #define emul_to_vcpu(ctxt) \
  80         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  81
  82 /* EFER defaults:
  83  * - enable syscall per default because its emulated by KVM
  84  * - enable LME and LMA per default on 64 bit KVM
  85  */
  86 #ifdef CONFIG_X86_64
  87 static
  88 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  89 #else
  90 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  91 #endif
  92
  93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  95
  96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  97                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  98
  99 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 100 static void process_nmi(struct kvm_vcpu *vcpu);
 101 static void enter_smm(struct kvm_vcpu *vcpu);
 102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 103
 104 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 105 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 106
 107 static bool __read_mostly ignore_msrs = 0;
 108 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 109
 110 unsigned int min_timer_period_us = 500;
 111 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 112
 113 static bool __read_mostly kvmclock_periodic_sync = true;
 114 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 115
 116 bool __read_mostly kvm_has_tsc_control;
 117 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 118 u32  __read_mostly kvm_max_guest_tsc_khz;
 119 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 120 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 121 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 122 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 124 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 125 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 126
 127 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 128 static u32 __read_mostly tsc_tolerance_ppm = 250;
 129 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 130
 131 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 132 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 133 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 134
 135 static bool __read_mostly vector_hashing = true;
 136 module_param(vector_hashing, bool, S_IRUGO);
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "req_event", VCPU_STAT(req_event) },
 184         { "l1d_flush", VCPU_STAT(l1d_flush) },
 185         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 186         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 187         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 188         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 189         { "mmu_flooded", VM_STAT(mmu_flooded) },
 190         { "mmu_recycled", VM_STAT(mmu_recycled) },
 191         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 192         { "mmu_unsync", VM_STAT(mmu_unsync) },
 193         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 194         { "largepages", VM_STAT(lpages) },
 195         { "max_mmu_page_hash_collisions",
 196                 VM_STAT(max_mmu_page_hash_collisions) },
 197         { NULL }
 198 };
 199
 200 u64 __read_mostly host_xcr0;
 201
 202 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 203
 204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 205 {
 206         int i;
 207         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 208                 vcpu->arch.apf.gfns[i] = ~0;
 209 }
 210
 211 static void kvm_on_user_return(struct user_return_notifier *urn)
 212 {
 213         unsigned slot;
 214         struct kvm_shared_msrs *locals
 215                 = container_of(urn, struct kvm_shared_msrs, urn);
 216         struct kvm_shared_msr_values *values;
 217         unsigned long flags;
 218
 219         /*
 220          * Disabling irqs at this point since the following code could be
 221          * interrupted and executed through kvm_arch_hardware_disable()
 222          */
 223         local_irq_save(flags);
 224         if (locals->registered) {
 225                 locals->registered = false;
 226                 user_return_notifier_unregister(urn);
 227         }
 228         local_irq_restore(flags);
 229         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 230                 values = &locals->values[slot];
 231                 if (values->host != values->curr) {
 232                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 233                         values->curr = values->host;
 234                 }
 235         }
 236 }
 237
 238 static void shared_msr_update(unsigned slot, u32 msr)
 239 {
 240         u64 value;
 241         unsigned int cpu = smp_processor_id();
 242         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 243
 244         /* only read, and nobody should modify it at this time,
 245          * so don't need lock */
 246         if (slot >= shared_msrs_global.nr) {
 247                 printk(KERN_ERR "kvm: invalid MSR slot!");
 248                 return;
 249         }
 250         rdmsrl_safe(msr, &value);
 251         smsr->values[slot].host = value;
 252         smsr->values[slot].curr = value;
 253 }
 254
 255 void kvm_define_shared_msr(unsigned slot, u32 msr)
 256 {
 257         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 258         shared_msrs_global.msrs[slot] = msr;
 259         if (slot >= shared_msrs_global.nr)
 260                 shared_msrs_global.nr = slot + 1;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 263
 264 static void kvm_shared_msr_cpu_online(void)
 265 {
 266         unsigned i;
 267
 268         for (i = 0; i < shared_msrs_global.nr; ++i)
 269                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 270 }
 271
 272 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 273 {
 274         unsigned int cpu = smp_processor_id();
 275         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 276         int err;
 277
 278         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 279                 return 0;
 280         smsr->values[slot].curr = value;
 281         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 282         if (err)
 283                 return 1;
 284
 285         if (!smsr->registered) {
 286                 smsr->urn.on_user_return = kvm_on_user_return;
 287                 user_return_notifier_register(&smsr->urn);
 288                 smsr->registered = true;
 289         }
 290         return 0;
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 293
 294 static void drop_user_return_notifiers(void)
 295 {
 296         unsigned int cpu = smp_processor_id();
 297         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 298
 299         if (smsr->registered)
 300                 kvm_on_user_return(&smsr->urn);
 301 }
 302
 303 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 304 {
 305         return vcpu->arch.apic_base;
 306 }
 307 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 308
 309 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 310 {
 311         u64 old_state = vcpu->arch.apic_base &
 312                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 313         u64 new_state = msr_info->data &
 314                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 315         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 316                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 317
 318         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 319                 return 1;
 320         if (!msr_info->host_initiated &&
 321             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 322               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 323              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 324               old_state == 0)))
 325                 return 1;
 326
 327         kvm_lapic_set_base(vcpu, msr_info->data);
 328         return 0;
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 331
 332 asmlinkage __visible void kvm_spurious_fault(void)
 333 {
 334         /* Fault while not rebooting.  We want the trace. */
 335         BUG();
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 338
 339 #define EXCPT_BENIGN            0
 340 #define EXCPT_CONTRIBUTORY      1
 341 #define EXCPT_PF                2
 342
 343 static int exception_class(int vector)
 344 {
 345         switch (vector) {
 346         case PF_VECTOR:
 347                 return EXCPT_PF;
 348         case DE_VECTOR:
 349         case TS_VECTOR:
 350         case NP_VECTOR:
 351         case SS_VECTOR:
 352         case GP_VECTOR:
 353                 return EXCPT_CONTRIBUTORY;
 354         default:
 355                 break;
 356         }
 357         return EXCPT_BENIGN;
 358 }
 359
 360 #define EXCPT_FAULT             0
 361 #define EXCPT_TRAP              1
 362 #define EXCPT_ABORT             2
 363 #define EXCPT_INTERRUPT         3
 364
 365 static int exception_type(int vector)
 366 {
 367         unsigned int mask;
 368
 369         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 370                 return EXCPT_INTERRUPT;
 371
 372         mask = 1 << vector;
 373
 374         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 375         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 376                 return EXCPT_TRAP;
 377
 378         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 379                 return EXCPT_ABORT;
 380
 381         /* Reserved exceptions will result in fault */
 382         return EXCPT_FAULT;
 383 }
 384
 385 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 386                 unsigned nr, bool has_error, u32 error_code,
 387                 bool reinject)
 388 {
 389         u32 prev_nr;
 390         int class1, class2;
 391
 392         kvm_make_request(KVM_REQ_EVENT, vcpu);
 393
 394         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 395         queue:
 396                 if (has_error && !is_protmode(vcpu))
 397                         has_error = false;
 398                 if (reinject) {
 399                         /*
 400                          * On vmentry, vcpu->arch.exception.pending is only
 401                          * true if an event injection was blocked by
 402                          * nested_run_pending.  In that case, however,
 403                          * vcpu_enter_guest requests an immediate exit,
 404                          * and the guest shouldn't proceed far enough to
 405                          * need reinjection.
 406                          */
 407                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 408                         vcpu->arch.exception.injected = true;
 409                 } else {
 410                         vcpu->arch.exception.pending = true;
 411                         vcpu->arch.exception.injected = false;
 412                 }
 413                 vcpu->arch.exception.has_error_code = has_error;
 414                 vcpu->arch.exception.nr = nr;
 415                 vcpu->arch.exception.error_code = error_code;
 416                 return;
 417         }
 418
 419         /* to check exception */
 420         prev_nr = vcpu->arch.exception.nr;
 421         if (prev_nr == DF_VECTOR) {
 422                 /* triple fault -> shutdown */
 423                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 424                 return;
 425         }
 426         class1 = exception_class(prev_nr);
 427         class2 = exception_class(nr);
 428         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 429                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 430                 /*
 431                  * Generate double fault per SDM Table 5-5.  Set
 432                  * exception.pending = true so that the double fault
 433                  * can trigger a nested vmexit.
 434                  */
 435                 vcpu->arch.exception.pending = true;
 436                 vcpu->arch.exception.injected = false;
 437                 vcpu->arch.exception.has_error_code = true;
 438                 vcpu->arch.exception.nr = DF_VECTOR;
 439                 vcpu->arch.exception.error_code = 0;
 440         } else
 441                 /* replace previous exception with a new one in a hope
 442                    that instruction re-execution will regenerate lost
 443                    exception */
 444                 goto queue;
 445 }
 446
 447 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 448 {
 449         kvm_multiple_exception(vcpu, nr, false, 0, false);
 450 }
 451 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 452
 453 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 454 {
 455         kvm_multiple_exception(vcpu, nr, false, 0, true);
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 458
 459 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 460 {
 461         if (err)
 462                 kvm_inject_gp(vcpu, 0);
 463         else
 464                 return kvm_skip_emulated_instruction(vcpu);
 465
 466         return 1;
 467 }
 468 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 469
 470 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 471 {
 472         ++vcpu->stat.pf_guest;
 473         vcpu->arch.exception.nested_apf =
 474                 is_guest_mode(vcpu) && fault->async_page_fault;
 475         if (vcpu->arch.exception.nested_apf)
 476                 vcpu->arch.apf.nested_apf_token = fault->address;
 477         else
 478                 vcpu->arch.cr2 = fault->address;
 479         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 482
 483 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 484 {
 485         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 486                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 487         else
 488                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 489
 490         return fault->nested_page_fault;
 491 }
 492
 493 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 494 {
 495         atomic_inc(&vcpu->arch.nmi_queued);
 496         kvm_make_request(KVM_REQ_NMI, vcpu);
 497 }
 498 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 499
 500 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 501 {
 502         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 503 }
 504 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 505
 506 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 507 {
 508         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 509 }
 510 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 511
 512 /*
 513  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 514  * a #GP and return false.
 515  */
 516 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 517 {
 518         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 519                 return true;
 520         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 521         return false;
 522 }
 523 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 524
 525 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 526 {
 527         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 528                 return true;
 529
 530         kvm_queue_exception(vcpu, UD_VECTOR);
 531         return false;
 532 }
 533 EXPORT_SYMBOL_GPL(kvm_require_dr);
 534
 535 /*
 536  * This function will be used to read from the physical memory of the currently
 537  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 538  * can read from guest physical or from the guest's guest physical memory.
 539  */
 540 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 541                             gfn_t ngfn, void *data, int offset, int len,
 542                             u32 access)
 543 {
 544         struct x86_exception exception;
 545         gfn_t real_gfn;
 546         gpa_t ngpa;
 547
 548         ngpa     = gfn_to_gpa(ngfn);
 549         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 550         if (real_gfn == UNMAPPED_GVA)
 551                 return -EFAULT;
 552
 553         real_gfn = gpa_to_gfn(real_gfn);
 554
 555         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 556 }
 557 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 558
 559 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 560                                void *data, int offset, int len, u32 access)
 561 {
 562         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 563                                        data, offset, len, access);
 564 }
 565
 566 /*
 567  * Load the pae pdptrs.  Return true is they are all valid.
 568  */
 569 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 570 {
 571         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 572         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 573         int i;
 574         int ret;
 575         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 576
 577         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 578                                       offset * sizeof(u64), sizeof(pdpte),
 579                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 580         if (ret < 0) {
 581                 ret = 0;
 582                 goto out;
 583         }
 584         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 585                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 586                     (pdpte[i] &
 587                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 588                         ret = 0;
 589                         goto out;
 590                 }
 591         }
 592         ret = 1;
 593
 594         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 595         __set_bit(VCPU_EXREG_PDPTR,
 596                   (unsigned long *)&vcpu->arch.regs_avail);
 597         __set_bit(VCPU_EXREG_PDPTR,
 598                   (unsigned long *)&vcpu->arch.regs_dirty);
 599 out:
 600
 601         return ret;
 602 }
 603 EXPORT_SYMBOL_GPL(load_pdptrs);
 604
 605 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 606 {
 607         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 608         bool changed = true;
 609         int offset;
 610         gfn_t gfn;
 611         int r;
 612
 613         if (is_long_mode(vcpu) || !is_pae(vcpu))
 614                 return false;
 615
 616         if (!test_bit(VCPU_EXREG_PDPTR,
 617                       (unsigned long *)&vcpu->arch.regs_avail))
 618                 return true;
 619
 620         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 621         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 622         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 623                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 624         if (r < 0)
 625                 goto out;
 626         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 627 out:
 628
 629         return changed;
 630 }
 631 EXPORT_SYMBOL_GPL(pdptrs_changed);
 632
 633 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 634 {
 635         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 636         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 637
 638         cr0 |= X86_CR0_ET;
 639
 640 #ifdef CONFIG_X86_64
 641         if (cr0 & 0xffffffff00000000UL)
 642                 return 1;
 643 #endif
 644
 645         cr0 &= ~CR0_RESERVED_BITS;
 646
 647         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 648                 return 1;
 649
 650         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 651                 return 1;
 652
 653         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 654 #ifdef CONFIG_X86_64
 655                 if ((vcpu->arch.efer & EFER_LME)) {
 656                         int cs_db, cs_l;
 657
 658                         if (!is_pae(vcpu))
 659                                 return 1;
 660                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 661                         if (cs_l)
 662                                 return 1;
 663                 } else
 664 #endif
 665                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 666                                                  kvm_read_cr3(vcpu)))
 667                         return 1;
 668         }
 669
 670         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 671                 return 1;
 672
 673         kvm_x86_ops->set_cr0(vcpu, cr0);
 674
 675         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 676                 kvm_clear_async_pf_completion_queue(vcpu);
 677                 kvm_async_pf_hash_reset(vcpu);
 678         }
 679
 680         if ((cr0 ^ old_cr0) & update_bits)
 681                 kvm_mmu_reset_context(vcpu);
 682
 683         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 684             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 685             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 686                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 687
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 691
 692 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 693 {
 694         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 695 }
 696 EXPORT_SYMBOL_GPL(kvm_lmsw);
 697
 698 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 699 {
 700         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 701                         !vcpu->guest_xcr0_loaded) {
 702                 /* kvm_set_xcr() also depends on this */
 703                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 704                 vcpu->guest_xcr0_loaded = 1;
 705         }
 706 }
 707
 708 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 709 {
 710         if (vcpu->guest_xcr0_loaded) {
 711                 if (vcpu->arch.xcr0 != host_xcr0)
 712                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 713                 vcpu->guest_xcr0_loaded = 0;
 714         }
 715 }
 716
 717 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 718 {
 719         u64 xcr0 = xcr;
 720         u64 old_xcr0 = vcpu->arch.xcr0;
 721         u64 valid_bits;
 722
 723         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 724         if (index != XCR_XFEATURE_ENABLED_MASK)
 725                 return 1;
 726         if (!(xcr0 & XFEATURE_MASK_FP))
 727                 return 1;
 728         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 729                 return 1;
 730
 731         /*
 732          * Do not allow the guest to set bits that we do not support
 733          * saving.  However, xcr0 bit 0 is always set, even if the
 734          * emulated CPU does not support XSAVE (see fx_init).
 735          */
 736         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 737         if (xcr0 & ~valid_bits)
 738                 return 1;
 739
 740         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 741             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 742                 return 1;
 743
 744         if (xcr0 & XFEATURE_MASK_AVX512) {
 745                 if (!(xcr0 & XFEATURE_MASK_YMM))
 746                         return 1;
 747                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 748                         return 1;
 749         }
 750         vcpu->arch.xcr0 = xcr0;
 751
 752         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 753                 kvm_update_cpuid(vcpu);
 754         return 0;
 755 }
 756
 757 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 758 {
 759         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 760             __kvm_set_xcr(vcpu, index, xcr)) {
 761                 kvm_inject_gp(vcpu, 0);
 762                 return 1;
 763         }
 764         return 0;
 765 }
 766 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 767
 768 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 769 {
 770         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 771         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 772                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 773
 774         if (cr4 & CR4_RESERVED_BITS)
 775                 return 1;
 776
 777         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 778                 return 1;
 779
 780         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 781                 return 1;
 782
 783         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 784                 return 1;
 785
 786         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 787                 return 1;
 788
 789         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 790                 return 1;
 791
 792         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 793                 return 1;
 794
 795         if (is_long_mode(vcpu)) {
 796                 if (!(cr4 & X86_CR4_PAE))
 797                         return 1;
 798         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 799                    && ((cr4 ^ old_cr4) & pdptr_bits)
 800                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 801                                    kvm_read_cr3(vcpu)))
 802                 return 1;
 803
 804         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 805                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 806                         return 1;
 807
 808                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 809                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 810                         return 1;
 811         }
 812
 813         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 814                 return 1;
 815
 816         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 817             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 818                 kvm_mmu_reset_context(vcpu);
 819
 820         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 821                 kvm_update_cpuid(vcpu);
 822
 823         return 0;
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 826
 827 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 828 {
 829 #ifdef CONFIG_X86_64
 830         cr3 &= ~CR3_PCID_INVD;
 831 #endif
 832
 833         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 834                 kvm_mmu_sync_roots(vcpu);
 835                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 836                 return 0;
 837         }
 838
 839         if (is_long_mode(vcpu) &&
 840             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 841                 return 1;
 842         else if (is_pae(vcpu) && is_paging(vcpu) &&
 843                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 844                 return 1;
 845
 846         vcpu->arch.cr3 = cr3;
 847         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 848         kvm_mmu_new_cr3(vcpu);
 849         return 0;
 850 }
 851 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 852
 853 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 854 {
 855         if (cr8 & CR8_RESERVED_BITS)
 856                 return 1;
 857         if (lapic_in_kernel(vcpu))
 858                 kvm_lapic_set_tpr(vcpu, cr8);
 859         else
 860                 vcpu->arch.cr8 = cr8;
 861         return 0;
 862 }
 863 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 864
 865 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 866 {
 867         if (lapic_in_kernel(vcpu))
 868                 return kvm_lapic_get_cr8(vcpu);
 869         else
 870                 return vcpu->arch.cr8;
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 873
 874 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 875 {
 876         int i;
 877
 878         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 879                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 880                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 881                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 882         }
 883 }
 884
 885 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 886 {
 887         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 888                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 889 }
 890
 891 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 892 {
 893         unsigned long dr7;
 894
 895         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 896                 dr7 = vcpu->arch.guest_debug_dr7;
 897         else
 898                 dr7 = vcpu->arch.dr7;
 899         kvm_x86_ops->set_dr7(vcpu, dr7);
 900         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 901         if (dr7 & DR7_BP_EN_MASK)
 902                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 903 }
 904
 905 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 906 {
 907         u64 fixed = DR6_FIXED_1;
 908
 909         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 910                 fixed |= DR6_RTM;
 911         return fixed;
 912 }
 913
 914 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 915 {
 916         switch (dr) {
 917         case 0 ... 3:
 918                 vcpu->arch.db[dr] = val;
 919                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 920                         vcpu->arch.eff_db[dr] = val;
 921                 break;
 922         case 4:
 923                 /* fall through */
 924         case 6:
 925                 if (val & 0xffffffff00000000ULL)
 926                         return -1; /* #GP */
 927                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 928                 kvm_update_dr6(vcpu);
 929                 break;
 930         case 5:
 931                 /* fall through */
 932         default: /* 7 */
 933                 if (val & 0xffffffff00000000ULL)
 934                         return -1; /* #GP */
 935                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 936                 kvm_update_dr7(vcpu);
 937                 break;
 938         }
 939
 940         return 0;
 941 }
 942
 943 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 944 {
 945         if (__kvm_set_dr(vcpu, dr, val)) {
 946                 kvm_inject_gp(vcpu, 0);
 947                 return 1;
 948         }
 949         return 0;
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_set_dr);
 952
 953 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 954 {
 955         switch (dr) {
 956         case 0 ... 3:
 957                 *val = vcpu->arch.db[dr];
 958                 break;
 959         case 4:
 960                 /* fall through */
 961         case 6:
 962                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 963                         *val = vcpu->arch.dr6;
 964                 else
 965                         *val = kvm_x86_ops->get_dr6(vcpu);
 966                 break;
 967         case 5:
 968                 /* fall through */
 969         default: /* 7 */
 970                 *val = vcpu->arch.dr7;
 971                 break;
 972         }
 973         return 0;
 974 }
 975 EXPORT_SYMBOL_GPL(kvm_get_dr);
 976
 977 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 978 {
 979         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 980         u64 data;
 981         int err;
 982
 983         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 984         if (err)
 985                 return err;
 986         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 987         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 988         return err;
 989 }
 990 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 991
 992 /*
 993  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 994  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 995  *
 996  * This list is modified at module load time to reflect the
 997  * capabilities of the host cpu. This capabilities test skips MSRs that are
 998  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 999  * may depend on host virtualization features rather than host cpu features.
1000  */
1001
1002 static u32 msrs_to_save[] = {
1003         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1004         MSR_STAR,
1005 #ifdef CONFIG_X86_64
1006         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1007 #endif
1008         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1009         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1010         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1011 };
1012
1013 static unsigned num_msrs_to_save;
1014
1015 static u32 emulated_msrs[] = {
1016         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1017         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1018         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1019         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1020         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1021         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1022         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1023         HV_X64_MSR_RESET,
1024         HV_X64_MSR_VP_INDEX,
1025         HV_X64_MSR_VP_RUNTIME,
1026         HV_X64_MSR_SCONTROL,
1027         HV_X64_MSR_STIMER0_CONFIG,
1028         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1029         MSR_KVM_PV_EOI_EN,
1030
1031         MSR_IA32_TSC_ADJUST,
1032         MSR_IA32_TSCDEADLINE,
1033         MSR_IA32_MISC_ENABLE,
1034         MSR_IA32_MCG_STATUS,
1035         MSR_IA32_MCG_CTL,
1036         MSR_IA32_MCG_EXT_CTL,
1037         MSR_IA32_SMBASE,
1038         MSR_PLATFORM_INFO,
1039         MSR_MISC_FEATURES_ENABLES,
1040         MSR_AMD64_VIRT_SPEC_CTRL,
1041 };
1042
1043 static unsigned num_emulated_msrs;
1044
1045 /*
1046  * List of msr numbers which are used to expose MSR-based features that
1047  * can be used by a hypervisor to validate requested CPU features.
1048  */
1049 static u32 msr_based_features[] = {
1050         MSR_F10H_DECFG,
1051         MSR_IA32_UCODE_REV,
1052         MSR_IA32_ARCH_CAPABILITIES,
1053 };
1054
1055 static unsigned int num_msr_based_features;
1056
1057 u64 kvm_get_arch_capabilities(void)
1058 {
1059         u64 data;
1060
1061         rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1062
1063         /*
1064          * If we're doing cache flushes (either "always" or "cond")
1065          * we will do one whenever the guest does a vmlaunch/vmresume.
1066          * If an outer hypervisor is doing the cache flush for us
1067          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1068          * capability to the guest too, and if EPT is disabled we're not
1069          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1070          * require a nested hypervisor to do a flush of its own.
1071          */
1072         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1073                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1074
1075         return data;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1078
1079 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1080 {
1081         switch (msr->index) {
1082         case MSR_IA32_ARCH_CAPABILITIES:
1083                 msr->data = kvm_get_arch_capabilities();
1084                 break;
1085         case MSR_IA32_UCODE_REV:
1086                 rdmsrl_safe(msr->index, &msr->data);
1087                 break;
1088         default:
1089                 if (kvm_x86_ops->get_msr_feature(msr))
1090                         return 1;
1091         }
1092         return 0;
1093 }
1094
1095 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1096 {
1097         struct kvm_msr_entry msr;
1098         int r;
1099
1100         msr.index = index;
1101         r = kvm_get_msr_feature(&msr);
1102         if (r)
1103                 return r;
1104
1105         *data = msr.data;
1106
1107         return 0;
1108 }
1109
1110 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1111 {
1112         if (efer & efer_reserved_bits)
1113                 return false;
1114
1115         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1116                         return false;
1117
1118         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1119                         return false;
1120
1121         return true;
1122 }
1123 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1124
1125 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1126 {
1127         u64 old_efer = vcpu->arch.efer;
1128
1129         if (!kvm_valid_efer(vcpu, efer))
1130                 return 1;
1131
1132         if (is_paging(vcpu)
1133             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1134                 return 1;
1135
1136         efer &= ~EFER_LMA;
1137         efer |= vcpu->arch.efer & EFER_LMA;
1138
1139         kvm_x86_ops->set_efer(vcpu, efer);
1140
1141         /* Update reserved bits */
1142         if ((efer ^ old_efer) & EFER_NX)
1143                 kvm_mmu_reset_context(vcpu);
1144
1145         return 0;
1146 }
1147
1148 void kvm_enable_efer_bits(u64 mask)
1149 {
1150        efer_reserved_bits &= ~mask;
1151 }
1152 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1153
1154 /*
1155  * Writes msr value into into the appropriate "register".
1156  * Returns 0 on success, non-0 otherwise.
1157  * Assumes vcpu_load() was already called.
1158  */
1159 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1160 {
1161         switch (msr->index) {
1162         case MSR_FS_BASE:
1163         case MSR_GS_BASE:
1164         case MSR_KERNEL_GS_BASE:
1165         case MSR_CSTAR:
1166         case MSR_LSTAR:
1167                 if (is_noncanonical_address(msr->data, vcpu))
1168                         return 1;
1169                 break;
1170         case MSR_IA32_SYSENTER_EIP:
1171         case MSR_IA32_SYSENTER_ESP:
1172                 /*
1173                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1174                  * non-canonical address is written on Intel but not on
1175                  * AMD (which ignores the top 32-bits, because it does
1176                  * not implement 64-bit SYSENTER).
1177                  *
1178                  * 64-bit code should hence be able to write a non-canonical
1179                  * value on AMD.  Making the address canonical ensures that
1180                  * vmentry does not fail on Intel after writing a non-canonical
1181                  * value, and that something deterministic happens if the guest
1182                  * invokes 64-bit SYSENTER.
1183                  */
1184                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1185         }
1186         return kvm_x86_ops->set_msr(vcpu, msr);
1187 }
1188 EXPORT_SYMBOL_GPL(kvm_set_msr);
1189
1190 /*
1191  * Adapt set_msr() to msr_io()'s calling convention
1192  */
1193 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1194 {
1195         struct msr_data msr;
1196         int r;
1197
1198         msr.index = index;
1199         msr.host_initiated = true;
1200         r = kvm_get_msr(vcpu, &msr);
1201         if (r)
1202                 return r;
1203
1204         *data = msr.data;
1205         return 0;
1206 }
1207
1208 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1209 {
1210         struct msr_data msr;
1211
1212         msr.data = *data;
1213         msr.index = index;
1214         msr.host_initiated = true;
1215         return kvm_set_msr(vcpu, &msr);
1216 }
1217
1218 #ifdef CONFIG_X86_64
1219 struct pvclock_gtod_data {
1220         seqcount_t      seq;
1221
1222         struct { /* extract of a clocksource struct */
1223                 int vclock_mode;
1224                 u64     cycle_last;
1225                 u64     mask;
1226                 u32     mult;
1227                 u32     shift;
1228         } clock;
1229
1230         u64             boot_ns;
1231         u64             nsec_base;
1232         u64             wall_time_sec;
1233 };
1234
1235 static struct pvclock_gtod_data pvclock_gtod_data;
1236
1237 static void update_pvclock_gtod(struct timekeeper *tk)
1238 {
1239         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1240         u64 boot_ns;
1241
1242         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1243
1244         write_seqcount_begin(&vdata->seq);
1245
1246         /* copy pvclock gtod data */
1247         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1248         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1249         vdata->clock.mask               = tk->tkr_mono.mask;
1250         vdata->clock.mult               = tk->tkr_mono.mult;
1251         vdata->clock.shift              = tk->tkr_mono.shift;
1252
1253         vdata->boot_ns                  = boot_ns;
1254         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1255
1256         vdata->wall_time_sec            = tk->xtime_sec;
1257
1258         write_seqcount_end(&vdata->seq);
1259 }
1260 #endif
1261
1262 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1263 {
1264         /*
1265          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1266          * vcpu_enter_guest.  This function is only called from
1267          * the physical CPU that is running vcpu.
1268          */
1269         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1270 }
1271
1272 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1273 {
1274         int version;
1275         int r;
1276         struct pvclock_wall_clock wc;
1277         struct timespec64 boot;
1278
1279         if (!wall_clock)
1280                 return;
1281
1282         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1283         if (r)
1284                 return;
1285
1286         if (version & 1)
1287                 ++version;  /* first time write, random junk */
1288
1289         ++version;
1290
1291         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1292                 return;
1293
1294         /*
1295          * The guest calculates current wall clock time by adding
1296          * system time (updated by kvm_guest_time_update below) to the
1297          * wall clock specified here.  guest system time equals host
1298          * system time for us, thus we must fill in host boot time here.
1299          */
1300         getboottime64(&boot);
1301
1302         if (kvm->arch.kvmclock_offset) {
1303                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1304                 boot = timespec64_sub(boot, ts);
1305         }
1306         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1307         wc.nsec = boot.tv_nsec;
1308         wc.version = version;
1309
1310         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1311
1312         version++;
1313         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1314 }
1315
1316 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1317 {
1318         do_shl32_div32(dividend, divisor);
1319         return dividend;
1320 }
1321
1322 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1323                                s8 *pshift, u32 *pmultiplier)
1324 {
1325         uint64_t scaled64;
1326         int32_t  shift = 0;
1327         uint64_t tps64;
1328         uint32_t tps32;
1329
1330         tps64 = base_hz;
1331         scaled64 = scaled_hz;
1332         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1333                 tps64 >>= 1;
1334                 shift--;
1335         }
1336
1337         tps32 = (uint32_t)tps64;
1338         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1339                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1340                         scaled64 >>= 1;
1341                 else
1342                         tps32 <<= 1;
1343                 shift++;
1344         }
1345
1346         *pshift = shift;
1347         *pmultiplier = div_frac(scaled64, tps32);
1348
1349         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1350                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1351 }
1352
1353 #ifdef CONFIG_X86_64
1354 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1355 #endif
1356
1357 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1358 static unsigned long max_tsc_khz;
1359
1360 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1361 {
1362         u64 v = (u64)khz * (1000000 + ppm);
1363         do_div(v, 1000000);
1364         return v;
1365 }
1366
1367 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1368 {
1369         u64 ratio;
1370
1371         /* Guest TSC same frequency as host TSC? */
1372         if (!scale) {
1373                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1374                 return 0;
1375         }
1376
1377         /* TSC scaling supported? */
1378         if (!kvm_has_tsc_control) {
1379                 if (user_tsc_khz > tsc_khz) {
1380                         vcpu->arch.tsc_catchup = 1;
1381                         vcpu->arch.tsc_always_catchup = 1;
1382                         return 0;
1383                 } else {
1384                         WARN(1, "user requested TSC rate below hardware speed\n");
1385                         return -1;
1386                 }
1387         }
1388
1389         /* TSC scaling required  - calculate ratio */
1390         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1391                                 user_tsc_khz, tsc_khz);
1392
1393         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1394                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1395                           user_tsc_khz);
1396                 return -1;
1397         }
1398
1399         vcpu->arch.tsc_scaling_ratio = ratio;
1400         return 0;
1401 }
1402
1403 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1404 {
1405         u32 thresh_lo, thresh_hi;
1406         int use_scaling = 0;
1407
1408         /* tsc_khz can be zero if TSC calibration fails */
1409         if (user_tsc_khz == 0) {
1410                 /* set tsc_scaling_ratio to a safe value */
1411                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1412                 return -1;
1413         }
1414
1415         /* Compute a scale to convert nanoseconds in TSC cycles */
1416         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1417                            &vcpu->arch.virtual_tsc_shift,
1418                            &vcpu->arch.virtual_tsc_mult);
1419         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1420
1421         /*
1422          * Compute the variation in TSC rate which is acceptable
1423          * within the range of tolerance and decide if the
1424          * rate being applied is within that bounds of the hardware
1425          * rate.  If so, no scaling or compensation need be done.
1426          */
1427         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1428         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1429         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1430                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1431                 use_scaling = 1;
1432         }
1433         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1434 }
1435
1436 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1437 {
1438         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1439                                       vcpu->arch.virtual_tsc_mult,
1440                                       vcpu->arch.virtual_tsc_shift);
1441         tsc += vcpu->arch.this_tsc_write;
1442         return tsc;
1443 }
1444
1445 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1446 {
1447 #ifdef CONFIG_X86_64
1448         bool vcpus_matched;
1449         struct kvm_arch *ka = &vcpu->kvm->arch;
1450         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1451
1452         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1453                          atomic_read(&vcpu->kvm->online_vcpus));
1454
1455         /*
1456          * Once the masterclock is enabled, always perform request in
1457          * order to update it.
1458          *
1459          * In order to enable masterclock, the host clocksource must be TSC
1460          * and the vcpus need to have matched TSCs.  When that happens,
1461          * perform request to enable masterclock.
1462          */
1463         if (ka->use_master_clock ||
1464             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1465                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1466
1467         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1468                             atomic_read(&vcpu->kvm->online_vcpus),
1469                             ka->use_master_clock, gtod->clock.vclock_mode);
1470 #endif
1471 }
1472
1473 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1474 {
1475         u64 curr_offset = vcpu->arch.tsc_offset;
1476         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1477 }
1478
1479 /*
1480  * Multiply tsc by a fixed point number represented by ratio.
1481  *
1482  * The most significant 64-N bits (mult) of ratio represent the
1483  * integral part of the fixed point number; the remaining N bits
1484  * (frac) represent the fractional part, ie. ratio represents a fixed
1485  * point number (mult + frac * 2^(-N)).
1486  *
1487  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1488  */
1489 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1490 {
1491         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1492 }
1493
1494 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1495 {
1496         u64 _tsc = tsc;
1497         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1498
1499         if (ratio != kvm_default_tsc_scaling_ratio)
1500                 _tsc = __scale_tsc(ratio, tsc);
1501
1502         return _tsc;
1503 }
1504 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1505
1506 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1507 {
1508         u64 tsc;
1509
1510         tsc = kvm_scale_tsc(vcpu, rdtsc());
1511
1512         return target_tsc - tsc;
1513 }
1514
1515 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1516 {
1517         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1518 }
1519 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1520
1521 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1522 {
1523         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1524         vcpu->arch.tsc_offset = offset;
1525 }
1526
1527 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1528 {
1529         struct kvm *kvm = vcpu->kvm;
1530         u64 offset, ns, elapsed;
1531         unsigned long flags;
1532         bool matched;
1533         bool already_matched;
1534         u64 data = msr->data;
1535         bool synchronizing = false;
1536
1537         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1538         offset = kvm_compute_tsc_offset(vcpu, data);
1539         ns = ktime_get_boot_ns();
1540         elapsed = ns - kvm->arch.last_tsc_nsec;
1541
1542         if (vcpu->arch.virtual_tsc_khz) {
1543                 if (data == 0 && msr->host_initiated) {
1544                         /*
1545                          * detection of vcpu initialization -- need to sync
1546                          * with other vCPUs. This particularly helps to keep
1547                          * kvm_clock stable after CPU hotplug
1548                          */
1549                         synchronizing = true;
1550                 } else {
1551                         u64 tsc_exp = kvm->arch.last_tsc_write +
1552                                                 nsec_to_cycles(vcpu, elapsed);
1553                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1554                         /*
1555                          * Special case: TSC write with a small delta (1 second)
1556                          * of virtual cycle time against real time is
1557                          * interpreted as an attempt to synchronize the CPU.
1558                          */
1559                         synchronizing = data < tsc_exp + tsc_hz &&
1560                                         data + tsc_hz > tsc_exp;
1561                 }
1562         }
1563
1564         /*
1565          * For a reliable TSC, we can match TSC offsets, and for an unstable
1566          * TSC, we add elapsed time in this computation.  We could let the
1567          * compensation code attempt to catch up if we fall behind, but
1568          * it's better to try to match offsets from the beginning.
1569          */
1570         if (synchronizing &&
1571             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1572                 if (!check_tsc_unstable()) {
1573                         offset = kvm->arch.cur_tsc_offset;
1574                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1575                 } else {
1576                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1577                         data += delta;
1578                         offset = kvm_compute_tsc_offset(vcpu, data);
1579                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1580                 }
1581                 matched = true;
1582                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1583         } else {
1584                 /*
1585                  * We split periods of matched TSC writes into generations.
1586                  * For each generation, we track the original measured
1587                  * nanosecond time, offset, and write, so if TSCs are in
1588                  * sync, we can match exact offset, and if not, we can match
1589                  * exact software computation in compute_guest_tsc()
1590                  *
1591                  * These values are tracked in kvm->arch.cur_xxx variables.
1592                  */
1593                 kvm->arch.cur_tsc_generation++;
1594                 kvm->arch.cur_tsc_nsec = ns;
1595                 kvm->arch.cur_tsc_write = data;
1596                 kvm->arch.cur_tsc_offset = offset;
1597                 matched = false;
1598                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1599                          kvm->arch.cur_tsc_generation, data);
1600         }
1601
1602         /*
1603          * We also track th most recent recorded KHZ, write and time to
1604          * allow the matching interval to be extended at each write.
1605          */
1606         kvm->arch.last_tsc_nsec = ns;
1607         kvm->arch.last_tsc_write = data;
1608         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1609
1610         vcpu->arch.last_guest_tsc = data;
1611
1612         /* Keep track of which generation this VCPU has synchronized to */
1613         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1614         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1615         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1616
1617         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1618                 update_ia32_tsc_adjust_msr(vcpu, offset);
1619
1620         kvm_vcpu_write_tsc_offset(vcpu, offset);
1621         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1622
1623         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1624         if (!matched) {
1625                 kvm->arch.nr_vcpus_matched_tsc = 0;
1626         } else if (!already_matched) {
1627                 kvm->arch.nr_vcpus_matched_tsc++;
1628         }
1629
1630         kvm_track_tsc_matching(vcpu);
1631         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1632 }
1633
1634 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1635
1636 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1637                                            s64 adjustment)
1638 {
1639         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1640 }
1641
1642 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1643 {
1644         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1645                 WARN_ON(adjustment < 0);
1646         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1647         adjust_tsc_offset_guest(vcpu, adjustment);
1648 }
1649
1650 #ifdef CONFIG_X86_64
1651
1652 static u64 read_tsc(void)
1653 {
1654         u64 ret = (u64)rdtsc_ordered();
1655         u64 last = pvclock_gtod_data.clock.cycle_last;
1656
1657         if (likely(ret >= last))
1658                 return ret;
1659
1660         /*
1661          * GCC likes to generate cmov here, but this branch is extremely
1662          * predictable (it's just a function of time and the likely is
1663          * very likely) and there's a data dependence, so force GCC
1664          * to generate a branch instead.  I don't barrier() because
1665          * we don't actually need a barrier, and if this function
1666          * ever gets inlined it will generate worse code.
1667          */
1668         asm volatile ("");
1669         return last;
1670 }
1671
1672 static inline u64 vgettsc(u64 *cycle_now)
1673 {
1674         long v;
1675         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1676
1677         *cycle_now = read_tsc();
1678
1679         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1680         return v * gtod->clock.mult;
1681 }
1682
1683 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1684 {
1685         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1686         unsigned long seq;
1687         int mode;
1688         u64 ns;
1689
1690         do {
1691                 seq = read_seqcount_begin(&gtod->seq);
1692                 mode = gtod->clock.vclock_mode;
1693                 ns = gtod->nsec_base;
1694                 ns += vgettsc(cycle_now);
1695                 ns >>= gtod->clock.shift;
1696                 ns += gtod->boot_ns;
1697         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1698         *t = ns;
1699
1700         return mode;
1701 }
1702
1703 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1704 {
1705         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1706         unsigned long seq;
1707         int mode;
1708         u64 ns;
1709
1710         do {
1711                 seq = read_seqcount_begin(&gtod->seq);
1712                 mode = gtod->clock.vclock_mode;
1713                 ts->tv_sec = gtod->wall_time_sec;
1714                 ns = gtod->nsec_base;
1715                 ns += vgettsc(cycle_now);
1716                 ns >>= gtod->clock.shift;
1717         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1718
1719         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1720         ts->tv_nsec = ns;
1721
1722         return mode;
1723 }
1724
1725 /* returns true if host is using tsc clocksource */
1726 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1727 {
1728         /* checked again under seqlock below */
1729         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1730                 return false;
1731
1732         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1733 }
1734
1735 /* returns true if host is using tsc clocksource */
1736 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1737                                            u64 *cycle_now)
1738 {
1739         /* checked again under seqlock below */
1740         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1741                 return false;
1742
1743         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1744 }
1745 #endif
1746
1747 /*
1748  *
1749  * Assuming a stable TSC across physical CPUS, and a stable TSC
1750  * across virtual CPUs, the following condition is possible.
1751  * Each numbered line represents an event visible to both
1752  * CPUs at the next numbered event.
1753  *
1754  * "timespecX" represents host monotonic time. "tscX" represents
1755  * RDTSC value.
1756  *
1757  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1758  *
1759  * 1.  read timespec0,tsc0
1760  * 2.                                   | timespec1 = timespec0 + N
1761  *                                      | tsc1 = tsc0 + M
1762  * 3. transition to guest               | transition to guest
1763  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1764  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1765  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1766  *
1767  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1768  *
1769  *      - ret0 < ret1
1770  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1771  *              ...
1772  *      - 0 < N - M => M < N
1773  *
1774  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1775  * always the case (the difference between two distinct xtime instances
1776  * might be smaller then the difference between corresponding TSC reads,
1777  * when updating guest vcpus pvclock areas).
1778  *
1779  * To avoid that problem, do not allow visibility of distinct
1780  * system_timestamp/tsc_timestamp values simultaneously: use a master
1781  * copy of host monotonic time values. Update that master copy
1782  * in lockstep.
1783  *
1784  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1785  *
1786  */
1787
1788 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1789 {
1790 #ifdef CONFIG_X86_64
1791         struct kvm_arch *ka = &kvm->arch;
1792         int vclock_mode;
1793         bool host_tsc_clocksource, vcpus_matched;
1794
1795         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1796                         atomic_read(&kvm->online_vcpus));
1797
1798         /*
1799          * If the host uses TSC clock, then passthrough TSC as stable
1800          * to the guest.
1801          */
1802         host_tsc_clocksource = kvm_get_time_and_clockread(
1803                                         &ka->master_kernel_ns,
1804                                         &ka->master_cycle_now);
1805
1806         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1807                                 && !ka->backwards_tsc_observed
1808                                 && !ka->boot_vcpu_runs_old_kvmclock;
1809
1810         if (ka->use_master_clock)
1811                 atomic_set(&kvm_guest_has_master_clock, 1);
1812
1813         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1814         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1815                                         vcpus_matched);
1816 #endif
1817 }
1818
1819 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1820 {
1821         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1822 }
1823
1824 static void kvm_gen_update_masterclock(struct kvm *kvm)
1825 {
1826 #ifdef CONFIG_X86_64
1827         int i;
1828         struct kvm_vcpu *vcpu;
1829         struct kvm_arch *ka = &kvm->arch;
1830
1831         spin_lock(&ka->pvclock_gtod_sync_lock);
1832         kvm_make_mclock_inprogress_request(kvm);
1833         /* no guest entries from this point */
1834         pvclock_update_vm_gtod_copy(kvm);
1835
1836         kvm_for_each_vcpu(i, vcpu, kvm)
1837                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1838
1839         /* guest entries allowed */
1840         kvm_for_each_vcpu(i, vcpu, kvm)
1841                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1842
1843         spin_unlock(&ka->pvclock_gtod_sync_lock);
1844 #endif
1845 }
1846
1847 u64 get_kvmclock_ns(struct kvm *kvm)
1848 {
1849         struct kvm_arch *ka = &kvm->arch;
1850         struct pvclock_vcpu_time_info hv_clock;
1851         u64 ret;
1852
1853         spin_lock(&ka->pvclock_gtod_sync_lock);
1854         if (!ka->use_master_clock) {
1855                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1856                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1857         }
1858
1859         hv_clock.tsc_timestamp = ka->master_cycle_now;
1860         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1861         spin_unlock(&ka->pvclock_gtod_sync_lock);
1862
1863         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1864         get_cpu();
1865
1866         if (__this_cpu_read(cpu_tsc_khz)) {
1867                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1868                                    &hv_clock.tsc_shift,
1869                                    &hv_clock.tsc_to_system_mul);
1870                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1871         } else
1872                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1873
1874         put_cpu();
1875
1876         return ret;
1877 }
1878
1879 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1880 {
1881         struct kvm_vcpu_arch *vcpu = &v->arch;
1882         struct pvclock_vcpu_time_info guest_hv_clock;
1883
1884         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1885                 &guest_hv_clock, sizeof(guest_hv_clock))))
1886                 return;
1887
1888         /* This VCPU is paused, but it's legal for a guest to read another
1889          * VCPU's kvmclock, so we really have to follow the specification where
1890          * it says that version is odd if data is being modified, and even after
1891          * it is consistent.
1892          *
1893          * Version field updates must be kept separate.  This is because
1894          * kvm_write_guest_cached might use a "rep movs" instruction, and
1895          * writes within a string instruction are weakly ordered.  So there
1896          * are three writes overall.
1897          *
1898          * As a small optimization, only write the version field in the first
1899          * and third write.  The vcpu->pv_time cache is still valid, because the
1900          * version field is the first in the struct.
1901          */
1902         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1903
1904         if (guest_hv_clock.version & 1)
1905                 ++guest_hv_clock.version;  /* first time write, random junk */
1906
1907         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1908         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1909                                 &vcpu->hv_clock,
1910                                 sizeof(vcpu->hv_clock.version));
1911
1912         smp_wmb();
1913
1914         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1915         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1916
1917         if (vcpu->pvclock_set_guest_stopped_request) {
1918                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1919                 vcpu->pvclock_set_guest_stopped_request = false;
1920         }
1921
1922         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1923
1924         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1925                                 &vcpu->hv_clock,
1926                                 sizeof(vcpu->hv_clock));
1927
1928         smp_wmb();
1929
1930         vcpu->hv_clock.version++;
1931         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1932                                 &vcpu->hv_clock,
1933                                 sizeof(vcpu->hv_clock.version));
1934 }
1935
1936 static int kvm_guest_time_update(struct kvm_vcpu *v)
1937 {
1938         unsigned long flags, tgt_tsc_khz;
1939         struct kvm_vcpu_arch *vcpu = &v->arch;
1940         struct kvm_arch *ka = &v->kvm->arch;
1941         s64 kernel_ns;
1942         u64 tsc_timestamp, host_tsc;
1943         u8 pvclock_flags;
1944         bool use_master_clock;
1945
1946         kernel_ns = 0;
1947         host_tsc = 0;
1948
1949         /*
1950          * If the host uses TSC clock, then passthrough TSC as stable
1951          * to the guest.
1952          */
1953         spin_lock(&ka->pvclock_gtod_sync_lock);
1954         use_master_clock = ka->use_master_clock;
1955         if (use_master_clock) {
1956                 host_tsc = ka->master_cycle_now;
1957                 kernel_ns = ka->master_kernel_ns;
1958         }
1959         spin_unlock(&ka->pvclock_gtod_sync_lock);
1960
1961         /* Keep irq disabled to prevent changes to the clock */
1962         local_irq_save(flags);
1963         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1964         if (unlikely(tgt_tsc_khz == 0)) {
1965                 local_irq_restore(flags);
1966                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1967                 return 1;
1968         }
1969         if (!use_master_clock) {
1970                 host_tsc = rdtsc();
1971                 kernel_ns = ktime_get_boot_ns();
1972         }
1973
1974         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1975
1976         /*
1977          * We may have to catch up the TSC to match elapsed wall clock
1978          * time for two reasons, even if kvmclock is used.
1979          *   1) CPU could have been running below the maximum TSC rate
1980          *   2) Broken TSC compensation resets the base at each VCPU
1981          *      entry to avoid unknown leaps of TSC even when running
1982          *      again on the same CPU.  This may cause apparent elapsed
1983          *      time to disappear, and the guest to stand still or run
1984          *      very slowly.
1985          */
1986         if (vcpu->tsc_catchup) {
1987                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1988                 if (tsc > tsc_timestamp) {
1989                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1990                         tsc_timestamp = tsc;
1991                 }
1992         }
1993
1994         local_irq_restore(flags);
1995
1996         /* With all the info we got, fill in the values */
1997
1998         if (kvm_has_tsc_control)
1999                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2000
2001         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2002                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2003                                    &vcpu->hv_clock.tsc_shift,
2004                                    &vcpu->hv_clock.tsc_to_system_mul);
2005                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2006         }
2007
2008         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2009         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2010         vcpu->last_guest_tsc = tsc_timestamp;
2011
2012         /* If the host uses TSC clocksource, then it is stable */
2013         pvclock_flags = 0;
2014         if (use_master_clock)
2015                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2016
2017         vcpu->hv_clock.flags = pvclock_flags;
2018
2019         if (vcpu->pv_time_enabled)
2020                 kvm_setup_pvclock_page(v);
2021         if (v == kvm_get_vcpu(v->kvm, 0))
2022                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2023         return 0;
2024 }
2025
2026 /*
2027  * kvmclock updates which are isolated to a given vcpu, such as
2028  * vcpu->cpu migration, should not allow system_timestamp from
2029  * the rest of the vcpus to remain static. Otherwise ntp frequency
2030  * correction applies to one vcpu's system_timestamp but not
2031  * the others.
2032  *
2033  * So in those cases, request a kvmclock update for all vcpus.
2034  * We need to rate-limit these requests though, as they can
2035  * considerably slow guests that have a large number of vcpus.
2036  * The time for a remote vcpu to update its kvmclock is bound
2037  * by the delay we use to rate-limit the updates.
2038  */
2039
2040 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2041
2042 static void kvmclock_update_fn(struct work_struct *work)
2043 {
2044         int i;
2045         struct delayed_work *dwork = to_delayed_work(work);
2046         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2047                                            kvmclock_update_work);
2048         struct kvm *kvm = container_of(ka, struct kvm, arch);
2049         struct kvm_vcpu *vcpu;
2050
2051         kvm_for_each_vcpu(i, vcpu, kvm) {
2052                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2053                 kvm_vcpu_kick(vcpu);
2054         }
2055 }
2056
2057 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2058 {
2059         struct kvm *kvm = v->kvm;
2060
2061         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2062         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2063                                         KVMCLOCK_UPDATE_DELAY);
2064 }
2065
2066 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2067
2068 static void kvmclock_sync_fn(struct work_struct *work)
2069 {
2070         struct delayed_work *dwork = to_delayed_work(work);
2071         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2072                                            kvmclock_sync_work);
2073         struct kvm *kvm = container_of(ka, struct kvm, arch);
2074
2075         if (!kvmclock_periodic_sync)
2076                 return;
2077
2078         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2079         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2080                                         KVMCLOCK_SYNC_PERIOD);
2081 }
2082
2083 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2084 {
2085         u64 mcg_cap = vcpu->arch.mcg_cap;
2086         unsigned bank_num = mcg_cap & 0xff;
2087
2088         switch (msr) {
2089         case MSR_IA32_MCG_STATUS:
2090                 vcpu->arch.mcg_status = data;
2091                 break;
2092         case MSR_IA32_MCG_CTL:
2093                 if (!(mcg_cap & MCG_CTL_P))
2094                         return 1;
2095                 if (data != 0 && data != ~(u64)0)
2096                         return -1;
2097                 vcpu->arch.mcg_ctl = data;
2098                 break;
2099         default:
2100                 if (msr >= MSR_IA32_MC0_CTL &&
2101                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2102                         u32 offset = msr - MSR_IA32_MC0_CTL;
2103                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2104                          * some Linux kernels though clear bit 10 in bank 4 to
2105                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2106                          * this to avoid an uncatched #GP in the guest
2107                          */
2108                         if ((offset & 0x3) == 0 &&
2109                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2110                                 return -1;
2111                         vcpu->arch.mce_banks[offset] = data;
2112                         break;
2113                 }
2114                 return 1;
2115         }
2116         return 0;
2117 }
2118
2119 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2120 {
2121         struct kvm *kvm = vcpu->kvm;
2122         int lm = is_long_mode(vcpu);
2123         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2124                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2125         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2126                 : kvm->arch.xen_hvm_config.blob_size_32;
2127         u32 page_num = data & ~PAGE_MASK;
2128         u64 page_addr = data & PAGE_MASK;
2129         u8 *page;
2130         int r;
2131
2132         r = -E2BIG;
2133         if (page_num >= blob_size)
2134                 goto out;
2135         r = -ENOMEM;
2136         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2137         if (IS_ERR(page)) {
2138                 r = PTR_ERR(page);
2139                 goto out;
2140         }
2141         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2142                 goto out_free;
2143         r = 0;
2144 out_free:
2145         kfree(page);
2146 out:
2147         return r;
2148 }
2149
2150 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2151 {
2152         gpa_t gpa = data & ~0x3f;
2153
2154         /* Bits 3:5 are reserved, Should be zero */
2155         if (data & 0x38)
2156                 return 1;
2157
2158         vcpu->arch.apf.msr_val = data;
2159
2160         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2161                 kvm_clear_async_pf_completion_queue(vcpu);
2162                 kvm_async_pf_hash_reset(vcpu);
2163                 return 0;
2164         }
2165
2166         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2167                                         sizeof(u32)))
2168                 return 1;
2169
2170         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2171         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2172         kvm_async_pf_wakeup_all(vcpu);
2173         return 0;
2174 }
2175
2176 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2177 {
2178         vcpu->arch.pv_time_enabled = false;
2179 }
2180
2181 static void record_steal_time(struct kvm_vcpu *vcpu)
2182 {
2183         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2184                 return;
2185
2186         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2187                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2188                 return;
2189
2190         vcpu->arch.st.steal.preempted = 0;
2191
2192         if (vcpu->arch.st.steal.version & 1)
2193                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2194
2195         vcpu->arch.st.steal.version += 1;
2196
2197         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2198                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2199
2200         smp_wmb();
2201
2202         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2203                 vcpu->arch.st.last_steal;
2204         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2205
2206         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2207                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2208
2209         smp_wmb();
2210
2211         vcpu->arch.st.steal.version += 1;
2212
2213         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2214                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2215 }
2216
2217 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2218 {
2219         bool pr = false;
2220         u32 msr = msr_info->index;
2221         u64 data = msr_info->data;
2222
2223         switch (msr) {
2224         case MSR_AMD64_NB_CFG:
2225         case MSR_IA32_UCODE_WRITE:
2226         case MSR_VM_HSAVE_PA:
2227         case MSR_AMD64_PATCH_LOADER:
2228         case MSR_AMD64_BU_CFG2:
2229         case MSR_AMD64_DC_CFG:
2230         case MSR_F15H_EX_CFG:
2231                 break;
2232
2233         case MSR_IA32_UCODE_REV:
2234                 if (msr_info->host_initiated)
2235                         vcpu->arch.microcode_version = data;
2236                 break;
2237         case MSR_EFER:
2238                 return set_efer(vcpu, data);
2239         case MSR_K7_HWCR:
2240                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2241                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2242                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2243                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2244                 if (data != 0) {
2245                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2246                                     data);
2247                         return 1;
2248                 }
2249                 break;
2250         case MSR_FAM10H_MMIO_CONF_BASE:
2251                 if (data != 0) {
2252                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2253                                     "0x%llx\n", data);
2254                         return 1;
2255                 }
2256                 break;
2257         case MSR_IA32_DEBUGCTLMSR:
2258                 if (!data) {
2259                         /* We support the non-activated case already */
2260                         break;
2261                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2262                         /* Values other than LBR and BTF are vendor-specific,
2263                            thus reserved and should throw a #GP */
2264                         return 1;
2265                 }
2266                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2267                             __func__, data);
2268                 break;
2269         case 0x200 ... 0x2ff:
2270                 return kvm_mtrr_set_msr(vcpu, msr, data);
2271         case MSR_IA32_APICBASE:
2272                 return kvm_set_apic_base(vcpu, msr_info);
2273         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2274                 return kvm_x2apic_msr_write(vcpu, msr, data);
2275         case MSR_IA32_TSCDEADLINE:
2276                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2277                 break;
2278         case MSR_IA32_TSC_ADJUST:
2279                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2280                         if (!msr_info->host_initiated) {
2281                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2282                                 adjust_tsc_offset_guest(vcpu, adj);
2283                         }
2284                         vcpu->arch.ia32_tsc_adjust_msr = data;
2285                 }
2286                 break;
2287         case MSR_IA32_MISC_ENABLE:
2288                 vcpu->arch.ia32_misc_enable_msr = data;
2289                 break;
2290         case MSR_IA32_SMBASE:
2291                 if (!msr_info->host_initiated)
2292                         return 1;
2293                 vcpu->arch.smbase = data;
2294                 break;
2295         case MSR_KVM_WALL_CLOCK_NEW:
2296         case MSR_KVM_WALL_CLOCK:
2297                 vcpu->kvm->arch.wall_clock = data;
2298                 kvm_write_wall_clock(vcpu->kvm, data);
2299                 break;
2300         case MSR_KVM_SYSTEM_TIME_NEW:
2301         case MSR_KVM_SYSTEM_TIME: {
2302                 struct kvm_arch *ka = &vcpu->kvm->arch;
2303
2304                 kvmclock_reset(vcpu);
2305
2306                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2307                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2308
2309                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2310                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2311
2312                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2313                 }
2314
2315                 vcpu->arch.time = data;
2316                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2317
2318                 /* we verify if the enable bit is set... */
2319                 if (!(data & 1))
2320                         break;
2321
2322                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2323                      &vcpu->arch.pv_time, data & ~1ULL,
2324                      sizeof(struct pvclock_vcpu_time_info)))
2325                         vcpu->arch.pv_time_enabled = false;
2326                 else
2327                         vcpu->arch.pv_time_enabled = true;
2328
2329                 break;
2330         }
2331         case MSR_KVM_ASYNC_PF_EN:
2332                 if (kvm_pv_enable_async_pf(vcpu, data))
2333                         return 1;
2334                 break;
2335         case MSR_KVM_STEAL_TIME:
2336
2337                 if (unlikely(!sched_info_on()))
2338                         return 1;
2339
2340                 if (data & KVM_STEAL_RESERVED_MASK)
2341                         return 1;
2342
2343                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2344                                                 data & KVM_STEAL_VALID_BITS,
2345                                                 sizeof(struct kvm_steal_time)))
2346                         return 1;
2347
2348                 vcpu->arch.st.msr_val = data;
2349
2350                 if (!(data & KVM_MSR_ENABLED))
2351                         break;
2352
2353                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2354
2355                 break;
2356         case MSR_KVM_PV_EOI_EN:
2357                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2358                         return 1;
2359                 break;
2360
2361         case MSR_IA32_MCG_CTL:
2362         case MSR_IA32_MCG_STATUS:
2363         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2364                 return set_msr_mce(vcpu, msr, data);
2365
2366         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2367         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2368                 pr = true; /* fall through */
2369         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2370         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2371                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2372                         return kvm_pmu_set_msr(vcpu, msr_info);
2373
2374                 if (pr || data != 0)
2375                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2376                                     "0x%x data 0x%llx\n", msr, data);
2377                 break;
2378         case MSR_K7_CLK_CTL:
2379                 /*
2380                  * Ignore all writes to this no longer documented MSR.
2381                  * Writes are only relevant for old K7 processors,
2382                  * all pre-dating SVM, but a recommended workaround from
2383                  * AMD for these chips. It is possible to specify the
2384                  * affected processor models on the command line, hence
2385                  * the need to ignore the workaround.
2386                  */
2387                 break;
2388         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2389         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2390         case HV_X64_MSR_CRASH_CTL:
2391         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2392                 return kvm_hv_set_msr_common(vcpu, msr, data,
2393                                              msr_info->host_initiated);
2394         case MSR_IA32_BBL_CR_CTL3:
2395                 /* Drop writes to this legacy MSR -- see rdmsr
2396                  * counterpart for further detail.
2397                  */
2398                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2399                 break;
2400         case MSR_AMD64_OSVW_ID_LENGTH:
2401                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2402                         return 1;
2403                 vcpu->arch.osvw.length = data;
2404                 break;
2405         case MSR_AMD64_OSVW_STATUS:
2406                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2407                         return 1;
2408                 vcpu->arch.osvw.status = data;
2409                 break;
2410         case MSR_PLATFORM_INFO:
2411                 if (!msr_info->host_initiated ||
2412                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2413                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2414                      cpuid_fault_enabled(vcpu)))
2415                         return 1;
2416                 vcpu->arch.msr_platform_info = data;
2417                 break;
2418         case MSR_MISC_FEATURES_ENABLES:
2419                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2420                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2421                      !supports_cpuid_fault(vcpu)))
2422                         return 1;
2423                 vcpu->arch.msr_misc_features_enables = data;
2424                 break;
2425         default:
2426                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2427                         return xen_hvm_config(vcpu, data);
2428                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2429                         return kvm_pmu_set_msr(vcpu, msr_info);
2430                 if (!ignore_msrs) {
2431                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2432                                     msr, data);
2433                         return 1;
2434                 } else {
2435                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2436                                     msr, data);
2437                         break;
2438                 }
2439         }
2440         return 0;
2441 }
2442 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2443
2444
2445 /*
2446  * Reads an msr value (of 'msr_index') into 'pdata'.
2447  * Returns 0 on success, non-0 otherwise.
2448  * Assumes vcpu_load() was already called.
2449  */
2450 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2451 {
2452         return kvm_x86_ops->get_msr(vcpu, msr);
2453 }
2454 EXPORT_SYMBOL_GPL(kvm_get_msr);
2455
2456 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2457 {
2458         u64 data;
2459         u64 mcg_cap = vcpu->arch.mcg_cap;
2460         unsigned bank_num = mcg_cap & 0xff;
2461
2462         switch (msr) {
2463         case MSR_IA32_P5_MC_ADDR:
2464         case MSR_IA32_P5_MC_TYPE:
2465                 data = 0;
2466                 break;
2467         case MSR_IA32_MCG_CAP:
2468                 data = vcpu->arch.mcg_cap;
2469                 break;
2470         case MSR_IA32_MCG_CTL:
2471                 if (!(mcg_cap & MCG_CTL_P))
2472                         return 1;
2473                 data = vcpu->arch.mcg_ctl;
2474                 break;
2475         case MSR_IA32_MCG_STATUS:
2476                 data = vcpu->arch.mcg_status;
2477                 break;
2478         default:
2479                 if (msr >= MSR_IA32_MC0_CTL &&
2480                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2481                         u32 offset = msr - MSR_IA32_MC0_CTL;
2482                         data = vcpu->arch.mce_banks[offset];
2483                         break;
2484                 }
2485                 return 1;
2486         }
2487         *pdata = data;
2488         return 0;
2489 }
2490
2491 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2492 {
2493         switch (msr_info->index) {
2494         case MSR_IA32_PLATFORM_ID:
2495         case MSR_IA32_EBL_CR_POWERON:
2496         case MSR_IA32_DEBUGCTLMSR:
2497         case MSR_IA32_LASTBRANCHFROMIP:
2498         case MSR_IA32_LASTBRANCHTOIP:
2499         case MSR_IA32_LASTINTFROMIP:
2500         case MSR_IA32_LASTINTTOIP:
2501         case MSR_K8_SYSCFG:
2502         case MSR_K8_TSEG_ADDR:
2503         case MSR_K8_TSEG_MASK:
2504         case MSR_K7_HWCR:
2505         case MSR_VM_HSAVE_PA:
2506         case MSR_K8_INT_PENDING_MSG:
2507         case MSR_AMD64_NB_CFG:
2508         case MSR_FAM10H_MMIO_CONF_BASE:
2509         case MSR_AMD64_BU_CFG2:
2510         case MSR_IA32_PERF_CTL:
2511         case MSR_AMD64_DC_CFG:
2512         case MSR_F15H_EX_CFG:
2513                 msr_info->data = 0;
2514                 break;
2515         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2516         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2517         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2518         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2519                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2520                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2521                 msr_info->data = 0;
2522                 break;
2523         case MSR_IA32_UCODE_REV:
2524                 msr_info->data = vcpu->arch.microcode_version;
2525                 break;
2526         case MSR_MTRRcap:
2527         case 0x200 ... 0x2ff:
2528                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2529         case 0xcd: /* fsb frequency */
2530                 msr_info->data = 3;
2531                 break;
2532                 /*
2533                  * MSR_EBC_FREQUENCY_ID
2534                  * Conservative value valid for even the basic CPU models.
2535                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2536                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2537                  * and 266MHz for model 3, or 4. Set Core Clock
2538                  * Frequency to System Bus Frequency Ratio to 1 (bits
2539                  * 31:24) even though these are only valid for CPU
2540                  * models > 2, however guests may end up dividing or
2541                  * multiplying by zero otherwise.
2542                  */
2543         case MSR_EBC_FREQUENCY_ID:
2544                 msr_info->data = 1 << 24;
2545                 break;
2546         case MSR_IA32_APICBASE:
2547                 msr_info->data = kvm_get_apic_base(vcpu);
2548                 break;
2549         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2550                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2551                 break;
2552         case MSR_IA32_TSCDEADLINE:
2553                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2554                 break;
2555         case MSR_IA32_TSC_ADJUST:
2556                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2557                 break;
2558         case MSR_IA32_MISC_ENABLE:
2559                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2560                 break;
2561         case MSR_IA32_SMBASE:
2562                 if (!msr_info->host_initiated)
2563                         return 1;
2564                 msr_info->data = vcpu->arch.smbase;
2565                 break;
2566         case MSR_IA32_PERF_STATUS:
2567                 /* TSC increment by tick */
2568                 msr_info->data = 1000ULL;
2569                 /* CPU multiplier */
2570                 msr_info->data |= (((uint64_t)4ULL) << 40);
2571                 break;
2572         case MSR_EFER:
2573                 msr_info->data = vcpu->arch.efer;
2574                 break;
2575         case MSR_KVM_WALL_CLOCK:
2576         case MSR_KVM_WALL_CLOCK_NEW:
2577                 msr_info->data = vcpu->kvm->arch.wall_clock;
2578                 break;
2579         case MSR_KVM_SYSTEM_TIME:
2580         case MSR_KVM_SYSTEM_TIME_NEW:
2581                 msr_info->data = vcpu->arch.time;
2582                 break;
2583         case MSR_KVM_ASYNC_PF_EN:
2584                 msr_info->data = vcpu->arch.apf.msr_val;
2585                 break;
2586         case MSR_KVM_STEAL_TIME:
2587                 msr_info->data = vcpu->arch.st.msr_val;
2588                 break;
2589         case MSR_KVM_PV_EOI_EN:
2590                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2591                 break;
2592         case MSR_IA32_P5_MC_ADDR:
2593         case MSR_IA32_P5_MC_TYPE:
2594         case MSR_IA32_MCG_CAP:
2595         case MSR_IA32_MCG_CTL:
2596         case MSR_IA32_MCG_STATUS:
2597         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2598                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2599         case MSR_K7_CLK_CTL:
2600                 /*
2601                  * Provide expected ramp-up count for K7. All other
2602                  * are set to zero, indicating minimum divisors for
2603                  * every field.
2604                  *
2605                  * This prevents guest kernels on AMD host with CPU
2606                  * type 6, model 8 and higher from exploding due to
2607                  * the rdmsr failing.
2608                  */
2609                 msr_info->data = 0x20000000;
2610                 break;
2611         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2612         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2613         case HV_X64_MSR_CRASH_CTL:
2614         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2615                 return kvm_hv_get_msr_common(vcpu,
2616                                              msr_info->index, &msr_info->data);
2617                 break;
2618         case MSR_IA32_BBL_CR_CTL3:
2619                 /* This legacy MSR exists but isn't fully documented in current
2620                  * silicon.  It is however accessed by winxp in very narrow
2621                  * scenarios where it sets bit #19, itself documented as
2622                  * a "reserved" bit.  Best effort attempt to source coherent
2623                  * read data here should the balance of the register be
2624                  * interpreted by the guest:
2625                  *
2626                  * L2 cache control register 3: 64GB range, 256KB size,
2627                  * enabled, latency 0x1, configured
2628                  */
2629                 msr_info->data = 0xbe702111;
2630                 break;
2631         case MSR_AMD64_OSVW_ID_LENGTH:
2632                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2633                         return 1;
2634                 msr_info->data = vcpu->arch.osvw.length;
2635                 break;
2636         case MSR_AMD64_OSVW_STATUS:
2637                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2638                         return 1;
2639                 msr_info->data = vcpu->arch.osvw.status;
2640                 break;
2641         case MSR_PLATFORM_INFO:
2642                 msr_info->data = vcpu->arch.msr_platform_info;
2643                 break;
2644         case MSR_MISC_FEATURES_ENABLES:
2645                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2646                 break;
2647         default:
2648                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2649                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2650                 if (!ignore_msrs) {
2651                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2652                                                msr_info->index);
2653                         return 1;
2654                 } else {
2655                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2656                         msr_info->data = 0;
2657                 }
2658                 break;
2659         }
2660         return 0;
2661 }
2662 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2663
2664 /*
2665  * Read or write a bunch of msrs. All parameters are kernel addresses.
2666  *
2667  * @return number of msrs set successfully.
2668  */
2669 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2670                     struct kvm_msr_entry *entries,
2671                     int (*do_msr)(struct kvm_vcpu *vcpu,
2672                                   unsigned index, u64 *data))
2673 {
2674         int i;
2675
2676         for (i = 0; i < msrs->nmsrs; ++i)
2677                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2678                         break;
2679
2680         return i;
2681 }
2682
2683 /*
2684  * Read or write a bunch of msrs. Parameters are user addresses.
2685  *
2686  * @return number of msrs set successfully.
2687  */
2688 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2689                   int (*do_msr)(struct kvm_vcpu *vcpu,
2690                                 unsigned index, u64 *data),
2691                   int writeback)
2692 {
2693         struct kvm_msrs msrs;
2694         struct kvm_msr_entry *entries;
2695         int r, n;
2696         unsigned size;
2697
2698         r = -EFAULT;
2699         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2700                 goto out;
2701
2702         r = -E2BIG;
2703         if (msrs.nmsrs >= MAX_IO_MSRS)
2704                 goto out;
2705
2706         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2707         entries = memdup_user(user_msrs->entries, size);
2708         if (IS_ERR(entries)) {
2709                 r = PTR_ERR(entries);
2710                 goto out;
2711         }
2712
2713         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2714         if (r < 0)
2715                 goto out_free;
2716
2717         r = -EFAULT;
2718         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2719                 goto out_free;
2720
2721         r = n;
2722
2723 out_free:
2724         kfree(entries);
2725 out:
2726         return r;
2727 }
2728
2729 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2730 {
2731         int r;
2732
2733         switch (ext) {
2734         case KVM_CAP_IRQCHIP:
2735         case KVM_CAP_HLT:
2736         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2737         case KVM_CAP_SET_TSS_ADDR:
2738         case KVM_CAP_EXT_CPUID:
2739         case KVM_CAP_EXT_EMUL_CPUID:
2740         case KVM_CAP_CLOCKSOURCE:
2741         case KVM_CAP_PIT:
2742         case KVM_CAP_NOP_IO_DELAY:
2743         case KVM_CAP_MP_STATE:
2744         case KVM_CAP_SYNC_MMU:
2745         case KVM_CAP_USER_NMI:
2746         case KVM_CAP_REINJECT_CONTROL:
2747         case KVM_CAP_IRQ_INJECT_STATUS:
2748         case KVM_CAP_IOEVENTFD:
2749         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2750         case KVM_CAP_PIT2:
2751         case KVM_CAP_PIT_STATE2:
2752         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2753         case KVM_CAP_XEN_HVM:
2754         case KVM_CAP_VCPU_EVENTS:
2755         case KVM_CAP_HYPERV:
2756         case KVM_CAP_HYPERV_VAPIC:
2757         case KVM_CAP_HYPERV_SPIN:
2758         case KVM_CAP_HYPERV_SYNIC:
2759         case KVM_CAP_HYPERV_SYNIC2:
2760         case KVM_CAP_HYPERV_VP_INDEX:
2761         case KVM_CAP_PCI_SEGMENT:
2762         case KVM_CAP_DEBUGREGS:
2763         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2764         case KVM_CAP_XSAVE:
2765         case KVM_CAP_ASYNC_PF:
2766         case KVM_CAP_GET_TSC_KHZ:
2767         case KVM_CAP_KVMCLOCK_CTRL:
2768         case KVM_CAP_READONLY_MEM:
2769         case KVM_CAP_HYPERV_TIME:
2770         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2771         case KVM_CAP_TSC_DEADLINE_TIMER:
2772         case KVM_CAP_ENABLE_CAP_VM:
2773         case KVM_CAP_DISABLE_QUIRKS:
2774         case KVM_CAP_SET_BOOT_CPU_ID:
2775         case KVM_CAP_SPLIT_IRQCHIP:
2776         case KVM_CAP_IMMEDIATE_EXIT:
2777         case KVM_CAP_GET_MSR_FEATURES:
2778                 r = 1;
2779                 break;
2780         case KVM_CAP_ADJUST_CLOCK:
2781                 r = KVM_CLOCK_TSC_STABLE;
2782                 break;
2783         case KVM_CAP_X86_GUEST_MWAIT:
2784                 r = kvm_mwait_in_guest();
2785                 break;
2786         case KVM_CAP_X86_SMM:
2787                 /* SMBASE is usually relocated above 1M on modern chipsets,
2788                  * and SMM handlers might indeed rely on 4G segment limits,
2789                  * so do not report SMM to be available if real mode is
2790                  * emulated via vm86 mode.  Still, do not go to great lengths
2791                  * to avoid userspace's usage of the feature, because it is a
2792                  * fringe case that is not enabled except via specific settings
2793                  * of the module parameters.
2794                  */
2795                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
2796                 break;
2797         case KVM_CAP_VAPIC:
2798                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2799                 break;
2800         case KVM_CAP_NR_VCPUS:
2801                 r = KVM_SOFT_MAX_VCPUS;
2802                 break;
2803         case KVM_CAP_MAX_VCPUS:
2804                 r = KVM_MAX_VCPUS;
2805                 break;
2806         case KVM_CAP_NR_MEMSLOTS:
2807                 r = KVM_USER_MEM_SLOTS;
2808                 break;
2809         case KVM_CAP_PV_MMU:    /* obsolete */
2810                 r = 0;
2811                 break;
2812         case KVM_CAP_MCE:
2813                 r = KVM_MAX_MCE_BANKS;
2814                 break;
2815         case KVM_CAP_XCRS:
2816                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2817                 break;
2818         case KVM_CAP_TSC_CONTROL:
2819                 r = kvm_has_tsc_control;
2820                 break;
2821         case KVM_CAP_X2APIC_API:
2822                 r = KVM_X2APIC_API_VALID_FLAGS;
2823                 break;
2824         default:
2825                 r = 0;
2826                 break;
2827         }
2828         return r;
2829
2830 }
2831
2832 long kvm_arch_dev_ioctl(struct file *filp,
2833                         unsigned int ioctl, unsigned long arg)
2834 {
2835         void __user *argp = (void __user *)arg;
2836         long r;
2837
2838         switch (ioctl) {
2839         case KVM_GET_MSR_INDEX_LIST: {
2840                 struct kvm_msr_list __user *user_msr_list = argp;
2841                 struct kvm_msr_list msr_list;
2842                 unsigned n;
2843
2844                 r = -EFAULT;
2845                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2846                         goto out;
2847                 n = msr_list.nmsrs;
2848                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2849                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2850                         goto out;
2851                 r = -E2BIG;
2852                 if (n < msr_list.nmsrs)
2853                         goto out;
2854                 r = -EFAULT;
2855                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2856                                  num_msrs_to_save * sizeof(u32)))
2857                         goto out;
2858                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2859                                  &emulated_msrs,
2860                                  num_emulated_msrs * sizeof(u32)))
2861                         goto out;
2862                 r = 0;
2863                 break;
2864         }
2865         case KVM_GET_SUPPORTED_CPUID:
2866         case KVM_GET_EMULATED_CPUID: {
2867                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2868                 struct kvm_cpuid2 cpuid;
2869
2870                 r = -EFAULT;
2871                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2872                         goto out;
2873
2874                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2875                                             ioctl);
2876                 if (r)
2877                         goto out;
2878
2879                 r = -EFAULT;
2880                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2881                         goto out;
2882                 r = 0;
2883                 break;
2884         }
2885         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2886                 r = -EFAULT;
2887                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2888                                  sizeof(kvm_mce_cap_supported)))
2889                         goto out;
2890                 r = 0;
2891                 break;
2892         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
2893                 struct kvm_msr_list __user *user_msr_list = argp;
2894                 struct kvm_msr_list msr_list;
2895                 unsigned int n;
2896
2897                 r = -EFAULT;
2898                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
2899                         goto out;
2900                 n = msr_list.nmsrs;
2901                 msr_list.nmsrs = num_msr_based_features;
2902                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
2903                         goto out;
2904                 r = -E2BIG;
2905                 if (n < msr_list.nmsrs)
2906                         goto out;
2907                 r = -EFAULT;
2908                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
2909                                  num_msr_based_features * sizeof(u32)))
2910                         goto out;
2911                 r = 0;
2912                 break;
2913         }
2914         case KVM_GET_MSRS:
2915                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
2916                 break;
2917         }
2918         default:
2919                 r = -EINVAL;
2920         }
2921 out:
2922         return r;
2923 }
2924
2925 static void wbinvd_ipi(void *garbage)
2926 {
2927         wbinvd();
2928 }
2929
2930 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2931 {
2932         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2933 }
2934
2935 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2936 {
2937         /* Address WBINVD may be executed by guest */
2938         if (need_emulate_wbinvd(vcpu)) {
2939                 if (kvm_x86_ops->has_wbinvd_exit())
2940                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2941                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2942                         smp_call_function_single(vcpu->cpu,
2943                                         wbinvd_ipi, NULL, 1);
2944         }
2945
2946         kvm_x86_ops->vcpu_load(vcpu, cpu);
2947
2948         /* Apply any externally detected TSC adjustments (due to suspend) */
2949         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2950                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2951                 vcpu->arch.tsc_offset_adjustment = 0;
2952                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2953         }
2954
2955         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2956                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2957                                 rdtsc() - vcpu->arch.last_host_tsc;
2958                 if (tsc_delta < 0)
2959                         mark_tsc_unstable("KVM discovered backwards TSC");
2960
2961                 if (check_tsc_unstable()) {
2962                         u64 offset = kvm_compute_tsc_offset(vcpu,
2963                                                 vcpu->arch.last_guest_tsc);
2964                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2965                         vcpu->arch.tsc_catchup = 1;
2966                 }
2967
2968                 if (kvm_lapic_hv_timer_in_use(vcpu))
2969                         kvm_lapic_restart_hv_timer(vcpu);
2970
2971                 /*
2972                  * On a host with synchronized TSC, there is no need to update
2973                  * kvmclock on vcpu->cpu migration
2974                  */
2975                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2976                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2977                 if (vcpu->cpu != cpu)
2978                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2979                 vcpu->cpu = cpu;
2980         }
2981
2982         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2983 }
2984
2985 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2986 {
2987         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2988                 return;
2989
2990         vcpu->arch.st.steal.preempted = 1;
2991
2992         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2993                         &vcpu->arch.st.steal.preempted,
2994                         offsetof(struct kvm_steal_time, preempted),
2995                         sizeof(vcpu->arch.st.steal.preempted));
2996 }
2997
2998 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2999 {
3000         int idx;
3001
3002         if (vcpu->preempted)
3003                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3004
3005         /*
3006          * Disable page faults because we're in atomic context here.
3007          * kvm_write_guest_offset_cached() would call might_fault()
3008          * that relies on pagefault_disable() to tell if there's a
3009          * bug. NOTE: the write to guest memory may not go through if
3010          * during postcopy live migration or if there's heavy guest
3011          * paging.
3012          */
3013         pagefault_disable();
3014         /*
3015          * kvm_memslots() will be called by
3016          * kvm_write_guest_offset_cached() so take the srcu lock.
3017          */
3018         idx = srcu_read_lock(&vcpu->kvm->srcu);
3019         kvm_steal_time_set_preempted(vcpu);
3020         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3021         pagefault_enable();
3022         kvm_x86_ops->vcpu_put(vcpu);
3023         vcpu->arch.last_host_tsc = rdtsc();
3024         /*
3025          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3026          * on every vmexit, but if not, we might have a stale dr6 from the
3027          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3028          */
3029         set_debugreg(0, 6);
3030 }
3031
3032 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3033                                     struct kvm_lapic_state *s)
3034 {
3035         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
3036                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3037
3038         return kvm_apic_get_state(vcpu, s);
3039 }
3040
3041 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3042                                     struct kvm_lapic_state *s)
3043 {
3044         int r;
3045
3046         r = kvm_apic_set_state(vcpu, s);
3047         if (r)
3048                 return r;
3049         update_cr8_intercept(vcpu);
3050
3051         return 0;
3052 }
3053
3054 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3055 {
3056         return (!lapic_in_kernel(vcpu) ||
3057                 kvm_apic_accept_pic_intr(vcpu));
3058 }
3059
3060 /*
3061  * if userspace requested an interrupt window, check that the
3062  * interrupt window is open.
3063  *
3064  * No need to exit to userspace if we already have an interrupt queued.
3065  */
3066 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3067 {
3068         return kvm_arch_interrupt_allowed(vcpu) &&
3069                 !kvm_cpu_has_interrupt(vcpu) &&
3070                 !kvm_event_needs_reinjection(vcpu) &&
3071                 kvm_cpu_accept_dm_intr(vcpu);
3072 }
3073
3074 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3075                                     struct kvm_interrupt *irq)
3076 {
3077         if (irq->irq >= KVM_NR_INTERRUPTS)
3078                 return -EINVAL;
3079
3080         if (!irqchip_in_kernel(vcpu->kvm)) {
3081                 kvm_queue_interrupt(vcpu, irq->irq, false);
3082                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3083                 return 0;
3084         }
3085
3086         /*
3087          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3088          * fail for in-kernel 8259.
3089          */
3090         if (pic_in_kernel(vcpu->kvm))
3091                 return -ENXIO;
3092
3093         if (vcpu->arch.pending_external_vector != -1)
3094                 return -EEXIST;
3095
3096         vcpu->arch.pending_external_vector = irq->irq;
3097         kvm_make_request(KVM_REQ_EVENT, vcpu);
3098         return 0;
3099 }
3100
3101 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3102 {
3103         kvm_inject_nmi(vcpu);
3104
3105         return 0;
3106 }
3107
3108 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3109 {
3110         kvm_make_request(KVM_REQ_SMI, vcpu);
3111
3112         return 0;
3113 }
3114
3115 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3116                                            struct kvm_tpr_access_ctl *tac)
3117 {
3118         if (tac->flags)
3119                 return -EINVAL;
3120         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3121         return 0;
3122 }
3123
3124 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3125                                         u64 mcg_cap)
3126 {
3127         int r;
3128         unsigned bank_num = mcg_cap & 0xff, bank;
3129
3130         r = -EINVAL;
3131         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3132                 goto out;
3133         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3134                 goto out;
3135         r = 0;
3136         vcpu->arch.mcg_cap = mcg_cap;
3137         /* Init IA32_MCG_CTL to all 1s */
3138         if (mcg_cap & MCG_CTL_P)
3139                 vcpu->arch.mcg_ctl = ~(u64)0;
3140         /* Init IA32_MCi_CTL to all 1s */
3141         for (bank = 0; bank < bank_num; bank++)
3142                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3143
3144         if (kvm_x86_ops->setup_mce)
3145                 kvm_x86_ops->setup_mce(vcpu);
3146 out:
3147         return r;
3148 }
3149
3150 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3151                                       struct kvm_x86_mce *mce)
3152 {
3153         u64 mcg_cap = vcpu->arch.mcg_cap;
3154         unsigned bank_num = mcg_cap & 0xff;
3155         u64 *banks = vcpu->arch.mce_banks;
3156
3157         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3158                 return -EINVAL;
3159         /*
3160          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3161          * reporting is disabled
3162          */
3163         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3164             vcpu->arch.mcg_ctl != ~(u64)0)
3165                 return 0;
3166         banks += 4 * mce->bank;
3167         /*
3168          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3169          * reporting is disabled for the bank
3170          */
3171         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3172                 return 0;
3173         if (mce->status & MCI_STATUS_UC) {
3174                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3175                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3176                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3177                         return 0;
3178                 }
3179                 if (banks[1] & MCI_STATUS_VAL)
3180                         mce->status |= MCI_STATUS_OVER;
3181                 banks[2] = mce->addr;
3182                 banks[3] = mce->misc;
3183                 vcpu->arch.mcg_status = mce->mcg_status;
3184                 banks[1] = mce->status;
3185                 kvm_queue_exception(vcpu, MC_VECTOR);
3186         } else if (!(banks[1] & MCI_STATUS_VAL)
3187                    || !(banks[1] & MCI_STATUS_UC)) {
3188                 if (banks[1] & MCI_STATUS_VAL)
3189                         mce->status |= MCI_STATUS_OVER;
3190                 banks[2] = mce->addr;
3191                 banks[3] = mce->misc;
3192                 banks[1] = mce->status;
3193         } else
3194                 banks[1] |= MCI_STATUS_OVER;
3195         return 0;
3196 }
3197
3198 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3199                                                struct kvm_vcpu_events *events)
3200 {
3201         process_nmi(vcpu);
3202         /*
3203          * FIXME: pass injected and pending separately.  This is only
3204          * needed for nested virtualization, whose state cannot be
3205          * migrated yet.  For now we can combine them.
3206          */
3207         events->exception.injected =
3208                 (vcpu->arch.exception.pending ||
3209                  vcpu->arch.exception.injected) &&
3210                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3211         events->exception.nr = vcpu->arch.exception.nr;
3212         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3213         events->exception.pad = 0;
3214         events->exception.error_code = vcpu->arch.exception.error_code;
3215
3216         events->interrupt.injected =
3217                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3218         events->interrupt.nr = vcpu->arch.interrupt.nr;
3219         events->interrupt.soft = 0;
3220         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3221
3222         events->nmi.injected = vcpu->arch.nmi_injected;
3223         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3224         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3225         events->nmi.pad = 0;
3226
3227         events->sipi_vector = 0; /* never valid when reporting to user space */
3228
3229         events->smi.smm = is_smm(vcpu);
3230         events->smi.pending = vcpu->arch.smi_pending;
3231         events->smi.smm_inside_nmi =
3232                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3233         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3234
3235         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3236                          | KVM_VCPUEVENT_VALID_SHADOW
3237                          | KVM_VCPUEVENT_VALID_SMM);
3238         memset(&events->reserved, 0, sizeof(events->reserved));
3239 }
3240
3241 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3242
3243 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3244                                               struct kvm_vcpu_events *events)
3245 {
3246         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3247                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3248                               | KVM_VCPUEVENT_VALID_SHADOW
3249                               | KVM_VCPUEVENT_VALID_SMM))
3250                 return -EINVAL;
3251
3252         if (events->exception.injected &&
3253             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3254              is_guest_mode(vcpu)))
3255                 return -EINVAL;
3256
3257         /* INITs are latched while in SMM */
3258         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3259             (events->smi.smm || events->smi.pending) &&
3260             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3261                 return -EINVAL;
3262
3263         process_nmi(vcpu);
3264         vcpu->arch.exception.injected = false;
3265         vcpu->arch.exception.pending = events->exception.injected;
3266         vcpu->arch.exception.nr = events->exception.nr;
3267         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3268         vcpu->arch.exception.error_code = events->exception.error_code;
3269
3270         vcpu->arch.interrupt.pending = events->interrupt.injected;
3271         vcpu->arch.interrupt.nr = events->interrupt.nr;
3272         vcpu->arch.interrupt.soft = events->interrupt.soft;
3273         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3274                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3275                                                   events->interrupt.shadow);
3276
3277         vcpu->arch.nmi_injected = events->nmi.injected;
3278         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3279                 vcpu->arch.nmi_pending = events->nmi.pending;
3280         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3281
3282         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3283             lapic_in_kernel(vcpu))
3284                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3285
3286         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3287                 u32 hflags = vcpu->arch.hflags;
3288                 if (events->smi.smm)
3289                         hflags |= HF_SMM_MASK;
3290                 else
3291                         hflags &= ~HF_SMM_MASK;
3292                 kvm_set_hflags(vcpu, hflags);
3293
3294                 vcpu->arch.smi_pending = events->smi.pending;
3295
3296                 if (events->smi.smm) {
3297                         if (events->smi.smm_inside_nmi)
3298                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3299                         else
3300                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3301                         if (lapic_in_kernel(vcpu)) {
3302                                 if (events->smi.latched_init)
3303                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3304                                 else
3305                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3306                         }
3307                 }
3308         }
3309
3310         kvm_make_request(KVM_REQ_EVENT, vcpu);
3311
3312         return 0;
3313 }
3314
3315 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3316                                              struct kvm_debugregs *dbgregs)
3317 {
3318         unsigned long val;
3319
3320         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3321         kvm_get_dr(vcpu, 6, &val);
3322         dbgregs->dr6 = val;
3323         dbgregs->dr7 = vcpu->arch.dr7;
3324         dbgregs->flags = 0;
3325         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3326 }
3327
3328 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3329                                             struct kvm_debugregs *dbgregs)
3330 {
3331         if (dbgregs->flags)
3332                 return -EINVAL;
3333
3334         if (dbgregs->dr6 & ~0xffffffffull)
3335                 return -EINVAL;
3336         if (dbgregs->dr7 & ~0xffffffffull)
3337                 return -EINVAL;
3338
3339         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3340         kvm_update_dr0123(vcpu);
3341         vcpu->arch.dr6 = dbgregs->dr6;
3342         kvm_update_dr6(vcpu);
3343         vcpu->arch.dr7 = dbgregs->dr7;
3344         kvm_update_dr7(vcpu);
3345
3346         return 0;
3347 }
3348
3349 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3350
3351 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3352 {
3353         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3354         u64 xstate_bv = xsave->header.xfeatures;
3355         u64 valid;
3356
3357         /*
3358          * Copy legacy XSAVE area, to avoid complications with CPUID
3359          * leaves 0 and 1 in the loop below.
3360          */
3361         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3362
3363         /* Set XSTATE_BV */
3364         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3365         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3366
3367         /*
3368          * Copy each region from the possibly compacted offset to the
3369          * non-compacted offset.
3370          */
3371         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3372         while (valid) {
3373                 u64 feature = valid & -valid;
3374                 int index = fls64(feature) - 1;
3375                 void *src = get_xsave_addr(xsave, feature);
3376
3377                 if (src) {
3378                         u32 size, offset, ecx, edx;
3379                         cpuid_count(XSTATE_CPUID, index,
3380                                     &size, &offset, &ecx, &edx);
3381                         if (feature == XFEATURE_MASK_PKRU)
3382                                 memcpy(dest + offset, &vcpu->arch.pkru,
3383                                        sizeof(vcpu->arch.pkru));
3384                         else
3385                                 memcpy(dest + offset, src, size);
3386
3387                 }
3388
3389                 valid -= feature;
3390         }
3391 }
3392
3393 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3394 {
3395         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3396         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3397         u64 valid;
3398
3399         /*
3400          * Copy legacy XSAVE area, to avoid complications with CPUID
3401          * leaves 0 and 1 in the loop below.
3402          */
3403         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3404
3405         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3406         xsave->header.xfeatures = xstate_bv;
3407         if (boot_cpu_has(X86_FEATURE_XSAVES))
3408                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3409
3410         /*
3411          * Copy each region from the non-compacted offset to the
3412          * possibly compacted offset.
3413          */
3414         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3415         while (valid) {
3416                 u64 feature = valid & -valid;
3417                 int index = fls64(feature) - 1;
3418                 void *dest = get_xsave_addr(xsave, feature);
3419
3420                 if (dest) {
3421                         u32 size, offset, ecx, edx;
3422                         cpuid_count(XSTATE_CPUID, index,
3423                                     &size, &offset, &ecx, &edx);
3424                         if (feature == XFEATURE_MASK_PKRU)
3425                                 memcpy(&vcpu->arch.pkru, src + offset,
3426                                        sizeof(vcpu->arch.pkru));
3427                         else
3428                                 memcpy(dest, src + offset, size);
3429                 }
3430
3431                 valid -= feature;
3432         }
3433 }
3434
3435 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3436                                          struct kvm_xsave *guest_xsave)
3437 {
3438         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3439                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3440                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3441         } else {
3442                 memcpy(guest_xsave->region,
3443                         &vcpu->arch.guest_fpu.state.fxsave,
3444                         sizeof(struct fxregs_state));
3445                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3446                         XFEATURE_MASK_FPSSE;
3447         }
3448 }
3449
3450 #define XSAVE_MXCSR_OFFSET 24
3451
3452 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3453                                         struct kvm_xsave *guest_xsave)
3454 {
3455         u64 xstate_bv =
3456                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3457         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3458
3459         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3460                 /*
3461                  * Here we allow setting states that are not present in
3462                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3463                  * with old userspace.
3464                  */
3465                 if (xstate_bv & ~kvm_supported_xcr0() ||
3466                         mxcsr & ~mxcsr_feature_mask)
3467                         return -EINVAL;
3468                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3469         } else {
3470                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3471                         mxcsr & ~mxcsr_feature_mask)
3472                         return -EINVAL;
3473                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3474                         guest_xsave->region, sizeof(struct fxregs_state));
3475         }
3476         return 0;
3477 }
3478
3479 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3480                                         struct kvm_xcrs *guest_xcrs)
3481 {
3482         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3483                 guest_xcrs->nr_xcrs = 0;
3484                 return;
3485         }
3486
3487         guest_xcrs->nr_xcrs = 1;
3488         guest_xcrs->flags = 0;
3489         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3490         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3491 }
3492
3493 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3494                                        struct kvm_xcrs *guest_xcrs)
3495 {
3496         int i, r = 0;
3497
3498         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3499                 return -EINVAL;
3500
3501         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3502                 return -EINVAL;
3503
3504         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3505                 /* Only support XCR0 currently */
3506                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3507                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3508                                 guest_xcrs->xcrs[i].value);
3509                         break;
3510                 }
3511         if (r)
3512                 r = -EINVAL;
3513         return r;
3514 }
3515
3516 /*
3517  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3518  * stopped by the hypervisor.  This function will be called from the host only.
3519  * EINVAL is returned when the host attempts to set the flag for a guest that
3520  * does not support pv clocks.
3521  */
3522 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3523 {
3524         if (!vcpu->arch.pv_time_enabled)
3525                 return -EINVAL;
3526         vcpu->arch.pvclock_set_guest_stopped_request = true;
3527         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3528         return 0;
3529 }
3530
3531 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3532                                      struct kvm_enable_cap *cap)
3533 {
3534         if (cap->flags)
3535                 return -EINVAL;
3536
3537         switch (cap->cap) {
3538         case KVM_CAP_HYPERV_SYNIC2:
3539                 if (cap->args[0])
3540                         return -EINVAL;
3541         case KVM_CAP_HYPERV_SYNIC:
3542                 if (!irqchip_in_kernel(vcpu->kvm))
3543                         return -EINVAL;
3544                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3545                                              KVM_CAP_HYPERV_SYNIC2);
3546         default:
3547                 return -EINVAL;
3548         }
3549 }
3550
3551 long kvm_arch_vcpu_ioctl(struct file *filp,
3552                          unsigned int ioctl, unsigned long arg)
3553 {
3554         struct kvm_vcpu *vcpu = filp->private_data;
3555         void __user *argp = (void __user *)arg;
3556         int r;
3557         union {
3558                 struct kvm_lapic_state *lapic;
3559                 struct kvm_xsave *xsave;
3560                 struct kvm_xcrs *xcrs;
3561                 void *buffer;
3562         } u;
3563
3564         u.buffer = NULL;
3565         switch (ioctl) {
3566         case KVM_GET_LAPIC: {
3567                 r = -EINVAL;
3568                 if (!lapic_in_kernel(vcpu))
3569                         goto out;
3570                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3571
3572                 r = -ENOMEM;
3573                 if (!u.lapic)
3574                         goto out;
3575                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3576                 if (r)
3577                         goto out;
3578                 r = -EFAULT;
3579                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3580                         goto out;
3581                 r = 0;
3582                 break;
3583         }
3584         case KVM_SET_LAPIC: {
3585                 r = -EINVAL;
3586                 if (!lapic_in_kernel(vcpu))
3587                         goto out;
3588                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3589                 if (IS_ERR(u.lapic))
3590                         return PTR_ERR(u.lapic);
3591
3592                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3593                 break;
3594         }
3595         case KVM_INTERRUPT: {
3596                 struct kvm_interrupt irq;
3597
3598                 r = -EFAULT;
3599                 if (copy_from_user(&irq, argp, sizeof irq))
3600                         goto out;
3601                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3602                 break;
3603         }
3604         case KVM_NMI: {
3605                 r = kvm_vcpu_ioctl_nmi(vcpu);
3606                 break;
3607         }
3608         case KVM_SMI: {
3609                 r = kvm_vcpu_ioctl_smi(vcpu);
3610                 break;
3611         }
3612         case KVM_SET_CPUID: {
3613                 struct kvm_cpuid __user *cpuid_arg = argp;
3614                 struct kvm_cpuid cpuid;
3615
3616                 r = -EFAULT;
3617                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3618                         goto out;
3619                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3620                 break;
3621         }
3622         case KVM_SET_CPUID2: {
3623                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3624                 struct kvm_cpuid2 cpuid;
3625
3626                 r = -EFAULT;
3627                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3628                         goto out;
3629                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3630                                               cpuid_arg->entries);
3631                 break;
3632         }
3633         case KVM_GET_CPUID2: {
3634                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3635                 struct kvm_cpuid2 cpuid;
3636
3637                 r = -EFAULT;
3638                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3639                         goto out;
3640                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3641                                               cpuid_arg->entries);
3642                 if (r)
3643                         goto out;
3644                 r = -EFAULT;
3645                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3646                         goto out;
3647                 r = 0;
3648                 break;
3649         }
3650         case KVM_GET_MSRS: {
3651                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3652                 r = msr_io(vcpu, argp, do_get_msr, 1);
3653                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3654                 break;
3655         }
3656         case KVM_SET_MSRS: {
3657                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3658                 r = msr_io(vcpu, argp, do_set_msr, 0);
3659                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3660                 break;
3661         }
3662         case KVM_TPR_ACCESS_REPORTING: {
3663                 struct kvm_tpr_access_ctl tac;
3664
3665                 r = -EFAULT;
3666                 if (copy_from_user(&tac, argp, sizeof tac))
3667                         goto out;
3668                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3669                 if (r)
3670                         goto out;
3671                 r = -EFAULT;
3672                 if (copy_to_user(argp, &tac, sizeof tac))
3673                         goto out;
3674                 r = 0;
3675                 break;
3676         };
3677         case KVM_SET_VAPIC_ADDR: {
3678                 struct kvm_vapic_addr va;
3679                 int idx;
3680
3681                 r = -EINVAL;
3682                 if (!lapic_in_kernel(vcpu))
3683                         goto out;
3684                 r = -EFAULT;
3685                 if (copy_from_user(&va, argp, sizeof va))
3686                         goto out;
3687                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3688                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3689                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3690                 break;
3691         }
3692         case KVM_X86_SETUP_MCE: {
3693                 u64 mcg_cap;
3694
3695                 r = -EFAULT;
3696                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3697                         goto out;
3698                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3699                 break;
3700         }
3701         case KVM_X86_SET_MCE: {
3702                 struct kvm_x86_mce mce;
3703
3704                 r = -EFAULT;
3705                 if (copy_from_user(&mce, argp, sizeof mce))
3706                         goto out;
3707                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3708                 break;
3709         }
3710         case KVM_GET_VCPU_EVENTS: {
3711                 struct kvm_vcpu_events events;
3712
3713                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3714
3715                 r = -EFAULT;
3716                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3717                         break;
3718                 r = 0;
3719                 break;
3720         }
3721         case KVM_SET_VCPU_EVENTS: {
3722                 struct kvm_vcpu_events events;
3723
3724                 r = -EFAULT;
3725                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3726                         break;
3727
3728                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3729                 break;
3730         }
3731         case KVM_GET_DEBUGREGS: {
3732                 struct kvm_debugregs dbgregs;
3733
3734                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3735
3736                 r = -EFAULT;
3737                 if (copy_to_user(argp, &dbgregs,
3738                                  sizeof(struct kvm_debugregs)))
3739                         break;
3740                 r = 0;
3741                 break;
3742         }
3743         case KVM_SET_DEBUGREGS: {
3744                 struct kvm_debugregs dbgregs;
3745
3746                 r = -EFAULT;
3747                 if (copy_from_user(&dbgregs, argp,
3748                                    sizeof(struct kvm_debugregs)))
3749                         break;
3750
3751                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3752                 break;
3753         }
3754         case KVM_GET_XSAVE: {
3755                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3756                 r = -ENOMEM;
3757                 if (!u.xsave)
3758                         break;
3759
3760                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3761
3762                 r = -EFAULT;
3763                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3764                         break;
3765                 r = 0;
3766                 break;
3767         }
3768         case KVM_SET_XSAVE: {
3769                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3770                 if (IS_ERR(u.xsave))
3771                         return PTR_ERR(u.xsave);
3772
3773                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3774                 break;
3775         }
3776         case KVM_GET_XCRS: {
3777                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3778                 r = -ENOMEM;
3779                 if (!u.xcrs)
3780                         break;
3781
3782                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3783
3784                 r = -EFAULT;
3785                 if (copy_to_user(argp, u.xcrs,
3786                                  sizeof(struct kvm_xcrs)))
3787                         break;
3788                 r = 0;
3789                 break;
3790         }
3791         case KVM_SET_XCRS: {
3792                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3793                 if (IS_ERR(u.xcrs))
3794                         return PTR_ERR(u.xcrs);
3795
3796                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3797                 break;
3798         }
3799         case KVM_SET_TSC_KHZ: {
3800                 u32 user_tsc_khz;
3801
3802                 r = -EINVAL;
3803                 user_tsc_khz = (u32)arg;
3804
3805                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3806                         goto out;
3807
3808                 if (user_tsc_khz == 0)
3809                         user_tsc_khz = tsc_khz;
3810
3811                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3812                         r = 0;
3813
3814                 goto out;
3815         }
3816         case KVM_GET_TSC_KHZ: {
3817                 r = vcpu->arch.virtual_tsc_khz;
3818                 goto out;
3819         }
3820         case KVM_KVMCLOCK_CTRL: {
3821                 r = kvm_set_guest_paused(vcpu);
3822                 goto out;
3823         }
3824         case KVM_ENABLE_CAP: {
3825                 struct kvm_enable_cap cap;
3826
3827                 r = -EFAULT;
3828                 if (copy_from_user(&cap, argp, sizeof(cap)))
3829                         goto out;
3830                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3831                 break;
3832         }
3833         default:
3834                 r = -EINVAL;
3835         }
3836 out:
3837         kfree(u.buffer);
3838         return r;
3839 }
3840
3841 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3842 {
3843         return VM_FAULT_SIGBUS;
3844 }
3845
3846 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3847 {
3848         int ret;
3849
3850         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3851                 return -EINVAL;
3852         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3853         return ret;
3854 }
3855
3856 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3857                                               u64 ident_addr)
3858 {
3859         kvm->arch.ept_identity_map_addr = ident_addr;
3860         return 0;
3861 }
3862
3863 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3864                                           u32 kvm_nr_mmu_pages)
3865 {
3866         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3867                 return -EINVAL;
3868
3869         mutex_lock(&kvm->slots_lock);
3870
3871         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3872         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3873
3874         mutex_unlock(&kvm->slots_lock);
3875         return 0;
3876 }
3877
3878 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3879 {
3880         return kvm->arch.n_max_mmu_pages;
3881 }
3882
3883 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3884 {
3885         struct kvm_pic *pic = kvm->arch.vpic;
3886         int r;
3887
3888         r = 0;
3889         switch (chip->chip_id) {
3890         case KVM_IRQCHIP_PIC_MASTER:
3891                 memcpy(&chip->chip.pic, &pic->pics[0],
3892                         sizeof(struct kvm_pic_state));
3893                 break;
3894         case KVM_IRQCHIP_PIC_SLAVE:
3895                 memcpy(&chip->chip.pic, &pic->pics[1],
3896                         sizeof(struct kvm_pic_state));
3897                 break;
3898         case KVM_IRQCHIP_IOAPIC:
3899                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3900                 break;
3901         default:
3902                 r = -EINVAL;
3903                 break;
3904         }
3905         return r;
3906 }
3907
3908 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3909 {
3910         struct kvm_pic *pic = kvm->arch.vpic;
3911         int r;
3912
3913         r = 0;
3914         switch (chip->chip_id) {
3915         case KVM_IRQCHIP_PIC_MASTER:
3916                 spin_lock(&pic->lock);
3917                 memcpy(&pic->pics[0], &chip->chip.pic,
3918                         sizeof(struct kvm_pic_state));
3919                 spin_unlock(&pic->lock);
3920                 break;
3921         case KVM_IRQCHIP_PIC_SLAVE:
3922                 spin_lock(&pic->lock);
3923                 memcpy(&pic->pics[1], &chip->chip.pic,
3924                         sizeof(struct kvm_pic_state));
3925                 spin_unlock(&pic->lock);
3926                 break;
3927         case KVM_IRQCHIP_IOAPIC:
3928                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3929                 break;
3930         default:
3931                 r = -EINVAL;
3932                 break;
3933         }
3934         kvm_pic_update_irq(pic);
3935         return r;
3936 }
3937
3938 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3939 {
3940         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3941
3942         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3943
3944         mutex_lock(&kps->lock);
3945         memcpy(ps, &kps->channels, sizeof(*ps));
3946         mutex_unlock(&kps->lock);
3947         return 0;
3948 }
3949
3950 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3951 {
3952         int i;
3953         struct kvm_pit *pit = kvm->arch.vpit;
3954
3955         mutex_lock(&pit->pit_state.lock);
3956         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3957         for (i = 0; i < 3; i++)
3958                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3959         mutex_unlock(&pit->pit_state.lock);
3960         return 0;
3961 }
3962
3963 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3964 {
3965         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3966         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3967                 sizeof(ps->channels));
3968         ps->flags = kvm->arch.vpit->pit_state.flags;
3969         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3970         memset(&ps->reserved, 0, sizeof(ps->reserved));
3971         return 0;
3972 }
3973
3974 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3975 {
3976         int start = 0;
3977         int i;
3978         u32 prev_legacy, cur_legacy;
3979         struct kvm_pit *pit = kvm->arch.vpit;
3980
3981         mutex_lock(&pit->pit_state.lock);
3982         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3983         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3984         if (!prev_legacy && cur_legacy)
3985                 start = 1;
3986         memcpy(&pit->pit_state.channels, &ps->channels,
3987                sizeof(pit->pit_state.channels));
3988         pit->pit_state.flags = ps->flags;
3989         for (i = 0; i < 3; i++)
3990                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3991                                    start && i == 0);
3992         mutex_unlock(&pit->pit_state.lock);
3993         return 0;
3994 }
3995
3996 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3997                                  struct kvm_reinject_control *control)
3998 {
3999         struct kvm_pit *pit = kvm->arch.vpit;
4000
4001         if (!pit)
4002                 return -ENXIO;
4003
4004         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4005          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4006          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4007          */
4008         mutex_lock(&pit->pit_state.lock);
4009         kvm_pit_set_reinject(pit, control->pit_reinject);
4010         mutex_unlock(&pit->pit_state.lock);
4011
4012         return 0;
4013 }
4014
4015 /**
4016  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4017  * @kvm: kvm instance
4018  * @log: slot id and address to which we copy the log
4019  *
4020  * Steps 1-4 below provide general overview of dirty page logging. See
4021  * kvm_get_dirty_log_protect() function description for additional details.
4022  *
4023  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4024  * always flush the TLB (step 4) even if previous step failed  and the dirty
4025  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4026  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4027  * writes will be marked dirty for next log read.
4028  *
4029  *   1. Take a snapshot of the bit and clear it if needed.
4030  *   2. Write protect the corresponding page.
4031  *   3. Copy the snapshot to the userspace.
4032  *   4. Flush TLB's if needed.
4033  */
4034 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4035 {
4036         bool is_dirty = false;
4037         int r;
4038
4039         mutex_lock(&kvm->slots_lock);
4040
4041         /*
4042          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4043          */
4044         if (kvm_x86_ops->flush_log_dirty)
4045                 kvm_x86_ops->flush_log_dirty(kvm);
4046
4047         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4048
4049         /*
4050          * All the TLBs can be flushed out of mmu lock, see the comments in
4051          * kvm_mmu_slot_remove_write_access().
4052          */
4053         lockdep_assert_held(&kvm->slots_lock);
4054         if (is_dirty)
4055                 kvm_flush_remote_tlbs(kvm);
4056
4057         mutex_unlock(&kvm->slots_lock);
4058         return r;
4059 }
4060
4061 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4062                         bool line_status)
4063 {
4064         if (!irqchip_in_kernel(kvm))
4065                 return -ENXIO;
4066
4067         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4068                                         irq_event->irq, irq_event->level,
4069                                         line_status);
4070         return 0;
4071 }
4072
4073 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4074                                    struct kvm_enable_cap *cap)
4075 {
4076         int r;
4077
4078         if (cap->flags)
4079                 return -EINVAL;
4080
4081         switch (cap->cap) {
4082         case KVM_CAP_DISABLE_QUIRKS:
4083                 kvm->arch.disabled_quirks = cap->args[0];
4084                 r = 0;
4085                 break;
4086         case KVM_CAP_SPLIT_IRQCHIP: {
4087                 mutex_lock(&kvm->lock);
4088                 r = -EINVAL;
4089                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4090                         goto split_irqchip_unlock;
4091                 r = -EEXIST;
4092                 if (irqchip_in_kernel(kvm))
4093                         goto split_irqchip_unlock;
4094                 if (kvm->created_vcpus)
4095                         goto split_irqchip_unlock;
4096                 r = kvm_setup_empty_irq_routing(kvm);
4097                 if (r)
4098                         goto split_irqchip_unlock;
4099                 /* Pairs with irqchip_in_kernel. */
4100                 smp_wmb();
4101                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4102                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4103                 r = 0;
4104 split_irqchip_unlock:
4105                 mutex_unlock(&kvm->lock);
4106                 break;
4107         }
4108         case KVM_CAP_X2APIC_API:
4109                 r = -EINVAL;
4110                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4111                         break;
4112
4113                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4114                         kvm->arch.x2apic_format = true;
4115                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4116                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4117
4118                 r = 0;
4119                 break;
4120         default:
4121                 r = -EINVAL;
4122                 break;
4123         }
4124         return r;
4125 }
4126
4127 long kvm_arch_vm_ioctl(struct file *filp,
4128                        unsigned int ioctl, unsigned long arg)
4129 {
4130         struct kvm *kvm = filp->private_data;
4131         void __user *argp = (void __user *)arg;
4132         int r = -ENOTTY;
4133         /*
4134          * This union makes it completely explicit to gcc-3.x
4135          * that these two variables' stack usage should be
4136          * combined, not added together.
4137          */
4138         union {
4139                 struct kvm_pit_state ps;
4140                 struct kvm_pit_state2 ps2;
4141                 struct kvm_pit_config pit_config;
4142         } u;
4143
4144         switch (ioctl) {
4145         case KVM_SET_TSS_ADDR:
4146                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4147                 break;
4148         case KVM_SET_IDENTITY_MAP_ADDR: {
4149                 u64 ident_addr;
4150
4151                 r = -EFAULT;
4152                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4153                         goto out;
4154                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4155                 break;
4156         }
4157         case KVM_SET_NR_MMU_PAGES:
4158                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4159                 break;
4160         case KVM_GET_NR_MMU_PAGES:
4161                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4162                 break;
4163         case KVM_CREATE_IRQCHIP: {
4164                 mutex_lock(&kvm->lock);
4165
4166                 r = -EEXIST;
4167                 if (irqchip_in_kernel(kvm))
4168                         goto create_irqchip_unlock;
4169
4170                 r = -EINVAL;
4171                 if (kvm->created_vcpus)
4172                         goto create_irqchip_unlock;
4173
4174                 r = kvm_pic_init(kvm);
4175                 if (r)
4176                         goto create_irqchip_unlock;
4177
4178                 r = kvm_ioapic_init(kvm);
4179                 if (r) {
4180                         kvm_pic_destroy(kvm);
4181                         goto create_irqchip_unlock;
4182                 }
4183
4184                 r = kvm_setup_default_irq_routing(kvm);
4185                 if (r) {
4186                         kvm_ioapic_destroy(kvm);
4187                         kvm_pic_destroy(kvm);
4188                         goto create_irqchip_unlock;
4189                 }
4190                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4191                 smp_wmb();
4192                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4193         create_irqchip_unlock:
4194                 mutex_unlock(&kvm->lock);
4195                 break;
4196         }
4197         case KVM_CREATE_PIT:
4198                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4199                 goto create_pit;
4200         case KVM_CREATE_PIT2:
4201                 r = -EFAULT;
4202                 if (copy_from_user(&u.pit_config, argp,
4203                                    sizeof(struct kvm_pit_config)))
4204                         goto out;
4205         create_pit:
4206                 mutex_lock(&kvm->lock);
4207                 r = -EEXIST;
4208                 if (kvm->arch.vpit)
4209                         goto create_pit_unlock;
4210                 r = -ENOMEM;
4211                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4212                 if (kvm->arch.vpit)
4213                         r = 0;
4214         create_pit_unlock:
4215                 mutex_unlock(&kvm->lock);
4216                 break;
4217         case KVM_GET_IRQCHIP: {
4218                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4219                 struct kvm_irqchip *chip;
4220
4221                 chip = memdup_user(argp, sizeof(*chip));
4222                 if (IS_ERR(chip)) {
4223                         r = PTR_ERR(chip);
4224                         goto out;
4225                 }
4226
4227                 r = -ENXIO;
4228                 if (!irqchip_kernel(kvm))
4229                         goto get_irqchip_out;
4230                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4231                 if (r)
4232                         goto get_irqchip_out;
4233                 r = -EFAULT;
4234                 if (copy_to_user(argp, chip, sizeof *chip))
4235                         goto get_irqchip_out;
4236                 r = 0;
4237         get_irqchip_out:
4238                 kfree(chip);
4239                 break;
4240         }
4241         case KVM_SET_IRQCHIP: {
4242                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4243                 struct kvm_irqchip *chip;
4244
4245                 chip = memdup_user(argp, sizeof(*chip));
4246                 if (IS_ERR(chip)) {
4247                         r = PTR_ERR(chip);
4248                         goto out;
4249                 }
4250
4251                 r = -ENXIO;
4252                 if (!irqchip_kernel(kvm))
4253                         goto set_irqchip_out;
4254                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4255                 if (r)
4256                         goto set_irqchip_out;
4257                 r = 0;
4258         set_irqchip_out:
4259                 kfree(chip);
4260                 break;
4261         }
4262         case KVM_GET_PIT: {
4263                 r = -EFAULT;
4264                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4265                         goto out;
4266                 r = -ENXIO;
4267                 if (!kvm->arch.vpit)
4268                         goto out;
4269                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4270                 if (r)
4271                         goto out;
4272                 r = -EFAULT;
4273                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4274                         goto out;
4275                 r = 0;
4276                 break;
4277         }
4278         case KVM_SET_PIT: {
4279                 r = -EFAULT;
4280                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4281                         goto out;
4282                 r = -ENXIO;
4283                 if (!kvm->arch.vpit)
4284                         goto out;
4285                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4286                 break;
4287         }
4288         case KVM_GET_PIT2: {
4289                 r = -ENXIO;
4290                 if (!kvm->arch.vpit)
4291                         goto out;
4292                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4293                 if (r)
4294                         goto out;
4295                 r = -EFAULT;
4296                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4297                         goto out;
4298                 r = 0;
4299                 break;
4300         }
4301         case KVM_SET_PIT2: {
4302                 r = -EFAULT;
4303                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4304                         goto out;
4305                 r = -ENXIO;
4306                 if (!kvm->arch.vpit)
4307                         goto out;
4308                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4309                 break;
4310         }
4311         case KVM_REINJECT_CONTROL: {
4312                 struct kvm_reinject_control control;
4313                 r =  -EFAULT;
4314                 if (copy_from_user(&control, argp, sizeof(control)))
4315                         goto out;
4316                 r = kvm_vm_ioctl_reinject(kvm, &control);
4317                 break;
4318         }
4319         case KVM_SET_BOOT_CPU_ID:
4320                 r = 0;
4321                 mutex_lock(&kvm->lock);
4322                 if (kvm->created_vcpus)
4323                         r = -EBUSY;
4324                 else
4325                         kvm->arch.bsp_vcpu_id = arg;
4326                 mutex_unlock(&kvm->lock);
4327                 break;
4328         case KVM_XEN_HVM_CONFIG: {
4329                 struct kvm_xen_hvm_config xhc;
4330                 r = -EFAULT;
4331                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4332                         goto out;
4333                 r = -EINVAL;
4334                 if (xhc.flags)
4335                         goto out;
4336                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4337                 r = 0;
4338                 break;
4339         }
4340         case KVM_SET_CLOCK: {
4341                 struct kvm_clock_data user_ns;
4342                 u64 now_ns;
4343
4344                 r = -EFAULT;
4345                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4346                         goto out;
4347
4348                 r = -EINVAL;
4349                 if (user_ns.flags)
4350                         goto out;
4351
4352                 r = 0;
4353                 /*
4354                  * TODO: userspace has to take care of races with VCPU_RUN, so
4355                  * kvm_gen_update_masterclock() can be cut down to locked
4356                  * pvclock_update_vm_gtod_copy().
4357                  */
4358                 kvm_gen_update_masterclock(kvm);
4359                 now_ns = get_kvmclock_ns(kvm);
4360                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4361                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4362                 break;
4363         }
4364         case KVM_GET_CLOCK: {
4365                 struct kvm_clock_data user_ns;
4366                 u64 now_ns;
4367
4368                 now_ns = get_kvmclock_ns(kvm);
4369                 user_ns.clock = now_ns;
4370                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4371                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4372
4373                 r = -EFAULT;
4374                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4375                         goto out;
4376                 r = 0;
4377                 break;
4378         }
4379         case KVM_ENABLE_CAP: {
4380                 struct kvm_enable_cap cap;
4381
4382                 r = -EFAULT;
4383                 if (copy_from_user(&cap, argp, sizeof(cap)))
4384                         goto out;
4385                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4386                 break;
4387         }
4388         default:
4389                 r = -ENOTTY;
4390         }
4391 out:
4392         return r;
4393 }
4394
4395 static void kvm_init_msr_list(void)
4396 {
4397         u32 dummy[2];
4398         unsigned i, j;
4399
4400         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4401                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4402                         continue;
4403
4404                 /*
4405                  * Even MSRs that are valid in the host may not be exposed
4406                  * to the guests in some cases.
4407                  */
4408                 switch (msrs_to_save[i]) {
4409                 case MSR_IA32_BNDCFGS:
4410                         if (!kvm_x86_ops->mpx_supported())
4411                                 continue;
4412                         break;
4413                 case MSR_TSC_AUX:
4414                         if (!kvm_x86_ops->rdtscp_supported())
4415                                 continue;
4416                         break;
4417                 default:
4418                         break;
4419                 }
4420
4421                 if (j < i)
4422                         msrs_to_save[j] = msrs_to_save[i];
4423                 j++;
4424         }
4425         num_msrs_to_save = j;
4426
4427         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4428                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4429                         continue;
4430
4431                 if (j < i)
4432                         emulated_msrs[j] = emulated_msrs[i];
4433                 j++;
4434         }
4435         num_emulated_msrs = j;
4436
4437         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4438                 struct kvm_msr_entry msr;
4439
4440                 msr.index = msr_based_features[i];
4441                 if (kvm_get_msr_feature(&msr))
4442                         continue;
4443
4444                 if (j < i)
4445                         msr_based_features[j] = msr_based_features[i];
4446                 j++;
4447         }
4448         num_msr_based_features = j;
4449 }
4450
4451 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4452                            const void *v)
4453 {
4454         int handled = 0;
4455         int n;
4456
4457         do {
4458                 n = min(len, 8);
4459                 if (!(lapic_in_kernel(vcpu) &&
4460                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4461                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4462                         break;
4463                 handled += n;
4464                 addr += n;
4465                 len -= n;
4466                 v += n;
4467         } while (len);
4468
4469         return handled;
4470 }
4471
4472 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4473 {
4474         int handled = 0;
4475         int n;
4476
4477         do {
4478                 n = min(len, 8);
4479                 if (!(lapic_in_kernel(vcpu) &&
4480                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4481                                          addr, n, v))
4482                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4483                         break;
4484                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4485                 handled += n;
4486                 addr += n;
4487                 len -= n;
4488                 v += n;
4489         } while (len);
4490
4491         return handled;
4492 }
4493
4494 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4495                         struct kvm_segment *var, int seg)
4496 {
4497         kvm_x86_ops->set_segment(vcpu, var, seg);
4498 }
4499
4500 void kvm_get_segment(struct kvm_vcpu *vcpu,
4501                      struct kvm_segment *var, int seg)
4502 {
4503         kvm_x86_ops->get_segment(vcpu, var, seg);
4504 }
4505
4506 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4507                            struct x86_exception *exception)
4508 {
4509         gpa_t t_gpa;
4510
4511         BUG_ON(!mmu_is_nested(vcpu));
4512
4513         /* NPT walks are always user-walks */
4514         access |= PFERR_USER_MASK;
4515         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4516
4517         return t_gpa;
4518 }
4519
4520 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4521                               struct x86_exception *exception)
4522 {
4523         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4524         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4525 }
4526
4527  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4528                                 struct x86_exception *exception)
4529 {
4530         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4531         access |= PFERR_FETCH_MASK;
4532         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4533 }
4534
4535 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4536                                struct x86_exception *exception)
4537 {
4538         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4539         access |= PFERR_WRITE_MASK;
4540         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4541 }
4542
4543 /* uses this to access any guest's mapped memory without checking CPL */
4544 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4545                                 struct x86_exception *exception)
4546 {
4547         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4548 }
4549
4550 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4551                                       struct kvm_vcpu *vcpu, u32 access,
4552                                       struct x86_exception *exception)
4553 {
4554         void *data = val;
4555         int r = X86EMUL_CONTINUE;
4556
4557         while (bytes) {
4558                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4559                                                             exception);
4560                 unsigned offset = addr & (PAGE_SIZE-1);
4561                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4562                 int ret;
4563
4564                 if (gpa == UNMAPPED_GVA)
4565                         return X86EMUL_PROPAGATE_FAULT;
4566                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4567                                                offset, toread);
4568                 if (ret < 0) {
4569                         r = X86EMUL_IO_NEEDED;
4570                         goto out;
4571                 }
4572
4573                 bytes -= toread;
4574                 data += toread;
4575                 addr += toread;
4576         }
4577 out:
4578         return r;
4579 }
4580
4581 /* used for instruction fetching */
4582 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4583                                 gva_t addr, void *val, unsigned int bytes,
4584                                 struct x86_exception *exception)
4585 {
4586         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4587         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4588         unsigned offset;
4589         int ret;
4590
4591         /* Inline kvm_read_guest_virt_helper for speed.  */
4592         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4593                                                     exception);
4594         if (unlikely(gpa == UNMAPPED_GVA))
4595                 return X86EMUL_PROPAGATE_FAULT;
4596
4597         offset = addr & (PAGE_SIZE-1);
4598         if (WARN_ON(offset + bytes > PAGE_SIZE))
4599                 bytes = (unsigned)PAGE_SIZE - offset;
4600         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4601                                        offset, bytes);
4602         if (unlikely(ret < 0))
4603                 return X86EMUL_IO_NEEDED;
4604
4605         return X86EMUL_CONTINUE;
4606 }
4607
4608 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
4609                                gva_t addr, void *val, unsigned int bytes,
4610                                struct x86_exception *exception)
4611 {
4612         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4613
4614         /*
4615          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
4616          * is returned, but our callers are not ready for that and they blindly
4617          * call kvm_inject_page_fault.  Ensure that they at least do not leak
4618          * uninitialized kernel stack memory into cr2 and error code.
4619          */
4620         memset(exception, 0, sizeof(*exception));
4621         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4622                                           exception);
4623 }
4624 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4625
4626 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
4627                              gva_t addr, void *val, unsigned int bytes,
4628                              struct x86_exception *exception, bool system)
4629 {
4630         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4631         u32 access = 0;
4632
4633         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4634                 access |= PFERR_USER_MASK;
4635
4636         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
4637 }
4638
4639 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4640                 unsigned long addr, void *val, unsigned int bytes)
4641 {
4642         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4643         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4644
4645         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4646 }
4647
4648 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4649                                       struct kvm_vcpu *vcpu, u32 access,
4650                                       struct x86_exception *exception)
4651 {
4652         void *data = val;
4653         int r = X86EMUL_CONTINUE;
4654
4655         while (bytes) {
4656                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4657                                                              access,
4658                                                              exception);
4659                 unsigned offset = addr & (PAGE_SIZE-1);
4660                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4661                 int ret;
4662
4663                 if (gpa == UNMAPPED_GVA)
4664                         return X86EMUL_PROPAGATE_FAULT;
4665                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4666                 if (ret < 0) {
4667                         r = X86EMUL_IO_NEEDED;
4668                         goto out;
4669                 }
4670
4671                 bytes -= towrite;
4672                 data += towrite;
4673                 addr += towrite;
4674         }
4675 out:
4676         return r;
4677 }
4678
4679 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
4680                               unsigned int bytes, struct x86_exception *exception,
4681                               bool system)
4682 {
4683         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4684         u32 access = PFERR_WRITE_MASK;
4685
4686         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4687                 access |= PFERR_USER_MASK;
4688
4689         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4690                                            access, exception);
4691 }
4692
4693 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
4694                                 unsigned int bytes, struct x86_exception *exception)
4695 {
4696         /* kvm_write_guest_virt_system can pull in tons of pages. */
4697         vcpu->arch.l1tf_flush_l1d = true;
4698
4699         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4700                                            PFERR_WRITE_MASK, exception);
4701 }
4702 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4703
4704 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4705                             gpa_t gpa, bool write)
4706 {
4707         /* For APIC access vmexit */
4708         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4709                 return 1;
4710
4711         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4712                 trace_vcpu_match_mmio(gva, gpa, write, true);
4713                 return 1;
4714         }
4715
4716         return 0;
4717 }
4718
4719 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4720                                 gpa_t *gpa, struct x86_exception *exception,
4721                                 bool write)
4722 {
4723         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4724                 | (write ? PFERR_WRITE_MASK : 0);
4725
4726         /*
4727          * currently PKRU is only applied to ept enabled guest so
4728          * there is no pkey in EPT page table for L1 guest or EPT
4729          * shadow page table for L2 guest.
4730          */
4731         if (vcpu_match_mmio_gva(vcpu, gva)
4732             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4733                                  vcpu->arch.access, 0, access)) {
4734                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4735                                         (gva & (PAGE_SIZE - 1));
4736                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4737                 return 1;
4738         }
4739
4740         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4741
4742         if (*gpa == UNMAPPED_GVA)
4743                 return -1;
4744
4745         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4746 }
4747
4748 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4749                         const void *val, int bytes)
4750 {
4751         int ret;
4752
4753         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4754         if (ret < 0)
4755                 return 0;
4756         kvm_page_track_write(vcpu, gpa, val, bytes);
4757         return 1;
4758 }
4759
4760 struct read_write_emulator_ops {
4761         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4762                                   int bytes);
4763         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4764                                   void *val, int bytes);
4765         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4766                                int bytes, void *val);
4767         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4768                                     void *val, int bytes);
4769         bool write;
4770 };
4771
4772 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4773 {
4774         if (vcpu->mmio_read_completed) {
4775                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4776                                vcpu->mmio_fragments[0].gpa, val);
4777                 vcpu->mmio_read_completed = 0;
4778                 return 1;
4779         }
4780
4781         return 0;
4782 }
4783
4784 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4785                         void *val, int bytes)
4786 {
4787         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4788 }
4789
4790 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4791                          void *val, int bytes)
4792 {
4793         return emulator_write_phys(vcpu, gpa, val, bytes);
4794 }
4795
4796 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4797 {
4798         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4799         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4800 }
4801
4802 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4803                           void *val, int bytes)
4804 {
4805         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4806         return X86EMUL_IO_NEEDED;
4807 }
4808
4809 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4810                            void *val, int bytes)
4811 {
4812         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4813
4814         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4815         return X86EMUL_CONTINUE;
4816 }
4817
4818 static const struct read_write_emulator_ops read_emultor = {
4819         .read_write_prepare = read_prepare,
4820         .read_write_emulate = read_emulate,
4821         .read_write_mmio = vcpu_mmio_read,
4822         .read_write_exit_mmio = read_exit_mmio,
4823 };
4824
4825 static const struct read_write_emulator_ops write_emultor = {
4826         .read_write_emulate = write_emulate,
4827         .read_write_mmio = write_mmio,
4828         .read_write_exit_mmio = write_exit_mmio,
4829         .write = true,
4830 };
4831
4832 static int emulator_read_write_onepage(unsigned long addr, void *val,
4833                                        unsigned int bytes,
4834                                        struct x86_exception *exception,
4835                                        struct kvm_vcpu *vcpu,
4836                                        const struct read_write_emulator_ops *ops)
4837 {
4838         gpa_t gpa;
4839         int handled, ret;
4840         bool write = ops->write;
4841         struct kvm_mmio_fragment *frag;
4842         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4843
4844         /*
4845          * If the exit was due to a NPF we may already have a GPA.
4846          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4847          * Note, this cannot be used on string operations since string
4848          * operation using rep will only have the initial GPA from the NPF
4849          * occurred.
4850          */
4851         if (vcpu->arch.gpa_available &&
4852             emulator_can_use_gpa(ctxt) &&
4853             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4854                 gpa = vcpu->arch.gpa_val;
4855                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4856         } else {
4857                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4858                 if (ret < 0)
4859                         return X86EMUL_PROPAGATE_FAULT;
4860         }
4861
4862         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4863                 return X86EMUL_CONTINUE;
4864
4865         /*
4866          * Is this MMIO handled locally?
4867          */
4868         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4869         if (handled == bytes)
4870                 return X86EMUL_CONTINUE;
4871
4872         gpa += handled;
4873         bytes -= handled;
4874         val += handled;
4875
4876         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4877         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4878         frag->gpa = gpa;
4879         frag->data = val;
4880         frag->len = bytes;
4881         return X86EMUL_CONTINUE;
4882 }
4883
4884 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4885                         unsigned long addr,
4886                         void *val, unsigned int bytes,
4887                         struct x86_exception *exception,
4888                         const struct read_write_emulator_ops *ops)
4889 {
4890         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4891         gpa_t gpa;
4892         int rc;
4893
4894         if (ops->read_write_prepare &&
4895                   ops->read_write_prepare(vcpu, val, bytes))
4896                 return X86EMUL_CONTINUE;
4897
4898         vcpu->mmio_nr_fragments = 0;
4899
4900         /* Crossing a page boundary? */
4901         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4902                 int now;
4903
4904                 now = -addr & ~PAGE_MASK;
4905                 rc = emulator_read_write_onepage(addr, val, now, exception,
4906                                                  vcpu, ops);
4907
4908                 if (rc != X86EMUL_CONTINUE)
4909                         return rc;
4910                 addr += now;
4911                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4912                         addr = (u32)addr;
4913                 val += now;
4914                 bytes -= now;
4915         }
4916
4917         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4918                                          vcpu, ops);
4919         if (rc != X86EMUL_CONTINUE)
4920                 return rc;
4921
4922         if (!vcpu->mmio_nr_fragments)
4923                 return rc;
4924
4925         gpa = vcpu->mmio_fragments[0].gpa;
4926
4927         vcpu->mmio_needed = 1;
4928         vcpu->mmio_cur_fragment = 0;
4929
4930         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4931         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4932         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4933         vcpu->run->mmio.phys_addr = gpa;
4934
4935         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4936 }
4937
4938 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4939                                   unsigned long addr,
4940                                   void *val,
4941                                   unsigned int bytes,
4942                                   struct x86_exception *exception)
4943 {
4944         return emulator_read_write(ctxt, addr, val, bytes,
4945                                    exception, &read_emultor);
4946 }
4947
4948 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4949                             unsigned long addr,
4950                             const void *val,
4951                             unsigned int bytes,
4952                             struct x86_exception *exception)
4953 {
4954         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4955                                    exception, &write_emultor);
4956 }
4957
4958 #define CMPXCHG_TYPE(t, ptr, old, new) \
4959         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4960
4961 #ifdef CONFIG_X86_64
4962 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4963 #else
4964 #  define CMPXCHG64(ptr, old, new) \
4965         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4966 #endif
4967
4968 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4969                                      unsigned long addr,
4970                                      const void *old,
4971                                      const void *new,
4972                                      unsigned int bytes,
4973                                      struct x86_exception *exception)
4974 {
4975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4976         gpa_t gpa;
4977         struct page *page;
4978         char *kaddr;
4979         bool exchanged;
4980
4981         /* guests cmpxchg8b have to be emulated atomically */
4982         if (bytes > 8 || (bytes & (bytes - 1)))
4983                 goto emul_write;
4984
4985         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4986
4987         if (gpa == UNMAPPED_GVA ||
4988             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4989                 goto emul_write;
4990
4991         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4992                 goto emul_write;
4993
4994         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4995         if (is_error_page(page))
4996                 goto emul_write;
4997
4998         kaddr = kmap_atomic(page);
4999         kaddr += offset_in_page(gpa);
5000         switch (bytes) {
5001         case 1:
5002                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5003                 break;
5004         case 2:
5005                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5006                 break;
5007         case 4:
5008                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5009                 break;
5010         case 8:
5011                 exchanged = CMPXCHG64(kaddr, old, new);
5012                 break;
5013         default:
5014                 BUG();
5015         }
5016         kunmap_atomic(kaddr);
5017         kvm_release_page_dirty(page);
5018
5019         if (!exchanged)
5020                 return X86EMUL_CMPXCHG_FAILED;
5021
5022         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5023         kvm_page_track_write(vcpu, gpa, new, bytes);
5024
5025         return X86EMUL_CONTINUE;
5026
5027 emul_write:
5028         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5029
5030         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5031 }
5032
5033 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5034 {
5035         int r = 0, i;
5036
5037         for (i = 0; i < vcpu->arch.pio.count; i++) {
5038                 if (vcpu->arch.pio.in)
5039                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5040                                             vcpu->arch.pio.size, pd);
5041                 else
5042                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5043                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5044                                              pd);
5045                 if (r)
5046                         break;
5047                 pd += vcpu->arch.pio.size;
5048         }
5049         return r;
5050 }
5051
5052 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5053                                unsigned short port, void *val,
5054                                unsigned int count, bool in)
5055 {
5056         vcpu->arch.pio.port = port;
5057         vcpu->arch.pio.in = in;
5058         vcpu->arch.pio.count  = count;
5059         vcpu->arch.pio.size = size;
5060
5061         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5062                 vcpu->arch.pio.count = 0;
5063                 return 1;
5064         }
5065
5066         vcpu->run->exit_reason = KVM_EXIT_IO;
5067         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5068         vcpu->run->io.size = size;
5069         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5070         vcpu->run->io.count = count;
5071         vcpu->run->io.port = port;
5072
5073         return 0;
5074 }
5075
5076 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5077                                     int size, unsigned short port, void *val,
5078                                     unsigned int count)
5079 {
5080         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5081         int ret;
5082
5083         if (vcpu->arch.pio.count)
5084                 goto data_avail;
5085
5086         memset(vcpu->arch.pio_data, 0, size * count);
5087
5088         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5089         if (ret) {
5090 data_avail:
5091                 memcpy(val, vcpu->arch.pio_data, size * count);
5092                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5093                 vcpu->arch.pio.count = 0;
5094                 return 1;
5095         }
5096
5097         return 0;
5098 }
5099
5100 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5101                                      int size, unsigned short port,
5102                                      const void *val, unsigned int count)
5103 {
5104         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5105
5106         memcpy(vcpu->arch.pio_data, val, size * count);
5107         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5108         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5109 }
5110
5111 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5112 {
5113         return kvm_x86_ops->get_segment_base(vcpu, seg);
5114 }
5115
5116 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5117 {
5118         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5119 }
5120
5121 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5122 {
5123         if (!need_emulate_wbinvd(vcpu))
5124                 return X86EMUL_CONTINUE;
5125
5126         if (kvm_x86_ops->has_wbinvd_exit()) {
5127                 int cpu = get_cpu();
5128
5129                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5130                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5131                                 wbinvd_ipi, NULL, 1);
5132                 put_cpu();
5133                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5134         } else
5135                 wbinvd();
5136         return X86EMUL_CONTINUE;
5137 }
5138
5139 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5140 {
5141         kvm_emulate_wbinvd_noskip(vcpu);
5142         return kvm_skip_emulated_instruction(vcpu);
5143 }
5144 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5145
5146
5147
5148 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5149 {
5150         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5151 }
5152
5153 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5154                            unsigned long *dest)
5155 {
5156         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5157 }
5158
5159 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5160                            unsigned long value)
5161 {
5162
5163         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5164 }
5165
5166 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5167 {
5168         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5169 }
5170
5171 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5172 {
5173         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5174         unsigned long value;
5175
5176         switch (cr) {
5177         case 0:
5178                 value = kvm_read_cr0(vcpu);
5179                 break;
5180         case 2:
5181                 value = vcpu->arch.cr2;
5182                 break;
5183         case 3:
5184                 value = kvm_read_cr3(vcpu);
5185                 break;
5186         case 4:
5187                 value = kvm_read_cr4(vcpu);
5188                 break;
5189         case 8:
5190                 value = kvm_get_cr8(vcpu);
5191                 break;
5192         default:
5193                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5194                 return 0;
5195         }
5196
5197         return value;
5198 }
5199
5200 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5201 {
5202         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5203         int res = 0;
5204
5205         switch (cr) {
5206         case 0:
5207                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5208                 break;
5209         case 2:
5210                 vcpu->arch.cr2 = val;
5211                 break;
5212         case 3:
5213                 res = kvm_set_cr3(vcpu, val);
5214                 break;
5215         case 4:
5216                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5217                 break;
5218         case 8:
5219                 res = kvm_set_cr8(vcpu, val);
5220                 break;
5221         default:
5222                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5223                 res = -1;
5224         }
5225
5226         return res;
5227 }
5228
5229 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5230 {
5231         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5232 }
5233
5234 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5235 {
5236         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5237 }
5238
5239 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5240 {
5241         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5242 }
5243
5244 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5245 {
5246         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5247 }
5248
5249 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5250 {
5251         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5252 }
5253
5254 static unsigned long emulator_get_cached_segment_base(
5255         struct x86_emulate_ctxt *ctxt, int seg)
5256 {
5257         return get_segment_base(emul_to_vcpu(ctxt), seg);
5258 }
5259
5260 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5261                                  struct desc_struct *desc, u32 *base3,
5262                                  int seg)
5263 {
5264         struct kvm_segment var;
5265
5266         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5267         *selector = var.selector;
5268
5269         if (var.unusable) {
5270                 memset(desc, 0, sizeof(*desc));
5271                 if (base3)
5272                         *base3 = 0;
5273                 return false;
5274         }
5275
5276         if (var.g)
5277                 var.limit >>= 12;
5278         set_desc_limit(desc, var.limit);
5279         set_desc_base(desc, (unsigned long)var.base);
5280 #ifdef CONFIG_X86_64
5281         if (base3)
5282                 *base3 = var.base >> 32;
5283 #endif
5284         desc->type = var.type;
5285         desc->s = var.s;
5286         desc->dpl = var.dpl;
5287         desc->p = var.present;
5288         desc->avl = var.avl;
5289         desc->l = var.l;
5290         desc->d = var.db;
5291         desc->g = var.g;
5292
5293         return true;
5294 }
5295
5296 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5297                                  struct desc_struct *desc, u32 base3,
5298                                  int seg)
5299 {
5300         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5301         struct kvm_segment var;
5302
5303         var.selector = selector;
5304         var.base = get_desc_base(desc);
5305 #ifdef CONFIG_X86_64
5306         var.base |= ((u64)base3) << 32;
5307 #endif
5308         var.limit = get_desc_limit(desc);
5309         if (desc->g)
5310                 var.limit = (var.limit << 12) | 0xfff;
5311         var.type = desc->type;
5312         var.dpl = desc->dpl;
5313         var.db = desc->d;
5314         var.s = desc->s;
5315         var.l = desc->l;
5316         var.g = desc->g;
5317         var.avl = desc->avl;
5318         var.present = desc->p;
5319         var.unusable = !var.present;
5320         var.padding = 0;
5321
5322         kvm_set_segment(vcpu, &var, seg);
5323         return;
5324 }
5325
5326 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5327                             u32 msr_index, u64 *pdata)
5328 {
5329         struct msr_data msr;
5330         int r;
5331
5332         msr.index = msr_index;
5333         msr.host_initiated = false;
5334         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5335         if (r)
5336                 return r;
5337
5338         *pdata = msr.data;
5339         return 0;
5340 }
5341
5342 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5343                             u32 msr_index, u64 data)
5344 {
5345         struct msr_data msr;
5346
5347         msr.data = data;
5348         msr.index = msr_index;
5349         msr.host_initiated = false;
5350         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5351 }
5352
5353 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5354 {
5355         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5356
5357         return vcpu->arch.smbase;
5358 }
5359
5360 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5361 {
5362         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5363
5364         vcpu->arch.smbase = smbase;
5365 }
5366
5367 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5368                               u32 pmc)
5369 {
5370         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5371 }
5372
5373 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5374                              u32 pmc, u64 *pdata)
5375 {
5376         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5377 }
5378
5379 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5380 {
5381         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5382 }
5383
5384 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5385 {
5386 }
5387
5388 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5389 {
5390 }
5391
5392 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5393                               struct x86_instruction_info *info,
5394                               enum x86_intercept_stage stage)
5395 {
5396         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5397 }
5398
5399 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5400                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5401 {
5402         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5403 }
5404
5405 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5406 {
5407         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5408 }
5409
5410 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5411 {
5412         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5413 }
5414
5415 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5416 {
5417         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5418 }
5419
5420 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5421 {
5422         return emul_to_vcpu(ctxt)->arch.hflags;
5423 }
5424
5425 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5426 {
5427         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5428 }
5429
5430 static const struct x86_emulate_ops emulate_ops = {
5431         .read_gpr            = emulator_read_gpr,
5432         .write_gpr           = emulator_write_gpr,
5433         .read_std            = emulator_read_std,
5434         .write_std           = emulator_write_std,
5435         .read_phys           = kvm_read_guest_phys_system,
5436         .fetch               = kvm_fetch_guest_virt,
5437         .read_emulated       = emulator_read_emulated,
5438         .write_emulated      = emulator_write_emulated,
5439         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5440         .invlpg              = emulator_invlpg,
5441         .pio_in_emulated     = emulator_pio_in_emulated,
5442         .pio_out_emulated    = emulator_pio_out_emulated,
5443         .get_segment         = emulator_get_segment,
5444         .set_segment         = emulator_set_segment,
5445         .get_cached_segment_base = emulator_get_cached_segment_base,
5446         .get_gdt             = emulator_get_gdt,
5447         .get_idt             = emulator_get_idt,
5448         .set_gdt             = emulator_set_gdt,
5449         .set_idt             = emulator_set_idt,
5450         .get_cr              = emulator_get_cr,
5451         .set_cr              = emulator_set_cr,
5452         .cpl                 = emulator_get_cpl,
5453         .get_dr              = emulator_get_dr,
5454         .set_dr              = emulator_set_dr,
5455         .get_smbase          = emulator_get_smbase,
5456         .set_smbase          = emulator_set_smbase,
5457         .set_msr             = emulator_set_msr,
5458         .get_msr             = emulator_get_msr,
5459         .check_pmc           = emulator_check_pmc,
5460         .read_pmc            = emulator_read_pmc,
5461         .halt                = emulator_halt,
5462         .wbinvd              = emulator_wbinvd,
5463         .fix_hypercall       = emulator_fix_hypercall,
5464         .get_fpu             = emulator_get_fpu,
5465         .put_fpu             = emulator_put_fpu,
5466         .intercept           = emulator_intercept,
5467         .get_cpuid           = emulator_get_cpuid,
5468         .set_nmi_mask        = emulator_set_nmi_mask,
5469         .get_hflags          = emulator_get_hflags,
5470         .set_hflags          = emulator_set_hflags,
5471 };
5472
5473 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5474 {
5475         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5476         /*
5477          * an sti; sti; sequence only disable interrupts for the first
5478          * instruction. So, if the last instruction, be it emulated or
5479          * not, left the system with the INT_STI flag enabled, it
5480          * means that the last instruction is an sti. We should not
5481          * leave the flag on in this case. The same goes for mov ss
5482          */
5483         if (int_shadow & mask)
5484                 mask = 0;
5485         if (unlikely(int_shadow || mask)) {
5486                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5487                 if (!mask)
5488                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5489         }
5490 }
5491
5492 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5493 {
5494         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5495         if (ctxt->exception.vector == PF_VECTOR)
5496                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5497
5498         if (ctxt->exception.error_code_valid)
5499                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5500                                       ctxt->exception.error_code);
5501         else
5502                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5503         return false;
5504 }
5505
5506 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5507 {
5508         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5509         int cs_db, cs_l;
5510
5511         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5512
5513         ctxt->eflags = kvm_get_rflags(vcpu);
5514         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5515
5516         ctxt->eip = kvm_rip_read(vcpu);
5517         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5518                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5519                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5520                      cs_db                              ? X86EMUL_MODE_PROT32 :
5521                                                           X86EMUL_MODE_PROT16;
5522         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5523         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5524         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5525
5526         init_decode_cache(ctxt);
5527         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5528 }
5529
5530 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5531 {
5532         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5533         int ret;
5534
5535         init_emulate_ctxt(vcpu);
5536
5537         ctxt->op_bytes = 2;
5538         ctxt->ad_bytes = 2;
5539         ctxt->_eip = ctxt->eip + inc_eip;
5540         ret = emulate_int_real(ctxt, irq);
5541
5542         if (ret != X86EMUL_CONTINUE)
5543                 return EMULATE_FAIL;
5544
5545         ctxt->eip = ctxt->_eip;
5546         kvm_rip_write(vcpu, ctxt->eip);
5547         kvm_set_rflags(vcpu, ctxt->eflags);
5548
5549         if (irq == NMI_VECTOR)
5550                 vcpu->arch.nmi_pending = 0;
5551         else
5552                 vcpu->arch.interrupt.pending = false;
5553
5554         return EMULATE_DONE;
5555 }
5556 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5557
5558 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5559 {
5560         int r = EMULATE_DONE;
5561
5562         ++vcpu->stat.insn_emulation_fail;
5563         trace_kvm_emulate_insn_failed(vcpu);
5564         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5565                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5566                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5567                 vcpu->run->internal.ndata = 0;
5568                 r = EMULATE_USER_EXIT;
5569         }
5570         kvm_queue_exception(vcpu, UD_VECTOR);
5571
5572         return r;
5573 }
5574
5575 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5576                                   bool write_fault_to_shadow_pgtable,
5577                                   int emulation_type)
5578 {
5579         gpa_t gpa = cr2;
5580         kvm_pfn_t pfn;
5581
5582         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5583                 return false;
5584
5585         if (!vcpu->arch.mmu.direct_map) {
5586                 /*
5587                  * Write permission should be allowed since only
5588                  * write access need to be emulated.
5589                  */
5590                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5591
5592                 /*
5593                  * If the mapping is invalid in guest, let cpu retry
5594                  * it to generate fault.
5595                  */
5596                 if (gpa == UNMAPPED_GVA)
5597                         return true;
5598         }
5599
5600         /*
5601          * Do not retry the unhandleable instruction if it faults on the
5602          * readonly host memory, otherwise it will goto a infinite loop:
5603          * retry instruction -> write #PF -> emulation fail -> retry
5604          * instruction -> ...
5605          */
5606         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5607
5608         /*
5609          * If the instruction failed on the error pfn, it can not be fixed,
5610          * report the error to userspace.
5611          */
5612         if (is_error_noslot_pfn(pfn))
5613                 return false;
5614
5615         kvm_release_pfn_clean(pfn);
5616
5617         /* The instructions are well-emulated on direct mmu. */
5618         if (vcpu->arch.mmu.direct_map) {
5619                 unsigned int indirect_shadow_pages;
5620
5621                 spin_lock(&vcpu->kvm->mmu_lock);
5622                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5623                 spin_unlock(&vcpu->kvm->mmu_lock);
5624
5625                 if (indirect_shadow_pages)
5626                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5627
5628                 return true;
5629         }
5630
5631         /*
5632          * if emulation was due to access to shadowed page table
5633          * and it failed try to unshadow page and re-enter the
5634          * guest to let CPU execute the instruction.
5635          */
5636         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5637
5638         /*
5639          * If the access faults on its page table, it can not
5640          * be fixed by unprotecting shadow page and it should
5641          * be reported to userspace.
5642          */
5643         return !write_fault_to_shadow_pgtable;
5644 }
5645
5646 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5647                               unsigned long cr2,  int emulation_type)
5648 {
5649         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5650         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5651
5652         last_retry_eip = vcpu->arch.last_retry_eip;
5653         last_retry_addr = vcpu->arch.last_retry_addr;
5654
5655         /*
5656          * If the emulation is caused by #PF and it is non-page_table
5657          * writing instruction, it means the VM-EXIT is caused by shadow
5658          * page protected, we can zap the shadow page and retry this
5659          * instruction directly.
5660          *
5661          * Note: if the guest uses a non-page-table modifying instruction
5662          * on the PDE that points to the instruction, then we will unmap
5663          * the instruction and go to an infinite loop. So, we cache the
5664          * last retried eip and the last fault address, if we meet the eip
5665          * and the address again, we can break out of the potential infinite
5666          * loop.
5667          */
5668         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5669
5670         if (!(emulation_type & EMULTYPE_RETRY))
5671                 return false;
5672
5673         if (x86_page_table_writing_insn(ctxt))
5674                 return false;
5675
5676         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5677                 return false;
5678
5679         vcpu->arch.last_retry_eip = ctxt->eip;
5680         vcpu->arch.last_retry_addr = cr2;
5681
5682         if (!vcpu->arch.mmu.direct_map)
5683                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5684
5685         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5686
5687         return true;
5688 }
5689
5690 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5691 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5692
5693 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5694 {
5695         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5696                 /* This is a good place to trace that we are exiting SMM.  */
5697                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5698
5699                 /* Process a latched INIT or SMI, if any.  */
5700                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5701         }
5702
5703         kvm_mmu_reset_context(vcpu);
5704 }
5705
5706 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5707 {
5708         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5709
5710         vcpu->arch.hflags = emul_flags;
5711
5712         if (changed & HF_SMM_MASK)
5713                 kvm_smm_changed(vcpu);
5714 }
5715
5716 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5717                                 unsigned long *db)
5718 {
5719         u32 dr6 = 0;
5720         int i;
5721         u32 enable, rwlen;
5722
5723         enable = dr7;
5724         rwlen = dr7 >> 16;
5725         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5726                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5727                         dr6 |= (1 << i);
5728         return dr6;
5729 }
5730
5731 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5732 {
5733         struct kvm_run *kvm_run = vcpu->run;
5734
5735         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5736                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5737                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5738                 kvm_run->debug.arch.exception = DB_VECTOR;
5739                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5740                 *r = EMULATE_USER_EXIT;
5741         } else {
5742                 /*
5743                  * "Certain debug exceptions may clear bit 0-3.  The
5744                  * remaining contents of the DR6 register are never
5745                  * cleared by the processor".
5746                  */
5747                 vcpu->arch.dr6 &= ~15;
5748                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5749                 kvm_queue_exception(vcpu, DB_VECTOR);
5750         }
5751 }
5752
5753 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5754 {
5755         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5756         int r = EMULATE_DONE;
5757
5758         kvm_x86_ops->skip_emulated_instruction(vcpu);
5759
5760         /*
5761          * rflags is the old, "raw" value of the flags.  The new value has
5762          * not been saved yet.
5763          *
5764          * This is correct even for TF set by the guest, because "the
5765          * processor will not generate this exception after the instruction
5766          * that sets the TF flag".
5767          */
5768         if (unlikely(rflags & X86_EFLAGS_TF))
5769                 kvm_vcpu_do_singlestep(vcpu, &r);
5770         return r == EMULATE_DONE;
5771 }
5772 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5773
5774 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5775 {
5776         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5777             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5778                 struct kvm_run *kvm_run = vcpu->run;
5779                 unsigned long eip = kvm_get_linear_rip(vcpu);
5780                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5781                                            vcpu->arch.guest_debug_dr7,
5782                                            vcpu->arch.eff_db);
5783
5784                 if (dr6 != 0) {
5785                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5786                         kvm_run->debug.arch.pc = eip;
5787                         kvm_run->debug.arch.exception = DB_VECTOR;
5788                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5789                         *r = EMULATE_USER_EXIT;
5790                         return true;
5791                 }
5792         }
5793
5794         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5795             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5796                 unsigned long eip = kvm_get_linear_rip(vcpu);
5797                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5798                                            vcpu->arch.dr7,
5799                                            vcpu->arch.db);
5800
5801                 if (dr6 != 0) {
5802                         vcpu->arch.dr6 &= ~15;
5803                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5804                         kvm_queue_exception(vcpu, DB_VECTOR);
5805                         *r = EMULATE_DONE;
5806                         return true;
5807                 }
5808         }
5809
5810         return false;
5811 }
5812
5813 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5814                             unsigned long cr2,
5815                             int emulation_type,
5816                             void *insn,
5817                             int insn_len)
5818 {
5819         int r;
5820         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5821         bool writeback = true;
5822         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5823
5824         vcpu->arch.l1tf_flush_l1d = true;
5825
5826         /*
5827          * Clear write_fault_to_shadow_pgtable here to ensure it is
5828          * never reused.
5829          */
5830         vcpu->arch.write_fault_to_shadow_pgtable = false;
5831         kvm_clear_exception_queue(vcpu);
5832
5833         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5834                 init_emulate_ctxt(vcpu);
5835
5836                 /*
5837                  * We will reenter on the same instruction since
5838                  * we do not set complete_userspace_io.  This does not
5839                  * handle watchpoints yet, those would be handled in
5840                  * the emulate_ops.
5841                  */
5842                 if (!(emulation_type & EMULTYPE_SKIP) &&
5843                     kvm_vcpu_check_breakpoint(vcpu, &r))
5844                         return r;
5845
5846                 ctxt->interruptibility = 0;
5847                 ctxt->have_exception = false;
5848                 ctxt->exception.vector = -1;
5849                 ctxt->perm_ok = false;
5850
5851                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5852
5853                 r = x86_decode_insn(ctxt, insn, insn_len);
5854
5855                 trace_kvm_emulate_insn_start(vcpu);
5856                 ++vcpu->stat.insn_emulation;
5857                 if (r != EMULATION_OK)  {
5858                         if (emulation_type & EMULTYPE_TRAP_UD)
5859                                 return EMULATE_FAIL;
5860                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5861                                                 emulation_type))
5862                                 return EMULATE_DONE;
5863                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5864                                 return EMULATE_DONE;
5865                         if (emulation_type & EMULTYPE_SKIP)
5866                                 return EMULATE_FAIL;
5867                         return handle_emulation_failure(vcpu);
5868                 }
5869         }
5870
5871         if (emulation_type & EMULTYPE_SKIP) {
5872                 kvm_rip_write(vcpu, ctxt->_eip);
5873                 if (ctxt->eflags & X86_EFLAGS_RF)
5874                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5875                 return EMULATE_DONE;
5876         }
5877
5878         if (retry_instruction(ctxt, cr2, emulation_type))
5879                 return EMULATE_DONE;
5880
5881         /* this is needed for vmware backdoor interface to work since it
5882            changes registers values  during IO operation */
5883         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5884                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5885                 emulator_invalidate_register_cache(ctxt);
5886         }
5887
5888 restart:
5889         /* Save the faulting GPA (cr2) in the address field */
5890         ctxt->exception.address = cr2;
5891
5892         r = x86_emulate_insn(ctxt);
5893
5894         if (r == EMULATION_INTERCEPTED)
5895                 return EMULATE_DONE;
5896
5897         if (r == EMULATION_FAILED) {
5898                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5899                                         emulation_type))
5900                         return EMULATE_DONE;
5901
5902                 return handle_emulation_failure(vcpu);
5903         }
5904
5905         if (ctxt->have_exception) {
5906                 r = EMULATE_DONE;
5907                 if (inject_emulated_exception(vcpu))
5908                         return r;
5909         } else if (vcpu->arch.pio.count) {
5910                 if (!vcpu->arch.pio.in) {
5911                         /* FIXME: return into emulator if single-stepping.  */
5912                         vcpu->arch.pio.count = 0;
5913                 } else {
5914                         writeback = false;
5915                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5916                 }
5917                 r = EMULATE_USER_EXIT;
5918         } else if (vcpu->mmio_needed) {
5919                 if (!vcpu->mmio_is_write)
5920                         writeback = false;
5921                 r = EMULATE_USER_EXIT;
5922                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5923         } else if (r == EMULATION_RESTART)
5924                 goto restart;
5925         else
5926                 r = EMULATE_DONE;
5927
5928         if (writeback) {
5929                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5930                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5931                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5932                 kvm_rip_write(vcpu, ctxt->eip);
5933                 if (r == EMULATE_DONE && ctxt->tf)
5934                         kvm_vcpu_do_singlestep(vcpu, &r);
5935                 if (!ctxt->have_exception ||
5936                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5937                         __kvm_set_rflags(vcpu, ctxt->eflags);
5938
5939                 /*
5940                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5941                  * do nothing, and it will be requested again as soon as
5942                  * the shadow expires.  But we still need to check here,
5943                  * because POPF has no interrupt shadow.
5944                  */
5945                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5946                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5947         } else
5948                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5949
5950         return r;
5951 }
5952 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5953
5954 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5955 {
5956         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5957         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5958                                             size, port, &val, 1);
5959         /* do not return to emulator after return from userspace */
5960         vcpu->arch.pio.count = 0;
5961         return ret;
5962 }
5963 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5964
5965 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5966 {
5967         unsigned long val;
5968
5969         /* We should only ever be called with arch.pio.count equal to 1 */
5970         BUG_ON(vcpu->arch.pio.count != 1);
5971
5972         /* For size less than 4 we merge, else we zero extend */
5973         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5974                                         : 0;
5975
5976         /*
5977          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5978          * the copy and tracing
5979          */
5980         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5981                                  vcpu->arch.pio.port, &val, 1);
5982         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5983
5984         return 1;
5985 }
5986
5987 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5988 {
5989         unsigned long val;
5990         int ret;
5991
5992         /* For size less than 4 we merge, else we zero extend */
5993         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5994
5995         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5996                                        &val, 1);
5997         if (ret) {
5998                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5999                 return ret;
6000         }
6001
6002         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6003
6004         return 0;
6005 }
6006 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
6007
6008 static int kvmclock_cpu_down_prep(unsigned int cpu)
6009 {
6010         __this_cpu_write(cpu_tsc_khz, 0);
6011         return 0;
6012 }
6013
6014 static void tsc_khz_changed(void *data)
6015 {
6016         struct cpufreq_freqs *freq = data;
6017         unsigned long khz = 0;
6018
6019         if (data)
6020                 khz = freq->new;
6021         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6022                 khz = cpufreq_quick_get(raw_smp_processor_id());
6023         if (!khz)
6024                 khz = tsc_khz;
6025         __this_cpu_write(cpu_tsc_khz, khz);
6026 }
6027
6028 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6029                                      void *data)
6030 {
6031         struct cpufreq_freqs *freq = data;
6032         struct kvm *kvm;
6033         struct kvm_vcpu *vcpu;
6034         int i, send_ipi = 0;
6035
6036         /*
6037          * We allow guests to temporarily run on slowing clocks,
6038          * provided we notify them after, or to run on accelerating
6039          * clocks, provided we notify them before.  Thus time never
6040          * goes backwards.
6041          *
6042          * However, we have a problem.  We can't atomically update
6043          * the frequency of a given CPU from this function; it is
6044          * merely a notifier, which can be called from any CPU.
6045          * Changing the TSC frequency at arbitrary points in time
6046          * requires a recomputation of local variables related to
6047          * the TSC for each VCPU.  We must flag these local variables
6048          * to be updated and be sure the update takes place with the
6049          * new frequency before any guests proceed.
6050          *
6051          * Unfortunately, the combination of hotplug CPU and frequency
6052          * change creates an intractable locking scenario; the order
6053          * of when these callouts happen is undefined with respect to
6054          * CPU hotplug, and they can race with each other.  As such,
6055          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6056          * undefined; you can actually have a CPU frequency change take
6057          * place in between the computation of X and the setting of the
6058          * variable.  To protect against this problem, all updates of
6059          * the per_cpu tsc_khz variable are done in an interrupt
6060          * protected IPI, and all callers wishing to update the value
6061          * must wait for a synchronous IPI to complete (which is trivial
6062          * if the caller is on the CPU already).  This establishes the
6063          * necessary total order on variable updates.
6064          *
6065          * Note that because a guest time update may take place
6066          * anytime after the setting of the VCPU's request bit, the
6067          * correct TSC value must be set before the request.  However,
6068          * to ensure the update actually makes it to any guest which
6069          * starts running in hardware virtualization between the set
6070          * and the acquisition of the spinlock, we must also ping the
6071          * CPU after setting the request bit.
6072          *
6073          */
6074
6075         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6076                 return 0;
6077         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6078                 return 0;
6079
6080         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6081
6082         spin_lock(&kvm_lock);
6083         list_for_each_entry(kvm, &vm_list, vm_list) {
6084                 kvm_for_each_vcpu(i, vcpu, kvm) {
6085                         if (vcpu->cpu != freq->cpu)
6086                                 continue;
6087                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6088                         if (vcpu->cpu != smp_processor_id())
6089                                 send_ipi = 1;
6090                 }
6091         }
6092         spin_unlock(&kvm_lock);
6093
6094         if (freq->old < freq->new && send_ipi) {
6095                 /*
6096                  * We upscale the frequency.  Must make the guest
6097                  * doesn't see old kvmclock values while running with
6098                  * the new frequency, otherwise we risk the guest sees
6099                  * time go backwards.
6100                  *
6101                  * In case we update the frequency for another cpu
6102                  * (which might be in guest context) send an interrupt
6103                  * to kick the cpu out of guest context.  Next time
6104                  * guest context is entered kvmclock will be updated,
6105                  * so the guest will not see stale values.
6106                  */
6107                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6108         }
6109         return 0;
6110 }
6111
6112 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6113         .notifier_call  = kvmclock_cpufreq_notifier
6114 };
6115
6116 static int kvmclock_cpu_online(unsigned int cpu)
6117 {
6118         tsc_khz_changed(NULL);
6119         return 0;
6120 }
6121
6122 static void kvm_timer_init(void)
6123 {
6124         max_tsc_khz = tsc_khz;
6125
6126         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6127 #ifdef CONFIG_CPU_FREQ
6128                 struct cpufreq_policy policy;
6129                 int cpu;
6130
6131                 memset(&policy, 0, sizeof(policy));
6132                 cpu = get_cpu();
6133                 cpufreq_get_policy(&policy, cpu);
6134                 if (policy.cpuinfo.max_freq)
6135                         max_tsc_khz = policy.cpuinfo.max_freq;
6136                 put_cpu();
6137 #endif
6138                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6139                                           CPUFREQ_TRANSITION_NOTIFIER);
6140         }
6141         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6142
6143         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6144                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6145 }
6146
6147 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6148
6149 int kvm_is_in_guest(void)
6150 {
6151         return __this_cpu_read(current_vcpu) != NULL;
6152 }
6153
6154 static int kvm_is_user_mode(void)
6155 {
6156         int user_mode = 3;
6157
6158         if (__this_cpu_read(current_vcpu))
6159                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6160
6161         return user_mode != 0;
6162 }
6163
6164 static unsigned long kvm_get_guest_ip(void)
6165 {
6166         unsigned long ip = 0;
6167
6168         if (__this_cpu_read(current_vcpu))
6169                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6170
6171         return ip;
6172 }
6173
6174 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6175         .is_in_guest            = kvm_is_in_guest,
6176         .is_user_mode           = kvm_is_user_mode,
6177         .get_guest_ip           = kvm_get_guest_ip,
6178 };
6179
6180 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6181 {
6182         __this_cpu_write(current_vcpu, vcpu);
6183 }
6184 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6185
6186 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6187 {
6188         __this_cpu_write(current_vcpu, NULL);
6189 }
6190 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6191
6192 static void kvm_set_mmio_spte_mask(void)
6193 {
6194         u64 mask;
6195         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6196
6197         /*
6198          * Set the reserved bits and the present bit of an paging-structure
6199          * entry to generate page fault with PFER.RSV = 1.
6200          */
6201
6202         /*
6203          * Mask the uppermost physical address bit, which would be reserved as
6204          * long as the supported physical address width is less than 52.
6205          */
6206         mask = 1ull << 51;
6207
6208         /* Set the present bit. */
6209         mask |= 1ull;
6210
6211         /*
6212          * If reserved bit is not supported, clear the present bit to disable
6213          * mmio page fault.
6214          */
6215         if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6216                 mask &= ~1ull;
6217
6218         kvm_mmu_set_mmio_spte_mask(mask, mask);
6219 }
6220
6221 #ifdef CONFIG_X86_64
6222 static void pvclock_gtod_update_fn(struct work_struct *work)
6223 {
6224         struct kvm *kvm;
6225
6226         struct kvm_vcpu *vcpu;
6227         int i;
6228
6229         spin_lock(&kvm_lock);
6230         list_for_each_entry(kvm, &vm_list, vm_list)
6231                 kvm_for_each_vcpu(i, vcpu, kvm)
6232                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6233         atomic_set(&kvm_guest_has_master_clock, 0);
6234         spin_unlock(&kvm_lock);
6235 }
6236
6237 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6238
6239 /*
6240  * Notification about pvclock gtod data update.
6241  */
6242 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6243                                void *priv)
6244 {
6245         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6246         struct timekeeper *tk = priv;
6247
6248         update_pvclock_gtod(tk);
6249
6250         /* disable master clock if host does not trust, or does not
6251          * use, TSC clocksource
6252          */
6253         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6254             atomic_read(&kvm_guest_has_master_clock) != 0)
6255                 queue_work(system_long_wq, &pvclock_gtod_work);
6256
6257         return 0;
6258 }
6259
6260 static struct notifier_block pvclock_gtod_notifier = {
6261         .notifier_call = pvclock_gtod_notify,
6262 };
6263 #endif
6264
6265 int kvm_arch_init(void *opaque)
6266 {
6267         int r;
6268         struct kvm_x86_ops *ops = opaque;
6269
6270         if (kvm_x86_ops) {
6271                 printk(KERN_ERR "kvm: already loaded the other module\n");
6272                 r = -EEXIST;
6273                 goto out;
6274         }
6275
6276         if (!ops->cpu_has_kvm_support()) {
6277                 printk(KERN_ERR "kvm: no hardware support\n");
6278                 r = -EOPNOTSUPP;
6279                 goto out;
6280         }
6281         if (ops->disabled_by_bios()) {
6282                 printk(KERN_ERR "kvm: disabled by bios\n");
6283                 r = -EOPNOTSUPP;
6284                 goto out;
6285         }
6286
6287         r = -ENOMEM;
6288         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6289         if (!shared_msrs) {
6290                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6291                 goto out;
6292         }
6293
6294         r = kvm_mmu_module_init();
6295         if (r)
6296                 goto out_free_percpu;
6297
6298         kvm_set_mmio_spte_mask();
6299
6300         kvm_x86_ops = ops;
6301
6302         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6303                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6304                         PT_PRESENT_MASK, 0, sme_me_mask);
6305         kvm_timer_init();
6306
6307         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6308
6309         if (boot_cpu_has(X86_FEATURE_XSAVE))
6310                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6311
6312         kvm_lapic_init();
6313 #ifdef CONFIG_X86_64
6314         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6315 #endif
6316
6317         return 0;
6318
6319 out_free_percpu:
6320         free_percpu(shared_msrs);
6321 out:
6322         return r;
6323 }
6324
6325 void kvm_arch_exit(void)
6326 {
6327         kvm_lapic_exit();
6328         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6329
6330         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6331                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6332                                             CPUFREQ_TRANSITION_NOTIFIER);
6333         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6334 #ifdef CONFIG_X86_64
6335         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6336 #endif
6337         kvm_x86_ops = NULL;
6338         kvm_mmu_module_exit();
6339         free_percpu(shared_msrs);
6340 }
6341
6342 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6343 {
6344         ++vcpu->stat.halt_exits;
6345         if (lapic_in_kernel(vcpu)) {
6346                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6347                 return 1;
6348         } else {
6349                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6350                 return 0;
6351         }
6352 }
6353 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6354
6355 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6356 {
6357         int ret = kvm_skip_emulated_instruction(vcpu);
6358         /*
6359          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6360          * KVM_EXIT_DEBUG here.
6361          */
6362         return kvm_vcpu_halt(vcpu) && ret;
6363 }
6364 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6365
6366 #ifdef CONFIG_X86_64
6367 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6368                                 unsigned long clock_type)
6369 {
6370         struct kvm_clock_pairing clock_pairing;
6371         struct timespec ts;
6372         u64 cycle;
6373         int ret;
6374
6375         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6376                 return -KVM_EOPNOTSUPP;
6377
6378         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6379                 return -KVM_EOPNOTSUPP;
6380
6381         clock_pairing.sec = ts.tv_sec;
6382         clock_pairing.nsec = ts.tv_nsec;
6383         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6384         clock_pairing.flags = 0;
6385         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
6386
6387         ret = 0;
6388         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6389                             sizeof(struct kvm_clock_pairing)))
6390                 ret = -KVM_EFAULT;
6391
6392         return ret;
6393 }
6394 #endif
6395
6396 /*
6397  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6398  *
6399  * @apicid - apicid of vcpu to be kicked.
6400  */
6401 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6402 {
6403         struct kvm_lapic_irq lapic_irq;
6404
6405         lapic_irq.shorthand = 0;
6406         lapic_irq.dest_mode = 0;
6407         lapic_irq.level = 0;
6408         lapic_irq.dest_id = apicid;
6409         lapic_irq.msi_redir_hint = false;
6410
6411         lapic_irq.delivery_mode = APIC_DM_REMRD;
6412         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6413 }
6414
6415 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6416 {
6417         vcpu->arch.apicv_active = false;
6418         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6419 }
6420
6421 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6422 {
6423         unsigned long nr, a0, a1, a2, a3, ret;
6424         int op_64_bit;
6425
6426         if (kvm_hv_hypercall_enabled(vcpu->kvm)) {
6427                 if (!kvm_hv_hypercall(vcpu))
6428                         return 0;
6429                 goto out;
6430         }
6431
6432         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6433         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6434         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6435         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6436         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6437
6438         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6439
6440         op_64_bit = is_64_bit_mode(vcpu);
6441         if (!op_64_bit) {
6442                 nr &= 0xFFFFFFFF;
6443                 a0 &= 0xFFFFFFFF;
6444                 a1 &= 0xFFFFFFFF;
6445                 a2 &= 0xFFFFFFFF;
6446                 a3 &= 0xFFFFFFFF;
6447         }
6448
6449         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6450                 ret = -KVM_EPERM;
6451                 goto out_error;
6452         }
6453
6454         switch (nr) {
6455         case KVM_HC_VAPIC_POLL_IRQ:
6456                 ret = 0;
6457                 break;
6458         case KVM_HC_KICK_CPU:
6459                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6460                 ret = 0;
6461                 break;
6462 #ifdef CONFIG_X86_64
6463         case KVM_HC_CLOCK_PAIRING:
6464                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6465                 break;
6466 #endif
6467         default:
6468                 ret = -KVM_ENOSYS;
6469                 break;
6470         }
6471 out_error:
6472         if (!op_64_bit)
6473                 ret = (u32)ret;
6474         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6475
6476 out:
6477         ++vcpu->stat.hypercalls;
6478         return kvm_skip_emulated_instruction(vcpu);
6479 }
6480 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6481
6482 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6483 {
6484         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6485         char instruction[3];
6486         unsigned long rip = kvm_rip_read(vcpu);
6487
6488         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6489
6490         return emulator_write_emulated(ctxt, rip, instruction, 3,
6491                 &ctxt->exception);
6492 }
6493
6494 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6495 {
6496         return vcpu->run->request_interrupt_window &&
6497                 likely(!pic_in_kernel(vcpu->kvm));
6498 }
6499
6500 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6501 {
6502         struct kvm_run *kvm_run = vcpu->run;
6503
6504         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6505         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6506         kvm_run->cr8 = kvm_get_cr8(vcpu);
6507         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6508         kvm_run->ready_for_interrupt_injection =
6509                 pic_in_kernel(vcpu->kvm) ||
6510                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6511 }
6512
6513 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6514 {
6515         int max_irr, tpr;
6516
6517         if (!kvm_x86_ops->update_cr8_intercept)
6518                 return;
6519
6520         if (!lapic_in_kernel(vcpu))
6521                 return;
6522
6523         if (vcpu->arch.apicv_active)
6524                 return;
6525
6526         if (!vcpu->arch.apic->vapic_addr)
6527                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6528         else
6529                 max_irr = -1;
6530
6531         if (max_irr != -1)
6532                 max_irr >>= 4;
6533
6534         tpr = kvm_lapic_get_cr8(vcpu);
6535
6536         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6537 }
6538
6539 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6540 {
6541         int r;
6542
6543         /* try to reinject previous events if any */
6544         if (vcpu->arch.exception.injected) {
6545                 kvm_x86_ops->queue_exception(vcpu);
6546                 return 0;
6547         }
6548
6549         /*
6550          * Exceptions must be injected immediately, or the exception
6551          * frame will have the address of the NMI or interrupt handler.
6552          */
6553         if (!vcpu->arch.exception.pending) {
6554                 if (vcpu->arch.nmi_injected) {
6555                         kvm_x86_ops->set_nmi(vcpu);
6556                         return 0;
6557                 }
6558
6559                 if (vcpu->arch.interrupt.pending) {
6560                         kvm_x86_ops->set_irq(vcpu);
6561                         return 0;
6562                 }
6563         }
6564
6565         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6566                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6567                 if (r != 0)
6568                         return r;
6569         }
6570
6571         /* try to inject new event if pending */
6572         if (vcpu->arch.exception.pending) {
6573                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6574                                         vcpu->arch.exception.has_error_code,
6575                                         vcpu->arch.exception.error_code);
6576
6577                 vcpu->arch.exception.pending = false;
6578                 vcpu->arch.exception.injected = true;
6579
6580                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6581                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6582                                              X86_EFLAGS_RF);
6583
6584                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6585                     (vcpu->arch.dr7 & DR7_GD)) {
6586                         vcpu->arch.dr7 &= ~DR7_GD;
6587                         kvm_update_dr7(vcpu);
6588                 }
6589
6590                 kvm_x86_ops->queue_exception(vcpu);
6591         } else if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6592                 vcpu->arch.smi_pending = false;
6593                 enter_smm(vcpu);
6594         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6595                 --vcpu->arch.nmi_pending;
6596                 vcpu->arch.nmi_injected = true;
6597                 kvm_x86_ops->set_nmi(vcpu);
6598         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6599                 /*
6600                  * Because interrupts can be injected asynchronously, we are
6601                  * calling check_nested_events again here to avoid a race condition.
6602                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6603                  * proposal and current concerns.  Perhaps we should be setting
6604                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6605                  */
6606                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6607                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6608                         if (r != 0)
6609                                 return r;
6610                 }
6611                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6612                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6613                                             false);
6614                         kvm_x86_ops->set_irq(vcpu);
6615                 }
6616         }
6617
6618         return 0;
6619 }
6620
6621 static void process_nmi(struct kvm_vcpu *vcpu)
6622 {
6623         unsigned limit = 2;
6624
6625         /*
6626          * x86 is limited to one NMI running, and one NMI pending after it.
6627          * If an NMI is already in progress, limit further NMIs to just one.
6628          * Otherwise, allow two (and we'll inject the first one immediately).
6629          */
6630         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6631                 limit = 1;
6632
6633         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6634         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6635         kvm_make_request(KVM_REQ_EVENT, vcpu);
6636 }
6637
6638 #define put_smstate(type, buf, offset, val)                       \
6639         *(type *)((buf) + (offset) - 0x7e00) = val
6640
6641 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6642 {
6643         u32 flags = 0;
6644         flags |= seg->g       << 23;
6645         flags |= seg->db      << 22;
6646         flags |= seg->l       << 21;
6647         flags |= seg->avl     << 20;
6648         flags |= seg->present << 15;
6649         flags |= seg->dpl     << 13;
6650         flags |= seg->s       << 12;
6651         flags |= seg->type    << 8;
6652         return flags;
6653 }
6654
6655 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6656 {
6657         struct kvm_segment seg;
6658         int offset;
6659
6660         kvm_get_segment(vcpu, &seg, n);
6661         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6662
6663         if (n < 3)
6664                 offset = 0x7f84 + n * 12;
6665         else
6666                 offset = 0x7f2c + (n - 3) * 12;
6667
6668         put_smstate(u32, buf, offset + 8, seg.base);
6669         put_smstate(u32, buf, offset + 4, seg.limit);
6670         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6671 }
6672
6673 #ifdef CONFIG_X86_64
6674 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6675 {
6676         struct kvm_segment seg;
6677         int offset;
6678         u16 flags;
6679
6680         kvm_get_segment(vcpu, &seg, n);
6681         offset = 0x7e00 + n * 16;
6682
6683         flags = enter_smm_get_segment_flags(&seg) >> 8;
6684         put_smstate(u16, buf, offset, seg.selector);
6685         put_smstate(u16, buf, offset + 2, flags);
6686         put_smstate(u32, buf, offset + 4, seg.limit);
6687         put_smstate(u64, buf, offset + 8, seg.base);
6688 }
6689 #endif
6690
6691 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6692 {
6693         struct desc_ptr dt;
6694         struct kvm_segment seg;
6695         unsigned long val;
6696         int i;
6697
6698         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6699         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6700         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6701         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6702
6703         for (i = 0; i < 8; i++)
6704                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6705
6706         kvm_get_dr(vcpu, 6, &val);
6707         put_smstate(u32, buf, 0x7fcc, (u32)val);
6708         kvm_get_dr(vcpu, 7, &val);
6709         put_smstate(u32, buf, 0x7fc8, (u32)val);
6710
6711         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6712         put_smstate(u32, buf, 0x7fc4, seg.selector);
6713         put_smstate(u32, buf, 0x7f64, seg.base);
6714         put_smstate(u32, buf, 0x7f60, seg.limit);
6715         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6716
6717         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6718         put_smstate(u32, buf, 0x7fc0, seg.selector);
6719         put_smstate(u32, buf, 0x7f80, seg.base);
6720         put_smstate(u32, buf, 0x7f7c, seg.limit);
6721         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6722
6723         kvm_x86_ops->get_gdt(vcpu, &dt);
6724         put_smstate(u32, buf, 0x7f74, dt.address);
6725         put_smstate(u32, buf, 0x7f70, dt.size);
6726
6727         kvm_x86_ops->get_idt(vcpu, &dt);
6728         put_smstate(u32, buf, 0x7f58, dt.address);
6729         put_smstate(u32, buf, 0x7f54, dt.size);
6730
6731         for (i = 0; i < 6; i++)
6732                 enter_smm_save_seg_32(vcpu, buf, i);
6733
6734         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6735
6736         /* revision id */
6737         put_smstate(u32, buf, 0x7efc, 0x00020000);
6738         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6739 }
6740
6741 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6742 {
6743 #ifdef CONFIG_X86_64
6744         struct desc_ptr dt;
6745         struct kvm_segment seg;
6746         unsigned long val;
6747         int i;
6748
6749         for (i = 0; i < 16; i++)
6750                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6751
6752         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6753         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6754
6755         kvm_get_dr(vcpu, 6, &val);
6756         put_smstate(u64, buf, 0x7f68, val);
6757         kvm_get_dr(vcpu, 7, &val);
6758         put_smstate(u64, buf, 0x7f60, val);
6759
6760         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6761         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6762         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6763
6764         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6765
6766         /* revision id */
6767         put_smstate(u32, buf, 0x7efc, 0x00020064);
6768
6769         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6770
6771         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6772         put_smstate(u16, buf, 0x7e90, seg.selector);
6773         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6774         put_smstate(u32, buf, 0x7e94, seg.limit);
6775         put_smstate(u64, buf, 0x7e98, seg.base);
6776
6777         kvm_x86_ops->get_idt(vcpu, &dt);
6778         put_smstate(u32, buf, 0x7e84, dt.size);
6779         put_smstate(u64, buf, 0x7e88, dt.address);
6780
6781         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6782         put_smstate(u16, buf, 0x7e70, seg.selector);
6783         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6784         put_smstate(u32, buf, 0x7e74, seg.limit);
6785         put_smstate(u64, buf, 0x7e78, seg.base);
6786
6787         kvm_x86_ops->get_gdt(vcpu, &dt);
6788         put_smstate(u32, buf, 0x7e64, dt.size);
6789         put_smstate(u64, buf, 0x7e68, dt.address);
6790
6791         for (i = 0; i < 6; i++)
6792                 enter_smm_save_seg_64(vcpu, buf, i);
6793 #else
6794         WARN_ON_ONCE(1);
6795 #endif
6796 }
6797
6798 static void enter_smm(struct kvm_vcpu *vcpu)
6799 {
6800         struct kvm_segment cs, ds;
6801         struct desc_ptr dt;
6802         char buf[512];
6803         u32 cr0;
6804
6805         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6806         vcpu->arch.hflags |= HF_SMM_MASK;
6807         memset(buf, 0, 512);
6808         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6809                 enter_smm_save_state_64(vcpu, buf);
6810         else
6811                 enter_smm_save_state_32(vcpu, buf);
6812
6813         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6814
6815         if (kvm_x86_ops->get_nmi_mask(vcpu))
6816                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6817         else
6818                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6819
6820         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6821         kvm_rip_write(vcpu, 0x8000);
6822
6823         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6824         kvm_x86_ops->set_cr0(vcpu, cr0);
6825         vcpu->arch.cr0 = cr0;
6826
6827         kvm_x86_ops->set_cr4(vcpu, 0);
6828
6829         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6830         dt.address = dt.size = 0;
6831         kvm_x86_ops->set_idt(vcpu, &dt);
6832
6833         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6834
6835         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6836         cs.base = vcpu->arch.smbase;
6837
6838         ds.selector = 0;
6839         ds.base = 0;
6840
6841         cs.limit    = ds.limit = 0xffffffff;
6842         cs.type     = ds.type = 0x3;
6843         cs.dpl      = ds.dpl = 0;
6844         cs.db       = ds.db = 0;
6845         cs.s        = ds.s = 1;
6846         cs.l        = ds.l = 0;
6847         cs.g        = ds.g = 1;
6848         cs.avl      = ds.avl = 0;
6849         cs.present  = ds.present = 1;
6850         cs.unusable = ds.unusable = 0;
6851         cs.padding  = ds.padding = 0;
6852
6853         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6854         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6855         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6856         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6857         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6858         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6859
6860         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6861                 kvm_x86_ops->set_efer(vcpu, 0);
6862
6863         kvm_update_cpuid(vcpu);
6864         kvm_mmu_reset_context(vcpu);
6865 }
6866
6867 static void process_smi(struct kvm_vcpu *vcpu)
6868 {
6869         vcpu->arch.smi_pending = true;
6870         kvm_make_request(KVM_REQ_EVENT, vcpu);
6871 }
6872
6873 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6874 {
6875         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6876 }
6877
6878 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6879 {
6880         u64 eoi_exit_bitmap[4];
6881
6882         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6883                 return;
6884
6885         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6886
6887         if (irqchip_split(vcpu->kvm))
6888                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6889         else {
6890                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6891                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6892                 if (ioapic_in_kernel(vcpu->kvm))
6893                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6894         }
6895         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6896                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6897         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6898 }
6899
6900 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6901 {
6902         ++vcpu->stat.tlb_flush;
6903         kvm_x86_ops->tlb_flush(vcpu);
6904 }
6905
6906 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
6907                 unsigned long start, unsigned long end)
6908 {
6909         unsigned long apic_address;
6910
6911         /*
6912          * The physical address of apic access page is stored in the VMCS.
6913          * Update it when it becomes invalid.
6914          */
6915         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6916         if (start <= apic_address && apic_address < end)
6917                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6918 }
6919
6920 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6921 {
6922         struct page *page = NULL;
6923
6924         if (!lapic_in_kernel(vcpu))
6925                 return;
6926
6927         if (!kvm_x86_ops->set_apic_access_page_addr)
6928                 return;
6929
6930         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6931         if (is_error_page(page))
6932                 return;
6933         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6934
6935         /*
6936          * Do not pin apic access page in memory, the MMU notifier
6937          * will call us again if it is migrated or swapped out.
6938          */
6939         put_page(page);
6940 }
6941 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6942
6943 /*
6944  * Returns 1 to let vcpu_run() continue the guest execution loop without
6945  * exiting to the userspace.  Otherwise, the value will be returned to the
6946  * userspace.
6947  */
6948 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6949 {
6950         int r;
6951         bool req_int_win =
6952                 dm_request_for_irq_injection(vcpu) &&
6953                 kvm_cpu_accept_dm_intr(vcpu);
6954
6955         bool req_immediate_exit = false;
6956
6957         if (kvm_request_pending(vcpu)) {
6958                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6959                         kvm_mmu_unload(vcpu);
6960                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6961                         __kvm_migrate_timers(vcpu);
6962                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6963                         kvm_gen_update_masterclock(vcpu->kvm);
6964                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6965                         kvm_gen_kvmclock_update(vcpu);
6966                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6967                         r = kvm_guest_time_update(vcpu);
6968                         if (unlikely(r))
6969                                 goto out;
6970                 }
6971                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6972                         kvm_mmu_sync_roots(vcpu);
6973                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6974                         kvm_vcpu_flush_tlb(vcpu);
6975                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6976                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6977                         r = 0;
6978                         goto out;
6979                 }
6980                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6981                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6982                         vcpu->mmio_needed = 0;
6983                         r = 0;
6984                         goto out;
6985                 }
6986                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6987                         /* Page is swapped out. Do synthetic halt */
6988                         vcpu->arch.apf.halted = true;
6989                         r = 1;
6990                         goto out;
6991                 }
6992                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6993                         record_steal_time(vcpu);
6994                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6995                         process_smi(vcpu);
6996                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6997                         process_nmi(vcpu);
6998                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6999                         kvm_pmu_handle_event(vcpu);
7000                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7001                         kvm_pmu_deliver_pmi(vcpu);
7002                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7003                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7004                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7005                                      vcpu->arch.ioapic_handled_vectors)) {
7006                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7007                                 vcpu->run->eoi.vector =
7008                                                 vcpu->arch.pending_ioapic_eoi;
7009                                 r = 0;
7010                                 goto out;
7011                         }
7012                 }
7013                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7014                         vcpu_scan_ioapic(vcpu);
7015                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7016                         kvm_vcpu_reload_apic_access_page(vcpu);
7017                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7018                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7019                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7020                         r = 0;
7021                         goto out;
7022                 }
7023                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7024                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7025                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7026                         r = 0;
7027                         goto out;
7028                 }
7029                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7030                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7031                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7032                         r = 0;
7033                         goto out;
7034                 }
7035
7036                 /*
7037                  * KVM_REQ_HV_STIMER has to be processed after
7038                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7039                  * depend on the guest clock being up-to-date
7040                  */
7041                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7042                         kvm_hv_process_stimers(vcpu);
7043         }
7044
7045         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7046                 ++vcpu->stat.req_event;
7047                 kvm_apic_accept_events(vcpu);
7048                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7049                         r = 1;
7050                         goto out;
7051                 }
7052
7053                 if (inject_pending_event(vcpu, req_int_win) != 0)
7054                         req_immediate_exit = true;
7055                 else {
7056                         /* Enable NMI/IRQ window open exits if needed.
7057                          *
7058                          * SMIs have two cases: 1) they can be nested, and
7059                          * then there is nothing to do here because RSM will
7060                          * cause a vmexit anyway; 2) or the SMI can be pending
7061                          * because inject_pending_event has completed the
7062                          * injection of an IRQ or NMI from the previous vmexit,
7063                          * and then we request an immediate exit to inject the SMI.
7064                          */
7065                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7066                                 req_immediate_exit = true;
7067                         if (vcpu->arch.nmi_pending)
7068                                 kvm_x86_ops->enable_nmi_window(vcpu);
7069                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7070                                 kvm_x86_ops->enable_irq_window(vcpu);
7071                         WARN_ON(vcpu->arch.exception.pending);
7072                 }
7073
7074                 if (kvm_lapic_enabled(vcpu)) {
7075                         update_cr8_intercept(vcpu);
7076                         kvm_lapic_sync_to_vapic(vcpu);
7077                 }
7078         }
7079
7080         r = kvm_mmu_reload(vcpu);
7081         if (unlikely(r)) {
7082                 goto cancel_injection;
7083         }
7084
7085         preempt_disable();
7086
7087         kvm_x86_ops->prepare_guest_switch(vcpu);
7088
7089         /*
7090          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7091          * IPI are then delayed after guest entry, which ensures that they
7092          * result in virtual interrupt delivery.
7093          */
7094         local_irq_disable();
7095         vcpu->mode = IN_GUEST_MODE;
7096
7097         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7098
7099         /*
7100          * 1) We should set ->mode before checking ->requests.  Please see
7101          * the comment in kvm_vcpu_exiting_guest_mode().
7102          *
7103          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7104          * pairs with the memory barrier implicit in pi_test_and_set_on
7105          * (see vmx_deliver_posted_interrupt).
7106          *
7107          * 3) This also orders the write to mode from any reads to the page
7108          * tables done while the VCPU is running.  Please see the comment
7109          * in kvm_flush_remote_tlbs.
7110          */
7111         smp_mb__after_srcu_read_unlock();
7112
7113         /*
7114          * This handles the case where a posted interrupt was
7115          * notified with kvm_vcpu_kick.
7116          */
7117         if (kvm_lapic_enabled(vcpu)) {
7118                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
7119                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7120         }
7121
7122         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7123             || need_resched() || signal_pending(current)) {
7124                 vcpu->mode = OUTSIDE_GUEST_MODE;
7125                 smp_wmb();
7126                 local_irq_enable();
7127                 preempt_enable();
7128                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7129                 r = 1;
7130                 goto cancel_injection;
7131         }
7132
7133         kvm_load_guest_xcr0(vcpu);
7134
7135         if (req_immediate_exit) {
7136                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7137                 smp_send_reschedule(vcpu->cpu);
7138         }
7139
7140         trace_kvm_entry(vcpu->vcpu_id);
7141         wait_lapic_expire(vcpu);
7142         guest_enter_irqoff();
7143
7144         if (unlikely(vcpu->arch.switch_db_regs)) {
7145                 set_debugreg(0, 7);
7146                 set_debugreg(vcpu->arch.eff_db[0], 0);
7147                 set_debugreg(vcpu->arch.eff_db[1], 1);
7148                 set_debugreg(vcpu->arch.eff_db[2], 2);
7149                 set_debugreg(vcpu->arch.eff_db[3], 3);
7150                 set_debugreg(vcpu->arch.dr6, 6);
7151                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7152         }
7153
7154         kvm_x86_ops->run(vcpu);
7155
7156         /*
7157          * Do this here before restoring debug registers on the host.  And
7158          * since we do this before handling the vmexit, a DR access vmexit
7159          * can (a) read the correct value of the debug registers, (b) set
7160          * KVM_DEBUGREG_WONT_EXIT again.
7161          */
7162         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7163                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7164                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7165                 kvm_update_dr0123(vcpu);
7166                 kvm_update_dr6(vcpu);
7167                 kvm_update_dr7(vcpu);
7168                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7169         }
7170
7171         /*
7172          * If the guest has used debug registers, at least dr7
7173          * will be disabled while returning to the host.
7174          * If we don't have active breakpoints in the host, we don't
7175          * care about the messed up debug address registers. But if
7176          * we have some of them active, restore the old state.
7177          */
7178         if (hw_breakpoint_active())
7179                 hw_breakpoint_restore();
7180
7181         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7182
7183         vcpu->mode = OUTSIDE_GUEST_MODE;
7184         smp_wmb();
7185
7186         kvm_put_guest_xcr0(vcpu);
7187
7188         kvm_x86_ops->handle_external_intr(vcpu);
7189
7190         ++vcpu->stat.exits;
7191
7192         guest_exit_irqoff();
7193
7194         local_irq_enable();
7195         preempt_enable();
7196
7197         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7198
7199         /*
7200          * Profile KVM exit RIPs:
7201          */
7202         if (unlikely(prof_on == KVM_PROFILING)) {
7203                 unsigned long rip = kvm_rip_read(vcpu);
7204                 profile_hit(KVM_PROFILING, (void *)rip);
7205         }
7206
7207         if (unlikely(vcpu->arch.tsc_always_catchup))
7208                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7209
7210         if (vcpu->arch.apic_attention)
7211                 kvm_lapic_sync_from_vapic(vcpu);
7212
7213         vcpu->arch.gpa_available = false;
7214         r = kvm_x86_ops->handle_exit(vcpu);
7215         return r;
7216
7217 cancel_injection:
7218         kvm_x86_ops->cancel_injection(vcpu);
7219         if (unlikely(vcpu->arch.apic_attention))
7220                 kvm_lapic_sync_from_vapic(vcpu);
7221 out:
7222         return r;
7223 }
7224
7225 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7226 {
7227         if (!kvm_arch_vcpu_runnable(vcpu) &&
7228             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7229                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7230                 kvm_vcpu_block(vcpu);
7231                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7232
7233                 if (kvm_x86_ops->post_block)
7234                         kvm_x86_ops->post_block(vcpu);
7235
7236                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7237                         return 1;
7238         }
7239
7240         kvm_apic_accept_events(vcpu);
7241         switch(vcpu->arch.mp_state) {
7242         case KVM_MP_STATE_HALTED:
7243                 vcpu->arch.pv.pv_unhalted = false;
7244                 vcpu->arch.mp_state =
7245                         KVM_MP_STATE_RUNNABLE;
7246         case KVM_MP_STATE_RUNNABLE:
7247                 vcpu->arch.apf.halted = false;
7248                 break;
7249         case KVM_MP_STATE_INIT_RECEIVED:
7250                 break;
7251         default:
7252                 return -EINTR;
7253                 break;
7254         }
7255         return 1;
7256 }
7257
7258 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7259 {
7260         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7261                 kvm_x86_ops->check_nested_events(vcpu, false);
7262
7263         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7264                 !vcpu->arch.apf.halted);
7265 }
7266
7267 static int vcpu_run(struct kvm_vcpu *vcpu)
7268 {
7269         int r;
7270         struct kvm *kvm = vcpu->kvm;
7271
7272         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7273         vcpu->arch.l1tf_flush_l1d = true;
7274
7275         for (;;) {
7276                 if (kvm_vcpu_running(vcpu)) {
7277                         r = vcpu_enter_guest(vcpu);
7278                 } else {
7279                         r = vcpu_block(kvm, vcpu);
7280                 }
7281
7282                 if (r <= 0)
7283                         break;
7284
7285                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7286                 if (kvm_cpu_has_pending_timer(vcpu))
7287                         kvm_inject_pending_timer_irqs(vcpu);
7288
7289                 if (dm_request_for_irq_injection(vcpu) &&
7290                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7291                         r = 0;
7292                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7293                         ++vcpu->stat.request_irq_exits;
7294                         break;
7295                 }
7296
7297                 kvm_check_async_pf_completion(vcpu);
7298
7299                 if (signal_pending(current)) {
7300                         r = -EINTR;
7301                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7302                         ++vcpu->stat.signal_exits;
7303                         break;
7304                 }
7305                 if (need_resched()) {
7306                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7307                         cond_resched();
7308                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7309                 }
7310         }
7311
7312         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7313
7314         return r;
7315 }
7316
7317 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7318 {
7319         int r;
7320         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7321         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7322         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7323         if (r != EMULATE_DONE)
7324                 return 0;
7325         return 1;
7326 }
7327
7328 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7329 {
7330         BUG_ON(!vcpu->arch.pio.count);
7331
7332         return complete_emulated_io(vcpu);
7333 }
7334
7335 /*
7336  * Implements the following, as a state machine:
7337  *
7338  * read:
7339  *   for each fragment
7340  *     for each mmio piece in the fragment
7341  *       write gpa, len
7342  *       exit
7343  *       copy data
7344  *   execute insn
7345  *
7346  * write:
7347  *   for each fragment
7348  *     for each mmio piece in the fragment
7349  *       write gpa, len
7350  *       copy data
7351  *       exit
7352  */
7353 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7354 {
7355         struct kvm_run *run = vcpu->run;
7356         struct kvm_mmio_fragment *frag;
7357         unsigned len;
7358
7359         BUG_ON(!vcpu->mmio_needed);
7360
7361         /* Complete previous fragment */
7362         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7363         len = min(8u, frag->len);
7364         if (!vcpu->mmio_is_write)
7365                 memcpy(frag->data, run->mmio.data, len);
7366
7367         if (frag->len <= 8) {
7368                 /* Switch to the next fragment. */
7369                 frag++;
7370                 vcpu->mmio_cur_fragment++;
7371         } else {
7372                 /* Go forward to the next mmio piece. */
7373                 frag->data += len;
7374                 frag->gpa += len;
7375                 frag->len -= len;
7376         }
7377
7378         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7379                 vcpu->mmio_needed = 0;
7380
7381                 /* FIXME: return into emulator if single-stepping.  */
7382                 if (vcpu->mmio_is_write)
7383                         return 1;
7384                 vcpu->mmio_read_completed = 1;
7385                 return complete_emulated_io(vcpu);
7386         }
7387
7388         run->exit_reason = KVM_EXIT_MMIO;
7389         run->mmio.phys_addr = frag->gpa;
7390         if (vcpu->mmio_is_write)
7391                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7392         run->mmio.len = min(8u, frag->len);
7393         run->mmio.is_write = vcpu->mmio_is_write;
7394         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7395         return 0;
7396 }
7397
7398
7399 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7400 {
7401         int r;
7402
7403         kvm_sigset_activate(vcpu);
7404
7405         kvm_load_guest_fpu(vcpu);
7406
7407         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7408                 if (kvm_run->immediate_exit) {
7409                         r = -EINTR;
7410                         goto out;
7411                 }
7412                 kvm_vcpu_block(vcpu);
7413                 kvm_apic_accept_events(vcpu);
7414                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7415                 r = -EAGAIN;
7416                 if (signal_pending(current)) {
7417                         r = -EINTR;
7418                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7419                         ++vcpu->stat.signal_exits;
7420                 }
7421                 goto out;
7422         }
7423
7424         /* re-sync apic's tpr */
7425         if (!lapic_in_kernel(vcpu)) {
7426                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7427                         r = -EINVAL;
7428                         goto out;
7429                 }
7430         }
7431
7432         if (unlikely(vcpu->arch.complete_userspace_io)) {
7433                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7434                 vcpu->arch.complete_userspace_io = NULL;
7435                 r = cui(vcpu);
7436                 if (r <= 0)
7437                         goto out;
7438         } else
7439                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7440
7441         if (kvm_run->immediate_exit)
7442                 r = -EINTR;
7443         else
7444                 r = vcpu_run(vcpu);
7445
7446 out:
7447         kvm_put_guest_fpu(vcpu);
7448         post_kvm_run_save(vcpu);
7449         kvm_sigset_deactivate(vcpu);
7450
7451         return r;
7452 }
7453
7454 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7455 {
7456         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7457                 /*
7458                  * We are here if userspace calls get_regs() in the middle of
7459                  * instruction emulation. Registers state needs to be copied
7460                  * back from emulation context to vcpu. Userspace shouldn't do
7461                  * that usually, but some bad designed PV devices (vmware
7462                  * backdoor interface) need this to work
7463                  */
7464                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7465                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7466         }
7467         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7468         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7469         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7470         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7471         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7472         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7473         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7474         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7475 #ifdef CONFIG_X86_64
7476         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7477         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7478         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7479         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7480         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7481         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7482         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7483         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7484 #endif
7485
7486         regs->rip = kvm_rip_read(vcpu);
7487         regs->rflags = kvm_get_rflags(vcpu);
7488
7489         return 0;
7490 }
7491
7492 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7493 {
7494         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7495         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7496
7497         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7498         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7499         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7500         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7501         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7502         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7503         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7504         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7505 #ifdef CONFIG_X86_64
7506         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7507         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7508         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7509         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7510         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7511         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7512         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7513         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7514 #endif
7515
7516         kvm_rip_write(vcpu, regs->rip);
7517         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7518
7519         vcpu->arch.exception.pending = false;
7520
7521         kvm_make_request(KVM_REQ_EVENT, vcpu);
7522
7523         return 0;
7524 }
7525
7526 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7527 {
7528         struct kvm_segment cs;
7529
7530         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7531         *db = cs.db;
7532         *l = cs.l;
7533 }
7534 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7535
7536 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7537                                   struct kvm_sregs *sregs)
7538 {
7539         struct desc_ptr dt;
7540
7541         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7542         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7543         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7544         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7545         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7546         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7547
7548         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7549         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7550
7551         kvm_x86_ops->get_idt(vcpu, &dt);
7552         sregs->idt.limit = dt.size;
7553         sregs->idt.base = dt.address;
7554         kvm_x86_ops->get_gdt(vcpu, &dt);
7555         sregs->gdt.limit = dt.size;
7556         sregs->gdt.base = dt.address;
7557
7558         sregs->cr0 = kvm_read_cr0(vcpu);
7559         sregs->cr2 = vcpu->arch.cr2;
7560         sregs->cr3 = kvm_read_cr3(vcpu);
7561         sregs->cr4 = kvm_read_cr4(vcpu);
7562         sregs->cr8 = kvm_get_cr8(vcpu);
7563         sregs->efer = vcpu->arch.efer;
7564         sregs->apic_base = kvm_get_apic_base(vcpu);
7565
7566         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7567
7568         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7569                 set_bit(vcpu->arch.interrupt.nr,
7570                         (unsigned long *)sregs->interrupt_bitmap);
7571
7572         return 0;
7573 }
7574
7575 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7576                                     struct kvm_mp_state *mp_state)
7577 {
7578         kvm_apic_accept_events(vcpu);
7579         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7580                                         vcpu->arch.pv.pv_unhalted)
7581                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7582         else
7583                 mp_state->mp_state = vcpu->arch.mp_state;
7584
7585         return 0;
7586 }
7587
7588 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7589                                     struct kvm_mp_state *mp_state)
7590 {
7591         if (!lapic_in_kernel(vcpu) &&
7592             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7593                 return -EINVAL;
7594
7595         /* INITs are latched while in SMM */
7596         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7597             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7598              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7599                 return -EINVAL;
7600
7601         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7602                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7603                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7604         } else
7605                 vcpu->arch.mp_state = mp_state->mp_state;
7606         kvm_make_request(KVM_REQ_EVENT, vcpu);
7607         return 0;
7608 }
7609
7610 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7611                     int reason, bool has_error_code, u32 error_code)
7612 {
7613         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7614         int ret;
7615
7616         init_emulate_ctxt(vcpu);
7617
7618         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7619                                    has_error_code, error_code);
7620
7621         if (ret)
7622                 return EMULATE_FAIL;
7623
7624         kvm_rip_write(vcpu, ctxt->eip);
7625         kvm_set_rflags(vcpu, ctxt->eflags);
7626         kvm_make_request(KVM_REQ_EVENT, vcpu);
7627         return EMULATE_DONE;
7628 }
7629 EXPORT_SYMBOL_GPL(kvm_task_switch);
7630
7631 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7632 {
7633         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7634                 /*
7635                  * When EFER.LME and CR0.PG are set, the processor is in
7636                  * 64-bit mode (though maybe in a 32-bit code segment).
7637                  * CR4.PAE and EFER.LMA must be set.
7638                  */
7639                 if (!(sregs->cr4 & X86_CR4_PAE)
7640                     || !(sregs->efer & EFER_LMA))
7641                         return -EINVAL;
7642         } else {
7643                 /*
7644                  * Not in 64-bit mode: EFER.LMA is clear and the code
7645                  * segment cannot be 64-bit.
7646                  */
7647                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7648                         return -EINVAL;
7649         }
7650
7651         return 0;
7652 }
7653
7654 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7655                                   struct kvm_sregs *sregs)
7656 {
7657         struct msr_data apic_base_msr;
7658         int mmu_reset_needed = 0;
7659         int cpuid_update_needed = 0;
7660         int pending_vec, max_bits, idx;
7661         struct desc_ptr dt;
7662
7663         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7664                         (sregs->cr4 & X86_CR4_OSXSAVE))
7665                 return -EINVAL;
7666
7667         if (kvm_valid_sregs(vcpu, sregs))
7668                 return -EINVAL;
7669
7670         apic_base_msr.data = sregs->apic_base;
7671         apic_base_msr.host_initiated = true;
7672         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7673                 return -EINVAL;
7674
7675         dt.size = sregs->idt.limit;
7676         dt.address = sregs->idt.base;
7677         kvm_x86_ops->set_idt(vcpu, &dt);
7678         dt.size = sregs->gdt.limit;
7679         dt.address = sregs->gdt.base;
7680         kvm_x86_ops->set_gdt(vcpu, &dt);
7681
7682         vcpu->arch.cr2 = sregs->cr2;
7683         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7684         vcpu->arch.cr3 = sregs->cr3;
7685         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7686
7687         kvm_set_cr8(vcpu, sregs->cr8);
7688
7689         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7690         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7691
7692         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7693         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7694         vcpu->arch.cr0 = sregs->cr0;
7695
7696         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7697         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
7698                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
7699         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7700         if (cpuid_update_needed)
7701                 kvm_update_cpuid(vcpu);
7702
7703         idx = srcu_read_lock(&vcpu->kvm->srcu);
7704         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7705                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7706                 mmu_reset_needed = 1;
7707         }
7708         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7709
7710         if (mmu_reset_needed)
7711                 kvm_mmu_reset_context(vcpu);
7712
7713         max_bits = KVM_NR_INTERRUPTS;
7714         pending_vec = find_first_bit(
7715                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7716         if (pending_vec < max_bits) {
7717                 kvm_queue_interrupt(vcpu, pending_vec, false);
7718                 pr_debug("Set back pending irq %d\n", pending_vec);
7719         }
7720
7721         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7722         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7723         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7724         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7725         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7726         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7727
7728         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7729         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7730
7731         update_cr8_intercept(vcpu);
7732
7733         /* Older userspace won't unhalt the vcpu on reset. */
7734         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7735             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7736             !is_protmode(vcpu))
7737                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7738
7739         kvm_make_request(KVM_REQ_EVENT, vcpu);
7740
7741         return 0;
7742 }
7743
7744 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7745                                         struct kvm_guest_debug *dbg)
7746 {
7747         unsigned long rflags;
7748         int i, r;
7749
7750         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7751                 r = -EBUSY;
7752                 if (vcpu->arch.exception.pending)
7753                         goto out;
7754                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7755                         kvm_queue_exception(vcpu, DB_VECTOR);
7756                 else
7757                         kvm_queue_exception(vcpu, BP_VECTOR);
7758         }
7759
7760         /*
7761          * Read rflags as long as potentially injected trace flags are still
7762          * filtered out.
7763          */
7764         rflags = kvm_get_rflags(vcpu);
7765
7766         vcpu->guest_debug = dbg->control;
7767         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7768                 vcpu->guest_debug = 0;
7769
7770         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7771                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7772                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7773                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7774         } else {
7775                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7776                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7777         }
7778         kvm_update_dr7(vcpu);
7779
7780         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7781                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7782                         get_segment_base(vcpu, VCPU_SREG_CS);
7783
7784         /*
7785          * Trigger an rflags update that will inject or remove the trace
7786          * flags.
7787          */
7788         kvm_set_rflags(vcpu, rflags);
7789
7790         kvm_x86_ops->update_bp_intercept(vcpu);
7791
7792         r = 0;
7793
7794 out:
7795
7796         return r;
7797 }
7798
7799 /*
7800  * Translate a guest virtual address to a guest physical address.
7801  */
7802 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7803                                     struct kvm_translation *tr)
7804 {
7805         unsigned long vaddr = tr->linear_address;
7806         gpa_t gpa;
7807         int idx;
7808
7809         idx = srcu_read_lock(&vcpu->kvm->srcu);
7810         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7811         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7812         tr->physical_address = gpa;
7813         tr->valid = gpa != UNMAPPED_GVA;
7814         tr->writeable = 1;
7815         tr->usermode = 0;
7816
7817         return 0;
7818 }
7819
7820 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7821 {
7822         struct fxregs_state *fxsave =
7823                         &vcpu->arch.guest_fpu.state.fxsave;
7824
7825         memcpy(fpu->fpr, fxsave->st_space, 128);
7826         fpu->fcw = fxsave->cwd;
7827         fpu->fsw = fxsave->swd;
7828         fpu->ftwx = fxsave->twd;
7829         fpu->last_opcode = fxsave->fop;
7830         fpu->last_ip = fxsave->rip;
7831         fpu->last_dp = fxsave->rdp;
7832         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7833
7834         return 0;
7835 }
7836
7837 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7838 {
7839         struct fxregs_state *fxsave =
7840                         &vcpu->arch.guest_fpu.state.fxsave;
7841
7842         memcpy(fxsave->st_space, fpu->fpr, 128);
7843         fxsave->cwd = fpu->fcw;
7844         fxsave->swd = fpu->fsw;
7845         fxsave->twd = fpu->ftwx;
7846         fxsave->fop = fpu->last_opcode;
7847         fxsave->rip = fpu->last_ip;
7848         fxsave->rdp = fpu->last_dp;
7849         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7850
7851         return 0;
7852 }
7853
7854 static void fx_init(struct kvm_vcpu *vcpu)
7855 {
7856         fpstate_init(&vcpu->arch.guest_fpu.state);
7857         if (boot_cpu_has(X86_FEATURE_XSAVES))
7858                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7859                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7860
7861         /*
7862          * Ensure guest xcr0 is valid for loading
7863          */
7864         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7865
7866         vcpu->arch.cr0 |= X86_CR0_ET;
7867 }
7868
7869 /* Swap (qemu) user FPU context for the guest FPU context. */
7870 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7871 {
7872         preempt_disable();
7873         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
7874         /* PKRU is separately restored in kvm_x86_ops->run.  */
7875         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7876                                 ~XFEATURE_MASK_PKRU);
7877         preempt_enable();
7878         trace_kvm_fpu(1);
7879 }
7880
7881 /* When vcpu_run ends, restore user space FPU context. */
7882 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7883 {
7884         preempt_disable();
7885         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7886         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
7887         preempt_enable();
7888         ++vcpu->stat.fpu_reload;
7889         trace_kvm_fpu(0);
7890 }
7891
7892 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7893 {
7894         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7895
7896         kvmclock_reset(vcpu);
7897
7898         kvm_x86_ops->vcpu_free(vcpu);
7899         free_cpumask_var(wbinvd_dirty_mask);
7900 }
7901
7902 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7903                                                 unsigned int id)
7904 {
7905         struct kvm_vcpu *vcpu;
7906
7907         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7908                 printk_once(KERN_WARNING
7909                 "kvm: SMP vm created on host with unstable TSC; "
7910                 "guest TSC will not be reliable\n");
7911
7912         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7913
7914         return vcpu;
7915 }
7916
7917 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7918 {
7919         int r;
7920
7921         kvm_vcpu_mtrr_init(vcpu);
7922         r = vcpu_load(vcpu);
7923         if (r)
7924                 return r;
7925         kvm_vcpu_reset(vcpu, false);
7926         kvm_mmu_setup(vcpu);
7927         vcpu_put(vcpu);
7928         return r;
7929 }
7930
7931 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7932 {
7933         struct msr_data msr;
7934         struct kvm *kvm = vcpu->kvm;
7935
7936         kvm_hv_vcpu_postcreate(vcpu);
7937
7938         if (vcpu_load(vcpu))
7939                 return;
7940         msr.data = 0x0;
7941         msr.index = MSR_IA32_TSC;
7942         msr.host_initiated = true;
7943         kvm_write_tsc(vcpu, &msr);
7944         vcpu_put(vcpu);
7945
7946         if (!kvmclock_periodic_sync)
7947                 return;
7948
7949         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7950                                         KVMCLOCK_SYNC_PERIOD);
7951 }
7952
7953 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7954 {
7955         int r;
7956         vcpu->arch.apf.msr_val = 0;
7957
7958         r = vcpu_load(vcpu);
7959         BUG_ON(r);
7960         kvm_mmu_unload(vcpu);
7961         vcpu_put(vcpu);
7962
7963         kvm_x86_ops->vcpu_free(vcpu);
7964 }
7965
7966 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7967 {
7968         kvm_lapic_reset(vcpu, init_event);
7969
7970         vcpu->arch.hflags = 0;
7971
7972         vcpu->arch.smi_pending = 0;
7973         atomic_set(&vcpu->arch.nmi_queued, 0);
7974         vcpu->arch.nmi_pending = 0;
7975         vcpu->arch.nmi_injected = false;
7976         kvm_clear_interrupt_queue(vcpu);
7977         kvm_clear_exception_queue(vcpu);
7978         vcpu->arch.exception.pending = false;
7979
7980         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7981         kvm_update_dr0123(vcpu);
7982         vcpu->arch.dr6 = DR6_INIT;
7983         kvm_update_dr6(vcpu);
7984         vcpu->arch.dr7 = DR7_FIXED_1;
7985         kvm_update_dr7(vcpu);
7986
7987         vcpu->arch.cr2 = 0;
7988
7989         kvm_make_request(KVM_REQ_EVENT, vcpu);
7990         vcpu->arch.apf.msr_val = 0;
7991         vcpu->arch.st.msr_val = 0;
7992
7993         kvmclock_reset(vcpu);
7994
7995         kvm_clear_async_pf_completion_queue(vcpu);
7996         kvm_async_pf_hash_reset(vcpu);
7997         vcpu->arch.apf.halted = false;
7998
7999         if (!init_event) {
8000                 kvm_pmu_reset(vcpu);
8001                 vcpu->arch.smbase = 0x30000;
8002
8003                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8004                 vcpu->arch.msr_misc_features_enables = 0;
8005         }
8006
8007         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8008         vcpu->arch.regs_avail = ~0;
8009         vcpu->arch.regs_dirty = ~0;
8010
8011         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8012 }
8013
8014 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8015 {
8016         struct kvm_segment cs;
8017
8018         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8019         cs.selector = vector << 8;
8020         cs.base = vector << 12;
8021         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8022         kvm_rip_write(vcpu, 0);
8023 }
8024
8025 int kvm_arch_hardware_enable(void)
8026 {
8027         struct kvm *kvm;
8028         struct kvm_vcpu *vcpu;
8029         int i;
8030         int ret;
8031         u64 local_tsc;
8032         u64 max_tsc = 0;
8033         bool stable, backwards_tsc = false;
8034
8035         kvm_shared_msr_cpu_online();
8036         ret = kvm_x86_ops->hardware_enable();
8037         if (ret != 0)
8038                 return ret;
8039
8040         local_tsc = rdtsc();
8041         stable = !check_tsc_unstable();
8042         list_for_each_entry(kvm, &vm_list, vm_list) {
8043                 kvm_for_each_vcpu(i, vcpu, kvm) {
8044                         if (!stable && vcpu->cpu == smp_processor_id())
8045                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8046                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8047                                 backwards_tsc = true;
8048                                 if (vcpu->arch.last_host_tsc > max_tsc)
8049                                         max_tsc = vcpu->arch.last_host_tsc;
8050                         }
8051                 }
8052         }
8053
8054         /*
8055          * Sometimes, even reliable TSCs go backwards.  This happens on
8056          * platforms that reset TSC during suspend or hibernate actions, but
8057          * maintain synchronization.  We must compensate.  Fortunately, we can
8058          * detect that condition here, which happens early in CPU bringup,
8059          * before any KVM threads can be running.  Unfortunately, we can't
8060          * bring the TSCs fully up to date with real time, as we aren't yet far
8061          * enough into CPU bringup that we know how much real time has actually
8062          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8063          * variables that haven't been updated yet.
8064          *
8065          * So we simply find the maximum observed TSC above, then record the
8066          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8067          * the adjustment will be applied.  Note that we accumulate
8068          * adjustments, in case multiple suspend cycles happen before some VCPU
8069          * gets a chance to run again.  In the event that no KVM threads get a
8070          * chance to run, we will miss the entire elapsed period, as we'll have
8071          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8072          * loose cycle time.  This isn't too big a deal, since the loss will be
8073          * uniform across all VCPUs (not to mention the scenario is extremely
8074          * unlikely). It is possible that a second hibernate recovery happens
8075          * much faster than a first, causing the observed TSC here to be
8076          * smaller; this would require additional padding adjustment, which is
8077          * why we set last_host_tsc to the local tsc observed here.
8078          *
8079          * N.B. - this code below runs only on platforms with reliable TSC,
8080          * as that is the only way backwards_tsc is set above.  Also note
8081          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8082          * have the same delta_cyc adjustment applied if backwards_tsc
8083          * is detected.  Note further, this adjustment is only done once,
8084          * as we reset last_host_tsc on all VCPUs to stop this from being
8085          * called multiple times (one for each physical CPU bringup).
8086          *
8087          * Platforms with unreliable TSCs don't have to deal with this, they
8088          * will be compensated by the logic in vcpu_load, which sets the TSC to
8089          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8090          * guarantee that they stay in perfect synchronization.
8091          */
8092         if (backwards_tsc) {
8093                 u64 delta_cyc = max_tsc - local_tsc;
8094                 list_for_each_entry(kvm, &vm_list, vm_list) {
8095                         kvm->arch.backwards_tsc_observed = true;
8096                         kvm_for_each_vcpu(i, vcpu, kvm) {
8097                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8098                                 vcpu->arch.last_host_tsc = local_tsc;
8099                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8100                         }
8101
8102                         /*
8103                          * We have to disable TSC offset matching.. if you were
8104                          * booting a VM while issuing an S4 host suspend....
8105                          * you may have some problem.  Solving this issue is
8106                          * left as an exercise to the reader.
8107                          */
8108                         kvm->arch.last_tsc_nsec = 0;
8109                         kvm->arch.last_tsc_write = 0;
8110                 }
8111
8112         }
8113         return 0;
8114 }
8115
8116 void kvm_arch_hardware_disable(void)
8117 {
8118         kvm_x86_ops->hardware_disable();
8119         drop_user_return_notifiers();
8120 }
8121
8122 int kvm_arch_hardware_setup(void)
8123 {
8124         int r;
8125
8126         r = kvm_x86_ops->hardware_setup();
8127         if (r != 0)
8128                 return r;
8129
8130         if (kvm_has_tsc_control) {
8131                 /*
8132                  * Make sure the user can only configure tsc_khz values that
8133                  * fit into a signed integer.
8134                  * A min value is not calculated needed because it will always
8135                  * be 1 on all machines.
8136                  */
8137                 u64 max = min(0x7fffffffULL,
8138                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8139                 kvm_max_guest_tsc_khz = max;
8140
8141                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8142         }
8143
8144         kvm_init_msr_list();
8145         return 0;
8146 }
8147
8148 void kvm_arch_hardware_unsetup(void)
8149 {
8150         kvm_x86_ops->hardware_unsetup();
8151 }
8152
8153 void kvm_arch_check_processor_compat(void *rtn)
8154 {
8155         kvm_x86_ops->check_processor_compatibility(rtn);
8156 }
8157
8158 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8159 {
8160         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8161 }
8162 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8163
8164 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8165 {
8166         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8167 }
8168
8169 struct static_key kvm_no_apic_vcpu __read_mostly;
8170 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8171
8172 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8173 {
8174         struct page *page;
8175         struct kvm *kvm;
8176         int r;
8177
8178         BUG_ON(vcpu->kvm == NULL);
8179         kvm = vcpu->kvm;
8180
8181         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8182         vcpu->arch.pv.pv_unhalted = false;
8183         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8184         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8185                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8186         else
8187                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8188
8189         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8190         if (!page) {
8191                 r = -ENOMEM;
8192                 goto fail;
8193         }
8194         vcpu->arch.pio_data = page_address(page);
8195
8196         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8197
8198         r = kvm_mmu_create(vcpu);
8199         if (r < 0)
8200                 goto fail_free_pio_data;
8201
8202         if (irqchip_in_kernel(kvm)) {
8203                 r = kvm_create_lapic(vcpu);
8204                 if (r < 0)
8205                         goto fail_mmu_destroy;
8206         } else
8207                 static_key_slow_inc(&kvm_no_apic_vcpu);
8208
8209         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8210                                        GFP_KERNEL);
8211         if (!vcpu->arch.mce_banks) {
8212                 r = -ENOMEM;
8213                 goto fail_free_lapic;
8214         }
8215         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8216
8217         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8218                 r = -ENOMEM;
8219                 goto fail_free_mce_banks;
8220         }
8221
8222         fx_init(vcpu);
8223
8224         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
8225         vcpu->arch.pv_time_enabled = false;
8226
8227         vcpu->arch.guest_supported_xcr0 = 0;
8228         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8229
8230         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8231
8232         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8233
8234         kvm_async_pf_hash_reset(vcpu);
8235         kvm_pmu_init(vcpu);
8236
8237         vcpu->arch.pending_external_vector = -1;
8238         vcpu->arch.preempted_in_kernel = false;
8239
8240         kvm_hv_vcpu_init(vcpu);
8241
8242         return 0;
8243
8244 fail_free_mce_banks:
8245         kfree(vcpu->arch.mce_banks);
8246 fail_free_lapic:
8247         kvm_free_lapic(vcpu);
8248 fail_mmu_destroy:
8249         kvm_mmu_destroy(vcpu);
8250 fail_free_pio_data:
8251         free_page((unsigned long)vcpu->arch.pio_data);
8252 fail:
8253         return r;
8254 }
8255
8256 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8257 {
8258         int idx;
8259
8260         kvm_hv_vcpu_uninit(vcpu);
8261         kvm_pmu_destroy(vcpu);
8262         kfree(vcpu->arch.mce_banks);
8263         kvm_free_lapic(vcpu);
8264         idx = srcu_read_lock(&vcpu->kvm->srcu);
8265         kvm_mmu_destroy(vcpu);
8266         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8267         free_page((unsigned long)vcpu->arch.pio_data);
8268         if (!lapic_in_kernel(vcpu))
8269                 static_key_slow_dec(&kvm_no_apic_vcpu);
8270 }
8271
8272 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8273 {
8274         vcpu->arch.l1tf_flush_l1d = true;
8275         kvm_x86_ops->sched_in(vcpu, cpu);
8276 }
8277
8278 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8279 {
8280         if (type)
8281                 return -EINVAL;
8282
8283         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8284         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8285         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8286         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8287         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8288
8289         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8290         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8291         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8292         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8293                 &kvm->arch.irq_sources_bitmap);
8294
8295         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8296         mutex_init(&kvm->arch.apic_map_lock);
8297         mutex_init(&kvm->arch.hyperv.hv_lock);
8298         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8299
8300         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8301         pvclock_update_vm_gtod_copy(kvm);
8302
8303         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8304         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8305
8306         kvm_page_track_init(kvm);
8307         kvm_mmu_init_vm(kvm);
8308
8309         if (kvm_x86_ops->vm_init)
8310                 return kvm_x86_ops->vm_init(kvm);
8311
8312         return 0;
8313 }
8314
8315 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8316 {
8317         int r;
8318         r = vcpu_load(vcpu);
8319         BUG_ON(r);
8320         kvm_mmu_unload(vcpu);
8321         vcpu_put(vcpu);
8322 }
8323
8324 static void kvm_free_vcpus(struct kvm *kvm)
8325 {
8326         unsigned int i;
8327         struct kvm_vcpu *vcpu;
8328
8329         /*
8330          * Unpin any mmu pages first.
8331          */
8332         kvm_for_each_vcpu(i, vcpu, kvm) {
8333                 kvm_clear_async_pf_completion_queue(vcpu);
8334                 kvm_unload_vcpu_mmu(vcpu);
8335         }
8336         kvm_for_each_vcpu(i, vcpu, kvm)
8337                 kvm_arch_vcpu_free(vcpu);
8338
8339         mutex_lock(&kvm->lock);
8340         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8341                 kvm->vcpus[i] = NULL;
8342
8343         atomic_set(&kvm->online_vcpus, 0);
8344         mutex_unlock(&kvm->lock);
8345 }
8346
8347 void kvm_arch_sync_events(struct kvm *kvm)
8348 {
8349         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8350         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8351         kvm_free_pit(kvm);
8352 }
8353
8354 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8355 {
8356         int i, r;
8357         unsigned long hva;
8358         struct kvm_memslots *slots = kvm_memslots(kvm);
8359         struct kvm_memory_slot *slot, old;
8360
8361         /* Called with kvm->slots_lock held.  */
8362         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8363                 return -EINVAL;
8364
8365         slot = id_to_memslot(slots, id);
8366         if (size) {
8367                 if (slot->npages)
8368                         return -EEXIST;
8369
8370                 /*
8371                  * MAP_SHARED to prevent internal slot pages from being moved
8372                  * by fork()/COW.
8373                  */
8374                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8375                               MAP_SHARED | MAP_ANONYMOUS, 0);
8376                 if (IS_ERR((void *)hva))
8377                         return PTR_ERR((void *)hva);
8378         } else {
8379                 if (!slot->npages)
8380                         return 0;
8381
8382                 hva = 0;
8383         }
8384
8385         old = *slot;
8386         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8387                 struct kvm_userspace_memory_region m;
8388
8389                 m.slot = id | (i << 16);
8390                 m.flags = 0;
8391                 m.guest_phys_addr = gpa;
8392                 m.userspace_addr = hva;
8393                 m.memory_size = size;
8394                 r = __kvm_set_memory_region(kvm, &m);
8395                 if (r < 0)
8396                         return r;
8397         }
8398
8399         if (!size)
8400                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8401
8402         return 0;
8403 }
8404 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8405
8406 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8407 {
8408         int r;
8409
8410         mutex_lock(&kvm->slots_lock);
8411         r = __x86_set_memory_region(kvm, id, gpa, size);
8412         mutex_unlock(&kvm->slots_lock);
8413
8414         return r;
8415 }
8416 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8417
8418 void kvm_arch_destroy_vm(struct kvm *kvm)
8419 {
8420         if (current->mm == kvm->mm) {
8421                 /*
8422                  * Free memory regions allocated on behalf of userspace,
8423                  * unless the the memory map has changed due to process exit
8424                  * or fd copying.
8425                  */
8426                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8427                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8428                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8429         }
8430         if (kvm_x86_ops->vm_destroy)
8431                 kvm_x86_ops->vm_destroy(kvm);
8432         kvm_pic_destroy(kvm);
8433         kvm_ioapic_destroy(kvm);
8434         kvm_free_vcpus(kvm);
8435         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8436         kvm_mmu_uninit_vm(kvm);
8437         kvm_page_track_cleanup(kvm);
8438 }
8439
8440 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8441                            struct kvm_memory_slot *dont)
8442 {
8443         int i;
8444
8445         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8446                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8447                         kvfree(free->arch.rmap[i]);
8448                         free->arch.rmap[i] = NULL;
8449                 }
8450                 if (i == 0)
8451                         continue;
8452
8453                 if (!dont || free->arch.lpage_info[i - 1] !=
8454                              dont->arch.lpage_info[i - 1]) {
8455                         kvfree(free->arch.lpage_info[i - 1]);
8456                         free->arch.lpage_info[i - 1] = NULL;
8457                 }
8458         }
8459
8460         kvm_page_track_free_memslot(free, dont);
8461 }
8462
8463 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8464                             unsigned long npages)
8465 {
8466         int i;
8467
8468         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8469                 struct kvm_lpage_info *linfo;
8470                 unsigned long ugfn;
8471                 int lpages;
8472                 int level = i + 1;
8473
8474                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8475                                       slot->base_gfn, level) + 1;
8476
8477                 slot->arch.rmap[i] =
8478                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8479                 if (!slot->arch.rmap[i])
8480                         goto out_free;
8481                 if (i == 0)
8482                         continue;
8483
8484                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8485                 if (!linfo)
8486                         goto out_free;
8487
8488                 slot->arch.lpage_info[i - 1] = linfo;
8489
8490                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8491                         linfo[0].disallow_lpage = 1;
8492                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8493                         linfo[lpages - 1].disallow_lpage = 1;
8494                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8495                 /*
8496                  * If the gfn and userspace address are not aligned wrt each
8497                  * other, or if explicitly asked to, disable large page
8498                  * support for this slot
8499                  */
8500                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8501                     !kvm_largepages_enabled()) {
8502                         unsigned long j;
8503
8504                         for (j = 0; j < lpages; ++j)
8505                                 linfo[j].disallow_lpage = 1;
8506                 }
8507         }
8508
8509         if (kvm_page_track_create_memslot(slot, npages))
8510                 goto out_free;
8511
8512         return 0;
8513
8514 out_free:
8515         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8516                 kvfree(slot->arch.rmap[i]);
8517                 slot->arch.rmap[i] = NULL;
8518                 if (i == 0)
8519                         continue;
8520
8521                 kvfree(slot->arch.lpage_info[i - 1]);
8522                 slot->arch.lpage_info[i - 1] = NULL;
8523         }
8524         return -ENOMEM;
8525 }
8526
8527 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8528 {
8529         /*
8530          * memslots->generation has been incremented.
8531          * mmio generation may have reached its maximum value.
8532          */
8533         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8534 }
8535
8536 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8537                                 struct kvm_memory_slot *memslot,
8538                                 const struct kvm_userspace_memory_region *mem,
8539                                 enum kvm_mr_change change)
8540 {
8541         return 0;
8542 }
8543
8544 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8545                                      struct kvm_memory_slot *new)
8546 {
8547         /* Still write protect RO slot */
8548         if (new->flags & KVM_MEM_READONLY) {
8549                 kvm_mmu_slot_remove_write_access(kvm, new);
8550                 return;
8551         }
8552
8553         /*
8554          * Call kvm_x86_ops dirty logging hooks when they are valid.
8555          *
8556          * kvm_x86_ops->slot_disable_log_dirty is called when:
8557          *
8558          *  - KVM_MR_CREATE with dirty logging is disabled
8559          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8560          *
8561          * The reason is, in case of PML, we need to set D-bit for any slots
8562          * with dirty logging disabled in order to eliminate unnecessary GPA
8563          * logging in PML buffer (and potential PML buffer full VMEXT). This
8564          * guarantees leaving PML enabled during guest's lifetime won't have
8565          * any additonal overhead from PML when guest is running with dirty
8566          * logging disabled for memory slots.
8567          *
8568          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8569          * to dirty logging mode.
8570          *
8571          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8572          *
8573          * In case of write protect:
8574          *
8575          * Write protect all pages for dirty logging.
8576          *
8577          * All the sptes including the large sptes which point to this
8578          * slot are set to readonly. We can not create any new large
8579          * spte on this slot until the end of the logging.
8580          *
8581          * See the comments in fast_page_fault().
8582          */
8583         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8584                 if (kvm_x86_ops->slot_enable_log_dirty)
8585                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8586                 else
8587                         kvm_mmu_slot_remove_write_access(kvm, new);
8588         } else {
8589                 if (kvm_x86_ops->slot_disable_log_dirty)
8590                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8591         }
8592 }
8593
8594 void kvm_arch_commit_memory_region(struct kvm *kvm,
8595                                 const struct kvm_userspace_memory_region *mem,
8596                                 const struct kvm_memory_slot *old,
8597                                 const struct kvm_memory_slot *new,
8598                                 enum kvm_mr_change change)
8599 {
8600         int nr_mmu_pages = 0;
8601
8602         if (!kvm->arch.n_requested_mmu_pages)
8603                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8604
8605         if (nr_mmu_pages)
8606                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8607
8608         /*
8609          * Dirty logging tracks sptes in 4k granularity, meaning that large
8610          * sptes have to be split.  If live migration is successful, the guest
8611          * in the source machine will be destroyed and large sptes will be
8612          * created in the destination. However, if the guest continues to run
8613          * in the source machine (for example if live migration fails), small
8614          * sptes will remain around and cause bad performance.
8615          *
8616          * Scan sptes if dirty logging has been stopped, dropping those
8617          * which can be collapsed into a single large-page spte.  Later
8618          * page faults will create the large-page sptes.
8619          */
8620         if ((change != KVM_MR_DELETE) &&
8621                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8622                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8623                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8624
8625         /*
8626          * Set up write protection and/or dirty logging for the new slot.
8627          *
8628          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8629          * been zapped so no dirty logging staff is needed for old slot. For
8630          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8631          * new and it's also covered when dealing with the new slot.
8632          *
8633          * FIXME: const-ify all uses of struct kvm_memory_slot.
8634          */
8635         if (change != KVM_MR_DELETE)
8636                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8637 }
8638
8639 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8640 {
8641         kvm_mmu_invalidate_zap_all_pages(kvm);
8642 }
8643
8644 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8645                                    struct kvm_memory_slot *slot)
8646 {
8647         kvm_page_track_flush_slot(kvm, slot);
8648 }
8649
8650 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8651 {
8652         if (!list_empty_careful(&vcpu->async_pf.done))
8653                 return true;
8654
8655         if (kvm_apic_has_events(vcpu))
8656                 return true;
8657
8658         if (vcpu->arch.pv.pv_unhalted)
8659                 return true;
8660
8661         if (vcpu->arch.exception.pending)
8662                 return true;
8663
8664         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8665             (vcpu->arch.nmi_pending &&
8666              kvm_x86_ops->nmi_allowed(vcpu)))
8667                 return true;
8668
8669         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8670             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8671                 return true;
8672
8673         if (kvm_arch_interrupt_allowed(vcpu) &&
8674             kvm_cpu_has_interrupt(vcpu))
8675                 return true;
8676
8677         if (kvm_hv_has_stimer_pending(vcpu))
8678                 return true;
8679
8680         return false;
8681 }
8682
8683 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8684 {
8685         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8686 }
8687
8688 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8689 {
8690         return vcpu->arch.preempted_in_kernel;
8691 }
8692
8693 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8694 {
8695         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8696 }
8697
8698 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8699 {
8700         return kvm_x86_ops->interrupt_allowed(vcpu);
8701 }
8702
8703 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8704 {
8705         if (is_64_bit_mode(vcpu))
8706                 return kvm_rip_read(vcpu);
8707         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8708                      kvm_rip_read(vcpu));
8709 }
8710 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8711
8712 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8713 {
8714         return kvm_get_linear_rip(vcpu) == linear_rip;
8715 }
8716 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8717
8718 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8719 {
8720         unsigned long rflags;
8721
8722         rflags = kvm_x86_ops->get_rflags(vcpu);
8723         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8724                 rflags &= ~X86_EFLAGS_TF;
8725         return rflags;
8726 }
8727 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8728
8729 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8730 {
8731         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8732             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8733                 rflags |= X86_EFLAGS_TF;
8734         kvm_x86_ops->set_rflags(vcpu, rflags);
8735 }
8736
8737 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8738 {
8739         __kvm_set_rflags(vcpu, rflags);
8740         kvm_make_request(KVM_REQ_EVENT, vcpu);
8741 }
8742 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8743
8744 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8745 {
8746         int r;
8747
8748         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8749               work->wakeup_all)
8750                 return;
8751
8752         r = kvm_mmu_reload(vcpu);
8753         if (unlikely(r))
8754                 return;
8755
8756         if (!vcpu->arch.mmu.direct_map &&
8757               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8758                 return;
8759
8760         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8761 }
8762
8763 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8764 {
8765         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8766 }
8767
8768 static inline u32 kvm_async_pf_next_probe(u32 key)
8769 {
8770         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8771 }
8772
8773 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8774 {
8775         u32 key = kvm_async_pf_hash_fn(gfn);
8776
8777         while (vcpu->arch.apf.gfns[key] != ~0)
8778                 key = kvm_async_pf_next_probe(key);
8779
8780         vcpu->arch.apf.gfns[key] = gfn;
8781 }
8782
8783 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8784 {
8785         int i;
8786         u32 key = kvm_async_pf_hash_fn(gfn);
8787
8788         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8789                      (vcpu->arch.apf.gfns[key] != gfn &&
8790                       vcpu->arch.apf.gfns[key] != ~0); i++)
8791                 key = kvm_async_pf_next_probe(key);
8792
8793         return key;
8794 }
8795
8796 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8797 {
8798         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8799 }
8800
8801 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8802 {
8803         u32 i, j, k;
8804
8805         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8806         while (true) {
8807                 vcpu->arch.apf.gfns[i] = ~0;
8808                 do {
8809                         j = kvm_async_pf_next_probe(j);
8810                         if (vcpu->arch.apf.gfns[j] == ~0)
8811                                 return;
8812                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8813                         /*
8814                          * k lies cyclically in ]i,j]
8815                          * |    i.k.j |
8816                          * |....j i.k.| or  |.k..j i...|
8817                          */
8818                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8819                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8820                 i = j;
8821         }
8822 }
8823
8824 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8825 {
8826
8827         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8828                                       sizeof(val));
8829 }
8830
8831 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
8832 {
8833
8834         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
8835                                       sizeof(u32));
8836 }
8837
8838 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8839                                      struct kvm_async_pf *work)
8840 {
8841         struct x86_exception fault;
8842
8843         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8844         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8845
8846         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8847             (vcpu->arch.apf.send_user_only &&
8848              kvm_x86_ops->get_cpl(vcpu) == 0))
8849                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8850         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8851                 fault.vector = PF_VECTOR;
8852                 fault.error_code_valid = true;
8853                 fault.error_code = 0;
8854                 fault.nested_page_fault = false;
8855                 fault.address = work->arch.token;
8856                 fault.async_page_fault = true;
8857                 kvm_inject_page_fault(vcpu, &fault);
8858         }
8859 }
8860
8861 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8862                                  struct kvm_async_pf *work)
8863 {
8864         struct x86_exception fault;
8865         u32 val;
8866
8867         if (work->wakeup_all)
8868                 work->arch.token = ~0; /* broadcast wakeup */
8869         else
8870                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8871         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8872
8873         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
8874             !apf_get_user(vcpu, &val)) {
8875                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
8876                     vcpu->arch.exception.pending &&
8877                     vcpu->arch.exception.nr == PF_VECTOR &&
8878                     !apf_put_user(vcpu, 0)) {
8879                         vcpu->arch.exception.injected = false;
8880                         vcpu->arch.exception.pending = false;
8881                         vcpu->arch.exception.nr = 0;
8882                         vcpu->arch.exception.has_error_code = false;
8883                         vcpu->arch.exception.error_code = 0;
8884                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8885                         fault.vector = PF_VECTOR;
8886                         fault.error_code_valid = true;
8887                         fault.error_code = 0;
8888                         fault.nested_page_fault = false;
8889                         fault.address = work->arch.token;
8890                         fault.async_page_fault = true;
8891                         kvm_inject_page_fault(vcpu, &fault);
8892                 }
8893         }
8894         vcpu->arch.apf.halted = false;
8895         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8896 }
8897
8898 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8899 {
8900         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8901                 return true;
8902         else
8903                 return kvm_can_do_async_pf(vcpu);
8904 }
8905
8906 void kvm_arch_start_assignment(struct kvm *kvm)
8907 {
8908         atomic_inc(&kvm->arch.assigned_device_count);
8909 }
8910 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8911
8912 void kvm_arch_end_assignment(struct kvm *kvm)
8913 {
8914         atomic_dec(&kvm->arch.assigned_device_count);
8915 }
8916 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8917
8918 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8919 {
8920         return atomic_read(&kvm->arch.assigned_device_count);
8921 }
8922 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8923
8924 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8925 {
8926         atomic_inc(&kvm->arch.noncoherent_dma_count);
8927 }
8928 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8929
8930 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8931 {
8932         atomic_dec(&kvm->arch.noncoherent_dma_count);
8933 }
8934 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8935
8936 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8937 {
8938         return atomic_read(&kvm->arch.noncoherent_dma_count);
8939 }
8940 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8941
8942 bool kvm_arch_has_irq_bypass(void)
8943 {
8944         return kvm_x86_ops->update_pi_irte != NULL;
8945 }
8946
8947 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8948                                       struct irq_bypass_producer *prod)
8949 {
8950         struct kvm_kernel_irqfd *irqfd =
8951                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8952
8953         irqfd->producer = prod;
8954
8955         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8956                                            prod->irq, irqfd->gsi, 1);
8957 }
8958
8959 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8960                                       struct irq_bypass_producer *prod)
8961 {
8962         int ret;
8963         struct kvm_kernel_irqfd *irqfd =
8964                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8965
8966         WARN_ON(irqfd->producer != prod);
8967         irqfd->producer = NULL;
8968
8969         /*
8970          * When producer of consumer is unregistered, we change back to
8971          * remapped mode, so we can re-use the current implementation
8972          * when the irq is masked/disabled or the consumer side (KVM
8973          * int this case doesn't want to receive the interrupts.
8974         */
8975         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8976         if (ret)
8977                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8978                        " fails: %d\n", irqfd->consumer.token, ret);
8979 }
8980
8981 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8982                                    uint32_t guest_irq, bool set)
8983 {
8984         if (!kvm_x86_ops->update_pi_irte)
8985                 return -EINVAL;
8986
8987         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8988 }
8989
8990 bool kvm_vector_hashing_enabled(void)
8991 {
8992         return vector_hashing;
8993 }
8994 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8995
8996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8997 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8998 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8999 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9000 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9001 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9002 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9003 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9013 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9014 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);