arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 166 {
 167         int i;
 168         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 169                 vcpu->arch.apf.gfns[i] = ~0;
 170 }
 171
 172 static void kvm_on_user_return(struct user_return_notifier *urn)
 173 {
 174         unsigned slot;
 175         struct kvm_shared_msrs *locals
 176                 = container_of(urn, struct kvm_shared_msrs, urn);
 177         struct kvm_shared_msr_values *values;
 178
 179         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 180                 values = &locals->values[slot];
 181                 if (values->host != values->curr) {
 182                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 183                         values->curr = values->host;
 184                 }
 185         }
 186         locals->registered = false;
 187         user_return_notifier_unregister(urn);
 188 }
 189
 190 static void shared_msr_update(unsigned slot, u32 msr)
 191 {
 192         u64 value;
 193         unsigned int cpu = smp_processor_id();
 194         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 195
 196         /* only read, and nobody should modify it at this time,
 197          * so don't need lock */
 198         if (slot >= shared_msrs_global.nr) {
 199                 printk(KERN_ERR "kvm: invalid MSR slot!");
 200                 return;
 201         }
 202         rdmsrl_safe(msr, &value);
 203         smsr->values[slot].host = value;
 204         smsr->values[slot].curr = value;
 205 }
 206
 207 void kvm_define_shared_msr(unsigned slot, u32 msr)
 208 {
 209         if (slot >= shared_msrs_global.nr)
 210                 shared_msrs_global.nr = slot + 1;
 211         shared_msrs_global.msrs[slot] = msr;
 212         /* we need ensured the shared_msr_global have been updated */
 213         smp_wmb();
 214 }
 215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 216
 217 static void kvm_shared_msr_cpu_online(void)
 218 {
 219         unsigned i;
 220
 221         for (i = 0; i < shared_msrs_global.nr; ++i)
 222                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 223 }
 224
 225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 226 {
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 231                 return;
 232         smsr->values[slot].curr = value;
 233         wrmsrl(shared_msrs_global.msrs[slot], value);
 234         if (!smsr->registered) {
 235                 smsr->urn.on_user_return = kvm_on_user_return;
 236                 user_return_notifier_register(&smsr->urn);
 237                 smsr->registered = true;
 238         }
 239 }
 240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 241
 242 static void drop_user_return_notifiers(void *ignore)
 243 {
 244         unsigned int cpu = smp_processor_id();
 245         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 #define EXCPT_BENIGN            0
 265 #define EXCPT_CONTRIBUTORY      1
 266 #define EXCPT_PF                2
 267
 268 static int exception_class(int vector)
 269 {
 270         switch (vector) {
 271         case PF_VECTOR:
 272                 return EXCPT_PF;
 273         case DE_VECTOR:
 274         case TS_VECTOR:
 275         case NP_VECTOR:
 276         case SS_VECTOR:
 277         case GP_VECTOR:
 278                 return EXCPT_CONTRIBUTORY;
 279         default:
 280                 break;
 281         }
 282         return EXCPT_BENIGN;
 283 }
 284
 285 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 286                 unsigned nr, bool has_error, u32 error_code,
 287                 bool reinject)
 288 {
 289         u32 prev_nr;
 290         int class1, class2;
 291
 292         kvm_make_request(KVM_REQ_EVENT, vcpu);
 293
 294         if (!vcpu->arch.exception.pending) {
 295         queue:
 296                 vcpu->arch.exception.pending = true;
 297                 vcpu->arch.exception.has_error_code = has_error;
 298                 vcpu->arch.exception.nr = nr;
 299                 vcpu->arch.exception.error_code = error_code;
 300                 vcpu->arch.exception.reinject = reinject;
 301                 return;
 302         }
 303
 304         /* to check exception */
 305         prev_nr = vcpu->arch.exception.nr;
 306         if (prev_nr == DF_VECTOR) {
 307                 /* triple fault -> shutdown */
 308                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 309                 return;
 310         }
 311         class1 = exception_class(prev_nr);
 312         class2 = exception_class(nr);
 313         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 314                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 315                 /* generate double fault per SDM Table 5-5 */
 316                 vcpu->arch.exception.pending = true;
 317                 vcpu->arch.exception.has_error_code = true;
 318                 vcpu->arch.exception.nr = DF_VECTOR;
 319                 vcpu->arch.exception.error_code = 0;
 320         } else
 321                 /* replace previous exception with a new one in a hope
 322                    that instruction re-execution will regenerate lost
 323                    exception */
 324                 goto queue;
 325 }
 326
 327 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 328 {
 329         kvm_multiple_exception(vcpu, nr, false, 0, false);
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 332
 333 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 334 {
 335         kvm_multiple_exception(vcpu, nr, false, 0, true);
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 338
 339 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 340 {
 341         if (err)
 342                 kvm_inject_gp(vcpu, 0);
 343         else
 344                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 347
 348 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 349 {
 350         ++vcpu->stat.pf_guest;
 351         vcpu->arch.cr2 = fault->address;
 352         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 355
 356 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 357 {
 358         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 359                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 360         else
 361                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 362 }
 363
 364 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 365 {
 366         atomic_inc(&vcpu->arch.nmi_queued);
 367         kvm_make_request(KVM_REQ_NMI, vcpu);
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 370
 371 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 372 {
 373         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 374 }
 375 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 376
 377 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 378 {
 379         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 380 }
 381 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 382
 383 /*
 384  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 385  * a #GP and return false.
 386  */
 387 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 388 {
 389         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 390                 return true;
 391         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 392         return false;
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 395
 396 /*
 397  * This function will be used to read from the physical memory of the currently
 398  * running guest. The difference to kvm_read_guest_page is that this function
 399  * can read from guest physical or from the guest's guest physical memory.
 400  */
 401 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 402                             gfn_t ngfn, void *data, int offset, int len,
 403                             u32 access)
 404 {
 405         gfn_t real_gfn;
 406         gpa_t ngpa;
 407
 408         ngpa     = gfn_to_gpa(ngfn);
 409         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 410         if (real_gfn == UNMAPPED_GVA)
 411                 return -EFAULT;
 412
 413         real_gfn = gpa_to_gfn(real_gfn);
 414
 415         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 418
 419 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 420                                void *data, int offset, int len, u32 access)
 421 {
 422         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 423                                        data, offset, len, access);
 424 }
 425
 426 /*
 427  * Load the pae pdptrs.  Return true is they are all valid.
 428  */
 429 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 430 {
 431         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 432         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 433         int i;
 434         int ret;
 435         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 436
 437         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 438                                       offset * sizeof(u64), sizeof(pdpte),
 439                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 440         if (ret < 0) {
 441                 ret = 0;
 442                 goto out;
 443         }
 444         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 445                 if (is_present_gpte(pdpte[i]) &&
 446                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 447                         ret = 0;
 448                         goto out;
 449                 }
 450         }
 451         ret = 1;
 452
 453         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_avail);
 456         __set_bit(VCPU_EXREG_PDPTR,
 457                   (unsigned long *)&vcpu->arch.regs_dirty);
 458 out:
 459
 460         return ret;
 461 }
 462 EXPORT_SYMBOL_GPL(load_pdptrs);
 463
 464 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 465 {
 466         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 467         bool changed = true;
 468         int offset;
 469         gfn_t gfn;
 470         int r;
 471
 472         if (is_long_mode(vcpu) || !is_pae(vcpu))
 473                 return false;
 474
 475         if (!test_bit(VCPU_EXREG_PDPTR,
 476                       (unsigned long *)&vcpu->arch.regs_avail))
 477                 return true;
 478
 479         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 480         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 481         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 482                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 483         if (r < 0)
 484                 goto out;
 485         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 486 out:
 487
 488         return changed;
 489 }
 490
 491 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 492 {
 493         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 494         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 495                                     X86_CR0_CD | X86_CR0_NW;
 496
 497         cr0 |= X86_CR0_ET;
 498
 499 #ifdef CONFIG_X86_64
 500         if (cr0 & 0xffffffff00000000UL)
 501                 return 1;
 502 #endif
 503
 504         cr0 &= ~CR0_RESERVED_BITS;
 505
 506         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 507                 return 1;
 508
 509         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 510                 return 1;
 511
 512         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 513 #ifdef CONFIG_X86_64
 514                 if ((vcpu->arch.efer & EFER_LME)) {
 515                         int cs_db, cs_l;
 516
 517                         if (!is_pae(vcpu))
 518                                 return 1;
 519                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 520                         if (cs_l)
 521                                 return 1;
 522                 } else
 523 #endif
 524                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 525                                                  kvm_read_cr3(vcpu)))
 526                         return 1;
 527         }
 528
 529         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 530                 return 1;
 531
 532         kvm_x86_ops->set_cr0(vcpu, cr0);
 533
 534         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 535                 kvm_clear_async_pf_completion_queue(vcpu);
 536                 kvm_async_pf_hash_reset(vcpu);
 537         }
 538
 539         if ((cr0 ^ old_cr0) & update_bits)
 540                 kvm_mmu_reset_context(vcpu);
 541         return 0;
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 544
 545 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 546 {
 547         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 548 }
 549 EXPORT_SYMBOL_GPL(kvm_lmsw);
 550
 551 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 552 {
 553         u64 xcr0;
 554
 555         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 556         if (index != XCR_XFEATURE_ENABLED_MASK)
 557                 return 1;
 558         xcr0 = xcr;
 559         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 560                 return 1;
 561         if (!(xcr0 & XSTATE_FP))
 562                 return 1;
 563         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 564                 return 1;
 565         if (xcr0 & ~host_xcr0)
 566                 return 1;
 567         vcpu->arch.xcr0 = xcr0;
 568         vcpu->guest_xcr0_loaded = 0;
 569         return 0;
 570 }
 571
 572 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 573 {
 574         if (__kvm_set_xcr(vcpu, index, xcr)) {
 575                 kvm_inject_gp(vcpu, 0);
 576                 return 1;
 577         }
 578         return 0;
 579 }
 580 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 581
 582 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 583 {
 584         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 585         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 586                                    X86_CR4_PAE | X86_CR4_SMEP;
 587         if (cr4 & CR4_RESERVED_BITS)
 588                 return 1;
 589
 590         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 591                 return 1;
 592
 593         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 594                 return 1;
 595
 596         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 597                 return 1;
 598
 599         if (is_long_mode(vcpu)) {
 600                 if (!(cr4 & X86_CR4_PAE))
 601                         return 1;
 602         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 603                    && ((cr4 ^ old_cr4) & pdptr_bits)
 604                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 605                                    kvm_read_cr3(vcpu)))
 606                 return 1;
 607
 608         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 609                 if (!guest_cpuid_has_pcid(vcpu))
 610                         return 1;
 611
 612                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 613                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 614                         return 1;
 615         }
 616
 617         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 618                 return 1;
 619
 620         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 621             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 622                 kvm_mmu_reset_context(vcpu);
 623
 624         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 625                 kvm_update_cpuid(vcpu);
 626
 627         return 0;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 630
 631 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 632 {
 633         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 634                 kvm_mmu_sync_roots(vcpu);
 635                 kvm_mmu_flush_tlb(vcpu);
 636                 return 0;
 637         }
 638
 639         if (is_long_mode(vcpu)) {
 640                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 641                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 642                                 return 1;
 643                 } else
 644                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 645                                 return 1;
 646         } else {
 647                 if (is_pae(vcpu)) {
 648                         if (cr3 & CR3_PAE_RESERVED_BITS)
 649                                 return 1;
 650                         if (is_paging(vcpu) &&
 651                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 652                                 return 1;
 653                 }
 654                 /*
 655                  * We don't check reserved bits in nonpae mode, because
 656                  * this isn't enforced, and VMware depends on this.
 657                  */
 658         }
 659
 660         /*
 661          * Does the new cr3 value map to physical memory? (Note, we
 662          * catch an invalid cr3 even in real-mode, because it would
 663          * cause trouble later on when we turn on paging anyway.)
 664          *
 665          * A real CPU would silently accept an invalid cr3 and would
 666          * attempt to use it - with largely undefined (and often hard
 667          * to debug) behavior on the guest side.
 668          */
 669         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 670                 return 1;
 671         vcpu->arch.cr3 = cr3;
 672         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 673         vcpu->arch.mmu.new_cr3(vcpu);
 674         return 0;
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 677
 678 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 679 {
 680         if (cr8 & CR8_RESERVED_BITS)
 681                 return 1;
 682         if (irqchip_in_kernel(vcpu->kvm))
 683                 kvm_lapic_set_tpr(vcpu, cr8);
 684         else
 685                 vcpu->arch.cr8 = cr8;
 686         return 0;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 689
 690 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 691 {
 692         if (irqchip_in_kernel(vcpu->kvm))
 693                 return kvm_lapic_get_cr8(vcpu);
 694         else
 695                 return vcpu->arch.cr8;
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 698
 699 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 700 {
 701         unsigned long dr7;
 702
 703         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 704                 dr7 = vcpu->arch.guest_debug_dr7;
 705         else
 706                 dr7 = vcpu->arch.dr7;
 707         kvm_x86_ops->set_dr7(vcpu, dr7);
 708         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 709 }
 710
 711 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 712 {
 713         switch (dr) {
 714         case 0 ... 3:
 715                 vcpu->arch.db[dr] = val;
 716                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 717                         vcpu->arch.eff_db[dr] = val;
 718                 break;
 719         case 4:
 720                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 721                         return 1; /* #UD */
 722                 /* fall through */
 723         case 6:
 724                 if (val & 0xffffffff00000000ULL)
 725                         return -1; /* #GP */
 726                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 727                 break;
 728         case 5:
 729                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 730                         return 1; /* #UD */
 731                 /* fall through */
 732         default: /* 7 */
 733                 if (val & 0xffffffff00000000ULL)
 734                         return -1; /* #GP */
 735                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 736                 kvm_update_dr7(vcpu);
 737                 break;
 738         }
 739
 740         return 0;
 741 }
 742
 743 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 744 {
 745         int res;
 746
 747         res = __kvm_set_dr(vcpu, dr, val);
 748         if (res > 0)
 749                 kvm_queue_exception(vcpu, UD_VECTOR);
 750         else if (res < 0)
 751                 kvm_inject_gp(vcpu, 0);
 752
 753         return res;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_set_dr);
 756
 757 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         switch (dr) {
 760         case 0 ... 3:
 761                 *val = vcpu->arch.db[dr];
 762                 break;
 763         case 4:
 764                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 765                         return 1;
 766                 /* fall through */
 767         case 6:
 768                 *val = vcpu->arch.dr6;
 769                 break;
 770         case 5:
 771                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 772                         return 1;
 773                 /* fall through */
 774         default: /* 7 */
 775                 *val = vcpu->arch.dr7;
 776                 break;
 777         }
 778
 779         return 0;
 780 }
 781
 782 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         if (_kvm_get_dr(vcpu, dr, val)) {
 785                 kvm_queue_exception(vcpu, UD_VECTOR);
 786                 return 1;
 787         }
 788         return 0;
 789 }
 790 EXPORT_SYMBOL_GPL(kvm_get_dr);
 791
 792 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 793 {
 794         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 795         u64 data;
 796         int err;
 797
 798         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 799         if (err)
 800                 return err;
 801         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 802         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 803         return err;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 806
 807 /*
 808  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 809  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 810  *
 811  * This list is modified at module load time to reflect the
 812  * capabilities of the host cpu. This capabilities test skips MSRs that are
 813  * kvm-specific. Those are put in the beginning of the list.
 814  */
 815
 816 #define KVM_SAVE_MSRS_BEGIN     10
 817 static u32 msrs_to_save[] = {
 818         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 819         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 820         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 821         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 822         MSR_KVM_PV_EOI_EN,
 823         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 824         MSR_STAR,
 825 #ifdef CONFIG_X86_64
 826         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 827 #endif
 828         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 829 };
 830
 831 static unsigned num_msrs_to_save;
 832
 833 static const u32 emulated_msrs[] = {
 834         MSR_IA32_TSC_ADJUST,
 835         MSR_IA32_TSCDEADLINE,
 836         MSR_IA32_MISC_ENABLE,
 837         MSR_IA32_MCG_STATUS,
 838         MSR_IA32_MCG_CTL,
 839 };
 840
 841 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 842 {
 843         u64 old_efer = vcpu->arch.efer;
 844
 845         if (efer & efer_reserved_bits)
 846                 return 1;
 847
 848         if (is_paging(vcpu)
 849             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 850                 return 1;
 851
 852         if (efer & EFER_FFXSR) {
 853                 struct kvm_cpuid_entry2 *feat;
 854
 855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 856                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 857                         return 1;
 858         }
 859
 860         if (efer & EFER_SVME) {
 861                 struct kvm_cpuid_entry2 *feat;
 862
 863                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 864                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 865                         return 1;
 866         }
 867
 868         efer &= ~EFER_LMA;
 869         efer |= vcpu->arch.efer & EFER_LMA;
 870
 871         kvm_x86_ops->set_efer(vcpu, efer);
 872
 873         /* Update reserved bits */
 874         if ((efer ^ old_efer) & EFER_NX)
 875                 kvm_mmu_reset_context(vcpu);
 876
 877         return 0;
 878 }
 879
 880 void kvm_enable_efer_bits(u64 mask)
 881 {
 882        efer_reserved_bits &= ~mask;
 883 }
 884 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 885
 886
 887 /*
 888  * Writes msr value into into the appropriate "register".
 889  * Returns 0 on success, non-0 otherwise.
 890  * Assumes vcpu_load() was already called.
 891  */
 892 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 893 {
 894         return kvm_x86_ops->set_msr(vcpu, msr);
 895 }
 896
 897 /*
 898  * Adapt set_msr() to msr_io()'s calling convention
 899  */
 900 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 901 {
 902         struct msr_data msr;
 903
 904         msr.data = *data;
 905         msr.index = index;
 906         msr.host_initiated = true;
 907         return kvm_set_msr(vcpu, &msr);
 908 }
 909
 910 #ifdef CONFIG_X86_64
 911 struct pvclock_gtod_data {
 912         seqcount_t      seq;
 913
 914         struct { /* extract of a clocksource struct */
 915                 int vclock_mode;
 916                 cycle_t cycle_last;
 917                 cycle_t mask;
 918                 u32     mult;
 919                 u32     shift;
 920         } clock;
 921
 922         /* open coded 'struct timespec' */
 923         u64             monotonic_time_snsec;
 924         time_t          monotonic_time_sec;
 925 };
 926
 927 static struct pvclock_gtod_data pvclock_gtod_data;
 928
 929 static void update_pvclock_gtod(struct timekeeper *tk)
 930 {
 931         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 932
 933         write_seqcount_begin(&vdata->seq);
 934
 935         /* copy pvclock gtod data */
 936         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 937         vdata->clock.cycle_last         = tk->clock->cycle_last;
 938         vdata->clock.mask               = tk->clock->mask;
 939         vdata->clock.mult               = tk->mult;
 940         vdata->clock.shift              = tk->shift;
 941
 942         vdata->monotonic_time_sec       = tk->xtime_sec
 943                                         + tk->wall_to_monotonic.tv_sec;
 944         vdata->monotonic_time_snsec     = tk->xtime_nsec
 945                                         + (tk->wall_to_monotonic.tv_nsec
 946                                                 << tk->shift);
 947         while (vdata->monotonic_time_snsec >=
 948                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 949                 vdata->monotonic_time_snsec -=
 950                                         ((u64)NSEC_PER_SEC) << tk->shift;
 951                 vdata->monotonic_time_sec++;
 952         }
 953
 954         write_seqcount_end(&vdata->seq);
 955 }
 956 #endif
 957
 958
 959 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 960 {
 961         int version;
 962         int r;
 963         struct pvclock_wall_clock wc;
 964         struct timespec boot;
 965
 966         if (!wall_clock)
 967                 return;
 968
 969         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 970         if (r)
 971                 return;
 972
 973         if (version & 1)
 974                 ++version;  /* first time write, random junk */
 975
 976         ++version;
 977
 978         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 979
 980         /*
 981          * The guest calculates current wall clock time by adding
 982          * system time (updated by kvm_guest_time_update below) to the
 983          * wall clock specified here.  guest system time equals host
 984          * system time for us, thus we must fill in host boot time here.
 985          */
 986         getboottime(&boot);
 987
 988         if (kvm->arch.kvmclock_offset) {
 989                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
 990                 boot = timespec_sub(boot, ts);
 991         }
 992         wc.sec = boot.tv_sec;
 993         wc.nsec = boot.tv_nsec;
 994         wc.version = version;
 995
 996         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 997
 998         version++;
 999         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1000 }
1001
1002 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1003 {
1004         uint32_t quotient, remainder;
1005
1006         /* Don't try to replace with do_div(), this one calculates
1007          * "(dividend << 32) / divisor" */
1008         __asm__ ( "divl %4"
1009                   : "=a" (quotient), "=d" (remainder)
1010                   : "0" (0), "1" (dividend), "r" (divisor) );
1011         return quotient;
1012 }
1013
1014 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1015                                s8 *pshift, u32 *pmultiplier)
1016 {
1017         uint64_t scaled64;
1018         int32_t  shift = 0;
1019         uint64_t tps64;
1020         uint32_t tps32;
1021
1022         tps64 = base_khz * 1000LL;
1023         scaled64 = scaled_khz * 1000LL;
1024         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1025                 tps64 >>= 1;
1026                 shift--;
1027         }
1028
1029         tps32 = (uint32_t)tps64;
1030         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1031                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1032                         scaled64 >>= 1;
1033                 else
1034                         tps32 <<= 1;
1035                 shift++;
1036         }
1037
1038         *pshift = shift;
1039         *pmultiplier = div_frac(scaled64, tps32);
1040
1041         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1042                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1043 }
1044
1045 static inline u64 get_kernel_ns(void)
1046 {
1047         struct timespec ts;
1048
1049         WARN_ON(preemptible());
1050         ktime_get_ts(&ts);
1051         monotonic_to_bootbased(&ts);
1052         return timespec_to_ns(&ts);
1053 }
1054
1055 #ifdef CONFIG_X86_64
1056 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1057 #endif
1058
1059 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1060 unsigned long max_tsc_khz;
1061
1062 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1063 {
1064         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1065                                    vcpu->arch.virtual_tsc_shift);
1066 }
1067
1068 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1069 {
1070         u64 v = (u64)khz * (1000000 + ppm);
1071         do_div(v, 1000000);
1072         return v;
1073 }
1074
1075 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1076 {
1077         u32 thresh_lo, thresh_hi;
1078         int use_scaling = 0;
1079
1080         /* tsc_khz can be zero if TSC calibration fails */
1081         if (this_tsc_khz == 0)
1082                 return;
1083
1084         /* Compute a scale to convert nanoseconds in TSC cycles */
1085         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1086                            &vcpu->arch.virtual_tsc_shift,
1087                            &vcpu->arch.virtual_tsc_mult);
1088         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1089
1090         /*
1091          * Compute the variation in TSC rate which is acceptable
1092          * within the range of tolerance and decide if the
1093          * rate being applied is within that bounds of the hardware
1094          * rate.  If so, no scaling or compensation need be done.
1095          */
1096         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1097         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1098         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1099                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1100                 use_scaling = 1;
1101         }
1102         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1103 }
1104
1105 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1106 {
1107         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1108                                       vcpu->arch.virtual_tsc_mult,
1109                                       vcpu->arch.virtual_tsc_shift);
1110         tsc += vcpu->arch.this_tsc_write;
1111         return tsc;
1112 }
1113
1114 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1115 {
1116 #ifdef CONFIG_X86_64
1117         bool vcpus_matched;
1118         bool do_request = false;
1119         struct kvm_arch *ka = &vcpu->kvm->arch;
1120         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1121
1122         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1123                          atomic_read(&vcpu->kvm->online_vcpus));
1124
1125         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1126                 if (!ka->use_master_clock)
1127                         do_request = 1;
1128
1129         if (!vcpus_matched && ka->use_master_clock)
1130                         do_request = 1;
1131
1132         if (do_request)
1133                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1134
1135         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1136                             atomic_read(&vcpu->kvm->online_vcpus),
1137                             ka->use_master_clock, gtod->clock.vclock_mode);
1138 #endif
1139 }
1140
1141 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1142 {
1143         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1144         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1145 }
1146
1147 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1148 {
1149         struct kvm *kvm = vcpu->kvm;
1150         u64 offset, ns, elapsed;
1151         unsigned long flags;
1152         s64 usdiff;
1153         bool matched;
1154         u64 data = msr->data;
1155
1156         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1157         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1158         ns = get_kernel_ns();
1159         elapsed = ns - kvm->arch.last_tsc_nsec;
1160
1161         if (vcpu->arch.virtual_tsc_khz) {
1162                 /* n.b - signed multiplication and division required */
1163                 usdiff = data - kvm->arch.last_tsc_write;
1164 #ifdef CONFIG_X86_64
1165                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1166 #else
1167                 /* do_div() only does unsigned */
1168                 asm("idivl %2; xor %%edx, %%edx"
1169                 : "=A"(usdiff)
1170                 : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1171 #endif
1172                 do_div(elapsed, 1000);
1173                 usdiff -= elapsed;
1174                 if (usdiff < 0)
1175                         usdiff = -usdiff;
1176         } else
1177                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1178
1179         /*
1180          * Special case: TSC write with a small delta (1 second) of virtual
1181          * cycle time against real time is interpreted as an attempt to
1182          * synchronize the CPU.
1183          *
1184          * For a reliable TSC, we can match TSC offsets, and for an unstable
1185          * TSC, we add elapsed time in this computation.  We could let the
1186          * compensation code attempt to catch up if we fall behind, but
1187          * it's better to try to match offsets from the beginning.
1188          */
1189         if (usdiff < USEC_PER_SEC &&
1190             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1191                 if (!check_tsc_unstable()) {
1192                         offset = kvm->arch.cur_tsc_offset;
1193                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1194                 } else {
1195                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1196                         data += delta;
1197                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1198                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1199                 }
1200                 matched = true;
1201         } else {
1202                 /*
1203                  * We split periods of matched TSC writes into generations.
1204                  * For each generation, we track the original measured
1205                  * nanosecond time, offset, and write, so if TSCs are in
1206                  * sync, we can match exact offset, and if not, we can match
1207                  * exact software computation in compute_guest_tsc()
1208                  *
1209                  * These values are tracked in kvm->arch.cur_xxx variables.
1210                  */
1211                 kvm->arch.cur_tsc_generation++;
1212                 kvm->arch.cur_tsc_nsec = ns;
1213                 kvm->arch.cur_tsc_write = data;
1214                 kvm->arch.cur_tsc_offset = offset;
1215                 matched = false;
1216                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1217                          kvm->arch.cur_tsc_generation, data);
1218         }
1219
1220         /*
1221          * We also track th most recent recorded KHZ, write and time to
1222          * allow the matching interval to be extended at each write.
1223          */
1224         kvm->arch.last_tsc_nsec = ns;
1225         kvm->arch.last_tsc_write = data;
1226         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1227
1228         /* Reset of TSC must disable overshoot protection below */
1229         vcpu->arch.hv_clock.tsc_timestamp = 0;
1230         vcpu->arch.last_guest_tsc = data;
1231
1232         /* Keep track of which generation this VCPU has synchronized to */
1233         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1234         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1235         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1236
1237         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1238                 update_ia32_tsc_adjust_msr(vcpu, offset);
1239         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1240         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1241
1242         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1243         if (matched)
1244                 kvm->arch.nr_vcpus_matched_tsc++;
1245         else
1246                 kvm->arch.nr_vcpus_matched_tsc = 0;
1247
1248         kvm_track_tsc_matching(vcpu);
1249         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1250 }
1251
1252 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1253
1254 #ifdef CONFIG_X86_64
1255
1256 static cycle_t read_tsc(void)
1257 {
1258         cycle_t ret;
1259         u64 last;
1260
1261         /*
1262          * Empirically, a fence (of type that depends on the CPU)
1263          * before rdtsc is enough to ensure that rdtsc is ordered
1264          * with respect to loads.  The various CPU manuals are unclear
1265          * as to whether rdtsc can be reordered with later loads,
1266          * but no one has ever seen it happen.
1267          */
1268         rdtsc_barrier();
1269         ret = (cycle_t)vget_cycles();
1270
1271         last = pvclock_gtod_data.clock.cycle_last;
1272
1273         if (likely(ret >= last))
1274                 return ret;
1275
1276         /*
1277          * GCC likes to generate cmov here, but this branch is extremely
1278          * predictable (it's just a funciton of time and the likely is
1279          * very likely) and there's a data dependence, so force GCC
1280          * to generate a branch instead.  I don't barrier() because
1281          * we don't actually need a barrier, and if this function
1282          * ever gets inlined it will generate worse code.
1283          */
1284         asm volatile ("");
1285         return last;
1286 }
1287
1288 static inline u64 vgettsc(cycle_t *cycle_now)
1289 {
1290         long v;
1291         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1292
1293         *cycle_now = read_tsc();
1294
1295         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1296         return v * gtod->clock.mult;
1297 }
1298
1299 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1300 {
1301         unsigned long seq;
1302         u64 ns;
1303         int mode;
1304         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1305
1306         ts->tv_nsec = 0;
1307         do {
1308                 seq = read_seqcount_begin(&gtod->seq);
1309                 mode = gtod->clock.vclock_mode;
1310                 ts->tv_sec = gtod->monotonic_time_sec;
1311                 ns = gtod->monotonic_time_snsec;
1312                 ns += vgettsc(cycle_now);
1313                 ns >>= gtod->clock.shift;
1314         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1315         timespec_add_ns(ts, ns);
1316
1317         return mode;
1318 }
1319
1320 /* returns true if host is using tsc clocksource */
1321 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1322 {
1323         struct timespec ts;
1324
1325         /* checked again under seqlock below */
1326         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1327                 return false;
1328
1329         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1330                 return false;
1331
1332         monotonic_to_bootbased(&ts);
1333         *kernel_ns = timespec_to_ns(&ts);
1334
1335         return true;
1336 }
1337 #endif
1338
1339 /*
1340  *
1341  * Assuming a stable TSC across physical CPUS, and a stable TSC
1342  * across virtual CPUs, the following condition is possible.
1343  * Each numbered line represents an event visible to both
1344  * CPUs at the next numbered event.
1345  *
1346  * "timespecX" represents host monotonic time. "tscX" represents
1347  * RDTSC value.
1348  *
1349  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1350  *
1351  * 1.  read timespec0,tsc0
1352  * 2.                                   | timespec1 = timespec0 + N
1353  *                                      | tsc1 = tsc0 + M
1354  * 3. transition to guest               | transition to guest
1355  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1356  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1357  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1358  *
1359  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1360  *
1361  *      - ret0 < ret1
1362  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1363  *              ...
1364  *      - 0 < N - M => M < N
1365  *
1366  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1367  * always the case (the difference between two distinct xtime instances
1368  * might be smaller then the difference between corresponding TSC reads,
1369  * when updating guest vcpus pvclock areas).
1370  *
1371  * To avoid that problem, do not allow visibility of distinct
1372  * system_timestamp/tsc_timestamp values simultaneously: use a master
1373  * copy of host monotonic time values. Update that master copy
1374  * in lockstep.
1375  *
1376  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1377  *
1378  */
1379
1380 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1381 {
1382 #ifdef CONFIG_X86_64
1383         struct kvm_arch *ka = &kvm->arch;
1384         int vclock_mode;
1385         bool host_tsc_clocksource, vcpus_matched;
1386
1387         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1388                         atomic_read(&kvm->online_vcpus));
1389
1390         /*
1391          * If the host uses TSC clock, then passthrough TSC as stable
1392          * to the guest.
1393          */
1394         host_tsc_clocksource = kvm_get_time_and_clockread(
1395                                         &ka->master_kernel_ns,
1396                                         &ka->master_cycle_now);
1397
1398         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1399
1400         if (ka->use_master_clock)
1401                 atomic_set(&kvm_guest_has_master_clock, 1);
1402
1403         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1404         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1405                                         vcpus_matched);
1406 #endif
1407 }
1408
1409 static int kvm_guest_time_update(struct kvm_vcpu *v)
1410 {
1411         unsigned long flags, this_tsc_khz;
1412         struct kvm_vcpu_arch *vcpu = &v->arch;
1413         struct kvm_arch *ka = &v->kvm->arch;
1414         s64 kernel_ns, max_kernel_ns;
1415         u64 tsc_timestamp, host_tsc;
1416         struct pvclock_vcpu_time_info guest_hv_clock;
1417         u8 pvclock_flags;
1418         bool use_master_clock;
1419
1420         kernel_ns = 0;
1421         host_tsc = 0;
1422
1423         /*
1424          * If the host uses TSC clock, then passthrough TSC as stable
1425          * to the guest.
1426          */
1427         spin_lock(&ka->pvclock_gtod_sync_lock);
1428         use_master_clock = ka->use_master_clock;
1429         if (use_master_clock) {
1430                 host_tsc = ka->master_cycle_now;
1431                 kernel_ns = ka->master_kernel_ns;
1432         }
1433         spin_unlock(&ka->pvclock_gtod_sync_lock);
1434
1435         /* Keep irq disabled to prevent changes to the clock */
1436         local_irq_save(flags);
1437         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1438         if (unlikely(this_tsc_khz == 0)) {
1439                 local_irq_restore(flags);
1440                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1441                 return 1;
1442         }
1443         if (!use_master_clock) {
1444                 host_tsc = native_read_tsc();
1445                 kernel_ns = get_kernel_ns();
1446         }
1447
1448         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1449
1450         /*
1451          * We may have to catch up the TSC to match elapsed wall clock
1452          * time for two reasons, even if kvmclock is used.
1453          *   1) CPU could have been running below the maximum TSC rate
1454          *   2) Broken TSC compensation resets the base at each VCPU
1455          *      entry to avoid unknown leaps of TSC even when running
1456          *      again on the same CPU.  This may cause apparent elapsed
1457          *      time to disappear, and the guest to stand still or run
1458          *      very slowly.
1459          */
1460         if (vcpu->tsc_catchup) {
1461                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1462                 if (tsc > tsc_timestamp) {
1463                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1464                         tsc_timestamp = tsc;
1465                 }
1466         }
1467
1468         local_irq_restore(flags);
1469
1470         if (!vcpu->pv_time_enabled)
1471                 return 0;
1472
1473         /*
1474          * Time as measured by the TSC may go backwards when resetting the base
1475          * tsc_timestamp.  The reason for this is that the TSC resolution is
1476          * higher than the resolution of the other clock scales.  Thus, many
1477          * possible measurments of the TSC correspond to one measurement of any
1478          * other clock, and so a spread of values is possible.  This is not a
1479          * problem for the computation of the nanosecond clock; with TSC rates
1480          * around 1GHZ, there can only be a few cycles which correspond to one
1481          * nanosecond value, and any path through this code will inevitably
1482          * take longer than that.  However, with the kernel_ns value itself,
1483          * the precision may be much lower, down to HZ granularity.  If the
1484          * first sampling of TSC against kernel_ns ends in the low part of the
1485          * range, and the second in the high end of the range, we can get:
1486          *
1487          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1488          *
1489          * As the sampling errors potentially range in the thousands of cycles,
1490          * it is possible such a time value has already been observed by the
1491          * guest.  To protect against this, we must compute the system time as
1492          * observed by the guest and ensure the new system time is greater.
1493          */
1494         max_kernel_ns = 0;
1495         if (vcpu->hv_clock.tsc_timestamp) {
1496                 max_kernel_ns = vcpu->last_guest_tsc -
1497                                 vcpu->hv_clock.tsc_timestamp;
1498                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1499                                     vcpu->hv_clock.tsc_to_system_mul,
1500                                     vcpu->hv_clock.tsc_shift);
1501                 max_kernel_ns += vcpu->last_kernel_ns;
1502         }
1503
1504         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1505                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1506                                    &vcpu->hv_clock.tsc_shift,
1507                                    &vcpu->hv_clock.tsc_to_system_mul);
1508                 vcpu->hw_tsc_khz = this_tsc_khz;
1509         }
1510
1511         /* with a master <monotonic time, tsc value> tuple,
1512          * pvclock clock reads always increase at the (scaled) rate
1513          * of guest TSC - no need to deal with sampling errors.
1514          */
1515         if (!use_master_clock) {
1516                 if (max_kernel_ns > kernel_ns)
1517                         kernel_ns = max_kernel_ns;
1518         }
1519         /* With all the info we got, fill in the values */
1520         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1521         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1522         vcpu->last_kernel_ns = kernel_ns;
1523         vcpu->last_guest_tsc = tsc_timestamp;
1524
1525         /*
1526          * The interface expects us to write an even number signaling that the
1527          * update is finished. Since the guest won't see the intermediate
1528          * state, we just increase by 2 at the end.
1529          */
1530         vcpu->hv_clock.version += 2;
1531
1532         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1533                 &guest_hv_clock, sizeof(guest_hv_clock))))
1534                 return 0;
1535
1536         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1537         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1538
1539         if (vcpu->pvclock_set_guest_stopped_request) {
1540                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1541                 vcpu->pvclock_set_guest_stopped_request = false;
1542         }
1543
1544         /* If the host uses TSC clocksource, then it is stable */
1545         if (use_master_clock)
1546                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1547
1548         vcpu->hv_clock.flags = pvclock_flags;
1549
1550         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1551                                 &vcpu->hv_clock,
1552                                 sizeof(vcpu->hv_clock));
1553         return 0;
1554 }
1555
1556 static bool msr_mtrr_valid(unsigned msr)
1557 {
1558         switch (msr) {
1559         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1560         case MSR_MTRRfix64K_00000:
1561         case MSR_MTRRfix16K_80000:
1562         case MSR_MTRRfix16K_A0000:
1563         case MSR_MTRRfix4K_C0000:
1564         case MSR_MTRRfix4K_C8000:
1565         case MSR_MTRRfix4K_D0000:
1566         case MSR_MTRRfix4K_D8000:
1567         case MSR_MTRRfix4K_E0000:
1568         case MSR_MTRRfix4K_E8000:
1569         case MSR_MTRRfix4K_F0000:
1570         case MSR_MTRRfix4K_F8000:
1571         case MSR_MTRRdefType:
1572         case MSR_IA32_CR_PAT:
1573                 return true;
1574         case 0x2f8:
1575                 return true;
1576         }
1577         return false;
1578 }
1579
1580 static bool valid_pat_type(unsigned t)
1581 {
1582         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1583 }
1584
1585 static bool valid_mtrr_type(unsigned t)
1586 {
1587         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1588 }
1589
1590 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1591 {
1592         int i;
1593
1594         if (!msr_mtrr_valid(msr))
1595                 return false;
1596
1597         if (msr == MSR_IA32_CR_PAT) {
1598                 for (i = 0; i < 8; i++)
1599                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1600                                 return false;
1601                 return true;
1602         } else if (msr == MSR_MTRRdefType) {
1603                 if (data & ~0xcff)
1604                         return false;
1605                 return valid_mtrr_type(data & 0xff);
1606         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1607                 for (i = 0; i < 8 ; i++)
1608                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1609                                 return false;
1610                 return true;
1611         }
1612
1613         /* variable MTRRs */
1614         return valid_mtrr_type(data & 0xff);
1615 }
1616
1617 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1618 {
1619         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1620
1621         if (!mtrr_valid(vcpu, msr, data))
1622                 return 1;
1623
1624         if (msr == MSR_MTRRdefType) {
1625                 vcpu->arch.mtrr_state.def_type = data;
1626                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1627         } else if (msr == MSR_MTRRfix64K_00000)
1628                 p[0] = data;
1629         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1630                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1631         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1632                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1633         else if (msr == MSR_IA32_CR_PAT)
1634                 vcpu->arch.pat = data;
1635         else {  /* Variable MTRRs */
1636                 int idx, is_mtrr_mask;
1637                 u64 *pt;
1638
1639                 idx = (msr - 0x200) / 2;
1640                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1641                 if (!is_mtrr_mask)
1642                         pt =
1643                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1644                 else
1645                         pt =
1646                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1647                 *pt = data;
1648         }
1649
1650         kvm_mmu_reset_context(vcpu);
1651         return 0;
1652 }
1653
1654 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1655 {
1656         u64 mcg_cap = vcpu->arch.mcg_cap;
1657         unsigned bank_num = mcg_cap & 0xff;
1658
1659         switch (msr) {
1660         case MSR_IA32_MCG_STATUS:
1661                 vcpu->arch.mcg_status = data;
1662                 break;
1663         case MSR_IA32_MCG_CTL:
1664                 if (!(mcg_cap & MCG_CTL_P))
1665                         return 1;
1666                 if (data != 0 && data != ~(u64)0)
1667                         return -1;
1668                 vcpu->arch.mcg_ctl = data;
1669                 break;
1670         default:
1671                 if (msr >= MSR_IA32_MC0_CTL &&
1672                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1673                         u32 offset = msr - MSR_IA32_MC0_CTL;
1674                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1675                          * some Linux kernels though clear bit 10 in bank 4 to
1676                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1677                          * this to avoid an uncatched #GP in the guest
1678                          */
1679                         if ((offset & 0x3) == 0 &&
1680                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1681                                 return -1;
1682                         vcpu->arch.mce_banks[offset] = data;
1683                         break;
1684                 }
1685                 return 1;
1686         }
1687         return 0;
1688 }
1689
1690 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1691 {
1692         struct kvm *kvm = vcpu->kvm;
1693         int lm = is_long_mode(vcpu);
1694         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1695                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1696         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1697                 : kvm->arch.xen_hvm_config.blob_size_32;
1698         u32 page_num = data & ~PAGE_MASK;
1699         u64 page_addr = data & PAGE_MASK;
1700         u8 *page;
1701         int r;
1702
1703         r = -E2BIG;
1704         if (page_num >= blob_size)
1705                 goto out;
1706         r = -ENOMEM;
1707         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1708         if (IS_ERR(page)) {
1709                 r = PTR_ERR(page);
1710                 goto out;
1711         }
1712         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1713                 goto out_free;
1714         r = 0;
1715 out_free:
1716         kfree(page);
1717 out:
1718         return r;
1719 }
1720
1721 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1722 {
1723         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1724 }
1725
1726 static bool kvm_hv_msr_partition_wide(u32 msr)
1727 {
1728         bool r = false;
1729         switch (msr) {
1730         case HV_X64_MSR_GUEST_OS_ID:
1731         case HV_X64_MSR_HYPERCALL:
1732                 r = true;
1733                 break;
1734         }
1735
1736         return r;
1737 }
1738
1739 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1740 {
1741         struct kvm *kvm = vcpu->kvm;
1742
1743         switch (msr) {
1744         case HV_X64_MSR_GUEST_OS_ID:
1745                 kvm->arch.hv_guest_os_id = data;
1746                 /* setting guest os id to zero disables hypercall page */
1747                 if (!kvm->arch.hv_guest_os_id)
1748                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1749                 break;
1750         case HV_X64_MSR_HYPERCALL: {
1751                 u64 gfn;
1752                 unsigned long addr;
1753                 u8 instructions[4];
1754
1755                 /* if guest os id is not set hypercall should remain disabled */
1756                 if (!kvm->arch.hv_guest_os_id)
1757                         break;
1758                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1759                         kvm->arch.hv_hypercall = data;
1760                         break;
1761                 }
1762                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1763                 addr = gfn_to_hva(kvm, gfn);
1764                 if (kvm_is_error_hva(addr))
1765                         return 1;
1766                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1767                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1768                 if (__copy_to_user((void __user *)addr, instructions, 4))
1769                         return 1;
1770                 kvm->arch.hv_hypercall = data;
1771                 break;
1772         }
1773         default:
1774                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1775                             "data 0x%llx\n", msr, data);
1776                 return 1;
1777         }
1778         return 0;
1779 }
1780
1781 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1782 {
1783         switch (msr) {
1784         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1785                 unsigned long addr;
1786
1787                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1788                         vcpu->arch.hv_vapic = data;
1789                         break;
1790                 }
1791                 addr = gfn_to_hva(vcpu->kvm, data >>
1792                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1793                 if (kvm_is_error_hva(addr))
1794                         return 1;
1795                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1796                         return 1;
1797                 vcpu->arch.hv_vapic = data;
1798                 break;
1799         }
1800         case HV_X64_MSR_EOI:
1801                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1802         case HV_X64_MSR_ICR:
1803                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1804         case HV_X64_MSR_TPR:
1805                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1806         default:
1807                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1808                             "data 0x%llx\n", msr, data);
1809                 return 1;
1810         }
1811
1812         return 0;
1813 }
1814
1815 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1816 {
1817         gpa_t gpa = data & ~0x3f;
1818
1819         /* Bits 2:5 are reserved, Should be zero */
1820         if (data & 0x3c)
1821                 return 1;
1822
1823         vcpu->arch.apf.msr_val = data;
1824
1825         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1826                 kvm_clear_async_pf_completion_queue(vcpu);
1827                 kvm_async_pf_hash_reset(vcpu);
1828                 return 0;
1829         }
1830
1831         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1832                 return 1;
1833
1834         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1835         kvm_async_pf_wakeup_all(vcpu);
1836         return 0;
1837 }
1838
1839 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1840 {
1841         vcpu->arch.pv_time_enabled = false;
1842 }
1843
1844 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1845 {
1846         u64 delta;
1847
1848         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1849                 return;
1850
1851         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1852         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1853         vcpu->arch.st.accum_steal = delta;
1854 }
1855
1856 static void record_steal_time(struct kvm_vcpu *vcpu)
1857 {
1858         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1859                 return;
1860
1861         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1862                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1863                 return;
1864
1865         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1866         vcpu->arch.st.steal.version += 2;
1867         vcpu->arch.st.accum_steal = 0;
1868
1869         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1870                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1871 }
1872
1873 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1874 {
1875         bool pr = false;
1876         u32 msr = msr_info->index;
1877         u64 data = msr_info->data;
1878
1879         switch (msr) {
1880         case MSR_AMD64_NB_CFG:
1881         case MSR_IA32_UCODE_REV:
1882         case MSR_IA32_UCODE_WRITE:
1883         case MSR_VM_HSAVE_PA:
1884         case MSR_AMD64_PATCH_LOADER:
1885         case MSR_AMD64_BU_CFG2:
1886                 break;
1887
1888         case MSR_EFER:
1889                 return set_efer(vcpu, data);
1890         case MSR_K7_HWCR:
1891                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1892                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1893                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1894                 if (data != 0) {
1895                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1896                                     data);
1897                         return 1;
1898                 }
1899                 break;
1900         case MSR_FAM10H_MMIO_CONF_BASE:
1901                 if (data != 0) {
1902                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1903                                     "0x%llx\n", data);
1904                         return 1;
1905                 }
1906                 break;
1907         case MSR_IA32_DEBUGCTLMSR:
1908                 if (!data) {
1909                         /* We support the non-activated case already */
1910                         break;
1911                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1912                         /* Values other than LBR and BTF are vendor-specific,
1913                            thus reserved and should throw a #GP */
1914                         return 1;
1915                 }
1916                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1917                             __func__, data);
1918                 break;
1919         case 0x200 ... 0x2ff:
1920                 return set_msr_mtrr(vcpu, msr, data);
1921         case MSR_IA32_APICBASE:
1922                 kvm_set_apic_base(vcpu, data);
1923                 break;
1924         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1925                 return kvm_x2apic_msr_write(vcpu, msr, data);
1926         case MSR_IA32_TSCDEADLINE:
1927                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1928                 break;
1929         case MSR_IA32_TSC_ADJUST:
1930                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1931                         if (!msr_info->host_initiated) {
1932                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1933                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1934                         }
1935                         vcpu->arch.ia32_tsc_adjust_msr = data;
1936                 }
1937                 break;
1938         case MSR_IA32_MISC_ENABLE:
1939                 vcpu->arch.ia32_misc_enable_msr = data;
1940                 break;
1941         case MSR_KVM_WALL_CLOCK_NEW:
1942         case MSR_KVM_WALL_CLOCK:
1943                 vcpu->kvm->arch.wall_clock = data;
1944                 kvm_write_wall_clock(vcpu->kvm, data);
1945                 break;
1946         case MSR_KVM_SYSTEM_TIME_NEW:
1947         case MSR_KVM_SYSTEM_TIME: {
1948                 u64 gpa_offset;
1949                 kvmclock_reset(vcpu);
1950
1951                 vcpu->arch.time = data;
1952                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1953
1954                 /* we verify if the enable bit is set... */
1955                 if (!(data & 1))
1956                         break;
1957
1958                 gpa_offset = data & ~(PAGE_MASK | 1);
1959
1960                 /* Check that the address is 32-byte aligned. */
1961                 if (gpa_offset & (sizeof(struct pvclock_vcpu_time_info) - 1))
1962                         break;
1963
1964                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1965                      &vcpu->arch.pv_time, data & ~1ULL))
1966                         vcpu->arch.pv_time_enabled = false;
1967                 else
1968                         vcpu->arch.pv_time_enabled = true;
1969
1970                 break;
1971         }
1972         case MSR_KVM_ASYNC_PF_EN:
1973                 if (kvm_pv_enable_async_pf(vcpu, data))
1974                         return 1;
1975                 break;
1976         case MSR_KVM_STEAL_TIME:
1977
1978                 if (unlikely(!sched_info_on()))
1979                         return 1;
1980
1981                 if (data & KVM_STEAL_RESERVED_MASK)
1982                         return 1;
1983
1984                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1985                                                         data & KVM_STEAL_VALID_BITS))
1986                         return 1;
1987
1988                 vcpu->arch.st.msr_val = data;
1989
1990                 if (!(data & KVM_MSR_ENABLED))
1991                         break;
1992
1993                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1994
1995                 preempt_disable();
1996                 accumulate_steal_time(vcpu);
1997                 preempt_enable();
1998
1999                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2000
2001                 break;
2002         case MSR_KVM_PV_EOI_EN:
2003                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2004                         return 1;
2005                 break;
2006
2007         case MSR_IA32_MCG_CTL:
2008         case MSR_IA32_MCG_STATUS:
2009         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2010                 return set_msr_mce(vcpu, msr, data);
2011
2012         /* Performance counters are not protected by a CPUID bit,
2013          * so we should check all of them in the generic path for the sake of
2014          * cross vendor migration.
2015          * Writing a zero into the event select MSRs disables them,
2016          * which we perfectly emulate ;-). Any other value should be at least
2017          * reported, some guests depend on them.
2018          */
2019         case MSR_K7_EVNTSEL0:
2020         case MSR_K7_EVNTSEL1:
2021         case MSR_K7_EVNTSEL2:
2022         case MSR_K7_EVNTSEL3:
2023                 if (data != 0)
2024                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2025                                     "0x%x data 0x%llx\n", msr, data);
2026                 break;
2027         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2028          * so we ignore writes to make it happy.
2029          */
2030         case MSR_K7_PERFCTR0:
2031         case MSR_K7_PERFCTR1:
2032         case MSR_K7_PERFCTR2:
2033         case MSR_K7_PERFCTR3:
2034                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2035                             "0x%x data 0x%llx\n", msr, data);
2036                 break;
2037         case MSR_P6_PERFCTR0:
2038         case MSR_P6_PERFCTR1:
2039                 pr = true;
2040         case MSR_P6_EVNTSEL0:
2041         case MSR_P6_EVNTSEL1:
2042                 if (kvm_pmu_msr(vcpu, msr))
2043                         return kvm_pmu_set_msr(vcpu, msr_info);
2044
2045                 if (pr || data != 0)
2046                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2047                                     "0x%x data 0x%llx\n", msr, data);
2048                 break;
2049         case MSR_K7_CLK_CTL:
2050                 /*
2051                  * Ignore all writes to this no longer documented MSR.
2052                  * Writes are only relevant for old K7 processors,
2053                  * all pre-dating SVM, but a recommended workaround from
2054                  * AMD for these chips. It is possible to specify the
2055                  * affected processor models on the command line, hence
2056                  * the need to ignore the workaround.
2057                  */
2058                 break;
2059         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2060                 if (kvm_hv_msr_partition_wide(msr)) {
2061                         int r;
2062                         mutex_lock(&vcpu->kvm->lock);
2063                         r = set_msr_hyperv_pw(vcpu, msr, data);
2064                         mutex_unlock(&vcpu->kvm->lock);
2065                         return r;
2066                 } else
2067                         return set_msr_hyperv(vcpu, msr, data);
2068                 break;
2069         case MSR_IA32_BBL_CR_CTL3:
2070                 /* Drop writes to this legacy MSR -- see rdmsr
2071                  * counterpart for further detail.
2072                  */
2073                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2074                 break;
2075         case MSR_AMD64_OSVW_ID_LENGTH:
2076                 if (!guest_cpuid_has_osvw(vcpu))
2077                         return 1;
2078                 vcpu->arch.osvw.length = data;
2079                 break;
2080         case MSR_AMD64_OSVW_STATUS:
2081                 if (!guest_cpuid_has_osvw(vcpu))
2082                         return 1;
2083                 vcpu->arch.osvw.status = data;
2084                 break;
2085         default:
2086                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2087                         return xen_hvm_config(vcpu, data);
2088                 if (kvm_pmu_msr(vcpu, msr))
2089                         return kvm_pmu_set_msr(vcpu, msr_info);
2090                 if (!ignore_msrs) {
2091                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2092                                     msr, data);
2093                         return 1;
2094                 } else {
2095                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2096                                     msr, data);
2097                         break;
2098                 }
2099         }
2100         return 0;
2101 }
2102 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2103
2104
2105 /*
2106  * Reads an msr value (of 'msr_index') into 'pdata'.
2107  * Returns 0 on success, non-0 otherwise.
2108  * Assumes vcpu_load() was already called.
2109  */
2110 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2111 {
2112         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2113 }
2114
2115 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2116 {
2117         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2118
2119         if (!msr_mtrr_valid(msr))
2120                 return 1;
2121
2122         if (msr == MSR_MTRRdefType)
2123                 *pdata = vcpu->arch.mtrr_state.def_type +
2124                          (vcpu->arch.mtrr_state.enabled << 10);
2125         else if (msr == MSR_MTRRfix64K_00000)
2126                 *pdata = p[0];
2127         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2128                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2129         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2130                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2131         else if (msr == MSR_IA32_CR_PAT)
2132                 *pdata = vcpu->arch.pat;
2133         else {  /* Variable MTRRs */
2134                 int idx, is_mtrr_mask;
2135                 u64 *pt;
2136
2137                 idx = (msr - 0x200) / 2;
2138                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2139                 if (!is_mtrr_mask)
2140                         pt =
2141                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2142                 else
2143                         pt =
2144                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2145                 *pdata = *pt;
2146         }
2147
2148         return 0;
2149 }
2150
2151 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2152 {
2153         u64 data;
2154         u64 mcg_cap = vcpu->arch.mcg_cap;
2155         unsigned bank_num = mcg_cap & 0xff;
2156
2157         switch (msr) {
2158         case MSR_IA32_P5_MC_ADDR:
2159         case MSR_IA32_P5_MC_TYPE:
2160                 data = 0;
2161                 break;
2162         case MSR_IA32_MCG_CAP:
2163                 data = vcpu->arch.mcg_cap;
2164                 break;
2165         case MSR_IA32_MCG_CTL:
2166                 if (!(mcg_cap & MCG_CTL_P))
2167                         return 1;
2168                 data = vcpu->arch.mcg_ctl;
2169                 break;
2170         case MSR_IA32_MCG_STATUS:
2171                 data = vcpu->arch.mcg_status;
2172                 break;
2173         default:
2174                 if (msr >= MSR_IA32_MC0_CTL &&
2175                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2176                         u32 offset = msr - MSR_IA32_MC0_CTL;
2177                         data = vcpu->arch.mce_banks[offset];
2178                         break;
2179                 }
2180                 return 1;
2181         }
2182         *pdata = data;
2183         return 0;
2184 }
2185
2186 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2187 {
2188         u64 data = 0;
2189         struct kvm *kvm = vcpu->kvm;
2190
2191         switch (msr) {
2192         case HV_X64_MSR_GUEST_OS_ID:
2193                 data = kvm->arch.hv_guest_os_id;
2194                 break;
2195         case HV_X64_MSR_HYPERCALL:
2196                 data = kvm->arch.hv_hypercall;
2197                 break;
2198         default:
2199                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2200                 return 1;
2201         }
2202
2203         *pdata = data;
2204         return 0;
2205 }
2206
2207 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2208 {
2209         u64 data = 0;
2210
2211         switch (msr) {
2212         case HV_X64_MSR_VP_INDEX: {
2213                 int r;
2214                 struct kvm_vcpu *v;
2215                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2216                         if (v == vcpu)
2217                                 data = r;
2218                 break;
2219         }
2220         case HV_X64_MSR_EOI:
2221                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2222         case HV_X64_MSR_ICR:
2223                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2224         case HV_X64_MSR_TPR:
2225                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2226         case HV_X64_MSR_APIC_ASSIST_PAGE:
2227                 data = vcpu->arch.hv_vapic;
2228                 break;
2229         default:
2230                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2231                 return 1;
2232         }
2233         *pdata = data;
2234         return 0;
2235 }
2236
2237 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2238 {
2239         u64 data;
2240
2241         switch (msr) {
2242         case MSR_IA32_PLATFORM_ID:
2243         case MSR_IA32_EBL_CR_POWERON:
2244         case MSR_IA32_DEBUGCTLMSR:
2245         case MSR_IA32_LASTBRANCHFROMIP:
2246         case MSR_IA32_LASTBRANCHTOIP:
2247         case MSR_IA32_LASTINTFROMIP:
2248         case MSR_IA32_LASTINTTOIP:
2249         case MSR_K8_SYSCFG:
2250         case MSR_K7_HWCR:
2251         case MSR_VM_HSAVE_PA:
2252         case MSR_K7_EVNTSEL0:
2253         case MSR_K7_PERFCTR0:
2254         case MSR_K8_INT_PENDING_MSG:
2255         case MSR_AMD64_NB_CFG:
2256         case MSR_FAM10H_MMIO_CONF_BASE:
2257         case MSR_AMD64_BU_CFG2:
2258                 data = 0;
2259                 break;
2260         case MSR_P6_PERFCTR0:
2261         case MSR_P6_PERFCTR1:
2262         case MSR_P6_EVNTSEL0:
2263         case MSR_P6_EVNTSEL1:
2264                 if (kvm_pmu_msr(vcpu, msr))
2265                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2266                 data = 0;
2267                 break;
2268         case MSR_IA32_UCODE_REV:
2269                 data = 0x100000000ULL;
2270                 break;
2271         case MSR_MTRRcap:
2272                 data = 0x500 | KVM_NR_VAR_MTRR;
2273                 break;
2274         case 0x200 ... 0x2ff:
2275                 return get_msr_mtrr(vcpu, msr, pdata);
2276         case 0xcd: /* fsb frequency */
2277                 data = 3;
2278                 break;
2279                 /*
2280                  * MSR_EBC_FREQUENCY_ID
2281                  * Conservative value valid for even the basic CPU models.
2282                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2283                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2284                  * and 266MHz for model 3, or 4. Set Core Clock
2285                  * Frequency to System Bus Frequency Ratio to 1 (bits
2286                  * 31:24) even though these are only valid for CPU
2287                  * models > 2, however guests may end up dividing or
2288                  * multiplying by zero otherwise.
2289                  */
2290         case MSR_EBC_FREQUENCY_ID:
2291                 data = 1 << 24;
2292                 break;
2293         case MSR_IA32_APICBASE:
2294                 data = kvm_get_apic_base(vcpu);
2295                 break;
2296         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2297                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2298                 break;
2299         case MSR_IA32_TSCDEADLINE:
2300                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2301                 break;
2302         case MSR_IA32_TSC_ADJUST:
2303                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2304                 break;
2305         case MSR_IA32_MISC_ENABLE:
2306                 data = vcpu->arch.ia32_misc_enable_msr;
2307                 break;
2308         case MSR_IA32_PERF_STATUS:
2309                 /* TSC increment by tick */
2310                 data = 1000ULL;
2311                 /* CPU multiplier */
2312                 data |= (((uint64_t)4ULL) << 40);
2313                 break;
2314         case MSR_EFER:
2315                 data = vcpu->arch.efer;
2316                 break;
2317         case MSR_KVM_WALL_CLOCK:
2318         case MSR_KVM_WALL_CLOCK_NEW:
2319                 data = vcpu->kvm->arch.wall_clock;
2320                 break;
2321         case MSR_KVM_SYSTEM_TIME:
2322         case MSR_KVM_SYSTEM_TIME_NEW:
2323                 data = vcpu->arch.time;
2324                 break;
2325         case MSR_KVM_ASYNC_PF_EN:
2326                 data = vcpu->arch.apf.msr_val;
2327                 break;
2328         case MSR_KVM_STEAL_TIME:
2329                 data = vcpu->arch.st.msr_val;
2330                 break;
2331         case MSR_KVM_PV_EOI_EN:
2332                 data = vcpu->arch.pv_eoi.msr_val;
2333                 break;
2334         case MSR_IA32_P5_MC_ADDR:
2335         case MSR_IA32_P5_MC_TYPE:
2336         case MSR_IA32_MCG_CAP:
2337         case MSR_IA32_MCG_CTL:
2338         case MSR_IA32_MCG_STATUS:
2339         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2340                 return get_msr_mce(vcpu, msr, pdata);
2341         case MSR_K7_CLK_CTL:
2342                 /*
2343                  * Provide expected ramp-up count for K7. All other
2344                  * are set to zero, indicating minimum divisors for
2345                  * every field.
2346                  *
2347                  * This prevents guest kernels on AMD host with CPU
2348                  * type 6, model 8 and higher from exploding due to
2349                  * the rdmsr failing.
2350                  */
2351                 data = 0x20000000;
2352                 break;
2353         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2354                 if (kvm_hv_msr_partition_wide(msr)) {
2355                         int r;
2356                         mutex_lock(&vcpu->kvm->lock);
2357                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2358                         mutex_unlock(&vcpu->kvm->lock);
2359                         return r;
2360                 } else
2361                         return get_msr_hyperv(vcpu, msr, pdata);
2362                 break;
2363         case MSR_IA32_BBL_CR_CTL3:
2364                 /* This legacy MSR exists but isn't fully documented in current
2365                  * silicon.  It is however accessed by winxp in very narrow
2366                  * scenarios where it sets bit #19, itself documented as
2367                  * a "reserved" bit.  Best effort attempt to source coherent
2368                  * read data here should the balance of the register be
2369                  * interpreted by the guest:
2370                  *
2371                  * L2 cache control register 3: 64GB range, 256KB size,
2372                  * enabled, latency 0x1, configured
2373                  */
2374                 data = 0xbe702111;
2375                 break;
2376         case MSR_AMD64_OSVW_ID_LENGTH:
2377                 if (!guest_cpuid_has_osvw(vcpu))
2378                         return 1;
2379                 data = vcpu->arch.osvw.length;
2380                 break;
2381         case MSR_AMD64_OSVW_STATUS:
2382                 if (!guest_cpuid_has_osvw(vcpu))
2383                         return 1;
2384                 data = vcpu->arch.osvw.status;
2385                 break;
2386         default:
2387                 if (kvm_pmu_msr(vcpu, msr))
2388                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2389                 if (!ignore_msrs) {
2390                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2391                         return 1;
2392                 } else {
2393                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2394                         data = 0;
2395                 }
2396                 break;
2397         }
2398         *pdata = data;
2399         return 0;
2400 }
2401 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2402
2403 /*
2404  * Read or write a bunch of msrs. All parameters are kernel addresses.
2405  *
2406  * @return number of msrs set successfully.
2407  */
2408 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2409                     struct kvm_msr_entry *entries,
2410                     int (*do_msr)(struct kvm_vcpu *vcpu,
2411                                   unsigned index, u64 *data))
2412 {
2413         int i, idx;
2414
2415         idx = srcu_read_lock(&vcpu->kvm->srcu);
2416         for (i = 0; i < msrs->nmsrs; ++i)
2417                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2418                         break;
2419         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2420
2421         return i;
2422 }
2423
2424 /*
2425  * Read or write a bunch of msrs. Parameters are user addresses.
2426  *
2427  * @return number of msrs set successfully.
2428  */
2429 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2430                   int (*do_msr)(struct kvm_vcpu *vcpu,
2431                                 unsigned index, u64 *data),
2432                   int writeback)
2433 {
2434         struct kvm_msrs msrs;
2435         struct kvm_msr_entry *entries;
2436         int r, n;
2437         unsigned size;
2438
2439         r = -EFAULT;
2440         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2441                 goto out;
2442
2443         r = -E2BIG;
2444         if (msrs.nmsrs >= MAX_IO_MSRS)
2445                 goto out;
2446
2447         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2448         entries = memdup_user(user_msrs->entries, size);
2449         if (IS_ERR(entries)) {
2450                 r = PTR_ERR(entries);
2451                 goto out;
2452         }
2453
2454         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2455         if (r < 0)
2456                 goto out_free;
2457
2458         r = -EFAULT;
2459         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2460                 goto out_free;
2461
2462         r = n;
2463
2464 out_free:
2465         kfree(entries);
2466 out:
2467         return r;
2468 }
2469
2470 int kvm_dev_ioctl_check_extension(long ext)
2471 {
2472         int r;
2473
2474         switch (ext) {
2475         case KVM_CAP_IRQCHIP:
2476         case KVM_CAP_HLT:
2477         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2478         case KVM_CAP_SET_TSS_ADDR:
2479         case KVM_CAP_EXT_CPUID:
2480         case KVM_CAP_CLOCKSOURCE:
2481         case KVM_CAP_PIT:
2482         case KVM_CAP_NOP_IO_DELAY:
2483         case KVM_CAP_MP_STATE:
2484         case KVM_CAP_SYNC_MMU:
2485         case KVM_CAP_USER_NMI:
2486         case KVM_CAP_REINJECT_CONTROL:
2487         case KVM_CAP_IRQ_INJECT_STATUS:
2488         case KVM_CAP_ASSIGN_DEV_IRQ:
2489         case KVM_CAP_IRQFD:
2490         case KVM_CAP_IOEVENTFD:
2491         case KVM_CAP_PIT2:
2492         case KVM_CAP_PIT_STATE2:
2493         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2494         case KVM_CAP_XEN_HVM:
2495         case KVM_CAP_ADJUST_CLOCK:
2496         case KVM_CAP_VCPU_EVENTS:
2497         case KVM_CAP_HYPERV:
2498         case KVM_CAP_HYPERV_VAPIC:
2499         case KVM_CAP_HYPERV_SPIN:
2500         case KVM_CAP_PCI_SEGMENT:
2501         case KVM_CAP_DEBUGREGS:
2502         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2503         case KVM_CAP_XSAVE:
2504         case KVM_CAP_ASYNC_PF:
2505         case KVM_CAP_GET_TSC_KHZ:
2506         case KVM_CAP_PCI_2_3:
2507         case KVM_CAP_KVMCLOCK_CTRL:
2508         case KVM_CAP_READONLY_MEM:
2509         case KVM_CAP_IRQFD_RESAMPLE:
2510                 r = 1;
2511                 break;
2512         case KVM_CAP_COALESCED_MMIO:
2513                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2514                 break;
2515         case KVM_CAP_VAPIC:
2516                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2517                 break;
2518         case KVM_CAP_NR_VCPUS:
2519                 r = KVM_SOFT_MAX_VCPUS;
2520                 break;
2521         case KVM_CAP_MAX_VCPUS:
2522                 r = KVM_MAX_VCPUS;
2523                 break;
2524         case KVM_CAP_NR_MEMSLOTS:
2525                 r = KVM_USER_MEM_SLOTS;
2526                 break;
2527         case KVM_CAP_PV_MMU:    /* obsolete */
2528                 r = 0;
2529                 break;
2530         case KVM_CAP_IOMMU:
2531                 r = iommu_present(&pci_bus_type);
2532                 break;
2533         case KVM_CAP_MCE:
2534                 r = KVM_MAX_MCE_BANKS;
2535                 break;
2536         case KVM_CAP_XCRS:
2537                 r = cpu_has_xsave;
2538                 break;
2539         case KVM_CAP_TSC_CONTROL:
2540                 r = kvm_has_tsc_control;
2541                 break;
2542         case KVM_CAP_TSC_DEADLINE_TIMER:
2543                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2544                 break;
2545         default:
2546                 r = 0;
2547                 break;
2548         }
2549         return r;
2550
2551 }
2552
2553 long kvm_arch_dev_ioctl(struct file *filp,
2554                         unsigned int ioctl, unsigned long arg)
2555 {
2556         void __user *argp = (void __user *)arg;
2557         long r;
2558
2559         switch (ioctl) {
2560         case KVM_GET_MSR_INDEX_LIST: {
2561                 struct kvm_msr_list __user *user_msr_list = argp;
2562                 struct kvm_msr_list msr_list;
2563                 unsigned n;
2564
2565                 r = -EFAULT;
2566                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2567                         goto out;
2568                 n = msr_list.nmsrs;
2569                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2570                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2571                         goto out;
2572                 r = -E2BIG;
2573                 if (n < msr_list.nmsrs)
2574                         goto out;
2575                 r = -EFAULT;
2576                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2577                                  num_msrs_to_save * sizeof(u32)))
2578                         goto out;
2579                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2580                                  &emulated_msrs,
2581                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2582                         goto out;
2583                 r = 0;
2584                 break;
2585         }
2586         case KVM_GET_SUPPORTED_CPUID: {
2587                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2588                 struct kvm_cpuid2 cpuid;
2589
2590                 r = -EFAULT;
2591                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2592                         goto out;
2593                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2594                                                       cpuid_arg->entries);
2595                 if (r)
2596                         goto out;
2597
2598                 r = -EFAULT;
2599                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2600                         goto out;
2601                 r = 0;
2602                 break;
2603         }
2604         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2605                 u64 mce_cap;
2606
2607                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2608                 r = -EFAULT;
2609                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2610                         goto out;
2611                 r = 0;
2612                 break;
2613         }
2614         default:
2615                 r = -EINVAL;
2616         }
2617 out:
2618         return r;
2619 }
2620
2621 static void wbinvd_ipi(void *garbage)
2622 {
2623         wbinvd();
2624 }
2625
2626 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2627 {
2628         return vcpu->kvm->arch.iommu_domain &&
2629                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2630 }
2631
2632 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2633 {
2634         /* Address WBINVD may be executed by guest */
2635         if (need_emulate_wbinvd(vcpu)) {
2636                 if (kvm_x86_ops->has_wbinvd_exit())
2637                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2638                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2639                         smp_call_function_single(vcpu->cpu,
2640                                         wbinvd_ipi, NULL, 1);
2641         }
2642
2643         kvm_x86_ops->vcpu_load(vcpu, cpu);
2644
2645         /* Apply any externally detected TSC adjustments (due to suspend) */
2646         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2647                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2648                 vcpu->arch.tsc_offset_adjustment = 0;
2649                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2650         }
2651
2652         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2653                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2654                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2655                 if (tsc_delta < 0)
2656                         mark_tsc_unstable("KVM discovered backwards TSC");
2657                 if (check_tsc_unstable()) {
2658                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2659                                                 vcpu->arch.last_guest_tsc);
2660                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2661                         vcpu->arch.tsc_catchup = 1;
2662                 }
2663                 /*
2664                  * On a host with synchronized TSC, there is no need to update
2665                  * kvmclock on vcpu->cpu migration
2666                  */
2667                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2668                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2669                 if (vcpu->cpu != cpu)
2670                         kvm_migrate_timers(vcpu);
2671                 vcpu->cpu = cpu;
2672         }
2673
2674         accumulate_steal_time(vcpu);
2675         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2676 }
2677
2678 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2679 {
2680         kvm_x86_ops->vcpu_put(vcpu);
2681         kvm_put_guest_fpu(vcpu);
2682         vcpu->arch.last_host_tsc = native_read_tsc();
2683 }
2684
2685 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2686                                     struct kvm_lapic_state *s)
2687 {
2688         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2689
2690         return 0;
2691 }
2692
2693 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2694                                     struct kvm_lapic_state *s)
2695 {
2696         kvm_apic_post_state_restore(vcpu, s);
2697         update_cr8_intercept(vcpu);
2698
2699         return 0;
2700 }
2701
2702 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2703                                     struct kvm_interrupt *irq)
2704 {
2705         if (irq->irq >= KVM_NR_INTERRUPTS)
2706                 return -EINVAL;
2707         if (irqchip_in_kernel(vcpu->kvm))
2708                 return -ENXIO;
2709
2710         kvm_queue_interrupt(vcpu, irq->irq, false);
2711         kvm_make_request(KVM_REQ_EVENT, vcpu);
2712
2713         return 0;
2714 }
2715
2716 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2717 {
2718         kvm_inject_nmi(vcpu);
2719
2720         return 0;
2721 }
2722
2723 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2724                                            struct kvm_tpr_access_ctl *tac)
2725 {
2726         if (tac->flags)
2727                 return -EINVAL;
2728         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2729         return 0;
2730 }
2731
2732 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2733                                         u64 mcg_cap)
2734 {
2735         int r;
2736         unsigned bank_num = mcg_cap & 0xff, bank;
2737
2738         r = -EINVAL;
2739         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2740                 goto out;
2741         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2742                 goto out;
2743         r = 0;
2744         vcpu->arch.mcg_cap = mcg_cap;
2745         /* Init IA32_MCG_CTL to all 1s */
2746         if (mcg_cap & MCG_CTL_P)
2747                 vcpu->arch.mcg_ctl = ~(u64)0;
2748         /* Init IA32_MCi_CTL to all 1s */
2749         for (bank = 0; bank < bank_num; bank++)
2750                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2751 out:
2752         return r;
2753 }
2754
2755 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2756                                       struct kvm_x86_mce *mce)
2757 {
2758         u64 mcg_cap = vcpu->arch.mcg_cap;
2759         unsigned bank_num = mcg_cap & 0xff;
2760         u64 *banks = vcpu->arch.mce_banks;
2761
2762         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2763                 return -EINVAL;
2764         /*
2765          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2766          * reporting is disabled
2767          */
2768         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2769             vcpu->arch.mcg_ctl != ~(u64)0)
2770                 return 0;
2771         banks += 4 * mce->bank;
2772         /*
2773          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2774          * reporting is disabled for the bank
2775          */
2776         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2777                 return 0;
2778         if (mce->status & MCI_STATUS_UC) {
2779                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2780                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2781                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2782                         return 0;
2783                 }
2784                 if (banks[1] & MCI_STATUS_VAL)
2785                         mce->status |= MCI_STATUS_OVER;
2786                 banks[2] = mce->addr;
2787                 banks[3] = mce->misc;
2788                 vcpu->arch.mcg_status = mce->mcg_status;
2789                 banks[1] = mce->status;
2790                 kvm_queue_exception(vcpu, MC_VECTOR);
2791         } else if (!(banks[1] & MCI_STATUS_VAL)
2792                    || !(banks[1] & MCI_STATUS_UC)) {
2793                 if (banks[1] & MCI_STATUS_VAL)
2794                         mce->status |= MCI_STATUS_OVER;
2795                 banks[2] = mce->addr;
2796                 banks[3] = mce->misc;
2797                 banks[1] = mce->status;
2798         } else
2799                 banks[1] |= MCI_STATUS_OVER;
2800         return 0;
2801 }
2802
2803 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2804                                                struct kvm_vcpu_events *events)
2805 {
2806         process_nmi(vcpu);
2807         events->exception.injected =
2808                 vcpu->arch.exception.pending &&
2809                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2810         events->exception.nr = vcpu->arch.exception.nr;
2811         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2812         events->exception.pad = 0;
2813         events->exception.error_code = vcpu->arch.exception.error_code;
2814
2815         events->interrupt.injected =
2816                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2817         events->interrupt.nr = vcpu->arch.interrupt.nr;
2818         events->interrupt.soft = 0;
2819         events->interrupt.shadow =
2820                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2821                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2822
2823         events->nmi.injected = vcpu->arch.nmi_injected;
2824         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2825         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2826         events->nmi.pad = 0;
2827
2828         events->sipi_vector = 0; /* never valid when reporting to user space */
2829
2830         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2831                          | KVM_VCPUEVENT_VALID_SHADOW);
2832         memset(&events->reserved, 0, sizeof(events->reserved));
2833 }
2834
2835 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2836                                               struct kvm_vcpu_events *events)
2837 {
2838         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2839                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2840                               | KVM_VCPUEVENT_VALID_SHADOW))
2841                 return -EINVAL;
2842
2843         process_nmi(vcpu);
2844         vcpu->arch.exception.pending = events->exception.injected;
2845         vcpu->arch.exception.nr = events->exception.nr;
2846         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2847         vcpu->arch.exception.error_code = events->exception.error_code;
2848
2849         vcpu->arch.interrupt.pending = events->interrupt.injected;
2850         vcpu->arch.interrupt.nr = events->interrupt.nr;
2851         vcpu->arch.interrupt.soft = events->interrupt.soft;
2852         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2853                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2854                                                   events->interrupt.shadow);
2855
2856         vcpu->arch.nmi_injected = events->nmi.injected;
2857         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2858                 vcpu->arch.nmi_pending = events->nmi.pending;
2859         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2860
2861         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2862             kvm_vcpu_has_lapic(vcpu))
2863                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2864
2865         kvm_make_request(KVM_REQ_EVENT, vcpu);
2866
2867         return 0;
2868 }
2869
2870 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2871                                              struct kvm_debugregs *dbgregs)
2872 {
2873         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2874         dbgregs->dr6 = vcpu->arch.dr6;
2875         dbgregs->dr7 = vcpu->arch.dr7;
2876         dbgregs->flags = 0;
2877         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2878 }
2879
2880 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2881                                             struct kvm_debugregs *dbgregs)
2882 {
2883         if (dbgregs->flags)
2884                 return -EINVAL;
2885
2886         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2887         vcpu->arch.dr6 = dbgregs->dr6;
2888         vcpu->arch.dr7 = dbgregs->dr7;
2889
2890         return 0;
2891 }
2892
2893 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2894                                          struct kvm_xsave *guest_xsave)
2895 {
2896         if (cpu_has_xsave)
2897                 memcpy(guest_xsave->region,
2898                         &vcpu->arch.guest_fpu.state->xsave,
2899                         xstate_size);
2900         else {
2901                 memcpy(guest_xsave->region,
2902                         &vcpu->arch.guest_fpu.state->fxsave,
2903                         sizeof(struct i387_fxsave_struct));
2904                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2905                         XSTATE_FPSSE;
2906         }
2907 }
2908
2909 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2910                                         struct kvm_xsave *guest_xsave)
2911 {
2912         u64 xstate_bv =
2913                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2914
2915         if (cpu_has_xsave)
2916                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2917                         guest_xsave->region, xstate_size);
2918         else {
2919                 if (xstate_bv & ~XSTATE_FPSSE)
2920                         return -EINVAL;
2921                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2922                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2923         }
2924         return 0;
2925 }
2926
2927 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2928                                         struct kvm_xcrs *guest_xcrs)
2929 {
2930         if (!cpu_has_xsave) {
2931                 guest_xcrs->nr_xcrs = 0;
2932                 return;
2933         }
2934
2935         guest_xcrs->nr_xcrs = 1;
2936         guest_xcrs->flags = 0;
2937         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2938         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2939 }
2940
2941 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2942                                        struct kvm_xcrs *guest_xcrs)
2943 {
2944         int i, r = 0;
2945
2946         if (!cpu_has_xsave)
2947                 return -EINVAL;
2948
2949         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2950                 return -EINVAL;
2951
2952         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2953                 /* Only support XCR0 currently */
2954                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2955                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2956                                 guest_xcrs->xcrs[0].value);
2957                         break;
2958                 }
2959         if (r)
2960                 r = -EINVAL;
2961         return r;
2962 }
2963
2964 /*
2965  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2966  * stopped by the hypervisor.  This function will be called from the host only.
2967  * EINVAL is returned when the host attempts to set the flag for a guest that
2968  * does not support pv clocks.
2969  */
2970 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2971 {
2972         if (!vcpu->arch.pv_time_enabled)
2973                 return -EINVAL;
2974         vcpu->arch.pvclock_set_guest_stopped_request = true;
2975         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2976         return 0;
2977 }
2978
2979 long kvm_arch_vcpu_ioctl(struct file *filp,
2980                          unsigned int ioctl, unsigned long arg)
2981 {
2982         struct kvm_vcpu *vcpu = filp->private_data;
2983         void __user *argp = (void __user *)arg;
2984         int r;
2985         union {
2986                 struct kvm_lapic_state *lapic;
2987                 struct kvm_xsave *xsave;
2988                 struct kvm_xcrs *xcrs;
2989                 void *buffer;
2990         } u;
2991
2992         u.buffer = NULL;
2993         switch (ioctl) {
2994         case KVM_GET_LAPIC: {
2995                 r = -EINVAL;
2996                 if (!vcpu->arch.apic)
2997                         goto out;
2998                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2999
3000                 r = -ENOMEM;
3001                 if (!u.lapic)
3002                         goto out;
3003                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3004                 if (r)
3005                         goto out;
3006                 r = -EFAULT;
3007                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3008                         goto out;
3009                 r = 0;
3010                 break;
3011         }
3012         case KVM_SET_LAPIC: {
3013                 r = -EINVAL;
3014                 if (!vcpu->arch.apic)
3015                         goto out;
3016                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3017                 if (IS_ERR(u.lapic))
3018                         return PTR_ERR(u.lapic);
3019
3020                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3021                 break;
3022         }
3023         case KVM_INTERRUPT: {
3024                 struct kvm_interrupt irq;
3025
3026                 r = -EFAULT;
3027                 if (copy_from_user(&irq, argp, sizeof irq))
3028                         goto out;
3029                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3030                 break;
3031         }
3032         case KVM_NMI: {
3033                 r = kvm_vcpu_ioctl_nmi(vcpu);
3034                 break;
3035         }
3036         case KVM_SET_CPUID: {
3037                 struct kvm_cpuid __user *cpuid_arg = argp;
3038                 struct kvm_cpuid cpuid;
3039
3040                 r = -EFAULT;
3041                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3042                         goto out;
3043                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3044                 break;
3045         }
3046         case KVM_SET_CPUID2: {
3047                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3048                 struct kvm_cpuid2 cpuid;
3049
3050                 r = -EFAULT;
3051                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3052                         goto out;
3053                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3054                                               cpuid_arg->entries);
3055                 break;
3056         }
3057         case KVM_GET_CPUID2: {
3058                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3059                 struct kvm_cpuid2 cpuid;
3060
3061                 r = -EFAULT;
3062                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3063                         goto out;
3064                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3065                                               cpuid_arg->entries);
3066                 if (r)
3067                         goto out;
3068                 r = -EFAULT;
3069                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3070                         goto out;
3071                 r = 0;
3072                 break;
3073         }
3074         case KVM_GET_MSRS:
3075                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3076                 break;
3077         case KVM_SET_MSRS:
3078                 r = msr_io(vcpu, argp, do_set_msr, 0);
3079                 break;
3080         case KVM_TPR_ACCESS_REPORTING: {
3081                 struct kvm_tpr_access_ctl tac;
3082
3083                 r = -EFAULT;
3084                 if (copy_from_user(&tac, argp, sizeof tac))
3085                         goto out;
3086                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3087                 if (r)
3088                         goto out;
3089                 r = -EFAULT;
3090                 if (copy_to_user(argp, &tac, sizeof tac))
3091                         goto out;
3092                 r = 0;
3093                 break;
3094         };
3095         case KVM_SET_VAPIC_ADDR: {
3096                 struct kvm_vapic_addr va;
3097
3098                 r = -EINVAL;
3099                 if (!irqchip_in_kernel(vcpu->kvm))
3100                         goto out;
3101                 r = -EFAULT;
3102                 if (copy_from_user(&va, argp, sizeof va))
3103                         goto out;
3104                 r = 0;
3105                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3106                 break;
3107         }
3108         case KVM_X86_SETUP_MCE: {
3109                 u64 mcg_cap;
3110
3111                 r = -EFAULT;
3112                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3113                         goto out;
3114                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3115                 break;
3116         }
3117         case KVM_X86_SET_MCE: {
3118                 struct kvm_x86_mce mce;
3119
3120                 r = -EFAULT;
3121                 if (copy_from_user(&mce, argp, sizeof mce))
3122                         goto out;
3123                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3124                 break;
3125         }
3126         case KVM_GET_VCPU_EVENTS: {
3127                 struct kvm_vcpu_events events;
3128
3129                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3130
3131                 r = -EFAULT;
3132                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3133                         break;
3134                 r = 0;
3135                 break;
3136         }
3137         case KVM_SET_VCPU_EVENTS: {
3138                 struct kvm_vcpu_events events;
3139
3140                 r = -EFAULT;
3141                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3142                         break;
3143
3144                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3145                 break;
3146         }
3147         case KVM_GET_DEBUGREGS: {
3148                 struct kvm_debugregs dbgregs;
3149
3150                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3151
3152                 r = -EFAULT;
3153                 if (copy_to_user(argp, &dbgregs,
3154                                  sizeof(struct kvm_debugregs)))
3155                         break;
3156                 r = 0;
3157                 break;
3158         }
3159         case KVM_SET_DEBUGREGS: {
3160                 struct kvm_debugregs dbgregs;
3161
3162                 r = -EFAULT;
3163                 if (copy_from_user(&dbgregs, argp,
3164                                    sizeof(struct kvm_debugregs)))
3165                         break;
3166
3167                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3168                 break;
3169         }
3170         case KVM_GET_XSAVE: {
3171                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3172                 r = -ENOMEM;
3173                 if (!u.xsave)
3174                         break;
3175
3176                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3177
3178                 r = -EFAULT;
3179                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3180                         break;
3181                 r = 0;
3182                 break;
3183         }
3184         case KVM_SET_XSAVE: {
3185                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3186                 if (IS_ERR(u.xsave))
3187                         return PTR_ERR(u.xsave);
3188
3189                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3190                 break;
3191         }
3192         case KVM_GET_XCRS: {
3193                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3194                 r = -ENOMEM;
3195                 if (!u.xcrs)
3196                         break;
3197
3198                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3199
3200                 r = -EFAULT;
3201                 if (copy_to_user(argp, u.xcrs,
3202                                  sizeof(struct kvm_xcrs)))
3203                         break;
3204                 r = 0;
3205                 break;
3206         }
3207         case KVM_SET_XCRS: {
3208                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3209                 if (IS_ERR(u.xcrs))
3210                         return PTR_ERR(u.xcrs);
3211
3212                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3213                 break;
3214         }
3215         case KVM_SET_TSC_KHZ: {
3216                 u32 user_tsc_khz;
3217
3218                 r = -EINVAL;
3219                 user_tsc_khz = (u32)arg;
3220
3221                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3222                         goto out;
3223
3224                 if (user_tsc_khz == 0)
3225                         user_tsc_khz = tsc_khz;
3226
3227                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3228
3229                 r = 0;
3230                 goto out;
3231         }
3232         case KVM_GET_TSC_KHZ: {
3233                 r = vcpu->arch.virtual_tsc_khz;
3234                 goto out;
3235         }
3236         case KVM_KVMCLOCK_CTRL: {
3237                 r = kvm_set_guest_paused(vcpu);
3238                 goto out;
3239         }
3240         default:
3241                 r = -EINVAL;
3242         }
3243 out:
3244         kfree(u.buffer);
3245         return r;
3246 }
3247
3248 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3249 {
3250         return VM_FAULT_SIGBUS;
3251 }
3252
3253 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3254 {
3255         int ret;
3256
3257         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3258                 return -EINVAL;
3259         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3260         return ret;
3261 }
3262
3263 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3264                                               u64 ident_addr)
3265 {
3266         kvm->arch.ept_identity_map_addr = ident_addr;
3267         return 0;
3268 }
3269
3270 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3271                                           u32 kvm_nr_mmu_pages)
3272 {
3273         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3274                 return -EINVAL;
3275
3276         mutex_lock(&kvm->slots_lock);
3277
3278         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3279         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3280
3281         mutex_unlock(&kvm->slots_lock);
3282         return 0;
3283 }
3284
3285 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3286 {
3287         return kvm->arch.n_max_mmu_pages;
3288 }
3289
3290 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3291 {
3292         int r;
3293
3294         r = 0;
3295         switch (chip->chip_id) {
3296         case KVM_IRQCHIP_PIC_MASTER:
3297                 memcpy(&chip->chip.pic,
3298                         &pic_irqchip(kvm)->pics[0],
3299                         sizeof(struct kvm_pic_state));
3300                 break;
3301         case KVM_IRQCHIP_PIC_SLAVE:
3302                 memcpy(&chip->chip.pic,
3303                         &pic_irqchip(kvm)->pics[1],
3304                         sizeof(struct kvm_pic_state));
3305                 break;
3306         case KVM_IRQCHIP_IOAPIC:
3307                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3308                 break;
3309         default:
3310                 r = -EINVAL;
3311                 break;
3312         }
3313         return r;
3314 }
3315
3316 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3317 {
3318         int r;
3319
3320         r = 0;
3321         switch (chip->chip_id) {
3322         case KVM_IRQCHIP_PIC_MASTER:
3323                 spin_lock(&pic_irqchip(kvm)->lock);
3324                 memcpy(&pic_irqchip(kvm)->pics[0],
3325                         &chip->chip.pic,
3326                         sizeof(struct kvm_pic_state));
3327                 spin_unlock(&pic_irqchip(kvm)->lock);
3328                 break;
3329         case KVM_IRQCHIP_PIC_SLAVE:
3330                 spin_lock(&pic_irqchip(kvm)->lock);
3331                 memcpy(&pic_irqchip(kvm)->pics[1],
3332                         &chip->chip.pic,
3333                         sizeof(struct kvm_pic_state));
3334                 spin_unlock(&pic_irqchip(kvm)->lock);
3335                 break;
3336         case KVM_IRQCHIP_IOAPIC:
3337                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3338                 break;
3339         default:
3340                 r = -EINVAL;
3341                 break;
3342         }
3343         kvm_pic_update_irq(pic_irqchip(kvm));
3344         return r;
3345 }
3346
3347 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3348 {
3349         int r = 0;
3350
3351         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3352         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3353         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3354         return r;
3355 }
3356
3357 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3358 {
3359         int r = 0;
3360
3361         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3362         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3363         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3364         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3365         return r;
3366 }
3367
3368 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3369 {
3370         int r = 0;
3371
3372         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3373         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3374                 sizeof(ps->channels));
3375         ps->flags = kvm->arch.vpit->pit_state.flags;
3376         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3377         memset(&ps->reserved, 0, sizeof(ps->reserved));
3378         return r;
3379 }
3380
3381 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3382 {
3383         int r = 0, start = 0;
3384         u32 prev_legacy, cur_legacy;
3385         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3386         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3387         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3388         if (!prev_legacy && cur_legacy)
3389                 start = 1;
3390         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3391                sizeof(kvm->arch.vpit->pit_state.channels));
3392         kvm->arch.vpit->pit_state.flags = ps->flags;
3393         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3394         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3395         return r;
3396 }
3397
3398 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3399                                  struct kvm_reinject_control *control)
3400 {
3401         if (!kvm->arch.vpit)
3402                 return -ENXIO;
3403         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3404         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3405         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3406         return 0;
3407 }
3408
3409 /**
3410  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3411  * @kvm: kvm instance
3412  * @log: slot id and address to which we copy the log
3413  *
3414  * We need to keep it in mind that VCPU threads can write to the bitmap
3415  * concurrently.  So, to avoid losing data, we keep the following order for
3416  * each bit:
3417  *
3418  *   1. Take a snapshot of the bit and clear it if needed.
3419  *   2. Write protect the corresponding page.
3420  *   3. Flush TLB's if needed.
3421  *   4. Copy the snapshot to the userspace.
3422  *
3423  * Between 2 and 3, the guest may write to the page using the remaining TLB
3424  * entry.  This is not a problem because the page will be reported dirty at
3425  * step 4 using the snapshot taken before and step 3 ensures that successive
3426  * writes will be logged for the next call.
3427  */
3428 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3429 {
3430         int r;
3431         struct kvm_memory_slot *memslot;
3432         unsigned long n, i;
3433         unsigned long *dirty_bitmap;
3434         unsigned long *dirty_bitmap_buffer;
3435         bool is_dirty = false;
3436
3437         mutex_lock(&kvm->slots_lock);
3438
3439         r = -EINVAL;
3440         if (log->slot >= KVM_USER_MEM_SLOTS)
3441                 goto out;
3442
3443         memslot = id_to_memslot(kvm->memslots, log->slot);
3444
3445         dirty_bitmap = memslot->dirty_bitmap;
3446         r = -ENOENT;
3447         if (!dirty_bitmap)
3448                 goto out;
3449
3450         n = kvm_dirty_bitmap_bytes(memslot);
3451
3452         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3453         memset(dirty_bitmap_buffer, 0, n);
3454
3455         spin_lock(&kvm->mmu_lock);
3456
3457         for (i = 0; i < n / sizeof(long); i++) {
3458                 unsigned long mask;
3459                 gfn_t offset;
3460
3461                 if (!dirty_bitmap[i])
3462                         continue;
3463
3464                 is_dirty = true;
3465
3466                 mask = xchg(&dirty_bitmap[i], 0);
3467                 dirty_bitmap_buffer[i] = mask;
3468
3469                 offset = i * BITS_PER_LONG;
3470                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3471         }
3472         if (is_dirty)
3473                 kvm_flush_remote_tlbs(kvm);
3474
3475         spin_unlock(&kvm->mmu_lock);
3476
3477         r = -EFAULT;
3478         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3479                 goto out;
3480
3481         r = 0;
3482 out:
3483         mutex_unlock(&kvm->slots_lock);
3484         return r;
3485 }
3486
3487 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event)
3488 {
3489         if (!irqchip_in_kernel(kvm))
3490                 return -ENXIO;
3491
3492         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3493                                         irq_event->irq, irq_event->level);
3494         return 0;
3495 }
3496
3497 long kvm_arch_vm_ioctl(struct file *filp,
3498                        unsigned int ioctl, unsigned long arg)
3499 {
3500         struct kvm *kvm = filp->private_data;
3501         void __user *argp = (void __user *)arg;
3502         int r = -ENOTTY;
3503         /*
3504          * This union makes it completely explicit to gcc-3.x
3505          * that these two variables' stack usage should be
3506          * combined, not added together.
3507          */
3508         union {
3509                 struct kvm_pit_state ps;
3510                 struct kvm_pit_state2 ps2;
3511                 struct kvm_pit_config pit_config;
3512         } u;
3513
3514         switch (ioctl) {
3515         case KVM_SET_TSS_ADDR:
3516                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3517                 break;
3518         case KVM_SET_IDENTITY_MAP_ADDR: {
3519                 u64 ident_addr;
3520
3521                 r = -EFAULT;
3522                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3523                         goto out;
3524                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3525                 break;
3526         }
3527         case KVM_SET_NR_MMU_PAGES:
3528                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3529                 break;
3530         case KVM_GET_NR_MMU_PAGES:
3531                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3532                 break;
3533         case KVM_CREATE_IRQCHIP: {
3534                 struct kvm_pic *vpic;
3535
3536                 mutex_lock(&kvm->lock);
3537                 r = -EEXIST;
3538                 if (kvm->arch.vpic)
3539                         goto create_irqchip_unlock;
3540                 r = -EINVAL;
3541                 if (atomic_read(&kvm->online_vcpus))
3542                         goto create_irqchip_unlock;
3543                 r = -ENOMEM;
3544                 vpic = kvm_create_pic(kvm);
3545                 if (vpic) {
3546                         r = kvm_ioapic_init(kvm);
3547                         if (r) {
3548                                 mutex_lock(&kvm->slots_lock);
3549                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3550                                                           &vpic->dev_master);
3551                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3552                                                           &vpic->dev_slave);
3553                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3554                                                           &vpic->dev_eclr);
3555                                 mutex_unlock(&kvm->slots_lock);
3556                                 kfree(vpic);
3557                                 goto create_irqchip_unlock;
3558                         }
3559                 } else
3560                         goto create_irqchip_unlock;
3561                 smp_wmb();
3562                 kvm->arch.vpic = vpic;
3563                 smp_wmb();
3564                 r = kvm_setup_default_irq_routing(kvm);
3565                 if (r) {
3566                         mutex_lock(&kvm->slots_lock);
3567                         mutex_lock(&kvm->irq_lock);
3568                         kvm_ioapic_destroy(kvm);
3569                         kvm_destroy_pic(kvm);
3570                         mutex_unlock(&kvm->irq_lock);
3571                         mutex_unlock(&kvm->slots_lock);
3572                 }
3573         create_irqchip_unlock:
3574                 mutex_unlock(&kvm->lock);
3575                 break;
3576         }
3577         case KVM_CREATE_PIT:
3578                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3579                 goto create_pit;
3580         case KVM_CREATE_PIT2:
3581                 r = -EFAULT;
3582                 if (copy_from_user(&u.pit_config, argp,
3583                                    sizeof(struct kvm_pit_config)))
3584                         goto out;
3585         create_pit:
3586                 mutex_lock(&kvm->slots_lock);
3587                 r = -EEXIST;
3588                 if (kvm->arch.vpit)
3589                         goto create_pit_unlock;
3590                 r = -ENOMEM;
3591                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3592                 if (kvm->arch.vpit)
3593                         r = 0;
3594         create_pit_unlock:
3595                 mutex_unlock(&kvm->slots_lock);
3596                 break;
3597         case KVM_GET_IRQCHIP: {
3598                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3599                 struct kvm_irqchip *chip;
3600
3601                 chip = memdup_user(argp, sizeof(*chip));
3602                 if (IS_ERR(chip)) {
3603                         r = PTR_ERR(chip);
3604                         goto out;
3605                 }
3606
3607                 r = -ENXIO;
3608                 if (!irqchip_in_kernel(kvm))
3609                         goto get_irqchip_out;
3610                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3611                 if (r)
3612                         goto get_irqchip_out;
3613                 r = -EFAULT;
3614                 if (copy_to_user(argp, chip, sizeof *chip))
3615                         goto get_irqchip_out;
3616                 r = 0;
3617         get_irqchip_out:
3618                 kfree(chip);
3619                 break;
3620         }
3621         case KVM_SET_IRQCHIP: {
3622                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3623                 struct kvm_irqchip *chip;
3624
3625                 chip = memdup_user(argp, sizeof(*chip));
3626                 if (IS_ERR(chip)) {
3627                         r = PTR_ERR(chip);
3628                         goto out;
3629                 }
3630
3631                 r = -ENXIO;
3632                 if (!irqchip_in_kernel(kvm))
3633                         goto set_irqchip_out;
3634                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3635                 if (r)
3636                         goto set_irqchip_out;
3637                 r = 0;
3638         set_irqchip_out:
3639                 kfree(chip);
3640                 break;
3641         }
3642         case KVM_GET_PIT: {
3643                 r = -EFAULT;
3644                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3645                         goto out;
3646                 r = -ENXIO;
3647                 if (!kvm->arch.vpit)
3648                         goto out;
3649                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3650                 if (r)
3651                         goto out;
3652                 r = -EFAULT;
3653                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3654                         goto out;
3655                 r = 0;
3656                 break;
3657         }
3658         case KVM_SET_PIT: {
3659                 r = -EFAULT;
3660                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3661                         goto out;
3662                 r = -ENXIO;
3663                 if (!kvm->arch.vpit)
3664                         goto out;
3665                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3666                 break;
3667         }
3668         case KVM_GET_PIT2: {
3669                 r = -ENXIO;
3670                 if (!kvm->arch.vpit)
3671                         goto out;
3672                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3673                 if (r)
3674                         goto out;
3675                 r = -EFAULT;
3676                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3677                         goto out;
3678                 r = 0;
3679                 break;
3680         }
3681         case KVM_SET_PIT2: {
3682                 r = -EFAULT;
3683                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3684                         goto out;
3685                 r = -ENXIO;
3686                 if (!kvm->arch.vpit)
3687                         goto out;
3688                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3689                 break;
3690         }
3691         case KVM_REINJECT_CONTROL: {
3692                 struct kvm_reinject_control control;
3693                 r =  -EFAULT;
3694                 if (copy_from_user(&control, argp, sizeof(control)))
3695                         goto out;
3696                 r = kvm_vm_ioctl_reinject(kvm, &control);
3697                 break;
3698         }
3699         case KVM_XEN_HVM_CONFIG: {
3700                 r = -EFAULT;
3701                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3702                                    sizeof(struct kvm_xen_hvm_config)))
3703                         goto out;
3704                 r = -EINVAL;
3705                 if (kvm->arch.xen_hvm_config.flags)
3706                         goto out;
3707                 r = 0;
3708                 break;
3709         }
3710         case KVM_SET_CLOCK: {
3711                 struct kvm_clock_data user_ns;
3712                 u64 now_ns;
3713                 s64 delta;
3714
3715                 r = -EFAULT;
3716                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3717                         goto out;
3718
3719                 r = -EINVAL;
3720                 if (user_ns.flags)
3721                         goto out;
3722
3723                 r = 0;
3724                 local_irq_disable();
3725                 now_ns = get_kernel_ns();
3726                 delta = user_ns.clock - now_ns;
3727                 local_irq_enable();
3728                 kvm->arch.kvmclock_offset = delta;
3729                 break;
3730         }
3731         case KVM_GET_CLOCK: {
3732                 struct kvm_clock_data user_ns;
3733                 u64 now_ns;
3734
3735                 local_irq_disable();
3736                 now_ns = get_kernel_ns();
3737                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3738                 local_irq_enable();
3739                 user_ns.flags = 0;
3740                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3741
3742                 r = -EFAULT;
3743                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3744                         goto out;
3745                 r = 0;
3746                 break;
3747         }
3748
3749         default:
3750                 ;
3751         }
3752 out:
3753         return r;
3754 }
3755
3756 static void kvm_init_msr_list(void)
3757 {
3758         u32 dummy[2];
3759         unsigned i, j;
3760
3761         /* skip the first msrs in the list. KVM-specific */
3762         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3763                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3764                         continue;
3765                 if (j < i)
3766                         msrs_to_save[j] = msrs_to_save[i];
3767                 j++;
3768         }
3769         num_msrs_to_save = j;
3770 }
3771
3772 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3773                            const void *v)
3774 {
3775         int handled = 0;
3776         int n;
3777
3778         do {
3779                 n = min(len, 8);
3780                 if (!(vcpu->arch.apic &&
3781                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3782                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3783                         break;
3784                 handled += n;
3785                 addr += n;
3786                 len -= n;
3787                 v += n;
3788         } while (len);
3789
3790         return handled;
3791 }
3792
3793 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3794 {
3795         int handled = 0;
3796         int n;
3797
3798         do {
3799                 n = min(len, 8);
3800                 if (!(vcpu->arch.apic &&
3801                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3802                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3803                         break;
3804                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3805                 handled += n;
3806                 addr += n;
3807                 len -= n;
3808                 v += n;
3809         } while (len);
3810
3811         return handled;
3812 }
3813
3814 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3815                         struct kvm_segment *var, int seg)
3816 {
3817         kvm_x86_ops->set_segment(vcpu, var, seg);
3818 }
3819
3820 void kvm_get_segment(struct kvm_vcpu *vcpu,
3821                      struct kvm_segment *var, int seg)
3822 {
3823         kvm_x86_ops->get_segment(vcpu, var, seg);
3824 }
3825
3826 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3827 {
3828         gpa_t t_gpa;
3829         struct x86_exception exception;
3830
3831         BUG_ON(!mmu_is_nested(vcpu));
3832
3833         /* NPT walks are always user-walks */
3834         access |= PFERR_USER_MASK;
3835         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3836
3837         return t_gpa;
3838 }
3839
3840 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3841                               struct x86_exception *exception)
3842 {
3843         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3844         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3845 }
3846
3847  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3848                                 struct x86_exception *exception)
3849 {
3850         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3851         access |= PFERR_FETCH_MASK;
3852         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3853 }
3854
3855 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3856                                struct x86_exception *exception)
3857 {
3858         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3859         access |= PFERR_WRITE_MASK;
3860         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3861 }
3862
3863 /* uses this to access any guest's mapped memory without checking CPL */
3864 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3865                                 struct x86_exception *exception)
3866 {
3867         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3868 }
3869
3870 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3871                                       struct kvm_vcpu *vcpu, u32 access,
3872                                       struct x86_exception *exception)
3873 {
3874         void *data = val;
3875         int r = X86EMUL_CONTINUE;
3876
3877         while (bytes) {
3878                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3879                                                             exception);
3880                 unsigned offset = addr & (PAGE_SIZE-1);
3881                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3882                 int ret;
3883
3884                 if (gpa == UNMAPPED_GVA)
3885                         return X86EMUL_PROPAGATE_FAULT;
3886                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3887                 if (ret < 0) {
3888                         r = X86EMUL_IO_NEEDED;
3889                         goto out;
3890                 }
3891
3892                 bytes -= toread;
3893                 data += toread;
3894                 addr += toread;
3895         }
3896 out:
3897         return r;
3898 }
3899
3900 /* used for instruction fetching */
3901 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3902                                 gva_t addr, void *val, unsigned int bytes,
3903                                 struct x86_exception *exception)
3904 {
3905         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3906         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3907
3908         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3909                                           access | PFERR_FETCH_MASK,
3910                                           exception);
3911 }
3912
3913 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3914                                gva_t addr, void *val, unsigned int bytes,
3915                                struct x86_exception *exception)
3916 {
3917         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3918         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3919
3920         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3921                                           exception);
3922 }
3923 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3924
3925 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3926                                       gva_t addr, void *val, unsigned int bytes,
3927                                       struct x86_exception *exception)
3928 {
3929         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3930         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3931 }
3932
3933 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3934                                        gva_t addr, void *val,
3935                                        unsigned int bytes,
3936                                        struct x86_exception *exception)
3937 {
3938         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3939         void *data = val;
3940         int r = X86EMUL_CONTINUE;
3941
3942         while (bytes) {
3943                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3944                                                              PFERR_WRITE_MASK,
3945                                                              exception);
3946                 unsigned offset = addr & (PAGE_SIZE-1);
3947                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3948                 int ret;
3949
3950                 if (gpa == UNMAPPED_GVA)
3951                         return X86EMUL_PROPAGATE_FAULT;
3952                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3953                 if (ret < 0) {
3954                         r = X86EMUL_IO_NEEDED;
3955                         goto out;
3956                 }
3957
3958                 bytes -= towrite;
3959                 data += towrite;
3960                 addr += towrite;
3961         }
3962 out:
3963         return r;
3964 }
3965 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3966
3967 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3968                                 gpa_t *gpa, struct x86_exception *exception,
3969                                 bool write)
3970 {
3971         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
3972                 | (write ? PFERR_WRITE_MASK : 0);
3973
3974         if (vcpu_match_mmio_gva(vcpu, gva)
3975             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
3976                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3977                                         (gva & (PAGE_SIZE - 1));
3978                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3979                 return 1;
3980         }
3981
3982         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3983
3984         if (*gpa == UNMAPPED_GVA)
3985                 return -1;
3986
3987         /* For APIC access vmexit */
3988         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3989                 return 1;
3990
3991         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3992                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3993                 return 1;
3994         }
3995
3996         return 0;
3997 }
3998
3999 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4000                         const void *val, int bytes)
4001 {
4002         int ret;
4003
4004         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4005         if (ret < 0)
4006                 return 0;
4007         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4008         return 1;
4009 }
4010
4011 struct read_write_emulator_ops {
4012         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4013                                   int bytes);
4014         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4015                                   void *val, int bytes);
4016         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4017                                int bytes, void *val);
4018         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4019                                     void *val, int bytes);
4020         bool write;
4021 };
4022
4023 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4024 {
4025         if (vcpu->mmio_read_completed) {
4026                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4027                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4028                 vcpu->mmio_read_completed = 0;
4029                 return 1;
4030         }
4031
4032         return 0;
4033 }
4034
4035 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4036                         void *val, int bytes)
4037 {
4038         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4039 }
4040
4041 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4042                          void *val, int bytes)
4043 {
4044         return emulator_write_phys(vcpu, gpa, val, bytes);
4045 }
4046
4047 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4048 {
4049         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4050         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4051 }
4052
4053 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4054                           void *val, int bytes)
4055 {
4056         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4057         return X86EMUL_IO_NEEDED;
4058 }
4059
4060 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4061                            void *val, int bytes)
4062 {
4063         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4064
4065         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4066         return X86EMUL_CONTINUE;
4067 }
4068
4069 static const struct read_write_emulator_ops read_emultor = {
4070         .read_write_prepare = read_prepare,
4071         .read_write_emulate = read_emulate,
4072         .read_write_mmio = vcpu_mmio_read,
4073         .read_write_exit_mmio = read_exit_mmio,
4074 };
4075
4076 static const struct read_write_emulator_ops write_emultor = {
4077         .read_write_emulate = write_emulate,
4078         .read_write_mmio = write_mmio,
4079         .read_write_exit_mmio = write_exit_mmio,
4080         .write = true,
4081 };
4082
4083 static int emulator_read_write_onepage(unsigned long addr, void *val,
4084                                        unsigned int bytes,
4085                                        struct x86_exception *exception,
4086                                        struct kvm_vcpu *vcpu,
4087                                        const struct read_write_emulator_ops *ops)
4088 {
4089         gpa_t gpa;
4090         int handled, ret;
4091         bool write = ops->write;
4092         struct kvm_mmio_fragment *frag;
4093
4094         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4095
4096         if (ret < 0)
4097                 return X86EMUL_PROPAGATE_FAULT;
4098
4099         /* For APIC access vmexit */
4100         if (ret)
4101                 goto mmio;
4102
4103         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4104                 return X86EMUL_CONTINUE;
4105
4106 mmio:
4107         /*
4108          * Is this MMIO handled locally?
4109          */
4110         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4111         if (handled == bytes)
4112                 return X86EMUL_CONTINUE;
4113
4114         gpa += handled;
4115         bytes -= handled;
4116         val += handled;
4117
4118         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4119         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4120         frag->gpa = gpa;
4121         frag->data = val;
4122         frag->len = bytes;
4123         return X86EMUL_CONTINUE;
4124 }
4125
4126 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4127                         void *val, unsigned int bytes,
4128                         struct x86_exception *exception,
4129                         const struct read_write_emulator_ops *ops)
4130 {
4131         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4132         gpa_t gpa;
4133         int rc;
4134
4135         if (ops->read_write_prepare &&
4136                   ops->read_write_prepare(vcpu, val, bytes))
4137                 return X86EMUL_CONTINUE;
4138
4139         vcpu->mmio_nr_fragments = 0;
4140
4141         /* Crossing a page boundary? */
4142         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4143                 int now;
4144
4145                 now = -addr & ~PAGE_MASK;
4146                 rc = emulator_read_write_onepage(addr, val, now, exception,
4147                                                  vcpu, ops);
4148
4149                 if (rc != X86EMUL_CONTINUE)
4150                         return rc;
4151                 addr += now;
4152                 val += now;
4153                 bytes -= now;
4154         }
4155
4156         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4157                                          vcpu, ops);
4158         if (rc != X86EMUL_CONTINUE)
4159                 return rc;
4160
4161         if (!vcpu->mmio_nr_fragments)
4162                 return rc;
4163
4164         gpa = vcpu->mmio_fragments[0].gpa;
4165
4166         vcpu->mmio_needed = 1;
4167         vcpu->mmio_cur_fragment = 0;
4168
4169         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4170         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4171         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4172         vcpu->run->mmio.phys_addr = gpa;
4173
4174         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4175 }
4176
4177 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4178                                   unsigned long addr,
4179                                   void *val,
4180                                   unsigned int bytes,
4181                                   struct x86_exception *exception)
4182 {
4183         return emulator_read_write(ctxt, addr, val, bytes,
4184                                    exception, &read_emultor);
4185 }
4186
4187 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4188                             unsigned long addr,
4189                             const void *val,
4190                             unsigned int bytes,
4191                             struct x86_exception *exception)
4192 {
4193         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4194                                    exception, &write_emultor);
4195 }
4196
4197 #define CMPXCHG_TYPE(t, ptr, old, new) \
4198         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4199
4200 #ifdef CONFIG_X86_64
4201 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4202 #else
4203 #  define CMPXCHG64(ptr, old, new) \
4204         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4205 #endif
4206
4207 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4208                                      unsigned long addr,
4209                                      const void *old,
4210                                      const void *new,
4211                                      unsigned int bytes,
4212                                      struct x86_exception *exception)
4213 {
4214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4215         gpa_t gpa;
4216         struct page *page;
4217         char *kaddr;
4218         bool exchanged;
4219
4220         /* guests cmpxchg8b have to be emulated atomically */
4221         if (bytes > 8 || (bytes & (bytes - 1)))
4222                 goto emul_write;
4223
4224         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4225
4226         if (gpa == UNMAPPED_GVA ||
4227             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4228                 goto emul_write;
4229
4230         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4231                 goto emul_write;
4232
4233         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4234         if (is_error_page(page))
4235                 goto emul_write;
4236
4237         kaddr = kmap_atomic(page);
4238         kaddr += offset_in_page(gpa);
4239         switch (bytes) {
4240         case 1:
4241                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4242                 break;
4243         case 2:
4244                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4245                 break;
4246         case 4:
4247                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4248                 break;
4249         case 8:
4250                 exchanged = CMPXCHG64(kaddr, old, new);
4251                 break;
4252         default:
4253                 BUG();
4254         }
4255         kunmap_atomic(kaddr);
4256         kvm_release_page_dirty(page);
4257
4258         if (!exchanged)
4259                 return X86EMUL_CMPXCHG_FAILED;
4260
4261         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4262
4263         return X86EMUL_CONTINUE;
4264
4265 emul_write:
4266         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4267
4268         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4269 }
4270
4271 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4272 {
4273         /* TODO: String I/O for in kernel device */
4274         int r;
4275
4276         if (vcpu->arch.pio.in)
4277                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4278                                     vcpu->arch.pio.size, pd);
4279         else
4280                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4281                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4282                                      pd);
4283         return r;
4284 }
4285
4286 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4287                                unsigned short port, void *val,
4288                                unsigned int count, bool in)
4289 {
4290         trace_kvm_pio(!in, port, size, count);
4291
4292         vcpu->arch.pio.port = port;
4293         vcpu->arch.pio.in = in;
4294         vcpu->arch.pio.count  = count;
4295         vcpu->arch.pio.size = size;
4296
4297         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4298                 vcpu->arch.pio.count = 0;
4299                 return 1;
4300         }
4301
4302         vcpu->run->exit_reason = KVM_EXIT_IO;
4303         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4304         vcpu->run->io.size = size;
4305         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4306         vcpu->run->io.count = count;
4307         vcpu->run->io.port = port;
4308
4309         return 0;
4310 }
4311
4312 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4313                                     int size, unsigned short port, void *val,
4314                                     unsigned int count)
4315 {
4316         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4317         int ret;
4318
4319         if (vcpu->arch.pio.count)
4320                 goto data_avail;
4321
4322         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4323         if (ret) {
4324 data_avail:
4325                 memcpy(val, vcpu->arch.pio_data, size * count);
4326                 vcpu->arch.pio.count = 0;
4327                 return 1;
4328         }
4329
4330         return 0;
4331 }
4332
4333 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4334                                      int size, unsigned short port,
4335                                      const void *val, unsigned int count)
4336 {
4337         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4338
4339         memcpy(vcpu->arch.pio_data, val, size * count);
4340         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4341 }
4342
4343 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4344 {
4345         return kvm_x86_ops->get_segment_base(vcpu, seg);
4346 }
4347
4348 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4349 {
4350         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4351 }
4352
4353 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4354 {
4355         if (!need_emulate_wbinvd(vcpu))
4356                 return X86EMUL_CONTINUE;
4357
4358         if (kvm_x86_ops->has_wbinvd_exit()) {
4359                 int cpu = get_cpu();
4360
4361                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4362                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4363                                 wbinvd_ipi, NULL, 1);
4364                 put_cpu();
4365                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4366         } else
4367                 wbinvd();
4368         return X86EMUL_CONTINUE;
4369 }
4370 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4371
4372 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4373 {
4374         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4375 }
4376
4377 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4378 {
4379         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4380 }
4381
4382 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4383 {
4384
4385         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4386 }
4387
4388 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4389 {
4390         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4391 }
4392
4393 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4394 {
4395         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4396         unsigned long value;
4397
4398         switch (cr) {
4399         case 0:
4400                 value = kvm_read_cr0(vcpu);
4401                 break;
4402         case 2:
4403                 value = vcpu->arch.cr2;
4404                 break;
4405         case 3:
4406                 value = kvm_read_cr3(vcpu);
4407                 break;
4408         case 4:
4409                 value = kvm_read_cr4(vcpu);
4410                 break;
4411         case 8:
4412                 value = kvm_get_cr8(vcpu);
4413                 break;
4414         default:
4415                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4416                 return 0;
4417         }
4418
4419         return value;
4420 }
4421
4422 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4423 {
4424         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4425         int res = 0;
4426
4427         switch (cr) {
4428         case 0:
4429                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4430                 break;
4431         case 2:
4432                 vcpu->arch.cr2 = val;
4433                 break;
4434         case 3:
4435                 res = kvm_set_cr3(vcpu, val);
4436                 break;
4437         case 4:
4438                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4439                 break;
4440         case 8:
4441                 res = kvm_set_cr8(vcpu, val);
4442                 break;
4443         default:
4444                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4445                 res = -1;
4446         }
4447
4448         return res;
4449 }
4450
4451 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4452 {
4453         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4454 }
4455
4456 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4457 {
4458         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4459 }
4460
4461 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4462 {
4463         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4464 }
4465
4466 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4467 {
4468         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4469 }
4470
4471 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4472 {
4473         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4474 }
4475
4476 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4477 {
4478         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4479 }
4480
4481 static unsigned long emulator_get_cached_segment_base(
4482         struct x86_emulate_ctxt *ctxt, int seg)
4483 {
4484         return get_segment_base(emul_to_vcpu(ctxt), seg);
4485 }
4486
4487 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4488                                  struct desc_struct *desc, u32 *base3,
4489                                  int seg)
4490 {
4491         struct kvm_segment var;
4492
4493         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4494         *selector = var.selector;
4495
4496         if (var.unusable) {
4497                 memset(desc, 0, sizeof(*desc));
4498                 return false;
4499         }
4500
4501         if (var.g)
4502                 var.limit >>= 12;
4503         set_desc_limit(desc, var.limit);
4504         set_desc_base(desc, (unsigned long)var.base);
4505 #ifdef CONFIG_X86_64
4506         if (base3)
4507                 *base3 = var.base >> 32;
4508 #endif
4509         desc->type = var.type;
4510         desc->s = var.s;
4511         desc->dpl = var.dpl;
4512         desc->p = var.present;
4513         desc->avl = var.avl;
4514         desc->l = var.l;
4515         desc->d = var.db;
4516         desc->g = var.g;
4517
4518         return true;
4519 }
4520
4521 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4522                                  struct desc_struct *desc, u32 base3,
4523                                  int seg)
4524 {
4525         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4526         struct kvm_segment var;
4527
4528         var.selector = selector;
4529         var.base = get_desc_base(desc);
4530 #ifdef CONFIG_X86_64
4531         var.base |= ((u64)base3) << 32;
4532 #endif
4533         var.limit = get_desc_limit(desc);
4534         if (desc->g)
4535                 var.limit = (var.limit << 12) | 0xfff;
4536         var.type = desc->type;
4537         var.present = desc->p;
4538         var.dpl = desc->dpl;
4539         var.db = desc->d;
4540         var.s = desc->s;
4541         var.l = desc->l;
4542         var.g = desc->g;
4543         var.avl = desc->avl;
4544         var.present = desc->p;
4545         var.unusable = !var.present;
4546         var.padding = 0;
4547
4548         kvm_set_segment(vcpu, &var, seg);
4549         return;
4550 }
4551
4552 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4553                             u32 msr_index, u64 *pdata)
4554 {
4555         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4556 }
4557
4558 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4559                             u32 msr_index, u64 data)
4560 {
4561         struct msr_data msr;
4562
4563         msr.data = data;
4564         msr.index = msr_index;
4565         msr.host_initiated = false;
4566         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4567 }
4568
4569 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4570                              u32 pmc, u64 *pdata)
4571 {
4572         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4573 }
4574
4575 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4576 {
4577         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4578 }
4579
4580 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4581 {
4582         preempt_disable();
4583         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4584         /*
4585          * CR0.TS may reference the host fpu state, not the guest fpu state,
4586          * so it may be clear at this point.
4587          */
4588         clts();
4589 }
4590
4591 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4592 {
4593         preempt_enable();
4594 }
4595
4596 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4597                               struct x86_instruction_info *info,
4598                               enum x86_intercept_stage stage)
4599 {
4600         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4601 }
4602
4603 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4604                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4605 {
4606         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4607 }
4608
4609 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4610 {
4611         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4612 }
4613
4614 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4615 {
4616         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4617 }
4618
4619 static const struct x86_emulate_ops emulate_ops = {
4620         .read_gpr            = emulator_read_gpr,
4621         .write_gpr           = emulator_write_gpr,
4622         .read_std            = kvm_read_guest_virt_system,
4623         .write_std           = kvm_write_guest_virt_system,
4624         .fetch               = kvm_fetch_guest_virt,
4625         .read_emulated       = emulator_read_emulated,
4626         .write_emulated      = emulator_write_emulated,
4627         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4628         .invlpg              = emulator_invlpg,
4629         .pio_in_emulated     = emulator_pio_in_emulated,
4630         .pio_out_emulated    = emulator_pio_out_emulated,
4631         .get_segment         = emulator_get_segment,
4632         .set_segment         = emulator_set_segment,
4633         .get_cached_segment_base = emulator_get_cached_segment_base,
4634         .get_gdt             = emulator_get_gdt,
4635         .get_idt             = emulator_get_idt,
4636         .set_gdt             = emulator_set_gdt,
4637         .set_idt             = emulator_set_idt,
4638         .get_cr              = emulator_get_cr,
4639         .set_cr              = emulator_set_cr,
4640         .set_rflags          = emulator_set_rflags,
4641         .cpl                 = emulator_get_cpl,
4642         .get_dr              = emulator_get_dr,
4643         .set_dr              = emulator_set_dr,
4644         .set_msr             = emulator_set_msr,
4645         .get_msr             = emulator_get_msr,
4646         .read_pmc            = emulator_read_pmc,
4647         .halt                = emulator_halt,
4648         .wbinvd              = emulator_wbinvd,
4649         .fix_hypercall       = emulator_fix_hypercall,
4650         .get_fpu             = emulator_get_fpu,
4651         .put_fpu             = emulator_put_fpu,
4652         .intercept           = emulator_intercept,
4653         .get_cpuid           = emulator_get_cpuid,
4654 };
4655
4656 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4657 {
4658         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4659         /*
4660          * an sti; sti; sequence only disable interrupts for the first
4661          * instruction. So, if the last instruction, be it emulated or
4662          * not, left the system with the INT_STI flag enabled, it
4663          * means that the last instruction is an sti. We should not
4664          * leave the flag on in this case. The same goes for mov ss
4665          */
4666         if (!(int_shadow & mask))
4667                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4668 }
4669
4670 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4671 {
4672         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4673         if (ctxt->exception.vector == PF_VECTOR)
4674                 kvm_propagate_fault(vcpu, &ctxt->exception);
4675         else if (ctxt->exception.error_code_valid)
4676                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4677                                       ctxt->exception.error_code);
4678         else
4679                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4680 }
4681
4682 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4683 {
4684         memset(&ctxt->twobyte, 0,
4685                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4686
4687         ctxt->fetch.start = 0;
4688         ctxt->fetch.end = 0;
4689         ctxt->io_read.pos = 0;
4690         ctxt->io_read.end = 0;
4691         ctxt->mem_read.pos = 0;
4692         ctxt->mem_read.end = 0;
4693 }
4694
4695 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4696 {
4697         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4698         int cs_db, cs_l;
4699
4700         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4701
4702         ctxt->eflags = kvm_get_rflags(vcpu);
4703         ctxt->eip = kvm_rip_read(vcpu);
4704         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4705                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4706                      cs_l                               ? X86EMUL_MODE_PROT64 :
4707                      cs_db                              ? X86EMUL_MODE_PROT32 :
4708                                                           X86EMUL_MODE_PROT16;
4709         ctxt->guest_mode = is_guest_mode(vcpu);
4710
4711         init_decode_cache(ctxt);
4712         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4713 }
4714
4715 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4716 {
4717         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4718         int ret;
4719
4720         init_emulate_ctxt(vcpu);
4721
4722         ctxt->op_bytes = 2;
4723         ctxt->ad_bytes = 2;
4724         ctxt->_eip = ctxt->eip + inc_eip;
4725         ret = emulate_int_real(ctxt, irq);
4726
4727         if (ret != X86EMUL_CONTINUE)
4728                 return EMULATE_FAIL;
4729
4730         ctxt->eip = ctxt->_eip;
4731         kvm_rip_write(vcpu, ctxt->eip);
4732         kvm_set_rflags(vcpu, ctxt->eflags);
4733
4734         if (irq == NMI_VECTOR)
4735                 vcpu->arch.nmi_pending = 0;
4736         else
4737                 vcpu->arch.interrupt.pending = false;
4738
4739         return EMULATE_DONE;
4740 }
4741 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4742
4743 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4744 {
4745         int r = EMULATE_DONE;
4746
4747         ++vcpu->stat.insn_emulation_fail;
4748         trace_kvm_emulate_insn_failed(vcpu);
4749         if (!is_guest_mode(vcpu)) {
4750                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4751                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4752                 vcpu->run->internal.ndata = 0;
4753                 r = EMULATE_FAIL;
4754         }
4755         kvm_queue_exception(vcpu, UD_VECTOR);
4756
4757         return r;
4758 }
4759
4760 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4761                                   bool write_fault_to_shadow_pgtable)
4762 {
4763         gpa_t gpa = cr2;
4764         pfn_t pfn;
4765
4766         if (!vcpu->arch.mmu.direct_map) {
4767                 /*
4768                  * Write permission should be allowed since only
4769                  * write access need to be emulated.
4770                  */
4771                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4772
4773                 /*
4774                  * If the mapping is invalid in guest, let cpu retry
4775                  * it to generate fault.
4776                  */
4777                 if (gpa == UNMAPPED_GVA)
4778                         return true;
4779         }
4780
4781         /*
4782          * Do not retry the unhandleable instruction if it faults on the
4783          * readonly host memory, otherwise it will goto a infinite loop:
4784          * retry instruction -> write #PF -> emulation fail -> retry
4785          * instruction -> ...
4786          */
4787         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4788
4789         /*
4790          * If the instruction failed on the error pfn, it can not be fixed,
4791          * report the error to userspace.
4792          */
4793         if (is_error_noslot_pfn(pfn))
4794                 return false;
4795
4796         kvm_release_pfn_clean(pfn);
4797
4798         /* The instructions are well-emulated on direct mmu. */
4799         if (vcpu->arch.mmu.direct_map) {
4800                 unsigned int indirect_shadow_pages;
4801
4802                 spin_lock(&vcpu->kvm->mmu_lock);
4803                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4804                 spin_unlock(&vcpu->kvm->mmu_lock);
4805
4806                 if (indirect_shadow_pages)
4807                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4808
4809                 return true;
4810         }
4811
4812         /*
4813          * if emulation was due to access to shadowed page table
4814          * and it failed try to unshadow page and re-enter the
4815          * guest to let CPU execute the instruction.
4816          */
4817         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4818
4819         /*
4820          * If the access faults on its page table, it can not
4821          * be fixed by unprotecting shadow page and it should
4822          * be reported to userspace.
4823          */
4824         return !write_fault_to_shadow_pgtable;
4825 }
4826
4827 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4828                               unsigned long cr2,  int emulation_type)
4829 {
4830         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4831         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4832
4833         last_retry_eip = vcpu->arch.last_retry_eip;
4834         last_retry_addr = vcpu->arch.last_retry_addr;
4835
4836         /*
4837          * If the emulation is caused by #PF and it is non-page_table
4838          * writing instruction, it means the VM-EXIT is caused by shadow
4839          * page protected, we can zap the shadow page and retry this
4840          * instruction directly.
4841          *
4842          * Note: if the guest uses a non-page-table modifying instruction
4843          * on the PDE that points to the instruction, then we will unmap
4844          * the instruction and go to an infinite loop. So, we cache the
4845          * last retried eip and the last fault address, if we meet the eip
4846          * and the address again, we can break out of the potential infinite
4847          * loop.
4848          */
4849         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4850
4851         if (!(emulation_type & EMULTYPE_RETRY))
4852                 return false;
4853
4854         if (x86_page_table_writing_insn(ctxt))
4855                 return false;
4856
4857         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4858                 return false;
4859
4860         vcpu->arch.last_retry_eip = ctxt->eip;
4861         vcpu->arch.last_retry_addr = cr2;
4862
4863         if (!vcpu->arch.mmu.direct_map)
4864                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4865
4866         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4867
4868         return true;
4869 }
4870
4871 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4872 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4873
4874 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4875                             unsigned long cr2,
4876                             int emulation_type,
4877                             void *insn,
4878                             int insn_len)
4879 {
4880         int r;
4881         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4882         bool writeback = true;
4883         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4884
4885         /*
4886          * Clear write_fault_to_shadow_pgtable here to ensure it is
4887          * never reused.
4888          */
4889         vcpu->arch.write_fault_to_shadow_pgtable = false;
4890         kvm_clear_exception_queue(vcpu);
4891
4892         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4893                 init_emulate_ctxt(vcpu);
4894                 ctxt->interruptibility = 0;
4895                 ctxt->have_exception = false;
4896                 ctxt->perm_ok = false;
4897
4898                 ctxt->only_vendor_specific_insn
4899                         = emulation_type & EMULTYPE_TRAP_UD;
4900
4901                 r = x86_decode_insn(ctxt, insn, insn_len);
4902
4903                 trace_kvm_emulate_insn_start(vcpu);
4904                 ++vcpu->stat.insn_emulation;
4905                 if (r != EMULATION_OK)  {
4906                         if (emulation_type & EMULTYPE_TRAP_UD)
4907                                 return EMULATE_FAIL;
4908                         if (reexecute_instruction(vcpu, cr2,
4909                                                   write_fault_to_spt))
4910                                 return EMULATE_DONE;
4911                         if (emulation_type & EMULTYPE_SKIP)
4912                                 return EMULATE_FAIL;
4913                         return handle_emulation_failure(vcpu);
4914                 }
4915         }
4916
4917         if (emulation_type & EMULTYPE_SKIP) {
4918                 kvm_rip_write(vcpu, ctxt->_eip);
4919                 return EMULATE_DONE;
4920         }
4921
4922         if (retry_instruction(ctxt, cr2, emulation_type))
4923                 return EMULATE_DONE;
4924
4925         /* this is needed for vmware backdoor interface to work since it
4926            changes registers values  during IO operation */
4927         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4928                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4929                 emulator_invalidate_register_cache(ctxt);
4930         }
4931
4932 restart:
4933         r = x86_emulate_insn(ctxt);
4934
4935         if (r == EMULATION_INTERCEPTED)
4936                 return EMULATE_DONE;
4937
4938         if (r == EMULATION_FAILED) {
4939                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt))
4940                         return EMULATE_DONE;
4941
4942                 return handle_emulation_failure(vcpu);
4943         }
4944
4945         if (ctxt->have_exception) {
4946                 inject_emulated_exception(vcpu);
4947                 r = EMULATE_DONE;
4948         } else if (vcpu->arch.pio.count) {
4949                 if (!vcpu->arch.pio.in)
4950                         vcpu->arch.pio.count = 0;
4951                 else {
4952                         writeback = false;
4953                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
4954                 }
4955                 r = EMULATE_DO_MMIO;
4956         } else if (vcpu->mmio_needed) {
4957                 if (!vcpu->mmio_is_write)
4958                         writeback = false;
4959                 r = EMULATE_DO_MMIO;
4960                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
4961         } else if (r == EMULATION_RESTART)
4962                 goto restart;
4963         else
4964                 r = EMULATE_DONE;
4965
4966         if (writeback) {
4967                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4968                 kvm_set_rflags(vcpu, ctxt->eflags);
4969                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4970                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4971                 kvm_rip_write(vcpu, ctxt->eip);
4972         } else
4973                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4974
4975         return r;
4976 }
4977 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4978
4979 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4980 {
4981         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4982         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4983                                             size, port, &val, 1);
4984         /* do not return to emulator after return from userspace */
4985         vcpu->arch.pio.count = 0;
4986         return ret;
4987 }
4988 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4989
4990 static void tsc_bad(void *info)
4991 {
4992         __this_cpu_write(cpu_tsc_khz, 0);
4993 }
4994
4995 static void tsc_khz_changed(void *data)
4996 {
4997         struct cpufreq_freqs *freq = data;
4998         unsigned long khz = 0;
4999
5000         if (data)
5001                 khz = freq->new;
5002         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5003                 khz = cpufreq_quick_get(raw_smp_processor_id());
5004         if (!khz)
5005                 khz = tsc_khz;
5006         __this_cpu_write(cpu_tsc_khz, khz);
5007 }
5008
5009 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5010                                      void *data)
5011 {
5012         struct cpufreq_freqs *freq = data;
5013         struct kvm *kvm;
5014         struct kvm_vcpu *vcpu;
5015         int i, send_ipi = 0;
5016
5017         /*
5018          * We allow guests to temporarily run on slowing clocks,
5019          * provided we notify them after, or to run on accelerating
5020          * clocks, provided we notify them before.  Thus time never
5021          * goes backwards.
5022          *
5023          * However, we have a problem.  We can't atomically update
5024          * the frequency of a given CPU from this function; it is
5025          * merely a notifier, which can be called from any CPU.
5026          * Changing the TSC frequency at arbitrary points in time
5027          * requires a recomputation of local variables related to
5028          * the TSC for each VCPU.  We must flag these local variables
5029          * to be updated and be sure the update takes place with the
5030          * new frequency before any guests proceed.
5031          *
5032          * Unfortunately, the combination of hotplug CPU and frequency
5033          * change creates an intractable locking scenario; the order
5034          * of when these callouts happen is undefined with respect to
5035          * CPU hotplug, and they can race with each other.  As such,
5036          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5037          * undefined; you can actually have a CPU frequency change take
5038          * place in between the computation of X and the setting of the
5039          * variable.  To protect against this problem, all updates of
5040          * the per_cpu tsc_khz variable are done in an interrupt
5041          * protected IPI, and all callers wishing to update the value
5042          * must wait for a synchronous IPI to complete (which is trivial
5043          * if the caller is on the CPU already).  This establishes the
5044          * necessary total order on variable updates.
5045          *
5046          * Note that because a guest time update may take place
5047          * anytime after the setting of the VCPU's request bit, the
5048          * correct TSC value must be set before the request.  However,
5049          * to ensure the update actually makes it to any guest which
5050          * starts running in hardware virtualization between the set
5051          * and the acquisition of the spinlock, we must also ping the
5052          * CPU after setting the request bit.
5053          *
5054          */
5055
5056         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5057                 return 0;
5058         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5059                 return 0;
5060
5061         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5062
5063         raw_spin_lock(&kvm_lock);
5064         list_for_each_entry(kvm, &vm_list, vm_list) {
5065                 kvm_for_each_vcpu(i, vcpu, kvm) {
5066                         if (vcpu->cpu != freq->cpu)
5067                                 continue;
5068                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5069                         if (vcpu->cpu != smp_processor_id())
5070                                 send_ipi = 1;
5071                 }
5072         }
5073         raw_spin_unlock(&kvm_lock);
5074
5075         if (freq->old < freq->new && send_ipi) {
5076                 /*
5077                  * We upscale the frequency.  Must make the guest
5078                  * doesn't see old kvmclock values while running with
5079                  * the new frequency, otherwise we risk the guest sees
5080                  * time go backwards.
5081                  *
5082                  * In case we update the frequency for another cpu
5083                  * (which might be in guest context) send an interrupt
5084                  * to kick the cpu out of guest context.  Next time
5085                  * guest context is entered kvmclock will be updated,
5086                  * so the guest will not see stale values.
5087                  */
5088                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5089         }
5090         return 0;
5091 }
5092
5093 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5094         .notifier_call  = kvmclock_cpufreq_notifier
5095 };
5096
5097 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5098                                         unsigned long action, void *hcpu)
5099 {
5100         unsigned int cpu = (unsigned long)hcpu;
5101
5102         switch (action) {
5103                 case CPU_ONLINE:
5104                 case CPU_DOWN_FAILED:
5105                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5106                         break;
5107                 case CPU_DOWN_PREPARE:
5108                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5109                         break;
5110         }
5111         return NOTIFY_OK;
5112 }
5113
5114 static struct notifier_block kvmclock_cpu_notifier_block = {
5115         .notifier_call  = kvmclock_cpu_notifier,
5116         .priority = -INT_MAX
5117 };
5118
5119 static void kvm_timer_init(void)
5120 {
5121         int cpu;
5122
5123         max_tsc_khz = tsc_khz;
5124         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5125         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5126 #ifdef CONFIG_CPU_FREQ
5127                 struct cpufreq_policy policy;
5128                 memset(&policy, 0, sizeof(policy));
5129                 cpu = get_cpu();
5130                 cpufreq_get_policy(&policy, cpu);
5131                 if (policy.cpuinfo.max_freq)
5132                         max_tsc_khz = policy.cpuinfo.max_freq;
5133                 put_cpu();
5134 #endif
5135                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5136                                           CPUFREQ_TRANSITION_NOTIFIER);
5137         }
5138         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5139         for_each_online_cpu(cpu)
5140                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5141 }
5142
5143 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5144
5145 int kvm_is_in_guest(void)
5146 {
5147         return __this_cpu_read(current_vcpu) != NULL;
5148 }
5149
5150 static int kvm_is_user_mode(void)
5151 {
5152         int user_mode = 3;
5153
5154         if (__this_cpu_read(current_vcpu))
5155                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5156
5157         return user_mode != 0;
5158 }
5159
5160 static unsigned long kvm_get_guest_ip(void)
5161 {
5162         unsigned long ip = 0;
5163
5164         if (__this_cpu_read(current_vcpu))
5165                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5166
5167         return ip;
5168 }
5169
5170 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5171         .is_in_guest            = kvm_is_in_guest,
5172         .is_user_mode           = kvm_is_user_mode,
5173         .get_guest_ip           = kvm_get_guest_ip,
5174 };
5175
5176 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5177 {
5178         __this_cpu_write(current_vcpu, vcpu);
5179 }
5180 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5181
5182 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5183 {
5184         __this_cpu_write(current_vcpu, NULL);
5185 }
5186 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5187
5188 static void kvm_set_mmio_spte_mask(void)
5189 {
5190         u64 mask;
5191         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5192
5193         /*
5194          * Set the reserved bits and the present bit of an paging-structure
5195          * entry to generate page fault with PFER.RSV = 1.
5196          */
5197         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5198         mask |= 1ull;
5199
5200 #ifdef CONFIG_X86_64
5201         /*
5202          * If reserved bit is not supported, clear the present bit to disable
5203          * mmio page fault.
5204          */
5205         if (maxphyaddr == 52)
5206                 mask &= ~1ull;
5207 #endif
5208
5209         kvm_mmu_set_mmio_spte_mask(mask);
5210 }
5211
5212 #ifdef CONFIG_X86_64
5213 static void pvclock_gtod_update_fn(struct work_struct *work)
5214 {
5215         struct kvm *kvm;
5216
5217         struct kvm_vcpu *vcpu;
5218         int i;
5219
5220         raw_spin_lock(&kvm_lock);
5221         list_for_each_entry(kvm, &vm_list, vm_list)
5222                 kvm_for_each_vcpu(i, vcpu, kvm)
5223                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5224         atomic_set(&kvm_guest_has_master_clock, 0);
5225         raw_spin_unlock(&kvm_lock);
5226 }
5227
5228 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5229
5230 /*
5231  * Notification about pvclock gtod data update.
5232  */
5233 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5234                                void *priv)
5235 {
5236         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5237         struct timekeeper *tk = priv;
5238
5239         update_pvclock_gtod(tk);
5240
5241         /* disable master clock if host does not trust, or does not
5242          * use, TSC clocksource
5243          */
5244         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5245             atomic_read(&kvm_guest_has_master_clock) != 0)
5246                 queue_work(system_long_wq, &pvclock_gtod_work);
5247
5248         return 0;
5249 }
5250
5251 static struct notifier_block pvclock_gtod_notifier = {
5252         .notifier_call = pvclock_gtod_notify,
5253 };
5254 #endif
5255
5256 int kvm_arch_init(void *opaque)
5257 {
5258         int r;
5259         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5260
5261         if (kvm_x86_ops) {
5262                 printk(KERN_ERR "kvm: already loaded the other module\n");
5263                 r = -EEXIST;
5264                 goto out;
5265         }
5266
5267         if (!ops->cpu_has_kvm_support()) {
5268                 printk(KERN_ERR "kvm: no hardware support\n");
5269                 r = -EOPNOTSUPP;
5270                 goto out;
5271         }
5272         if (ops->disabled_by_bios()) {
5273                 printk(KERN_ERR "kvm: disabled by bios\n");
5274                 r = -EOPNOTSUPP;
5275                 goto out;
5276         }
5277
5278         r = -ENOMEM;
5279         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5280         if (!shared_msrs) {
5281                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5282                 goto out;
5283         }
5284
5285         r = kvm_mmu_module_init();
5286         if (r)
5287                 goto out_free_percpu;
5288
5289         kvm_set_mmio_spte_mask();
5290         kvm_init_msr_list();
5291
5292         kvm_x86_ops = ops;
5293         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5294                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5295
5296         kvm_timer_init();
5297
5298         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5299
5300         if (cpu_has_xsave)
5301                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5302
5303         kvm_lapic_init();
5304 #ifdef CONFIG_X86_64
5305         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5306 #endif
5307
5308         return 0;
5309
5310 out_free_percpu:
5311         free_percpu(shared_msrs);
5312 out:
5313         return r;
5314 }
5315
5316 void kvm_arch_exit(void)
5317 {
5318         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5319
5320         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5321                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5322                                             CPUFREQ_TRANSITION_NOTIFIER);
5323         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5324 #ifdef CONFIG_X86_64
5325         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5326 #endif
5327         kvm_x86_ops = NULL;
5328         kvm_mmu_module_exit();
5329         free_percpu(shared_msrs);
5330 }
5331
5332 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5333 {
5334         ++vcpu->stat.halt_exits;
5335         if (irqchip_in_kernel(vcpu->kvm)) {
5336                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5337                 return 1;
5338         } else {
5339                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5340                 return 0;
5341         }
5342 }
5343 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5344
5345 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5346 {
5347         u64 param, ingpa, outgpa, ret;
5348         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5349         bool fast, longmode;
5350         int cs_db, cs_l;
5351
5352         /*
5353          * hypercall generates UD from non zero cpl and real mode
5354          * per HYPER-V spec
5355          */
5356         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5357                 kvm_queue_exception(vcpu, UD_VECTOR);
5358                 return 0;
5359         }
5360
5361         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5362         longmode = is_long_mode(vcpu) && cs_l == 1;
5363
5364         if (!longmode) {
5365                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5366                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5367                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5368                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5369                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5370                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5371         }
5372 #ifdef CONFIG_X86_64
5373         else {
5374                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5375                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5376                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5377         }
5378 #endif
5379
5380         code = param & 0xffff;
5381         fast = (param >> 16) & 0x1;
5382         rep_cnt = (param >> 32) & 0xfff;
5383         rep_idx = (param >> 48) & 0xfff;
5384
5385         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5386
5387         switch (code) {
5388         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5389                 kvm_vcpu_on_spin(vcpu);
5390                 break;
5391         default:
5392                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5393                 break;
5394         }
5395
5396         ret = res | (((u64)rep_done & 0xfff) << 32);
5397         if (longmode) {
5398                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5399         } else {
5400                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5401                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5402         }
5403
5404         return 1;
5405 }
5406
5407 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5408 {
5409         unsigned long nr, a0, a1, a2, a3, ret;
5410         int r = 1;
5411
5412         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5413                 return kvm_hv_hypercall(vcpu);
5414
5415         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5416         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5417         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5418         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5419         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5420
5421         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5422
5423         if (!is_long_mode(vcpu)) {
5424                 nr &= 0xFFFFFFFF;
5425                 a0 &= 0xFFFFFFFF;
5426                 a1 &= 0xFFFFFFFF;
5427                 a2 &= 0xFFFFFFFF;
5428                 a3 &= 0xFFFFFFFF;
5429         }
5430
5431         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5432                 ret = -KVM_EPERM;
5433                 goto out;
5434         }
5435
5436         switch (nr) {
5437         case KVM_HC_VAPIC_POLL_IRQ:
5438                 ret = 0;
5439                 break;
5440         default:
5441                 ret = -KVM_ENOSYS;
5442                 break;
5443         }
5444 out:
5445         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5446         ++vcpu->stat.hypercalls;
5447         return r;
5448 }
5449 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5450
5451 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5452 {
5453         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5454         char instruction[3];
5455         unsigned long rip = kvm_rip_read(vcpu);
5456
5457         /*
5458          * Blow out the MMU to ensure that no other VCPU has an active mapping
5459          * to ensure that the updated hypercall appears atomically across all
5460          * VCPUs.
5461          */
5462         kvm_mmu_zap_all(vcpu->kvm);
5463
5464         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5465
5466         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5467 }
5468
5469 /*
5470  * Check if userspace requested an interrupt window, and that the
5471  * interrupt window is open.
5472  *
5473  * No need to exit to userspace if we already have an interrupt queued.
5474  */
5475 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5476 {
5477         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5478                 vcpu->run->request_interrupt_window &&
5479                 kvm_arch_interrupt_allowed(vcpu));
5480 }
5481
5482 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5483 {
5484         struct kvm_run *kvm_run = vcpu->run;
5485
5486         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5487         kvm_run->cr8 = kvm_get_cr8(vcpu);
5488         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5489         if (irqchip_in_kernel(vcpu->kvm))
5490                 kvm_run->ready_for_interrupt_injection = 1;
5491         else
5492                 kvm_run->ready_for_interrupt_injection =
5493                         kvm_arch_interrupt_allowed(vcpu) &&
5494                         !kvm_cpu_has_interrupt(vcpu) &&
5495                         !kvm_event_needs_reinjection(vcpu);
5496 }
5497
5498 static int vapic_enter(struct kvm_vcpu *vcpu)
5499 {
5500         struct kvm_lapic *apic = vcpu->arch.apic;
5501         struct page *page;
5502
5503         if (!apic || !apic->vapic_addr)
5504                 return 0;
5505
5506         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5507         if (is_error_page(page))
5508                 return -EFAULT;
5509
5510         vcpu->arch.apic->vapic_page = page;
5511         return 0;
5512 }
5513
5514 static void vapic_exit(struct kvm_vcpu *vcpu)
5515 {
5516         struct kvm_lapic *apic = vcpu->arch.apic;
5517         int idx;
5518
5519         if (!apic || !apic->vapic_addr)
5520                 return;
5521
5522         idx = srcu_read_lock(&vcpu->kvm->srcu);
5523         kvm_release_page_dirty(apic->vapic_page);
5524         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5525         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5526 }
5527
5528 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5529 {
5530         int max_irr, tpr;
5531
5532         if (!kvm_x86_ops->update_cr8_intercept)
5533                 return;
5534
5535         if (!vcpu->arch.apic)
5536                 return;
5537
5538         if (!vcpu->arch.apic->vapic_addr)
5539                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5540         else
5541                 max_irr = -1;
5542
5543         if (max_irr != -1)
5544                 max_irr >>= 4;
5545
5546         tpr = kvm_lapic_get_cr8(vcpu);
5547
5548         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5549 }
5550
5551 static void inject_pending_event(struct kvm_vcpu *vcpu)
5552 {
5553         /* try to reinject previous events if any */
5554         if (vcpu->arch.exception.pending) {
5555                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5556                                         vcpu->arch.exception.has_error_code,
5557                                         vcpu->arch.exception.error_code);
5558                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5559                                           vcpu->arch.exception.has_error_code,
5560                                           vcpu->arch.exception.error_code,
5561                                           vcpu->arch.exception.reinject);
5562                 return;
5563         }
5564
5565         if (vcpu->arch.nmi_injected) {
5566                 kvm_x86_ops->set_nmi(vcpu);
5567                 return;
5568         }
5569
5570         if (vcpu->arch.interrupt.pending) {
5571                 kvm_x86_ops->set_irq(vcpu);
5572                 return;
5573         }
5574
5575         /* try to inject new event if pending */
5576         if (vcpu->arch.nmi_pending) {
5577                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5578                         --vcpu->arch.nmi_pending;
5579                         vcpu->arch.nmi_injected = true;
5580                         kvm_x86_ops->set_nmi(vcpu);
5581                 }
5582         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5583                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5584                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5585                                             false);
5586                         kvm_x86_ops->set_irq(vcpu);
5587                 }
5588         }
5589 }
5590
5591 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5592 {
5593         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5594                         !vcpu->guest_xcr0_loaded) {
5595                 /* kvm_set_xcr() also depends on this */
5596                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5597                 vcpu->guest_xcr0_loaded = 1;
5598         }
5599 }
5600
5601 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5602 {
5603         if (vcpu->guest_xcr0_loaded) {
5604                 if (vcpu->arch.xcr0 != host_xcr0)
5605                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5606                 vcpu->guest_xcr0_loaded = 0;
5607         }
5608 }
5609
5610 static void process_nmi(struct kvm_vcpu *vcpu)
5611 {
5612         unsigned limit = 2;
5613
5614         /*
5615          * x86 is limited to one NMI running, and one NMI pending after it.
5616          * If an NMI is already in progress, limit further NMIs to just one.
5617          * Otherwise, allow two (and we'll inject the first one immediately).
5618          */
5619         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5620                 limit = 1;
5621
5622         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5623         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5624         kvm_make_request(KVM_REQ_EVENT, vcpu);
5625 }
5626
5627 static void kvm_gen_update_masterclock(struct kvm *kvm)
5628 {
5629 #ifdef CONFIG_X86_64
5630         int i;
5631         struct kvm_vcpu *vcpu;
5632         struct kvm_arch *ka = &kvm->arch;
5633
5634         spin_lock(&ka->pvclock_gtod_sync_lock);
5635         kvm_make_mclock_inprogress_request(kvm);
5636         /* no guest entries from this point */
5637         pvclock_update_vm_gtod_copy(kvm);
5638
5639         kvm_for_each_vcpu(i, vcpu, kvm)
5640                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5641
5642         /* guest entries allowed */
5643         kvm_for_each_vcpu(i, vcpu, kvm)
5644                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5645
5646         spin_unlock(&ka->pvclock_gtod_sync_lock);
5647 #endif
5648 }
5649
5650 static void update_eoi_exitmap(struct kvm_vcpu *vcpu)
5651 {
5652         u64 eoi_exit_bitmap[4];
5653
5654         memset(eoi_exit_bitmap, 0, 32);
5655
5656         kvm_ioapic_calculate_eoi_exitmap(vcpu, eoi_exit_bitmap);
5657         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5658 }
5659
5660 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5661 {
5662         int r;
5663         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5664                 vcpu->run->request_interrupt_window;
5665         bool req_immediate_exit = 0;
5666
5667         if (vcpu->requests) {
5668                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5669                         kvm_mmu_unload(vcpu);
5670                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5671                         __kvm_migrate_timers(vcpu);
5672                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5673                         kvm_gen_update_masterclock(vcpu->kvm);
5674                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5675                         r = kvm_guest_time_update(vcpu);
5676                         if (unlikely(r))
5677                                 goto out;
5678                 }
5679                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5680                         kvm_mmu_sync_roots(vcpu);
5681                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5682                         kvm_x86_ops->tlb_flush(vcpu);
5683                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5684                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5685                         r = 0;
5686                         goto out;
5687                 }
5688                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5689                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5690                         r = 0;
5691                         goto out;
5692                 }
5693                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5694                         vcpu->fpu_active = 0;
5695                         kvm_x86_ops->fpu_deactivate(vcpu);
5696                 }
5697                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5698                         /* Page is swapped out. Do synthetic halt */
5699                         vcpu->arch.apf.halted = true;
5700                         r = 1;
5701                         goto out;
5702                 }
5703                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5704                         record_steal_time(vcpu);
5705                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5706                         process_nmi(vcpu);
5707                 req_immediate_exit =
5708                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5709                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5710                         kvm_handle_pmu_event(vcpu);
5711                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5712                         kvm_deliver_pmi(vcpu);
5713                 if (kvm_check_request(KVM_REQ_EOIBITMAP, vcpu))
5714                         update_eoi_exitmap(vcpu);
5715         }
5716
5717         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5718                 kvm_apic_accept_events(vcpu);
5719                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5720                         r = 1;
5721                         goto out;
5722                 }
5723
5724                 inject_pending_event(vcpu);
5725
5726                 /* enable NMI/IRQ window open exits if needed */
5727                 if (vcpu->arch.nmi_pending)
5728                         kvm_x86_ops->enable_nmi_window(vcpu);
5729                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5730                         kvm_x86_ops->enable_irq_window(vcpu);
5731
5732                 if (kvm_lapic_enabled(vcpu)) {
5733                         /*
5734                          * Update architecture specific hints for APIC
5735                          * virtual interrupt delivery.
5736                          */
5737                         if (kvm_x86_ops->hwapic_irr_update)
5738                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5739                                         kvm_lapic_find_highest_irr(vcpu));
5740                         update_cr8_intercept(vcpu);
5741                         kvm_lapic_sync_to_vapic(vcpu);
5742                 }
5743         }
5744
5745         r = kvm_mmu_reload(vcpu);
5746         if (unlikely(r)) {
5747                 goto cancel_injection;
5748         }
5749
5750         preempt_disable();
5751
5752         kvm_x86_ops->prepare_guest_switch(vcpu);
5753         if (vcpu->fpu_active)
5754                 kvm_load_guest_fpu(vcpu);
5755         kvm_load_guest_xcr0(vcpu);
5756
5757         vcpu->mode = IN_GUEST_MODE;
5758
5759         /* We should set ->mode before check ->requests,
5760          * see the comment in make_all_cpus_request.
5761          */
5762         smp_mb();
5763
5764         local_irq_disable();
5765
5766         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5767             || need_resched() || signal_pending(current)) {
5768                 vcpu->mode = OUTSIDE_GUEST_MODE;
5769                 smp_wmb();
5770                 local_irq_enable();
5771                 preempt_enable();
5772                 r = 1;
5773                 goto cancel_injection;
5774         }
5775
5776         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5777
5778         if (req_immediate_exit)
5779                 smp_send_reschedule(vcpu->cpu);
5780
5781         kvm_guest_enter();
5782
5783         if (unlikely(vcpu->arch.switch_db_regs)) {
5784                 set_debugreg(0, 7);
5785                 set_debugreg(vcpu->arch.eff_db[0], 0);
5786                 set_debugreg(vcpu->arch.eff_db[1], 1);
5787                 set_debugreg(vcpu->arch.eff_db[2], 2);
5788                 set_debugreg(vcpu->arch.eff_db[3], 3);
5789         }
5790
5791         trace_kvm_entry(vcpu->vcpu_id);
5792         kvm_x86_ops->run(vcpu);
5793
5794         /*
5795          * If the guest has used debug registers, at least dr7
5796          * will be disabled while returning to the host.
5797          * If we don't have active breakpoints in the host, we don't
5798          * care about the messed up debug address registers. But if
5799          * we have some of them active, restore the old state.
5800          */
5801         if (hw_breakpoint_active())
5802                 hw_breakpoint_restore();
5803
5804         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5805                                                            native_read_tsc());
5806
5807         vcpu->mode = OUTSIDE_GUEST_MODE;
5808         smp_wmb();
5809         local_irq_enable();
5810
5811         ++vcpu->stat.exits;
5812
5813         /*
5814          * We must have an instruction between local_irq_enable() and
5815          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5816          * the interrupt shadow.  The stat.exits increment will do nicely.
5817          * But we need to prevent reordering, hence this barrier():
5818          */
5819         barrier();
5820
5821         kvm_guest_exit();
5822
5823         preempt_enable();
5824
5825         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5826
5827         /*
5828          * Profile KVM exit RIPs:
5829          */
5830         if (unlikely(prof_on == KVM_PROFILING)) {
5831                 unsigned long rip = kvm_rip_read(vcpu);
5832                 profile_hit(KVM_PROFILING, (void *)rip);
5833         }
5834
5835         if (unlikely(vcpu->arch.tsc_always_catchup))
5836                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5837
5838         if (vcpu->arch.apic_attention)
5839                 kvm_lapic_sync_from_vapic(vcpu);
5840
5841         r = kvm_x86_ops->handle_exit(vcpu);
5842         return r;
5843
5844 cancel_injection:
5845         kvm_x86_ops->cancel_injection(vcpu);
5846         if (unlikely(vcpu->arch.apic_attention))
5847                 kvm_lapic_sync_from_vapic(vcpu);
5848 out:
5849         return r;
5850 }
5851
5852
5853 static int __vcpu_run(struct kvm_vcpu *vcpu)
5854 {
5855         int r;
5856         struct kvm *kvm = vcpu->kvm;
5857
5858         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5859         r = vapic_enter(vcpu);
5860         if (r) {
5861                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5862                 return r;
5863         }
5864
5865         r = 1;
5866         while (r > 0) {
5867                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5868                     !vcpu->arch.apf.halted)
5869                         r = vcpu_enter_guest(vcpu);
5870                 else {
5871                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5872                         kvm_vcpu_block(vcpu);
5873                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5874                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5875                                 kvm_apic_accept_events(vcpu);
5876                                 switch(vcpu->arch.mp_state) {
5877                                 case KVM_MP_STATE_HALTED:
5878                                         vcpu->arch.mp_state =
5879                                                 KVM_MP_STATE_RUNNABLE;
5880                                 case KVM_MP_STATE_RUNNABLE:
5881                                         vcpu->arch.apf.halted = false;
5882                                         break;
5883                                 case KVM_MP_STATE_INIT_RECEIVED:
5884                                         break;
5885                                 default:
5886                                         r = -EINTR;
5887                                         break;
5888                                 }
5889                         }
5890                 }
5891
5892                 if (r <= 0)
5893                         break;
5894
5895                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5896                 if (kvm_cpu_has_pending_timer(vcpu))
5897                         kvm_inject_pending_timer_irqs(vcpu);
5898
5899                 if (dm_request_for_irq_injection(vcpu)) {
5900                         r = -EINTR;
5901                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5902                         ++vcpu->stat.request_irq_exits;
5903                 }
5904
5905                 kvm_check_async_pf_completion(vcpu);
5906
5907                 if (signal_pending(current)) {
5908                         r = -EINTR;
5909                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5910                         ++vcpu->stat.signal_exits;
5911                 }
5912                 if (need_resched()) {
5913                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5914                         kvm_resched(vcpu);
5915                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5916                 }
5917         }
5918
5919         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5920
5921         vapic_exit(vcpu);
5922
5923         return r;
5924 }
5925
5926 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5927 {
5928         int r;
5929         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5930         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5931         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5932         if (r != EMULATE_DONE)
5933                 return 0;
5934         return 1;
5935 }
5936
5937 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5938 {
5939         BUG_ON(!vcpu->arch.pio.count);
5940
5941         return complete_emulated_io(vcpu);
5942 }
5943
5944 /*
5945  * Implements the following, as a state machine:
5946  *
5947  * read:
5948  *   for each fragment
5949  *     for each mmio piece in the fragment
5950  *       write gpa, len
5951  *       exit
5952  *       copy data
5953  *   execute insn
5954  *
5955  * write:
5956  *   for each fragment
5957  *     for each mmio piece in the fragment
5958  *       write gpa, len
5959  *       copy data
5960  *       exit
5961  */
5962 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5963 {
5964         struct kvm_run *run = vcpu->run;
5965         struct kvm_mmio_fragment *frag;
5966         unsigned len;
5967
5968         BUG_ON(!vcpu->mmio_needed);
5969
5970         /* Complete previous fragment */
5971         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
5972         len = min(8u, frag->len);
5973         if (!vcpu->mmio_is_write)
5974                 memcpy(frag->data, run->mmio.data, len);
5975
5976         if (frag->len <= 8) {
5977                 /* Switch to the next fragment. */
5978                 frag++;
5979                 vcpu->mmio_cur_fragment++;
5980         } else {
5981                 /* Go forward to the next mmio piece. */
5982                 frag->data += len;
5983                 frag->gpa += len;
5984                 frag->len -= len;
5985         }
5986
5987         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5988                 vcpu->mmio_needed = 0;
5989                 if (vcpu->mmio_is_write)
5990                         return 1;
5991                 vcpu->mmio_read_completed = 1;
5992                 return complete_emulated_io(vcpu);
5993         }
5994
5995         run->exit_reason = KVM_EXIT_MMIO;
5996         run->mmio.phys_addr = frag->gpa;
5997         if (vcpu->mmio_is_write)
5998                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
5999         run->mmio.len = min(8u, frag->len);
6000         run->mmio.is_write = vcpu->mmio_is_write;
6001         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6002         return 0;
6003 }
6004
6005
6006 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6007 {
6008         int r;
6009         sigset_t sigsaved;
6010
6011         if (!tsk_used_math(current) && init_fpu(current))
6012                 return -ENOMEM;
6013
6014         if (vcpu->sigset_active)
6015                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6016
6017         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6018                 kvm_vcpu_block(vcpu);
6019                 kvm_apic_accept_events(vcpu);
6020                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6021                 r = -EAGAIN;
6022                 goto out;
6023         }
6024
6025         /* re-sync apic's tpr */
6026         if (!irqchip_in_kernel(vcpu->kvm)) {
6027                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6028                         r = -EINVAL;
6029                         goto out;
6030                 }
6031         }
6032
6033         if (unlikely(vcpu->arch.complete_userspace_io)) {
6034                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6035                 vcpu->arch.complete_userspace_io = NULL;
6036                 r = cui(vcpu);
6037                 if (r <= 0)
6038                         goto out;
6039         } else
6040                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6041
6042         r = __vcpu_run(vcpu);
6043
6044 out:
6045         post_kvm_run_save(vcpu);
6046         if (vcpu->sigset_active)
6047                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6048
6049         return r;
6050 }
6051
6052 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6053 {
6054         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6055                 /*
6056                  * We are here if userspace calls get_regs() in the middle of
6057                  * instruction emulation. Registers state needs to be copied
6058                  * back from emulation context to vcpu. Userspace shouldn't do
6059                  * that usually, but some bad designed PV devices (vmware
6060                  * backdoor interface) need this to work
6061                  */
6062                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6063                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6064         }
6065         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6066         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6067         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6068         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6069         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6070         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6071         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6072         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6073 #ifdef CONFIG_X86_64
6074         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6075         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6076         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6077         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6078         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6079         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6080         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6081         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6082 #endif
6083
6084         regs->rip = kvm_rip_read(vcpu);
6085         regs->rflags = kvm_get_rflags(vcpu);
6086
6087         return 0;
6088 }
6089
6090 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6091 {
6092         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6093         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6094
6095         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6096         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6097         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6098         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6099         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6100         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6101         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6102         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6103 #ifdef CONFIG_X86_64
6104         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6105         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6106         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6107         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6108         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6109         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6110         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6111         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6112 #endif
6113
6114         kvm_rip_write(vcpu, regs->rip);
6115         kvm_set_rflags(vcpu, regs->rflags);
6116
6117         vcpu->arch.exception.pending = false;
6118
6119         kvm_make_request(KVM_REQ_EVENT, vcpu);
6120
6121         return 0;
6122 }
6123
6124 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6125 {
6126         struct kvm_segment cs;
6127
6128         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6129         *db = cs.db;
6130         *l = cs.l;
6131 }
6132 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6133
6134 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6135                                   struct kvm_sregs *sregs)
6136 {
6137         struct desc_ptr dt;
6138
6139         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6140         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6141         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6142         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6143         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6144         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6145
6146         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6147         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6148
6149         kvm_x86_ops->get_idt(vcpu, &dt);
6150         sregs->idt.limit = dt.size;
6151         sregs->idt.base = dt.address;
6152         kvm_x86_ops->get_gdt(vcpu, &dt);
6153         sregs->gdt.limit = dt.size;
6154         sregs->gdt.base = dt.address;
6155
6156         sregs->cr0 = kvm_read_cr0(vcpu);
6157         sregs->cr2 = vcpu->arch.cr2;
6158         sregs->cr3 = kvm_read_cr3(vcpu);
6159         sregs->cr4 = kvm_read_cr4(vcpu);
6160         sregs->cr8 = kvm_get_cr8(vcpu);
6161         sregs->efer = vcpu->arch.efer;
6162         sregs->apic_base = kvm_get_apic_base(vcpu);
6163
6164         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6165
6166         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6167                 set_bit(vcpu->arch.interrupt.nr,
6168                         (unsigned long *)sregs->interrupt_bitmap);
6169
6170         return 0;
6171 }
6172
6173 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6174                                     struct kvm_mp_state *mp_state)
6175 {
6176         kvm_apic_accept_events(vcpu);
6177         mp_state->mp_state = vcpu->arch.mp_state;
6178         return 0;
6179 }
6180
6181 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6182                                     struct kvm_mp_state *mp_state)
6183 {
6184         if (!kvm_vcpu_has_lapic(vcpu) &&
6185             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6186                 return -EINVAL;
6187
6188         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6189                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6190                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6191         } else
6192                 vcpu->arch.mp_state = mp_state->mp_state;
6193         kvm_make_request(KVM_REQ_EVENT, vcpu);
6194         return 0;
6195 }
6196
6197 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6198                     int reason, bool has_error_code, u32 error_code)
6199 {
6200         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6201         int ret;
6202
6203         init_emulate_ctxt(vcpu);
6204
6205         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6206                                    has_error_code, error_code);
6207
6208         if (ret)
6209                 return EMULATE_FAIL;
6210
6211         kvm_rip_write(vcpu, ctxt->eip);
6212         kvm_set_rflags(vcpu, ctxt->eflags);
6213         kvm_make_request(KVM_REQ_EVENT, vcpu);
6214         return EMULATE_DONE;
6215 }
6216 EXPORT_SYMBOL_GPL(kvm_task_switch);
6217
6218 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6219                                   struct kvm_sregs *sregs)
6220 {
6221         int mmu_reset_needed = 0;
6222         int pending_vec, max_bits, idx;
6223         struct desc_ptr dt;
6224
6225         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6226                 return -EINVAL;
6227
6228         dt.size = sregs->idt.limit;
6229         dt.address = sregs->idt.base;
6230         kvm_x86_ops->set_idt(vcpu, &dt);
6231         dt.size = sregs->gdt.limit;
6232         dt.address = sregs->gdt.base;
6233         kvm_x86_ops->set_gdt(vcpu, &dt);
6234
6235         vcpu->arch.cr2 = sregs->cr2;
6236         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6237         vcpu->arch.cr3 = sregs->cr3;
6238         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6239
6240         kvm_set_cr8(vcpu, sregs->cr8);
6241
6242         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6243         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6244         kvm_set_apic_base(vcpu, sregs->apic_base);
6245
6246         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6247         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6248         vcpu->arch.cr0 = sregs->cr0;
6249
6250         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6251         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6252         if (sregs->cr4 & X86_CR4_OSXSAVE)
6253                 kvm_update_cpuid(vcpu);
6254
6255         idx = srcu_read_lock(&vcpu->kvm->srcu);
6256         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6257                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6258                 mmu_reset_needed = 1;
6259         }
6260         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6261
6262         if (mmu_reset_needed)
6263                 kvm_mmu_reset_context(vcpu);
6264
6265         max_bits = KVM_NR_INTERRUPTS;
6266         pending_vec = find_first_bit(
6267                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6268         if (pending_vec < max_bits) {
6269                 kvm_queue_interrupt(vcpu, pending_vec, false);
6270                 pr_debug("Set back pending irq %d\n", pending_vec);
6271         }
6272
6273         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6274         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6275         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6276         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6277         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6278         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6279
6280         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6281         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6282
6283         update_cr8_intercept(vcpu);
6284
6285         /* Older userspace won't unhalt the vcpu on reset. */
6286         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6287             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6288             !is_protmode(vcpu))
6289                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6290
6291         kvm_make_request(KVM_REQ_EVENT, vcpu);
6292
6293         return 0;
6294 }
6295
6296 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6297                                         struct kvm_guest_debug *dbg)
6298 {
6299         unsigned long rflags;
6300         int i, r;
6301
6302         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6303                 r = -EBUSY;
6304                 if (vcpu->arch.exception.pending)
6305                         goto out;
6306                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6307                         kvm_queue_exception(vcpu, DB_VECTOR);
6308                 else
6309                         kvm_queue_exception(vcpu, BP_VECTOR);
6310         }
6311
6312         /*
6313          * Read rflags as long as potentially injected trace flags are still
6314          * filtered out.
6315          */
6316         rflags = kvm_get_rflags(vcpu);
6317
6318         vcpu->guest_debug = dbg->control;
6319         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6320                 vcpu->guest_debug = 0;
6321
6322         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6323                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6324                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6325                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6326         } else {
6327                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6328                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6329         }
6330         kvm_update_dr7(vcpu);
6331
6332         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6333                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6334                         get_segment_base(vcpu, VCPU_SREG_CS);
6335
6336         /*
6337          * Trigger an rflags update that will inject or remove the trace
6338          * flags.
6339          */
6340         kvm_set_rflags(vcpu, rflags);
6341
6342         kvm_x86_ops->update_db_bp_intercept(vcpu);
6343
6344         r = 0;
6345
6346 out:
6347
6348         return r;
6349 }
6350
6351 /*
6352  * Translate a guest virtual address to a guest physical address.
6353  */
6354 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6355                                     struct kvm_translation *tr)
6356 {
6357         unsigned long vaddr = tr->linear_address;
6358         gpa_t gpa;
6359         int idx;
6360
6361         idx = srcu_read_lock(&vcpu->kvm->srcu);
6362         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6363         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6364         tr->physical_address = gpa;
6365         tr->valid = gpa != UNMAPPED_GVA;
6366         tr->writeable = 1;
6367         tr->usermode = 0;
6368
6369         return 0;
6370 }
6371
6372 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6373 {
6374         struct i387_fxsave_struct *fxsave =
6375                         &vcpu->arch.guest_fpu.state->fxsave;
6376
6377         memcpy(fpu->fpr, fxsave->st_space, 128);
6378         fpu->fcw = fxsave->cwd;
6379         fpu->fsw = fxsave->swd;
6380         fpu->ftwx = fxsave->twd;
6381         fpu->last_opcode = fxsave->fop;
6382         fpu->last_ip = fxsave->rip;
6383         fpu->last_dp = fxsave->rdp;
6384         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6385
6386         return 0;
6387 }
6388
6389 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6390 {
6391         struct i387_fxsave_struct *fxsave =
6392                         &vcpu->arch.guest_fpu.state->fxsave;
6393
6394         memcpy(fxsave->st_space, fpu->fpr, 128);
6395         fxsave->cwd = fpu->fcw;
6396         fxsave->swd = fpu->fsw;
6397         fxsave->twd = fpu->ftwx;
6398         fxsave->fop = fpu->last_opcode;
6399         fxsave->rip = fpu->last_ip;
6400         fxsave->rdp = fpu->last_dp;
6401         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6402
6403         return 0;
6404 }
6405
6406 int fx_init(struct kvm_vcpu *vcpu)
6407 {
6408         int err;
6409
6410         err = fpu_alloc(&vcpu->arch.guest_fpu);
6411         if (err)
6412                 return err;
6413
6414         fpu_finit(&vcpu->arch.guest_fpu);
6415
6416         /*
6417          * Ensure guest xcr0 is valid for loading
6418          */
6419         vcpu->arch.xcr0 = XSTATE_FP;
6420
6421         vcpu->arch.cr0 |= X86_CR0_ET;
6422
6423         return 0;
6424 }
6425 EXPORT_SYMBOL_GPL(fx_init);
6426
6427 static void fx_free(struct kvm_vcpu *vcpu)
6428 {
6429         fpu_free(&vcpu->arch.guest_fpu);
6430 }
6431
6432 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6433 {
6434         if (vcpu->guest_fpu_loaded)
6435                 return;
6436
6437         /*
6438          * Restore all possible states in the guest,
6439          * and assume host would use all available bits.
6440          * Guest xcr0 would be loaded later.
6441          */
6442         kvm_put_guest_xcr0(vcpu);
6443         vcpu->guest_fpu_loaded = 1;
6444         __kernel_fpu_begin();
6445         fpu_restore_checking(&vcpu->arch.guest_fpu);
6446         trace_kvm_fpu(1);
6447 }
6448
6449 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6450 {
6451         kvm_put_guest_xcr0(vcpu);
6452
6453         if (!vcpu->guest_fpu_loaded)
6454                 return;
6455
6456         vcpu->guest_fpu_loaded = 0;
6457         fpu_save_init(&vcpu->arch.guest_fpu);
6458         __kernel_fpu_end();
6459         ++vcpu->stat.fpu_reload;
6460         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6461         trace_kvm_fpu(0);
6462 }
6463
6464 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6465 {
6466         kvmclock_reset(vcpu);
6467
6468         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6469         fx_free(vcpu);
6470         kvm_x86_ops->vcpu_free(vcpu);
6471 }
6472
6473 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6474                                                 unsigned int id)
6475 {
6476         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6477                 printk_once(KERN_WARNING
6478                 "kvm: SMP vm created on host with unstable TSC; "
6479                 "guest TSC will not be reliable\n");
6480         return kvm_x86_ops->vcpu_create(kvm, id);
6481 }
6482
6483 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6484 {
6485         int r;
6486
6487         vcpu->arch.mtrr_state.have_fixed = 1;
6488         r = vcpu_load(vcpu);
6489         if (r)
6490                 return r;
6491         kvm_vcpu_reset(vcpu);
6492         r = kvm_mmu_setup(vcpu);
6493         vcpu_put(vcpu);
6494
6495         return r;
6496 }
6497
6498 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6499 {
6500         int r;
6501         struct msr_data msr;
6502
6503         r = vcpu_load(vcpu);
6504         if (r)
6505                 return r;
6506         msr.data = 0x0;
6507         msr.index = MSR_IA32_TSC;
6508         msr.host_initiated = true;
6509         kvm_write_tsc(vcpu, &msr);
6510         vcpu_put(vcpu);
6511
6512         return r;
6513 }
6514
6515 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6516 {
6517         int r;
6518         vcpu->arch.apf.msr_val = 0;
6519
6520         r = vcpu_load(vcpu);
6521         BUG_ON(r);
6522         kvm_mmu_unload(vcpu);
6523         vcpu_put(vcpu);
6524
6525         fx_free(vcpu);
6526         kvm_x86_ops->vcpu_free(vcpu);
6527 }
6528
6529 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6530 {
6531         atomic_set(&vcpu->arch.nmi_queued, 0);
6532         vcpu->arch.nmi_pending = 0;
6533         vcpu->arch.nmi_injected = false;
6534
6535         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6536         vcpu->arch.dr6 = DR6_FIXED_1;
6537         vcpu->arch.dr7 = DR7_FIXED_1;
6538         kvm_update_dr7(vcpu);
6539
6540         kvm_make_request(KVM_REQ_EVENT, vcpu);
6541         vcpu->arch.apf.msr_val = 0;
6542         vcpu->arch.st.msr_val = 0;
6543
6544         kvmclock_reset(vcpu);
6545
6546         kvm_clear_async_pf_completion_queue(vcpu);
6547         kvm_async_pf_hash_reset(vcpu);
6548         vcpu->arch.apf.halted = false;
6549
6550         kvm_pmu_reset(vcpu);
6551
6552         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6553         vcpu->arch.regs_avail = ~0;
6554         vcpu->arch.regs_dirty = ~0;
6555
6556         kvm_x86_ops->vcpu_reset(vcpu);
6557 }
6558
6559 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6560 {
6561         struct kvm_segment cs;
6562
6563         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6564         cs.selector = vector << 8;
6565         cs.base = vector << 12;
6566         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6567         kvm_rip_write(vcpu, 0);
6568 }
6569
6570 int kvm_arch_hardware_enable(void *garbage)
6571 {
6572         struct kvm *kvm;
6573         struct kvm_vcpu *vcpu;
6574         int i;
6575         int ret;
6576         u64 local_tsc;
6577         u64 max_tsc = 0;
6578         bool stable, backwards_tsc = false;
6579
6580         kvm_shared_msr_cpu_online();
6581         ret = kvm_x86_ops->hardware_enable(garbage);
6582         if (ret != 0)
6583                 return ret;
6584
6585         local_tsc = native_read_tsc();
6586         stable = !check_tsc_unstable();
6587         list_for_each_entry(kvm, &vm_list, vm_list) {
6588                 kvm_for_each_vcpu(i, vcpu, kvm) {
6589                         if (!stable && vcpu->cpu == smp_processor_id())
6590                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6591                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6592                                 backwards_tsc = true;
6593                                 if (vcpu->arch.last_host_tsc > max_tsc)
6594                                         max_tsc = vcpu->arch.last_host_tsc;
6595                         }
6596                 }
6597         }
6598
6599         /*
6600          * Sometimes, even reliable TSCs go backwards.  This happens on
6601          * platforms that reset TSC during suspend or hibernate actions, but
6602          * maintain synchronization.  We must compensate.  Fortunately, we can
6603          * detect that condition here, which happens early in CPU bringup,
6604          * before any KVM threads can be running.  Unfortunately, we can't
6605          * bring the TSCs fully up to date with real time, as we aren't yet far
6606          * enough into CPU bringup that we know how much real time has actually
6607          * elapsed; our helper function, get_kernel_ns() will be using boot
6608          * variables that haven't been updated yet.
6609          *
6610          * So we simply find the maximum observed TSC above, then record the
6611          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6612          * the adjustment will be applied.  Note that we accumulate
6613          * adjustments, in case multiple suspend cycles happen before some VCPU
6614          * gets a chance to run again.  In the event that no KVM threads get a
6615          * chance to run, we will miss the entire elapsed period, as we'll have
6616          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6617          * loose cycle time.  This isn't too big a deal, since the loss will be
6618          * uniform across all VCPUs (not to mention the scenario is extremely
6619          * unlikely). It is possible that a second hibernate recovery happens
6620          * much faster than a first, causing the observed TSC here to be
6621          * smaller; this would require additional padding adjustment, which is
6622          * why we set last_host_tsc to the local tsc observed here.
6623          *
6624          * N.B. - this code below runs only on platforms with reliable TSC,
6625          * as that is the only way backwards_tsc is set above.  Also note
6626          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6627          * have the same delta_cyc adjustment applied if backwards_tsc
6628          * is detected.  Note further, this adjustment is only done once,
6629          * as we reset last_host_tsc on all VCPUs to stop this from being
6630          * called multiple times (one for each physical CPU bringup).
6631          *
6632          * Platforms with unreliable TSCs don't have to deal with this, they
6633          * will be compensated by the logic in vcpu_load, which sets the TSC to
6634          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6635          * guarantee that they stay in perfect synchronization.
6636          */
6637         if (backwards_tsc) {
6638                 u64 delta_cyc = max_tsc - local_tsc;
6639                 list_for_each_entry(kvm, &vm_list, vm_list) {
6640                         kvm_for_each_vcpu(i, vcpu, kvm) {
6641                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6642                                 vcpu->arch.last_host_tsc = local_tsc;
6643                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6644                                         &vcpu->requests);
6645                         }
6646
6647                         /*
6648                          * We have to disable TSC offset matching.. if you were
6649                          * booting a VM while issuing an S4 host suspend....
6650                          * you may have some problem.  Solving this issue is
6651                          * left as an exercise to the reader.
6652                          */
6653                         kvm->arch.last_tsc_nsec = 0;
6654                         kvm->arch.last_tsc_write = 0;
6655                 }
6656
6657         }
6658         return 0;
6659 }
6660
6661 void kvm_arch_hardware_disable(void *garbage)
6662 {
6663         kvm_x86_ops->hardware_disable(garbage);
6664         drop_user_return_notifiers(garbage);
6665 }
6666
6667 int kvm_arch_hardware_setup(void)
6668 {
6669         return kvm_x86_ops->hardware_setup();
6670 }
6671
6672 void kvm_arch_hardware_unsetup(void)
6673 {
6674         kvm_x86_ops->hardware_unsetup();
6675 }
6676
6677 void kvm_arch_check_processor_compat(void *rtn)
6678 {
6679         kvm_x86_ops->check_processor_compatibility(rtn);
6680 }
6681
6682 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6683 {
6684         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6685 }
6686
6687 struct static_key kvm_no_apic_vcpu __read_mostly;
6688
6689 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6690 {
6691         struct page *page;
6692         struct kvm *kvm;
6693         int r;
6694
6695         BUG_ON(vcpu->kvm == NULL);
6696         kvm = vcpu->kvm;
6697
6698         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6699         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6700                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6701         else
6702                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6703
6704         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6705         if (!page) {
6706                 r = -ENOMEM;
6707                 goto fail;
6708         }
6709         vcpu->arch.pio_data = page_address(page);
6710
6711         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6712
6713         r = kvm_mmu_create(vcpu);
6714         if (r < 0)
6715                 goto fail_free_pio_data;
6716
6717         if (irqchip_in_kernel(kvm)) {
6718                 r = kvm_create_lapic(vcpu);
6719                 if (r < 0)
6720                         goto fail_mmu_destroy;
6721         } else
6722                 static_key_slow_inc(&kvm_no_apic_vcpu);
6723
6724         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6725                                        GFP_KERNEL);
6726         if (!vcpu->arch.mce_banks) {
6727                 r = -ENOMEM;
6728                 goto fail_free_lapic;
6729         }
6730         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6731
6732         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6733                 goto fail_free_mce_banks;
6734
6735         r = fx_init(vcpu);
6736         if (r)
6737                 goto fail_free_wbinvd_dirty_mask;
6738
6739         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6740         vcpu->arch.pv_time_enabled = false;
6741         kvm_async_pf_hash_reset(vcpu);
6742         kvm_pmu_init(vcpu);
6743
6744         return 0;
6745 fail_free_wbinvd_dirty_mask:
6746         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6747 fail_free_mce_banks:
6748         kfree(vcpu->arch.mce_banks);
6749 fail_free_lapic:
6750         kvm_free_lapic(vcpu);
6751 fail_mmu_destroy:
6752         kvm_mmu_destroy(vcpu);
6753 fail_free_pio_data:
6754         free_page((unsigned long)vcpu->arch.pio_data);
6755 fail:
6756         return r;
6757 }
6758
6759 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6760 {
6761         int idx;
6762
6763         kvm_pmu_destroy(vcpu);
6764         kfree(vcpu->arch.mce_banks);
6765         kvm_free_lapic(vcpu);
6766         idx = srcu_read_lock(&vcpu->kvm->srcu);
6767         kvm_mmu_destroy(vcpu);
6768         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6769         free_page((unsigned long)vcpu->arch.pio_data);
6770         if (!irqchip_in_kernel(vcpu->kvm))
6771                 static_key_slow_dec(&kvm_no_apic_vcpu);
6772 }
6773
6774 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6775 {
6776         if (type)
6777                 return -EINVAL;
6778
6779         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6780         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6781
6782         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6783         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6784         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6785         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6786                 &kvm->arch.irq_sources_bitmap);
6787
6788         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6789         mutex_init(&kvm->arch.apic_map_lock);
6790         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6791
6792         pvclock_update_vm_gtod_copy(kvm);
6793
6794         return 0;
6795 }
6796
6797 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6798 {
6799         int r;
6800         r = vcpu_load(vcpu);
6801         BUG_ON(r);
6802         kvm_mmu_unload(vcpu);
6803         vcpu_put(vcpu);
6804 }
6805
6806 static void kvm_free_vcpus(struct kvm *kvm)
6807 {
6808         unsigned int i;
6809         struct kvm_vcpu *vcpu;
6810
6811         /*
6812          * Unpin any mmu pages first.
6813          */
6814         kvm_for_each_vcpu(i, vcpu, kvm) {
6815                 kvm_clear_async_pf_completion_queue(vcpu);
6816                 kvm_unload_vcpu_mmu(vcpu);
6817         }
6818         kvm_for_each_vcpu(i, vcpu, kvm)
6819                 kvm_arch_vcpu_free(vcpu);
6820
6821         mutex_lock(&kvm->lock);
6822         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6823                 kvm->vcpus[i] = NULL;
6824
6825         atomic_set(&kvm->online_vcpus, 0);
6826         mutex_unlock(&kvm->lock);
6827 }
6828
6829 void kvm_arch_sync_events(struct kvm *kvm)
6830 {
6831         kvm_free_all_assigned_devices(kvm);
6832         kvm_free_pit(kvm);
6833 }
6834
6835 void kvm_arch_destroy_vm(struct kvm *kvm)
6836 {
6837         kvm_iommu_unmap_guest(kvm);
6838         kfree(kvm->arch.vpic);
6839         kfree(kvm->arch.vioapic);
6840         kvm_free_vcpus(kvm);
6841         if (kvm->arch.apic_access_page)
6842                 put_page(kvm->arch.apic_access_page);
6843         if (kvm->arch.ept_identity_pagetable)
6844                 put_page(kvm->arch.ept_identity_pagetable);
6845         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6846 }
6847
6848 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6849                            struct kvm_memory_slot *dont)
6850 {
6851         int i;
6852
6853         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6854                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6855                         kvm_kvfree(free->arch.rmap[i]);
6856                         free->arch.rmap[i] = NULL;
6857                 }
6858                 if (i == 0)
6859                         continue;
6860
6861                 if (!dont || free->arch.lpage_info[i - 1] !=
6862                              dont->arch.lpage_info[i - 1]) {
6863                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6864                         free->arch.lpage_info[i - 1] = NULL;
6865                 }
6866         }
6867 }
6868
6869 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6870 {
6871         int i;
6872
6873         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6874                 unsigned long ugfn;
6875                 int lpages;
6876                 int level = i + 1;
6877
6878                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6879                                       slot->base_gfn, level) + 1;
6880
6881                 slot->arch.rmap[i] =
6882                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6883                 if (!slot->arch.rmap[i])
6884                         goto out_free;
6885                 if (i == 0)
6886                         continue;
6887
6888                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6889                                         sizeof(*slot->arch.lpage_info[i - 1]));
6890                 if (!slot->arch.lpage_info[i - 1])
6891                         goto out_free;
6892
6893                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6894                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6895                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6896                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6897                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6898                 /*
6899                  * If the gfn and userspace address are not aligned wrt each
6900                  * other, or if explicitly asked to, disable large page
6901                  * support for this slot
6902                  */
6903                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6904                     !kvm_largepages_enabled()) {
6905                         unsigned long j;
6906
6907                         for (j = 0; j < lpages; ++j)
6908                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6909                 }
6910         }
6911
6912         return 0;
6913
6914 out_free:
6915         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6916                 kvm_kvfree(slot->arch.rmap[i]);
6917                 slot->arch.rmap[i] = NULL;
6918                 if (i == 0)
6919                         continue;
6920
6921                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6922                 slot->arch.lpage_info[i - 1] = NULL;
6923         }
6924         return -ENOMEM;
6925 }
6926
6927 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6928                                 struct kvm_memory_slot *memslot,
6929                                 struct kvm_userspace_memory_region *mem,
6930                                 enum kvm_mr_change change)
6931 {
6932         /*
6933          * Only private memory slots need to be mapped here since
6934          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6935          */
6936         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
6937                 unsigned long userspace_addr;
6938
6939                 /*
6940                  * MAP_SHARED to prevent internal slot pages from being moved
6941                  * by fork()/COW.
6942                  */
6943                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
6944                                          PROT_READ | PROT_WRITE,
6945                                          MAP_SHARED | MAP_ANONYMOUS, 0);
6946
6947                 if (IS_ERR((void *)userspace_addr))
6948                         return PTR_ERR((void *)userspace_addr);
6949
6950                 memslot->userspace_addr = userspace_addr;
6951         }
6952
6953         return 0;
6954 }
6955
6956 void kvm_arch_commit_memory_region(struct kvm *kvm,
6957                                 struct kvm_userspace_memory_region *mem,
6958                                 const struct kvm_memory_slot *old,
6959                                 enum kvm_mr_change change)
6960 {
6961
6962         int nr_mmu_pages = 0;
6963
6964         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
6965                 int ret;
6966
6967                 ret = vm_munmap(old->userspace_addr,
6968                                 old->npages * PAGE_SIZE);
6969                 if (ret < 0)
6970                         printk(KERN_WARNING
6971                                "kvm_vm_ioctl_set_memory_region: "
6972                                "failed to munmap memory\n");
6973         }
6974
6975         if (!kvm->arch.n_requested_mmu_pages)
6976                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6977
6978         if (nr_mmu_pages)
6979                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6980         /*
6981          * Write protect all pages for dirty logging.
6982          * Existing largepage mappings are destroyed here and new ones will
6983          * not be created until the end of the logging.
6984          */
6985         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
6986                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6987         /*
6988          * If memory slot is created, or moved, we need to clear all
6989          * mmio sptes.
6990          */
6991         if ((change == KVM_MR_CREATE) || (change == KVM_MR_MOVE)) {
6992                 kvm_mmu_zap_mmio_sptes(kvm);
6993                 kvm_reload_remote_mmus(kvm);
6994         }
6995 }
6996
6997 void kvm_arch_flush_shadow_all(struct kvm *kvm)
6998 {
6999         kvm_mmu_zap_all(kvm);
7000         kvm_reload_remote_mmus(kvm);
7001 }
7002
7003 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7004                                    struct kvm_memory_slot *slot)
7005 {
7006         kvm_arch_flush_shadow_all(kvm);
7007 }
7008
7009 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7010 {
7011         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7012                 !vcpu->arch.apf.halted)
7013                 || !list_empty_careful(&vcpu->async_pf.done)
7014                 || kvm_apic_has_events(vcpu)
7015                 || atomic_read(&vcpu->arch.nmi_queued) ||
7016                 (kvm_arch_interrupt_allowed(vcpu) &&
7017                  kvm_cpu_has_interrupt(vcpu));
7018 }
7019
7020 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7021 {
7022         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7023 }
7024
7025 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7026 {
7027         return kvm_x86_ops->interrupt_allowed(vcpu);
7028 }
7029
7030 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7031 {
7032         unsigned long current_rip = kvm_rip_read(vcpu) +
7033                 get_segment_base(vcpu, VCPU_SREG_CS);
7034
7035         return current_rip == linear_rip;
7036 }
7037 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7038
7039 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7040 {
7041         unsigned long rflags;
7042
7043         rflags = kvm_x86_ops->get_rflags(vcpu);
7044         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7045                 rflags &= ~X86_EFLAGS_TF;
7046         return rflags;
7047 }
7048 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7049
7050 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7051 {
7052         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7053             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7054                 rflags |= X86_EFLAGS_TF;
7055         kvm_x86_ops->set_rflags(vcpu, rflags);
7056         kvm_make_request(KVM_REQ_EVENT, vcpu);
7057 }
7058 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7059
7060 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7061 {
7062         int r;
7063
7064         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7065               is_error_page(work->page))
7066                 return;
7067
7068         r = kvm_mmu_reload(vcpu);
7069         if (unlikely(r))
7070                 return;
7071
7072         if (!vcpu->arch.mmu.direct_map &&
7073               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7074                 return;
7075
7076         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7077 }
7078
7079 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7080 {
7081         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7082 }
7083
7084 static inline u32 kvm_async_pf_next_probe(u32 key)
7085 {
7086         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7087 }
7088
7089 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7090 {
7091         u32 key = kvm_async_pf_hash_fn(gfn);
7092
7093         while (vcpu->arch.apf.gfns[key] != ~0)
7094                 key = kvm_async_pf_next_probe(key);
7095
7096         vcpu->arch.apf.gfns[key] = gfn;
7097 }
7098
7099 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7100 {
7101         int i;
7102         u32 key = kvm_async_pf_hash_fn(gfn);
7103
7104         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7105                      (vcpu->arch.apf.gfns[key] != gfn &&
7106                       vcpu->arch.apf.gfns[key] != ~0); i++)
7107                 key = kvm_async_pf_next_probe(key);
7108
7109         return key;
7110 }
7111
7112 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7113 {
7114         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7115 }
7116
7117 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7118 {
7119         u32 i, j, k;
7120
7121         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7122         while (true) {
7123                 vcpu->arch.apf.gfns[i] = ~0;
7124                 do {
7125                         j = kvm_async_pf_next_probe(j);
7126                         if (vcpu->arch.apf.gfns[j] == ~0)
7127                                 return;
7128                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7129                         /*
7130                          * k lies cyclically in ]i,j]
7131                          * |    i.k.j |
7132                          * |....j i.k.| or  |.k..j i...|
7133                          */
7134                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7135                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7136                 i = j;
7137         }
7138 }
7139
7140 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7141 {
7142
7143         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7144                                       sizeof(val));
7145 }
7146
7147 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7148                                      struct kvm_async_pf *work)
7149 {
7150         struct x86_exception fault;
7151
7152         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7153         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7154
7155         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7156             (vcpu->arch.apf.send_user_only &&
7157              kvm_x86_ops->get_cpl(vcpu) == 0))
7158                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7159         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7160                 fault.vector = PF_VECTOR;
7161                 fault.error_code_valid = true;
7162                 fault.error_code = 0;
7163                 fault.nested_page_fault = false;
7164                 fault.address = work->arch.token;
7165                 kvm_inject_page_fault(vcpu, &fault);
7166         }
7167 }
7168
7169 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7170                                  struct kvm_async_pf *work)
7171 {
7172         struct x86_exception fault;
7173
7174         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7175         if (is_error_page(work->page))
7176                 work->arch.token = ~0; /* broadcast wakeup */
7177         else
7178                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7179
7180         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7181             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7182                 fault.vector = PF_VECTOR;
7183                 fault.error_code_valid = true;
7184                 fault.error_code = 0;
7185                 fault.nested_page_fault = false;
7186                 fault.address = work->arch.token;
7187                 kvm_inject_page_fault(vcpu, &fault);
7188         }
7189         vcpu->arch.apf.halted = false;
7190         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7191 }
7192
7193 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7194 {
7195         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7196                 return true;
7197         else
7198                 return !kvm_event_needs_reinjection(vcpu) &&
7199                         kvm_x86_ops->interrupt_allowed(vcpu);
7200 }
7201
7202 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7203 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7204 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7205 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7206 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7207 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7208 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7209 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7210 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7211 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7213 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);