arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, pages_4k),
 237         STATS_DESC_ICOUNTER(VM, pages_2m),
 238         STATS_DESC_ICOUNTER(VM, pages_1g),
 239         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 240         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 241         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 242 };
 243
 244 const struct kvm_stats_header kvm_vm_stats_header = {
 245         .name_size = KVM_STATS_NAME_SIZE,
 246         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 247         .id_offset = sizeof(struct kvm_stats_header),
 248         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 249         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 250                        sizeof(kvm_vm_stats_desc),
 251 };
 252
 253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 254         KVM_GENERIC_VCPU_STATS(),
 255         STATS_DESC_COUNTER(VCPU, pf_fixed),
 256         STATS_DESC_COUNTER(VCPU, pf_guest),
 257         STATS_DESC_COUNTER(VCPU, tlb_flush),
 258         STATS_DESC_COUNTER(VCPU, invlpg),
 259         STATS_DESC_COUNTER(VCPU, exits),
 260         STATS_DESC_COUNTER(VCPU, io_exits),
 261         STATS_DESC_COUNTER(VCPU, mmio_exits),
 262         STATS_DESC_COUNTER(VCPU, signal_exits),
 263         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 264         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 265         STATS_DESC_COUNTER(VCPU, l1d_flush),
 266         STATS_DESC_COUNTER(VCPU, halt_exits),
 267         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 268         STATS_DESC_COUNTER(VCPU, irq_exits),
 269         STATS_DESC_COUNTER(VCPU, host_state_reload),
 270         STATS_DESC_COUNTER(VCPU, fpu_reload),
 271         STATS_DESC_COUNTER(VCPU, insn_emulation),
 272         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 273         STATS_DESC_COUNTER(VCPU, hypercalls),
 274         STATS_DESC_COUNTER(VCPU, irq_injections),
 275         STATS_DESC_COUNTER(VCPU, nmi_injections),
 276         STATS_DESC_COUNTER(VCPU, req_event),
 277         STATS_DESC_COUNTER(VCPU, nested_run),
 278         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 279         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 280         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 281 };
 282
 283 const struct kvm_stats_header kvm_vcpu_stats_header = {
 284         .name_size = KVM_STATS_NAME_SIZE,
 285         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 286         .id_offset = sizeof(struct kvm_stats_header),
 287         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 288         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 289                        sizeof(kvm_vcpu_stats_desc),
 290 };
 291
 292 u64 __read_mostly host_xcr0;
 293 u64 __read_mostly supported_xcr0;
 294 EXPORT_SYMBOL_GPL(supported_xcr0);
 295
 296 static struct kmem_cache *x86_fpu_cache;
 297
 298 static struct kmem_cache *x86_emulator_cache;
 299
 300 /*
 301  * When called, it means the previous get/set msr reached an invalid msr.
 302  * Return true if we want to ignore/silent this failed msr access.
 303  */
 304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 305 {
 306         const char *op = write ? "wrmsr" : "rdmsr";
 307
 308         if (ignore_msrs) {
 309                 if (report_ignored_msrs)
 310                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 311                                       op, msr, data);
 312                 /* Mask the error */
 313                 return true;
 314         } else {
 315                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 316                                       op, msr, data);
 317                 return false;
 318         }
 319 }
 320
 321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 322 {
 323         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 324         unsigned int size = sizeof(struct x86_emulate_ctxt);
 325
 326         return kmem_cache_create_usercopy("x86_emulator", size,
 327                                           __alignof__(struct x86_emulate_ctxt),
 328                                           SLAB_ACCOUNT, useroffset,
 329                                           size - useroffset, NULL);
 330 }
 331
 332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 333
 334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 335 {
 336         int i;
 337         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 338                 vcpu->arch.apf.gfns[i] = ~0;
 339 }
 340
 341 static void kvm_on_user_return(struct user_return_notifier *urn)
 342 {
 343         unsigned slot;
 344         struct kvm_user_return_msrs *msrs
 345                 = container_of(urn, struct kvm_user_return_msrs, urn);
 346         struct kvm_user_return_msr_values *values;
 347         unsigned long flags;
 348
 349         /*
 350          * Disabling irqs at this point since the following code could be
 351          * interrupted and executed through kvm_arch_hardware_disable()
 352          */
 353         local_irq_save(flags);
 354         if (msrs->registered) {
 355                 msrs->registered = false;
 356                 user_return_notifier_unregister(urn);
 357         }
 358         local_irq_restore(flags);
 359         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 360                 values = &msrs->values[slot];
 361                 if (values->host != values->curr) {
 362                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 363                         values->curr = values->host;
 364                 }
 365         }
 366 }
 367
 368 static int kvm_probe_user_return_msr(u32 msr)
 369 {
 370         u64 val;
 371         int ret;
 372
 373         preempt_disable();
 374         ret = rdmsrl_safe(msr, &val);
 375         if (ret)
 376                 goto out;
 377         ret = wrmsrl_safe(msr, val);
 378 out:
 379         preempt_enable();
 380         return ret;
 381 }
 382
 383 int kvm_add_user_return_msr(u32 msr)
 384 {
 385         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 386
 387         if (kvm_probe_user_return_msr(msr))
 388                 return -1;
 389
 390         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 391         return kvm_nr_uret_msrs++;
 392 }
 393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 394
 395 int kvm_find_user_return_msr(u32 msr)
 396 {
 397         int i;
 398
 399         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 400                 if (kvm_uret_msrs_list[i] == msr)
 401                         return i;
 402         }
 403         return -1;
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 406
 407 static void kvm_user_return_msr_cpu_online(void)
 408 {
 409         unsigned int cpu = smp_processor_id();
 410         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 411         u64 value;
 412         int i;
 413
 414         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 415                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 416                 msrs->values[i].host = value;
 417                 msrs->values[i].curr = value;
 418         }
 419 }
 420
 421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 422 {
 423         unsigned int cpu = smp_processor_id();
 424         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 425         int err;
 426
 427         value = (value & mask) | (msrs->values[slot].host & ~mask);
 428         if (value == msrs->values[slot].curr)
 429                 return 0;
 430         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 431         if (err)
 432                 return 1;
 433
 434         msrs->values[slot].curr = value;
 435         if (!msrs->registered) {
 436                 msrs->urn.on_user_return = kvm_on_user_return;
 437                 user_return_notifier_register(&msrs->urn);
 438                 msrs->registered = true;
 439         }
 440         return 0;
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 443
 444 static void drop_user_return_notifiers(void)
 445 {
 446         unsigned int cpu = smp_processor_id();
 447         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 448
 449         if (msrs->registered)
 450                 kvm_on_user_return(&msrs->urn);
 451 }
 452
 453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 454 {
 455         return vcpu->arch.apic_base;
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 458
 459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 460 {
 461         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 464
 465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 466 {
 467         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 468         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 469         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 470                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 471
 472         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 473                 return 1;
 474         if (!msr_info->host_initiated) {
 475                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 476                         return 1;
 477                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 478                         return 1;
 479         }
 480
 481         kvm_lapic_set_base(vcpu, msr_info->data);
 482         kvm_recalculate_apic_map(vcpu->kvm);
 483         return 0;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 486
 487 /*
 488  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 489  *
 490  * Hardware virtualization extension instructions may fault if a reboot turns
 491  * off virtualization while processes are running.  Usually after catching the
 492  * fault we just panic; during reboot instead the instruction is ignored.
 493  */
 494 noinstr void kvm_spurious_fault(void)
 495 {
 496         /* Fault while not rebooting.  We want the trace. */
 497         BUG_ON(!kvm_rebooting);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 500
 501 #define EXCPT_BENIGN            0
 502 #define EXCPT_CONTRIBUTORY      1
 503 #define EXCPT_PF                2
 504
 505 static int exception_class(int vector)
 506 {
 507         switch (vector) {
 508         case PF_VECTOR:
 509                 return EXCPT_PF;
 510         case DE_VECTOR:
 511         case TS_VECTOR:
 512         case NP_VECTOR:
 513         case SS_VECTOR:
 514         case GP_VECTOR:
 515                 return EXCPT_CONTRIBUTORY;
 516         default:
 517                 break;
 518         }
 519         return EXCPT_BENIGN;
 520 }
 521
 522 #define EXCPT_FAULT             0
 523 #define EXCPT_TRAP              1
 524 #define EXCPT_ABORT             2
 525 #define EXCPT_INTERRUPT         3
 526
 527 static int exception_type(int vector)
 528 {
 529         unsigned int mask;
 530
 531         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 532                 return EXCPT_INTERRUPT;
 533
 534         mask = 1 << vector;
 535
 536         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 537         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 538                 return EXCPT_TRAP;
 539
 540         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 541                 return EXCPT_ABORT;
 542
 543         /* Reserved exceptions will result in fault */
 544         return EXCPT_FAULT;
 545 }
 546
 547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 548 {
 549         unsigned nr = vcpu->arch.exception.nr;
 550         bool has_payload = vcpu->arch.exception.has_payload;
 551         unsigned long payload = vcpu->arch.exception.payload;
 552
 553         if (!has_payload)
 554                 return;
 555
 556         switch (nr) {
 557         case DB_VECTOR:
 558                 /*
 559                  * "Certain debug exceptions may clear bit 0-3.  The
 560                  * remaining contents of the DR6 register are never
 561                  * cleared by the processor".
 562                  */
 563                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 564                 /*
 565                  * In order to reflect the #DB exception payload in guest
 566                  * dr6, three components need to be considered: active low
 567                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 568                  * DR6_BS and DR6_BT)
 569                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 570                  * In the target guest dr6:
 571                  * FIXED_1 bits should always be set.
 572                  * Active low bits should be cleared if 1-setting in payload.
 573                  * Active high bits should be set if 1-setting in payload.
 574                  *
 575                  * Note, the payload is compatible with the pending debug
 576                  * exceptions/exit qualification under VMX, that active_low bits
 577                  * are active high in payload.
 578                  * So they need to be flipped for DR6.
 579                  */
 580                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 581                 vcpu->arch.dr6 |= payload;
 582                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 583
 584                 /*
 585                  * The #DB payload is defined as compatible with the 'pending
 586                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 587                  * defined in the 'pending debug exceptions' field (enabled
 588                  * breakpoint), it is reserved and must be zero in DR6.
 589                  */
 590                 vcpu->arch.dr6 &= ~BIT(12);
 591                 break;
 592         case PF_VECTOR:
 593                 vcpu->arch.cr2 = payload;
 594                 break;
 595         }
 596
 597         vcpu->arch.exception.has_payload = false;
 598         vcpu->arch.exception.payload = 0;
 599 }
 600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 601
 602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 603                 unsigned nr, bool has_error, u32 error_code,
 604                 bool has_payload, unsigned long payload, bool reinject)
 605 {
 606         u32 prev_nr;
 607         int class1, class2;
 608
 609         kvm_make_request(KVM_REQ_EVENT, vcpu);
 610
 611         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 612         queue:
 613                 if (reinject) {
 614                         /*
 615                          * On vmentry, vcpu->arch.exception.pending is only
 616                          * true if an event injection was blocked by
 617                          * nested_run_pending.  In that case, however,
 618                          * vcpu_enter_guest requests an immediate exit,
 619                          * and the guest shouldn't proceed far enough to
 620                          * need reinjection.
 621                          */
 622                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 623                         vcpu->arch.exception.injected = true;
 624                         if (WARN_ON_ONCE(has_payload)) {
 625                                 /*
 626                                  * A reinjected event has already
 627                                  * delivered its payload.
 628                                  */
 629                                 has_payload = false;
 630                                 payload = 0;
 631                         }
 632                 } else {
 633                         vcpu->arch.exception.pending = true;
 634                         vcpu->arch.exception.injected = false;
 635                 }
 636                 vcpu->arch.exception.has_error_code = has_error;
 637                 vcpu->arch.exception.nr = nr;
 638                 vcpu->arch.exception.error_code = error_code;
 639                 vcpu->arch.exception.has_payload = has_payload;
 640                 vcpu->arch.exception.payload = payload;
 641                 if (!is_guest_mode(vcpu))
 642                         kvm_deliver_exception_payload(vcpu);
 643                 return;
 644         }
 645
 646         /* to check exception */
 647         prev_nr = vcpu->arch.exception.nr;
 648         if (prev_nr == DF_VECTOR) {
 649                 /* triple fault -> shutdown */
 650                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 651                 return;
 652         }
 653         class1 = exception_class(prev_nr);
 654         class2 = exception_class(nr);
 655         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 656                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 657                 /*
 658                  * Generate double fault per SDM Table 5-5.  Set
 659                  * exception.pending = true so that the double fault
 660                  * can trigger a nested vmexit.
 661                  */
 662                 vcpu->arch.exception.pending = true;
 663                 vcpu->arch.exception.injected = false;
 664                 vcpu->arch.exception.has_error_code = true;
 665                 vcpu->arch.exception.nr = DF_VECTOR;
 666                 vcpu->arch.exception.error_code = 0;
 667                 vcpu->arch.exception.has_payload = false;
 668                 vcpu->arch.exception.payload = 0;
 669         } else
 670                 /* replace previous exception with a new one in a hope
 671                    that instruction re-execution will regenerate lost
 672                    exception */
 673                 goto queue;
 674 }
 675
 676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 677 {
 678         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 681
 682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 687
 688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 689                            unsigned long payload)
 690 {
 691         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 694
 695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 696                                     u32 error_code, unsigned long payload)
 697 {
 698         kvm_multiple_exception(vcpu, nr, true, error_code,
 699                                true, payload, false);
 700 }
 701
 702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 703 {
 704         if (err)
 705                 kvm_inject_gp(vcpu, 0);
 706         else
 707                 return kvm_skip_emulated_instruction(vcpu);
 708
 709         return 1;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 712
 713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 714 {
 715         ++vcpu->stat.pf_guest;
 716         vcpu->arch.exception.nested_apf =
 717                 is_guest_mode(vcpu) && fault->async_page_fault;
 718         if (vcpu->arch.exception.nested_apf) {
 719                 vcpu->arch.apf.nested_apf_token = fault->address;
 720                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 721         } else {
 722                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 723                                         fault->address);
 724         }
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 727
 728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 729                                     struct x86_exception *fault)
 730 {
 731         struct kvm_mmu *fault_mmu;
 732         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 733
 734         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 735                                                vcpu->arch.walk_mmu;
 736
 737         /*
 738          * Invalidate the TLB entry for the faulting address, if it exists,
 739          * else the access will fault indefinitely (and to emulate hardware).
 740          */
 741         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 742             !(fault->error_code & PFERR_RSVD_MASK))
 743                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 744                                        fault_mmu->root_hpa);
 745
 746         fault_mmu->inject_page_fault(vcpu, fault);
 747         return fault->nested_page_fault;
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 750
 751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 752 {
 753         atomic_inc(&vcpu->arch.nmi_queued);
 754         kvm_make_request(KVM_REQ_NMI, vcpu);
 755 }
 756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 757
 758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 759 {
 760         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 761 }
 762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 763
 764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 765 {
 766         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 769
 770 /*
 771  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 772  * a #GP and return false.
 773  */
 774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 775 {
 776         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 777                 return true;
 778         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 779         return false;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 782
 783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 784 {
 785         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                 return true;
 787
 788         kvm_queue_exception(vcpu, UD_VECTOR);
 789         return false;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_require_dr);
 792
 793 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 794 {
 795         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 796 }
 797
 798 /*
 799  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 800  */
 801 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 802 {
 803         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 804         gpa_t real_gpa;
 805         int i;
 806         int ret;
 807         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 808
 809         /*
 810          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 811          * to an L1 GPA.
 812          */
 813         real_gpa = mmu->translate_gpa(vcpu, gfn_to_gpa(pdpt_gfn),
 814                                       PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 815         if (real_gpa == UNMAPPED_GVA)
 816                 return 0;
 817
 818         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 819         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 820                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 821         if (ret < 0)
 822                 return 0;
 823
 824         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 825                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 826                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 827                         return 0;
 828                 }
 829         }
 830
 831         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 832         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 833         vcpu->arch.pdptrs_from_userspace = false;
 834
 835         return 1;
 836 }
 837 EXPORT_SYMBOL_GPL(load_pdptrs);
 838
 839 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 840 {
 841         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 842                 kvm_clear_async_pf_completion_queue(vcpu);
 843                 kvm_async_pf_hash_reset(vcpu);
 844         }
 845
 846         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 847                 kvm_mmu_reset_context(vcpu);
 848
 849         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 850             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 851             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 852                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 853 }
 854 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 855
 856 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 857 {
 858         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 859         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 860
 861         cr0 |= X86_CR0_ET;
 862
 863 #ifdef CONFIG_X86_64
 864         if (cr0 & 0xffffffff00000000UL)
 865                 return 1;
 866 #endif
 867
 868         cr0 &= ~CR0_RESERVED_BITS;
 869
 870         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 871                 return 1;
 872
 873         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 874                 return 1;
 875
 876 #ifdef CONFIG_X86_64
 877         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 878             (cr0 & X86_CR0_PG)) {
 879                 int cs_db, cs_l;
 880
 881                 if (!is_pae(vcpu))
 882                         return 1;
 883                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 884                 if (cs_l)
 885                         return 1;
 886         }
 887 #endif
 888         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 889             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 890             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 891                 return 1;
 892
 893         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 894                 return 1;
 895
 896         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 897
 898         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 899
 900         return 0;
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 903
 904 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 905 {
 906         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_lmsw);
 909
 910 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 911 {
 912         if (vcpu->arch.guest_state_protected)
 913                 return;
 914
 915         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 916
 917                 if (vcpu->arch.xcr0 != host_xcr0)
 918                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 919
 920                 if (vcpu->arch.xsaves_enabled &&
 921                     vcpu->arch.ia32_xss != host_xss)
 922                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 923         }
 924
 925         if (static_cpu_has(X86_FEATURE_PKU) &&
 926             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 927              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 928             vcpu->arch.pkru != vcpu->arch.host_pkru)
 929                 write_pkru(vcpu->arch.pkru);
 930 }
 931 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 932
 933 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 934 {
 935         if (vcpu->arch.guest_state_protected)
 936                 return;
 937
 938         if (static_cpu_has(X86_FEATURE_PKU) &&
 939             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 940              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 941                 vcpu->arch.pkru = rdpkru();
 942                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 943                         write_pkru(vcpu->arch.host_pkru);
 944         }
 945
 946         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 947
 948                 if (vcpu->arch.xcr0 != host_xcr0)
 949                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 950
 951                 if (vcpu->arch.xsaves_enabled &&
 952                     vcpu->arch.ia32_xss != host_xss)
 953                         wrmsrl(MSR_IA32_XSS, host_xss);
 954         }
 955
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 958
 959 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 960 {
 961         u64 xcr0 = xcr;
 962         u64 old_xcr0 = vcpu->arch.xcr0;
 963         u64 valid_bits;
 964
 965         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 966         if (index != XCR_XFEATURE_ENABLED_MASK)
 967                 return 1;
 968         if (!(xcr0 & XFEATURE_MASK_FP))
 969                 return 1;
 970         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 971                 return 1;
 972
 973         /*
 974          * Do not allow the guest to set bits that we do not support
 975          * saving.  However, xcr0 bit 0 is always set, even if the
 976          * emulated CPU does not support XSAVE (see fx_init).
 977          */
 978         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 979         if (xcr0 & ~valid_bits)
 980                 return 1;
 981
 982         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 983             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 984                 return 1;
 985
 986         if (xcr0 & XFEATURE_MASK_AVX512) {
 987                 if (!(xcr0 & XFEATURE_MASK_YMM))
 988                         return 1;
 989                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 990                         return 1;
 991         }
 992         vcpu->arch.xcr0 = xcr0;
 993
 994         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 995                 kvm_update_cpuid_runtime(vcpu);
 996         return 0;
 997 }
 998
 999 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1000 {
1001         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1002             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1003                 kvm_inject_gp(vcpu, 0);
1004                 return 1;
1005         }
1006
1007         return kvm_skip_emulated_instruction(vcpu);
1008 }
1009 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1010
1011 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1012 {
1013         if (cr4 & cr4_reserved_bits)
1014                 return false;
1015
1016         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1017                 return false;
1018
1019         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1022
1023 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1024 {
1025         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1026             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1027                 kvm_mmu_reset_context(vcpu);
1028 }
1029 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1030
1031 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1032 {
1033         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1034         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1035                                    X86_CR4_SMEP;
1036
1037         if (!kvm_is_valid_cr4(vcpu, cr4))
1038                 return 1;
1039
1040         if (is_long_mode(vcpu)) {
1041                 if (!(cr4 & X86_CR4_PAE))
1042                         return 1;
1043                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1044                         return 1;
1045         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1046                    && ((cr4 ^ old_cr4) & pdptr_bits)
1047                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1048                                    kvm_read_cr3(vcpu)))
1049                 return 1;
1050
1051         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1052                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1053                         return 1;
1054
1055                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1056                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1057                         return 1;
1058         }
1059
1060         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1061
1062         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1063
1064         return 0;
1065 }
1066 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1067
1068 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1069 {
1070         struct kvm_mmu *mmu = vcpu->arch.mmu;
1071         unsigned long roots_to_free = 0;
1072         int i;
1073
1074         /*
1075          * If neither the current CR3 nor any of the prev_roots use the given
1076          * PCID, then nothing needs to be done here because a resync will
1077          * happen anyway before switching to any other CR3.
1078          */
1079         if (kvm_get_active_pcid(vcpu) == pcid) {
1080                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1081                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1082         }
1083
1084         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1085                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1086                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1087
1088         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1089 }
1090
1091 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1092 {
1093         bool skip_tlb_flush = false;
1094         unsigned long pcid = 0;
1095 #ifdef CONFIG_X86_64
1096         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1097
1098         if (pcid_enabled) {
1099                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1100                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1101                 pcid = cr3 & X86_CR3_PCID_MASK;
1102         }
1103 #endif
1104
1105         /* PDPTRs are always reloaded for PAE paging. */
1106         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1107                 goto handle_tlb_flush;
1108
1109         /*
1110          * Do not condition the GPA check on long mode, this helper is used to
1111          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1112          * the current vCPU mode is accurate.
1113          */
1114         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1115                 return 1;
1116
1117         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1118                 return 1;
1119
1120         if (cr3 != kvm_read_cr3(vcpu))
1121                 kvm_mmu_new_pgd(vcpu, cr3);
1122
1123         vcpu->arch.cr3 = cr3;
1124         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1125
1126 handle_tlb_flush:
1127         /*
1128          * A load of CR3 that flushes the TLB flushes only the current PCID,
1129          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1130          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1131          * and it's impossible to use a non-zero PCID when PCID is disabled,
1132          * i.e. only PCID=0 can be relevant.
1133          */
1134         if (!skip_tlb_flush)
1135                 kvm_invalidate_pcid(vcpu, pcid);
1136
1137         return 0;
1138 }
1139 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1140
1141 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1142 {
1143         if (cr8 & CR8_RESERVED_BITS)
1144                 return 1;
1145         if (lapic_in_kernel(vcpu))
1146                 kvm_lapic_set_tpr(vcpu, cr8);
1147         else
1148                 vcpu->arch.cr8 = cr8;
1149         return 0;
1150 }
1151 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1152
1153 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1154 {
1155         if (lapic_in_kernel(vcpu))
1156                 return kvm_lapic_get_cr8(vcpu);
1157         else
1158                 return vcpu->arch.cr8;
1159 }
1160 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1161
1162 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1163 {
1164         int i;
1165
1166         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1167                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1168                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1169         }
1170 }
1171
1172 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1173 {
1174         unsigned long dr7;
1175
1176         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1177                 dr7 = vcpu->arch.guest_debug_dr7;
1178         else
1179                 dr7 = vcpu->arch.dr7;
1180         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1181         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1182         if (dr7 & DR7_BP_EN_MASK)
1183                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1184 }
1185 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1186
1187 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1188 {
1189         u64 fixed = DR6_FIXED_1;
1190
1191         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1192                 fixed |= DR6_RTM;
1193
1194         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1195                 fixed |= DR6_BUS_LOCK;
1196         return fixed;
1197 }
1198
1199 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1200 {
1201         size_t size = ARRAY_SIZE(vcpu->arch.db);
1202
1203         switch (dr) {
1204         case 0 ... 3:
1205                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1206                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1207                         vcpu->arch.eff_db[dr] = val;
1208                 break;
1209         case 4:
1210         case 6:
1211                 if (!kvm_dr6_valid(val))
1212                         return 1; /* #GP */
1213                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1214                 break;
1215         case 5:
1216         default: /* 7 */
1217                 if (!kvm_dr7_valid(val))
1218                         return 1; /* #GP */
1219                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1220                 kvm_update_dr7(vcpu);
1221                 break;
1222         }
1223
1224         return 0;
1225 }
1226 EXPORT_SYMBOL_GPL(kvm_set_dr);
1227
1228 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1229 {
1230         size_t size = ARRAY_SIZE(vcpu->arch.db);
1231
1232         switch (dr) {
1233         case 0 ... 3:
1234                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1235                 break;
1236         case 4:
1237         case 6:
1238                 *val = vcpu->arch.dr6;
1239                 break;
1240         case 5:
1241         default: /* 7 */
1242                 *val = vcpu->arch.dr7;
1243                 break;
1244         }
1245 }
1246 EXPORT_SYMBOL_GPL(kvm_get_dr);
1247
1248 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1249 {
1250         u32 ecx = kvm_rcx_read(vcpu);
1251         u64 data;
1252
1253         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1254                 kvm_inject_gp(vcpu, 0);
1255                 return 1;
1256         }
1257
1258         kvm_rax_write(vcpu, (u32)data);
1259         kvm_rdx_write(vcpu, data >> 32);
1260         return kvm_skip_emulated_instruction(vcpu);
1261 }
1262 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1263
1264 /*
1265  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1266  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1267  *
1268  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1269  * extract the supported MSRs from the related const lists.
1270  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1271  * capabilities of the host cpu. This capabilities test skips MSRs that are
1272  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1273  * may depend on host virtualization features rather than host cpu features.
1274  */
1275
1276 static const u32 msrs_to_save_all[] = {
1277         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1278         MSR_STAR,
1279 #ifdef CONFIG_X86_64
1280         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1281 #endif
1282         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1283         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1284         MSR_IA32_SPEC_CTRL,
1285         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1286         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1287         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1288         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1289         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1290         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1291         MSR_IA32_UMWAIT_CONTROL,
1292
1293         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1294         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1295         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1296         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1297         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1298         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1299         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1300         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1301         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1302         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1303         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1304         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1305         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1306         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1307         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1308         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1309         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1310         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1311         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1312         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1313         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1314         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1315
1316         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1317         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1318         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1319         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1320         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1321         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1322 };
1323
1324 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1325 static unsigned num_msrs_to_save;
1326
1327 static const u32 emulated_msrs_all[] = {
1328         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1329         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1330         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1331         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1332         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1333         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1334         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1335         HV_X64_MSR_RESET,
1336         HV_X64_MSR_VP_INDEX,
1337         HV_X64_MSR_VP_RUNTIME,
1338         HV_X64_MSR_SCONTROL,
1339         HV_X64_MSR_STIMER0_CONFIG,
1340         HV_X64_MSR_VP_ASSIST_PAGE,
1341         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1342         HV_X64_MSR_TSC_EMULATION_STATUS,
1343         HV_X64_MSR_SYNDBG_OPTIONS,
1344         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1345         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1346         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1347
1348         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1349         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1350
1351         MSR_IA32_TSC_ADJUST,
1352         MSR_IA32_TSC_DEADLINE,
1353         MSR_IA32_ARCH_CAPABILITIES,
1354         MSR_IA32_PERF_CAPABILITIES,
1355         MSR_IA32_MISC_ENABLE,
1356         MSR_IA32_MCG_STATUS,
1357         MSR_IA32_MCG_CTL,
1358         MSR_IA32_MCG_EXT_CTL,
1359         MSR_IA32_SMBASE,
1360         MSR_SMI_COUNT,
1361         MSR_PLATFORM_INFO,
1362         MSR_MISC_FEATURES_ENABLES,
1363         MSR_AMD64_VIRT_SPEC_CTRL,
1364         MSR_IA32_POWER_CTL,
1365         MSR_IA32_UCODE_REV,
1366
1367         /*
1368          * The following list leaves out MSRs whose values are determined
1369          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1370          * We always support the "true" VMX control MSRs, even if the host
1371          * processor does not, so I am putting these registers here rather
1372          * than in msrs_to_save_all.
1373          */
1374         MSR_IA32_VMX_BASIC,
1375         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1376         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1377         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1378         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1379         MSR_IA32_VMX_MISC,
1380         MSR_IA32_VMX_CR0_FIXED0,
1381         MSR_IA32_VMX_CR4_FIXED0,
1382         MSR_IA32_VMX_VMCS_ENUM,
1383         MSR_IA32_VMX_PROCBASED_CTLS2,
1384         MSR_IA32_VMX_EPT_VPID_CAP,
1385         MSR_IA32_VMX_VMFUNC,
1386
1387         MSR_K7_HWCR,
1388         MSR_KVM_POLL_CONTROL,
1389 };
1390
1391 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1392 static unsigned num_emulated_msrs;
1393
1394 /*
1395  * List of msr numbers which are used to expose MSR-based features that
1396  * can be used by a hypervisor to validate requested CPU features.
1397  */
1398 static const u32 msr_based_features_all[] = {
1399         MSR_IA32_VMX_BASIC,
1400         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1401         MSR_IA32_VMX_PINBASED_CTLS,
1402         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1403         MSR_IA32_VMX_PROCBASED_CTLS,
1404         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1405         MSR_IA32_VMX_EXIT_CTLS,
1406         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1407         MSR_IA32_VMX_ENTRY_CTLS,
1408         MSR_IA32_VMX_MISC,
1409         MSR_IA32_VMX_CR0_FIXED0,
1410         MSR_IA32_VMX_CR0_FIXED1,
1411         MSR_IA32_VMX_CR4_FIXED0,
1412         MSR_IA32_VMX_CR4_FIXED1,
1413         MSR_IA32_VMX_VMCS_ENUM,
1414         MSR_IA32_VMX_PROCBASED_CTLS2,
1415         MSR_IA32_VMX_EPT_VPID_CAP,
1416         MSR_IA32_VMX_VMFUNC,
1417
1418         MSR_F10H_DECFG,
1419         MSR_IA32_UCODE_REV,
1420         MSR_IA32_ARCH_CAPABILITIES,
1421         MSR_IA32_PERF_CAPABILITIES,
1422 };
1423
1424 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1425 static unsigned int num_msr_based_features;
1426
1427 static u64 kvm_get_arch_capabilities(void)
1428 {
1429         u64 data = 0;
1430
1431         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1432                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1433
1434         /*
1435          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1436          * the nested hypervisor runs with NX huge pages.  If it is not,
1437          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1438          * L1 guests, so it need not worry about its own (L2) guests.
1439          */
1440         data |= ARCH_CAP_PSCHANGE_MC_NO;
1441
1442         /*
1443          * If we're doing cache flushes (either "always" or "cond")
1444          * we will do one whenever the guest does a vmlaunch/vmresume.
1445          * If an outer hypervisor is doing the cache flush for us
1446          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1447          * capability to the guest too, and if EPT is disabled we're not
1448          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1449          * require a nested hypervisor to do a flush of its own.
1450          */
1451         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1452                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1453
1454         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1455                 data |= ARCH_CAP_RDCL_NO;
1456         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1457                 data |= ARCH_CAP_SSB_NO;
1458         if (!boot_cpu_has_bug(X86_BUG_MDS))
1459                 data |= ARCH_CAP_MDS_NO;
1460
1461         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1462                 /*
1463                  * If RTM=0 because the kernel has disabled TSX, the host might
1464                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1465                  * and therefore knows that there cannot be TAA) but keep
1466                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1467                  * and we want to allow migrating those guests to tsx=off hosts.
1468                  */
1469                 data &= ~ARCH_CAP_TAA_NO;
1470         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1471                 data |= ARCH_CAP_TAA_NO;
1472         } else {
1473                 /*
1474                  * Nothing to do here; we emulate TSX_CTRL if present on the
1475                  * host so the guest can choose between disabling TSX or
1476                  * using VERW to clear CPU buffers.
1477                  */
1478         }
1479
1480         return data;
1481 }
1482
1483 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1484 {
1485         switch (msr->index) {
1486         case MSR_IA32_ARCH_CAPABILITIES:
1487                 msr->data = kvm_get_arch_capabilities();
1488                 break;
1489         case MSR_IA32_UCODE_REV:
1490                 rdmsrl_safe(msr->index, &msr->data);
1491                 break;
1492         default:
1493                 return static_call(kvm_x86_get_msr_feature)(msr);
1494         }
1495         return 0;
1496 }
1497
1498 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1499 {
1500         struct kvm_msr_entry msr;
1501         int r;
1502
1503         msr.index = index;
1504         r = kvm_get_msr_feature(&msr);
1505
1506         if (r == KVM_MSR_RET_INVALID) {
1507                 /* Unconditionally clear the output for simplicity */
1508                 *data = 0;
1509                 if (kvm_msr_ignored_check(index, 0, false))
1510                         r = 0;
1511         }
1512
1513         if (r)
1514                 return r;
1515
1516         *data = msr.data;
1517
1518         return 0;
1519 }
1520
1521 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1522 {
1523         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1524                 return false;
1525
1526         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1527                 return false;
1528
1529         if (efer & (EFER_LME | EFER_LMA) &&
1530             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1531                 return false;
1532
1533         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1534                 return false;
1535
1536         return true;
1537
1538 }
1539 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1540 {
1541         if (efer & efer_reserved_bits)
1542                 return false;
1543
1544         return __kvm_valid_efer(vcpu, efer);
1545 }
1546 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1547
1548 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1549 {
1550         u64 old_efer = vcpu->arch.efer;
1551         u64 efer = msr_info->data;
1552         int r;
1553
1554         if (efer & efer_reserved_bits)
1555                 return 1;
1556
1557         if (!msr_info->host_initiated) {
1558                 if (!__kvm_valid_efer(vcpu, efer))
1559                         return 1;
1560
1561                 if (is_paging(vcpu) &&
1562                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1563                         return 1;
1564         }
1565
1566         efer &= ~EFER_LMA;
1567         efer |= vcpu->arch.efer & EFER_LMA;
1568
1569         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1570         if (r) {
1571                 WARN_ON(r > 0);
1572                 return r;
1573         }
1574
1575         /* Update reserved bits */
1576         if ((efer ^ old_efer) & EFER_NX)
1577                 kvm_mmu_reset_context(vcpu);
1578
1579         return 0;
1580 }
1581
1582 void kvm_enable_efer_bits(u64 mask)
1583 {
1584        efer_reserved_bits &= ~mask;
1585 }
1586 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1587
1588 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1589 {
1590         struct kvm_x86_msr_filter *msr_filter;
1591         struct msr_bitmap_range *ranges;
1592         struct kvm *kvm = vcpu->kvm;
1593         bool allowed;
1594         int idx;
1595         u32 i;
1596
1597         /* x2APIC MSRs do not support filtering. */
1598         if (index >= 0x800 && index <= 0x8ff)
1599                 return true;
1600
1601         idx = srcu_read_lock(&kvm->srcu);
1602
1603         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1604         if (!msr_filter) {
1605                 allowed = true;
1606                 goto out;
1607         }
1608
1609         allowed = msr_filter->default_allow;
1610         ranges = msr_filter->ranges;
1611
1612         for (i = 0; i < msr_filter->count; i++) {
1613                 u32 start = ranges[i].base;
1614                 u32 end = start + ranges[i].nmsrs;
1615                 u32 flags = ranges[i].flags;
1616                 unsigned long *bitmap = ranges[i].bitmap;
1617
1618                 if ((index >= start) && (index < end) && (flags & type)) {
1619                         allowed = !!test_bit(index - start, bitmap);
1620                         break;
1621                 }
1622         }
1623
1624 out:
1625         srcu_read_unlock(&kvm->srcu, idx);
1626
1627         return allowed;
1628 }
1629 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1630
1631 /*
1632  * Write @data into the MSR specified by @index.  Select MSR specific fault
1633  * checks are bypassed if @host_initiated is %true.
1634  * Returns 0 on success, non-0 otherwise.
1635  * Assumes vcpu_load() was already called.
1636  */
1637 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1638                          bool host_initiated)
1639 {
1640         struct msr_data msr;
1641
1642         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1643                 return KVM_MSR_RET_FILTERED;
1644
1645         switch (index) {
1646         case MSR_FS_BASE:
1647         case MSR_GS_BASE:
1648         case MSR_KERNEL_GS_BASE:
1649         case MSR_CSTAR:
1650         case MSR_LSTAR:
1651                 if (is_noncanonical_address(data, vcpu))
1652                         return 1;
1653                 break;
1654         case MSR_IA32_SYSENTER_EIP:
1655         case MSR_IA32_SYSENTER_ESP:
1656                 /*
1657                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1658                  * non-canonical address is written on Intel but not on
1659                  * AMD (which ignores the top 32-bits, because it does
1660                  * not implement 64-bit SYSENTER).
1661                  *
1662                  * 64-bit code should hence be able to write a non-canonical
1663                  * value on AMD.  Making the address canonical ensures that
1664                  * vmentry does not fail on Intel after writing a non-canonical
1665                  * value, and that something deterministic happens if the guest
1666                  * invokes 64-bit SYSENTER.
1667                  */
1668                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1669                 break;
1670         case MSR_TSC_AUX:
1671                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1672                         return 1;
1673
1674                 if (!host_initiated &&
1675                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1676                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1677                         return 1;
1678
1679                 /*
1680                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1681                  * incomplete and conflicting architectural behavior.  Current
1682                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1683                  * reserved and always read as zeros.  Enforce Intel's reserved
1684                  * bits check if and only if the guest CPU is Intel, and clear
1685                  * the bits in all other cases.  This ensures cross-vendor
1686                  * migration will provide consistent behavior for the guest.
1687                  */
1688                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1689                         return 1;
1690
1691                 data = (u32)data;
1692                 break;
1693         }
1694
1695         msr.data = data;
1696         msr.index = index;
1697         msr.host_initiated = host_initiated;
1698
1699         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1700 }
1701
1702 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1703                                      u32 index, u64 data, bool host_initiated)
1704 {
1705         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1706
1707         if (ret == KVM_MSR_RET_INVALID)
1708                 if (kvm_msr_ignored_check(index, data, true))
1709                         ret = 0;
1710
1711         return ret;
1712 }
1713
1714 /*
1715  * Read the MSR specified by @index into @data.  Select MSR specific fault
1716  * checks are bypassed if @host_initiated is %true.
1717  * Returns 0 on success, non-0 otherwise.
1718  * Assumes vcpu_load() was already called.
1719  */
1720 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1721                   bool host_initiated)
1722 {
1723         struct msr_data msr;
1724         int ret;
1725
1726         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1727                 return KVM_MSR_RET_FILTERED;
1728
1729         switch (index) {
1730         case MSR_TSC_AUX:
1731                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1732                         return 1;
1733
1734                 if (!host_initiated &&
1735                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1736                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1737                         return 1;
1738                 break;
1739         }
1740
1741         msr.index = index;
1742         msr.host_initiated = host_initiated;
1743
1744         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1745         if (!ret)
1746                 *data = msr.data;
1747         return ret;
1748 }
1749
1750 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1751                                      u32 index, u64 *data, bool host_initiated)
1752 {
1753         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1754
1755         if (ret == KVM_MSR_RET_INVALID) {
1756                 /* Unconditionally clear *data for simplicity */
1757                 *data = 0;
1758                 if (kvm_msr_ignored_check(index, 0, false))
1759                         ret = 0;
1760         }
1761
1762         return ret;
1763 }
1764
1765 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1766 {
1767         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1768 }
1769 EXPORT_SYMBOL_GPL(kvm_get_msr);
1770
1771 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1772 {
1773         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1774 }
1775 EXPORT_SYMBOL_GPL(kvm_set_msr);
1776
1777 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1778 {
1779         int err = vcpu->run->msr.error;
1780         if (!err) {
1781                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1782                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1783         }
1784
1785         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1786 }
1787
1788 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1789 {
1790         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1791 }
1792
1793 static u64 kvm_msr_reason(int r)
1794 {
1795         switch (r) {
1796         case KVM_MSR_RET_INVALID:
1797                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1798         case KVM_MSR_RET_FILTERED:
1799                 return KVM_MSR_EXIT_REASON_FILTER;
1800         default:
1801                 return KVM_MSR_EXIT_REASON_INVAL;
1802         }
1803 }
1804
1805 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1806                               u32 exit_reason, u64 data,
1807                               int (*completion)(struct kvm_vcpu *vcpu),
1808                               int r)
1809 {
1810         u64 msr_reason = kvm_msr_reason(r);
1811
1812         /* Check if the user wanted to know about this MSR fault */
1813         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1814                 return 0;
1815
1816         vcpu->run->exit_reason = exit_reason;
1817         vcpu->run->msr.error = 0;
1818         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1819         vcpu->run->msr.reason = msr_reason;
1820         vcpu->run->msr.index = index;
1821         vcpu->run->msr.data = data;
1822         vcpu->arch.complete_userspace_io = completion;
1823
1824         return 1;
1825 }
1826
1827 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1828 {
1829         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1830                                    complete_emulated_rdmsr, r);
1831 }
1832
1833 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1834 {
1835         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1836                                    complete_emulated_wrmsr, r);
1837 }
1838
1839 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1840 {
1841         u32 ecx = kvm_rcx_read(vcpu);
1842         u64 data;
1843         int r;
1844
1845         r = kvm_get_msr(vcpu, ecx, &data);
1846
1847         /* MSR read failed? See if we should ask user space */
1848         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1849                 /* Bounce to user space */
1850                 return 0;
1851         }
1852
1853         if (!r) {
1854                 trace_kvm_msr_read(ecx, data);
1855
1856                 kvm_rax_write(vcpu, data & -1u);
1857                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1858         } else {
1859                 trace_kvm_msr_read_ex(ecx);
1860         }
1861
1862         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1863 }
1864 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1865
1866 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1867 {
1868         u32 ecx = kvm_rcx_read(vcpu);
1869         u64 data = kvm_read_edx_eax(vcpu);
1870         int r;
1871
1872         r = kvm_set_msr(vcpu, ecx, data);
1873
1874         /* MSR write failed? See if we should ask user space */
1875         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1876                 /* Bounce to user space */
1877                 return 0;
1878
1879         /* Signal all other negative errors to userspace */
1880         if (r < 0)
1881                 return r;
1882
1883         if (!r)
1884                 trace_kvm_msr_write(ecx, data);
1885         else
1886                 trace_kvm_msr_write_ex(ecx, data);
1887
1888         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1889 }
1890 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1891
1892 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1893 {
1894         return kvm_skip_emulated_instruction(vcpu);
1895 }
1896 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1897
1898 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1899 {
1900         /* Treat an INVD instruction as a NOP and just skip it. */
1901         return kvm_emulate_as_nop(vcpu);
1902 }
1903 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1904
1905 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1906 {
1907         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1908         return kvm_emulate_as_nop(vcpu);
1909 }
1910 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1911
1912 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1913 {
1914         kvm_queue_exception(vcpu, UD_VECTOR);
1915         return 1;
1916 }
1917 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1918
1919 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1920 {
1921         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1922         return kvm_emulate_as_nop(vcpu);
1923 }
1924 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1925
1926 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1927 {
1928         xfer_to_guest_mode_prepare();
1929         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1930                 xfer_to_guest_mode_work_pending();
1931 }
1932
1933 /*
1934  * The fast path for frequent and performance sensitive wrmsr emulation,
1935  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1936  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1937  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1938  * other cases which must be called after interrupts are enabled on the host.
1939  */
1940 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1941 {
1942         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1943                 return 1;
1944
1945         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1946                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1947                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1948                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1949
1950                 data &= ~(1 << 12);
1951                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1952                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1953                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1954                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1955                 return 0;
1956         }
1957
1958         return 1;
1959 }
1960
1961 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1962 {
1963         if (!kvm_can_use_hv_timer(vcpu))
1964                 return 1;
1965
1966         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1967         return 0;
1968 }
1969
1970 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1971 {
1972         u32 msr = kvm_rcx_read(vcpu);
1973         u64 data;
1974         fastpath_t ret = EXIT_FASTPATH_NONE;
1975
1976         switch (msr) {
1977         case APIC_BASE_MSR + (APIC_ICR >> 4):
1978                 data = kvm_read_edx_eax(vcpu);
1979                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1980                         kvm_skip_emulated_instruction(vcpu);
1981                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1982                 }
1983                 break;
1984         case MSR_IA32_TSC_DEADLINE:
1985                 data = kvm_read_edx_eax(vcpu);
1986                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1987                         kvm_skip_emulated_instruction(vcpu);
1988                         ret = EXIT_FASTPATH_REENTER_GUEST;
1989                 }
1990                 break;
1991         default:
1992                 break;
1993         }
1994
1995         if (ret != EXIT_FASTPATH_NONE)
1996                 trace_kvm_msr_write(msr, data);
1997
1998         return ret;
1999 }
2000 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2001
2002 /*
2003  * Adapt set_msr() to msr_io()'s calling convention
2004  */
2005 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2006 {
2007         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2008 }
2009
2010 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2011 {
2012         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2013 }
2014
2015 #ifdef CONFIG_X86_64
2016 struct pvclock_clock {
2017         int vclock_mode;
2018         u64 cycle_last;
2019         u64 mask;
2020         u32 mult;
2021         u32 shift;
2022         u64 base_cycles;
2023         u64 offset;
2024 };
2025
2026 struct pvclock_gtod_data {
2027         seqcount_t      seq;
2028
2029         struct pvclock_clock clock; /* extract of a clocksource struct */
2030         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2031
2032         ktime_t         offs_boot;
2033         u64             wall_time_sec;
2034 };
2035
2036 static struct pvclock_gtod_data pvclock_gtod_data;
2037
2038 static void update_pvclock_gtod(struct timekeeper *tk)
2039 {
2040         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2041
2042         write_seqcount_begin(&vdata->seq);
2043
2044         /* copy pvclock gtod data */
2045         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2046         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2047         vdata->clock.mask               = tk->tkr_mono.mask;
2048         vdata->clock.mult               = tk->tkr_mono.mult;
2049         vdata->clock.shift              = tk->tkr_mono.shift;
2050         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2051         vdata->clock.offset             = tk->tkr_mono.base;
2052
2053         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2054         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2055         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2056         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2057         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2058         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2059         vdata->raw_clock.offset         = tk->tkr_raw.base;
2060
2061         vdata->wall_time_sec            = tk->xtime_sec;
2062
2063         vdata->offs_boot                = tk->offs_boot;
2064
2065         write_seqcount_end(&vdata->seq);
2066 }
2067
2068 static s64 get_kvmclock_base_ns(void)
2069 {
2070         /* Count up from boot time, but with the frequency of the raw clock.  */
2071         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2072 }
2073 #else
2074 static s64 get_kvmclock_base_ns(void)
2075 {
2076         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2077         return ktime_get_boottime_ns();
2078 }
2079 #endif
2080
2081 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2082 {
2083         int version;
2084         int r;
2085         struct pvclock_wall_clock wc;
2086         u32 wc_sec_hi;
2087         u64 wall_nsec;
2088
2089         if (!wall_clock)
2090                 return;
2091
2092         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2093         if (r)
2094                 return;
2095
2096         if (version & 1)
2097                 ++version;  /* first time write, random junk */
2098
2099         ++version;
2100
2101         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2102                 return;
2103
2104         /*
2105          * The guest calculates current wall clock time by adding
2106          * system time (updated by kvm_guest_time_update below) to the
2107          * wall clock specified here.  We do the reverse here.
2108          */
2109         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2110
2111         wc.nsec = do_div(wall_nsec, 1000000000);
2112         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2113         wc.version = version;
2114
2115         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2116
2117         if (sec_hi_ofs) {
2118                 wc_sec_hi = wall_nsec >> 32;
2119                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2120                                 &wc_sec_hi, sizeof(wc_sec_hi));
2121         }
2122
2123         version++;
2124         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2125 }
2126
2127 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2128                                   bool old_msr, bool host_initiated)
2129 {
2130         struct kvm_arch *ka = &vcpu->kvm->arch;
2131
2132         if (vcpu->vcpu_id == 0 && !host_initiated) {
2133                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2134                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2135
2136                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2137         }
2138
2139         vcpu->arch.time = system_time;
2140         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2141
2142         /* we verify if the enable bit is set... */
2143         vcpu->arch.pv_time_enabled = false;
2144         if (!(system_time & 1))
2145                 return;
2146
2147         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2148                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2149                                        sizeof(struct pvclock_vcpu_time_info)))
2150                 vcpu->arch.pv_time_enabled = true;
2151
2152         return;
2153 }
2154
2155 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2156 {
2157         do_shl32_div32(dividend, divisor);
2158         return dividend;
2159 }
2160
2161 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2162                                s8 *pshift, u32 *pmultiplier)
2163 {
2164         uint64_t scaled64;
2165         int32_t  shift = 0;
2166         uint64_t tps64;
2167         uint32_t tps32;
2168
2169         tps64 = base_hz;
2170         scaled64 = scaled_hz;
2171         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2172                 tps64 >>= 1;
2173                 shift--;
2174         }
2175
2176         tps32 = (uint32_t)tps64;
2177         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2178                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2179                         scaled64 >>= 1;
2180                 else
2181                         tps32 <<= 1;
2182                 shift++;
2183         }
2184
2185         *pshift = shift;
2186         *pmultiplier = div_frac(scaled64, tps32);
2187 }
2188
2189 #ifdef CONFIG_X86_64
2190 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2191 #endif
2192
2193 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2194 static unsigned long max_tsc_khz;
2195
2196 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2197 {
2198         u64 v = (u64)khz * (1000000 + ppm);
2199         do_div(v, 1000000);
2200         return v;
2201 }
2202
2203 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2204
2205 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2206 {
2207         u64 ratio;
2208
2209         /* Guest TSC same frequency as host TSC? */
2210         if (!scale) {
2211                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2212                 return 0;
2213         }
2214
2215         /* TSC scaling supported? */
2216         if (!kvm_has_tsc_control) {
2217                 if (user_tsc_khz > tsc_khz) {
2218                         vcpu->arch.tsc_catchup = 1;
2219                         vcpu->arch.tsc_always_catchup = 1;
2220                         return 0;
2221                 } else {
2222                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2223                         return -1;
2224                 }
2225         }
2226
2227         /* TSC scaling required  - calculate ratio */
2228         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2229                                 user_tsc_khz, tsc_khz);
2230
2231         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2232                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2233                                     user_tsc_khz);
2234                 return -1;
2235         }
2236
2237         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2238         return 0;
2239 }
2240
2241 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2242 {
2243         u32 thresh_lo, thresh_hi;
2244         int use_scaling = 0;
2245
2246         /* tsc_khz can be zero if TSC calibration fails */
2247         if (user_tsc_khz == 0) {
2248                 /* set tsc_scaling_ratio to a safe value */
2249                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2250                 return -1;
2251         }
2252
2253         /* Compute a scale to convert nanoseconds in TSC cycles */
2254         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2255                            &vcpu->arch.virtual_tsc_shift,
2256                            &vcpu->arch.virtual_tsc_mult);
2257         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2258
2259         /*
2260          * Compute the variation in TSC rate which is acceptable
2261          * within the range of tolerance and decide if the
2262          * rate being applied is within that bounds of the hardware
2263          * rate.  If so, no scaling or compensation need be done.
2264          */
2265         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2266         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2267         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2268                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2269                 use_scaling = 1;
2270         }
2271         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2272 }
2273
2274 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2275 {
2276         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2277                                       vcpu->arch.virtual_tsc_mult,
2278                                       vcpu->arch.virtual_tsc_shift);
2279         tsc += vcpu->arch.this_tsc_write;
2280         return tsc;
2281 }
2282
2283 static inline int gtod_is_based_on_tsc(int mode)
2284 {
2285         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2286 }
2287
2288 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2289 {
2290 #ifdef CONFIG_X86_64
2291         bool vcpus_matched;
2292         struct kvm_arch *ka = &vcpu->kvm->arch;
2293         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2294
2295         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2296                          atomic_read(&vcpu->kvm->online_vcpus));
2297
2298         /*
2299          * Once the masterclock is enabled, always perform request in
2300          * order to update it.
2301          *
2302          * In order to enable masterclock, the host clocksource must be TSC
2303          * and the vcpus need to have matched TSCs.  When that happens,
2304          * perform request to enable masterclock.
2305          */
2306         if (ka->use_master_clock ||
2307             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2308                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2309
2310         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2311                             atomic_read(&vcpu->kvm->online_vcpus),
2312                             ka->use_master_clock, gtod->clock.vclock_mode);
2313 #endif
2314 }
2315
2316 /*
2317  * Multiply tsc by a fixed point number represented by ratio.
2318  *
2319  * The most significant 64-N bits (mult) of ratio represent the
2320  * integral part of the fixed point number; the remaining N bits
2321  * (frac) represent the fractional part, ie. ratio represents a fixed
2322  * point number (mult + frac * 2^(-N)).
2323  *
2324  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2325  */
2326 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2327 {
2328         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2329 }
2330
2331 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2332 {
2333         u64 _tsc = tsc;
2334
2335         if (ratio != kvm_default_tsc_scaling_ratio)
2336                 _tsc = __scale_tsc(ratio, tsc);
2337
2338         return _tsc;
2339 }
2340 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2341
2342 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2343 {
2344         u64 tsc;
2345
2346         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2347
2348         return target_tsc - tsc;
2349 }
2350
2351 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2352 {
2353         return vcpu->arch.l1_tsc_offset +
2354                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2355 }
2356 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2357
2358 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2359 {
2360         u64 nested_offset;
2361
2362         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2363                 nested_offset = l1_offset;
2364         else
2365                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2366                                                 kvm_tsc_scaling_ratio_frac_bits);
2367
2368         nested_offset += l2_offset;
2369         return nested_offset;
2370 }
2371 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2372
2373 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2374 {
2375         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2376                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2377                                        kvm_tsc_scaling_ratio_frac_bits);
2378
2379         return l1_multiplier;
2380 }
2381 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2382
2383 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2384 {
2385         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2386                                    vcpu->arch.l1_tsc_offset,
2387                                    l1_offset);
2388
2389         vcpu->arch.l1_tsc_offset = l1_offset;
2390
2391         /*
2392          * If we are here because L1 chose not to trap WRMSR to TSC then
2393          * according to the spec this should set L1's TSC (as opposed to
2394          * setting L1's offset for L2).
2395          */
2396         if (is_guest_mode(vcpu))
2397                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2398                         l1_offset,
2399                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2400                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2401         else
2402                 vcpu->arch.tsc_offset = l1_offset;
2403
2404         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2405 }
2406
2407 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2408 {
2409         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2410
2411         /* Userspace is changing the multiplier while L2 is active */
2412         if (is_guest_mode(vcpu))
2413                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2414                         l1_multiplier,
2415                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2416         else
2417                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2418
2419         if (kvm_has_tsc_control)
2420                 static_call(kvm_x86_write_tsc_multiplier)(
2421                         vcpu, vcpu->arch.tsc_scaling_ratio);
2422 }
2423
2424 static inline bool kvm_check_tsc_unstable(void)
2425 {
2426 #ifdef CONFIG_X86_64
2427         /*
2428          * TSC is marked unstable when we're running on Hyper-V,
2429          * 'TSC page' clocksource is good.
2430          */
2431         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2432                 return false;
2433 #endif
2434         return check_tsc_unstable();
2435 }
2436
2437 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2438 {
2439         struct kvm *kvm = vcpu->kvm;
2440         u64 offset, ns, elapsed;
2441         unsigned long flags;
2442         bool matched;
2443         bool already_matched;
2444         bool synchronizing = false;
2445
2446         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2447         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2448         ns = get_kvmclock_base_ns();
2449         elapsed = ns - kvm->arch.last_tsc_nsec;
2450
2451         if (vcpu->arch.virtual_tsc_khz) {
2452                 if (data == 0) {
2453                         /*
2454                          * detection of vcpu initialization -- need to sync
2455                          * with other vCPUs. This particularly helps to keep
2456                          * kvm_clock stable after CPU hotplug
2457                          */
2458                         synchronizing = true;
2459                 } else {
2460                         u64 tsc_exp = kvm->arch.last_tsc_write +
2461                                                 nsec_to_cycles(vcpu, elapsed);
2462                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2463                         /*
2464                          * Special case: TSC write with a small delta (1 second)
2465                          * of virtual cycle time against real time is
2466                          * interpreted as an attempt to synchronize the CPU.
2467                          */
2468                         synchronizing = data < tsc_exp + tsc_hz &&
2469                                         data + tsc_hz > tsc_exp;
2470                 }
2471         }
2472
2473         /*
2474          * For a reliable TSC, we can match TSC offsets, and for an unstable
2475          * TSC, we add elapsed time in this computation.  We could let the
2476          * compensation code attempt to catch up if we fall behind, but
2477          * it's better to try to match offsets from the beginning.
2478          */
2479         if (synchronizing &&
2480             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2481                 if (!kvm_check_tsc_unstable()) {
2482                         offset = kvm->arch.cur_tsc_offset;
2483                 } else {
2484                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2485                         data += delta;
2486                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2487                 }
2488                 matched = true;
2489                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2490         } else {
2491                 /*
2492                  * We split periods of matched TSC writes into generations.
2493                  * For each generation, we track the original measured
2494                  * nanosecond time, offset, and write, so if TSCs are in
2495                  * sync, we can match exact offset, and if not, we can match
2496                  * exact software computation in compute_guest_tsc()
2497                  *
2498                  * These values are tracked in kvm->arch.cur_xxx variables.
2499                  */
2500                 kvm->arch.cur_tsc_generation++;
2501                 kvm->arch.cur_tsc_nsec = ns;
2502                 kvm->arch.cur_tsc_write = data;
2503                 kvm->arch.cur_tsc_offset = offset;
2504                 matched = false;
2505         }
2506
2507         /*
2508          * We also track th most recent recorded KHZ, write and time to
2509          * allow the matching interval to be extended at each write.
2510          */
2511         kvm->arch.last_tsc_nsec = ns;
2512         kvm->arch.last_tsc_write = data;
2513         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2514
2515         vcpu->arch.last_guest_tsc = data;
2516
2517         /* Keep track of which generation this VCPU has synchronized to */
2518         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2519         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2520         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2521
2522         kvm_vcpu_write_tsc_offset(vcpu, offset);
2523         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2524
2525         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2526         if (!matched) {
2527                 kvm->arch.nr_vcpus_matched_tsc = 0;
2528         } else if (!already_matched) {
2529                 kvm->arch.nr_vcpus_matched_tsc++;
2530         }
2531
2532         kvm_track_tsc_matching(vcpu);
2533         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2534 }
2535
2536 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2537                                            s64 adjustment)
2538 {
2539         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2540         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2541 }
2542
2543 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2544 {
2545         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2546                 WARN_ON(adjustment < 0);
2547         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2548                                    vcpu->arch.l1_tsc_scaling_ratio);
2549         adjust_tsc_offset_guest(vcpu, adjustment);
2550 }
2551
2552 #ifdef CONFIG_X86_64
2553
2554 static u64 read_tsc(void)
2555 {
2556         u64 ret = (u64)rdtsc_ordered();
2557         u64 last = pvclock_gtod_data.clock.cycle_last;
2558
2559         if (likely(ret >= last))
2560                 return ret;
2561
2562         /*
2563          * GCC likes to generate cmov here, but this branch is extremely
2564          * predictable (it's just a function of time and the likely is
2565          * very likely) and there's a data dependence, so force GCC
2566          * to generate a branch instead.  I don't barrier() because
2567          * we don't actually need a barrier, and if this function
2568          * ever gets inlined it will generate worse code.
2569          */
2570         asm volatile ("");
2571         return last;
2572 }
2573
2574 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2575                           int *mode)
2576 {
2577         long v;
2578         u64 tsc_pg_val;
2579
2580         switch (clock->vclock_mode) {
2581         case VDSO_CLOCKMODE_HVCLOCK:
2582                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2583                                                   tsc_timestamp);
2584                 if (tsc_pg_val != U64_MAX) {
2585                         /* TSC page valid */
2586                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2587                         v = (tsc_pg_val - clock->cycle_last) &
2588                                 clock->mask;
2589                 } else {
2590                         /* TSC page invalid */
2591                         *mode = VDSO_CLOCKMODE_NONE;
2592                 }
2593                 break;
2594         case VDSO_CLOCKMODE_TSC:
2595                 *mode = VDSO_CLOCKMODE_TSC;
2596                 *tsc_timestamp = read_tsc();
2597                 v = (*tsc_timestamp - clock->cycle_last) &
2598                         clock->mask;
2599                 break;
2600         default:
2601                 *mode = VDSO_CLOCKMODE_NONE;
2602         }
2603
2604         if (*mode == VDSO_CLOCKMODE_NONE)
2605                 *tsc_timestamp = v = 0;
2606
2607         return v * clock->mult;
2608 }
2609
2610 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2611 {
2612         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2613         unsigned long seq;
2614         int mode;
2615         u64 ns;
2616
2617         do {
2618                 seq = read_seqcount_begin(&gtod->seq);
2619                 ns = gtod->raw_clock.base_cycles;
2620                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2621                 ns >>= gtod->raw_clock.shift;
2622                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2623         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2624         *t = ns;
2625
2626         return mode;
2627 }
2628
2629 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2630 {
2631         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2632         unsigned long seq;
2633         int mode;
2634         u64 ns;
2635
2636         do {
2637                 seq = read_seqcount_begin(&gtod->seq);
2638                 ts->tv_sec = gtod->wall_time_sec;
2639                 ns = gtod->clock.base_cycles;
2640                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2641                 ns >>= gtod->clock.shift;
2642         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2643
2644         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2645         ts->tv_nsec = ns;
2646
2647         return mode;
2648 }
2649
2650 /* returns true if host is using TSC based clocksource */
2651 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2652 {
2653         /* checked again under seqlock below */
2654         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2655                 return false;
2656
2657         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2658                                                       tsc_timestamp));
2659 }
2660
2661 /* returns true if host is using TSC based clocksource */
2662 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2663                                            u64 *tsc_timestamp)
2664 {
2665         /* checked again under seqlock below */
2666         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2667                 return false;
2668
2669         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2670 }
2671 #endif
2672
2673 /*
2674  *
2675  * Assuming a stable TSC across physical CPUS, and a stable TSC
2676  * across virtual CPUs, the following condition is possible.
2677  * Each numbered line represents an event visible to both
2678  * CPUs at the next numbered event.
2679  *
2680  * "timespecX" represents host monotonic time. "tscX" represents
2681  * RDTSC value.
2682  *
2683  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2684  *
2685  * 1.  read timespec0,tsc0
2686  * 2.                                   | timespec1 = timespec0 + N
2687  *                                      | tsc1 = tsc0 + M
2688  * 3. transition to guest               | transition to guest
2689  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2690  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2691  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2692  *
2693  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2694  *
2695  *      - ret0 < ret1
2696  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2697  *              ...
2698  *      - 0 < N - M => M < N
2699  *
2700  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2701  * always the case (the difference between two distinct xtime instances
2702  * might be smaller then the difference between corresponding TSC reads,
2703  * when updating guest vcpus pvclock areas).
2704  *
2705  * To avoid that problem, do not allow visibility of distinct
2706  * system_timestamp/tsc_timestamp values simultaneously: use a master
2707  * copy of host monotonic time values. Update that master copy
2708  * in lockstep.
2709  *
2710  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2711  *
2712  */
2713
2714 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2715 {
2716 #ifdef CONFIG_X86_64
2717         struct kvm_arch *ka = &kvm->arch;
2718         int vclock_mode;
2719         bool host_tsc_clocksource, vcpus_matched;
2720
2721         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2722                         atomic_read(&kvm->online_vcpus));
2723
2724         /*
2725          * If the host uses TSC clock, then passthrough TSC as stable
2726          * to the guest.
2727          */
2728         host_tsc_clocksource = kvm_get_time_and_clockread(
2729                                         &ka->master_kernel_ns,
2730                                         &ka->master_cycle_now);
2731
2732         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2733                                 && !ka->backwards_tsc_observed
2734                                 && !ka->boot_vcpu_runs_old_kvmclock;
2735
2736         if (ka->use_master_clock)
2737                 atomic_set(&kvm_guest_has_master_clock, 1);
2738
2739         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2740         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2741                                         vcpus_matched);
2742 #endif
2743 }
2744
2745 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2746 {
2747         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2748 }
2749
2750 static void kvm_gen_update_masterclock(struct kvm *kvm)
2751 {
2752 #ifdef CONFIG_X86_64
2753         int i;
2754         struct kvm_vcpu *vcpu;
2755         struct kvm_arch *ka = &kvm->arch;
2756         unsigned long flags;
2757
2758         kvm_hv_invalidate_tsc_page(kvm);
2759
2760         kvm_make_mclock_inprogress_request(kvm);
2761
2762         /* no guest entries from this point */
2763         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2764         pvclock_update_vm_gtod_copy(kvm);
2765         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2766
2767         kvm_for_each_vcpu(i, vcpu, kvm)
2768                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2769
2770         /* guest entries allowed */
2771         kvm_for_each_vcpu(i, vcpu, kvm)
2772                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2773 #endif
2774 }
2775
2776 u64 get_kvmclock_ns(struct kvm *kvm)
2777 {
2778         struct kvm_arch *ka = &kvm->arch;
2779         struct pvclock_vcpu_time_info hv_clock;
2780         unsigned long flags;
2781         u64 ret;
2782
2783         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2784         if (!ka->use_master_clock) {
2785                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2786                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2787         }
2788
2789         hv_clock.tsc_timestamp = ka->master_cycle_now;
2790         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2791         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2792
2793         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2794         get_cpu();
2795
2796         if (__this_cpu_read(cpu_tsc_khz)) {
2797                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2798                                    &hv_clock.tsc_shift,
2799                                    &hv_clock.tsc_to_system_mul);
2800                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2801         } else
2802                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2803
2804         put_cpu();
2805
2806         return ret;
2807 }
2808
2809 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2810                                    struct gfn_to_hva_cache *cache,
2811                                    unsigned int offset)
2812 {
2813         struct kvm_vcpu_arch *vcpu = &v->arch;
2814         struct pvclock_vcpu_time_info guest_hv_clock;
2815
2816         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2817                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2818                 return;
2819
2820         /* This VCPU is paused, but it's legal for a guest to read another
2821          * VCPU's kvmclock, so we really have to follow the specification where
2822          * it says that version is odd if data is being modified, and even after
2823          * it is consistent.
2824          *
2825          * Version field updates must be kept separate.  This is because
2826          * kvm_write_guest_cached might use a "rep movs" instruction, and
2827          * writes within a string instruction are weakly ordered.  So there
2828          * are three writes overall.
2829          *
2830          * As a small optimization, only write the version field in the first
2831          * and third write.  The vcpu->pv_time cache is still valid, because the
2832          * version field is the first in the struct.
2833          */
2834         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2835
2836         if (guest_hv_clock.version & 1)
2837                 ++guest_hv_clock.version;  /* first time write, random junk */
2838
2839         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2840         kvm_write_guest_offset_cached(v->kvm, cache,
2841                                       &vcpu->hv_clock, offset,
2842                                       sizeof(vcpu->hv_clock.version));
2843
2844         smp_wmb();
2845
2846         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2847         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2848
2849         if (vcpu->pvclock_set_guest_stopped_request) {
2850                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2851                 vcpu->pvclock_set_guest_stopped_request = false;
2852         }
2853
2854         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2855
2856         kvm_write_guest_offset_cached(v->kvm, cache,
2857                                       &vcpu->hv_clock, offset,
2858                                       sizeof(vcpu->hv_clock));
2859
2860         smp_wmb();
2861
2862         vcpu->hv_clock.version++;
2863         kvm_write_guest_offset_cached(v->kvm, cache,
2864                                      &vcpu->hv_clock, offset,
2865                                      sizeof(vcpu->hv_clock.version));
2866 }
2867
2868 static int kvm_guest_time_update(struct kvm_vcpu *v)
2869 {
2870         unsigned long flags, tgt_tsc_khz;
2871         struct kvm_vcpu_arch *vcpu = &v->arch;
2872         struct kvm_arch *ka = &v->kvm->arch;
2873         s64 kernel_ns;
2874         u64 tsc_timestamp, host_tsc;
2875         u8 pvclock_flags;
2876         bool use_master_clock;
2877
2878         kernel_ns = 0;
2879         host_tsc = 0;
2880
2881         /*
2882          * If the host uses TSC clock, then passthrough TSC as stable
2883          * to the guest.
2884          */
2885         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2886         use_master_clock = ka->use_master_clock;
2887         if (use_master_clock) {
2888                 host_tsc = ka->master_cycle_now;
2889                 kernel_ns = ka->master_kernel_ns;
2890         }
2891         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2892
2893         /* Keep irq disabled to prevent changes to the clock */
2894         local_irq_save(flags);
2895         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2896         if (unlikely(tgt_tsc_khz == 0)) {
2897                 local_irq_restore(flags);
2898                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2899                 return 1;
2900         }
2901         if (!use_master_clock) {
2902                 host_tsc = rdtsc();
2903                 kernel_ns = get_kvmclock_base_ns();
2904         }
2905
2906         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2907
2908         /*
2909          * We may have to catch up the TSC to match elapsed wall clock
2910          * time for two reasons, even if kvmclock is used.
2911          *   1) CPU could have been running below the maximum TSC rate
2912          *   2) Broken TSC compensation resets the base at each VCPU
2913          *      entry to avoid unknown leaps of TSC even when running
2914          *      again on the same CPU.  This may cause apparent elapsed
2915          *      time to disappear, and the guest to stand still or run
2916          *      very slowly.
2917          */
2918         if (vcpu->tsc_catchup) {
2919                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2920                 if (tsc > tsc_timestamp) {
2921                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2922                         tsc_timestamp = tsc;
2923                 }
2924         }
2925
2926         local_irq_restore(flags);
2927
2928         /* With all the info we got, fill in the values */
2929
2930         if (kvm_has_tsc_control)
2931                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2932                                             v->arch.l1_tsc_scaling_ratio);
2933
2934         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2935                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2936                                    &vcpu->hv_clock.tsc_shift,
2937                                    &vcpu->hv_clock.tsc_to_system_mul);
2938                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2939         }
2940
2941         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2942         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2943         vcpu->last_guest_tsc = tsc_timestamp;
2944
2945         /* If the host uses TSC clocksource, then it is stable */
2946         pvclock_flags = 0;
2947         if (use_master_clock)
2948                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2949
2950         vcpu->hv_clock.flags = pvclock_flags;
2951
2952         if (vcpu->pv_time_enabled)
2953                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2954         if (vcpu->xen.vcpu_info_set)
2955                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2956                                        offsetof(struct compat_vcpu_info, time));
2957         if (vcpu->xen.vcpu_time_info_set)
2958                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2959         if (!v->vcpu_idx)
2960                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2961         return 0;
2962 }
2963
2964 /*
2965  * kvmclock updates which are isolated to a given vcpu, such as
2966  * vcpu->cpu migration, should not allow system_timestamp from
2967  * the rest of the vcpus to remain static. Otherwise ntp frequency
2968  * correction applies to one vcpu's system_timestamp but not
2969  * the others.
2970  *
2971  * So in those cases, request a kvmclock update for all vcpus.
2972  * We need to rate-limit these requests though, as they can
2973  * considerably slow guests that have a large number of vcpus.
2974  * The time for a remote vcpu to update its kvmclock is bound
2975  * by the delay we use to rate-limit the updates.
2976  */
2977
2978 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2979
2980 static void kvmclock_update_fn(struct work_struct *work)
2981 {
2982         int i;
2983         struct delayed_work *dwork = to_delayed_work(work);
2984         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2985                                            kvmclock_update_work);
2986         struct kvm *kvm = container_of(ka, struct kvm, arch);
2987         struct kvm_vcpu *vcpu;
2988
2989         kvm_for_each_vcpu(i, vcpu, kvm) {
2990                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2991                 kvm_vcpu_kick(vcpu);
2992         }
2993 }
2994
2995 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2996 {
2997         struct kvm *kvm = v->kvm;
2998
2999         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3000         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3001                                         KVMCLOCK_UPDATE_DELAY);
3002 }
3003
3004 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3005
3006 static void kvmclock_sync_fn(struct work_struct *work)
3007 {
3008         struct delayed_work *dwork = to_delayed_work(work);
3009         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3010                                            kvmclock_sync_work);
3011         struct kvm *kvm = container_of(ka, struct kvm, arch);
3012
3013         if (!kvmclock_periodic_sync)
3014                 return;
3015
3016         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3017         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3018                                         KVMCLOCK_SYNC_PERIOD);
3019 }
3020
3021 /*
3022  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3023  */
3024 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3025 {
3026         /* McStatusWrEn enabled? */
3027         if (guest_cpuid_is_amd_or_hygon(vcpu))
3028                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3029
3030         return false;
3031 }
3032
3033 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3034 {
3035         u64 mcg_cap = vcpu->arch.mcg_cap;
3036         unsigned bank_num = mcg_cap & 0xff;
3037         u32 msr = msr_info->index;
3038         u64 data = msr_info->data;
3039
3040         switch (msr) {
3041         case MSR_IA32_MCG_STATUS:
3042                 vcpu->arch.mcg_status = data;
3043                 break;
3044         case MSR_IA32_MCG_CTL:
3045                 if (!(mcg_cap & MCG_CTL_P) &&
3046                     (data || !msr_info->host_initiated))
3047                         return 1;
3048                 if (data != 0 && data != ~(u64)0)
3049                         return 1;
3050                 vcpu->arch.mcg_ctl = data;
3051                 break;
3052         default:
3053                 if (msr >= MSR_IA32_MC0_CTL &&
3054                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3055                         u32 offset = array_index_nospec(
3056                                 msr - MSR_IA32_MC0_CTL,
3057                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3058
3059                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3060                          * some Linux kernels though clear bit 10 in bank 4 to
3061                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3062                          * this to avoid an uncatched #GP in the guest
3063                          */
3064                         if ((offset & 0x3) == 0 &&
3065                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3066                                 return -1;
3067
3068                         /* MCi_STATUS */
3069                         if (!msr_info->host_initiated &&
3070                             (offset & 0x3) == 1 && data != 0) {
3071                                 if (!can_set_mci_status(vcpu))
3072                                         return -1;
3073                         }
3074
3075                         vcpu->arch.mce_banks[offset] = data;
3076                         break;
3077                 }
3078                 return 1;
3079         }
3080         return 0;
3081 }
3082
3083 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3084 {
3085         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3086
3087         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3088 }
3089
3090 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3091 {
3092         gpa_t gpa = data & ~0x3f;
3093
3094         /* Bits 4:5 are reserved, Should be zero */
3095         if (data & 0x30)
3096                 return 1;
3097
3098         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3099             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3100                 return 1;
3101
3102         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3103             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3104                 return 1;
3105
3106         if (!lapic_in_kernel(vcpu))
3107                 return data ? 1 : 0;
3108
3109         vcpu->arch.apf.msr_en_val = data;
3110
3111         if (!kvm_pv_async_pf_enabled(vcpu)) {
3112                 kvm_clear_async_pf_completion_queue(vcpu);
3113                 kvm_async_pf_hash_reset(vcpu);
3114                 return 0;
3115         }
3116
3117         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3118                                         sizeof(u64)))
3119                 return 1;
3120
3121         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3122         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3123
3124         kvm_async_pf_wakeup_all(vcpu);
3125
3126         return 0;
3127 }
3128
3129 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3130 {
3131         /* Bits 8-63 are reserved */
3132         if (data >> 8)
3133                 return 1;
3134
3135         if (!lapic_in_kernel(vcpu))
3136                 return 1;
3137
3138         vcpu->arch.apf.msr_int_val = data;
3139
3140         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3141
3142         return 0;
3143 }
3144
3145 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3146 {
3147         vcpu->arch.pv_time_enabled = false;
3148         vcpu->arch.time = 0;
3149 }
3150
3151 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3152 {
3153         ++vcpu->stat.tlb_flush;
3154         static_call(kvm_x86_tlb_flush_all)(vcpu);
3155 }
3156
3157 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3158 {
3159         ++vcpu->stat.tlb_flush;
3160
3161         if (!tdp_enabled) {
3162                /*
3163                  * A TLB flush on behalf of the guest is equivalent to
3164                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3165                  * a forced sync of the shadow page tables.  Unload the
3166                  * entire MMU here and the subsequent load will sync the
3167                  * shadow page tables, and also flush the TLB.
3168                  */
3169                 kvm_mmu_unload(vcpu);
3170                 return;
3171         }
3172
3173         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3174 }
3175
3176 static void record_steal_time(struct kvm_vcpu *vcpu)
3177 {
3178         struct kvm_host_map map;
3179         struct kvm_steal_time *st;
3180
3181         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3182                 kvm_xen_runstate_set_running(vcpu);
3183                 return;
3184         }
3185
3186         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3187                 return;
3188
3189         /* -EAGAIN is returned in atomic context so we can just return. */
3190         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3191                         &map, &vcpu->arch.st.cache, false))
3192                 return;
3193
3194         st = map.hva +
3195                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3196
3197         /*
3198          * Doing a TLB flush here, on the guest's behalf, can avoid
3199          * expensive IPIs.
3200          */
3201         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3202                 u8 st_preempted = xchg(&st->preempted, 0);
3203
3204                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3205                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3206                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3207                         kvm_vcpu_flush_tlb_guest(vcpu);
3208         } else {
3209                 st->preempted = 0;
3210         }
3211
3212         vcpu->arch.st.preempted = 0;
3213
3214         if (st->version & 1)
3215                 st->version += 1;  /* first time write, random junk */
3216
3217         st->version += 1;
3218
3219         smp_wmb();
3220
3221         st->steal += current->sched_info.run_delay -
3222                 vcpu->arch.st.last_steal;
3223         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3224
3225         smp_wmb();
3226
3227         st->version += 1;
3228
3229         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3230 }
3231
3232 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3233 {
3234         bool pr = false;
3235         u32 msr = msr_info->index;
3236         u64 data = msr_info->data;
3237
3238         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3239                 return kvm_xen_write_hypercall_page(vcpu, data);
3240
3241         switch (msr) {
3242         case MSR_AMD64_NB_CFG:
3243         case MSR_IA32_UCODE_WRITE:
3244         case MSR_VM_HSAVE_PA:
3245         case MSR_AMD64_PATCH_LOADER:
3246         case MSR_AMD64_BU_CFG2:
3247         case MSR_AMD64_DC_CFG:
3248         case MSR_F15H_EX_CFG:
3249                 break;
3250
3251         case MSR_IA32_UCODE_REV:
3252                 if (msr_info->host_initiated)
3253                         vcpu->arch.microcode_version = data;
3254                 break;
3255         case MSR_IA32_ARCH_CAPABILITIES:
3256                 if (!msr_info->host_initiated)
3257                         return 1;
3258                 vcpu->arch.arch_capabilities = data;
3259                 break;
3260         case MSR_IA32_PERF_CAPABILITIES: {
3261                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3262
3263                 if (!msr_info->host_initiated)
3264                         return 1;
3265                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3266                         return 1;
3267                 if (data & ~msr_ent.data)
3268                         return 1;
3269
3270                 vcpu->arch.perf_capabilities = data;
3271
3272                 return 0;
3273                 }
3274         case MSR_EFER:
3275                 return set_efer(vcpu, msr_info);
3276         case MSR_K7_HWCR:
3277                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3278                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3279                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3280
3281                 /* Handle McStatusWrEn */
3282                 if (data == BIT_ULL(18)) {
3283                         vcpu->arch.msr_hwcr = data;
3284                 } else if (data != 0) {
3285                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3286                                     data);
3287                         return 1;
3288                 }
3289                 break;
3290         case MSR_FAM10H_MMIO_CONF_BASE:
3291                 if (data != 0) {
3292                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3293                                     "0x%llx\n", data);
3294                         return 1;
3295                 }
3296                 break;
3297         case 0x200 ... 0x2ff:
3298                 return kvm_mtrr_set_msr(vcpu, msr, data);
3299         case MSR_IA32_APICBASE:
3300                 return kvm_set_apic_base(vcpu, msr_info);
3301         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3302                 return kvm_x2apic_msr_write(vcpu, msr, data);
3303         case MSR_IA32_TSC_DEADLINE:
3304                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3305                 break;
3306         case MSR_IA32_TSC_ADJUST:
3307                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3308                         if (!msr_info->host_initiated) {
3309                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3310                                 adjust_tsc_offset_guest(vcpu, adj);
3311                                 /* Before back to guest, tsc_timestamp must be adjusted
3312                                  * as well, otherwise guest's percpu pvclock time could jump.
3313                                  */
3314                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3315                         }
3316                         vcpu->arch.ia32_tsc_adjust_msr = data;
3317                 }
3318                 break;
3319         case MSR_IA32_MISC_ENABLE:
3320                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3321                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3322                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3323                                 return 1;
3324                         vcpu->arch.ia32_misc_enable_msr = data;
3325                         kvm_update_cpuid_runtime(vcpu);
3326                 } else {
3327                         vcpu->arch.ia32_misc_enable_msr = data;
3328                 }
3329                 break;
3330         case MSR_IA32_SMBASE:
3331                 if (!msr_info->host_initiated)
3332                         return 1;
3333                 vcpu->arch.smbase = data;
3334                 break;
3335         case MSR_IA32_POWER_CTL:
3336                 vcpu->arch.msr_ia32_power_ctl = data;
3337                 break;
3338         case MSR_IA32_TSC:
3339                 if (msr_info->host_initiated) {
3340                         kvm_synchronize_tsc(vcpu, data);
3341                 } else {
3342                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3343                         adjust_tsc_offset_guest(vcpu, adj);
3344                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3345                 }
3346                 break;
3347         case MSR_IA32_XSS:
3348                 if (!msr_info->host_initiated &&
3349                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3350                         return 1;
3351                 /*
3352                  * KVM supports exposing PT to the guest, but does not support
3353                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3354                  * XSAVES/XRSTORS to save/restore PT MSRs.
3355                  */
3356                 if (data & ~supported_xss)
3357                         return 1;
3358                 vcpu->arch.ia32_xss = data;
3359                 break;
3360         case MSR_SMI_COUNT:
3361                 if (!msr_info->host_initiated)
3362                         return 1;
3363                 vcpu->arch.smi_count = data;
3364                 break;
3365         case MSR_KVM_WALL_CLOCK_NEW:
3366                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3367                         return 1;
3368
3369                 vcpu->kvm->arch.wall_clock = data;
3370                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3371                 break;
3372         case MSR_KVM_WALL_CLOCK:
3373                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3374                         return 1;
3375
3376                 vcpu->kvm->arch.wall_clock = data;
3377                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3378                 break;
3379         case MSR_KVM_SYSTEM_TIME_NEW:
3380                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3381                         return 1;
3382
3383                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3384                 break;
3385         case MSR_KVM_SYSTEM_TIME:
3386                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3387                         return 1;
3388
3389                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3390                 break;
3391         case MSR_KVM_ASYNC_PF_EN:
3392                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3393                         return 1;
3394
3395                 if (kvm_pv_enable_async_pf(vcpu, data))
3396                         return 1;
3397                 break;
3398         case MSR_KVM_ASYNC_PF_INT:
3399                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3400                         return 1;
3401
3402                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3403                         return 1;
3404                 break;
3405         case MSR_KVM_ASYNC_PF_ACK:
3406                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3407                         return 1;
3408                 if (data & 0x1) {
3409                         vcpu->arch.apf.pageready_pending = false;
3410                         kvm_check_async_pf_completion(vcpu);
3411                 }
3412                 break;
3413         case MSR_KVM_STEAL_TIME:
3414                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3415                         return 1;
3416
3417                 if (unlikely(!sched_info_on()))
3418                         return 1;
3419
3420                 if (data & KVM_STEAL_RESERVED_MASK)
3421                         return 1;
3422
3423                 vcpu->arch.st.msr_val = data;
3424
3425                 if (!(data & KVM_MSR_ENABLED))
3426                         break;
3427
3428                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3429
3430                 break;
3431         case MSR_KVM_PV_EOI_EN:
3432                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3433                         return 1;
3434
3435                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3436                         return 1;
3437                 break;
3438
3439         case MSR_KVM_POLL_CONTROL:
3440                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3441                         return 1;
3442
3443                 /* only enable bit supported */
3444                 if (data & (-1ULL << 1))
3445                         return 1;
3446
3447                 vcpu->arch.msr_kvm_poll_control = data;
3448                 break;
3449
3450         case MSR_IA32_MCG_CTL:
3451         case MSR_IA32_MCG_STATUS:
3452         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3453                 return set_msr_mce(vcpu, msr_info);
3454
3455         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3456         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3457                 pr = true;
3458                 fallthrough;
3459         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3460         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3461                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3462                         return kvm_pmu_set_msr(vcpu, msr_info);
3463
3464                 if (pr || data != 0)
3465                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3466                                     "0x%x data 0x%llx\n", msr, data);
3467                 break;
3468         case MSR_K7_CLK_CTL:
3469                 /*
3470                  * Ignore all writes to this no longer documented MSR.
3471                  * Writes are only relevant for old K7 processors,
3472                  * all pre-dating SVM, but a recommended workaround from
3473                  * AMD for these chips. It is possible to specify the
3474                  * affected processor models on the command line, hence
3475                  * the need to ignore the workaround.
3476                  */
3477                 break;
3478         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3479         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3480         case HV_X64_MSR_SYNDBG_OPTIONS:
3481         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3482         case HV_X64_MSR_CRASH_CTL:
3483         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3484         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3485         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3486         case HV_X64_MSR_TSC_EMULATION_STATUS:
3487                 return kvm_hv_set_msr_common(vcpu, msr, data,
3488                                              msr_info->host_initiated);
3489         case MSR_IA32_BBL_CR_CTL3:
3490                 /* Drop writes to this legacy MSR -- see rdmsr
3491                  * counterpart for further detail.
3492                  */
3493                 if (report_ignored_msrs)
3494                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3495                                 msr, data);
3496                 break;
3497         case MSR_AMD64_OSVW_ID_LENGTH:
3498                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3499                         return 1;
3500                 vcpu->arch.osvw.length = data;
3501                 break;
3502         case MSR_AMD64_OSVW_STATUS:
3503                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3504                         return 1;
3505                 vcpu->arch.osvw.status = data;
3506                 break;
3507         case MSR_PLATFORM_INFO:
3508                 if (!msr_info->host_initiated ||
3509                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3510                      cpuid_fault_enabled(vcpu)))
3511                         return 1;
3512                 vcpu->arch.msr_platform_info = data;
3513                 break;
3514         case MSR_MISC_FEATURES_ENABLES:
3515                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3516                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3517                      !supports_cpuid_fault(vcpu)))
3518                         return 1;
3519                 vcpu->arch.msr_misc_features_enables = data;
3520                 break;
3521         default:
3522                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3523                         return kvm_pmu_set_msr(vcpu, msr_info);
3524                 return KVM_MSR_RET_INVALID;
3525         }
3526         return 0;
3527 }
3528 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3529
3530 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3531 {
3532         u64 data;
3533         u64 mcg_cap = vcpu->arch.mcg_cap;
3534         unsigned bank_num = mcg_cap & 0xff;
3535
3536         switch (msr) {
3537         case MSR_IA32_P5_MC_ADDR:
3538         case MSR_IA32_P5_MC_TYPE:
3539                 data = 0;
3540                 break;
3541         case MSR_IA32_MCG_CAP:
3542                 data = vcpu->arch.mcg_cap;
3543                 break;
3544         case MSR_IA32_MCG_CTL:
3545                 if (!(mcg_cap & MCG_CTL_P) && !host)
3546                         return 1;
3547                 data = vcpu->arch.mcg_ctl;
3548                 break;
3549         case MSR_IA32_MCG_STATUS:
3550                 data = vcpu->arch.mcg_status;
3551                 break;
3552         default:
3553                 if (msr >= MSR_IA32_MC0_CTL &&
3554                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3555                         u32 offset = array_index_nospec(
3556                                 msr - MSR_IA32_MC0_CTL,
3557                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3558
3559                         data = vcpu->arch.mce_banks[offset];
3560                         break;
3561                 }
3562                 return 1;
3563         }
3564         *pdata = data;
3565         return 0;
3566 }
3567
3568 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3569 {
3570         switch (msr_info->index) {
3571         case MSR_IA32_PLATFORM_ID:
3572         case MSR_IA32_EBL_CR_POWERON:
3573         case MSR_IA32_LASTBRANCHFROMIP:
3574         case MSR_IA32_LASTBRANCHTOIP:
3575         case MSR_IA32_LASTINTFROMIP:
3576         case MSR_IA32_LASTINTTOIP:
3577         case MSR_AMD64_SYSCFG:
3578         case MSR_K8_TSEG_ADDR:
3579         case MSR_K8_TSEG_MASK:
3580         case MSR_VM_HSAVE_PA:
3581         case MSR_K8_INT_PENDING_MSG:
3582         case MSR_AMD64_NB_CFG:
3583         case MSR_FAM10H_MMIO_CONF_BASE:
3584         case MSR_AMD64_BU_CFG2:
3585         case MSR_IA32_PERF_CTL:
3586         case MSR_AMD64_DC_CFG:
3587         case MSR_F15H_EX_CFG:
3588         /*
3589          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3590          * limit) MSRs. Just return 0, as we do not want to expose the host
3591          * data here. Do not conditionalize this on CPUID, as KVM does not do
3592          * so for existing CPU-specific MSRs.
3593          */
3594         case MSR_RAPL_POWER_UNIT:
3595         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3596         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3597         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3598         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3599                 msr_info->data = 0;
3600                 break;
3601         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3602                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3603                         return kvm_pmu_get_msr(vcpu, msr_info);
3604                 if (!msr_info->host_initiated)
3605                         return 1;
3606                 msr_info->data = 0;
3607                 break;
3608         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3609         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3610         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3611         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3612                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3613                         return kvm_pmu_get_msr(vcpu, msr_info);
3614                 msr_info->data = 0;
3615                 break;
3616         case MSR_IA32_UCODE_REV:
3617                 msr_info->data = vcpu->arch.microcode_version;
3618                 break;
3619         case MSR_IA32_ARCH_CAPABILITIES:
3620                 if (!msr_info->host_initiated &&
3621                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3622                         return 1;
3623                 msr_info->data = vcpu->arch.arch_capabilities;
3624                 break;
3625         case MSR_IA32_PERF_CAPABILITIES:
3626                 if (!msr_info->host_initiated &&
3627                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3628                         return 1;
3629                 msr_info->data = vcpu->arch.perf_capabilities;
3630                 break;
3631         case MSR_IA32_POWER_CTL:
3632                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3633                 break;
3634         case MSR_IA32_TSC: {
3635                 /*
3636                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3637                  * even when not intercepted. AMD manual doesn't explicitly
3638                  * state this but appears to behave the same.
3639                  *
3640                  * On userspace reads and writes, however, we unconditionally
3641                  * return L1's TSC value to ensure backwards-compatible
3642                  * behavior for migration.
3643                  */
3644                 u64 offset, ratio;
3645
3646                 if (msr_info->host_initiated) {
3647                         offset = vcpu->arch.l1_tsc_offset;
3648                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3649                 } else {
3650                         offset = vcpu->arch.tsc_offset;
3651                         ratio = vcpu->arch.tsc_scaling_ratio;
3652                 }
3653
3654                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3655                 break;
3656         }
3657         case MSR_MTRRcap:
3658         case 0x200 ... 0x2ff:
3659                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3660         case 0xcd: /* fsb frequency */
3661                 msr_info->data = 3;
3662                 break;
3663                 /*
3664                  * MSR_EBC_FREQUENCY_ID
3665                  * Conservative value valid for even the basic CPU models.
3666                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3667                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3668                  * and 266MHz for model 3, or 4. Set Core Clock
3669                  * Frequency to System Bus Frequency Ratio to 1 (bits
3670                  * 31:24) even though these are only valid for CPU
3671                  * models > 2, however guests may end up dividing or
3672                  * multiplying by zero otherwise.
3673                  */
3674         case MSR_EBC_FREQUENCY_ID:
3675                 msr_info->data = 1 << 24;
3676                 break;
3677         case MSR_IA32_APICBASE:
3678                 msr_info->data = kvm_get_apic_base(vcpu);
3679                 break;
3680         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3681                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3682         case MSR_IA32_TSC_DEADLINE:
3683                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3684                 break;
3685         case MSR_IA32_TSC_ADJUST:
3686                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3687                 break;
3688         case MSR_IA32_MISC_ENABLE:
3689                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3690                 break;
3691         case MSR_IA32_SMBASE:
3692                 if (!msr_info->host_initiated)
3693                         return 1;
3694                 msr_info->data = vcpu->arch.smbase;
3695                 break;
3696         case MSR_SMI_COUNT:
3697                 msr_info->data = vcpu->arch.smi_count;
3698                 break;
3699         case MSR_IA32_PERF_STATUS:
3700                 /* TSC increment by tick */
3701                 msr_info->data = 1000ULL;
3702                 /* CPU multiplier */
3703                 msr_info->data |= (((uint64_t)4ULL) << 40);
3704                 break;
3705         case MSR_EFER:
3706                 msr_info->data = vcpu->arch.efer;
3707                 break;
3708         case MSR_KVM_WALL_CLOCK:
3709                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3710                         return 1;
3711
3712                 msr_info->data = vcpu->kvm->arch.wall_clock;
3713                 break;
3714         case MSR_KVM_WALL_CLOCK_NEW:
3715                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3716                         return 1;
3717
3718                 msr_info->data = vcpu->kvm->arch.wall_clock;
3719                 break;
3720         case MSR_KVM_SYSTEM_TIME:
3721                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3722                         return 1;
3723
3724                 msr_info->data = vcpu->arch.time;
3725                 break;
3726         case MSR_KVM_SYSTEM_TIME_NEW:
3727                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3728                         return 1;
3729
3730                 msr_info->data = vcpu->arch.time;
3731                 break;
3732         case MSR_KVM_ASYNC_PF_EN:
3733                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3734                         return 1;
3735
3736                 msr_info->data = vcpu->arch.apf.msr_en_val;
3737                 break;
3738         case MSR_KVM_ASYNC_PF_INT:
3739                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3740                         return 1;
3741
3742                 msr_info->data = vcpu->arch.apf.msr_int_val;
3743                 break;
3744         case MSR_KVM_ASYNC_PF_ACK:
3745                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3746                         return 1;
3747
3748                 msr_info->data = 0;
3749                 break;
3750         case MSR_KVM_STEAL_TIME:
3751                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3752                         return 1;
3753
3754                 msr_info->data = vcpu->arch.st.msr_val;
3755                 break;
3756         case MSR_KVM_PV_EOI_EN:
3757                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3758                         return 1;
3759
3760                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3761                 break;
3762         case MSR_KVM_POLL_CONTROL:
3763                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3764                         return 1;
3765
3766                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3767                 break;
3768         case MSR_IA32_P5_MC_ADDR:
3769         case MSR_IA32_P5_MC_TYPE:
3770         case MSR_IA32_MCG_CAP:
3771         case MSR_IA32_MCG_CTL:
3772         case MSR_IA32_MCG_STATUS:
3773         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3774                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3775                                    msr_info->host_initiated);
3776         case MSR_IA32_XSS:
3777                 if (!msr_info->host_initiated &&
3778                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3779                         return 1;
3780                 msr_info->data = vcpu->arch.ia32_xss;
3781                 break;
3782         case MSR_K7_CLK_CTL:
3783                 /*
3784                  * Provide expected ramp-up count for K7. All other
3785                  * are set to zero, indicating minimum divisors for
3786                  * every field.
3787                  *
3788                  * This prevents guest kernels on AMD host with CPU
3789                  * type 6, model 8 and higher from exploding due to
3790                  * the rdmsr failing.
3791                  */
3792                 msr_info->data = 0x20000000;
3793                 break;
3794         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3795         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3796         case HV_X64_MSR_SYNDBG_OPTIONS:
3797         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3798         case HV_X64_MSR_CRASH_CTL:
3799         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3800         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3801         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3802         case HV_X64_MSR_TSC_EMULATION_STATUS:
3803                 return kvm_hv_get_msr_common(vcpu,
3804                                              msr_info->index, &msr_info->data,
3805                                              msr_info->host_initiated);
3806         case MSR_IA32_BBL_CR_CTL3:
3807                 /* This legacy MSR exists but isn't fully documented in current
3808                  * silicon.  It is however accessed by winxp in very narrow
3809                  * scenarios where it sets bit #19, itself documented as
3810                  * a "reserved" bit.  Best effort attempt to source coherent
3811                  * read data here should the balance of the register be
3812                  * interpreted by the guest:
3813                  *
3814                  * L2 cache control register 3: 64GB range, 256KB size,
3815                  * enabled, latency 0x1, configured
3816                  */
3817                 msr_info->data = 0xbe702111;
3818                 break;
3819         case MSR_AMD64_OSVW_ID_LENGTH:
3820                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3821                         return 1;
3822                 msr_info->data = vcpu->arch.osvw.length;
3823                 break;
3824         case MSR_AMD64_OSVW_STATUS:
3825                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3826                         return 1;
3827                 msr_info->data = vcpu->arch.osvw.status;
3828                 break;
3829         case MSR_PLATFORM_INFO:
3830                 if (!msr_info->host_initiated &&
3831                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3832                         return 1;
3833                 msr_info->data = vcpu->arch.msr_platform_info;
3834                 break;
3835         case MSR_MISC_FEATURES_ENABLES:
3836                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3837                 break;
3838         case MSR_K7_HWCR:
3839                 msr_info->data = vcpu->arch.msr_hwcr;
3840                 break;
3841         default:
3842                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3843                         return kvm_pmu_get_msr(vcpu, msr_info);
3844                 return KVM_MSR_RET_INVALID;
3845         }
3846         return 0;
3847 }
3848 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3849
3850 /*
3851  * Read or write a bunch of msrs. All parameters are kernel addresses.
3852  *
3853  * @return number of msrs set successfully.
3854  */
3855 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3856                     struct kvm_msr_entry *entries,
3857                     int (*do_msr)(struct kvm_vcpu *vcpu,
3858                                   unsigned index, u64 *data))
3859 {
3860         int i;
3861
3862         for (i = 0; i < msrs->nmsrs; ++i)
3863                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3864                         break;
3865
3866         return i;
3867 }
3868
3869 /*
3870  * Read or write a bunch of msrs. Parameters are user addresses.
3871  *
3872  * @return number of msrs set successfully.
3873  */
3874 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3875                   int (*do_msr)(struct kvm_vcpu *vcpu,
3876                                 unsigned index, u64 *data),
3877                   int writeback)
3878 {
3879         struct kvm_msrs msrs;
3880         struct kvm_msr_entry *entries;
3881         int r, n;
3882         unsigned size;
3883
3884         r = -EFAULT;
3885         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3886                 goto out;
3887
3888         r = -E2BIG;
3889         if (msrs.nmsrs >= MAX_IO_MSRS)
3890                 goto out;
3891
3892         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3893         entries = memdup_user(user_msrs->entries, size);
3894         if (IS_ERR(entries)) {
3895                 r = PTR_ERR(entries);
3896                 goto out;
3897         }
3898
3899         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3900         if (r < 0)
3901                 goto out_free;
3902
3903         r = -EFAULT;
3904         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3905                 goto out_free;
3906
3907         r = n;
3908
3909 out_free:
3910         kfree(entries);
3911 out:
3912         return r;
3913 }
3914
3915 static inline bool kvm_can_mwait_in_guest(void)
3916 {
3917         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3918                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3919                 boot_cpu_has(X86_FEATURE_ARAT);
3920 }
3921
3922 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3923                                             struct kvm_cpuid2 __user *cpuid_arg)
3924 {
3925         struct kvm_cpuid2 cpuid;
3926         int r;
3927
3928         r = -EFAULT;
3929         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3930                 return r;
3931
3932         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3933         if (r)
3934                 return r;
3935
3936         r = -EFAULT;
3937         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3938                 return r;
3939
3940         return 0;
3941 }
3942
3943 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3944 {
3945         int r = 0;
3946
3947         switch (ext) {
3948         case KVM_CAP_IRQCHIP:
3949         case KVM_CAP_HLT:
3950         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3951         case KVM_CAP_SET_TSS_ADDR:
3952         case KVM_CAP_EXT_CPUID:
3953         case KVM_CAP_EXT_EMUL_CPUID:
3954         case KVM_CAP_CLOCKSOURCE:
3955         case KVM_CAP_PIT:
3956         case KVM_CAP_NOP_IO_DELAY:
3957         case KVM_CAP_MP_STATE:
3958         case KVM_CAP_SYNC_MMU:
3959         case KVM_CAP_USER_NMI:
3960         case KVM_CAP_REINJECT_CONTROL:
3961         case KVM_CAP_IRQ_INJECT_STATUS:
3962         case KVM_CAP_IOEVENTFD:
3963         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3964         case KVM_CAP_PIT2:
3965         case KVM_CAP_PIT_STATE2:
3966         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3967         case KVM_CAP_VCPU_EVENTS:
3968         case KVM_CAP_HYPERV:
3969         case KVM_CAP_HYPERV_VAPIC:
3970         case KVM_CAP_HYPERV_SPIN:
3971         case KVM_CAP_HYPERV_SYNIC:
3972         case KVM_CAP_HYPERV_SYNIC2:
3973         case KVM_CAP_HYPERV_VP_INDEX:
3974         case KVM_CAP_HYPERV_EVENTFD:
3975         case KVM_CAP_HYPERV_TLBFLUSH:
3976         case KVM_CAP_HYPERV_SEND_IPI:
3977         case KVM_CAP_HYPERV_CPUID:
3978         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3979         case KVM_CAP_SYS_HYPERV_CPUID:
3980         case KVM_CAP_PCI_SEGMENT:
3981         case KVM_CAP_DEBUGREGS:
3982         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3983         case KVM_CAP_XSAVE:
3984         case KVM_CAP_ASYNC_PF:
3985         case KVM_CAP_ASYNC_PF_INT:
3986         case KVM_CAP_GET_TSC_KHZ:
3987         case KVM_CAP_KVMCLOCK_CTRL:
3988         case KVM_CAP_READONLY_MEM:
3989         case KVM_CAP_HYPERV_TIME:
3990         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3991         case KVM_CAP_TSC_DEADLINE_TIMER:
3992         case KVM_CAP_DISABLE_QUIRKS:
3993         case KVM_CAP_SET_BOOT_CPU_ID:
3994         case KVM_CAP_SPLIT_IRQCHIP:
3995         case KVM_CAP_IMMEDIATE_EXIT:
3996         case KVM_CAP_PMU_EVENT_FILTER:
3997         case KVM_CAP_GET_MSR_FEATURES:
3998         case KVM_CAP_MSR_PLATFORM_INFO:
3999         case KVM_CAP_EXCEPTION_PAYLOAD:
4000         case KVM_CAP_SET_GUEST_DEBUG:
4001         case KVM_CAP_LAST_CPU:
4002         case KVM_CAP_X86_USER_SPACE_MSR:
4003         case KVM_CAP_X86_MSR_FILTER:
4004         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4005 #ifdef CONFIG_X86_SGX_KVM
4006         case KVM_CAP_SGX_ATTRIBUTE:
4007 #endif
4008         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4009         case KVM_CAP_SREGS2:
4010         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4011                 r = 1;
4012                 break;
4013         case KVM_CAP_EXIT_HYPERCALL:
4014                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4015                 break;
4016         case KVM_CAP_SET_GUEST_DEBUG2:
4017                 return KVM_GUESTDBG_VALID_MASK;
4018 #ifdef CONFIG_KVM_XEN
4019         case KVM_CAP_XEN_HVM:
4020                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4021                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4022                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4023                 if (sched_info_on())
4024                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4025                 break;
4026 #endif
4027         case KVM_CAP_SYNC_REGS:
4028                 r = KVM_SYNC_X86_VALID_FIELDS;
4029                 break;
4030         case KVM_CAP_ADJUST_CLOCK:
4031                 r = KVM_CLOCK_TSC_STABLE;
4032                 break;
4033         case KVM_CAP_X86_DISABLE_EXITS:
4034                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4035                       KVM_X86_DISABLE_EXITS_CSTATE;
4036                 if(kvm_can_mwait_in_guest())
4037                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4038                 break;
4039         case KVM_CAP_X86_SMM:
4040                 /* SMBASE is usually relocated above 1M on modern chipsets,
4041                  * and SMM handlers might indeed rely on 4G segment limits,
4042                  * so do not report SMM to be available if real mode is
4043                  * emulated via vm86 mode.  Still, do not go to great lengths
4044                  * to avoid userspace's usage of the feature, because it is a
4045                  * fringe case that is not enabled except via specific settings
4046                  * of the module parameters.
4047                  */
4048                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4049                 break;
4050         case KVM_CAP_VAPIC:
4051                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4052                 break;
4053         case KVM_CAP_NR_VCPUS:
4054                 r = KVM_SOFT_MAX_VCPUS;
4055                 break;
4056         case KVM_CAP_MAX_VCPUS:
4057                 r = KVM_MAX_VCPUS;
4058                 break;
4059         case KVM_CAP_MAX_VCPU_ID:
4060                 r = KVM_MAX_VCPU_IDS;
4061                 break;
4062         case KVM_CAP_PV_MMU:    /* obsolete */
4063                 r = 0;
4064                 break;
4065         case KVM_CAP_MCE:
4066                 r = KVM_MAX_MCE_BANKS;
4067                 break;
4068         case KVM_CAP_XCRS:
4069                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4070                 break;
4071         case KVM_CAP_TSC_CONTROL:
4072                 r = kvm_has_tsc_control;
4073                 break;
4074         case KVM_CAP_X2APIC_API:
4075                 r = KVM_X2APIC_API_VALID_FLAGS;
4076                 break;
4077         case KVM_CAP_NESTED_STATE:
4078                 r = kvm_x86_ops.nested_ops->get_state ?
4079                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4080                 break;
4081         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4082                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4083                 break;
4084         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4085                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4086                 break;
4087         case KVM_CAP_SMALLER_MAXPHYADDR:
4088                 r = (int) allow_smaller_maxphyaddr;
4089                 break;
4090         case KVM_CAP_STEAL_TIME:
4091                 r = sched_info_on();
4092                 break;
4093         case KVM_CAP_X86_BUS_LOCK_EXIT:
4094                 if (kvm_has_bus_lock_exit)
4095                         r = KVM_BUS_LOCK_DETECTION_OFF |
4096                             KVM_BUS_LOCK_DETECTION_EXIT;
4097                 else
4098                         r = 0;
4099                 break;
4100         default:
4101                 break;
4102         }
4103         return r;
4104
4105 }
4106
4107 long kvm_arch_dev_ioctl(struct file *filp,
4108                         unsigned int ioctl, unsigned long arg)
4109 {
4110         void __user *argp = (void __user *)arg;
4111         long r;
4112
4113         switch (ioctl) {
4114         case KVM_GET_MSR_INDEX_LIST: {
4115                 struct kvm_msr_list __user *user_msr_list = argp;
4116                 struct kvm_msr_list msr_list;
4117                 unsigned n;
4118
4119                 r = -EFAULT;
4120                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4121                         goto out;
4122                 n = msr_list.nmsrs;
4123                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4124                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4125                         goto out;
4126                 r = -E2BIG;
4127                 if (n < msr_list.nmsrs)
4128                         goto out;
4129                 r = -EFAULT;
4130                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4131                                  num_msrs_to_save * sizeof(u32)))
4132                         goto out;
4133                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4134                                  &emulated_msrs,
4135                                  num_emulated_msrs * sizeof(u32)))
4136                         goto out;
4137                 r = 0;
4138                 break;
4139         }
4140         case KVM_GET_SUPPORTED_CPUID:
4141         case KVM_GET_EMULATED_CPUID: {
4142                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4143                 struct kvm_cpuid2 cpuid;
4144
4145                 r = -EFAULT;
4146                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4147                         goto out;
4148
4149                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4150                                             ioctl);
4151                 if (r)
4152                         goto out;
4153
4154                 r = -EFAULT;
4155                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4156                         goto out;
4157                 r = 0;
4158                 break;
4159         }
4160         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4161                 r = -EFAULT;
4162                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4163                                  sizeof(kvm_mce_cap_supported)))
4164                         goto out;
4165                 r = 0;
4166                 break;
4167         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4168                 struct kvm_msr_list __user *user_msr_list = argp;
4169                 struct kvm_msr_list msr_list;
4170                 unsigned int n;
4171
4172                 r = -EFAULT;
4173                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4174                         goto out;
4175                 n = msr_list.nmsrs;
4176                 msr_list.nmsrs = num_msr_based_features;
4177                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4178                         goto out;
4179                 r = -E2BIG;
4180                 if (n < msr_list.nmsrs)
4181                         goto out;
4182                 r = -EFAULT;
4183                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4184                                  num_msr_based_features * sizeof(u32)))
4185                         goto out;
4186                 r = 0;
4187                 break;
4188         }
4189         case KVM_GET_MSRS:
4190                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4191                 break;
4192         case KVM_GET_SUPPORTED_HV_CPUID:
4193                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4194                 break;
4195         default:
4196                 r = -EINVAL;
4197                 break;
4198         }
4199 out:
4200         return r;
4201 }
4202
4203 static void wbinvd_ipi(void *garbage)
4204 {
4205         wbinvd();
4206 }
4207
4208 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4209 {
4210         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4211 }
4212
4213 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4214 {
4215         /* Address WBINVD may be executed by guest */
4216         if (need_emulate_wbinvd(vcpu)) {
4217                 if (static_call(kvm_x86_has_wbinvd_exit)())
4218                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4219                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4220                         smp_call_function_single(vcpu->cpu,
4221                                         wbinvd_ipi, NULL, 1);
4222         }
4223
4224         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4225
4226         /* Save host pkru register if supported */
4227         vcpu->arch.host_pkru = read_pkru();
4228
4229         /* Apply any externally detected TSC adjustments (due to suspend) */
4230         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4231                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4232                 vcpu->arch.tsc_offset_adjustment = 0;
4233                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4234         }
4235
4236         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4237                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4238                                 rdtsc() - vcpu->arch.last_host_tsc;
4239                 if (tsc_delta < 0)
4240                         mark_tsc_unstable("KVM discovered backwards TSC");
4241
4242                 if (kvm_check_tsc_unstable()) {
4243                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4244                                                 vcpu->arch.last_guest_tsc);
4245                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4246                         vcpu->arch.tsc_catchup = 1;
4247                 }
4248
4249                 if (kvm_lapic_hv_timer_in_use(vcpu))
4250                         kvm_lapic_restart_hv_timer(vcpu);
4251
4252                 /*
4253                  * On a host with synchronized TSC, there is no need to update
4254                  * kvmclock on vcpu->cpu migration
4255                  */
4256                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4257                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4258                 if (vcpu->cpu != cpu)
4259                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4260                 vcpu->cpu = cpu;
4261         }
4262
4263         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4264 }
4265
4266 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4267 {
4268         struct kvm_host_map map;
4269         struct kvm_steal_time *st;
4270
4271         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4272                 return;
4273
4274         if (vcpu->arch.st.preempted)
4275                 return;
4276
4277         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4278                         &vcpu->arch.st.cache, true))
4279                 return;
4280
4281         st = map.hva +
4282                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4283
4284         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4285
4286         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4287 }
4288
4289 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4290 {
4291         int idx;
4292
4293         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4294                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4295
4296         /*
4297          * Take the srcu lock as memslots will be accessed to check the gfn
4298          * cache generation against the memslots generation.
4299          */
4300         idx = srcu_read_lock(&vcpu->kvm->srcu);
4301         if (kvm_xen_msr_enabled(vcpu->kvm))
4302                 kvm_xen_runstate_set_preempted(vcpu);
4303         else
4304                 kvm_steal_time_set_preempted(vcpu);
4305         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4306
4307         static_call(kvm_x86_vcpu_put)(vcpu);
4308         vcpu->arch.last_host_tsc = rdtsc();
4309 }
4310
4311 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4312                                     struct kvm_lapic_state *s)
4313 {
4314         if (vcpu->arch.apicv_active)
4315                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4316
4317         return kvm_apic_get_state(vcpu, s);
4318 }
4319
4320 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4321                                     struct kvm_lapic_state *s)
4322 {
4323         int r;
4324
4325         r = kvm_apic_set_state(vcpu, s);
4326         if (r)
4327                 return r;
4328         update_cr8_intercept(vcpu);
4329
4330         return 0;
4331 }
4332
4333 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4334 {
4335         /*
4336          * We can accept userspace's request for interrupt injection
4337          * as long as we have a place to store the interrupt number.
4338          * The actual injection will happen when the CPU is able to
4339          * deliver the interrupt.
4340          */
4341         if (kvm_cpu_has_extint(vcpu))
4342                 return false;
4343
4344         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4345         return (!lapic_in_kernel(vcpu) ||
4346                 kvm_apic_accept_pic_intr(vcpu));
4347 }
4348
4349 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4350 {
4351         /*
4352          * Do not cause an interrupt window exit if an exception
4353          * is pending or an event needs reinjection; userspace
4354          * might want to inject the interrupt manually using KVM_SET_REGS
4355          * or KVM_SET_SREGS.  For that to work, we must be at an
4356          * instruction boundary and with no events half-injected.
4357          */
4358         return (kvm_arch_interrupt_allowed(vcpu) &&
4359                 kvm_cpu_accept_dm_intr(vcpu) &&
4360                 !kvm_event_needs_reinjection(vcpu) &&
4361                 !vcpu->arch.exception.pending);
4362 }
4363
4364 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4365                                     struct kvm_interrupt *irq)
4366 {
4367         if (irq->irq >= KVM_NR_INTERRUPTS)
4368                 return -EINVAL;
4369
4370         if (!irqchip_in_kernel(vcpu->kvm)) {
4371                 kvm_queue_interrupt(vcpu, irq->irq, false);
4372                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4373                 return 0;
4374         }
4375
4376         /*
4377          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4378          * fail for in-kernel 8259.
4379          */
4380         if (pic_in_kernel(vcpu->kvm))
4381                 return -ENXIO;
4382
4383         if (vcpu->arch.pending_external_vector != -1)
4384                 return -EEXIST;
4385
4386         vcpu->arch.pending_external_vector = irq->irq;
4387         kvm_make_request(KVM_REQ_EVENT, vcpu);
4388         return 0;
4389 }
4390
4391 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4392 {
4393         kvm_inject_nmi(vcpu);
4394
4395         return 0;
4396 }
4397
4398 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4399 {
4400         kvm_make_request(KVM_REQ_SMI, vcpu);
4401
4402         return 0;
4403 }
4404
4405 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4406                                            struct kvm_tpr_access_ctl *tac)
4407 {
4408         if (tac->flags)
4409                 return -EINVAL;
4410         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4411         return 0;
4412 }
4413
4414 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4415                                         u64 mcg_cap)
4416 {
4417         int r;
4418         unsigned bank_num = mcg_cap & 0xff, bank;
4419
4420         r = -EINVAL;
4421         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4422                 goto out;
4423         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4424                 goto out;
4425         r = 0;
4426         vcpu->arch.mcg_cap = mcg_cap;
4427         /* Init IA32_MCG_CTL to all 1s */
4428         if (mcg_cap & MCG_CTL_P)
4429                 vcpu->arch.mcg_ctl = ~(u64)0;
4430         /* Init IA32_MCi_CTL to all 1s */
4431         for (bank = 0; bank < bank_num; bank++)
4432                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4433
4434         static_call(kvm_x86_setup_mce)(vcpu);
4435 out:
4436         return r;
4437 }
4438
4439 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4440                                       struct kvm_x86_mce *mce)
4441 {
4442         u64 mcg_cap = vcpu->arch.mcg_cap;
4443         unsigned bank_num = mcg_cap & 0xff;
4444         u64 *banks = vcpu->arch.mce_banks;
4445
4446         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4447                 return -EINVAL;
4448         /*
4449          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4450          * reporting is disabled
4451          */
4452         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4453             vcpu->arch.mcg_ctl != ~(u64)0)
4454                 return 0;
4455         banks += 4 * mce->bank;
4456         /*
4457          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4458          * reporting is disabled for the bank
4459          */
4460         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4461                 return 0;
4462         if (mce->status & MCI_STATUS_UC) {
4463                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4464                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4465                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4466                         return 0;
4467                 }
4468                 if (banks[1] & MCI_STATUS_VAL)
4469                         mce->status |= MCI_STATUS_OVER;
4470                 banks[2] = mce->addr;
4471                 banks[3] = mce->misc;
4472                 vcpu->arch.mcg_status = mce->mcg_status;
4473                 banks[1] = mce->status;
4474                 kvm_queue_exception(vcpu, MC_VECTOR);
4475         } else if (!(banks[1] & MCI_STATUS_VAL)
4476                    || !(banks[1] & MCI_STATUS_UC)) {
4477                 if (banks[1] & MCI_STATUS_VAL)
4478                         mce->status |= MCI_STATUS_OVER;
4479                 banks[2] = mce->addr;
4480                 banks[3] = mce->misc;
4481                 banks[1] = mce->status;
4482         } else
4483                 banks[1] |= MCI_STATUS_OVER;
4484         return 0;
4485 }
4486
4487 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4488                                                struct kvm_vcpu_events *events)
4489 {
4490         process_nmi(vcpu);
4491
4492         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4493                 process_smi(vcpu);
4494
4495         /*
4496          * In guest mode, payload delivery should be deferred,
4497          * so that the L1 hypervisor can intercept #PF before
4498          * CR2 is modified (or intercept #DB before DR6 is
4499          * modified under nVMX). Unless the per-VM capability,
4500          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4501          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4502          * opportunistically defer the exception payload, deliver it if the
4503          * capability hasn't been requested before processing a
4504          * KVM_GET_VCPU_EVENTS.
4505          */
4506         if (!vcpu->kvm->arch.exception_payload_enabled &&
4507             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4508                 kvm_deliver_exception_payload(vcpu);
4509
4510         /*
4511          * The API doesn't provide the instruction length for software
4512          * exceptions, so don't report them. As long as the guest RIP
4513          * isn't advanced, we should expect to encounter the exception
4514          * again.
4515          */
4516         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4517                 events->exception.injected = 0;
4518                 events->exception.pending = 0;
4519         } else {
4520                 events->exception.injected = vcpu->arch.exception.injected;
4521                 events->exception.pending = vcpu->arch.exception.pending;
4522                 /*
4523                  * For ABI compatibility, deliberately conflate
4524                  * pending and injected exceptions when
4525                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4526                  */
4527                 if (!vcpu->kvm->arch.exception_payload_enabled)
4528                         events->exception.injected |=
4529                                 vcpu->arch.exception.pending;
4530         }
4531         events->exception.nr = vcpu->arch.exception.nr;
4532         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4533         events->exception.error_code = vcpu->arch.exception.error_code;
4534         events->exception_has_payload = vcpu->arch.exception.has_payload;
4535         events->exception_payload = vcpu->arch.exception.payload;
4536
4537         events->interrupt.injected =
4538                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4539         events->interrupt.nr = vcpu->arch.interrupt.nr;
4540         events->interrupt.soft = 0;
4541         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4542
4543         events->nmi.injected = vcpu->arch.nmi_injected;
4544         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4545         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4546         events->nmi.pad = 0;
4547
4548         events->sipi_vector = 0; /* never valid when reporting to user space */
4549
4550         events->smi.smm = is_smm(vcpu);
4551         events->smi.pending = vcpu->arch.smi_pending;
4552         events->smi.smm_inside_nmi =
4553                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4554         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4555
4556         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4557                          | KVM_VCPUEVENT_VALID_SHADOW
4558                          | KVM_VCPUEVENT_VALID_SMM);
4559         if (vcpu->kvm->arch.exception_payload_enabled)
4560                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4561
4562         memset(&events->reserved, 0, sizeof(events->reserved));
4563 }
4564
4565 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4566
4567 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4568                                               struct kvm_vcpu_events *events)
4569 {
4570         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4571                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4572                               | KVM_VCPUEVENT_VALID_SHADOW
4573                               | KVM_VCPUEVENT_VALID_SMM
4574                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4575                 return -EINVAL;
4576
4577         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4578                 if (!vcpu->kvm->arch.exception_payload_enabled)
4579                         return -EINVAL;
4580                 if (events->exception.pending)
4581                         events->exception.injected = 0;
4582                 else
4583                         events->exception_has_payload = 0;
4584         } else {
4585                 events->exception.pending = 0;
4586                 events->exception_has_payload = 0;
4587         }
4588
4589         if ((events->exception.injected || events->exception.pending) &&
4590             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4591                 return -EINVAL;
4592
4593         /* INITs are latched while in SMM */
4594         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4595             (events->smi.smm || events->smi.pending) &&
4596             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4597                 return -EINVAL;
4598
4599         process_nmi(vcpu);
4600         vcpu->arch.exception.injected = events->exception.injected;
4601         vcpu->arch.exception.pending = events->exception.pending;
4602         vcpu->arch.exception.nr = events->exception.nr;
4603         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4604         vcpu->arch.exception.error_code = events->exception.error_code;
4605         vcpu->arch.exception.has_payload = events->exception_has_payload;
4606         vcpu->arch.exception.payload = events->exception_payload;
4607
4608         vcpu->arch.interrupt.injected = events->interrupt.injected;
4609         vcpu->arch.interrupt.nr = events->interrupt.nr;
4610         vcpu->arch.interrupt.soft = events->interrupt.soft;
4611         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4612                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4613                                                 events->interrupt.shadow);
4614
4615         vcpu->arch.nmi_injected = events->nmi.injected;
4616         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4617                 vcpu->arch.nmi_pending = events->nmi.pending;
4618         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4619
4620         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4621             lapic_in_kernel(vcpu))
4622                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4623
4624         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4625                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4626                         kvm_smm_changed(vcpu, events->smi.smm);
4627
4628                 vcpu->arch.smi_pending = events->smi.pending;
4629
4630                 if (events->smi.smm) {
4631                         if (events->smi.smm_inside_nmi)
4632                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4633                         else
4634                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4635                 }
4636
4637                 if (lapic_in_kernel(vcpu)) {
4638                         if (events->smi.latched_init)
4639                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4640                         else
4641                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4642                 }
4643         }
4644
4645         kvm_make_request(KVM_REQ_EVENT, vcpu);
4646
4647         return 0;
4648 }
4649
4650 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4651                                              struct kvm_debugregs *dbgregs)
4652 {
4653         unsigned long val;
4654
4655         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4656         kvm_get_dr(vcpu, 6, &val);
4657         dbgregs->dr6 = val;
4658         dbgregs->dr7 = vcpu->arch.dr7;
4659         dbgregs->flags = 0;
4660         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4661 }
4662
4663 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4664                                             struct kvm_debugregs *dbgregs)
4665 {
4666         if (dbgregs->flags)
4667                 return -EINVAL;
4668
4669         if (!kvm_dr6_valid(dbgregs->dr6))
4670                 return -EINVAL;
4671         if (!kvm_dr7_valid(dbgregs->dr7))
4672                 return -EINVAL;
4673
4674         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4675         kvm_update_dr0123(vcpu);
4676         vcpu->arch.dr6 = dbgregs->dr6;
4677         vcpu->arch.dr7 = dbgregs->dr7;
4678         kvm_update_dr7(vcpu);
4679
4680         return 0;
4681 }
4682
4683 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4684
4685 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4686 {
4687         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4688         u64 xstate_bv = xsave->header.xfeatures;
4689         u64 valid;
4690
4691         /*
4692          * Copy legacy XSAVE area, to avoid complications with CPUID
4693          * leaves 0 and 1 in the loop below.
4694          */
4695         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4696
4697         /* Set XSTATE_BV */
4698         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4699         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4700
4701         /*
4702          * Copy each region from the possibly compacted offset to the
4703          * non-compacted offset.
4704          */
4705         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4706         while (valid) {
4707                 u32 size, offset, ecx, edx;
4708                 u64 xfeature_mask = valid & -valid;
4709                 int xfeature_nr = fls64(xfeature_mask) - 1;
4710                 void *src;
4711
4712                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4713                             &size, &offset, &ecx, &edx);
4714
4715                 if (xfeature_nr == XFEATURE_PKRU) {
4716                         memcpy(dest + offset, &vcpu->arch.pkru,
4717                                sizeof(vcpu->arch.pkru));
4718                 } else {
4719                         src = get_xsave_addr(xsave, xfeature_nr);
4720                         if (src)
4721                                 memcpy(dest + offset, src, size);
4722                 }
4723
4724                 valid -= xfeature_mask;
4725         }
4726 }
4727
4728 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4729 {
4730         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4731         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4732         u64 valid;
4733
4734         /*
4735          * Copy legacy XSAVE area, to avoid complications with CPUID
4736          * leaves 0 and 1 in the loop below.
4737          */
4738         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4739
4740         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4741         xsave->header.xfeatures = xstate_bv;
4742         if (boot_cpu_has(X86_FEATURE_XSAVES))
4743                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4744
4745         /*
4746          * Copy each region from the non-compacted offset to the
4747          * possibly compacted offset.
4748          */
4749         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4750         while (valid) {
4751                 u32 size, offset, ecx, edx;
4752                 u64 xfeature_mask = valid & -valid;
4753                 int xfeature_nr = fls64(xfeature_mask) - 1;
4754
4755                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4756                             &size, &offset, &ecx, &edx);
4757
4758                 if (xfeature_nr == XFEATURE_PKRU) {
4759                         memcpy(&vcpu->arch.pkru, src + offset,
4760                                sizeof(vcpu->arch.pkru));
4761                 } else {
4762                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4763
4764                         if (dest)
4765                                 memcpy(dest, src + offset, size);
4766                 }
4767
4768                 valid -= xfeature_mask;
4769         }
4770 }
4771
4772 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4773                                          struct kvm_xsave *guest_xsave)
4774 {
4775         if (!vcpu->arch.guest_fpu)
4776                 return;
4777
4778         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4779                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4780                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4781         } else {
4782                 memcpy(guest_xsave->region,
4783                         &vcpu->arch.guest_fpu->state.fxsave,
4784                         sizeof(struct fxregs_state));
4785                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4786                         XFEATURE_MASK_FPSSE;
4787         }
4788 }
4789
4790 #define XSAVE_MXCSR_OFFSET 24
4791
4792 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4793                                         struct kvm_xsave *guest_xsave)
4794 {
4795         u64 xstate_bv;
4796         u32 mxcsr;
4797
4798         if (!vcpu->arch.guest_fpu)
4799                 return 0;
4800
4801         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4802         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4803
4804         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4805                 /*
4806                  * Here we allow setting states that are not present in
4807                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4808                  * with old userspace.
4809                  */
4810                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4811                         return -EINVAL;
4812                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4813         } else {
4814                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4815                         mxcsr & ~mxcsr_feature_mask)
4816                         return -EINVAL;
4817                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4818                         guest_xsave->region, sizeof(struct fxregs_state));
4819         }
4820         return 0;
4821 }
4822
4823 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4824                                         struct kvm_xcrs *guest_xcrs)
4825 {
4826         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4827                 guest_xcrs->nr_xcrs = 0;
4828                 return;
4829         }
4830
4831         guest_xcrs->nr_xcrs = 1;
4832         guest_xcrs->flags = 0;
4833         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4834         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4835 }
4836
4837 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4838                                        struct kvm_xcrs *guest_xcrs)
4839 {
4840         int i, r = 0;
4841
4842         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4843                 return -EINVAL;
4844
4845         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4846                 return -EINVAL;
4847
4848         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4849                 /* Only support XCR0 currently */
4850                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4851                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4852                                 guest_xcrs->xcrs[i].value);
4853                         break;
4854                 }
4855         if (r)
4856                 r = -EINVAL;
4857         return r;
4858 }
4859
4860 /*
4861  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4862  * stopped by the hypervisor.  This function will be called from the host only.
4863  * EINVAL is returned when the host attempts to set the flag for a guest that
4864  * does not support pv clocks.
4865  */
4866 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4867 {
4868         if (!vcpu->arch.pv_time_enabled)
4869                 return -EINVAL;
4870         vcpu->arch.pvclock_set_guest_stopped_request = true;
4871         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4872         return 0;
4873 }
4874
4875 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4876                                      struct kvm_enable_cap *cap)
4877 {
4878         int r;
4879         uint16_t vmcs_version;
4880         void __user *user_ptr;
4881
4882         if (cap->flags)
4883                 return -EINVAL;
4884
4885         switch (cap->cap) {
4886         case KVM_CAP_HYPERV_SYNIC2:
4887                 if (cap->args[0])
4888                         return -EINVAL;
4889                 fallthrough;
4890
4891         case KVM_CAP_HYPERV_SYNIC:
4892                 if (!irqchip_in_kernel(vcpu->kvm))
4893                         return -EINVAL;
4894                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4895                                              KVM_CAP_HYPERV_SYNIC2);
4896         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4897                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4898                         return -ENOTTY;
4899                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4900                 if (!r) {
4901                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4902                         if (copy_to_user(user_ptr, &vmcs_version,
4903                                          sizeof(vmcs_version)))
4904                                 r = -EFAULT;
4905                 }
4906                 return r;
4907         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4908                 if (!kvm_x86_ops.enable_direct_tlbflush)
4909                         return -ENOTTY;
4910
4911                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4912
4913         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4914                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4915
4916         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4917                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4918                 if (vcpu->arch.pv_cpuid.enforce)
4919                         kvm_update_pv_runtime(vcpu);
4920
4921                 return 0;
4922         default:
4923                 return -EINVAL;
4924         }
4925 }
4926
4927 long kvm_arch_vcpu_ioctl(struct file *filp,
4928                          unsigned int ioctl, unsigned long arg)
4929 {
4930         struct kvm_vcpu *vcpu = filp->private_data;
4931         void __user *argp = (void __user *)arg;
4932         int r;
4933         union {
4934                 struct kvm_sregs2 *sregs2;
4935                 struct kvm_lapic_state *lapic;
4936                 struct kvm_xsave *xsave;
4937                 struct kvm_xcrs *xcrs;
4938                 void *buffer;
4939         } u;
4940
4941         vcpu_load(vcpu);
4942
4943         u.buffer = NULL;
4944         switch (ioctl) {
4945         case KVM_GET_LAPIC: {
4946                 r = -EINVAL;
4947                 if (!lapic_in_kernel(vcpu))
4948                         goto out;
4949                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4950                                 GFP_KERNEL_ACCOUNT);
4951
4952                 r = -ENOMEM;
4953                 if (!u.lapic)
4954                         goto out;
4955                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4956                 if (r)
4957                         goto out;
4958                 r = -EFAULT;
4959                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4960                         goto out;
4961                 r = 0;
4962                 break;
4963         }
4964         case KVM_SET_LAPIC: {
4965                 r = -EINVAL;
4966                 if (!lapic_in_kernel(vcpu))
4967                         goto out;
4968                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4969                 if (IS_ERR(u.lapic)) {
4970                         r = PTR_ERR(u.lapic);
4971                         goto out_nofree;
4972                 }
4973
4974                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4975                 break;
4976         }
4977         case KVM_INTERRUPT: {
4978                 struct kvm_interrupt irq;
4979
4980                 r = -EFAULT;
4981                 if (copy_from_user(&irq, argp, sizeof(irq)))
4982                         goto out;
4983                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4984                 break;
4985         }
4986         case KVM_NMI: {
4987                 r = kvm_vcpu_ioctl_nmi(vcpu);
4988                 break;
4989         }
4990         case KVM_SMI: {
4991                 r = kvm_vcpu_ioctl_smi(vcpu);
4992                 break;
4993         }
4994         case KVM_SET_CPUID: {
4995                 struct kvm_cpuid __user *cpuid_arg = argp;
4996                 struct kvm_cpuid cpuid;
4997
4998                 r = -EFAULT;
4999                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5000                         goto out;
5001                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5002                 break;
5003         }
5004         case KVM_SET_CPUID2: {
5005                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5006                 struct kvm_cpuid2 cpuid;
5007
5008                 r = -EFAULT;
5009                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5010                         goto out;
5011                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5012                                               cpuid_arg->entries);
5013                 break;
5014         }
5015         case KVM_GET_CPUID2: {
5016                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5017                 struct kvm_cpuid2 cpuid;
5018
5019                 r = -EFAULT;
5020                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5021                         goto out;
5022                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5023                                               cpuid_arg->entries);
5024                 if (r)
5025                         goto out;
5026                 r = -EFAULT;
5027                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5028                         goto out;
5029                 r = 0;
5030                 break;
5031         }
5032         case KVM_GET_MSRS: {
5033                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5034                 r = msr_io(vcpu, argp, do_get_msr, 1);
5035                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5036                 break;
5037         }
5038         case KVM_SET_MSRS: {
5039                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5040                 r = msr_io(vcpu, argp, do_set_msr, 0);
5041                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5042                 break;
5043         }
5044         case KVM_TPR_ACCESS_REPORTING: {
5045                 struct kvm_tpr_access_ctl tac;
5046
5047                 r = -EFAULT;
5048                 if (copy_from_user(&tac, argp, sizeof(tac)))
5049                         goto out;
5050                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5051                 if (r)
5052                         goto out;
5053                 r = -EFAULT;
5054                 if (copy_to_user(argp, &tac, sizeof(tac)))
5055                         goto out;
5056                 r = 0;
5057                 break;
5058         };
5059         case KVM_SET_VAPIC_ADDR: {
5060                 struct kvm_vapic_addr va;
5061                 int idx;
5062
5063                 r = -EINVAL;
5064                 if (!lapic_in_kernel(vcpu))
5065                         goto out;
5066                 r = -EFAULT;
5067                 if (copy_from_user(&va, argp, sizeof(va)))
5068                         goto out;
5069                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5070                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5071                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5072                 break;
5073         }
5074         case KVM_X86_SETUP_MCE: {
5075                 u64 mcg_cap;
5076
5077                 r = -EFAULT;
5078                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5079                         goto out;
5080                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5081                 break;
5082         }
5083         case KVM_X86_SET_MCE: {
5084                 struct kvm_x86_mce mce;
5085
5086                 r = -EFAULT;
5087                 if (copy_from_user(&mce, argp, sizeof(mce)))
5088                         goto out;
5089                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5090                 break;
5091         }
5092         case KVM_GET_VCPU_EVENTS: {
5093                 struct kvm_vcpu_events events;
5094
5095                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5096
5097                 r = -EFAULT;
5098                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5099                         break;
5100                 r = 0;
5101                 break;
5102         }
5103         case KVM_SET_VCPU_EVENTS: {
5104                 struct kvm_vcpu_events events;
5105
5106                 r = -EFAULT;
5107                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5108                         break;
5109
5110                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5111                 break;
5112         }
5113         case KVM_GET_DEBUGREGS: {
5114                 struct kvm_debugregs dbgregs;
5115
5116                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5117
5118                 r = -EFAULT;
5119                 if (copy_to_user(argp, &dbgregs,
5120                                  sizeof(struct kvm_debugregs)))
5121                         break;
5122                 r = 0;
5123                 break;
5124         }
5125         case KVM_SET_DEBUGREGS: {
5126                 struct kvm_debugregs dbgregs;
5127
5128                 r = -EFAULT;
5129                 if (copy_from_user(&dbgregs, argp,
5130                                    sizeof(struct kvm_debugregs)))
5131                         break;
5132
5133                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5134                 break;
5135         }
5136         case KVM_GET_XSAVE: {
5137                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5138                 r = -ENOMEM;
5139                 if (!u.xsave)
5140                         break;
5141
5142                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5143
5144                 r = -EFAULT;
5145                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5146                         break;
5147                 r = 0;
5148                 break;
5149         }
5150         case KVM_SET_XSAVE: {
5151                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5152                 if (IS_ERR(u.xsave)) {
5153                         r = PTR_ERR(u.xsave);
5154                         goto out_nofree;
5155                 }
5156
5157                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5158                 break;
5159         }
5160         case KVM_GET_XCRS: {
5161                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5162                 r = -ENOMEM;
5163                 if (!u.xcrs)
5164                         break;
5165
5166                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5167
5168                 r = -EFAULT;
5169                 if (copy_to_user(argp, u.xcrs,
5170                                  sizeof(struct kvm_xcrs)))
5171                         break;
5172                 r = 0;
5173                 break;
5174         }
5175         case KVM_SET_XCRS: {
5176                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5177                 if (IS_ERR(u.xcrs)) {
5178                         r = PTR_ERR(u.xcrs);
5179                         goto out_nofree;
5180                 }
5181
5182                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5183                 break;
5184         }
5185         case KVM_SET_TSC_KHZ: {
5186                 u32 user_tsc_khz;
5187
5188                 r = -EINVAL;
5189                 user_tsc_khz = (u32)arg;
5190
5191                 if (kvm_has_tsc_control &&
5192                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5193                         goto out;
5194
5195                 if (user_tsc_khz == 0)
5196                         user_tsc_khz = tsc_khz;
5197
5198                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5199                         r = 0;
5200
5201                 goto out;
5202         }
5203         case KVM_GET_TSC_KHZ: {
5204                 r = vcpu->arch.virtual_tsc_khz;
5205                 goto out;
5206         }
5207         case KVM_KVMCLOCK_CTRL: {
5208                 r = kvm_set_guest_paused(vcpu);
5209                 goto out;
5210         }
5211         case KVM_ENABLE_CAP: {
5212                 struct kvm_enable_cap cap;
5213
5214                 r = -EFAULT;
5215                 if (copy_from_user(&cap, argp, sizeof(cap)))
5216                         goto out;
5217                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5218                 break;
5219         }
5220         case KVM_GET_NESTED_STATE: {
5221                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5222                 u32 user_data_size;
5223
5224                 r = -EINVAL;
5225                 if (!kvm_x86_ops.nested_ops->get_state)
5226                         break;
5227
5228                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5229                 r = -EFAULT;
5230                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5231                         break;
5232
5233                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5234                                                      user_data_size);
5235                 if (r < 0)
5236                         break;
5237
5238                 if (r > user_data_size) {
5239                         if (put_user(r, &user_kvm_nested_state->size))
5240                                 r = -EFAULT;
5241                         else
5242                                 r = -E2BIG;
5243                         break;
5244                 }
5245
5246                 r = 0;
5247                 break;
5248         }
5249         case KVM_SET_NESTED_STATE: {
5250                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5251                 struct kvm_nested_state kvm_state;
5252                 int idx;
5253
5254                 r = -EINVAL;
5255                 if (!kvm_x86_ops.nested_ops->set_state)
5256                         break;
5257
5258                 r = -EFAULT;
5259                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5260                         break;
5261
5262                 r = -EINVAL;
5263                 if (kvm_state.size < sizeof(kvm_state))
5264                         break;
5265
5266                 if (kvm_state.flags &
5267                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5268                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5269                       | KVM_STATE_NESTED_GIF_SET))
5270                         break;
5271
5272                 /* nested_run_pending implies guest_mode.  */
5273                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5274                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5275                         break;
5276
5277                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5278                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5279                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5280                 break;
5281         }
5282         case KVM_GET_SUPPORTED_HV_CPUID:
5283                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5284                 break;
5285 #ifdef CONFIG_KVM_XEN
5286         case KVM_XEN_VCPU_GET_ATTR: {
5287                 struct kvm_xen_vcpu_attr xva;
5288
5289                 r = -EFAULT;
5290                 if (copy_from_user(&xva, argp, sizeof(xva)))
5291                         goto out;
5292                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5293                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5294                         r = -EFAULT;
5295                 break;
5296         }
5297         case KVM_XEN_VCPU_SET_ATTR: {
5298                 struct kvm_xen_vcpu_attr xva;
5299
5300                 r = -EFAULT;
5301                 if (copy_from_user(&xva, argp, sizeof(xva)))
5302                         goto out;
5303                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5304                 break;
5305         }
5306 #endif
5307         case KVM_GET_SREGS2: {
5308                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5309                 r = -ENOMEM;
5310                 if (!u.sregs2)
5311                         goto out;
5312                 __get_sregs2(vcpu, u.sregs2);
5313                 r = -EFAULT;
5314                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5315                         goto out;
5316                 r = 0;
5317                 break;
5318         }
5319         case KVM_SET_SREGS2: {
5320                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5321                 if (IS_ERR(u.sregs2)) {
5322                         r = PTR_ERR(u.sregs2);
5323                         u.sregs2 = NULL;
5324                         goto out;
5325                 }
5326                 r = __set_sregs2(vcpu, u.sregs2);
5327                 break;
5328         }
5329         default:
5330                 r = -EINVAL;
5331         }
5332 out:
5333         kfree(u.buffer);
5334 out_nofree:
5335         vcpu_put(vcpu);
5336         return r;
5337 }
5338
5339 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5340 {
5341         return VM_FAULT_SIGBUS;
5342 }
5343
5344 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5345 {
5346         int ret;
5347
5348         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5349                 return -EINVAL;
5350         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5351         return ret;
5352 }
5353
5354 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5355                                               u64 ident_addr)
5356 {
5357         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5358 }
5359
5360 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5361                                          unsigned long kvm_nr_mmu_pages)
5362 {
5363         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5364                 return -EINVAL;
5365
5366         mutex_lock(&kvm->slots_lock);
5367
5368         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5369         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5370
5371         mutex_unlock(&kvm->slots_lock);
5372         return 0;
5373 }
5374
5375 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5376 {
5377         return kvm->arch.n_max_mmu_pages;
5378 }
5379
5380 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5381 {
5382         struct kvm_pic *pic = kvm->arch.vpic;
5383         int r;
5384
5385         r = 0;
5386         switch (chip->chip_id) {
5387         case KVM_IRQCHIP_PIC_MASTER:
5388                 memcpy(&chip->chip.pic, &pic->pics[0],
5389                         sizeof(struct kvm_pic_state));
5390                 break;
5391         case KVM_IRQCHIP_PIC_SLAVE:
5392                 memcpy(&chip->chip.pic, &pic->pics[1],
5393                         sizeof(struct kvm_pic_state));
5394                 break;
5395         case KVM_IRQCHIP_IOAPIC:
5396                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5397                 break;
5398         default:
5399                 r = -EINVAL;
5400                 break;
5401         }
5402         return r;
5403 }
5404
5405 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5406 {
5407         struct kvm_pic *pic = kvm->arch.vpic;
5408         int r;
5409
5410         r = 0;
5411         switch (chip->chip_id) {
5412         case KVM_IRQCHIP_PIC_MASTER:
5413                 spin_lock(&pic->lock);
5414                 memcpy(&pic->pics[0], &chip->chip.pic,
5415                         sizeof(struct kvm_pic_state));
5416                 spin_unlock(&pic->lock);
5417                 break;
5418         case KVM_IRQCHIP_PIC_SLAVE:
5419                 spin_lock(&pic->lock);
5420                 memcpy(&pic->pics[1], &chip->chip.pic,
5421                         sizeof(struct kvm_pic_state));
5422                 spin_unlock(&pic->lock);
5423                 break;
5424         case KVM_IRQCHIP_IOAPIC:
5425                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5426                 break;
5427         default:
5428                 r = -EINVAL;
5429                 break;
5430         }
5431         kvm_pic_update_irq(pic);
5432         return r;
5433 }
5434
5435 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5436 {
5437         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5438
5439         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5440
5441         mutex_lock(&kps->lock);
5442         memcpy(ps, &kps->channels, sizeof(*ps));
5443         mutex_unlock(&kps->lock);
5444         return 0;
5445 }
5446
5447 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5448 {
5449         int i;
5450         struct kvm_pit *pit = kvm->arch.vpit;
5451
5452         mutex_lock(&pit->pit_state.lock);
5453         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5454         for (i = 0; i < 3; i++)
5455                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5456         mutex_unlock(&pit->pit_state.lock);
5457         return 0;
5458 }
5459
5460 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5461 {
5462         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5463         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5464                 sizeof(ps->channels));
5465         ps->flags = kvm->arch.vpit->pit_state.flags;
5466         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5467         memset(&ps->reserved, 0, sizeof(ps->reserved));
5468         return 0;
5469 }
5470
5471 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5472 {
5473         int start = 0;
5474         int i;
5475         u32 prev_legacy, cur_legacy;
5476         struct kvm_pit *pit = kvm->arch.vpit;
5477
5478         mutex_lock(&pit->pit_state.lock);
5479         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5480         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5481         if (!prev_legacy && cur_legacy)
5482                 start = 1;
5483         memcpy(&pit->pit_state.channels, &ps->channels,
5484                sizeof(pit->pit_state.channels));
5485         pit->pit_state.flags = ps->flags;
5486         for (i = 0; i < 3; i++)
5487                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5488                                    start && i == 0);
5489         mutex_unlock(&pit->pit_state.lock);
5490         return 0;
5491 }
5492
5493 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5494                                  struct kvm_reinject_control *control)
5495 {
5496         struct kvm_pit *pit = kvm->arch.vpit;
5497
5498         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5499          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5500          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5501          */
5502         mutex_lock(&pit->pit_state.lock);
5503         kvm_pit_set_reinject(pit, control->pit_reinject);
5504         mutex_unlock(&pit->pit_state.lock);
5505
5506         return 0;
5507 }
5508
5509 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5510 {
5511
5512         /*
5513          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5514          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5515          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5516          * VM-Exit.
5517          */
5518         struct kvm_vcpu *vcpu;
5519         int i;
5520
5521         kvm_for_each_vcpu(i, vcpu, kvm)
5522                 kvm_vcpu_kick(vcpu);
5523 }
5524
5525 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5526                         bool line_status)
5527 {
5528         if (!irqchip_in_kernel(kvm))
5529                 return -ENXIO;
5530
5531         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5532                                         irq_event->irq, irq_event->level,
5533                                         line_status);
5534         return 0;
5535 }
5536
5537 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5538                             struct kvm_enable_cap *cap)
5539 {
5540         int r;
5541
5542         if (cap->flags)
5543                 return -EINVAL;
5544
5545         switch (cap->cap) {
5546         case KVM_CAP_DISABLE_QUIRKS:
5547                 kvm->arch.disabled_quirks = cap->args[0];
5548                 r = 0;
5549                 break;
5550         case KVM_CAP_SPLIT_IRQCHIP: {
5551                 mutex_lock(&kvm->lock);
5552                 r = -EINVAL;
5553                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5554                         goto split_irqchip_unlock;
5555                 r = -EEXIST;
5556                 if (irqchip_in_kernel(kvm))
5557                         goto split_irqchip_unlock;
5558                 if (kvm->created_vcpus)
5559                         goto split_irqchip_unlock;
5560                 r = kvm_setup_empty_irq_routing(kvm);
5561                 if (r)
5562                         goto split_irqchip_unlock;
5563                 /* Pairs with irqchip_in_kernel. */
5564                 smp_wmb();
5565                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5566                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5567                 r = 0;
5568 split_irqchip_unlock:
5569                 mutex_unlock(&kvm->lock);
5570                 break;
5571         }
5572         case KVM_CAP_X2APIC_API:
5573                 r = -EINVAL;
5574                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5575                         break;
5576
5577                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5578                         kvm->arch.x2apic_format = true;
5579                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5580                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5581
5582                 r = 0;
5583                 break;
5584         case KVM_CAP_X86_DISABLE_EXITS:
5585                 r = -EINVAL;
5586                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5587                         break;
5588
5589                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5590                         kvm_can_mwait_in_guest())
5591                         kvm->arch.mwait_in_guest = true;
5592                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5593                         kvm->arch.hlt_in_guest = true;
5594                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5595                         kvm->arch.pause_in_guest = true;
5596                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5597                         kvm->arch.cstate_in_guest = true;
5598                 r = 0;
5599                 break;
5600         case KVM_CAP_MSR_PLATFORM_INFO:
5601                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5602                 r = 0;
5603                 break;
5604         case KVM_CAP_EXCEPTION_PAYLOAD:
5605                 kvm->arch.exception_payload_enabled = cap->args[0];
5606                 r = 0;
5607                 break;
5608         case KVM_CAP_X86_USER_SPACE_MSR:
5609                 kvm->arch.user_space_msr_mask = cap->args[0];
5610                 r = 0;
5611                 break;
5612         case KVM_CAP_X86_BUS_LOCK_EXIT:
5613                 r = -EINVAL;
5614                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5615                         break;
5616
5617                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5618                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5619                         break;
5620
5621                 if (kvm_has_bus_lock_exit &&
5622                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5623                         kvm->arch.bus_lock_detection_enabled = true;
5624                 r = 0;
5625                 break;
5626 #ifdef CONFIG_X86_SGX_KVM
5627         case KVM_CAP_SGX_ATTRIBUTE: {
5628                 unsigned long allowed_attributes = 0;
5629
5630                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5631                 if (r)
5632                         break;
5633
5634                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5635                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5636                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5637                         kvm->arch.sgx_provisioning_allowed = true;
5638                 else
5639                         r = -EINVAL;
5640                 break;
5641         }
5642 #endif
5643         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5644                 r = -EINVAL;
5645                 if (kvm_x86_ops.vm_copy_enc_context_from)
5646                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5647                 return r;
5648         case KVM_CAP_EXIT_HYPERCALL:
5649                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5650                         r = -EINVAL;
5651                         break;
5652                 }
5653                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5654                 r = 0;
5655                 break;
5656         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5657                 r = -EINVAL;
5658                 if (cap->args[0] & ~1)
5659                         break;
5660                 kvm->arch.exit_on_emulation_error = cap->args[0];
5661                 r = 0;
5662                 break;
5663         default:
5664                 r = -EINVAL;
5665                 break;
5666         }
5667         return r;
5668 }
5669
5670 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5671 {
5672         struct kvm_x86_msr_filter *msr_filter;
5673
5674         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5675         if (!msr_filter)
5676                 return NULL;
5677
5678         msr_filter->default_allow = default_allow;
5679         return msr_filter;
5680 }
5681
5682 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5683 {
5684         u32 i;
5685
5686         if (!msr_filter)
5687                 return;
5688
5689         for (i = 0; i < msr_filter->count; i++)
5690                 kfree(msr_filter->ranges[i].bitmap);
5691
5692         kfree(msr_filter);
5693 }
5694
5695 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5696                               struct kvm_msr_filter_range *user_range)
5697 {
5698         unsigned long *bitmap = NULL;
5699         size_t bitmap_size;
5700
5701         if (!user_range->nmsrs)
5702                 return 0;
5703
5704         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5705                 return -EINVAL;
5706
5707         if (!user_range->flags)
5708                 return -EINVAL;
5709
5710         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5711         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5712                 return -EINVAL;
5713
5714         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5715         if (IS_ERR(bitmap))
5716                 return PTR_ERR(bitmap);
5717
5718         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5719                 .flags = user_range->flags,
5720                 .base = user_range->base,
5721                 .nmsrs = user_range->nmsrs,
5722                 .bitmap = bitmap,
5723         };
5724
5725         msr_filter->count++;
5726         return 0;
5727 }
5728
5729 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5730 {
5731         struct kvm_msr_filter __user *user_msr_filter = argp;
5732         struct kvm_x86_msr_filter *new_filter, *old_filter;
5733         struct kvm_msr_filter filter;
5734         bool default_allow;
5735         bool empty = true;
5736         int r = 0;
5737         u32 i;
5738
5739         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5740                 return -EFAULT;
5741
5742         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5743                 empty &= !filter.ranges[i].nmsrs;
5744
5745         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5746         if (empty && !default_allow)
5747                 return -EINVAL;
5748
5749         new_filter = kvm_alloc_msr_filter(default_allow);
5750         if (!new_filter)
5751                 return -ENOMEM;
5752
5753         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5754                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5755                 if (r) {
5756                         kvm_free_msr_filter(new_filter);
5757                         return r;
5758                 }
5759         }
5760
5761         mutex_lock(&kvm->lock);
5762
5763         /* The per-VM filter is protected by kvm->lock... */
5764         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5765
5766         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5767         synchronize_srcu(&kvm->srcu);
5768
5769         kvm_free_msr_filter(old_filter);
5770
5771         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5772         mutex_unlock(&kvm->lock);
5773
5774         return 0;
5775 }
5776
5777 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5778 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5779 {
5780         struct kvm_vcpu *vcpu;
5781         int i, ret = 0;
5782
5783         mutex_lock(&kvm->lock);
5784         kvm_for_each_vcpu(i, vcpu, kvm) {
5785                 if (!vcpu->arch.pv_time_enabled)
5786                         continue;
5787
5788                 ret = kvm_set_guest_paused(vcpu);
5789                 if (ret) {
5790                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5791                                 vcpu->vcpu_id, ret);
5792                         break;
5793                 }
5794         }
5795         mutex_unlock(&kvm->lock);
5796
5797         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5798 }
5799
5800 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5801 {
5802         switch (state) {
5803         case PM_HIBERNATION_PREPARE:
5804         case PM_SUSPEND_PREPARE:
5805                 return kvm_arch_suspend_notifier(kvm);
5806         }
5807
5808         return NOTIFY_DONE;
5809 }
5810 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5811
5812 long kvm_arch_vm_ioctl(struct file *filp,
5813                        unsigned int ioctl, unsigned long arg)
5814 {
5815         struct kvm *kvm = filp->private_data;
5816         void __user *argp = (void __user *)arg;
5817         int r = -ENOTTY;
5818         /*
5819          * This union makes it completely explicit to gcc-3.x
5820          * that these two variables' stack usage should be
5821          * combined, not added together.
5822          */
5823         union {
5824                 struct kvm_pit_state ps;
5825                 struct kvm_pit_state2 ps2;
5826                 struct kvm_pit_config pit_config;
5827         } u;
5828
5829         switch (ioctl) {
5830         case KVM_SET_TSS_ADDR:
5831                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5832                 break;
5833         case KVM_SET_IDENTITY_MAP_ADDR: {
5834                 u64 ident_addr;
5835
5836                 mutex_lock(&kvm->lock);
5837                 r = -EINVAL;
5838                 if (kvm->created_vcpus)
5839                         goto set_identity_unlock;
5840                 r = -EFAULT;
5841                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5842                         goto set_identity_unlock;
5843                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5844 set_identity_unlock:
5845                 mutex_unlock(&kvm->lock);
5846                 break;
5847         }
5848         case KVM_SET_NR_MMU_PAGES:
5849                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5850                 break;
5851         case KVM_GET_NR_MMU_PAGES:
5852                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5853                 break;
5854         case KVM_CREATE_IRQCHIP: {
5855                 mutex_lock(&kvm->lock);
5856
5857                 r = -EEXIST;
5858                 if (irqchip_in_kernel(kvm))
5859                         goto create_irqchip_unlock;
5860
5861                 r = -EINVAL;
5862                 if (kvm->created_vcpus)
5863                         goto create_irqchip_unlock;
5864
5865                 r = kvm_pic_init(kvm);
5866                 if (r)
5867                         goto create_irqchip_unlock;
5868
5869                 r = kvm_ioapic_init(kvm);
5870                 if (r) {
5871                         kvm_pic_destroy(kvm);
5872                         goto create_irqchip_unlock;
5873                 }
5874
5875                 r = kvm_setup_default_irq_routing(kvm);
5876                 if (r) {
5877                         kvm_ioapic_destroy(kvm);
5878                         kvm_pic_destroy(kvm);
5879                         goto create_irqchip_unlock;
5880                 }
5881                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5882                 smp_wmb();
5883                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5884         create_irqchip_unlock:
5885                 mutex_unlock(&kvm->lock);
5886                 break;
5887         }
5888         case KVM_CREATE_PIT:
5889                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5890                 goto create_pit;
5891         case KVM_CREATE_PIT2:
5892                 r = -EFAULT;
5893                 if (copy_from_user(&u.pit_config, argp,
5894                                    sizeof(struct kvm_pit_config)))
5895                         goto out;
5896         create_pit:
5897                 mutex_lock(&kvm->lock);
5898                 r = -EEXIST;
5899                 if (kvm->arch.vpit)
5900                         goto create_pit_unlock;
5901                 r = -ENOMEM;
5902                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5903                 if (kvm->arch.vpit)
5904                         r = 0;
5905         create_pit_unlock:
5906                 mutex_unlock(&kvm->lock);
5907                 break;
5908         case KVM_GET_IRQCHIP: {
5909                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5910                 struct kvm_irqchip *chip;
5911
5912                 chip = memdup_user(argp, sizeof(*chip));
5913                 if (IS_ERR(chip)) {
5914                         r = PTR_ERR(chip);
5915                         goto out;
5916                 }
5917
5918                 r = -ENXIO;
5919                 if (!irqchip_kernel(kvm))
5920                         goto get_irqchip_out;
5921                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5922                 if (r)
5923                         goto get_irqchip_out;
5924                 r = -EFAULT;
5925                 if (copy_to_user(argp, chip, sizeof(*chip)))
5926                         goto get_irqchip_out;
5927                 r = 0;
5928         get_irqchip_out:
5929                 kfree(chip);
5930                 break;
5931         }
5932         case KVM_SET_IRQCHIP: {
5933                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5934                 struct kvm_irqchip *chip;
5935
5936                 chip = memdup_user(argp, sizeof(*chip));
5937                 if (IS_ERR(chip)) {
5938                         r = PTR_ERR(chip);
5939                         goto out;
5940                 }
5941
5942                 r = -ENXIO;
5943                 if (!irqchip_kernel(kvm))
5944                         goto set_irqchip_out;
5945                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5946         set_irqchip_out:
5947                 kfree(chip);
5948                 break;
5949         }
5950         case KVM_GET_PIT: {
5951                 r = -EFAULT;
5952                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5953                         goto out;
5954                 r = -ENXIO;
5955                 if (!kvm->arch.vpit)
5956                         goto out;
5957                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5958                 if (r)
5959                         goto out;
5960                 r = -EFAULT;
5961                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5962                         goto out;
5963                 r = 0;
5964                 break;
5965         }
5966         case KVM_SET_PIT: {
5967                 r = -EFAULT;
5968                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5969                         goto out;
5970                 mutex_lock(&kvm->lock);
5971                 r = -ENXIO;
5972                 if (!kvm->arch.vpit)
5973                         goto set_pit_out;
5974                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5975 set_pit_out:
5976                 mutex_unlock(&kvm->lock);
5977                 break;
5978         }
5979         case KVM_GET_PIT2: {
5980                 r = -ENXIO;
5981                 if (!kvm->arch.vpit)
5982                         goto out;
5983                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5984                 if (r)
5985                         goto out;
5986                 r = -EFAULT;
5987                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5988                         goto out;
5989                 r = 0;
5990                 break;
5991         }
5992         case KVM_SET_PIT2: {
5993                 r = -EFAULT;
5994                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5995                         goto out;
5996                 mutex_lock(&kvm->lock);
5997                 r = -ENXIO;
5998                 if (!kvm->arch.vpit)
5999                         goto set_pit2_out;
6000                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6001 set_pit2_out:
6002                 mutex_unlock(&kvm->lock);
6003                 break;
6004         }
6005         case KVM_REINJECT_CONTROL: {
6006                 struct kvm_reinject_control control;
6007                 r =  -EFAULT;
6008                 if (copy_from_user(&control, argp, sizeof(control)))
6009                         goto out;
6010                 r = -ENXIO;
6011                 if (!kvm->arch.vpit)
6012                         goto out;
6013                 r = kvm_vm_ioctl_reinject(kvm, &control);
6014                 break;
6015         }
6016         case KVM_SET_BOOT_CPU_ID:
6017                 r = 0;
6018                 mutex_lock(&kvm->lock);
6019                 if (kvm->created_vcpus)
6020                         r = -EBUSY;
6021                 else
6022                         kvm->arch.bsp_vcpu_id = arg;
6023                 mutex_unlock(&kvm->lock);
6024                 break;
6025 #ifdef CONFIG_KVM_XEN
6026         case KVM_XEN_HVM_CONFIG: {
6027                 struct kvm_xen_hvm_config xhc;
6028                 r = -EFAULT;
6029                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6030                         goto out;
6031                 r = kvm_xen_hvm_config(kvm, &xhc);
6032                 break;
6033         }
6034         case KVM_XEN_HVM_GET_ATTR: {
6035                 struct kvm_xen_hvm_attr xha;
6036
6037                 r = -EFAULT;
6038                 if (copy_from_user(&xha, argp, sizeof(xha)))
6039                         goto out;
6040                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6041                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6042                         r = -EFAULT;
6043                 break;
6044         }
6045         case KVM_XEN_HVM_SET_ATTR: {
6046                 struct kvm_xen_hvm_attr xha;
6047
6048                 r = -EFAULT;
6049                 if (copy_from_user(&xha, argp, sizeof(xha)))
6050                         goto out;
6051                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6052                 break;
6053         }
6054 #endif
6055         case KVM_SET_CLOCK: {
6056                 struct kvm_arch *ka = &kvm->arch;
6057                 struct kvm_clock_data user_ns;
6058                 u64 now_ns;
6059
6060                 r = -EFAULT;
6061                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6062                         goto out;
6063
6064                 r = -EINVAL;
6065                 if (user_ns.flags)
6066                         goto out;
6067
6068                 r = 0;
6069                 /*
6070                  * TODO: userspace has to take care of races with VCPU_RUN, so
6071                  * kvm_gen_update_masterclock() can be cut down to locked
6072                  * pvclock_update_vm_gtod_copy().
6073                  */
6074                 kvm_gen_update_masterclock(kvm);
6075
6076                 /*
6077                  * This pairs with kvm_guest_time_update(): when masterclock is
6078                  * in use, we use master_kernel_ns + kvmclock_offset to set
6079                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6080                  * is slightly ahead) here we risk going negative on unsigned
6081                  * 'system_time' when 'user_ns.clock' is very small.
6082                  */
6083                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6084                 if (kvm->arch.use_master_clock)
6085                         now_ns = ka->master_kernel_ns;
6086                 else
6087                         now_ns = get_kvmclock_base_ns();
6088                 ka->kvmclock_offset = user_ns.clock - now_ns;
6089                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6090
6091                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6092                 break;
6093         }
6094         case KVM_GET_CLOCK: {
6095                 struct kvm_clock_data user_ns;
6096                 u64 now_ns;
6097
6098                 now_ns = get_kvmclock_ns(kvm);
6099                 user_ns.clock = now_ns;
6100                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6101                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6102
6103                 r = -EFAULT;
6104                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6105                         goto out;
6106                 r = 0;
6107                 break;
6108         }
6109         case KVM_MEMORY_ENCRYPT_OP: {
6110                 r = -ENOTTY;
6111                 if (kvm_x86_ops.mem_enc_op)
6112                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6113                 break;
6114         }
6115         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6116                 struct kvm_enc_region region;
6117
6118                 r = -EFAULT;
6119                 if (copy_from_user(&region, argp, sizeof(region)))
6120                         goto out;
6121
6122                 r = -ENOTTY;
6123                 if (kvm_x86_ops.mem_enc_reg_region)
6124                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6125                 break;
6126         }
6127         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6128                 struct kvm_enc_region region;
6129
6130                 r = -EFAULT;
6131                 if (copy_from_user(&region, argp, sizeof(region)))
6132                         goto out;
6133
6134                 r = -ENOTTY;
6135                 if (kvm_x86_ops.mem_enc_unreg_region)
6136                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6137                 break;
6138         }
6139         case KVM_HYPERV_EVENTFD: {
6140                 struct kvm_hyperv_eventfd hvevfd;
6141
6142                 r = -EFAULT;
6143                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6144                         goto out;
6145                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6146                 break;
6147         }
6148         case KVM_SET_PMU_EVENT_FILTER:
6149                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6150                 break;
6151         case KVM_X86_SET_MSR_FILTER:
6152                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6153                 break;
6154         default:
6155                 r = -ENOTTY;
6156         }
6157 out:
6158         return r;
6159 }
6160
6161 static void kvm_init_msr_list(void)
6162 {
6163         struct x86_pmu_capability x86_pmu;
6164         u32 dummy[2];
6165         unsigned i;
6166
6167         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6168                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6169
6170         perf_get_x86_pmu_capability(&x86_pmu);
6171
6172         num_msrs_to_save = 0;
6173         num_emulated_msrs = 0;
6174         num_msr_based_features = 0;
6175
6176         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6177                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6178                         continue;
6179
6180                 /*
6181                  * Even MSRs that are valid in the host may not be exposed
6182                  * to the guests in some cases.
6183                  */
6184                 switch (msrs_to_save_all[i]) {
6185                 case MSR_IA32_BNDCFGS:
6186                         if (!kvm_mpx_supported())
6187                                 continue;
6188                         break;
6189                 case MSR_TSC_AUX:
6190                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6191                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6192                                 continue;
6193                         break;
6194                 case MSR_IA32_UMWAIT_CONTROL:
6195                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6196                                 continue;
6197                         break;
6198                 case MSR_IA32_RTIT_CTL:
6199                 case MSR_IA32_RTIT_STATUS:
6200                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6201                                 continue;
6202                         break;
6203                 case MSR_IA32_RTIT_CR3_MATCH:
6204                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6205                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6206                                 continue;
6207                         break;
6208                 case MSR_IA32_RTIT_OUTPUT_BASE:
6209                 case MSR_IA32_RTIT_OUTPUT_MASK:
6210                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6211                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6212                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6213                                 continue;
6214                         break;
6215                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6216                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6217                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6218                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6219                                 continue;
6220                         break;
6221                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6222                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6223                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6224                                 continue;
6225                         break;
6226                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6227                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6228                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6229                                 continue;
6230                         break;
6231                 default:
6232                         break;
6233                 }
6234
6235                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6236         }
6237
6238         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6239                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6240                         continue;
6241
6242                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6243         }
6244
6245         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6246                 struct kvm_msr_entry msr;
6247
6248                 msr.index = msr_based_features_all[i];
6249                 if (kvm_get_msr_feature(&msr))
6250                         continue;
6251
6252                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6253         }
6254 }
6255
6256 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6257                            const void *v)
6258 {
6259         int handled = 0;
6260         int n;
6261
6262         do {
6263                 n = min(len, 8);
6264                 if (!(lapic_in_kernel(vcpu) &&
6265                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6266                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6267                         break;
6268                 handled += n;
6269                 addr += n;
6270                 len -= n;
6271                 v += n;
6272         } while (len);
6273
6274         return handled;
6275 }
6276
6277 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6278 {
6279         int handled = 0;
6280         int n;
6281
6282         do {
6283                 n = min(len, 8);
6284                 if (!(lapic_in_kernel(vcpu) &&
6285                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6286                                          addr, n, v))
6287                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6288                         break;
6289                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6290                 handled += n;
6291                 addr += n;
6292                 len -= n;
6293                 v += n;
6294         } while (len);
6295
6296         return handled;
6297 }
6298
6299 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6300                         struct kvm_segment *var, int seg)
6301 {
6302         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6303 }
6304
6305 void kvm_get_segment(struct kvm_vcpu *vcpu,
6306                      struct kvm_segment *var, int seg)
6307 {
6308         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6309 }
6310
6311 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6312                            struct x86_exception *exception)
6313 {
6314         gpa_t t_gpa;
6315
6316         BUG_ON(!mmu_is_nested(vcpu));
6317
6318         /* NPT walks are always user-walks */
6319         access |= PFERR_USER_MASK;
6320         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6321
6322         return t_gpa;
6323 }
6324
6325 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6326                               struct x86_exception *exception)
6327 {
6328         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6329         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6330 }
6331 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6332
6333  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6334                                 struct x86_exception *exception)
6335 {
6336         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6337         access |= PFERR_FETCH_MASK;
6338         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6339 }
6340
6341 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6342                                struct x86_exception *exception)
6343 {
6344         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6345         access |= PFERR_WRITE_MASK;
6346         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6347 }
6348 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6349
6350 /* uses this to access any guest's mapped memory without checking CPL */
6351 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6352                                 struct x86_exception *exception)
6353 {
6354         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6355 }
6356
6357 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6358                                       struct kvm_vcpu *vcpu, u32 access,
6359                                       struct x86_exception *exception)
6360 {
6361         void *data = val;
6362         int r = X86EMUL_CONTINUE;
6363
6364         while (bytes) {
6365                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6366                                                             exception);
6367                 unsigned offset = addr & (PAGE_SIZE-1);
6368                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6369                 int ret;
6370
6371                 if (gpa == UNMAPPED_GVA)
6372                         return X86EMUL_PROPAGATE_FAULT;
6373                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6374                                                offset, toread);
6375                 if (ret < 0) {
6376                         r = X86EMUL_IO_NEEDED;
6377                         goto out;
6378                 }
6379
6380                 bytes -= toread;
6381                 data += toread;
6382                 addr += toread;
6383         }
6384 out:
6385         return r;
6386 }
6387
6388 /* used for instruction fetching */
6389 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6390                                 gva_t addr, void *val, unsigned int bytes,
6391                                 struct x86_exception *exception)
6392 {
6393         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6394         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6395         unsigned offset;
6396         int ret;
6397
6398         /* Inline kvm_read_guest_virt_helper for speed.  */
6399         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6400                                                     exception);
6401         if (unlikely(gpa == UNMAPPED_GVA))
6402                 return X86EMUL_PROPAGATE_FAULT;
6403
6404         offset = addr & (PAGE_SIZE-1);
6405         if (WARN_ON(offset + bytes > PAGE_SIZE))
6406                 bytes = (unsigned)PAGE_SIZE - offset;
6407         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6408                                        offset, bytes);
6409         if (unlikely(ret < 0))
6410                 return X86EMUL_IO_NEEDED;
6411
6412         return X86EMUL_CONTINUE;
6413 }
6414
6415 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6416                                gva_t addr, void *val, unsigned int bytes,
6417                                struct x86_exception *exception)
6418 {
6419         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6420
6421         /*
6422          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6423          * is returned, but our callers are not ready for that and they blindly
6424          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6425          * uninitialized kernel stack memory into cr2 and error code.
6426          */
6427         memset(exception, 0, sizeof(*exception));
6428         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6429                                           exception);
6430 }
6431 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6432
6433 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6434                              gva_t addr, void *val, unsigned int bytes,
6435                              struct x86_exception *exception, bool system)
6436 {
6437         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6438         u32 access = 0;
6439
6440         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6441                 access |= PFERR_USER_MASK;
6442
6443         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6444 }
6445
6446 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6447                 unsigned long addr, void *val, unsigned int bytes)
6448 {
6449         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6450         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6451
6452         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6453 }
6454
6455 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6456                                       struct kvm_vcpu *vcpu, u32 access,
6457                                       struct x86_exception *exception)
6458 {
6459         void *data = val;
6460         int r = X86EMUL_CONTINUE;
6461
6462         while (bytes) {
6463                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6464                                                              access,
6465                                                              exception);
6466                 unsigned offset = addr & (PAGE_SIZE-1);
6467                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6468                 int ret;
6469
6470                 if (gpa == UNMAPPED_GVA)
6471                         return X86EMUL_PROPAGATE_FAULT;
6472                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6473                 if (ret < 0) {
6474                         r = X86EMUL_IO_NEEDED;
6475                         goto out;
6476                 }
6477
6478                 bytes -= towrite;
6479                 data += towrite;
6480                 addr += towrite;
6481         }
6482 out:
6483         return r;
6484 }
6485
6486 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6487                               unsigned int bytes, struct x86_exception *exception,
6488                               bool system)
6489 {
6490         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6491         u32 access = PFERR_WRITE_MASK;
6492
6493         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6494                 access |= PFERR_USER_MASK;
6495
6496         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6497                                            access, exception);
6498 }
6499
6500 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6501                                 unsigned int bytes, struct x86_exception *exception)
6502 {
6503         /* kvm_write_guest_virt_system can pull in tons of pages. */
6504         vcpu->arch.l1tf_flush_l1d = true;
6505
6506         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6507                                            PFERR_WRITE_MASK, exception);
6508 }
6509 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6510
6511 int handle_ud(struct kvm_vcpu *vcpu)
6512 {
6513         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6514         int emul_type = EMULTYPE_TRAP_UD;
6515         char sig[5]; /* ud2; .ascii "kvm" */
6516         struct x86_exception e;
6517
6518         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6519                 return 1;
6520
6521         if (force_emulation_prefix &&
6522             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6523                                 sig, sizeof(sig), &e) == 0 &&
6524             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6525                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6526                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6527         }
6528
6529         return kvm_emulate_instruction(vcpu, emul_type);
6530 }
6531 EXPORT_SYMBOL_GPL(handle_ud);
6532
6533 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6534                             gpa_t gpa, bool write)
6535 {
6536         /* For APIC access vmexit */
6537         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6538                 return 1;
6539
6540         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6541                 trace_vcpu_match_mmio(gva, gpa, write, true);
6542                 return 1;
6543         }
6544
6545         return 0;
6546 }
6547
6548 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6549                                 gpa_t *gpa, struct x86_exception *exception,
6550                                 bool write)
6551 {
6552         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6553                 | (write ? PFERR_WRITE_MASK : 0);
6554
6555         /*
6556          * currently PKRU is only applied to ept enabled guest so
6557          * there is no pkey in EPT page table for L1 guest or EPT
6558          * shadow page table for L2 guest.
6559          */
6560         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6561             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6562                               vcpu->arch.mmio_access, 0, access))) {
6563                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6564                                         (gva & (PAGE_SIZE - 1));
6565                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6566                 return 1;
6567         }
6568
6569         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6570
6571         if (*gpa == UNMAPPED_GVA)
6572                 return -1;
6573
6574         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6575 }
6576
6577 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6578                         const void *val, int bytes)
6579 {
6580         int ret;
6581
6582         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6583         if (ret < 0)
6584                 return 0;
6585         kvm_page_track_write(vcpu, gpa, val, bytes);
6586         return 1;
6587 }
6588
6589 struct read_write_emulator_ops {
6590         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6591                                   int bytes);
6592         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6593                                   void *val, int bytes);
6594         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6595                                int bytes, void *val);
6596         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6597                                     void *val, int bytes);
6598         bool write;
6599 };
6600
6601 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6602 {
6603         if (vcpu->mmio_read_completed) {
6604                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6605                                vcpu->mmio_fragments[0].gpa, val);
6606                 vcpu->mmio_read_completed = 0;
6607                 return 1;
6608         }
6609
6610         return 0;
6611 }
6612
6613 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6614                         void *val, int bytes)
6615 {
6616         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6617 }
6618
6619 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6620                          void *val, int bytes)
6621 {
6622         return emulator_write_phys(vcpu, gpa, val, bytes);
6623 }
6624
6625 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6626 {
6627         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6628         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6629 }
6630
6631 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6632                           void *val, int bytes)
6633 {
6634         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6635         return X86EMUL_IO_NEEDED;
6636 }
6637
6638 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6639                            void *val, int bytes)
6640 {
6641         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6642
6643         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6644         return X86EMUL_CONTINUE;
6645 }
6646
6647 static const struct read_write_emulator_ops read_emultor = {
6648         .read_write_prepare = read_prepare,
6649         .read_write_emulate = read_emulate,
6650         .read_write_mmio = vcpu_mmio_read,
6651         .read_write_exit_mmio = read_exit_mmio,
6652 };
6653
6654 static const struct read_write_emulator_ops write_emultor = {
6655         .read_write_emulate = write_emulate,
6656         .read_write_mmio = write_mmio,
6657         .read_write_exit_mmio = write_exit_mmio,
6658         .write = true,
6659 };
6660
6661 static int emulator_read_write_onepage(unsigned long addr, void *val,
6662                                        unsigned int bytes,
6663                                        struct x86_exception *exception,
6664                                        struct kvm_vcpu *vcpu,
6665                                        const struct read_write_emulator_ops *ops)
6666 {
6667         gpa_t gpa;
6668         int handled, ret;
6669         bool write = ops->write;
6670         struct kvm_mmio_fragment *frag;
6671         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6672
6673         /*
6674          * If the exit was due to a NPF we may already have a GPA.
6675          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6676          * Note, this cannot be used on string operations since string
6677          * operation using rep will only have the initial GPA from the NPF
6678          * occurred.
6679          */
6680         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6681             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6682                 gpa = ctxt->gpa_val;
6683                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6684         } else {
6685                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6686                 if (ret < 0)
6687                         return X86EMUL_PROPAGATE_FAULT;
6688         }
6689
6690         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6691                 return X86EMUL_CONTINUE;
6692
6693         /*
6694          * Is this MMIO handled locally?
6695          */
6696         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6697         if (handled == bytes)
6698                 return X86EMUL_CONTINUE;
6699
6700         gpa += handled;
6701         bytes -= handled;
6702         val += handled;
6703
6704         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6705         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6706         frag->gpa = gpa;
6707         frag->data = val;
6708         frag->len = bytes;
6709         return X86EMUL_CONTINUE;
6710 }
6711
6712 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6713                         unsigned long addr,
6714                         void *val, unsigned int bytes,
6715                         struct x86_exception *exception,
6716                         const struct read_write_emulator_ops *ops)
6717 {
6718         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6719         gpa_t gpa;
6720         int rc;
6721
6722         if (ops->read_write_prepare &&
6723                   ops->read_write_prepare(vcpu, val, bytes))
6724                 return X86EMUL_CONTINUE;
6725
6726         vcpu->mmio_nr_fragments = 0;
6727
6728         /* Crossing a page boundary? */
6729         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6730                 int now;
6731
6732                 now = -addr & ~PAGE_MASK;
6733                 rc = emulator_read_write_onepage(addr, val, now, exception,
6734                                                  vcpu, ops);
6735
6736                 if (rc != X86EMUL_CONTINUE)
6737                         return rc;
6738                 addr += now;
6739                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6740                         addr = (u32)addr;
6741                 val += now;
6742                 bytes -= now;
6743         }
6744
6745         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6746                                          vcpu, ops);
6747         if (rc != X86EMUL_CONTINUE)
6748                 return rc;
6749
6750         if (!vcpu->mmio_nr_fragments)
6751                 return rc;
6752
6753         gpa = vcpu->mmio_fragments[0].gpa;
6754
6755         vcpu->mmio_needed = 1;
6756         vcpu->mmio_cur_fragment = 0;
6757
6758         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6759         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6760         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6761         vcpu->run->mmio.phys_addr = gpa;
6762
6763         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6764 }
6765
6766 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6767                                   unsigned long addr,
6768                                   void *val,
6769                                   unsigned int bytes,
6770                                   struct x86_exception *exception)
6771 {
6772         return emulator_read_write(ctxt, addr, val, bytes,
6773                                    exception, &read_emultor);
6774 }
6775
6776 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6777                             unsigned long addr,
6778                             const void *val,
6779                             unsigned int bytes,
6780                             struct x86_exception *exception)
6781 {
6782         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6783                                    exception, &write_emultor);
6784 }
6785
6786 #define CMPXCHG_TYPE(t, ptr, old, new) \
6787         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6788
6789 #ifdef CONFIG_X86_64
6790 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6791 #else
6792 #  define CMPXCHG64(ptr, old, new) \
6793         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6794 #endif
6795
6796 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6797                                      unsigned long addr,
6798                                      const void *old,
6799                                      const void *new,
6800                                      unsigned int bytes,
6801                                      struct x86_exception *exception)
6802 {
6803         struct kvm_host_map map;
6804         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6805         u64 page_line_mask;
6806         gpa_t gpa;
6807         char *kaddr;
6808         bool exchanged;
6809
6810         /* guests cmpxchg8b have to be emulated atomically */
6811         if (bytes > 8 || (bytes & (bytes - 1)))
6812                 goto emul_write;
6813
6814         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6815
6816         if (gpa == UNMAPPED_GVA ||
6817             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6818                 goto emul_write;
6819
6820         /*
6821          * Emulate the atomic as a straight write to avoid #AC if SLD is
6822          * enabled in the host and the access splits a cache line.
6823          */
6824         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6825                 page_line_mask = ~(cache_line_size() - 1);
6826         else
6827                 page_line_mask = PAGE_MASK;
6828
6829         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6830                 goto emul_write;
6831
6832         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6833                 goto emul_write;
6834
6835         kaddr = map.hva + offset_in_page(gpa);
6836
6837         switch (bytes) {
6838         case 1:
6839                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6840                 break;
6841         case 2:
6842                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6843                 break;
6844         case 4:
6845                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6846                 break;
6847         case 8:
6848                 exchanged = CMPXCHG64(kaddr, old, new);
6849                 break;
6850         default:
6851                 BUG();
6852         }
6853
6854         kvm_vcpu_unmap(vcpu, &map, true);
6855
6856         if (!exchanged)
6857                 return X86EMUL_CMPXCHG_FAILED;
6858
6859         kvm_page_track_write(vcpu, gpa, new, bytes);
6860
6861         return X86EMUL_CONTINUE;
6862
6863 emul_write:
6864         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6865
6866         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6867 }
6868
6869 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6870 {
6871         int r = 0, i;
6872
6873         for (i = 0; i < vcpu->arch.pio.count; i++) {
6874                 if (vcpu->arch.pio.in)
6875                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6876                                             vcpu->arch.pio.size, pd);
6877                 else
6878                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6879                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6880                                              pd);
6881                 if (r)
6882                         break;
6883                 pd += vcpu->arch.pio.size;
6884         }
6885         return r;
6886 }
6887
6888 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6889                                unsigned short port, void *val,
6890                                unsigned int count, bool in)
6891 {
6892         vcpu->arch.pio.port = port;
6893         vcpu->arch.pio.in = in;
6894         vcpu->arch.pio.count  = count;
6895         vcpu->arch.pio.size = size;
6896
6897         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6898                 vcpu->arch.pio.count = 0;
6899                 return 1;
6900         }
6901
6902         vcpu->run->exit_reason = KVM_EXIT_IO;
6903         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6904         vcpu->run->io.size = size;
6905         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6906         vcpu->run->io.count = count;
6907         vcpu->run->io.port = port;
6908
6909         return 0;
6910 }
6911
6912 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6913                            unsigned short port, void *val, unsigned int count)
6914 {
6915         int ret;
6916
6917         if (vcpu->arch.pio.count)
6918                 goto data_avail;
6919
6920         memset(vcpu->arch.pio_data, 0, size * count);
6921
6922         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6923         if (ret) {
6924 data_avail:
6925                 memcpy(val, vcpu->arch.pio_data, size * count);
6926                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6927                 vcpu->arch.pio.count = 0;
6928                 return 1;
6929         }
6930
6931         return 0;
6932 }
6933
6934 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6935                                     int size, unsigned short port, void *val,
6936                                     unsigned int count)
6937 {
6938         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6939
6940 }
6941
6942 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6943                             unsigned short port, const void *val,
6944                             unsigned int count)
6945 {
6946         memcpy(vcpu->arch.pio_data, val, size * count);
6947         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6948         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6949 }
6950
6951 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6952                                      int size, unsigned short port,
6953                                      const void *val, unsigned int count)
6954 {
6955         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6956 }
6957
6958 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6959 {
6960         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6961 }
6962
6963 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6964 {
6965         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6966 }
6967
6968 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6969 {
6970         if (!need_emulate_wbinvd(vcpu))
6971                 return X86EMUL_CONTINUE;
6972
6973         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6974                 int cpu = get_cpu();
6975
6976                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6977                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6978                                 wbinvd_ipi, NULL, 1);
6979                 put_cpu();
6980                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6981         } else
6982                 wbinvd();
6983         return X86EMUL_CONTINUE;
6984 }
6985
6986 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6987 {
6988         kvm_emulate_wbinvd_noskip(vcpu);
6989         return kvm_skip_emulated_instruction(vcpu);
6990 }
6991 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6992
6993
6994
6995 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6996 {
6997         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6998 }
6999
7000 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7001                             unsigned long *dest)
7002 {
7003         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7004 }
7005
7006 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7007                            unsigned long value)
7008 {
7009
7010         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7011 }
7012
7013 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7014 {
7015         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7016 }
7017
7018 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7019 {
7020         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7021         unsigned long value;
7022
7023         switch (cr) {
7024         case 0:
7025                 value = kvm_read_cr0(vcpu);
7026                 break;
7027         case 2:
7028                 value = vcpu->arch.cr2;
7029                 break;
7030         case 3:
7031                 value = kvm_read_cr3(vcpu);
7032                 break;
7033         case 4:
7034                 value = kvm_read_cr4(vcpu);
7035                 break;
7036         case 8:
7037                 value = kvm_get_cr8(vcpu);
7038                 break;
7039         default:
7040                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7041                 return 0;
7042         }
7043
7044         return value;
7045 }
7046
7047 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7048 {
7049         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7050         int res = 0;
7051
7052         switch (cr) {
7053         case 0:
7054                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7055                 break;
7056         case 2:
7057                 vcpu->arch.cr2 = val;
7058                 break;
7059         case 3:
7060                 res = kvm_set_cr3(vcpu, val);
7061                 break;
7062         case 4:
7063                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7064                 break;
7065         case 8:
7066                 res = kvm_set_cr8(vcpu, val);
7067                 break;
7068         default:
7069                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7070                 res = -1;
7071         }
7072
7073         return res;
7074 }
7075
7076 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7077 {
7078         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7079 }
7080
7081 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7082 {
7083         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7084 }
7085
7086 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7087 {
7088         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7089 }
7090
7091 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7092 {
7093         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7094 }
7095
7096 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7097 {
7098         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7099 }
7100
7101 static unsigned long emulator_get_cached_segment_base(
7102         struct x86_emulate_ctxt *ctxt, int seg)
7103 {
7104         return get_segment_base(emul_to_vcpu(ctxt), seg);
7105 }
7106
7107 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7108                                  struct desc_struct *desc, u32 *base3,
7109                                  int seg)
7110 {
7111         struct kvm_segment var;
7112
7113         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7114         *selector = var.selector;
7115
7116         if (var.unusable) {
7117                 memset(desc, 0, sizeof(*desc));
7118                 if (base3)
7119                         *base3 = 0;
7120                 return false;
7121         }
7122
7123         if (var.g)
7124                 var.limit >>= 12;
7125         set_desc_limit(desc, var.limit);
7126         set_desc_base(desc, (unsigned long)var.base);
7127 #ifdef CONFIG_X86_64
7128         if (base3)
7129                 *base3 = var.base >> 32;
7130 #endif
7131         desc->type = var.type;
7132         desc->s = var.s;
7133         desc->dpl = var.dpl;
7134         desc->p = var.present;
7135         desc->avl = var.avl;
7136         desc->l = var.l;
7137         desc->d = var.db;
7138         desc->g = var.g;
7139
7140         return true;
7141 }
7142
7143 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7144                                  struct desc_struct *desc, u32 base3,
7145                                  int seg)
7146 {
7147         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7148         struct kvm_segment var;
7149
7150         var.selector = selector;
7151         var.base = get_desc_base(desc);
7152 #ifdef CONFIG_X86_64
7153         var.base |= ((u64)base3) << 32;
7154 #endif
7155         var.limit = get_desc_limit(desc);
7156         if (desc->g)
7157                 var.limit = (var.limit << 12) | 0xfff;
7158         var.type = desc->type;
7159         var.dpl = desc->dpl;
7160         var.db = desc->d;
7161         var.s = desc->s;
7162         var.l = desc->l;
7163         var.g = desc->g;
7164         var.avl = desc->avl;
7165         var.present = desc->p;
7166         var.unusable = !var.present;
7167         var.padding = 0;
7168
7169         kvm_set_segment(vcpu, &var, seg);
7170         return;
7171 }
7172
7173 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7174                             u32 msr_index, u64 *pdata)
7175 {
7176         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7177         int r;
7178
7179         r = kvm_get_msr(vcpu, msr_index, pdata);
7180
7181         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7182                 /* Bounce to user space */
7183                 return X86EMUL_IO_NEEDED;
7184         }
7185
7186         return r;
7187 }
7188
7189 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7190                             u32 msr_index, u64 data)
7191 {
7192         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7193         int r;
7194
7195         r = kvm_set_msr(vcpu, msr_index, data);
7196
7197         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7198                 /* Bounce to user space */
7199                 return X86EMUL_IO_NEEDED;
7200         }
7201
7202         return r;
7203 }
7204
7205 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7206 {
7207         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7208
7209         return vcpu->arch.smbase;
7210 }
7211
7212 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7213 {
7214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7215
7216         vcpu->arch.smbase = smbase;
7217 }
7218
7219 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7220                               u32 pmc)
7221 {
7222         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7223 }
7224
7225 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7226                              u32 pmc, u64 *pdata)
7227 {
7228         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7229 }
7230
7231 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7232 {
7233         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7234 }
7235
7236 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7237                               struct x86_instruction_info *info,
7238                               enum x86_intercept_stage stage)
7239 {
7240         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7241                                             &ctxt->exception);
7242 }
7243
7244 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7245                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7246                               bool exact_only)
7247 {
7248         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7249 }
7250
7251 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7252 {
7253         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7254 }
7255
7256 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7257 {
7258         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7259 }
7260
7261 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7262 {
7263         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7264 }
7265
7266 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7267 {
7268         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7269 }
7270
7271 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7272 {
7273         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7274 }
7275
7276 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7277 {
7278         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7279 }
7280
7281 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7282 {
7283         return emul_to_vcpu(ctxt)->arch.hflags;
7284 }
7285
7286 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7287 {
7288         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7289
7290         kvm_smm_changed(vcpu, false);
7291 }
7292
7293 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7294                                   const char *smstate)
7295 {
7296         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7297 }
7298
7299 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7300 {
7301         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7302 }
7303
7304 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7305 {
7306         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7307 }
7308
7309 static const struct x86_emulate_ops emulate_ops = {
7310         .read_gpr            = emulator_read_gpr,
7311         .write_gpr           = emulator_write_gpr,
7312         .read_std            = emulator_read_std,
7313         .write_std           = emulator_write_std,
7314         .read_phys           = kvm_read_guest_phys_system,
7315         .fetch               = kvm_fetch_guest_virt,
7316         .read_emulated       = emulator_read_emulated,
7317         .write_emulated      = emulator_write_emulated,
7318         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7319         .invlpg              = emulator_invlpg,
7320         .pio_in_emulated     = emulator_pio_in_emulated,
7321         .pio_out_emulated    = emulator_pio_out_emulated,
7322         .get_segment         = emulator_get_segment,
7323         .set_segment         = emulator_set_segment,
7324         .get_cached_segment_base = emulator_get_cached_segment_base,
7325         .get_gdt             = emulator_get_gdt,
7326         .get_idt             = emulator_get_idt,
7327         .set_gdt             = emulator_set_gdt,
7328         .set_idt             = emulator_set_idt,
7329         .get_cr              = emulator_get_cr,
7330         .set_cr              = emulator_set_cr,
7331         .cpl                 = emulator_get_cpl,
7332         .get_dr              = emulator_get_dr,
7333         .set_dr              = emulator_set_dr,
7334         .get_smbase          = emulator_get_smbase,
7335         .set_smbase          = emulator_set_smbase,
7336         .set_msr             = emulator_set_msr,
7337         .get_msr             = emulator_get_msr,
7338         .check_pmc           = emulator_check_pmc,
7339         .read_pmc            = emulator_read_pmc,
7340         .halt                = emulator_halt,
7341         .wbinvd              = emulator_wbinvd,
7342         .fix_hypercall       = emulator_fix_hypercall,
7343         .intercept           = emulator_intercept,
7344         .get_cpuid           = emulator_get_cpuid,
7345         .guest_has_long_mode = emulator_guest_has_long_mode,
7346         .guest_has_movbe     = emulator_guest_has_movbe,
7347         .guest_has_fxsr      = emulator_guest_has_fxsr,
7348         .set_nmi_mask        = emulator_set_nmi_mask,
7349         .get_hflags          = emulator_get_hflags,
7350         .exiting_smm         = emulator_exiting_smm,
7351         .leave_smm           = emulator_leave_smm,
7352         .triple_fault        = emulator_triple_fault,
7353         .set_xcr             = emulator_set_xcr,
7354 };
7355
7356 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7357 {
7358         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7359         /*
7360          * an sti; sti; sequence only disable interrupts for the first
7361          * instruction. So, if the last instruction, be it emulated or
7362          * not, left the system with the INT_STI flag enabled, it
7363          * means that the last instruction is an sti. We should not
7364          * leave the flag on in this case. The same goes for mov ss
7365          */
7366         if (int_shadow & mask)
7367                 mask = 0;
7368         if (unlikely(int_shadow || mask)) {
7369                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7370                 if (!mask)
7371                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7372         }
7373 }
7374
7375 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7376 {
7377         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7378         if (ctxt->exception.vector == PF_VECTOR)
7379                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7380
7381         if (ctxt->exception.error_code_valid)
7382                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7383                                       ctxt->exception.error_code);
7384         else
7385                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7386         return false;
7387 }
7388
7389 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7390 {
7391         struct x86_emulate_ctxt *ctxt;
7392
7393         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7394         if (!ctxt) {
7395                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7396                 return NULL;
7397         }
7398
7399         ctxt->vcpu = vcpu;
7400         ctxt->ops = &emulate_ops;
7401         vcpu->arch.emulate_ctxt = ctxt;
7402
7403         return ctxt;
7404 }
7405
7406 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7407 {
7408         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7409         int cs_db, cs_l;
7410
7411         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7412
7413         ctxt->gpa_available = false;
7414         ctxt->eflags = kvm_get_rflags(vcpu);
7415         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7416
7417         ctxt->eip = kvm_rip_read(vcpu);
7418         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7419                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7420                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7421                      cs_db                              ? X86EMUL_MODE_PROT32 :
7422                                                           X86EMUL_MODE_PROT16;
7423         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7424         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7425         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7426
7427         ctxt->interruptibility = 0;
7428         ctxt->have_exception = false;
7429         ctxt->exception.vector = -1;
7430         ctxt->perm_ok = false;
7431
7432         init_decode_cache(ctxt);
7433         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7434 }
7435
7436 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7437 {
7438         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7439         int ret;
7440
7441         init_emulate_ctxt(vcpu);
7442
7443         ctxt->op_bytes = 2;
7444         ctxt->ad_bytes = 2;
7445         ctxt->_eip = ctxt->eip + inc_eip;
7446         ret = emulate_int_real(ctxt, irq);
7447
7448         if (ret != X86EMUL_CONTINUE) {
7449                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7450         } else {
7451                 ctxt->eip = ctxt->_eip;
7452                 kvm_rip_write(vcpu, ctxt->eip);
7453                 kvm_set_rflags(vcpu, ctxt->eflags);
7454         }
7455 }
7456 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7457
7458 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7459 {
7460         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7461         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7462         struct kvm_run *run = vcpu->run;
7463
7464         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7465         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7466         run->emulation_failure.ndata = 0;
7467         run->emulation_failure.flags = 0;
7468
7469         if (insn_size) {
7470                 run->emulation_failure.ndata = 3;
7471                 run->emulation_failure.flags |=
7472                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7473                 run->emulation_failure.insn_size = insn_size;
7474                 memset(run->emulation_failure.insn_bytes, 0x90,
7475                        sizeof(run->emulation_failure.insn_bytes));
7476                 memcpy(run->emulation_failure.insn_bytes,
7477                        ctxt->fetch.data, insn_size);
7478         }
7479 }
7480
7481 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7482 {
7483         struct kvm *kvm = vcpu->kvm;
7484
7485         ++vcpu->stat.insn_emulation_fail;
7486         trace_kvm_emulate_insn_failed(vcpu);
7487
7488         if (emulation_type & EMULTYPE_VMWARE_GP) {
7489                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7490                 return 1;
7491         }
7492
7493         if (kvm->arch.exit_on_emulation_error ||
7494             (emulation_type & EMULTYPE_SKIP)) {
7495                 prepare_emulation_failure_exit(vcpu);
7496                 return 0;
7497         }
7498
7499         kvm_queue_exception(vcpu, UD_VECTOR);
7500
7501         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7502                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7503                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7504                 vcpu->run->internal.ndata = 0;
7505                 return 0;
7506         }
7507
7508         return 1;
7509 }
7510
7511 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7512                                   bool write_fault_to_shadow_pgtable,
7513                                   int emulation_type)
7514 {
7515         gpa_t gpa = cr2_or_gpa;
7516         kvm_pfn_t pfn;
7517
7518         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7519                 return false;
7520
7521         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7522             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7523                 return false;
7524
7525         if (!vcpu->arch.mmu->direct_map) {
7526                 /*
7527                  * Write permission should be allowed since only
7528                  * write access need to be emulated.
7529                  */
7530                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7531
7532                 /*
7533                  * If the mapping is invalid in guest, let cpu retry
7534                  * it to generate fault.
7535                  */
7536                 if (gpa == UNMAPPED_GVA)
7537                         return true;
7538         }
7539
7540         /*
7541          * Do not retry the unhandleable instruction if it faults on the
7542          * readonly host memory, otherwise it will goto a infinite loop:
7543          * retry instruction -> write #PF -> emulation fail -> retry
7544          * instruction -> ...
7545          */
7546         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7547
7548         /*
7549          * If the instruction failed on the error pfn, it can not be fixed,
7550          * report the error to userspace.
7551          */
7552         if (is_error_noslot_pfn(pfn))
7553                 return false;
7554
7555         kvm_release_pfn_clean(pfn);
7556
7557         /* The instructions are well-emulated on direct mmu. */
7558         if (vcpu->arch.mmu->direct_map) {
7559                 unsigned int indirect_shadow_pages;
7560
7561                 write_lock(&vcpu->kvm->mmu_lock);
7562                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7563                 write_unlock(&vcpu->kvm->mmu_lock);
7564
7565                 if (indirect_shadow_pages)
7566                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7567
7568                 return true;
7569         }
7570
7571         /*
7572          * if emulation was due to access to shadowed page table
7573          * and it failed try to unshadow page and re-enter the
7574          * guest to let CPU execute the instruction.
7575          */
7576         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7577
7578         /*
7579          * If the access faults on its page table, it can not
7580          * be fixed by unprotecting shadow page and it should
7581          * be reported to userspace.
7582          */
7583         return !write_fault_to_shadow_pgtable;
7584 }
7585
7586 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7587                               gpa_t cr2_or_gpa,  int emulation_type)
7588 {
7589         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7590         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7591
7592         last_retry_eip = vcpu->arch.last_retry_eip;
7593         last_retry_addr = vcpu->arch.last_retry_addr;
7594
7595         /*
7596          * If the emulation is caused by #PF and it is non-page_table
7597          * writing instruction, it means the VM-EXIT is caused by shadow
7598          * page protected, we can zap the shadow page and retry this
7599          * instruction directly.
7600          *
7601          * Note: if the guest uses a non-page-table modifying instruction
7602          * on the PDE that points to the instruction, then we will unmap
7603          * the instruction and go to an infinite loop. So, we cache the
7604          * last retried eip and the last fault address, if we meet the eip
7605          * and the address again, we can break out of the potential infinite
7606          * loop.
7607          */
7608         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7609
7610         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7611                 return false;
7612
7613         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7614             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7615                 return false;
7616
7617         if (x86_page_table_writing_insn(ctxt))
7618                 return false;
7619
7620         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7621                 return false;
7622
7623         vcpu->arch.last_retry_eip = ctxt->eip;
7624         vcpu->arch.last_retry_addr = cr2_or_gpa;
7625
7626         if (!vcpu->arch.mmu->direct_map)
7627                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7628
7629         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7630
7631         return true;
7632 }
7633
7634 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7635 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7636
7637 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7638 {
7639         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7640
7641         if (entering_smm) {
7642                 vcpu->arch.hflags |= HF_SMM_MASK;
7643         } else {
7644                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7645
7646                 /* Process a latched INIT or SMI, if any.  */
7647                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7648
7649                 /*
7650                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7651                  * on SMM exit we still need to reload them from
7652                  * guest memory
7653                  */
7654                 vcpu->arch.pdptrs_from_userspace = false;
7655         }
7656
7657         kvm_mmu_reset_context(vcpu);
7658 }
7659
7660 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7661                                 unsigned long *db)
7662 {
7663         u32 dr6 = 0;
7664         int i;
7665         u32 enable, rwlen;
7666
7667         enable = dr7;
7668         rwlen = dr7 >> 16;
7669         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7670                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7671                         dr6 |= (1 << i);
7672         return dr6;
7673 }
7674
7675 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7676 {
7677         struct kvm_run *kvm_run = vcpu->run;
7678
7679         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7680                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7681                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7682                 kvm_run->debug.arch.exception = DB_VECTOR;
7683                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7684                 return 0;
7685         }
7686         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7687         return 1;
7688 }
7689
7690 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7691 {
7692         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7693         int r;
7694
7695         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7696         if (unlikely(!r))
7697                 return 0;
7698
7699         /*
7700          * rflags is the old, "raw" value of the flags.  The new value has
7701          * not been saved yet.
7702          *
7703          * This is correct even for TF set by the guest, because "the
7704          * processor will not generate this exception after the instruction
7705          * that sets the TF flag".
7706          */
7707         if (unlikely(rflags & X86_EFLAGS_TF))
7708                 r = kvm_vcpu_do_singlestep(vcpu);
7709         return r;
7710 }
7711 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7712
7713 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7714 {
7715         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7716             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7717                 struct kvm_run *kvm_run = vcpu->run;
7718                 unsigned long eip = kvm_get_linear_rip(vcpu);
7719                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7720                                            vcpu->arch.guest_debug_dr7,
7721                                            vcpu->arch.eff_db);
7722
7723                 if (dr6 != 0) {
7724                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7725                         kvm_run->debug.arch.pc = eip;
7726                         kvm_run->debug.arch.exception = DB_VECTOR;
7727                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7728                         *r = 0;
7729                         return true;
7730                 }
7731         }
7732
7733         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7734             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7735                 unsigned long eip = kvm_get_linear_rip(vcpu);
7736                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7737                                            vcpu->arch.dr7,
7738                                            vcpu->arch.db);
7739
7740                 if (dr6 != 0) {
7741                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7742                         *r = 1;
7743                         return true;
7744                 }
7745         }
7746
7747         return false;
7748 }
7749
7750 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7751 {
7752         switch (ctxt->opcode_len) {
7753         case 1:
7754                 switch (ctxt->b) {
7755                 case 0xe4:      /* IN */
7756                 case 0xe5:
7757                 case 0xec:
7758                 case 0xed:
7759                 case 0xe6:      /* OUT */
7760                 case 0xe7:
7761                 case 0xee:
7762                 case 0xef:
7763                 case 0x6c:      /* INS */
7764                 case 0x6d:
7765                 case 0x6e:      /* OUTS */
7766                 case 0x6f:
7767                         return true;
7768                 }
7769                 break;
7770         case 2:
7771                 switch (ctxt->b) {
7772                 case 0x33:      /* RDPMC */
7773                         return true;
7774                 }
7775                 break;
7776         }
7777
7778         return false;
7779 }
7780
7781 /*
7782  * Decode to be emulated instruction. Return EMULATION_OK if success.
7783  */
7784 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7785                                     void *insn, int insn_len)
7786 {
7787         int r = EMULATION_OK;
7788         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7789
7790         init_emulate_ctxt(vcpu);
7791
7792         /*
7793          * We will reenter on the same instruction since we do not set
7794          * complete_userspace_io. This does not handle watchpoints yet,
7795          * those would be handled in the emulate_ops.
7796          */
7797         if (!(emulation_type & EMULTYPE_SKIP) &&
7798             kvm_vcpu_check_breakpoint(vcpu, &r))
7799                 return r;
7800
7801         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7802
7803         trace_kvm_emulate_insn_start(vcpu);
7804         ++vcpu->stat.insn_emulation;
7805
7806         return r;
7807 }
7808 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7809
7810 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7811                             int emulation_type, void *insn, int insn_len)
7812 {
7813         int r;
7814         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7815         bool writeback = true;
7816         bool write_fault_to_spt;
7817
7818         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7819                 return 1;
7820
7821         vcpu->arch.l1tf_flush_l1d = true;
7822
7823         /*
7824          * Clear write_fault_to_shadow_pgtable here to ensure it is
7825          * never reused.
7826          */
7827         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7828         vcpu->arch.write_fault_to_shadow_pgtable = false;
7829
7830         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7831                 kvm_clear_exception_queue(vcpu);
7832
7833                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7834                                                     insn, insn_len);
7835                 if (r != EMULATION_OK)  {
7836                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7837                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7838                                 kvm_queue_exception(vcpu, UD_VECTOR);
7839                                 return 1;
7840                         }
7841                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7842                                                   write_fault_to_spt,
7843                                                   emulation_type))
7844                                 return 1;
7845                         if (ctxt->have_exception) {
7846                                 /*
7847                                  * #UD should result in just EMULATION_FAILED, and trap-like
7848                                  * exception should not be encountered during decode.
7849                                  */
7850                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7851                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7852                                 inject_emulated_exception(vcpu);
7853                                 return 1;
7854                         }
7855                         return handle_emulation_failure(vcpu, emulation_type);
7856                 }
7857         }
7858
7859         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7860             !is_vmware_backdoor_opcode(ctxt)) {
7861                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7862                 return 1;
7863         }
7864
7865         /*
7866          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7867          * for kvm_skip_emulated_instruction().  The caller is responsible for
7868          * updating interruptibility state and injecting single-step #DBs.
7869          */
7870         if (emulation_type & EMULTYPE_SKIP) {
7871                 kvm_rip_write(vcpu, ctxt->_eip);
7872                 if (ctxt->eflags & X86_EFLAGS_RF)
7873                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7874                 return 1;
7875         }
7876
7877         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7878                 return 1;
7879
7880         /* this is needed for vmware backdoor interface to work since it
7881            changes registers values  during IO operation */
7882         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7883                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7884                 emulator_invalidate_register_cache(ctxt);
7885         }
7886
7887 restart:
7888         if (emulation_type & EMULTYPE_PF) {
7889                 /* Save the faulting GPA (cr2) in the address field */
7890                 ctxt->exception.address = cr2_or_gpa;
7891
7892                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7893                 if (vcpu->arch.mmu->direct_map) {
7894                         ctxt->gpa_available = true;
7895                         ctxt->gpa_val = cr2_or_gpa;
7896                 }
7897         } else {
7898                 /* Sanitize the address out of an abundance of paranoia. */
7899                 ctxt->exception.address = 0;
7900         }
7901
7902         r = x86_emulate_insn(ctxt);
7903
7904         if (r == EMULATION_INTERCEPTED)
7905                 return 1;
7906
7907         if (r == EMULATION_FAILED) {
7908                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7909                                         emulation_type))
7910                         return 1;
7911
7912                 return handle_emulation_failure(vcpu, emulation_type);
7913         }
7914
7915         if (ctxt->have_exception) {
7916                 r = 1;
7917                 if (inject_emulated_exception(vcpu))
7918                         return r;
7919         } else if (vcpu->arch.pio.count) {
7920                 if (!vcpu->arch.pio.in) {
7921                         /* FIXME: return into emulator if single-stepping.  */
7922                         vcpu->arch.pio.count = 0;
7923                 } else {
7924                         writeback = false;
7925                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7926                 }
7927                 r = 0;
7928         } else if (vcpu->mmio_needed) {
7929                 ++vcpu->stat.mmio_exits;
7930
7931                 if (!vcpu->mmio_is_write)
7932                         writeback = false;
7933                 r = 0;
7934                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7935         } else if (r == EMULATION_RESTART)
7936                 goto restart;
7937         else
7938                 r = 1;
7939
7940         if (writeback) {
7941                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7942                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7943                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7944                 if (!ctxt->have_exception ||
7945                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7946                         kvm_rip_write(vcpu, ctxt->eip);
7947                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7948                                 r = kvm_vcpu_do_singlestep(vcpu);
7949                         if (kvm_x86_ops.update_emulated_instruction)
7950                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7951                         __kvm_set_rflags(vcpu, ctxt->eflags);
7952                 }
7953
7954                 /*
7955                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7956                  * do nothing, and it will be requested again as soon as
7957                  * the shadow expires.  But we still need to check here,
7958                  * because POPF has no interrupt shadow.
7959                  */
7960                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7961                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7962         } else
7963                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7964
7965         return r;
7966 }
7967
7968 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7969 {
7970         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7971 }
7972 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7973
7974 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7975                                         void *insn, int insn_len)
7976 {
7977         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7978 }
7979 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7980
7981 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7982 {
7983         vcpu->arch.pio.count = 0;
7984         return 1;
7985 }
7986
7987 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7988 {
7989         vcpu->arch.pio.count = 0;
7990
7991         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7992                 return 1;
7993
7994         return kvm_skip_emulated_instruction(vcpu);
7995 }
7996
7997 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7998                             unsigned short port)
7999 {
8000         unsigned long val = kvm_rax_read(vcpu);
8001         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8002
8003         if (ret)
8004                 return ret;
8005
8006         /*
8007          * Workaround userspace that relies on old KVM behavior of %rip being
8008          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8009          */
8010         if (port == 0x7e &&
8011             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8012                 vcpu->arch.complete_userspace_io =
8013                         complete_fast_pio_out_port_0x7e;
8014                 kvm_skip_emulated_instruction(vcpu);
8015         } else {
8016                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8017                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8018         }
8019         return 0;
8020 }
8021
8022 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8023 {
8024         unsigned long val;
8025
8026         /* We should only ever be called with arch.pio.count equal to 1 */
8027         BUG_ON(vcpu->arch.pio.count != 1);
8028
8029         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8030                 vcpu->arch.pio.count = 0;
8031                 return 1;
8032         }
8033
8034         /* For size less than 4 we merge, else we zero extend */
8035         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8036
8037         /*
8038          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8039          * the copy and tracing
8040          */
8041         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8042         kvm_rax_write(vcpu, val);
8043
8044         return kvm_skip_emulated_instruction(vcpu);
8045 }
8046
8047 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8048                            unsigned short port)
8049 {
8050         unsigned long val;
8051         int ret;
8052
8053         /* For size less than 4 we merge, else we zero extend */
8054         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8055
8056         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8057         if (ret) {
8058                 kvm_rax_write(vcpu, val);
8059                 return ret;
8060         }
8061
8062         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8063         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8064
8065         return 0;
8066 }
8067
8068 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8069 {
8070         int ret;
8071
8072         if (in)
8073                 ret = kvm_fast_pio_in(vcpu, size, port);
8074         else
8075                 ret = kvm_fast_pio_out(vcpu, size, port);
8076         return ret && kvm_skip_emulated_instruction(vcpu);
8077 }
8078 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8079
8080 static int kvmclock_cpu_down_prep(unsigned int cpu)
8081 {
8082         __this_cpu_write(cpu_tsc_khz, 0);
8083         return 0;
8084 }
8085
8086 static void tsc_khz_changed(void *data)
8087 {
8088         struct cpufreq_freqs *freq = data;
8089         unsigned long khz = 0;
8090
8091         if (data)
8092                 khz = freq->new;
8093         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8094                 khz = cpufreq_quick_get(raw_smp_processor_id());
8095         if (!khz)
8096                 khz = tsc_khz;
8097         __this_cpu_write(cpu_tsc_khz, khz);
8098 }
8099
8100 #ifdef CONFIG_X86_64
8101 static void kvm_hyperv_tsc_notifier(void)
8102 {
8103         struct kvm *kvm;
8104         struct kvm_vcpu *vcpu;
8105         int cpu;
8106         unsigned long flags;
8107
8108         mutex_lock(&kvm_lock);
8109         list_for_each_entry(kvm, &vm_list, vm_list)
8110                 kvm_make_mclock_inprogress_request(kvm);
8111
8112         hyperv_stop_tsc_emulation();
8113
8114         /* TSC frequency always matches when on Hyper-V */
8115         for_each_present_cpu(cpu)
8116                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8117         kvm_max_guest_tsc_khz = tsc_khz;
8118
8119         list_for_each_entry(kvm, &vm_list, vm_list) {
8120                 struct kvm_arch *ka = &kvm->arch;
8121
8122                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8123                 pvclock_update_vm_gtod_copy(kvm);
8124                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8125
8126                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8127                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8128
8129                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8130                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8131         }
8132         mutex_unlock(&kvm_lock);
8133 }
8134 #endif
8135
8136 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8137 {
8138         struct kvm *kvm;
8139         struct kvm_vcpu *vcpu;
8140         int i, send_ipi = 0;
8141
8142         /*
8143          * We allow guests to temporarily run on slowing clocks,
8144          * provided we notify them after, or to run on accelerating
8145          * clocks, provided we notify them before.  Thus time never
8146          * goes backwards.
8147          *
8148          * However, we have a problem.  We can't atomically update
8149          * the frequency of a given CPU from this function; it is
8150          * merely a notifier, which can be called from any CPU.
8151          * Changing the TSC frequency at arbitrary points in time
8152          * requires a recomputation of local variables related to
8153          * the TSC for each VCPU.  We must flag these local variables
8154          * to be updated and be sure the update takes place with the
8155          * new frequency before any guests proceed.
8156          *
8157          * Unfortunately, the combination of hotplug CPU and frequency
8158          * change creates an intractable locking scenario; the order
8159          * of when these callouts happen is undefined with respect to
8160          * CPU hotplug, and they can race with each other.  As such,
8161          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8162          * undefined; you can actually have a CPU frequency change take
8163          * place in between the computation of X and the setting of the
8164          * variable.  To protect against this problem, all updates of
8165          * the per_cpu tsc_khz variable are done in an interrupt
8166          * protected IPI, and all callers wishing to update the value
8167          * must wait for a synchronous IPI to complete (which is trivial
8168          * if the caller is on the CPU already).  This establishes the
8169          * necessary total order on variable updates.
8170          *
8171          * Note that because a guest time update may take place
8172          * anytime after the setting of the VCPU's request bit, the
8173          * correct TSC value must be set before the request.  However,
8174          * to ensure the update actually makes it to any guest which
8175          * starts running in hardware virtualization between the set
8176          * and the acquisition of the spinlock, we must also ping the
8177          * CPU after setting the request bit.
8178          *
8179          */
8180
8181         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8182
8183         mutex_lock(&kvm_lock);
8184         list_for_each_entry(kvm, &vm_list, vm_list) {
8185                 kvm_for_each_vcpu(i, vcpu, kvm) {
8186                         if (vcpu->cpu != cpu)
8187                                 continue;
8188                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8189                         if (vcpu->cpu != raw_smp_processor_id())
8190                                 send_ipi = 1;
8191                 }
8192         }
8193         mutex_unlock(&kvm_lock);
8194
8195         if (freq->old < freq->new && send_ipi) {
8196                 /*
8197                  * We upscale the frequency.  Must make the guest
8198                  * doesn't see old kvmclock values while running with
8199                  * the new frequency, otherwise we risk the guest sees
8200                  * time go backwards.
8201                  *
8202                  * In case we update the frequency for another cpu
8203                  * (which might be in guest context) send an interrupt
8204                  * to kick the cpu out of guest context.  Next time
8205                  * guest context is entered kvmclock will be updated,
8206                  * so the guest will not see stale values.
8207                  */
8208                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8209         }
8210 }
8211
8212 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8213                                      void *data)
8214 {
8215         struct cpufreq_freqs *freq = data;
8216         int cpu;
8217
8218         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8219                 return 0;
8220         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8221                 return 0;
8222
8223         for_each_cpu(cpu, freq->policy->cpus)
8224                 __kvmclock_cpufreq_notifier(freq, cpu);
8225
8226         return 0;
8227 }
8228
8229 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8230         .notifier_call  = kvmclock_cpufreq_notifier
8231 };
8232
8233 static int kvmclock_cpu_online(unsigned int cpu)
8234 {
8235         tsc_khz_changed(NULL);
8236         return 0;
8237 }
8238
8239 static void kvm_timer_init(void)
8240 {
8241         max_tsc_khz = tsc_khz;
8242
8243         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8244 #ifdef CONFIG_CPU_FREQ
8245                 struct cpufreq_policy *policy;
8246                 int cpu;
8247
8248                 cpu = get_cpu();
8249                 policy = cpufreq_cpu_get(cpu);
8250                 if (policy) {
8251                         if (policy->cpuinfo.max_freq)
8252                                 max_tsc_khz = policy->cpuinfo.max_freq;
8253                         cpufreq_cpu_put(policy);
8254                 }
8255                 put_cpu();
8256 #endif
8257                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8258                                           CPUFREQ_TRANSITION_NOTIFIER);
8259         }
8260
8261         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8262                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8263 }
8264
8265 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8266 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8267
8268 int kvm_is_in_guest(void)
8269 {
8270         return __this_cpu_read(current_vcpu) != NULL;
8271 }
8272
8273 static int kvm_is_user_mode(void)
8274 {
8275         int user_mode = 3;
8276
8277         if (__this_cpu_read(current_vcpu))
8278                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8279
8280         return user_mode != 0;
8281 }
8282
8283 static unsigned long kvm_get_guest_ip(void)
8284 {
8285         unsigned long ip = 0;
8286
8287         if (__this_cpu_read(current_vcpu))
8288                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8289
8290         return ip;
8291 }
8292
8293 static void kvm_handle_intel_pt_intr(void)
8294 {
8295         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8296
8297         kvm_make_request(KVM_REQ_PMI, vcpu);
8298         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8299                         (unsigned long *)&vcpu->arch.pmu.global_status);
8300 }
8301
8302 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8303         .is_in_guest            = kvm_is_in_guest,
8304         .is_user_mode           = kvm_is_user_mode,
8305         .get_guest_ip           = kvm_get_guest_ip,
8306         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8307 };
8308
8309 #ifdef CONFIG_X86_64
8310 static void pvclock_gtod_update_fn(struct work_struct *work)
8311 {
8312         struct kvm *kvm;
8313
8314         struct kvm_vcpu *vcpu;
8315         int i;
8316
8317         mutex_lock(&kvm_lock);
8318         list_for_each_entry(kvm, &vm_list, vm_list)
8319                 kvm_for_each_vcpu(i, vcpu, kvm)
8320                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8321         atomic_set(&kvm_guest_has_master_clock, 0);
8322         mutex_unlock(&kvm_lock);
8323 }
8324
8325 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8326
8327 /*
8328  * Indirection to move queue_work() out of the tk_core.seq write held
8329  * region to prevent possible deadlocks against time accessors which
8330  * are invoked with work related locks held.
8331  */
8332 static void pvclock_irq_work_fn(struct irq_work *w)
8333 {
8334         queue_work(system_long_wq, &pvclock_gtod_work);
8335 }
8336
8337 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8338
8339 /*
8340  * Notification about pvclock gtod data update.
8341  */
8342 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8343                                void *priv)
8344 {
8345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8346         struct timekeeper *tk = priv;
8347
8348         update_pvclock_gtod(tk);
8349
8350         /*
8351          * Disable master clock if host does not trust, or does not use,
8352          * TSC based clocksource. Delegate queue_work() to irq_work as
8353          * this is invoked with tk_core.seq write held.
8354          */
8355         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8356             atomic_read(&kvm_guest_has_master_clock) != 0)
8357                 irq_work_queue(&pvclock_irq_work);
8358         return 0;
8359 }
8360
8361 static struct notifier_block pvclock_gtod_notifier = {
8362         .notifier_call = pvclock_gtod_notify,
8363 };
8364 #endif
8365
8366 int kvm_arch_init(void *opaque)
8367 {
8368         struct kvm_x86_init_ops *ops = opaque;
8369         int r;
8370
8371         if (kvm_x86_ops.hardware_enable) {
8372                 printk(KERN_ERR "kvm: already loaded the other module\n");
8373                 r = -EEXIST;
8374                 goto out;
8375         }
8376
8377         if (!ops->cpu_has_kvm_support()) {
8378                 pr_err_ratelimited("kvm: no hardware support\n");
8379                 r = -EOPNOTSUPP;
8380                 goto out;
8381         }
8382         if (ops->disabled_by_bios()) {
8383                 pr_err_ratelimited("kvm: disabled by bios\n");
8384                 r = -EOPNOTSUPP;
8385                 goto out;
8386         }
8387
8388         /*
8389          * KVM explicitly assumes that the guest has an FPU and
8390          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8391          * vCPU's FPU state as a fxregs_state struct.
8392          */
8393         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8394                 printk(KERN_ERR "kvm: inadequate fpu\n");
8395                 r = -EOPNOTSUPP;
8396                 goto out;
8397         }
8398
8399         r = -ENOMEM;
8400         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8401                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8402                                           NULL);
8403         if (!x86_fpu_cache) {
8404                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8405                 goto out;
8406         }
8407
8408         x86_emulator_cache = kvm_alloc_emulator_cache();
8409         if (!x86_emulator_cache) {
8410                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8411                 goto out_free_x86_fpu_cache;
8412         }
8413
8414         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8415         if (!user_return_msrs) {
8416                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8417                 goto out_free_x86_emulator_cache;
8418         }
8419         kvm_nr_uret_msrs = 0;
8420
8421         r = kvm_mmu_module_init();
8422         if (r)
8423                 goto out_free_percpu;
8424
8425         kvm_timer_init();
8426
8427         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8428
8429         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8430                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8431                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8432         }
8433
8434         if (pi_inject_timer == -1)
8435                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8436 #ifdef CONFIG_X86_64
8437         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8438
8439         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8440                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8441 #endif
8442
8443         return 0;
8444
8445 out_free_percpu:
8446         free_percpu(user_return_msrs);
8447 out_free_x86_emulator_cache:
8448         kmem_cache_destroy(x86_emulator_cache);
8449 out_free_x86_fpu_cache:
8450         kmem_cache_destroy(x86_fpu_cache);
8451 out:
8452         return r;
8453 }
8454
8455 void kvm_arch_exit(void)
8456 {
8457 #ifdef CONFIG_X86_64
8458         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8459                 clear_hv_tscchange_cb();
8460 #endif
8461         kvm_lapic_exit();
8462         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8463
8464         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8465                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8466                                             CPUFREQ_TRANSITION_NOTIFIER);
8467         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8468 #ifdef CONFIG_X86_64
8469         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8470         irq_work_sync(&pvclock_irq_work);
8471         cancel_work_sync(&pvclock_gtod_work);
8472 #endif
8473         kvm_x86_ops.hardware_enable = NULL;
8474         kvm_mmu_module_exit();
8475         free_percpu(user_return_msrs);
8476         kmem_cache_destroy(x86_emulator_cache);
8477         kmem_cache_destroy(x86_fpu_cache);
8478 #ifdef CONFIG_KVM_XEN
8479         static_key_deferred_flush(&kvm_xen_enabled);
8480         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8481 #endif
8482 }
8483
8484 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8485 {
8486         ++vcpu->stat.halt_exits;
8487         if (lapic_in_kernel(vcpu)) {
8488                 vcpu->arch.mp_state = state;
8489                 return 1;
8490         } else {
8491                 vcpu->run->exit_reason = reason;
8492                 return 0;
8493         }
8494 }
8495
8496 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8497 {
8498         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8499 }
8500 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8501
8502 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8503 {
8504         int ret = kvm_skip_emulated_instruction(vcpu);
8505         /*
8506          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8507          * KVM_EXIT_DEBUG here.
8508          */
8509         return kvm_vcpu_halt(vcpu) && ret;
8510 }
8511 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8512
8513 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8514 {
8515         int ret = kvm_skip_emulated_instruction(vcpu);
8516
8517         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8518 }
8519 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8520
8521 #ifdef CONFIG_X86_64
8522 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8523                                 unsigned long clock_type)
8524 {
8525         struct kvm_clock_pairing clock_pairing;
8526         struct timespec64 ts;
8527         u64 cycle;
8528         int ret;
8529
8530         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8531                 return -KVM_EOPNOTSUPP;
8532
8533         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8534                 return -KVM_EOPNOTSUPP;
8535
8536         clock_pairing.sec = ts.tv_sec;
8537         clock_pairing.nsec = ts.tv_nsec;
8538         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8539         clock_pairing.flags = 0;
8540         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8541
8542         ret = 0;
8543         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8544                             sizeof(struct kvm_clock_pairing)))
8545                 ret = -KVM_EFAULT;
8546
8547         return ret;
8548 }
8549 #endif
8550
8551 /*
8552  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8553  *
8554  * @apicid - apicid of vcpu to be kicked.
8555  */
8556 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8557 {
8558         struct kvm_lapic_irq lapic_irq;
8559
8560         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8561         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8562         lapic_irq.level = 0;
8563         lapic_irq.dest_id = apicid;
8564         lapic_irq.msi_redir_hint = false;
8565
8566         lapic_irq.delivery_mode = APIC_DM_REMRD;
8567         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8568 }
8569
8570 bool kvm_apicv_activated(struct kvm *kvm)
8571 {
8572         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8573 }
8574 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8575
8576 static void kvm_apicv_init(struct kvm *kvm)
8577 {
8578         mutex_init(&kvm->arch.apicv_update_lock);
8579
8580         if (enable_apicv)
8581                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8582                           &kvm->arch.apicv_inhibit_reasons);
8583         else
8584                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8585                         &kvm->arch.apicv_inhibit_reasons);
8586 }
8587
8588 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8589 {
8590         struct kvm_vcpu *target = NULL;
8591         struct kvm_apic_map *map;
8592
8593         vcpu->stat.directed_yield_attempted++;
8594
8595         if (single_task_running())
8596                 goto no_yield;
8597
8598         rcu_read_lock();
8599         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8600
8601         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8602                 target = map->phys_map[dest_id]->vcpu;
8603
8604         rcu_read_unlock();
8605
8606         if (!target || !READ_ONCE(target->ready))
8607                 goto no_yield;
8608
8609         /* Ignore requests to yield to self */
8610         if (vcpu == target)
8611                 goto no_yield;
8612
8613         if (kvm_vcpu_yield_to(target) <= 0)
8614                 goto no_yield;
8615
8616         vcpu->stat.directed_yield_successful++;
8617
8618 no_yield:
8619         return;
8620 }
8621
8622 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8623 {
8624         u64 ret = vcpu->run->hypercall.ret;
8625
8626         if (!is_64_bit_mode(vcpu))
8627                 ret = (u32)ret;
8628         kvm_rax_write(vcpu, ret);
8629         ++vcpu->stat.hypercalls;
8630         return kvm_skip_emulated_instruction(vcpu);
8631 }
8632
8633 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8634 {
8635         unsigned long nr, a0, a1, a2, a3, ret;
8636         int op_64_bit;
8637
8638         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8639                 return kvm_xen_hypercall(vcpu);
8640
8641         if (kvm_hv_hypercall_enabled(vcpu))
8642                 return kvm_hv_hypercall(vcpu);
8643
8644         nr = kvm_rax_read(vcpu);
8645         a0 = kvm_rbx_read(vcpu);
8646         a1 = kvm_rcx_read(vcpu);
8647         a2 = kvm_rdx_read(vcpu);
8648         a3 = kvm_rsi_read(vcpu);
8649
8650         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8651
8652         op_64_bit = is_64_bit_mode(vcpu);
8653         if (!op_64_bit) {
8654                 nr &= 0xFFFFFFFF;
8655                 a0 &= 0xFFFFFFFF;
8656                 a1 &= 0xFFFFFFFF;
8657                 a2 &= 0xFFFFFFFF;
8658                 a3 &= 0xFFFFFFFF;
8659         }
8660
8661         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8662                 ret = -KVM_EPERM;
8663                 goto out;
8664         }
8665
8666         ret = -KVM_ENOSYS;
8667
8668         switch (nr) {
8669         case KVM_HC_VAPIC_POLL_IRQ:
8670                 ret = 0;
8671                 break;
8672         case KVM_HC_KICK_CPU:
8673                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8674                         break;
8675
8676                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8677                 kvm_sched_yield(vcpu, a1);
8678                 ret = 0;
8679                 break;
8680 #ifdef CONFIG_X86_64
8681         case KVM_HC_CLOCK_PAIRING:
8682                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8683                 break;
8684 #endif
8685         case KVM_HC_SEND_IPI:
8686                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8687                         break;
8688
8689                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8690                 break;
8691         case KVM_HC_SCHED_YIELD:
8692                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8693                         break;
8694
8695                 kvm_sched_yield(vcpu, a0);
8696                 ret = 0;
8697                 break;
8698         case KVM_HC_MAP_GPA_RANGE: {
8699                 u64 gpa = a0, npages = a1, attrs = a2;
8700
8701                 ret = -KVM_ENOSYS;
8702                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8703                         break;
8704
8705                 if (!PAGE_ALIGNED(gpa) || !npages ||
8706                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8707                         ret = -KVM_EINVAL;
8708                         break;
8709                 }
8710
8711                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8712                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8713                 vcpu->run->hypercall.args[0]  = gpa;
8714                 vcpu->run->hypercall.args[1]  = npages;
8715                 vcpu->run->hypercall.args[2]  = attrs;
8716                 vcpu->run->hypercall.longmode = op_64_bit;
8717                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8718                 return 0;
8719         }
8720         default:
8721                 ret = -KVM_ENOSYS;
8722                 break;
8723         }
8724 out:
8725         if (!op_64_bit)
8726                 ret = (u32)ret;
8727         kvm_rax_write(vcpu, ret);
8728
8729         ++vcpu->stat.hypercalls;
8730         return kvm_skip_emulated_instruction(vcpu);
8731 }
8732 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8733
8734 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8735 {
8736         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8737         char instruction[3];
8738         unsigned long rip = kvm_rip_read(vcpu);
8739
8740         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8741
8742         return emulator_write_emulated(ctxt, rip, instruction, 3,
8743                 &ctxt->exception);
8744 }
8745
8746 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8747 {
8748         return vcpu->run->request_interrupt_window &&
8749                 likely(!pic_in_kernel(vcpu->kvm));
8750 }
8751
8752 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8753 {
8754         struct kvm_run *kvm_run = vcpu->run;
8755
8756         /*
8757          * if_flag is obsolete and useless, so do not bother
8758          * setting it for SEV-ES guests.  Userspace can just
8759          * use kvm_run->ready_for_interrupt_injection.
8760          */
8761         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8762                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8763
8764         kvm_run->cr8 = kvm_get_cr8(vcpu);
8765         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8766         kvm_run->ready_for_interrupt_injection =
8767                 pic_in_kernel(vcpu->kvm) ||
8768                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8769
8770         if (is_smm(vcpu))
8771                 kvm_run->flags |= KVM_RUN_X86_SMM;
8772 }
8773
8774 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8775 {
8776         int max_irr, tpr;
8777
8778         if (!kvm_x86_ops.update_cr8_intercept)
8779                 return;
8780
8781         if (!lapic_in_kernel(vcpu))
8782                 return;
8783
8784         if (vcpu->arch.apicv_active)
8785                 return;
8786
8787         if (!vcpu->arch.apic->vapic_addr)
8788                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8789         else
8790                 max_irr = -1;
8791
8792         if (max_irr != -1)
8793                 max_irr >>= 4;
8794
8795         tpr = kvm_lapic_get_cr8(vcpu);
8796
8797         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8798 }
8799
8800
8801 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8802 {
8803         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8804                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8805                 return 1;
8806         }
8807
8808         return kvm_x86_ops.nested_ops->check_events(vcpu);
8809 }
8810
8811 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8812 {
8813         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8814                 vcpu->arch.exception.error_code = false;
8815         static_call(kvm_x86_queue_exception)(vcpu);
8816 }
8817
8818 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8819 {
8820         int r;
8821         bool can_inject = true;
8822
8823         /* try to reinject previous events if any */
8824
8825         if (vcpu->arch.exception.injected) {
8826                 kvm_inject_exception(vcpu);
8827                 can_inject = false;
8828         }
8829         /*
8830          * Do not inject an NMI or interrupt if there is a pending
8831          * exception.  Exceptions and interrupts are recognized at
8832          * instruction boundaries, i.e. the start of an instruction.
8833          * Trap-like exceptions, e.g. #DB, have higher priority than
8834          * NMIs and interrupts, i.e. traps are recognized before an
8835          * NMI/interrupt that's pending on the same instruction.
8836          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8837          * priority, but are only generated (pended) during instruction
8838          * execution, i.e. a pending fault-like exception means the
8839          * fault occurred on the *previous* instruction and must be
8840          * serviced prior to recognizing any new events in order to
8841          * fully complete the previous instruction.
8842          */
8843         else if (!vcpu->arch.exception.pending) {
8844                 if (vcpu->arch.nmi_injected) {
8845                         static_call(kvm_x86_set_nmi)(vcpu);
8846                         can_inject = false;
8847                 } else if (vcpu->arch.interrupt.injected) {
8848                         static_call(kvm_x86_set_irq)(vcpu);
8849                         can_inject = false;
8850                 }
8851         }
8852
8853         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8854                      vcpu->arch.exception.pending);
8855
8856         /*
8857          * Call check_nested_events() even if we reinjected a previous event
8858          * in order for caller to determine if it should require immediate-exit
8859          * from L2 to L1 due to pending L1 events which require exit
8860          * from L2 to L1.
8861          */
8862         if (is_guest_mode(vcpu)) {
8863                 r = kvm_check_nested_events(vcpu);
8864                 if (r < 0)
8865                         goto out;
8866         }
8867
8868         /* try to inject new event if pending */
8869         if (vcpu->arch.exception.pending) {
8870                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8871                                         vcpu->arch.exception.has_error_code,
8872                                         vcpu->arch.exception.error_code);
8873
8874                 vcpu->arch.exception.pending = false;
8875                 vcpu->arch.exception.injected = true;
8876
8877                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8878                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8879                                              X86_EFLAGS_RF);
8880
8881                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8882                         kvm_deliver_exception_payload(vcpu);
8883                         if (vcpu->arch.dr7 & DR7_GD) {
8884                                 vcpu->arch.dr7 &= ~DR7_GD;
8885                                 kvm_update_dr7(vcpu);
8886                         }
8887                 }
8888
8889                 kvm_inject_exception(vcpu);
8890                 can_inject = false;
8891         }
8892
8893         /* Don't inject interrupts if the user asked to avoid doing so */
8894         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
8895                 return 0;
8896
8897         /*
8898          * Finally, inject interrupt events.  If an event cannot be injected
8899          * due to architectural conditions (e.g. IF=0) a window-open exit
8900          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8901          * and can architecturally be injected, but we cannot do it right now:
8902          * an interrupt could have arrived just now and we have to inject it
8903          * as a vmexit, or there could already an event in the queue, which is
8904          * indicated by can_inject.  In that case we request an immediate exit
8905          * in order to make progress and get back here for another iteration.
8906          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8907          */
8908         if (vcpu->arch.smi_pending) {
8909                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8910                 if (r < 0)
8911                         goto out;
8912                 if (r) {
8913                         vcpu->arch.smi_pending = false;
8914                         ++vcpu->arch.smi_count;
8915                         enter_smm(vcpu);
8916                         can_inject = false;
8917                 } else
8918                         static_call(kvm_x86_enable_smi_window)(vcpu);
8919         }
8920
8921         if (vcpu->arch.nmi_pending) {
8922                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8923                 if (r < 0)
8924                         goto out;
8925                 if (r) {
8926                         --vcpu->arch.nmi_pending;
8927                         vcpu->arch.nmi_injected = true;
8928                         static_call(kvm_x86_set_nmi)(vcpu);
8929                         can_inject = false;
8930                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8931                 }
8932                 if (vcpu->arch.nmi_pending)
8933                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8934         }
8935
8936         if (kvm_cpu_has_injectable_intr(vcpu)) {
8937                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8938                 if (r < 0)
8939                         goto out;
8940                 if (r) {
8941                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8942                         static_call(kvm_x86_set_irq)(vcpu);
8943                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8944                 }
8945                 if (kvm_cpu_has_injectable_intr(vcpu))
8946                         static_call(kvm_x86_enable_irq_window)(vcpu);
8947         }
8948
8949         if (is_guest_mode(vcpu) &&
8950             kvm_x86_ops.nested_ops->hv_timer_pending &&
8951             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8952                 *req_immediate_exit = true;
8953
8954         WARN_ON(vcpu->arch.exception.pending);
8955         return 0;
8956
8957 out:
8958         if (r == -EBUSY) {
8959                 *req_immediate_exit = true;
8960                 r = 0;
8961         }
8962         return r;
8963 }
8964
8965 static void process_nmi(struct kvm_vcpu *vcpu)
8966 {
8967         unsigned limit = 2;
8968
8969         /*
8970          * x86 is limited to one NMI running, and one NMI pending after it.
8971          * If an NMI is already in progress, limit further NMIs to just one.
8972          * Otherwise, allow two (and we'll inject the first one immediately).
8973          */
8974         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8975                 limit = 1;
8976
8977         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8978         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8979         kvm_make_request(KVM_REQ_EVENT, vcpu);
8980 }
8981
8982 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8983 {
8984         u32 flags = 0;
8985         flags |= seg->g       << 23;
8986         flags |= seg->db      << 22;
8987         flags |= seg->l       << 21;
8988         flags |= seg->avl     << 20;
8989         flags |= seg->present << 15;
8990         flags |= seg->dpl     << 13;
8991         flags |= seg->s       << 12;
8992         flags |= seg->type    << 8;
8993         return flags;
8994 }
8995
8996 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8997 {
8998         struct kvm_segment seg;
8999         int offset;
9000
9001         kvm_get_segment(vcpu, &seg, n);
9002         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9003
9004         if (n < 3)
9005                 offset = 0x7f84 + n * 12;
9006         else
9007                 offset = 0x7f2c + (n - 3) * 12;
9008
9009         put_smstate(u32, buf, offset + 8, seg.base);
9010         put_smstate(u32, buf, offset + 4, seg.limit);
9011         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9012 }
9013
9014 #ifdef CONFIG_X86_64
9015 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9016 {
9017         struct kvm_segment seg;
9018         int offset;
9019         u16 flags;
9020
9021         kvm_get_segment(vcpu, &seg, n);
9022         offset = 0x7e00 + n * 16;
9023
9024         flags = enter_smm_get_segment_flags(&seg) >> 8;
9025         put_smstate(u16, buf, offset, seg.selector);
9026         put_smstate(u16, buf, offset + 2, flags);
9027         put_smstate(u32, buf, offset + 4, seg.limit);
9028         put_smstate(u64, buf, offset + 8, seg.base);
9029 }
9030 #endif
9031
9032 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9033 {
9034         struct desc_ptr dt;
9035         struct kvm_segment seg;
9036         unsigned long val;
9037         int i;
9038
9039         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9040         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9041         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9042         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9043
9044         for (i = 0; i < 8; i++)
9045                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9046
9047         kvm_get_dr(vcpu, 6, &val);
9048         put_smstate(u32, buf, 0x7fcc, (u32)val);
9049         kvm_get_dr(vcpu, 7, &val);
9050         put_smstate(u32, buf, 0x7fc8, (u32)val);
9051
9052         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9053         put_smstate(u32, buf, 0x7fc4, seg.selector);
9054         put_smstate(u32, buf, 0x7f64, seg.base);
9055         put_smstate(u32, buf, 0x7f60, seg.limit);
9056         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9057
9058         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9059         put_smstate(u32, buf, 0x7fc0, seg.selector);
9060         put_smstate(u32, buf, 0x7f80, seg.base);
9061         put_smstate(u32, buf, 0x7f7c, seg.limit);
9062         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9063
9064         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9065         put_smstate(u32, buf, 0x7f74, dt.address);
9066         put_smstate(u32, buf, 0x7f70, dt.size);
9067
9068         static_call(kvm_x86_get_idt)(vcpu, &dt);
9069         put_smstate(u32, buf, 0x7f58, dt.address);
9070         put_smstate(u32, buf, 0x7f54, dt.size);
9071
9072         for (i = 0; i < 6; i++)
9073                 enter_smm_save_seg_32(vcpu, buf, i);
9074
9075         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9076
9077         /* revision id */
9078         put_smstate(u32, buf, 0x7efc, 0x00020000);
9079         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9080 }
9081
9082 #ifdef CONFIG_X86_64
9083 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9084 {
9085         struct desc_ptr dt;
9086         struct kvm_segment seg;
9087         unsigned long val;
9088         int i;
9089
9090         for (i = 0; i < 16; i++)
9091                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9092
9093         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9094         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9095
9096         kvm_get_dr(vcpu, 6, &val);
9097         put_smstate(u64, buf, 0x7f68, val);
9098         kvm_get_dr(vcpu, 7, &val);
9099         put_smstate(u64, buf, 0x7f60, val);
9100
9101         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9102         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9103         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9104
9105         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9106
9107         /* revision id */
9108         put_smstate(u32, buf, 0x7efc, 0x00020064);
9109
9110         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9111
9112         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9113         put_smstate(u16, buf, 0x7e90, seg.selector);
9114         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9115         put_smstate(u32, buf, 0x7e94, seg.limit);
9116         put_smstate(u64, buf, 0x7e98, seg.base);
9117
9118         static_call(kvm_x86_get_idt)(vcpu, &dt);
9119         put_smstate(u32, buf, 0x7e84, dt.size);
9120         put_smstate(u64, buf, 0x7e88, dt.address);
9121
9122         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9123         put_smstate(u16, buf, 0x7e70, seg.selector);
9124         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9125         put_smstate(u32, buf, 0x7e74, seg.limit);
9126         put_smstate(u64, buf, 0x7e78, seg.base);
9127
9128         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9129         put_smstate(u32, buf, 0x7e64, dt.size);
9130         put_smstate(u64, buf, 0x7e68, dt.address);
9131
9132         for (i = 0; i < 6; i++)
9133                 enter_smm_save_seg_64(vcpu, buf, i);
9134 }
9135 #endif
9136
9137 static void enter_smm(struct kvm_vcpu *vcpu)
9138 {
9139         struct kvm_segment cs, ds;
9140         struct desc_ptr dt;
9141         unsigned long cr0;
9142         char buf[512];
9143
9144         memset(buf, 0, 512);
9145 #ifdef CONFIG_X86_64
9146         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9147                 enter_smm_save_state_64(vcpu, buf);
9148         else
9149 #endif
9150                 enter_smm_save_state_32(vcpu, buf);
9151
9152         /*
9153          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9154          * state (e.g. leave guest mode) after we've saved the state into the
9155          * SMM state-save area.
9156          */
9157         static_call(kvm_x86_enter_smm)(vcpu, buf);
9158
9159         kvm_smm_changed(vcpu, true);
9160         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9161
9162         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9163                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9164         else
9165                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9166
9167         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9168         kvm_rip_write(vcpu, 0x8000);
9169
9170         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9171         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9172         vcpu->arch.cr0 = cr0;
9173
9174         static_call(kvm_x86_set_cr4)(vcpu, 0);
9175
9176         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9177         dt.address = dt.size = 0;
9178         static_call(kvm_x86_set_idt)(vcpu, &dt);
9179
9180         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9181
9182         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9183         cs.base = vcpu->arch.smbase;
9184
9185         ds.selector = 0;
9186         ds.base = 0;
9187
9188         cs.limit    = ds.limit = 0xffffffff;
9189         cs.type     = ds.type = 0x3;
9190         cs.dpl      = ds.dpl = 0;
9191         cs.db       = ds.db = 0;
9192         cs.s        = ds.s = 1;
9193         cs.l        = ds.l = 0;
9194         cs.g        = ds.g = 1;
9195         cs.avl      = ds.avl = 0;
9196         cs.present  = ds.present = 1;
9197         cs.unusable = ds.unusable = 0;
9198         cs.padding  = ds.padding = 0;
9199
9200         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9201         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9202         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9203         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9204         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9205         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9206
9207 #ifdef CONFIG_X86_64
9208         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9209                 static_call(kvm_x86_set_efer)(vcpu, 0);
9210 #endif
9211
9212         kvm_update_cpuid_runtime(vcpu);
9213         kvm_mmu_reset_context(vcpu);
9214 }
9215
9216 static void process_smi(struct kvm_vcpu *vcpu)
9217 {
9218         vcpu->arch.smi_pending = true;
9219         kvm_make_request(KVM_REQ_EVENT, vcpu);
9220 }
9221
9222 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9223                                        unsigned long *vcpu_bitmap)
9224 {
9225         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9226 }
9227
9228 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9229 {
9230         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9231 }
9232
9233 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9234 {
9235         bool activate;
9236
9237         if (!lapic_in_kernel(vcpu))
9238                 return;
9239
9240         mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9241
9242         activate = kvm_apicv_activated(vcpu->kvm);
9243         if (vcpu->arch.apicv_active == activate)
9244                 goto out;
9245
9246         vcpu->arch.apicv_active = activate;
9247         kvm_apic_update_apicv(vcpu);
9248         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9249
9250         /*
9251          * When APICv gets disabled, we may still have injected interrupts
9252          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9253          * still active when the interrupt got accepted. Make sure
9254          * inject_pending_event() is called to check for that.
9255          */
9256         if (!vcpu->arch.apicv_active)
9257                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9258
9259 out:
9260         mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9261 }
9262 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9263
9264 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9265 {
9266         unsigned long old, new;
9267
9268         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9269             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9270                 return;
9271
9272         old = new = kvm->arch.apicv_inhibit_reasons;
9273
9274         if (activate)
9275                 __clear_bit(bit, &new);
9276         else
9277                 __set_bit(bit, &new);
9278
9279         if (!!old != !!new) {
9280                 trace_kvm_apicv_update_request(activate, bit);
9281                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9282                 kvm->arch.apicv_inhibit_reasons = new;
9283                 if (new) {
9284                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9285                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9286                 }
9287         } else
9288                 kvm->arch.apicv_inhibit_reasons = new;
9289 }
9290 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9291
9292 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9293 {
9294         mutex_lock(&kvm->arch.apicv_update_lock);
9295         __kvm_request_apicv_update(kvm, activate, bit);
9296         mutex_unlock(&kvm->arch.apicv_update_lock);
9297 }
9298 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9299
9300 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9301 {
9302         if (!kvm_apic_present(vcpu))
9303                 return;
9304
9305         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9306
9307         if (irqchip_split(vcpu->kvm))
9308                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9309         else {
9310                 if (vcpu->arch.apicv_active)
9311                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9312                 if (ioapic_in_kernel(vcpu->kvm))
9313                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9314         }
9315
9316         if (is_guest_mode(vcpu))
9317                 vcpu->arch.load_eoi_exitmap_pending = true;
9318         else
9319                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9320 }
9321
9322 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9323 {
9324         u64 eoi_exit_bitmap[4];
9325
9326         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9327                 return;
9328
9329         if (to_hv_vcpu(vcpu))
9330                 bitmap_or((ulong *)eoi_exit_bitmap,
9331                           vcpu->arch.ioapic_handled_vectors,
9332                           to_hv_synic(vcpu)->vec_bitmap, 256);
9333
9334         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9335 }
9336
9337 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9338                                             unsigned long start, unsigned long end)
9339 {
9340         unsigned long apic_address;
9341
9342         /*
9343          * The physical address of apic access page is stored in the VMCS.
9344          * Update it when it becomes invalid.
9345          */
9346         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9347         if (start <= apic_address && apic_address < end)
9348                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9349 }
9350
9351 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9352 {
9353         if (!lapic_in_kernel(vcpu))
9354                 return;
9355
9356         if (!kvm_x86_ops.set_apic_access_page_addr)
9357                 return;
9358
9359         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9360 }
9361
9362 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9363 {
9364         smp_send_reschedule(vcpu->cpu);
9365 }
9366 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9367
9368 /*
9369  * Returns 1 to let vcpu_run() continue the guest execution loop without
9370  * exiting to the userspace.  Otherwise, the value will be returned to the
9371  * userspace.
9372  */
9373 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9374 {
9375         int r;
9376         bool req_int_win =
9377                 dm_request_for_irq_injection(vcpu) &&
9378                 kvm_cpu_accept_dm_intr(vcpu);
9379         fastpath_t exit_fastpath;
9380
9381         bool req_immediate_exit = false;
9382
9383         /* Forbid vmenter if vcpu dirty ring is soft-full */
9384         if (unlikely(vcpu->kvm->dirty_ring_size &&
9385                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9386                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9387                 trace_kvm_dirty_ring_exit(vcpu);
9388                 r = 0;
9389                 goto out;
9390         }
9391
9392         if (kvm_request_pending(vcpu)) {
9393                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9394                         r = -EIO;
9395                         goto out;
9396                 }
9397                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9398                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9399                                 r = 0;
9400                                 goto out;
9401                         }
9402                 }
9403                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9404                         kvm_mmu_unload(vcpu);
9405                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9406                         __kvm_migrate_timers(vcpu);
9407                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9408                         kvm_gen_update_masterclock(vcpu->kvm);
9409                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9410                         kvm_gen_kvmclock_update(vcpu);
9411                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9412                         r = kvm_guest_time_update(vcpu);
9413                         if (unlikely(r))
9414                                 goto out;
9415                 }
9416                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9417                         kvm_mmu_sync_roots(vcpu);
9418                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9419                         kvm_mmu_load_pgd(vcpu);
9420                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9421                         kvm_vcpu_flush_tlb_all(vcpu);
9422
9423                         /* Flushing all ASIDs flushes the current ASID... */
9424                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9425                 }
9426                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9427                         kvm_vcpu_flush_tlb_current(vcpu);
9428                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9429                         kvm_vcpu_flush_tlb_guest(vcpu);
9430
9431                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9432                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9433                         r = 0;
9434                         goto out;
9435                 }
9436                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9437                         if (is_guest_mode(vcpu)) {
9438                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9439                         } else {
9440                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9441                                 vcpu->mmio_needed = 0;
9442                                 r = 0;
9443                                 goto out;
9444                         }
9445                 }
9446                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9447                         /* Page is swapped out. Do synthetic halt */
9448                         vcpu->arch.apf.halted = true;
9449                         r = 1;
9450                         goto out;
9451                 }
9452                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9453                         record_steal_time(vcpu);
9454                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9455                         process_smi(vcpu);
9456                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9457                         process_nmi(vcpu);
9458                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9459                         kvm_pmu_handle_event(vcpu);
9460                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9461                         kvm_pmu_deliver_pmi(vcpu);
9462                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9463                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9464                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9465                                      vcpu->arch.ioapic_handled_vectors)) {
9466                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9467                                 vcpu->run->eoi.vector =
9468                                                 vcpu->arch.pending_ioapic_eoi;
9469                                 r = 0;
9470                                 goto out;
9471                         }
9472                 }
9473                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9474                         vcpu_scan_ioapic(vcpu);
9475                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9476                         vcpu_load_eoi_exitmap(vcpu);
9477                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9478                         kvm_vcpu_reload_apic_access_page(vcpu);
9479                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9480                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9481                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9482                         r = 0;
9483                         goto out;
9484                 }
9485                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9486                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9487                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9488                         r = 0;
9489                         goto out;
9490                 }
9491                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9492                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9493
9494                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9495                         vcpu->run->hyperv = hv_vcpu->exit;
9496                         r = 0;
9497                         goto out;
9498                 }
9499
9500                 /*
9501                  * KVM_REQ_HV_STIMER has to be processed after
9502                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9503                  * depend on the guest clock being up-to-date
9504                  */
9505                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9506                         kvm_hv_process_stimers(vcpu);
9507                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9508                         kvm_vcpu_update_apicv(vcpu);
9509                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9510                         kvm_check_async_pf_completion(vcpu);
9511                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9512                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9513
9514                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9515                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9516         }
9517
9518         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9519             kvm_xen_has_interrupt(vcpu)) {
9520                 ++vcpu->stat.req_event;
9521                 r = kvm_apic_accept_events(vcpu);
9522                 if (r < 0) {
9523                         r = 0;
9524                         goto out;
9525                 }
9526                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9527                         r = 1;
9528                         goto out;
9529                 }
9530
9531                 r = inject_pending_event(vcpu, &req_immediate_exit);
9532                 if (r < 0) {
9533                         r = 0;
9534                         goto out;
9535                 }
9536                 if (req_int_win)
9537                         static_call(kvm_x86_enable_irq_window)(vcpu);
9538
9539                 if (kvm_lapic_enabled(vcpu)) {
9540                         update_cr8_intercept(vcpu);
9541                         kvm_lapic_sync_to_vapic(vcpu);
9542                 }
9543         }
9544
9545         r = kvm_mmu_reload(vcpu);
9546         if (unlikely(r)) {
9547                 goto cancel_injection;
9548         }
9549
9550         preempt_disable();
9551
9552         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9553
9554         /*
9555          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9556          * IPI are then delayed after guest entry, which ensures that they
9557          * result in virtual interrupt delivery.
9558          */
9559         local_irq_disable();
9560         vcpu->mode = IN_GUEST_MODE;
9561
9562         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9563
9564         /*
9565          * 1) We should set ->mode before checking ->requests.  Please see
9566          * the comment in kvm_vcpu_exiting_guest_mode().
9567          *
9568          * 2) For APICv, we should set ->mode before checking PID.ON. This
9569          * pairs with the memory barrier implicit in pi_test_and_set_on
9570          * (see vmx_deliver_posted_interrupt).
9571          *
9572          * 3) This also orders the write to mode from any reads to the page
9573          * tables done while the VCPU is running.  Please see the comment
9574          * in kvm_flush_remote_tlbs.
9575          */
9576         smp_mb__after_srcu_read_unlock();
9577
9578         /*
9579          * This handles the case where a posted interrupt was
9580          * notified with kvm_vcpu_kick.
9581          */
9582         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9583                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9584
9585         if (kvm_vcpu_exit_request(vcpu)) {
9586                 vcpu->mode = OUTSIDE_GUEST_MODE;
9587                 smp_wmb();
9588                 local_irq_enable();
9589                 preempt_enable();
9590                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9591                 r = 1;
9592                 goto cancel_injection;
9593         }
9594
9595         if (req_immediate_exit) {
9596                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9597                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9598         }
9599
9600         fpregs_assert_state_consistent();
9601         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9602                 switch_fpu_return();
9603
9604         if (unlikely(vcpu->arch.switch_db_regs)) {
9605                 set_debugreg(0, 7);
9606                 set_debugreg(vcpu->arch.eff_db[0], 0);
9607                 set_debugreg(vcpu->arch.eff_db[1], 1);
9608                 set_debugreg(vcpu->arch.eff_db[2], 2);
9609                 set_debugreg(vcpu->arch.eff_db[3], 3);
9610         } else if (unlikely(hw_breakpoint_active())) {
9611                 set_debugreg(0, 7);
9612         }
9613
9614         for (;;) {
9615                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9616                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9617                         break;
9618
9619                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9620                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9621                         break;
9622                 }
9623
9624                 if (vcpu->arch.apicv_active)
9625                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9626         }
9627
9628         /*
9629          * Do this here before restoring debug registers on the host.  And
9630          * since we do this before handling the vmexit, a DR access vmexit
9631          * can (a) read the correct value of the debug registers, (b) set
9632          * KVM_DEBUGREG_WONT_EXIT again.
9633          */
9634         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9635                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9636                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9637                 kvm_update_dr0123(vcpu);
9638                 kvm_update_dr7(vcpu);
9639         }
9640
9641         /*
9642          * If the guest has used debug registers, at least dr7
9643          * will be disabled while returning to the host.
9644          * If we don't have active breakpoints in the host, we don't
9645          * care about the messed up debug address registers. But if
9646          * we have some of them active, restore the old state.
9647          */
9648         if (hw_breakpoint_active())
9649                 hw_breakpoint_restore();
9650
9651         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9652         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9653
9654         vcpu->mode = OUTSIDE_GUEST_MODE;
9655         smp_wmb();
9656
9657         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9658
9659         /*
9660          * Consume any pending interrupts, including the possible source of
9661          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9662          * An instruction is required after local_irq_enable() to fully unblock
9663          * interrupts on processors that implement an interrupt shadow, the
9664          * stat.exits increment will do nicely.
9665          */
9666         kvm_before_interrupt(vcpu);
9667         local_irq_enable();
9668         ++vcpu->stat.exits;
9669         local_irq_disable();
9670         kvm_after_interrupt(vcpu);
9671
9672         /*
9673          * Wait until after servicing IRQs to account guest time so that any
9674          * ticks that occurred while running the guest are properly accounted
9675          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9676          * of accounting via context tracking, but the loss of accuracy is
9677          * acceptable for all known use cases.
9678          */
9679         vtime_account_guest_exit();
9680
9681         if (lapic_in_kernel(vcpu)) {
9682                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9683                 if (delta != S64_MIN) {
9684                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9685                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9686                 }
9687         }
9688
9689         local_irq_enable();
9690         preempt_enable();
9691
9692         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9693
9694         /*
9695          * Profile KVM exit RIPs:
9696          */
9697         if (unlikely(prof_on == KVM_PROFILING)) {
9698                 unsigned long rip = kvm_rip_read(vcpu);
9699                 profile_hit(KVM_PROFILING, (void *)rip);
9700         }
9701
9702         if (unlikely(vcpu->arch.tsc_always_catchup))
9703                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9704
9705         if (vcpu->arch.apic_attention)
9706                 kvm_lapic_sync_from_vapic(vcpu);
9707
9708         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9709         return r;
9710
9711 cancel_injection:
9712         if (req_immediate_exit)
9713                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9714         static_call(kvm_x86_cancel_injection)(vcpu);
9715         if (unlikely(vcpu->arch.apic_attention))
9716                 kvm_lapic_sync_from_vapic(vcpu);
9717 out:
9718         return r;
9719 }
9720
9721 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9722 {
9723         if (!kvm_arch_vcpu_runnable(vcpu) &&
9724             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9725                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9726                 kvm_vcpu_block(vcpu);
9727                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9728
9729                 if (kvm_x86_ops.post_block)
9730                         static_call(kvm_x86_post_block)(vcpu);
9731
9732                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9733                         return 1;
9734         }
9735
9736         if (kvm_apic_accept_events(vcpu) < 0)
9737                 return 0;
9738         switch(vcpu->arch.mp_state) {
9739         case KVM_MP_STATE_HALTED:
9740         case KVM_MP_STATE_AP_RESET_HOLD:
9741                 vcpu->arch.pv.pv_unhalted = false;
9742                 vcpu->arch.mp_state =
9743                         KVM_MP_STATE_RUNNABLE;
9744                 fallthrough;
9745         case KVM_MP_STATE_RUNNABLE:
9746                 vcpu->arch.apf.halted = false;
9747                 break;
9748         case KVM_MP_STATE_INIT_RECEIVED:
9749                 break;
9750         default:
9751                 return -EINTR;
9752         }
9753         return 1;
9754 }
9755
9756 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9757 {
9758         if (is_guest_mode(vcpu))
9759                 kvm_check_nested_events(vcpu);
9760
9761         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9762                 !vcpu->arch.apf.halted);
9763 }
9764
9765 static int vcpu_run(struct kvm_vcpu *vcpu)
9766 {
9767         int r;
9768         struct kvm *kvm = vcpu->kvm;
9769
9770         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9771         vcpu->arch.l1tf_flush_l1d = true;
9772
9773         for (;;) {
9774                 if (kvm_vcpu_running(vcpu)) {
9775                         r = vcpu_enter_guest(vcpu);
9776                 } else {
9777                         r = vcpu_block(kvm, vcpu);
9778                 }
9779
9780                 if (r <= 0)
9781                         break;
9782
9783                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9784                 if (kvm_cpu_has_pending_timer(vcpu))
9785                         kvm_inject_pending_timer_irqs(vcpu);
9786
9787                 if (dm_request_for_irq_injection(vcpu) &&
9788                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9789                         r = 0;
9790                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9791                         ++vcpu->stat.request_irq_exits;
9792                         break;
9793                 }
9794
9795                 if (__xfer_to_guest_mode_work_pending()) {
9796                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9797                         r = xfer_to_guest_mode_handle_work(vcpu);
9798                         if (r)
9799                                 return r;
9800                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9801                 }
9802         }
9803
9804         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9805
9806         return r;
9807 }
9808
9809 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9810 {
9811         int r;
9812
9813         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9814         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9815         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9816         return r;
9817 }
9818
9819 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9820 {
9821         BUG_ON(!vcpu->arch.pio.count);
9822
9823         return complete_emulated_io(vcpu);
9824 }
9825
9826 /*
9827  * Implements the following, as a state machine:
9828  *
9829  * read:
9830  *   for each fragment
9831  *     for each mmio piece in the fragment
9832  *       write gpa, len
9833  *       exit
9834  *       copy data
9835  *   execute insn
9836  *
9837  * write:
9838  *   for each fragment
9839  *     for each mmio piece in the fragment
9840  *       write gpa, len
9841  *       copy data
9842  *       exit
9843  */
9844 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9845 {
9846         struct kvm_run *run = vcpu->run;
9847         struct kvm_mmio_fragment *frag;
9848         unsigned len;
9849
9850         BUG_ON(!vcpu->mmio_needed);
9851
9852         /* Complete previous fragment */
9853         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9854         len = min(8u, frag->len);
9855         if (!vcpu->mmio_is_write)
9856                 memcpy(frag->data, run->mmio.data, len);
9857
9858         if (frag->len <= 8) {
9859                 /* Switch to the next fragment. */
9860                 frag++;
9861                 vcpu->mmio_cur_fragment++;
9862         } else {
9863                 /* Go forward to the next mmio piece. */
9864                 frag->data += len;
9865                 frag->gpa += len;
9866                 frag->len -= len;
9867         }
9868
9869         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9870                 vcpu->mmio_needed = 0;
9871
9872                 /* FIXME: return into emulator if single-stepping.  */
9873                 if (vcpu->mmio_is_write)
9874                         return 1;
9875                 vcpu->mmio_read_completed = 1;
9876                 return complete_emulated_io(vcpu);
9877         }
9878
9879         run->exit_reason = KVM_EXIT_MMIO;
9880         run->mmio.phys_addr = frag->gpa;
9881         if (vcpu->mmio_is_write)
9882                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9883         run->mmio.len = min(8u, frag->len);
9884         run->mmio.is_write = vcpu->mmio_is_write;
9885         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9886         return 0;
9887 }
9888
9889 static void kvm_save_current_fpu(struct fpu *fpu)
9890 {
9891         /*
9892          * If the target FPU state is not resident in the CPU registers, just
9893          * memcpy() from current, else save CPU state directly to the target.
9894          */
9895         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9896                 memcpy(&fpu->state, &current->thread.fpu.state,
9897                        fpu_kernel_xstate_size);
9898         else
9899                 save_fpregs_to_fpstate(fpu);
9900 }
9901
9902 /* Swap (qemu) user FPU context for the guest FPU context. */
9903 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9904 {
9905         fpregs_lock();
9906
9907         kvm_save_current_fpu(vcpu->arch.user_fpu);
9908
9909         /*
9910          * Guests with protected state can't have it set by the hypervisor,
9911          * so skip trying to set it.
9912          */
9913         if (vcpu->arch.guest_fpu)
9914                 /* PKRU is separately restored in kvm_x86_ops.run. */
9915                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
9916                                         ~XFEATURE_MASK_PKRU);
9917
9918         fpregs_mark_activate();
9919         fpregs_unlock();
9920
9921         trace_kvm_fpu(1);
9922 }
9923
9924 /* When vcpu_run ends, restore user space FPU context. */
9925 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9926 {
9927         fpregs_lock();
9928
9929         /*
9930          * Guests with protected state can't have it read by the hypervisor,
9931          * so skip trying to save it.
9932          */
9933         if (vcpu->arch.guest_fpu)
9934                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9935
9936         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
9937
9938         fpregs_mark_activate();
9939         fpregs_unlock();
9940
9941         ++vcpu->stat.fpu_reload;
9942         trace_kvm_fpu(0);
9943 }
9944
9945 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9946 {
9947         struct kvm_run *kvm_run = vcpu->run;
9948         int r;
9949
9950         vcpu_load(vcpu);
9951         kvm_sigset_activate(vcpu);
9952         kvm_run->flags = 0;
9953         kvm_load_guest_fpu(vcpu);
9954
9955         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9956                 if (kvm_run->immediate_exit) {
9957                         r = -EINTR;
9958                         goto out;
9959                 }
9960                 kvm_vcpu_block(vcpu);
9961                 if (kvm_apic_accept_events(vcpu) < 0) {
9962                         r = 0;
9963                         goto out;
9964                 }
9965                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9966                 r = -EAGAIN;
9967                 if (signal_pending(current)) {
9968                         r = -EINTR;
9969                         kvm_run->exit_reason = KVM_EXIT_INTR;
9970                         ++vcpu->stat.signal_exits;
9971                 }
9972                 goto out;
9973         }
9974
9975         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
9976             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
9977                 r = -EINVAL;
9978                 goto out;
9979         }
9980
9981         if (kvm_run->kvm_dirty_regs) {
9982                 r = sync_regs(vcpu);
9983                 if (r != 0)
9984                         goto out;
9985         }
9986
9987         /* re-sync apic's tpr */
9988         if (!lapic_in_kernel(vcpu)) {
9989                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9990                         r = -EINVAL;
9991                         goto out;
9992                 }
9993         }
9994
9995         if (unlikely(vcpu->arch.complete_userspace_io)) {
9996                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9997                 vcpu->arch.complete_userspace_io = NULL;
9998                 r = cui(vcpu);
9999                 if (r <= 0)
10000                         goto out;
10001         } else
10002                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10003
10004         if (kvm_run->immediate_exit)
10005                 r = -EINTR;
10006         else
10007                 r = vcpu_run(vcpu);
10008
10009 out:
10010         kvm_put_guest_fpu(vcpu);
10011         if (kvm_run->kvm_valid_regs)
10012                 store_regs(vcpu);
10013         post_kvm_run_save(vcpu);
10014         kvm_sigset_deactivate(vcpu);
10015
10016         vcpu_put(vcpu);
10017         return r;
10018 }
10019
10020 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10021 {
10022         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10023                 /*
10024                  * We are here if userspace calls get_regs() in the middle of
10025                  * instruction emulation. Registers state needs to be copied
10026                  * back from emulation context to vcpu. Userspace shouldn't do
10027                  * that usually, but some bad designed PV devices (vmware
10028                  * backdoor interface) need this to work
10029                  */
10030                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10031                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10032         }
10033         regs->rax = kvm_rax_read(vcpu);
10034         regs->rbx = kvm_rbx_read(vcpu);
10035         regs->rcx = kvm_rcx_read(vcpu);
10036         regs->rdx = kvm_rdx_read(vcpu);
10037         regs->rsi = kvm_rsi_read(vcpu);
10038         regs->rdi = kvm_rdi_read(vcpu);
10039         regs->rsp = kvm_rsp_read(vcpu);
10040         regs->rbp = kvm_rbp_read(vcpu);
10041 #ifdef CONFIG_X86_64
10042         regs->r8 = kvm_r8_read(vcpu);
10043         regs->r9 = kvm_r9_read(vcpu);
10044         regs->r10 = kvm_r10_read(vcpu);
10045         regs->r11 = kvm_r11_read(vcpu);
10046         regs->r12 = kvm_r12_read(vcpu);
10047         regs->r13 = kvm_r13_read(vcpu);
10048         regs->r14 = kvm_r14_read(vcpu);
10049         regs->r15 = kvm_r15_read(vcpu);
10050 #endif
10051
10052         regs->rip = kvm_rip_read(vcpu);
10053         regs->rflags = kvm_get_rflags(vcpu);
10054 }
10055
10056 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10057 {
10058         vcpu_load(vcpu);
10059         __get_regs(vcpu, regs);
10060         vcpu_put(vcpu);
10061         return 0;
10062 }
10063
10064 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10065 {
10066         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10067         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10068
10069         kvm_rax_write(vcpu, regs->rax);
10070         kvm_rbx_write(vcpu, regs->rbx);
10071         kvm_rcx_write(vcpu, regs->rcx);
10072         kvm_rdx_write(vcpu, regs->rdx);
10073         kvm_rsi_write(vcpu, regs->rsi);
10074         kvm_rdi_write(vcpu, regs->rdi);
10075         kvm_rsp_write(vcpu, regs->rsp);
10076         kvm_rbp_write(vcpu, regs->rbp);
10077 #ifdef CONFIG_X86_64
10078         kvm_r8_write(vcpu, regs->r8);
10079         kvm_r9_write(vcpu, regs->r9);
10080         kvm_r10_write(vcpu, regs->r10);
10081         kvm_r11_write(vcpu, regs->r11);
10082         kvm_r12_write(vcpu, regs->r12);
10083         kvm_r13_write(vcpu, regs->r13);
10084         kvm_r14_write(vcpu, regs->r14);
10085         kvm_r15_write(vcpu, regs->r15);
10086 #endif
10087
10088         kvm_rip_write(vcpu, regs->rip);
10089         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10090
10091         vcpu->arch.exception.pending = false;
10092
10093         kvm_make_request(KVM_REQ_EVENT, vcpu);
10094 }
10095
10096 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10097 {
10098         vcpu_load(vcpu);
10099         __set_regs(vcpu, regs);
10100         vcpu_put(vcpu);
10101         return 0;
10102 }
10103
10104 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10105 {
10106         struct kvm_segment cs;
10107
10108         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10109         *db = cs.db;
10110         *l = cs.l;
10111 }
10112 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10113
10114 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10115 {
10116         struct desc_ptr dt;
10117
10118         if (vcpu->arch.guest_state_protected)
10119                 goto skip_protected_regs;
10120
10121         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10122         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10123         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10124         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10125         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10126         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10127
10128         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10129         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10130
10131         static_call(kvm_x86_get_idt)(vcpu, &dt);
10132         sregs->idt.limit = dt.size;
10133         sregs->idt.base = dt.address;
10134         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10135         sregs->gdt.limit = dt.size;
10136         sregs->gdt.base = dt.address;
10137
10138         sregs->cr2 = vcpu->arch.cr2;
10139         sregs->cr3 = kvm_read_cr3(vcpu);
10140
10141 skip_protected_regs:
10142         sregs->cr0 = kvm_read_cr0(vcpu);
10143         sregs->cr4 = kvm_read_cr4(vcpu);
10144         sregs->cr8 = kvm_get_cr8(vcpu);
10145         sregs->efer = vcpu->arch.efer;
10146         sregs->apic_base = kvm_get_apic_base(vcpu);
10147 }
10148
10149 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10150 {
10151         __get_sregs_common(vcpu, sregs);
10152
10153         if (vcpu->arch.guest_state_protected)
10154                 return;
10155
10156         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10157                 set_bit(vcpu->arch.interrupt.nr,
10158                         (unsigned long *)sregs->interrupt_bitmap);
10159 }
10160
10161 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10162 {
10163         int i;
10164
10165         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10166
10167         if (vcpu->arch.guest_state_protected)
10168                 return;
10169
10170         if (is_pae_paging(vcpu)) {
10171                 for (i = 0 ; i < 4 ; i++)
10172                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10173                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10174         }
10175 }
10176
10177 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10178                                   struct kvm_sregs *sregs)
10179 {
10180         vcpu_load(vcpu);
10181         __get_sregs(vcpu, sregs);
10182         vcpu_put(vcpu);
10183         return 0;
10184 }
10185
10186 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10187                                     struct kvm_mp_state *mp_state)
10188 {
10189         int r;
10190
10191         vcpu_load(vcpu);
10192         if (kvm_mpx_supported())
10193                 kvm_load_guest_fpu(vcpu);
10194
10195         r = kvm_apic_accept_events(vcpu);
10196         if (r < 0)
10197                 goto out;
10198         r = 0;
10199
10200         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10201              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10202             vcpu->arch.pv.pv_unhalted)
10203                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10204         else
10205                 mp_state->mp_state = vcpu->arch.mp_state;
10206
10207 out:
10208         if (kvm_mpx_supported())
10209                 kvm_put_guest_fpu(vcpu);
10210         vcpu_put(vcpu);
10211         return r;
10212 }
10213
10214 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10215                                     struct kvm_mp_state *mp_state)
10216 {
10217         int ret = -EINVAL;
10218
10219         vcpu_load(vcpu);
10220
10221         if (!lapic_in_kernel(vcpu) &&
10222             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10223                 goto out;
10224
10225         /*
10226          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10227          * INIT state; latched init should be reported using
10228          * KVM_SET_VCPU_EVENTS, so reject it here.
10229          */
10230         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10231             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10232              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10233                 goto out;
10234
10235         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10236                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10237                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10238         } else
10239                 vcpu->arch.mp_state = mp_state->mp_state;
10240         kvm_make_request(KVM_REQ_EVENT, vcpu);
10241
10242         ret = 0;
10243 out:
10244         vcpu_put(vcpu);
10245         return ret;
10246 }
10247
10248 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10249                     int reason, bool has_error_code, u32 error_code)
10250 {
10251         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10252         int ret;
10253
10254         init_emulate_ctxt(vcpu);
10255
10256         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10257                                    has_error_code, error_code);
10258         if (ret) {
10259                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10260                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10261                 vcpu->run->internal.ndata = 0;
10262                 return 0;
10263         }
10264
10265         kvm_rip_write(vcpu, ctxt->eip);
10266         kvm_set_rflags(vcpu, ctxt->eflags);
10267         return 1;
10268 }
10269 EXPORT_SYMBOL_GPL(kvm_task_switch);
10270
10271 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10272 {
10273         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10274                 /*
10275                  * When EFER.LME and CR0.PG are set, the processor is in
10276                  * 64-bit mode (though maybe in a 32-bit code segment).
10277                  * CR4.PAE and EFER.LMA must be set.
10278                  */
10279                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10280                         return false;
10281                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10282                         return false;
10283         } else {
10284                 /*
10285                  * Not in 64-bit mode: EFER.LMA is clear and the code
10286                  * segment cannot be 64-bit.
10287                  */
10288                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10289                         return false;
10290         }
10291
10292         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10293 }
10294
10295 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10296                 int *mmu_reset_needed, bool update_pdptrs)
10297 {
10298         struct msr_data apic_base_msr;
10299         int idx;
10300         struct desc_ptr dt;
10301
10302         if (!kvm_is_valid_sregs(vcpu, sregs))
10303                 return -EINVAL;
10304
10305         apic_base_msr.data = sregs->apic_base;
10306         apic_base_msr.host_initiated = true;
10307         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10308                 return -EINVAL;
10309
10310         if (vcpu->arch.guest_state_protected)
10311                 return 0;
10312
10313         dt.size = sregs->idt.limit;
10314         dt.address = sregs->idt.base;
10315         static_call(kvm_x86_set_idt)(vcpu, &dt);
10316         dt.size = sregs->gdt.limit;
10317         dt.address = sregs->gdt.base;
10318         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10319
10320         vcpu->arch.cr2 = sregs->cr2;
10321         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10322         vcpu->arch.cr3 = sregs->cr3;
10323         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10324
10325         kvm_set_cr8(vcpu, sregs->cr8);
10326
10327         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10328         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10329
10330         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10331         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10332         vcpu->arch.cr0 = sregs->cr0;
10333
10334         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10335         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10336
10337         if (update_pdptrs) {
10338                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10339                 if (is_pae_paging(vcpu)) {
10340                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10341                         *mmu_reset_needed = 1;
10342                 }
10343                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10344         }
10345
10346         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10347         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10348         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10349         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10350         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10351         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10352
10353         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10354         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10355
10356         update_cr8_intercept(vcpu);
10357
10358         /* Older userspace won't unhalt the vcpu on reset. */
10359         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10360             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10361             !is_protmode(vcpu))
10362                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10363
10364         return 0;
10365 }
10366
10367 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10368 {
10369         int pending_vec, max_bits;
10370         int mmu_reset_needed = 0;
10371         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10372
10373         if (ret)
10374                 return ret;
10375
10376         if (mmu_reset_needed)
10377                 kvm_mmu_reset_context(vcpu);
10378
10379         max_bits = KVM_NR_INTERRUPTS;
10380         pending_vec = find_first_bit(
10381                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10382
10383         if (pending_vec < max_bits) {
10384                 kvm_queue_interrupt(vcpu, pending_vec, false);
10385                 pr_debug("Set back pending irq %d\n", pending_vec);
10386                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10387         }
10388         return 0;
10389 }
10390
10391 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10392 {
10393         int mmu_reset_needed = 0;
10394         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10395         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10396                 !(sregs2->efer & EFER_LMA);
10397         int i, ret;
10398
10399         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10400                 return -EINVAL;
10401
10402         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10403                 return -EINVAL;
10404
10405         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10406                                  &mmu_reset_needed, !valid_pdptrs);
10407         if (ret)
10408                 return ret;
10409
10410         if (valid_pdptrs) {
10411                 for (i = 0; i < 4 ; i++)
10412                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10413
10414                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10415                 mmu_reset_needed = 1;
10416                 vcpu->arch.pdptrs_from_userspace = true;
10417         }
10418         if (mmu_reset_needed)
10419                 kvm_mmu_reset_context(vcpu);
10420         return 0;
10421 }
10422
10423 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10424                                   struct kvm_sregs *sregs)
10425 {
10426         int ret;
10427
10428         vcpu_load(vcpu);
10429         ret = __set_sregs(vcpu, sregs);
10430         vcpu_put(vcpu);
10431         return ret;
10432 }
10433
10434 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10435                                         struct kvm_guest_debug *dbg)
10436 {
10437         unsigned long rflags;
10438         int i, r;
10439
10440         if (vcpu->arch.guest_state_protected)
10441                 return -EINVAL;
10442
10443         vcpu_load(vcpu);
10444
10445         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10446                 r = -EBUSY;
10447                 if (vcpu->arch.exception.pending)
10448                         goto out;
10449                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10450                         kvm_queue_exception(vcpu, DB_VECTOR);
10451                 else
10452                         kvm_queue_exception(vcpu, BP_VECTOR);
10453         }
10454
10455         /*
10456          * Read rflags as long as potentially injected trace flags are still
10457          * filtered out.
10458          */
10459         rflags = kvm_get_rflags(vcpu);
10460
10461         vcpu->guest_debug = dbg->control;
10462         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10463                 vcpu->guest_debug = 0;
10464
10465         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10466                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10467                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10468                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10469         } else {
10470                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10471                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10472         }
10473         kvm_update_dr7(vcpu);
10474
10475         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10476                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10477
10478         /*
10479          * Trigger an rflags update that will inject or remove the trace
10480          * flags.
10481          */
10482         kvm_set_rflags(vcpu, rflags);
10483
10484         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10485
10486         r = 0;
10487
10488 out:
10489         vcpu_put(vcpu);
10490         return r;
10491 }
10492
10493 /*
10494  * Translate a guest virtual address to a guest physical address.
10495  */
10496 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10497                                     struct kvm_translation *tr)
10498 {
10499         unsigned long vaddr = tr->linear_address;
10500         gpa_t gpa;
10501         int idx;
10502
10503         vcpu_load(vcpu);
10504
10505         idx = srcu_read_lock(&vcpu->kvm->srcu);
10506         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10507         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10508         tr->physical_address = gpa;
10509         tr->valid = gpa != UNMAPPED_GVA;
10510         tr->writeable = 1;
10511         tr->usermode = 0;
10512
10513         vcpu_put(vcpu);
10514         return 0;
10515 }
10516
10517 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10518 {
10519         struct fxregs_state *fxsave;
10520
10521         if (!vcpu->arch.guest_fpu)
10522                 return 0;
10523
10524         vcpu_load(vcpu);
10525
10526         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10527         memcpy(fpu->fpr, fxsave->st_space, 128);
10528         fpu->fcw = fxsave->cwd;
10529         fpu->fsw = fxsave->swd;
10530         fpu->ftwx = fxsave->twd;
10531         fpu->last_opcode = fxsave->fop;
10532         fpu->last_ip = fxsave->rip;
10533         fpu->last_dp = fxsave->rdp;
10534         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10535
10536         vcpu_put(vcpu);
10537         return 0;
10538 }
10539
10540 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10541 {
10542         struct fxregs_state *fxsave;
10543
10544         if (!vcpu->arch.guest_fpu)
10545                 return 0;
10546
10547         vcpu_load(vcpu);
10548
10549         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10550
10551         memcpy(fxsave->st_space, fpu->fpr, 128);
10552         fxsave->cwd = fpu->fcw;
10553         fxsave->swd = fpu->fsw;
10554         fxsave->twd = fpu->ftwx;
10555         fxsave->fop = fpu->last_opcode;
10556         fxsave->rip = fpu->last_ip;
10557         fxsave->rdp = fpu->last_dp;
10558         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10559
10560         vcpu_put(vcpu);
10561         return 0;
10562 }
10563
10564 static void store_regs(struct kvm_vcpu *vcpu)
10565 {
10566         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10567
10568         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10569                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10570
10571         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10572                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10573
10574         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10575                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10576                                 vcpu, &vcpu->run->s.regs.events);
10577 }
10578
10579 static int sync_regs(struct kvm_vcpu *vcpu)
10580 {
10581         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10582                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10583                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10584         }
10585         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10586                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10587                         return -EINVAL;
10588                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10589         }
10590         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10591                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10592                                 vcpu, &vcpu->run->s.regs.events))
10593                         return -EINVAL;
10594                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10595         }
10596
10597         return 0;
10598 }
10599
10600 static void fx_init(struct kvm_vcpu *vcpu)
10601 {
10602         if (!vcpu->arch.guest_fpu)
10603                 return;
10604
10605         fpstate_init(&vcpu->arch.guest_fpu->state);
10606         if (boot_cpu_has(X86_FEATURE_XSAVES))
10607                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10608                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10609
10610         /*
10611          * Ensure guest xcr0 is valid for loading
10612          */
10613         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10614 }
10615
10616 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10617 {
10618         if (vcpu->arch.guest_fpu) {
10619                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10620                 vcpu->arch.guest_fpu = NULL;
10621         }
10622 }
10623 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10624
10625 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10626 {
10627         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10628                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10629                              "guest TSC will not be reliable\n");
10630
10631         return 0;
10632 }
10633
10634 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10635 {
10636         struct page *page;
10637         int r;
10638
10639         vcpu->arch.last_vmentry_cpu = -1;
10640         vcpu->arch.regs_avail = ~0;
10641         vcpu->arch.regs_dirty = ~0;
10642
10643         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10644                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10645         else
10646                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10647
10648         r = kvm_mmu_create(vcpu);
10649         if (r < 0)
10650                 return r;
10651
10652         if (irqchip_in_kernel(vcpu->kvm)) {
10653                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10654                 if (r < 0)
10655                         goto fail_mmu_destroy;
10656                 if (kvm_apicv_activated(vcpu->kvm))
10657                         vcpu->arch.apicv_active = true;
10658         } else
10659                 static_branch_inc(&kvm_has_noapic_vcpu);
10660
10661         r = -ENOMEM;
10662
10663         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10664         if (!page)
10665                 goto fail_free_lapic;
10666         vcpu->arch.pio_data = page_address(page);
10667
10668         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10669                                        GFP_KERNEL_ACCOUNT);
10670         if (!vcpu->arch.mce_banks)
10671                 goto fail_free_pio_data;
10672         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10673
10674         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10675                                 GFP_KERNEL_ACCOUNT))
10676                 goto fail_free_mce_banks;
10677
10678         if (!alloc_emulate_ctxt(vcpu))
10679                 goto free_wbinvd_dirty_mask;
10680
10681         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10682                                                 GFP_KERNEL_ACCOUNT);
10683         if (!vcpu->arch.user_fpu) {
10684                 pr_err("kvm: failed to allocate userspace's fpu\n");
10685                 goto free_emulate_ctxt;
10686         }
10687
10688         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10689                                                  GFP_KERNEL_ACCOUNT);
10690         if (!vcpu->arch.guest_fpu) {
10691                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10692                 goto free_user_fpu;
10693         }
10694         fx_init(vcpu);
10695
10696         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10697         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10698
10699         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10700
10701         kvm_async_pf_hash_reset(vcpu);
10702         kvm_pmu_init(vcpu);
10703
10704         vcpu->arch.pending_external_vector = -1;
10705         vcpu->arch.preempted_in_kernel = false;
10706
10707 #if IS_ENABLED(CONFIG_HYPERV)
10708         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10709 #endif
10710
10711         r = static_call(kvm_x86_vcpu_create)(vcpu);
10712         if (r)
10713                 goto free_guest_fpu;
10714
10715         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10716         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10717         kvm_vcpu_mtrr_init(vcpu);
10718         vcpu_load(vcpu);
10719         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10720         kvm_vcpu_reset(vcpu, false);
10721         kvm_init_mmu(vcpu);
10722         vcpu_put(vcpu);
10723         return 0;
10724
10725 free_guest_fpu:
10726         kvm_free_guest_fpu(vcpu);
10727 free_user_fpu:
10728         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10729 free_emulate_ctxt:
10730         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10731 free_wbinvd_dirty_mask:
10732         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10733 fail_free_mce_banks:
10734         kfree(vcpu->arch.mce_banks);
10735 fail_free_pio_data:
10736         free_page((unsigned long)vcpu->arch.pio_data);
10737 fail_free_lapic:
10738         kvm_free_lapic(vcpu);
10739 fail_mmu_destroy:
10740         kvm_mmu_destroy(vcpu);
10741         return r;
10742 }
10743
10744 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10745 {
10746         struct kvm *kvm = vcpu->kvm;
10747
10748         if (mutex_lock_killable(&vcpu->mutex))
10749                 return;
10750         vcpu_load(vcpu);
10751         kvm_synchronize_tsc(vcpu, 0);
10752         vcpu_put(vcpu);
10753
10754         /* poll control enabled by default */
10755         vcpu->arch.msr_kvm_poll_control = 1;
10756
10757         mutex_unlock(&vcpu->mutex);
10758
10759         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10760                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10761                                                 KVMCLOCK_SYNC_PERIOD);
10762 }
10763
10764 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10765 {
10766         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10767         int idx;
10768
10769         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10770
10771         kvmclock_reset(vcpu);
10772
10773         static_call(kvm_x86_vcpu_free)(vcpu);
10774
10775         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10776         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10777         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10778         kvm_free_guest_fpu(vcpu);
10779
10780         kvm_hv_vcpu_uninit(vcpu);
10781         kvm_pmu_destroy(vcpu);
10782         kfree(vcpu->arch.mce_banks);
10783         kvm_free_lapic(vcpu);
10784         idx = srcu_read_lock(&vcpu->kvm->srcu);
10785         kvm_mmu_destroy(vcpu);
10786         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10787         free_page((unsigned long)vcpu->arch.pio_data);
10788         kvfree(vcpu->arch.cpuid_entries);
10789         if (!lapic_in_kernel(vcpu))
10790                 static_branch_dec(&kvm_has_noapic_vcpu);
10791 }
10792
10793 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10794 {
10795         unsigned long old_cr0 = kvm_read_cr0(vcpu);
10796         unsigned long new_cr0;
10797         u32 eax, dummy;
10798
10799         kvm_lapic_reset(vcpu, init_event);
10800
10801         vcpu->arch.hflags = 0;
10802
10803         vcpu->arch.smi_pending = 0;
10804         vcpu->arch.smi_count = 0;
10805         atomic_set(&vcpu->arch.nmi_queued, 0);
10806         vcpu->arch.nmi_pending = 0;
10807         vcpu->arch.nmi_injected = false;
10808         kvm_clear_interrupt_queue(vcpu);
10809         kvm_clear_exception_queue(vcpu);
10810
10811         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10812         kvm_update_dr0123(vcpu);
10813         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10814         vcpu->arch.dr7 = DR7_FIXED_1;
10815         kvm_update_dr7(vcpu);
10816
10817         vcpu->arch.cr2 = 0;
10818
10819         kvm_make_request(KVM_REQ_EVENT, vcpu);
10820         vcpu->arch.apf.msr_en_val = 0;
10821         vcpu->arch.apf.msr_int_val = 0;
10822         vcpu->arch.st.msr_val = 0;
10823
10824         kvmclock_reset(vcpu);
10825
10826         kvm_clear_async_pf_completion_queue(vcpu);
10827         kvm_async_pf_hash_reset(vcpu);
10828         vcpu->arch.apf.halted = false;
10829
10830         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10831                 void *mpx_state_buffer;
10832
10833                 /*
10834                  * To avoid have the INIT path from kvm_apic_has_events() that be
10835                  * called with loaded FPU and does not let userspace fix the state.
10836                  */
10837                 if (init_event)
10838                         kvm_put_guest_fpu(vcpu);
10839                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10840                                         XFEATURE_BNDREGS);
10841                 if (mpx_state_buffer)
10842                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10843                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10844                                         XFEATURE_BNDCSR);
10845                 if (mpx_state_buffer)
10846                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10847                 if (init_event)
10848                         kvm_load_guest_fpu(vcpu);
10849         }
10850
10851         if (!init_event) {
10852                 kvm_pmu_reset(vcpu);
10853                 vcpu->arch.smbase = 0x30000;
10854
10855                 vcpu->arch.msr_misc_features_enables = 0;
10856
10857                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10858         }
10859
10860         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
10861         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10862         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
10863
10864         /*
10865          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10866          * if no CPUID match is found.  Note, it's impossible to get a match at
10867          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10868          * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10869          * But, go through the motions in case that's ever remedied.
10870          */
10871         eax = 1;
10872         if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
10873                 eax = 0x600;
10874         kvm_rdx_write(vcpu, eax);
10875
10876         vcpu->arch.ia32_xss = 0;
10877
10878         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10879
10880         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
10881         kvm_rip_write(vcpu, 0xfff0);
10882
10883         vcpu->arch.cr3 = 0;
10884         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10885
10886         /*
10887          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
10888          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10889          * (or qualify) that with a footnote stating that CD/NW are preserved.
10890          */
10891         new_cr0 = X86_CR0_ET;
10892         if (init_event)
10893                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
10894         else
10895                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
10896
10897         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
10898         static_call(kvm_x86_set_cr4)(vcpu, 0);
10899         static_call(kvm_x86_set_efer)(vcpu, 0);
10900         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10901
10902         /*
10903          * Reset the MMU context if paging was enabled prior to INIT (which is
10904          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
10905          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10906          * checked because it is unconditionally cleared on INIT and all other
10907          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10908          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10909          */
10910         if (old_cr0 & X86_CR0_PG)
10911                 kvm_mmu_reset_context(vcpu);
10912
10913         /*
10914          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
10915          * APM states the TLBs are untouched by INIT, but it also states that
10916          * the TLBs are flushed on "External initialization of the processor."
10917          * Flush the guest TLB regardless of vendor, there is no meaningful
10918          * benefit in relying on the guest to flush the TLB immediately after
10919          * INIT.  A spurious TLB flush is benign and likely negligible from a
10920          * performance perspective.
10921          */
10922         if (init_event)
10923                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
10924 }
10925 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
10926
10927 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10928 {
10929         struct kvm_segment cs;
10930
10931         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10932         cs.selector = vector << 8;
10933         cs.base = vector << 12;
10934         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10935         kvm_rip_write(vcpu, 0);
10936 }
10937 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10938
10939 int kvm_arch_hardware_enable(void)
10940 {
10941         struct kvm *kvm;
10942         struct kvm_vcpu *vcpu;
10943         int i;
10944         int ret;
10945         u64 local_tsc;
10946         u64 max_tsc = 0;
10947         bool stable, backwards_tsc = false;
10948
10949         kvm_user_return_msr_cpu_online();
10950         ret = static_call(kvm_x86_hardware_enable)();
10951         if (ret != 0)
10952                 return ret;
10953
10954         local_tsc = rdtsc();
10955         stable = !kvm_check_tsc_unstable();
10956         list_for_each_entry(kvm, &vm_list, vm_list) {
10957                 kvm_for_each_vcpu(i, vcpu, kvm) {
10958                         if (!stable && vcpu->cpu == smp_processor_id())
10959                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10960                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10961                                 backwards_tsc = true;
10962                                 if (vcpu->arch.last_host_tsc > max_tsc)
10963                                         max_tsc = vcpu->arch.last_host_tsc;
10964                         }
10965                 }
10966         }
10967
10968         /*
10969          * Sometimes, even reliable TSCs go backwards.  This happens on
10970          * platforms that reset TSC during suspend or hibernate actions, but
10971          * maintain synchronization.  We must compensate.  Fortunately, we can
10972          * detect that condition here, which happens early in CPU bringup,
10973          * before any KVM threads can be running.  Unfortunately, we can't
10974          * bring the TSCs fully up to date with real time, as we aren't yet far
10975          * enough into CPU bringup that we know how much real time has actually
10976          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10977          * variables that haven't been updated yet.
10978          *
10979          * So we simply find the maximum observed TSC above, then record the
10980          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10981          * the adjustment will be applied.  Note that we accumulate
10982          * adjustments, in case multiple suspend cycles happen before some VCPU
10983          * gets a chance to run again.  In the event that no KVM threads get a
10984          * chance to run, we will miss the entire elapsed period, as we'll have
10985          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10986          * loose cycle time.  This isn't too big a deal, since the loss will be
10987          * uniform across all VCPUs (not to mention the scenario is extremely
10988          * unlikely). It is possible that a second hibernate recovery happens
10989          * much faster than a first, causing the observed TSC here to be
10990          * smaller; this would require additional padding adjustment, which is
10991          * why we set last_host_tsc to the local tsc observed here.
10992          *
10993          * N.B. - this code below runs only on platforms with reliable TSC,
10994          * as that is the only way backwards_tsc is set above.  Also note
10995          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10996          * have the same delta_cyc adjustment applied if backwards_tsc
10997          * is detected.  Note further, this adjustment is only done once,
10998          * as we reset last_host_tsc on all VCPUs to stop this from being
10999          * called multiple times (one for each physical CPU bringup).
11000          *
11001          * Platforms with unreliable TSCs don't have to deal with this, they
11002          * will be compensated by the logic in vcpu_load, which sets the TSC to
11003          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11004          * guarantee that they stay in perfect synchronization.
11005          */
11006         if (backwards_tsc) {
11007                 u64 delta_cyc = max_tsc - local_tsc;
11008                 list_for_each_entry(kvm, &vm_list, vm_list) {
11009                         kvm->arch.backwards_tsc_observed = true;
11010                         kvm_for_each_vcpu(i, vcpu, kvm) {
11011                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11012                                 vcpu->arch.last_host_tsc = local_tsc;
11013                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11014                         }
11015
11016                         /*
11017                          * We have to disable TSC offset matching.. if you were
11018                          * booting a VM while issuing an S4 host suspend....
11019                          * you may have some problem.  Solving this issue is
11020                          * left as an exercise to the reader.
11021                          */
11022                         kvm->arch.last_tsc_nsec = 0;
11023                         kvm->arch.last_tsc_write = 0;
11024                 }
11025
11026         }
11027         return 0;
11028 }
11029
11030 void kvm_arch_hardware_disable(void)
11031 {
11032         static_call(kvm_x86_hardware_disable)();
11033         drop_user_return_notifiers();
11034 }
11035
11036 int kvm_arch_hardware_setup(void *opaque)
11037 {
11038         struct kvm_x86_init_ops *ops = opaque;
11039         int r;
11040
11041         rdmsrl_safe(MSR_EFER, &host_efer);
11042
11043         if (boot_cpu_has(X86_FEATURE_XSAVES))
11044                 rdmsrl(MSR_IA32_XSS, host_xss);
11045
11046         r = ops->hardware_setup();
11047         if (r != 0)
11048                 return r;
11049
11050         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11051         kvm_ops_static_call_update();
11052
11053         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11054                 supported_xss = 0;
11055
11056 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11057         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11058 #undef __kvm_cpu_cap_has
11059
11060         if (kvm_has_tsc_control) {
11061                 /*
11062                  * Make sure the user can only configure tsc_khz values that
11063                  * fit into a signed integer.
11064                  * A min value is not calculated because it will always
11065                  * be 1 on all machines.
11066                  */
11067                 u64 max = min(0x7fffffffULL,
11068                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11069                 kvm_max_guest_tsc_khz = max;
11070
11071                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11072         }
11073
11074         kvm_init_msr_list();
11075         return 0;
11076 }
11077
11078 void kvm_arch_hardware_unsetup(void)
11079 {
11080         static_call(kvm_x86_hardware_unsetup)();
11081 }
11082
11083 int kvm_arch_check_processor_compat(void *opaque)
11084 {
11085         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11086         struct kvm_x86_init_ops *ops = opaque;
11087
11088         WARN_ON(!irqs_disabled());
11089
11090         if (__cr4_reserved_bits(cpu_has, c) !=
11091             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11092                 return -EIO;
11093
11094         return ops->check_processor_compatibility();
11095 }
11096
11097 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11098 {
11099         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11100 }
11101 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11102
11103 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11104 {
11105         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11106 }
11107
11108 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11109 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11110
11111 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11112 {
11113         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11114
11115         vcpu->arch.l1tf_flush_l1d = true;
11116         if (pmu->version && unlikely(pmu->event_count)) {
11117                 pmu->need_cleanup = true;
11118                 kvm_make_request(KVM_REQ_PMU, vcpu);
11119         }
11120         static_call(kvm_x86_sched_in)(vcpu, cpu);
11121 }
11122
11123 void kvm_arch_free_vm(struct kvm *kvm)
11124 {
11125         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11126         vfree(kvm);
11127 }
11128
11129
11130 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11131 {
11132         int ret;
11133
11134         if (type)
11135                 return -EINVAL;
11136
11137         ret = kvm_page_track_init(kvm);
11138         if (ret)
11139                 return ret;
11140
11141         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11142         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11143         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11144         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11145         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11146         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11147
11148         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11149         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11150         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11151         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11152                 &kvm->arch.irq_sources_bitmap);
11153
11154         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11155         mutex_init(&kvm->arch.apic_map_lock);
11156         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11157
11158         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11159         pvclock_update_vm_gtod_copy(kvm);
11160
11161         kvm->arch.guest_can_read_msr_platform_info = true;
11162
11163 #if IS_ENABLED(CONFIG_HYPERV)
11164         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11165         kvm->arch.hv_root_tdp = INVALID_PAGE;
11166 #endif
11167
11168         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11169         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11170
11171         kvm_apicv_init(kvm);
11172         kvm_hv_init_vm(kvm);
11173         kvm_mmu_init_vm(kvm);
11174         kvm_xen_init_vm(kvm);
11175
11176         return static_call(kvm_x86_vm_init)(kvm);
11177 }
11178
11179 int kvm_arch_post_init_vm(struct kvm *kvm)
11180 {
11181         return kvm_mmu_post_init_vm(kvm);
11182 }
11183
11184 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11185 {
11186         vcpu_load(vcpu);
11187         kvm_mmu_unload(vcpu);
11188         vcpu_put(vcpu);
11189 }
11190
11191 static void kvm_free_vcpus(struct kvm *kvm)
11192 {
11193         unsigned int i;
11194         struct kvm_vcpu *vcpu;
11195
11196         /*
11197          * Unpin any mmu pages first.
11198          */
11199         kvm_for_each_vcpu(i, vcpu, kvm) {
11200                 kvm_clear_async_pf_completion_queue(vcpu);
11201                 kvm_unload_vcpu_mmu(vcpu);
11202         }
11203         kvm_for_each_vcpu(i, vcpu, kvm)
11204                 kvm_vcpu_destroy(vcpu);
11205
11206         mutex_lock(&kvm->lock);
11207         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11208                 kvm->vcpus[i] = NULL;
11209
11210         atomic_set(&kvm->online_vcpus, 0);
11211         mutex_unlock(&kvm->lock);
11212 }
11213
11214 void kvm_arch_sync_events(struct kvm *kvm)
11215 {
11216         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11217         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11218         kvm_free_pit(kvm);
11219 }
11220
11221 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11222
11223 /**
11224  * __x86_set_memory_region: Setup KVM internal memory slot
11225  *
11226  * @kvm: the kvm pointer to the VM.
11227  * @id: the slot ID to setup.
11228  * @gpa: the GPA to install the slot (unused when @size == 0).
11229  * @size: the size of the slot. Set to zero to uninstall a slot.
11230  *
11231  * This function helps to setup a KVM internal memory slot.  Specify
11232  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11233  * slot.  The return code can be one of the following:
11234  *
11235  *   HVA:           on success (uninstall will return a bogus HVA)
11236  *   -errno:        on error
11237  *
11238  * The caller should always use IS_ERR() to check the return value
11239  * before use.  Note, the KVM internal memory slots are guaranteed to
11240  * remain valid and unchanged until the VM is destroyed, i.e., the
11241  * GPA->HVA translation will not change.  However, the HVA is a user
11242  * address, i.e. its accessibility is not guaranteed, and must be
11243  * accessed via __copy_{to,from}_user().
11244  */
11245 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11246                                       u32 size)
11247 {
11248         int i, r;
11249         unsigned long hva, old_npages;
11250         struct kvm_memslots *slots = kvm_memslots(kvm);
11251         struct kvm_memory_slot *slot;
11252
11253         /* Called with kvm->slots_lock held.  */
11254         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11255                 return ERR_PTR_USR(-EINVAL);
11256
11257         slot = id_to_memslot(slots, id);
11258         if (size) {
11259                 if (slot && slot->npages)
11260                         return ERR_PTR_USR(-EEXIST);
11261
11262                 /*
11263                  * MAP_SHARED to prevent internal slot pages from being moved
11264                  * by fork()/COW.
11265                  */
11266                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11267                               MAP_SHARED | MAP_ANONYMOUS, 0);
11268                 if (IS_ERR((void *)hva))
11269                         return (void __user *)hva;
11270         } else {
11271                 if (!slot || !slot->npages)
11272                         return NULL;
11273
11274                 old_npages = slot->npages;
11275                 hva = slot->userspace_addr;
11276         }
11277
11278         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11279                 struct kvm_userspace_memory_region m;
11280
11281                 m.slot = id | (i << 16);
11282                 m.flags = 0;
11283                 m.guest_phys_addr = gpa;
11284                 m.userspace_addr = hva;
11285                 m.memory_size = size;
11286                 r = __kvm_set_memory_region(kvm, &m);
11287                 if (r < 0)
11288                         return ERR_PTR_USR(r);
11289         }
11290
11291         if (!size)
11292                 vm_munmap(hva, old_npages * PAGE_SIZE);
11293
11294         return (void __user *)hva;
11295 }
11296 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11297
11298 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11299 {
11300         kvm_mmu_pre_destroy_vm(kvm);
11301 }
11302
11303 void kvm_arch_destroy_vm(struct kvm *kvm)
11304 {
11305         if (current->mm == kvm->mm) {
11306                 /*
11307                  * Free memory regions allocated on behalf of userspace,
11308                  * unless the the memory map has changed due to process exit
11309                  * or fd copying.
11310                  */
11311                 mutex_lock(&kvm->slots_lock);
11312                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11313                                         0, 0);
11314                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11315                                         0, 0);
11316                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11317                 mutex_unlock(&kvm->slots_lock);
11318         }
11319         static_call_cond(kvm_x86_vm_destroy)(kvm);
11320         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11321         kvm_pic_destroy(kvm);
11322         kvm_ioapic_destroy(kvm);
11323         kvm_free_vcpus(kvm);
11324         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11325         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11326         kvm_mmu_uninit_vm(kvm);
11327         kvm_page_track_cleanup(kvm);
11328         kvm_xen_destroy_vm(kvm);
11329         kvm_hv_destroy_vm(kvm);
11330 }
11331
11332 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11333 {
11334         int i;
11335
11336         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11337                 kvfree(slot->arch.rmap[i]);
11338                 slot->arch.rmap[i] = NULL;
11339         }
11340 }
11341
11342 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11343 {
11344         int i;
11345
11346         memslot_rmap_free(slot);
11347
11348         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11349                 kvfree(slot->arch.lpage_info[i - 1]);
11350                 slot->arch.lpage_info[i - 1] = NULL;
11351         }
11352
11353         kvm_page_track_free_memslot(slot);
11354 }
11355
11356 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11357                               unsigned long npages)
11358 {
11359         const int sz = sizeof(*slot->arch.rmap[0]);
11360         int i;
11361
11362         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11363                 int level = i + 1;
11364                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11365
11366                 WARN_ON(slot->arch.rmap[i]);
11367
11368                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11369                 if (!slot->arch.rmap[i]) {
11370                         memslot_rmap_free(slot);
11371                         return -ENOMEM;
11372                 }
11373         }
11374
11375         return 0;
11376 }
11377
11378 int alloc_all_memslots_rmaps(struct kvm *kvm)
11379 {
11380         struct kvm_memslots *slots;
11381         struct kvm_memory_slot *slot;
11382         int r, i;
11383
11384         /*
11385          * Check if memslots alreday have rmaps early before acquiring
11386          * the slots_arch_lock below.
11387          */
11388         if (kvm_memslots_have_rmaps(kvm))
11389                 return 0;
11390
11391         mutex_lock(&kvm->slots_arch_lock);
11392
11393         /*
11394          * Read memslots_have_rmaps again, under the slots arch lock,
11395          * before allocating the rmaps
11396          */
11397         if (kvm_memslots_have_rmaps(kvm)) {
11398                 mutex_unlock(&kvm->slots_arch_lock);
11399                 return 0;
11400         }
11401
11402         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11403                 slots = __kvm_memslots(kvm, i);
11404                 kvm_for_each_memslot(slot, slots) {
11405                         r = memslot_rmap_alloc(slot, slot->npages);
11406                         if (r) {
11407                                 mutex_unlock(&kvm->slots_arch_lock);
11408                                 return r;
11409                         }
11410                 }
11411         }
11412
11413         /*
11414          * Ensure that memslots_have_rmaps becomes true strictly after
11415          * all the rmap pointers are set.
11416          */
11417         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11418         mutex_unlock(&kvm->slots_arch_lock);
11419         return 0;
11420 }
11421
11422 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11423                                       struct kvm_memory_slot *slot,
11424                                       unsigned long npages)
11425 {
11426         int i, r;
11427
11428         /*
11429          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11430          * old arrays will be freed by __kvm_set_memory_region() if installing
11431          * the new memslot is successful.
11432          */
11433         memset(&slot->arch, 0, sizeof(slot->arch));
11434
11435         if (kvm_memslots_have_rmaps(kvm)) {
11436                 r = memslot_rmap_alloc(slot, npages);
11437                 if (r)
11438                         return r;
11439         }
11440
11441         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11442                 struct kvm_lpage_info *linfo;
11443                 unsigned long ugfn;
11444                 int lpages;
11445                 int level = i + 1;
11446
11447                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11448
11449                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11450                 if (!linfo)
11451                         goto out_free;
11452
11453                 slot->arch.lpage_info[i - 1] = linfo;
11454
11455                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11456                         linfo[0].disallow_lpage = 1;
11457                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11458                         linfo[lpages - 1].disallow_lpage = 1;
11459                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11460                 /*
11461                  * If the gfn and userspace address are not aligned wrt each
11462                  * other, disable large page support for this slot.
11463                  */
11464                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11465                         unsigned long j;
11466
11467                         for (j = 0; j < lpages; ++j)
11468                                 linfo[j].disallow_lpage = 1;
11469                 }
11470         }
11471
11472         if (kvm_page_track_create_memslot(slot, npages))
11473                 goto out_free;
11474
11475         return 0;
11476
11477 out_free:
11478         memslot_rmap_free(slot);
11479
11480         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11481                 kvfree(slot->arch.lpage_info[i - 1]);
11482                 slot->arch.lpage_info[i - 1] = NULL;
11483         }
11484         return -ENOMEM;
11485 }
11486
11487 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11488 {
11489         struct kvm_vcpu *vcpu;
11490         int i;
11491
11492         /*
11493          * memslots->generation has been incremented.
11494          * mmio generation may have reached its maximum value.
11495          */
11496         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11497
11498         /* Force re-initialization of steal_time cache */
11499         kvm_for_each_vcpu(i, vcpu, kvm)
11500                 kvm_vcpu_kick(vcpu);
11501 }
11502
11503 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11504                                 struct kvm_memory_slot *memslot,
11505                                 const struct kvm_userspace_memory_region *mem,
11506                                 enum kvm_mr_change change)
11507 {
11508         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11509                 return kvm_alloc_memslot_metadata(kvm, memslot,
11510                                                   mem->memory_size >> PAGE_SHIFT);
11511         return 0;
11512 }
11513
11514
11515 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11516 {
11517         struct kvm_arch *ka = &kvm->arch;
11518
11519         if (!kvm_x86_ops.cpu_dirty_log_size)
11520                 return;
11521
11522         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11523             (!enable && --ka->cpu_dirty_logging_count == 0))
11524                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11525
11526         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11527 }
11528
11529 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11530                                      struct kvm_memory_slot *old,
11531                                      const struct kvm_memory_slot *new,
11532                                      enum kvm_mr_change change)
11533 {
11534         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11535
11536         /*
11537          * Update CPU dirty logging if dirty logging is being toggled.  This
11538          * applies to all operations.
11539          */
11540         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11541                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11542
11543         /*
11544          * Nothing more to do for RO slots (which can't be dirtied and can't be
11545          * made writable) or CREATE/MOVE/DELETE of a slot.
11546          *
11547          * For a memslot with dirty logging disabled:
11548          * CREATE:      No dirty mappings will already exist.
11549          * MOVE/DELETE: The old mappings will already have been cleaned up by
11550          *              kvm_arch_flush_shadow_memslot()
11551          *
11552          * For a memslot with dirty logging enabled:
11553          * CREATE:      No shadow pages exist, thus nothing to write-protect
11554          *              and no dirty bits to clear.
11555          * MOVE/DELETE: The old mappings will already have been cleaned up by
11556          *              kvm_arch_flush_shadow_memslot().
11557          */
11558         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11559                 return;
11560
11561         /*
11562          * READONLY and non-flags changes were filtered out above, and the only
11563          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11564          * logging isn't being toggled on or off.
11565          */
11566         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11567                 return;
11568
11569         if (!log_dirty_pages) {
11570                 /*
11571                  * Dirty logging tracks sptes in 4k granularity, meaning that
11572                  * large sptes have to be split.  If live migration succeeds,
11573                  * the guest in the source machine will be destroyed and large
11574                  * sptes will be created in the destination.  However, if the
11575                  * guest continues to run in the source machine (for example if
11576                  * live migration fails), small sptes will remain around and
11577                  * cause bad performance.
11578                  *
11579                  * Scan sptes if dirty logging has been stopped, dropping those
11580                  * which can be collapsed into a single large-page spte.  Later
11581                  * page faults will create the large-page sptes.
11582                  */
11583                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11584         } else {
11585                 /*
11586                  * Initially-all-set does not require write protecting any page,
11587                  * because they're all assumed to be dirty.
11588                  */
11589                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11590                         return;
11591
11592                 if (kvm_x86_ops.cpu_dirty_log_size) {
11593                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11594                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11595                 } else {
11596                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11597                 }
11598         }
11599 }
11600
11601 void kvm_arch_commit_memory_region(struct kvm *kvm,
11602                                 const struct kvm_userspace_memory_region *mem,
11603                                 struct kvm_memory_slot *old,
11604                                 const struct kvm_memory_slot *new,
11605                                 enum kvm_mr_change change)
11606 {
11607         if (!kvm->arch.n_requested_mmu_pages)
11608                 kvm_mmu_change_mmu_pages(kvm,
11609                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11610
11611         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11612
11613         /* Free the arrays associated with the old memslot. */
11614         if (change == KVM_MR_MOVE)
11615                 kvm_arch_free_memslot(kvm, old);
11616 }
11617
11618 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11619 {
11620         kvm_mmu_zap_all(kvm);
11621 }
11622
11623 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11624                                    struct kvm_memory_slot *slot)
11625 {
11626         kvm_page_track_flush_slot(kvm, slot);
11627 }
11628
11629 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11630 {
11631         return (is_guest_mode(vcpu) &&
11632                         kvm_x86_ops.guest_apic_has_interrupt &&
11633                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11634 }
11635
11636 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11637 {
11638         if (!list_empty_careful(&vcpu->async_pf.done))
11639                 return true;
11640
11641         if (kvm_apic_has_events(vcpu))
11642                 return true;
11643
11644         if (vcpu->arch.pv.pv_unhalted)
11645                 return true;
11646
11647         if (vcpu->arch.exception.pending)
11648                 return true;
11649
11650         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11651             (vcpu->arch.nmi_pending &&
11652              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11653                 return true;
11654
11655         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11656             (vcpu->arch.smi_pending &&
11657              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11658                 return true;
11659
11660         if (kvm_arch_interrupt_allowed(vcpu) &&
11661             (kvm_cpu_has_interrupt(vcpu) ||
11662             kvm_guest_apic_has_interrupt(vcpu)))
11663                 return true;
11664
11665         if (kvm_hv_has_stimer_pending(vcpu))
11666                 return true;
11667
11668         if (is_guest_mode(vcpu) &&
11669             kvm_x86_ops.nested_ops->hv_timer_pending &&
11670             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11671                 return true;
11672
11673         return false;
11674 }
11675
11676 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11677 {
11678         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11679 }
11680
11681 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11682 {
11683         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11684                 return true;
11685
11686         return false;
11687 }
11688
11689 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11690 {
11691         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11692                 return true;
11693
11694         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11695                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11696                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11697                 return true;
11698
11699         return kvm_arch_dy_has_pending_interrupt(vcpu);
11700 }
11701
11702 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11703 {
11704         if (vcpu->arch.guest_state_protected)
11705                 return true;
11706
11707         return vcpu->arch.preempted_in_kernel;
11708 }
11709
11710 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11711 {
11712         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11713 }
11714
11715 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11716 {
11717         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11718 }
11719
11720 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11721 {
11722         /* Can't read the RIP when guest state is protected, just return 0 */
11723         if (vcpu->arch.guest_state_protected)
11724                 return 0;
11725
11726         if (is_64_bit_mode(vcpu))
11727                 return kvm_rip_read(vcpu);
11728         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11729                      kvm_rip_read(vcpu));
11730 }
11731 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11732
11733 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11734 {
11735         return kvm_get_linear_rip(vcpu) == linear_rip;
11736 }
11737 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11738
11739 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11740 {
11741         unsigned long rflags;
11742
11743         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11744         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11745                 rflags &= ~X86_EFLAGS_TF;
11746         return rflags;
11747 }
11748 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11749
11750 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11751 {
11752         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11753             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11754                 rflags |= X86_EFLAGS_TF;
11755         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11756 }
11757
11758 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11759 {
11760         __kvm_set_rflags(vcpu, rflags);
11761         kvm_make_request(KVM_REQ_EVENT, vcpu);
11762 }
11763 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11764
11765 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11766 {
11767         int r;
11768
11769         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11770               work->wakeup_all)
11771                 return;
11772
11773         r = kvm_mmu_reload(vcpu);
11774         if (unlikely(r))
11775                 return;
11776
11777         if (!vcpu->arch.mmu->direct_map &&
11778               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11779                 return;
11780
11781         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11782 }
11783
11784 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11785 {
11786         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11787
11788         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11789 }
11790
11791 static inline u32 kvm_async_pf_next_probe(u32 key)
11792 {
11793         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11794 }
11795
11796 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11797 {
11798         u32 key = kvm_async_pf_hash_fn(gfn);
11799
11800         while (vcpu->arch.apf.gfns[key] != ~0)
11801                 key = kvm_async_pf_next_probe(key);
11802
11803         vcpu->arch.apf.gfns[key] = gfn;
11804 }
11805
11806 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11807 {
11808         int i;
11809         u32 key = kvm_async_pf_hash_fn(gfn);
11810
11811         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11812                      (vcpu->arch.apf.gfns[key] != gfn &&
11813                       vcpu->arch.apf.gfns[key] != ~0); i++)
11814                 key = kvm_async_pf_next_probe(key);
11815
11816         return key;
11817 }
11818
11819 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11820 {
11821         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11822 }
11823
11824 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11825 {
11826         u32 i, j, k;
11827
11828         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11829
11830         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11831                 return;
11832
11833         while (true) {
11834                 vcpu->arch.apf.gfns[i] = ~0;
11835                 do {
11836                         j = kvm_async_pf_next_probe(j);
11837                         if (vcpu->arch.apf.gfns[j] == ~0)
11838                                 return;
11839                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11840                         /*
11841                          * k lies cyclically in ]i,j]
11842                          * |    i.k.j |
11843                          * |....j i.k.| or  |.k..j i...|
11844                          */
11845                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11846                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11847                 i = j;
11848         }
11849 }
11850
11851 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11852 {
11853         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11854
11855         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11856                                       sizeof(reason));
11857 }
11858
11859 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11860 {
11861         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11862
11863         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11864                                              &token, offset, sizeof(token));
11865 }
11866
11867 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11868 {
11869         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11870         u32 val;
11871
11872         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11873                                          &val, offset, sizeof(val)))
11874                 return false;
11875
11876         return !val;
11877 }
11878
11879 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11880 {
11881         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11882                 return false;
11883
11884         if (!kvm_pv_async_pf_enabled(vcpu) ||
11885             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11886                 return false;
11887
11888         return true;
11889 }
11890
11891 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11892 {
11893         if (unlikely(!lapic_in_kernel(vcpu) ||
11894                      kvm_event_needs_reinjection(vcpu) ||
11895                      vcpu->arch.exception.pending))
11896                 return false;
11897
11898         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11899                 return false;
11900
11901         /*
11902          * If interrupts are off we cannot even use an artificial
11903          * halt state.
11904          */
11905         return kvm_arch_interrupt_allowed(vcpu);
11906 }
11907
11908 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11909                                      struct kvm_async_pf *work)
11910 {
11911         struct x86_exception fault;
11912
11913         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11914         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11915
11916         if (kvm_can_deliver_async_pf(vcpu) &&
11917             !apf_put_user_notpresent(vcpu)) {
11918                 fault.vector = PF_VECTOR;
11919                 fault.error_code_valid = true;
11920                 fault.error_code = 0;
11921                 fault.nested_page_fault = false;
11922                 fault.address = work->arch.token;
11923                 fault.async_page_fault = true;
11924                 kvm_inject_page_fault(vcpu, &fault);
11925                 return true;
11926         } else {
11927                 /*
11928                  * It is not possible to deliver a paravirtualized asynchronous
11929                  * page fault, but putting the guest in an artificial halt state
11930                  * can be beneficial nevertheless: if an interrupt arrives, we
11931                  * can deliver it timely and perhaps the guest will schedule
11932                  * another process.  When the instruction that triggered a page
11933                  * fault is retried, hopefully the page will be ready in the host.
11934                  */
11935                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11936                 return false;
11937         }
11938 }
11939
11940 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11941                                  struct kvm_async_pf *work)
11942 {
11943         struct kvm_lapic_irq irq = {
11944                 .delivery_mode = APIC_DM_FIXED,
11945                 .vector = vcpu->arch.apf.vec
11946         };
11947
11948         if (work->wakeup_all)
11949                 work->arch.token = ~0; /* broadcast wakeup */
11950         else
11951                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11952         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11953
11954         if ((work->wakeup_all || work->notpresent_injected) &&
11955             kvm_pv_async_pf_enabled(vcpu) &&
11956             !apf_put_user_ready(vcpu, work->arch.token)) {
11957                 vcpu->arch.apf.pageready_pending = true;
11958                 kvm_apic_set_irq(vcpu, &irq, NULL);
11959         }
11960
11961         vcpu->arch.apf.halted = false;
11962         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11963 }
11964
11965 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11966 {
11967         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11968         if (!vcpu->arch.apf.pageready_pending)
11969                 kvm_vcpu_kick(vcpu);
11970 }
11971
11972 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11973 {
11974         if (!kvm_pv_async_pf_enabled(vcpu))
11975                 return true;
11976         else
11977                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11978 }
11979
11980 void kvm_arch_start_assignment(struct kvm *kvm)
11981 {
11982         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11983                 static_call_cond(kvm_x86_start_assignment)(kvm);
11984 }
11985 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11986
11987 void kvm_arch_end_assignment(struct kvm *kvm)
11988 {
11989         atomic_dec(&kvm->arch.assigned_device_count);
11990 }
11991 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11992
11993 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11994 {
11995         return atomic_read(&kvm->arch.assigned_device_count);
11996 }
11997 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11998
11999 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12000 {
12001         atomic_inc(&kvm->arch.noncoherent_dma_count);
12002 }
12003 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12004
12005 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12006 {
12007         atomic_dec(&kvm->arch.noncoherent_dma_count);
12008 }
12009 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12010
12011 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12012 {
12013         return atomic_read(&kvm->arch.noncoherent_dma_count);
12014 }
12015 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12016
12017 bool kvm_arch_has_irq_bypass(void)
12018 {
12019         return true;
12020 }
12021
12022 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12023                                       struct irq_bypass_producer *prod)
12024 {
12025         struct kvm_kernel_irqfd *irqfd =
12026                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12027         int ret;
12028
12029         irqfd->producer = prod;
12030         kvm_arch_start_assignment(irqfd->kvm);
12031         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12032                                          prod->irq, irqfd->gsi, 1);
12033
12034         if (ret)
12035                 kvm_arch_end_assignment(irqfd->kvm);
12036
12037         return ret;
12038 }
12039
12040 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12041                                       struct irq_bypass_producer *prod)
12042 {
12043         int ret;
12044         struct kvm_kernel_irqfd *irqfd =
12045                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12046
12047         WARN_ON(irqfd->producer != prod);
12048         irqfd->producer = NULL;
12049
12050         /*
12051          * When producer of consumer is unregistered, we change back to
12052          * remapped mode, so we can re-use the current implementation
12053          * when the irq is masked/disabled or the consumer side (KVM
12054          * int this case doesn't want to receive the interrupts.
12055         */
12056         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12057         if (ret)
12058                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12059                        " fails: %d\n", irqfd->consumer.token, ret);
12060
12061         kvm_arch_end_assignment(irqfd->kvm);
12062 }
12063
12064 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12065                                    uint32_t guest_irq, bool set)
12066 {
12067         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12068 }
12069
12070 bool kvm_vector_hashing_enabled(void)
12071 {
12072         return vector_hashing;
12073 }
12074
12075 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12076 {
12077         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12078 }
12079 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12080
12081
12082 int kvm_spec_ctrl_test_value(u64 value)
12083 {
12084         /*
12085          * test that setting IA32_SPEC_CTRL to given value
12086          * is allowed by the host processor
12087          */
12088
12089         u64 saved_value;
12090         unsigned long flags;
12091         int ret = 0;
12092
12093         local_irq_save(flags);
12094
12095         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12096                 ret = 1;
12097         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12098                 ret = 1;
12099         else
12100                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12101
12102         local_irq_restore(flags);
12103
12104         return ret;
12105 }
12106 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12107
12108 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12109 {
12110         struct x86_exception fault;
12111         u32 access = error_code &
12112                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12113
12114         if (!(error_code & PFERR_PRESENT_MASK) ||
12115             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12116                 /*
12117                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12118                  * tables probably do not match the TLB.  Just proceed
12119                  * with the error code that the processor gave.
12120                  */
12121                 fault.vector = PF_VECTOR;
12122                 fault.error_code_valid = true;
12123                 fault.error_code = error_code;
12124                 fault.nested_page_fault = false;
12125                 fault.address = gva;
12126         }
12127         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12128 }
12129 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12130
12131 /*
12132  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12133  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12134  * indicates whether exit to userspace is needed.
12135  */
12136 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12137                               struct x86_exception *e)
12138 {
12139         if (r == X86EMUL_PROPAGATE_FAULT) {
12140                 kvm_inject_emulated_page_fault(vcpu, e);
12141                 return 1;
12142         }
12143
12144         /*
12145          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12146          * while handling a VMX instruction KVM could've handled the request
12147          * correctly by exiting to userspace and performing I/O but there
12148          * doesn't seem to be a real use-case behind such requests, just return
12149          * KVM_EXIT_INTERNAL_ERROR for now.
12150          */
12151         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12152         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12153         vcpu->run->internal.ndata = 0;
12154
12155         return 0;
12156 }
12157 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12158
12159 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12160 {
12161         bool pcid_enabled;
12162         struct x86_exception e;
12163         struct {
12164                 u64 pcid;
12165                 u64 gla;
12166         } operand;
12167         int r;
12168
12169         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12170         if (r != X86EMUL_CONTINUE)
12171                 return kvm_handle_memory_failure(vcpu, r, &e);
12172
12173         if (operand.pcid >> 12 != 0) {
12174                 kvm_inject_gp(vcpu, 0);
12175                 return 1;
12176         }
12177
12178         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12179
12180         switch (type) {
12181         case INVPCID_TYPE_INDIV_ADDR:
12182                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12183                     is_noncanonical_address(operand.gla, vcpu)) {
12184                         kvm_inject_gp(vcpu, 0);
12185                         return 1;
12186                 }
12187                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12188                 return kvm_skip_emulated_instruction(vcpu);
12189
12190         case INVPCID_TYPE_SINGLE_CTXT:
12191                 if (!pcid_enabled && (operand.pcid != 0)) {
12192                         kvm_inject_gp(vcpu, 0);
12193                         return 1;
12194                 }
12195
12196                 kvm_invalidate_pcid(vcpu, operand.pcid);
12197                 return kvm_skip_emulated_instruction(vcpu);
12198
12199         case INVPCID_TYPE_ALL_NON_GLOBAL:
12200                 /*
12201                  * Currently, KVM doesn't mark global entries in the shadow
12202                  * page tables, so a non-global flush just degenerates to a
12203                  * global flush. If needed, we could optimize this later by
12204                  * keeping track of global entries in shadow page tables.
12205                  */
12206
12207                 fallthrough;
12208         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12209                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12210                 return kvm_skip_emulated_instruction(vcpu);
12211
12212         default:
12213                 BUG(); /* We have already checked above that type <= 3 */
12214         }
12215 }
12216 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12217
12218 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12219 {
12220         struct kvm_run *run = vcpu->run;
12221         struct kvm_mmio_fragment *frag;
12222         unsigned int len;
12223
12224         BUG_ON(!vcpu->mmio_needed);
12225
12226         /* Complete previous fragment */
12227         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12228         len = min(8u, frag->len);
12229         if (!vcpu->mmio_is_write)
12230                 memcpy(frag->data, run->mmio.data, len);
12231
12232         if (frag->len <= 8) {
12233                 /* Switch to the next fragment. */
12234                 frag++;
12235                 vcpu->mmio_cur_fragment++;
12236         } else {
12237                 /* Go forward to the next mmio piece. */
12238                 frag->data += len;
12239                 frag->gpa += len;
12240                 frag->len -= len;
12241         }
12242
12243         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12244                 vcpu->mmio_needed = 0;
12245
12246                 // VMG change, at this point, we're always done
12247                 // RIP has already been advanced
12248                 return 1;
12249         }
12250
12251         // More MMIO is needed
12252         run->mmio.phys_addr = frag->gpa;
12253         run->mmio.len = min(8u, frag->len);
12254         run->mmio.is_write = vcpu->mmio_is_write;
12255         if (run->mmio.is_write)
12256                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12257         run->exit_reason = KVM_EXIT_MMIO;
12258
12259         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12260
12261         return 0;
12262 }
12263
12264 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12265                           void *data)
12266 {
12267         int handled;
12268         struct kvm_mmio_fragment *frag;
12269
12270         if (!data)
12271                 return -EINVAL;
12272
12273         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12274         if (handled == bytes)
12275                 return 1;
12276
12277         bytes -= handled;
12278         gpa += handled;
12279         data += handled;
12280
12281         /*TODO: Check if need to increment number of frags */
12282         frag = vcpu->mmio_fragments;
12283         vcpu->mmio_nr_fragments = 1;
12284         frag->len = bytes;
12285         frag->gpa = gpa;
12286         frag->data = data;
12287
12288         vcpu->mmio_needed = 1;
12289         vcpu->mmio_cur_fragment = 0;
12290
12291         vcpu->run->mmio.phys_addr = gpa;
12292         vcpu->run->mmio.len = min(8u, frag->len);
12293         vcpu->run->mmio.is_write = 1;
12294         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12295         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12296
12297         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12298
12299         return 0;
12300 }
12301 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12302
12303 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12304                          void *data)
12305 {
12306         int handled;
12307         struct kvm_mmio_fragment *frag;
12308
12309         if (!data)
12310                 return -EINVAL;
12311
12312         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12313         if (handled == bytes)
12314                 return 1;
12315
12316         bytes -= handled;
12317         gpa += handled;
12318         data += handled;
12319
12320         /*TODO: Check if need to increment number of frags */
12321         frag = vcpu->mmio_fragments;
12322         vcpu->mmio_nr_fragments = 1;
12323         frag->len = bytes;
12324         frag->gpa = gpa;
12325         frag->data = data;
12326
12327         vcpu->mmio_needed = 1;
12328         vcpu->mmio_cur_fragment = 0;
12329
12330         vcpu->run->mmio.phys_addr = gpa;
12331         vcpu->run->mmio.len = min(8u, frag->len);
12332         vcpu->run->mmio.is_write = 0;
12333         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12334
12335         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12336
12337         return 0;
12338 }
12339 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12340
12341 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12342 {
12343         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12344                vcpu->arch.pio.count * vcpu->arch.pio.size);
12345         vcpu->arch.pio.count = 0;
12346
12347         return 1;
12348 }
12349
12350 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12351                            unsigned int port, void *data,  unsigned int count)
12352 {
12353         int ret;
12354
12355         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12356                                         data, count);
12357         if (ret)
12358                 return ret;
12359
12360         vcpu->arch.pio.count = 0;
12361
12362         return 0;
12363 }
12364
12365 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12366                           unsigned int port, void *data, unsigned int count)
12367 {
12368         int ret;
12369
12370         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12371                                        data, count);
12372         if (ret) {
12373                 vcpu->arch.pio.count = 0;
12374         } else {
12375                 vcpu->arch.guest_ins_data = data;
12376                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12377         }
12378
12379         return 0;
12380 }
12381
12382 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12383                          unsigned int port, void *data,  unsigned int count,
12384                          int in)
12385 {
12386         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12387                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12388 }
12389 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12390
12391 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12392 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12393 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12394 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12395 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12396 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12397 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12398 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12399 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12400 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12401 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);