1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
113 static void process_nmi(struct kvm_vcpu *vcpu);
114 static void process_smi(struct kvm_vcpu *vcpu);
115 static void enter_smm(struct kvm_vcpu *vcpu);
116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
117 static void store_regs(struct kvm_vcpu *vcpu);
118 static int sync_regs(struct kvm_vcpu *vcpu);
120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
135 static bool __read_mostly ignore_msrs = 0;
136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
138 bool __read_mostly report_ignored_msrs = true;
139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
142 unsigned int min_timer_period_us = 200;
143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
145 static bool __read_mostly kvmclock_periodic_sync = true;
146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
148 bool __read_mostly kvm_has_tsc_control;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
150 u32 __read_mostly kvm_max_guest_tsc_khz;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
158 bool __read_mostly kvm_has_bus_lock_exit;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm = 250;
163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns = -1;
172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
174 static bool __read_mostly vector_hashing = true;
175 module_param(vector_hashing, bool, S_IRUGO);
177 bool __read_mostly enable_vmware_backdoor = false;
178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
181 static bool __read_mostly force_emulation_prefix = false;
182 module_param(force_emulation_prefix, bool, S_IRUGO);
184 int __read_mostly pi_inject_timer = -1;
185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs {
195 struct user_return_notifier urn;
197 struct kvm_user_return_msr_values {
200 } values[KVM_MAX_NR_USER_RETURN_MSRS];
203 u32 __read_mostly kvm_nr_uret_msrs;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer;
214 EXPORT_SYMBOL_GPL(host_efer);
216 bool __read_mostly allow_smaller_maxphyaddr = 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
219 bool __read_mostly enable_apicv = true;
220 EXPORT_SYMBOL_GPL(enable_apicv);
222 u64 __read_mostly host_xss;
223 EXPORT_SYMBOL_GPL(host_xss);
224 u64 __read_mostly supported_xss;
225 EXPORT_SYMBOL_GPL(supported_xss);
227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
230 STATS_DESC_COUNTER(VM, mmu_pte_write),
231 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
232 STATS_DESC_COUNTER(VM, mmu_flooded),
233 STATS_DESC_COUNTER(VM, mmu_recycled),
234 STATS_DESC_COUNTER(VM, mmu_cache_miss),
235 STATS_DESC_ICOUNTER(VM, mmu_unsync),
236 STATS_DESC_ICOUNTER(VM, pages_4k),
237 STATS_DESC_ICOUNTER(VM, pages_2m),
238 STATS_DESC_ICOUNTER(VM, pages_1g),
239 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
240 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
241 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
244 const struct kvm_stats_header kvm_vm_stats_header = {
245 .name_size = KVM_STATS_NAME_SIZE,
246 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
247 .id_offset = sizeof(struct kvm_stats_header),
248 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
249 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
250 sizeof(kvm_vm_stats_desc),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU, pf_fixed),
256 STATS_DESC_COUNTER(VCPU, pf_guest),
257 STATS_DESC_COUNTER(VCPU, tlb_flush),
258 STATS_DESC_COUNTER(VCPU, invlpg),
259 STATS_DESC_COUNTER(VCPU, exits),
260 STATS_DESC_COUNTER(VCPU, io_exits),
261 STATS_DESC_COUNTER(VCPU, mmio_exits),
262 STATS_DESC_COUNTER(VCPU, signal_exits),
263 STATS_DESC_COUNTER(VCPU, irq_window_exits),
264 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
265 STATS_DESC_COUNTER(VCPU, l1d_flush),
266 STATS_DESC_COUNTER(VCPU, halt_exits),
267 STATS_DESC_COUNTER(VCPU, request_irq_exits),
268 STATS_DESC_COUNTER(VCPU, irq_exits),
269 STATS_DESC_COUNTER(VCPU, host_state_reload),
270 STATS_DESC_COUNTER(VCPU, fpu_reload),
271 STATS_DESC_COUNTER(VCPU, insn_emulation),
272 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
273 STATS_DESC_COUNTER(VCPU, hypercalls),
274 STATS_DESC_COUNTER(VCPU, irq_injections),
275 STATS_DESC_COUNTER(VCPU, nmi_injections),
276 STATS_DESC_COUNTER(VCPU, req_event),
277 STATS_DESC_COUNTER(VCPU, nested_run),
278 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
279 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
280 STATS_DESC_ICOUNTER(VCPU, guest_mode)
283 const struct kvm_stats_header kvm_vcpu_stats_header = {
284 .name_size = KVM_STATS_NAME_SIZE,
285 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
286 .id_offset = sizeof(struct kvm_stats_header),
287 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
288 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
289 sizeof(kvm_vcpu_stats_desc),
292 u64 __read_mostly host_xcr0;
293 u64 __read_mostly supported_xcr0;
294 EXPORT_SYMBOL_GPL(supported_xcr0);
296 static struct kmem_cache *x86_fpu_cache;
298 static struct kmem_cache *x86_emulator_cache;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
306 const char *op = write ? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
323 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
324 unsigned int size = sizeof(struct x86_emulate_ctxt);
326 return kmem_cache_create_usercopy("x86_emulator", size,
327 __alignof__(struct x86_emulate_ctxt),
328 SLAB_ACCOUNT, useroffset,
329 size - useroffset, NULL);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
337 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
338 vcpu->arch.apf.gfns[i] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier *urn)
344 struct kvm_user_return_msrs *msrs
345 = container_of(urn, struct kvm_user_return_msrs, urn);
346 struct kvm_user_return_msr_values *values;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags);
354 if (msrs->registered) {
355 msrs->registered = false;
356 user_return_notifier_unregister(urn);
358 local_irq_restore(flags);
359 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
360 values = &msrs->values[slot];
361 if (values->host != values->curr) {
362 wrmsrl(kvm_uret_msrs_list[slot], values->host);
363 values->curr = values->host;
368 static int kvm_probe_user_return_msr(u32 msr)
374 ret = rdmsrl_safe(msr, &val);
377 ret = wrmsrl_safe(msr, val);
383 int kvm_add_user_return_msr(u32 msr)
385 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
387 if (kvm_probe_user_return_msr(msr))
390 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
391 return kvm_nr_uret_msrs++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
395 int kvm_find_user_return_msr(u32 msr)
399 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
400 if (kvm_uret_msrs_list[i] == msr)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu = smp_processor_id();
410 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
414 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
415 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
416 msrs->values[i].host = value;
417 msrs->values[i].curr = value;
421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
423 unsigned int cpu = smp_processor_id();
424 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
427 value = (value & mask) | (msrs->values[slot].host & ~mask);
428 if (value == msrs->values[slot].curr)
430 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
434 msrs->values[slot].curr = value;
435 if (!msrs->registered) {
436 msrs->urn.on_user_return = kvm_on_user_return;
437 user_return_notifier_register(&msrs->urn);
438 msrs->registered = true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu = smp_processor_id();
447 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
449 if (msrs->registered)
450 kvm_on_user_return(&msrs->urn);
453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
455 return vcpu->arch.apic_base;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
467 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
468 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
469 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
470 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
472 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
474 if (!msr_info->host_initiated) {
475 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
477 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
481 kvm_lapic_set_base(vcpu, msr_info->data);
482 kvm_recalculate_apic_map(vcpu->kvm);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector)
515 return EXCPT_CONTRIBUTORY;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector)
531 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
532 return EXCPT_INTERRUPT;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
540 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
549 unsigned nr = vcpu->arch.exception.nr;
550 bool has_payload = vcpu->arch.exception.has_payload;
551 unsigned long payload = vcpu->arch.exception.payload;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
581 vcpu->arch.dr6 |= payload;
582 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu->arch.dr6 &= ~BIT(12);
593 vcpu->arch.cr2 = payload;
597 vcpu->arch.exception.has_payload = false;
598 vcpu->arch.exception.payload = 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
603 unsigned nr, bool has_error, u32 error_code,
604 bool has_payload, unsigned long payload, bool reinject)
609 kvm_make_request(KVM_REQ_EVENT, vcpu);
611 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu->arch.exception.pending);
623 vcpu->arch.exception.injected = true;
624 if (WARN_ON_ONCE(has_payload)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu->arch.exception.pending = true;
634 vcpu->arch.exception.injected = false;
636 vcpu->arch.exception.has_error_code = has_error;
637 vcpu->arch.exception.nr = nr;
638 vcpu->arch.exception.error_code = error_code;
639 vcpu->arch.exception.has_payload = has_payload;
640 vcpu->arch.exception.payload = payload;
641 if (!is_guest_mode(vcpu))
642 kvm_deliver_exception_payload(vcpu);
646 /* to check exception */
647 prev_nr = vcpu->arch.exception.nr;
648 if (prev_nr == DF_VECTOR) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
653 class1 = exception_class(prev_nr);
654 class2 = exception_class(nr);
655 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
656 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu->arch.exception.pending = true;
663 vcpu->arch.exception.injected = false;
664 vcpu->arch.exception.has_error_code = true;
665 vcpu->arch.exception.nr = DF_VECTOR;
666 vcpu->arch.exception.error_code = 0;
667 vcpu->arch.exception.has_payload = false;
668 vcpu->arch.exception.payload = 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
678 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
684 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
689 unsigned long payload)
691 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
696 u32 error_code, unsigned long payload)
698 kvm_multiple_exception(vcpu, nr, true, error_code,
699 true, payload, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
705 kvm_inject_gp(vcpu, 0);
707 return kvm_skip_emulated_instruction(vcpu);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
715 ++vcpu->stat.pf_guest;
716 vcpu->arch.exception.nested_apf =
717 is_guest_mode(vcpu) && fault->async_page_fault;
718 if (vcpu->arch.exception.nested_apf) {
719 vcpu->arch.apf.nested_apf_token = fault->address;
720 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
722 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
729 struct x86_exception *fault)
731 struct kvm_mmu *fault_mmu;
732 WARN_ON_ONCE(fault->vector != PF_VECTOR);
734 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault->error_code & PFERR_PRESENT_MASK) &&
742 !(fault->error_code & PFERR_RSVD_MASK))
743 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
744 fault_mmu->root_hpa);
746 fault_mmu->inject_page_fault(vcpu, fault);
747 return fault->nested_page_fault;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
753 atomic_inc(&vcpu->arch.nmi_queued);
754 kvm_make_request(KVM_REQ_NMI, vcpu);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
760 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
766 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
776 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
778 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
785 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
788 kvm_queue_exception(vcpu, UD_VECTOR);
791 EXPORT_SYMBOL_GPL(kvm_require_dr);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
799 gfn_t ngfn, void *data, int offset, int len,
802 struct x86_exception exception;
806 ngpa = gfn_to_gpa(ngfn);
807 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
808 if (real_gfn == UNMAPPED_GVA)
811 real_gfn = gpa_to_gfn(real_gfn);
813 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
817 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
819 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
827 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
828 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
831 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
833 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
834 offset * sizeof(u64), sizeof(pdpte),
835 PFERR_USER_MASK|PFERR_WRITE_MASK);
840 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
841 if ((pdpte[i] & PT_PRESENT_MASK) &&
842 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
849 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
850 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
851 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
852 vcpu->arch.pdptrs_from_userspace = false;
858 EXPORT_SYMBOL_GPL(load_pdptrs);
860 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
862 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
863 kvm_clear_async_pf_completion_queue(vcpu);
864 kvm_async_pf_hash_reset(vcpu);
867 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
868 kvm_mmu_reset_context(vcpu);
870 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
871 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
872 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
873 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
875 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
877 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
879 unsigned long old_cr0 = kvm_read_cr0(vcpu);
880 unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
885 if (cr0 & 0xffffffff00000000UL)
889 cr0 &= ~CR0_RESERVED_BITS;
891 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
894 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
898 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
899 (cr0 & X86_CR0_PG)) {
904 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
909 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
910 is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
911 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
914 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
917 static_call(kvm_x86_set_cr0)(vcpu, cr0);
919 kvm_post_set_cr0(vcpu, old_cr0, cr0);
923 EXPORT_SYMBOL_GPL(kvm_set_cr0);
925 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
927 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
929 EXPORT_SYMBOL_GPL(kvm_lmsw);
931 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
933 if (vcpu->arch.guest_state_protected)
936 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
938 if (vcpu->arch.xcr0 != host_xcr0)
939 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
941 if (vcpu->arch.xsaves_enabled &&
942 vcpu->arch.ia32_xss != host_xss)
943 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
946 if (static_cpu_has(X86_FEATURE_PKU) &&
947 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
948 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
949 vcpu->arch.pkru != vcpu->arch.host_pkru)
950 write_pkru(vcpu->arch.pkru);
952 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
954 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
956 if (vcpu->arch.guest_state_protected)
959 if (static_cpu_has(X86_FEATURE_PKU) &&
960 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
961 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
962 vcpu->arch.pkru = rdpkru();
963 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
964 write_pkru(vcpu->arch.host_pkru);
967 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
969 if (vcpu->arch.xcr0 != host_xcr0)
970 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
972 if (vcpu->arch.xsaves_enabled &&
973 vcpu->arch.ia32_xss != host_xss)
974 wrmsrl(MSR_IA32_XSS, host_xss);
978 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
980 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
983 u64 old_xcr0 = vcpu->arch.xcr0;
986 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
987 if (index != XCR_XFEATURE_ENABLED_MASK)
989 if (!(xcr0 & XFEATURE_MASK_FP))
991 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
995 * Do not allow the guest to set bits that we do not support
996 * saving. However, xcr0 bit 0 is always set, even if the
997 * emulated CPU does not support XSAVE (see fx_init).
999 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1000 if (xcr0 & ~valid_bits)
1003 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1004 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1007 if (xcr0 & XFEATURE_MASK_AVX512) {
1008 if (!(xcr0 & XFEATURE_MASK_YMM))
1010 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1013 vcpu->arch.xcr0 = xcr0;
1015 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1016 kvm_update_cpuid_runtime(vcpu);
1020 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1022 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1023 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1024 kvm_inject_gp(vcpu, 0);
1028 return kvm_skip_emulated_instruction(vcpu);
1030 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1032 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1034 if (cr4 & cr4_reserved_bits)
1037 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1040 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1042 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1044 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1046 if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1047 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1048 kvm_mmu_reset_context(vcpu);
1050 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1052 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1054 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1055 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1058 if (!kvm_is_valid_cr4(vcpu, cr4))
1061 if (is_long_mode(vcpu)) {
1062 if (!(cr4 & X86_CR4_PAE))
1064 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1066 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1067 && ((cr4 ^ old_cr4) & pdptr_bits)
1068 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1069 kvm_read_cr3(vcpu)))
1072 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1073 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1076 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1077 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1081 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1083 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1087 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1089 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1091 struct kvm_mmu *mmu = vcpu->arch.mmu;
1092 unsigned long roots_to_free = 0;
1096 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1097 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1098 * also via the emulator. KVM's TDP page tables are not in the scope of
1099 * the invalidation, but the guest's TLB entries need to be flushed as
1100 * the CPU may have cached entries in its TLB for the target PCID.
1102 if (unlikely(tdp_enabled)) {
1103 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1108 * If neither the current CR3 nor any of the prev_roots use the given
1109 * PCID, then nothing needs to be done here because a resync will
1110 * happen anyway before switching to any other CR3.
1112 if (kvm_get_active_pcid(vcpu) == pcid) {
1113 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1114 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1117 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1118 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1119 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1121 kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1124 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1126 bool skip_tlb_flush = false;
1127 unsigned long pcid = 0;
1128 #ifdef CONFIG_X86_64
1129 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1132 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1133 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1134 pcid = cr3 & X86_CR3_PCID_MASK;
1138 /* PDPTRs are always reloaded for PAE paging. */
1139 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1140 goto handle_tlb_flush;
1143 * Do not condition the GPA check on long mode, this helper is used to
1144 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1145 * the current vCPU mode is accurate.
1147 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1150 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1153 if (cr3 != kvm_read_cr3(vcpu))
1154 kvm_mmu_new_pgd(vcpu, cr3);
1156 vcpu->arch.cr3 = cr3;
1157 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1161 * A load of CR3 that flushes the TLB flushes only the current PCID,
1162 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1163 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1164 * and it's impossible to use a non-zero PCID when PCID is disabled,
1165 * i.e. only PCID=0 can be relevant.
1167 if (!skip_tlb_flush)
1168 kvm_invalidate_pcid(vcpu, pcid);
1172 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1174 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1176 if (cr8 & CR8_RESERVED_BITS)
1178 if (lapic_in_kernel(vcpu))
1179 kvm_lapic_set_tpr(vcpu, cr8);
1181 vcpu->arch.cr8 = cr8;
1184 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1186 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1188 if (lapic_in_kernel(vcpu))
1189 return kvm_lapic_get_cr8(vcpu);
1191 return vcpu->arch.cr8;
1193 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1195 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1199 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1200 for (i = 0; i < KVM_NR_DB_REGS; i++)
1201 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1205 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1209 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1210 dr7 = vcpu->arch.guest_debug_dr7;
1212 dr7 = vcpu->arch.dr7;
1213 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1214 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1215 if (dr7 & DR7_BP_EN_MASK)
1216 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1218 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1220 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1222 u64 fixed = DR6_FIXED_1;
1224 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1227 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1228 fixed |= DR6_BUS_LOCK;
1232 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1234 size_t size = ARRAY_SIZE(vcpu->arch.db);
1238 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1239 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1240 vcpu->arch.eff_db[dr] = val;
1244 if (!kvm_dr6_valid(val))
1246 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1250 if (!kvm_dr7_valid(val))
1252 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1253 kvm_update_dr7(vcpu);
1259 EXPORT_SYMBOL_GPL(kvm_set_dr);
1261 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1263 size_t size = ARRAY_SIZE(vcpu->arch.db);
1267 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1271 *val = vcpu->arch.dr6;
1275 *val = vcpu->arch.dr7;
1279 EXPORT_SYMBOL_GPL(kvm_get_dr);
1281 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1283 u32 ecx = kvm_rcx_read(vcpu);
1286 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1287 kvm_inject_gp(vcpu, 0);
1291 kvm_rax_write(vcpu, (u32)data);
1292 kvm_rdx_write(vcpu, data >> 32);
1293 return kvm_skip_emulated_instruction(vcpu);
1295 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1298 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1299 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1301 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1302 * extract the supported MSRs from the related const lists.
1303 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1304 * capabilities of the host cpu. This capabilities test skips MSRs that are
1305 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1306 * may depend on host virtualization features rather than host cpu features.
1309 static const u32 msrs_to_save_all[] = {
1310 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1312 #ifdef CONFIG_X86_64
1313 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1315 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1316 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1318 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1319 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1320 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1321 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1322 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1323 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1324 MSR_IA32_UMWAIT_CONTROL,
1326 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1327 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1328 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1329 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1330 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1331 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1332 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1333 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1334 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1335 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1336 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1337 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1338 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1339 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1340 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1341 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1342 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1343 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1344 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1345 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1346 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1347 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1349 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1350 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1351 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1352 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1353 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1354 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1357 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1358 static unsigned num_msrs_to_save;
1360 static const u32 emulated_msrs_all[] = {
1361 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1362 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1363 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1364 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1365 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1366 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1367 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1369 HV_X64_MSR_VP_INDEX,
1370 HV_X64_MSR_VP_RUNTIME,
1371 HV_X64_MSR_SCONTROL,
1372 HV_X64_MSR_STIMER0_CONFIG,
1373 HV_X64_MSR_VP_ASSIST_PAGE,
1374 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1375 HV_X64_MSR_TSC_EMULATION_STATUS,
1376 HV_X64_MSR_SYNDBG_OPTIONS,
1377 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1378 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1379 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1381 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1382 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1384 MSR_IA32_TSC_ADJUST,
1385 MSR_IA32_TSC_DEADLINE,
1386 MSR_IA32_ARCH_CAPABILITIES,
1387 MSR_IA32_PERF_CAPABILITIES,
1388 MSR_IA32_MISC_ENABLE,
1389 MSR_IA32_MCG_STATUS,
1391 MSR_IA32_MCG_EXT_CTL,
1395 MSR_MISC_FEATURES_ENABLES,
1396 MSR_AMD64_VIRT_SPEC_CTRL,
1401 * The following list leaves out MSRs whose values are determined
1402 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1403 * We always support the "true" VMX control MSRs, even if the host
1404 * processor does not, so I am putting these registers here rather
1405 * than in msrs_to_save_all.
1408 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1409 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1410 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1411 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1413 MSR_IA32_VMX_CR0_FIXED0,
1414 MSR_IA32_VMX_CR4_FIXED0,
1415 MSR_IA32_VMX_VMCS_ENUM,
1416 MSR_IA32_VMX_PROCBASED_CTLS2,
1417 MSR_IA32_VMX_EPT_VPID_CAP,
1418 MSR_IA32_VMX_VMFUNC,
1421 MSR_KVM_POLL_CONTROL,
1424 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1425 static unsigned num_emulated_msrs;
1428 * List of msr numbers which are used to expose MSR-based features that
1429 * can be used by a hypervisor to validate requested CPU features.
1431 static const u32 msr_based_features_all[] = {
1433 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1434 MSR_IA32_VMX_PINBASED_CTLS,
1435 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1436 MSR_IA32_VMX_PROCBASED_CTLS,
1437 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1438 MSR_IA32_VMX_EXIT_CTLS,
1439 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1440 MSR_IA32_VMX_ENTRY_CTLS,
1442 MSR_IA32_VMX_CR0_FIXED0,
1443 MSR_IA32_VMX_CR0_FIXED1,
1444 MSR_IA32_VMX_CR4_FIXED0,
1445 MSR_IA32_VMX_CR4_FIXED1,
1446 MSR_IA32_VMX_VMCS_ENUM,
1447 MSR_IA32_VMX_PROCBASED_CTLS2,
1448 MSR_IA32_VMX_EPT_VPID_CAP,
1449 MSR_IA32_VMX_VMFUNC,
1453 MSR_IA32_ARCH_CAPABILITIES,
1454 MSR_IA32_PERF_CAPABILITIES,
1457 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1458 static unsigned int num_msr_based_features;
1460 static u64 kvm_get_arch_capabilities(void)
1464 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1465 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1468 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1469 * the nested hypervisor runs with NX huge pages. If it is not,
1470 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1471 * L1 guests, so it need not worry about its own (L2) guests.
1473 data |= ARCH_CAP_PSCHANGE_MC_NO;
1476 * If we're doing cache flushes (either "always" or "cond")
1477 * we will do one whenever the guest does a vmlaunch/vmresume.
1478 * If an outer hypervisor is doing the cache flush for us
1479 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1480 * capability to the guest too, and if EPT is disabled we're not
1481 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1482 * require a nested hypervisor to do a flush of its own.
1484 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1485 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1487 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1488 data |= ARCH_CAP_RDCL_NO;
1489 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1490 data |= ARCH_CAP_SSB_NO;
1491 if (!boot_cpu_has_bug(X86_BUG_MDS))
1492 data |= ARCH_CAP_MDS_NO;
1494 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1496 * If RTM=0 because the kernel has disabled TSX, the host might
1497 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1498 * and therefore knows that there cannot be TAA) but keep
1499 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1500 * and we want to allow migrating those guests to tsx=off hosts.
1502 data &= ~ARCH_CAP_TAA_NO;
1503 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1504 data |= ARCH_CAP_TAA_NO;
1507 * Nothing to do here; we emulate TSX_CTRL if present on the
1508 * host so the guest can choose between disabling TSX or
1509 * using VERW to clear CPU buffers.
1513 /* Guests don't need to know "Fill buffer clear control" exists */
1514 data &= ~ARCH_CAP_FB_CLEAR_CTRL;
1519 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1521 switch (msr->index) {
1522 case MSR_IA32_ARCH_CAPABILITIES:
1523 msr->data = kvm_get_arch_capabilities();
1525 case MSR_IA32_UCODE_REV:
1526 rdmsrl_safe(msr->index, &msr->data);
1529 return static_call(kvm_x86_get_msr_feature)(msr);
1534 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1536 struct kvm_msr_entry msr;
1540 r = kvm_get_msr_feature(&msr);
1542 if (r == KVM_MSR_RET_INVALID) {
1543 /* Unconditionally clear the output for simplicity */
1545 if (kvm_msr_ignored_check(index, 0, false))
1557 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1559 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1562 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1565 if (efer & (EFER_LME | EFER_LMA) &&
1566 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1569 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1575 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1577 if (efer & efer_reserved_bits)
1580 return __kvm_valid_efer(vcpu, efer);
1582 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1584 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1586 u64 old_efer = vcpu->arch.efer;
1587 u64 efer = msr_info->data;
1590 if (efer & efer_reserved_bits)
1593 if (!msr_info->host_initiated) {
1594 if (!__kvm_valid_efer(vcpu, efer))
1597 if (is_paging(vcpu) &&
1598 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1603 efer |= vcpu->arch.efer & EFER_LMA;
1605 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1611 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1612 kvm_mmu_reset_context(vcpu);
1617 void kvm_enable_efer_bits(u64 mask)
1619 efer_reserved_bits &= ~mask;
1621 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1623 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1625 struct kvm_x86_msr_filter *msr_filter;
1626 struct msr_bitmap_range *ranges;
1627 struct kvm *kvm = vcpu->kvm;
1632 /* x2APIC MSRs do not support filtering. */
1633 if (index >= 0x800 && index <= 0x8ff)
1636 idx = srcu_read_lock(&kvm->srcu);
1638 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1644 allowed = msr_filter->default_allow;
1645 ranges = msr_filter->ranges;
1647 for (i = 0; i < msr_filter->count; i++) {
1648 u32 start = ranges[i].base;
1649 u32 end = start + ranges[i].nmsrs;
1650 u32 flags = ranges[i].flags;
1651 unsigned long *bitmap = ranges[i].bitmap;
1653 if ((index >= start) && (index < end) && (flags & type)) {
1654 allowed = !!test_bit(index - start, bitmap);
1660 srcu_read_unlock(&kvm->srcu, idx);
1664 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1667 * Write @data into the MSR specified by @index. Select MSR specific fault
1668 * checks are bypassed if @host_initiated is %true.
1669 * Returns 0 on success, non-0 otherwise.
1670 * Assumes vcpu_load() was already called.
1672 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1673 bool host_initiated)
1675 struct msr_data msr;
1677 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1678 return KVM_MSR_RET_FILTERED;
1683 case MSR_KERNEL_GS_BASE:
1686 if (is_noncanonical_address(data, vcpu))
1689 case MSR_IA32_SYSENTER_EIP:
1690 case MSR_IA32_SYSENTER_ESP:
1692 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1693 * non-canonical address is written on Intel but not on
1694 * AMD (which ignores the top 32-bits, because it does
1695 * not implement 64-bit SYSENTER).
1697 * 64-bit code should hence be able to write a non-canonical
1698 * value on AMD. Making the address canonical ensures that
1699 * vmentry does not fail on Intel after writing a non-canonical
1700 * value, and that something deterministic happens if the guest
1701 * invokes 64-bit SYSENTER.
1703 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1706 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1709 if (!host_initiated &&
1710 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1711 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1715 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1716 * incomplete and conflicting architectural behavior. Current
1717 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1718 * reserved and always read as zeros. Enforce Intel's reserved
1719 * bits check if and only if the guest CPU is Intel, and clear
1720 * the bits in all other cases. This ensures cross-vendor
1721 * migration will provide consistent behavior for the guest.
1723 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1732 msr.host_initiated = host_initiated;
1734 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1737 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1738 u32 index, u64 data, bool host_initiated)
1740 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1742 if (ret == KVM_MSR_RET_INVALID)
1743 if (kvm_msr_ignored_check(index, data, true))
1750 * Read the MSR specified by @index into @data. Select MSR specific fault
1751 * checks are bypassed if @host_initiated is %true.
1752 * Returns 0 on success, non-0 otherwise.
1753 * Assumes vcpu_load() was already called.
1755 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1756 bool host_initiated)
1758 struct msr_data msr;
1761 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1762 return KVM_MSR_RET_FILTERED;
1766 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1769 if (!host_initiated &&
1770 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1771 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1777 msr.host_initiated = host_initiated;
1779 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1785 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1786 u32 index, u64 *data, bool host_initiated)
1788 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1790 if (ret == KVM_MSR_RET_INVALID) {
1791 /* Unconditionally clear *data for simplicity */
1793 if (kvm_msr_ignored_check(index, 0, false))
1800 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1802 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1804 EXPORT_SYMBOL_GPL(kvm_get_msr);
1806 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1808 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1810 EXPORT_SYMBOL_GPL(kvm_set_msr);
1812 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1814 int err = vcpu->run->msr.error;
1816 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1817 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1820 return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1823 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1825 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1828 static u64 kvm_msr_reason(int r)
1831 case KVM_MSR_RET_INVALID:
1832 return KVM_MSR_EXIT_REASON_UNKNOWN;
1833 case KVM_MSR_RET_FILTERED:
1834 return KVM_MSR_EXIT_REASON_FILTER;
1836 return KVM_MSR_EXIT_REASON_INVAL;
1840 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1841 u32 exit_reason, u64 data,
1842 int (*completion)(struct kvm_vcpu *vcpu),
1845 u64 msr_reason = kvm_msr_reason(r);
1847 /* Check if the user wanted to know about this MSR fault */
1848 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1851 vcpu->run->exit_reason = exit_reason;
1852 vcpu->run->msr.error = 0;
1853 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1854 vcpu->run->msr.reason = msr_reason;
1855 vcpu->run->msr.index = index;
1856 vcpu->run->msr.data = data;
1857 vcpu->arch.complete_userspace_io = completion;
1862 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1864 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1865 complete_emulated_rdmsr, r);
1868 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1870 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1871 complete_emulated_wrmsr, r);
1874 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1876 u32 ecx = kvm_rcx_read(vcpu);
1880 r = kvm_get_msr(vcpu, ecx, &data);
1882 /* MSR read failed? See if we should ask user space */
1883 if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1884 /* Bounce to user space */
1889 trace_kvm_msr_read(ecx, data);
1891 kvm_rax_write(vcpu, data & -1u);
1892 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1894 trace_kvm_msr_read_ex(ecx);
1897 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1899 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1901 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1903 u32 ecx = kvm_rcx_read(vcpu);
1904 u64 data = kvm_read_edx_eax(vcpu);
1907 r = kvm_set_msr(vcpu, ecx, data);
1909 /* MSR write failed? See if we should ask user space */
1910 if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1911 /* Bounce to user space */
1914 /* Signal all other negative errors to userspace */
1919 trace_kvm_msr_write(ecx, data);
1921 trace_kvm_msr_write_ex(ecx, data);
1923 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1925 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1927 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1929 return kvm_skip_emulated_instruction(vcpu);
1931 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1933 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1935 /* Treat an INVD instruction as a NOP and just skip it. */
1936 return kvm_emulate_as_nop(vcpu);
1938 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1940 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1942 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1943 return kvm_emulate_as_nop(vcpu);
1945 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1947 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1949 kvm_queue_exception(vcpu, UD_VECTOR);
1952 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1954 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1956 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1957 return kvm_emulate_as_nop(vcpu);
1959 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1961 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1963 xfer_to_guest_mode_prepare();
1964 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1965 xfer_to_guest_mode_work_pending();
1969 * The fast path for frequent and performance sensitive wrmsr emulation,
1970 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1971 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1972 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1973 * other cases which must be called after interrupts are enabled on the host.
1975 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1977 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1980 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1981 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1982 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1983 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1986 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1987 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1988 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1989 trace_kvm_apic_write(APIC_ICR, (u32)data);
1996 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1998 if (!kvm_can_use_hv_timer(vcpu))
2001 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2005 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2007 u32 msr = kvm_rcx_read(vcpu);
2009 fastpath_t ret = EXIT_FASTPATH_NONE;
2012 case APIC_BASE_MSR + (APIC_ICR >> 4):
2013 data = kvm_read_edx_eax(vcpu);
2014 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2015 kvm_skip_emulated_instruction(vcpu);
2016 ret = EXIT_FASTPATH_EXIT_HANDLED;
2019 case MSR_IA32_TSC_DEADLINE:
2020 data = kvm_read_edx_eax(vcpu);
2021 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2022 kvm_skip_emulated_instruction(vcpu);
2023 ret = EXIT_FASTPATH_REENTER_GUEST;
2030 if (ret != EXIT_FASTPATH_NONE)
2031 trace_kvm_msr_write(msr, data);
2035 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2038 * Adapt set_msr() to msr_io()'s calling convention
2040 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2042 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2045 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2047 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2050 #ifdef CONFIG_X86_64
2051 struct pvclock_clock {
2061 struct pvclock_gtod_data {
2064 struct pvclock_clock clock; /* extract of a clocksource struct */
2065 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2071 static struct pvclock_gtod_data pvclock_gtod_data;
2073 static void update_pvclock_gtod(struct timekeeper *tk)
2075 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2077 write_seqcount_begin(&vdata->seq);
2079 /* copy pvclock gtod data */
2080 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2081 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2082 vdata->clock.mask = tk->tkr_mono.mask;
2083 vdata->clock.mult = tk->tkr_mono.mult;
2084 vdata->clock.shift = tk->tkr_mono.shift;
2085 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2086 vdata->clock.offset = tk->tkr_mono.base;
2088 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2089 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2090 vdata->raw_clock.mask = tk->tkr_raw.mask;
2091 vdata->raw_clock.mult = tk->tkr_raw.mult;
2092 vdata->raw_clock.shift = tk->tkr_raw.shift;
2093 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2094 vdata->raw_clock.offset = tk->tkr_raw.base;
2096 vdata->wall_time_sec = tk->xtime_sec;
2098 vdata->offs_boot = tk->offs_boot;
2100 write_seqcount_end(&vdata->seq);
2103 static s64 get_kvmclock_base_ns(void)
2105 /* Count up from boot time, but with the frequency of the raw clock. */
2106 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2109 static s64 get_kvmclock_base_ns(void)
2111 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2112 return ktime_get_boottime_ns();
2116 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2120 struct pvclock_wall_clock wc;
2127 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2132 ++version; /* first time write, random junk */
2136 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2140 * The guest calculates current wall clock time by adding
2141 * system time (updated by kvm_guest_time_update below) to the
2142 * wall clock specified here. We do the reverse here.
2144 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2146 wc.nsec = do_div(wall_nsec, 1000000000);
2147 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2148 wc.version = version;
2150 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2153 wc_sec_hi = wall_nsec >> 32;
2154 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2155 &wc_sec_hi, sizeof(wc_sec_hi));
2159 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2162 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2163 bool old_msr, bool host_initiated)
2165 struct kvm_arch *ka = &vcpu->kvm->arch;
2167 if (vcpu->vcpu_id == 0 && !host_initiated) {
2168 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2169 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2171 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2174 vcpu->arch.time = system_time;
2175 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2177 /* we verify if the enable bit is set... */
2178 vcpu->arch.pv_time_enabled = false;
2179 if (!(system_time & 1))
2182 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2183 &vcpu->arch.pv_time, system_time & ~1ULL,
2184 sizeof(struct pvclock_vcpu_time_info)))
2185 vcpu->arch.pv_time_enabled = true;
2190 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2192 do_shl32_div32(dividend, divisor);
2196 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2197 s8 *pshift, u32 *pmultiplier)
2205 scaled64 = scaled_hz;
2206 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2211 tps32 = (uint32_t)tps64;
2212 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2213 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2221 *pmultiplier = div_frac(scaled64, tps32);
2224 #ifdef CONFIG_X86_64
2225 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2228 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2229 static unsigned long max_tsc_khz;
2231 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2233 u64 v = (u64)khz * (1000000 + ppm);
2238 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2240 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2244 /* Guest TSC same frequency as host TSC? */
2246 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2250 /* TSC scaling supported? */
2251 if (!kvm_has_tsc_control) {
2252 if (user_tsc_khz > tsc_khz) {
2253 vcpu->arch.tsc_catchup = 1;
2254 vcpu->arch.tsc_always_catchup = 1;
2257 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2262 /* TSC scaling required - calculate ratio */
2263 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2264 user_tsc_khz, tsc_khz);
2266 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2267 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2272 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2276 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2278 u32 thresh_lo, thresh_hi;
2279 int use_scaling = 0;
2281 /* tsc_khz can be zero if TSC calibration fails */
2282 if (user_tsc_khz == 0) {
2283 /* set tsc_scaling_ratio to a safe value */
2284 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2288 /* Compute a scale to convert nanoseconds in TSC cycles */
2289 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2290 &vcpu->arch.virtual_tsc_shift,
2291 &vcpu->arch.virtual_tsc_mult);
2292 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2295 * Compute the variation in TSC rate which is acceptable
2296 * within the range of tolerance and decide if the
2297 * rate being applied is within that bounds of the hardware
2298 * rate. If so, no scaling or compensation need be done.
2300 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2301 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2302 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2303 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2306 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2309 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2311 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2312 vcpu->arch.virtual_tsc_mult,
2313 vcpu->arch.virtual_tsc_shift);
2314 tsc += vcpu->arch.this_tsc_write;
2318 static inline int gtod_is_based_on_tsc(int mode)
2320 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2323 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2325 #ifdef CONFIG_X86_64
2327 struct kvm_arch *ka = &vcpu->kvm->arch;
2328 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2330 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2331 atomic_read(&vcpu->kvm->online_vcpus));
2334 * Once the masterclock is enabled, always perform request in
2335 * order to update it.
2337 * In order to enable masterclock, the host clocksource must be TSC
2338 * and the vcpus need to have matched TSCs. When that happens,
2339 * perform request to enable masterclock.
2341 if (ka->use_master_clock ||
2342 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2343 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2345 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2346 atomic_read(&vcpu->kvm->online_vcpus),
2347 ka->use_master_clock, gtod->clock.vclock_mode);
2352 * Multiply tsc by a fixed point number represented by ratio.
2354 * The most significant 64-N bits (mult) of ratio represent the
2355 * integral part of the fixed point number; the remaining N bits
2356 * (frac) represent the fractional part, ie. ratio represents a fixed
2357 * point number (mult + frac * 2^(-N)).
2359 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2361 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2363 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2366 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2370 if (ratio != kvm_default_tsc_scaling_ratio)
2371 _tsc = __scale_tsc(ratio, tsc);
2375 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2377 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2381 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2383 return target_tsc - tsc;
2386 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2388 return vcpu->arch.l1_tsc_offset +
2389 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2391 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2393 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2397 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2398 nested_offset = l1_offset;
2400 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2401 kvm_tsc_scaling_ratio_frac_bits);
2403 nested_offset += l2_offset;
2404 return nested_offset;
2406 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2408 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2410 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2411 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2412 kvm_tsc_scaling_ratio_frac_bits);
2414 return l1_multiplier;
2416 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2418 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2420 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2421 vcpu->arch.l1_tsc_offset,
2424 vcpu->arch.l1_tsc_offset = l1_offset;
2427 * If we are here because L1 chose not to trap WRMSR to TSC then
2428 * according to the spec this should set L1's TSC (as opposed to
2429 * setting L1's offset for L2).
2431 if (is_guest_mode(vcpu))
2432 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2434 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2435 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2437 vcpu->arch.tsc_offset = l1_offset;
2439 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2442 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2444 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2446 /* Userspace is changing the multiplier while L2 is active */
2447 if (is_guest_mode(vcpu))
2448 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2450 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2452 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2454 if (kvm_has_tsc_control)
2455 static_call(kvm_x86_write_tsc_multiplier)(
2456 vcpu, vcpu->arch.tsc_scaling_ratio);
2459 static inline bool kvm_check_tsc_unstable(void)
2461 #ifdef CONFIG_X86_64
2463 * TSC is marked unstable when we're running on Hyper-V,
2464 * 'TSC page' clocksource is good.
2466 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2469 return check_tsc_unstable();
2472 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2474 struct kvm *kvm = vcpu->kvm;
2475 u64 offset, ns, elapsed;
2476 unsigned long flags;
2478 bool already_matched;
2479 bool synchronizing = false;
2481 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2482 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2483 ns = get_kvmclock_base_ns();
2484 elapsed = ns - kvm->arch.last_tsc_nsec;
2486 if (vcpu->arch.virtual_tsc_khz) {
2489 * detection of vcpu initialization -- need to sync
2490 * with other vCPUs. This particularly helps to keep
2491 * kvm_clock stable after CPU hotplug
2493 synchronizing = true;
2495 u64 tsc_exp = kvm->arch.last_tsc_write +
2496 nsec_to_cycles(vcpu, elapsed);
2497 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2499 * Special case: TSC write with a small delta (1 second)
2500 * of virtual cycle time against real time is
2501 * interpreted as an attempt to synchronize the CPU.
2503 synchronizing = data < tsc_exp + tsc_hz &&
2504 data + tsc_hz > tsc_exp;
2509 * For a reliable TSC, we can match TSC offsets, and for an unstable
2510 * TSC, we add elapsed time in this computation. We could let the
2511 * compensation code attempt to catch up if we fall behind, but
2512 * it's better to try to match offsets from the beginning.
2514 if (synchronizing &&
2515 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2516 if (!kvm_check_tsc_unstable()) {
2517 offset = kvm->arch.cur_tsc_offset;
2519 u64 delta = nsec_to_cycles(vcpu, elapsed);
2521 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2524 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2527 * We split periods of matched TSC writes into generations.
2528 * For each generation, we track the original measured
2529 * nanosecond time, offset, and write, so if TSCs are in
2530 * sync, we can match exact offset, and if not, we can match
2531 * exact software computation in compute_guest_tsc()
2533 * These values are tracked in kvm->arch.cur_xxx variables.
2535 kvm->arch.cur_tsc_generation++;
2536 kvm->arch.cur_tsc_nsec = ns;
2537 kvm->arch.cur_tsc_write = data;
2538 kvm->arch.cur_tsc_offset = offset;
2543 * We also track th most recent recorded KHZ, write and time to
2544 * allow the matching interval to be extended at each write.
2546 kvm->arch.last_tsc_nsec = ns;
2547 kvm->arch.last_tsc_write = data;
2548 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2550 vcpu->arch.last_guest_tsc = data;
2552 /* Keep track of which generation this VCPU has synchronized to */
2553 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2554 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2555 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2557 kvm_vcpu_write_tsc_offset(vcpu, offset);
2558 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2560 raw_spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2562 kvm->arch.nr_vcpus_matched_tsc = 0;
2563 } else if (!already_matched) {
2564 kvm->arch.nr_vcpus_matched_tsc++;
2567 kvm_track_tsc_matching(vcpu);
2568 raw_spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2571 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2574 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2575 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2578 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2580 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2581 WARN_ON(adjustment < 0);
2582 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2583 vcpu->arch.l1_tsc_scaling_ratio);
2584 adjust_tsc_offset_guest(vcpu, adjustment);
2587 #ifdef CONFIG_X86_64
2589 static u64 read_tsc(void)
2591 u64 ret = (u64)rdtsc_ordered();
2592 u64 last = pvclock_gtod_data.clock.cycle_last;
2594 if (likely(ret >= last))
2598 * GCC likes to generate cmov here, but this branch is extremely
2599 * predictable (it's just a function of time and the likely is
2600 * very likely) and there's a data dependence, so force GCC
2601 * to generate a branch instead. I don't barrier() because
2602 * we don't actually need a barrier, and if this function
2603 * ever gets inlined it will generate worse code.
2609 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2615 switch (clock->vclock_mode) {
2616 case VDSO_CLOCKMODE_HVCLOCK:
2617 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2619 if (tsc_pg_val != U64_MAX) {
2620 /* TSC page valid */
2621 *mode = VDSO_CLOCKMODE_HVCLOCK;
2622 v = (tsc_pg_val - clock->cycle_last) &
2625 /* TSC page invalid */
2626 *mode = VDSO_CLOCKMODE_NONE;
2629 case VDSO_CLOCKMODE_TSC:
2630 *mode = VDSO_CLOCKMODE_TSC;
2631 *tsc_timestamp = read_tsc();
2632 v = (*tsc_timestamp - clock->cycle_last) &
2636 *mode = VDSO_CLOCKMODE_NONE;
2639 if (*mode == VDSO_CLOCKMODE_NONE)
2640 *tsc_timestamp = v = 0;
2642 return v * clock->mult;
2645 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2647 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2653 seq = read_seqcount_begin(>od->seq);
2654 ns = gtod->raw_clock.base_cycles;
2655 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2656 ns >>= gtod->raw_clock.shift;
2657 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2658 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2664 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2666 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2672 seq = read_seqcount_begin(>od->seq);
2673 ts->tv_sec = gtod->wall_time_sec;
2674 ns = gtod->clock.base_cycles;
2675 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2676 ns >>= gtod->clock.shift;
2677 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2679 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2685 /* returns true if host is using TSC based clocksource */
2686 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2688 /* checked again under seqlock below */
2689 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2692 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2696 /* returns true if host is using TSC based clocksource */
2697 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2700 /* checked again under seqlock below */
2701 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2704 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2710 * Assuming a stable TSC across physical CPUS, and a stable TSC
2711 * across virtual CPUs, the following condition is possible.
2712 * Each numbered line represents an event visible to both
2713 * CPUs at the next numbered event.
2715 * "timespecX" represents host monotonic time. "tscX" represents
2718 * VCPU0 on CPU0 | VCPU1 on CPU1
2720 * 1. read timespec0,tsc0
2721 * 2. | timespec1 = timespec0 + N
2723 * 3. transition to guest | transition to guest
2724 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2725 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2726 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2728 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2731 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2733 * - 0 < N - M => M < N
2735 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2736 * always the case (the difference between two distinct xtime instances
2737 * might be smaller then the difference between corresponding TSC reads,
2738 * when updating guest vcpus pvclock areas).
2740 * To avoid that problem, do not allow visibility of distinct
2741 * system_timestamp/tsc_timestamp values simultaneously: use a master
2742 * copy of host monotonic time values. Update that master copy
2745 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2749 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2751 #ifdef CONFIG_X86_64
2752 struct kvm_arch *ka = &kvm->arch;
2754 bool host_tsc_clocksource, vcpus_matched;
2756 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2757 atomic_read(&kvm->online_vcpus));
2760 * If the host uses TSC clock, then passthrough TSC as stable
2763 host_tsc_clocksource = kvm_get_time_and_clockread(
2764 &ka->master_kernel_ns,
2765 &ka->master_cycle_now);
2767 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2768 && !ka->backwards_tsc_observed
2769 && !ka->boot_vcpu_runs_old_kvmclock;
2771 if (ka->use_master_clock)
2772 atomic_set(&kvm_guest_has_master_clock, 1);
2774 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2775 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2780 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2782 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2785 static void kvm_gen_update_masterclock(struct kvm *kvm)
2787 #ifdef CONFIG_X86_64
2789 struct kvm_vcpu *vcpu;
2790 struct kvm_arch *ka = &kvm->arch;
2791 unsigned long flags;
2793 kvm_hv_invalidate_tsc_page(kvm);
2795 kvm_make_mclock_inprogress_request(kvm);
2797 /* no guest entries from this point */
2798 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2799 pvclock_update_vm_gtod_copy(kvm);
2800 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2802 kvm_for_each_vcpu(i, vcpu, kvm)
2803 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2805 /* guest entries allowed */
2806 kvm_for_each_vcpu(i, vcpu, kvm)
2807 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2811 u64 get_kvmclock_ns(struct kvm *kvm)
2813 struct kvm_arch *ka = &kvm->arch;
2814 struct pvclock_vcpu_time_info hv_clock;
2815 unsigned long flags;
2818 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2819 if (!ka->use_master_clock) {
2820 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2821 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2824 hv_clock.tsc_timestamp = ka->master_cycle_now;
2825 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2826 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2828 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2831 if (__this_cpu_read(cpu_tsc_khz)) {
2832 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2833 &hv_clock.tsc_shift,
2834 &hv_clock.tsc_to_system_mul);
2835 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2837 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2844 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2845 struct gfn_to_hva_cache *cache,
2846 unsigned int offset)
2848 struct kvm_vcpu_arch *vcpu = &v->arch;
2849 struct pvclock_vcpu_time_info guest_hv_clock;
2851 if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2852 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2855 /* This VCPU is paused, but it's legal for a guest to read another
2856 * VCPU's kvmclock, so we really have to follow the specification where
2857 * it says that version is odd if data is being modified, and even after
2860 * Version field updates must be kept separate. This is because
2861 * kvm_write_guest_cached might use a "rep movs" instruction, and
2862 * writes within a string instruction are weakly ordered. So there
2863 * are three writes overall.
2865 * As a small optimization, only write the version field in the first
2866 * and third write. The vcpu->pv_time cache is still valid, because the
2867 * version field is the first in the struct.
2869 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2871 if (guest_hv_clock.version & 1)
2872 ++guest_hv_clock.version; /* first time write, random junk */
2874 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2875 kvm_write_guest_offset_cached(v->kvm, cache,
2876 &vcpu->hv_clock, offset,
2877 sizeof(vcpu->hv_clock.version));
2881 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2882 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2884 if (vcpu->pvclock_set_guest_stopped_request) {
2885 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2886 vcpu->pvclock_set_guest_stopped_request = false;
2889 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2891 kvm_write_guest_offset_cached(v->kvm, cache,
2892 &vcpu->hv_clock, offset,
2893 sizeof(vcpu->hv_clock));
2897 vcpu->hv_clock.version++;
2898 kvm_write_guest_offset_cached(v->kvm, cache,
2899 &vcpu->hv_clock, offset,
2900 sizeof(vcpu->hv_clock.version));
2903 static int kvm_guest_time_update(struct kvm_vcpu *v)
2905 unsigned long flags, tgt_tsc_khz;
2906 struct kvm_vcpu_arch *vcpu = &v->arch;
2907 struct kvm_arch *ka = &v->kvm->arch;
2909 u64 tsc_timestamp, host_tsc;
2911 bool use_master_clock;
2917 * If the host uses TSC clock, then passthrough TSC as stable
2920 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2921 use_master_clock = ka->use_master_clock;
2922 if (use_master_clock) {
2923 host_tsc = ka->master_cycle_now;
2924 kernel_ns = ka->master_kernel_ns;
2926 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2928 /* Keep irq disabled to prevent changes to the clock */
2929 local_irq_save(flags);
2930 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2931 if (unlikely(tgt_tsc_khz == 0)) {
2932 local_irq_restore(flags);
2933 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2936 if (!use_master_clock) {
2938 kernel_ns = get_kvmclock_base_ns();
2941 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2944 * We may have to catch up the TSC to match elapsed wall clock
2945 * time for two reasons, even if kvmclock is used.
2946 * 1) CPU could have been running below the maximum TSC rate
2947 * 2) Broken TSC compensation resets the base at each VCPU
2948 * entry to avoid unknown leaps of TSC even when running
2949 * again on the same CPU. This may cause apparent elapsed
2950 * time to disappear, and the guest to stand still or run
2953 if (vcpu->tsc_catchup) {
2954 u64 tsc = compute_guest_tsc(v, kernel_ns);
2955 if (tsc > tsc_timestamp) {
2956 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2957 tsc_timestamp = tsc;
2961 local_irq_restore(flags);
2963 /* With all the info we got, fill in the values */
2965 if (kvm_has_tsc_control)
2966 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2967 v->arch.l1_tsc_scaling_ratio);
2969 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2970 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2971 &vcpu->hv_clock.tsc_shift,
2972 &vcpu->hv_clock.tsc_to_system_mul);
2973 vcpu->hw_tsc_khz = tgt_tsc_khz;
2976 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2977 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2978 vcpu->last_guest_tsc = tsc_timestamp;
2980 /* If the host uses TSC clocksource, then it is stable */
2982 if (use_master_clock)
2983 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2985 vcpu->hv_clock.flags = pvclock_flags;
2987 if (vcpu->pv_time_enabled)
2988 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2989 if (vcpu->xen.vcpu_info_set)
2990 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2991 offsetof(struct compat_vcpu_info, time));
2992 if (vcpu->xen.vcpu_time_info_set)
2993 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2995 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3000 * kvmclock updates which are isolated to a given vcpu, such as
3001 * vcpu->cpu migration, should not allow system_timestamp from
3002 * the rest of the vcpus to remain static. Otherwise ntp frequency
3003 * correction applies to one vcpu's system_timestamp but not
3006 * So in those cases, request a kvmclock update for all vcpus.
3007 * We need to rate-limit these requests though, as they can
3008 * considerably slow guests that have a large number of vcpus.
3009 * The time for a remote vcpu to update its kvmclock is bound
3010 * by the delay we use to rate-limit the updates.
3013 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3015 static void kvmclock_update_fn(struct work_struct *work)
3018 struct delayed_work *dwork = to_delayed_work(work);
3019 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3020 kvmclock_update_work);
3021 struct kvm *kvm = container_of(ka, struct kvm, arch);
3022 struct kvm_vcpu *vcpu;
3024 kvm_for_each_vcpu(i, vcpu, kvm) {
3025 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3026 kvm_vcpu_kick(vcpu);
3030 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3032 struct kvm *kvm = v->kvm;
3034 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3035 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3036 KVMCLOCK_UPDATE_DELAY);
3039 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3041 static void kvmclock_sync_fn(struct work_struct *work)
3043 struct delayed_work *dwork = to_delayed_work(work);
3044 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3045 kvmclock_sync_work);
3046 struct kvm *kvm = container_of(ka, struct kvm, arch);
3048 if (!kvmclock_periodic_sync)
3051 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3052 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3053 KVMCLOCK_SYNC_PERIOD);
3057 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3059 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3061 /* McStatusWrEn enabled? */
3062 if (guest_cpuid_is_amd_or_hygon(vcpu))
3063 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3068 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3070 u64 mcg_cap = vcpu->arch.mcg_cap;
3071 unsigned bank_num = mcg_cap & 0xff;
3072 u32 msr = msr_info->index;
3073 u64 data = msr_info->data;
3076 case MSR_IA32_MCG_STATUS:
3077 vcpu->arch.mcg_status = data;
3079 case MSR_IA32_MCG_CTL:
3080 if (!(mcg_cap & MCG_CTL_P) &&
3081 (data || !msr_info->host_initiated))
3083 if (data != 0 && data != ~(u64)0)
3085 vcpu->arch.mcg_ctl = data;
3088 if (msr >= MSR_IA32_MC0_CTL &&
3089 msr < MSR_IA32_MCx_CTL(bank_num)) {
3090 u32 offset = array_index_nospec(
3091 msr - MSR_IA32_MC0_CTL,
3092 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3094 /* only 0 or all 1s can be written to IA32_MCi_CTL
3095 * some Linux kernels though clear bit 10 in bank 4 to
3096 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3097 * this to avoid an uncatched #GP in the guest
3099 if ((offset & 0x3) == 0 &&
3100 data != 0 && (data | (1 << 10)) != ~(u64)0)
3104 if (!msr_info->host_initiated &&
3105 (offset & 0x3) == 1 && data != 0) {
3106 if (!can_set_mci_status(vcpu))
3110 vcpu->arch.mce_banks[offset] = data;
3118 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3120 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3122 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3125 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3127 gpa_t gpa = data & ~0x3f;
3129 /* Bits 4:5 are reserved, Should be zero */
3133 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3134 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3137 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3138 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3141 if (!lapic_in_kernel(vcpu))
3142 return data ? 1 : 0;
3144 vcpu->arch.apf.msr_en_val = data;
3146 if (!kvm_pv_async_pf_enabled(vcpu)) {
3147 kvm_clear_async_pf_completion_queue(vcpu);
3148 kvm_async_pf_hash_reset(vcpu);
3152 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3156 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3157 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3159 kvm_async_pf_wakeup_all(vcpu);
3164 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3166 /* Bits 8-63 are reserved */
3170 if (!lapic_in_kernel(vcpu))
3173 vcpu->arch.apf.msr_int_val = data;
3175 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3180 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3182 vcpu->arch.pv_time_enabled = false;
3183 vcpu->arch.time = 0;
3186 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3188 ++vcpu->stat.tlb_flush;
3189 static_call(kvm_x86_tlb_flush_all)(vcpu);
3192 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3194 ++vcpu->stat.tlb_flush;
3198 * A TLB flush on behalf of the guest is equivalent to
3199 * INVPCID(all), toggling CR4.PGE, etc., which requires
3200 * a forced sync of the shadow page tables. Unload the
3201 * entire MMU here and the subsequent load will sync the
3202 * shadow page tables, and also flush the TLB.
3204 kvm_mmu_unload(vcpu);
3208 static_call(kvm_x86_tlb_flush_guest)(vcpu);
3212 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3214 ++vcpu->stat.tlb_flush;
3215 static_call(kvm_x86_tlb_flush_current)(vcpu);
3219 * Service "local" TLB flush requests, which are specific to the current MMU
3220 * context. In addition to the generic event handling in vcpu_enter_guest(),
3221 * TLB flushes that are targeted at an MMU context also need to be serviced
3222 * prior before nested VM-Enter/VM-Exit.
3224 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3226 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3227 kvm_vcpu_flush_tlb_current(vcpu);
3229 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3230 kvm_vcpu_flush_tlb_guest(vcpu);
3232 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3234 static void record_steal_time(struct kvm_vcpu *vcpu)
3236 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3237 struct kvm_steal_time __user *st;
3238 struct kvm_memslots *slots;
3242 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3243 kvm_xen_runstate_set_running(vcpu);
3247 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3250 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3253 slots = kvm_memslots(vcpu->kvm);
3255 if (unlikely(slots->generation != ghc->generation ||
3256 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3257 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3259 /* We rely on the fact that it fits in a single page. */
3260 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3262 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3263 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3267 st = (struct kvm_steal_time __user *)ghc->hva;
3269 * Doing a TLB flush here, on the guest's behalf, can avoid
3272 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3273 u8 st_preempted = 0;
3276 if (!user_access_begin(st, sizeof(*st)))
3279 asm volatile("1: xchgb %0, %2\n"
3282 _ASM_EXTABLE_UA(1b, 2b)
3283 : "+q" (st_preempted),
3285 "+m" (st->preempted));
3291 vcpu->arch.st.preempted = 0;
3293 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3294 st_preempted & KVM_VCPU_FLUSH_TLB);
3295 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3296 kvm_vcpu_flush_tlb_guest(vcpu);
3298 if (!user_access_begin(st, sizeof(*st)))
3301 if (!user_access_begin(st, sizeof(*st)))
3304 unsafe_put_user(0, &st->preempted, out);
3305 vcpu->arch.st.preempted = 0;
3308 unsafe_get_user(version, &st->version, out);
3310 version += 1; /* first time write, random junk */
3313 unsafe_put_user(version, &st->version, out);
3317 unsafe_get_user(steal, &st->steal, out);
3318 steal += current->sched_info.run_delay -
3319 vcpu->arch.st.last_steal;
3320 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3321 unsafe_put_user(steal, &st->steal, out);
3324 unsafe_put_user(version, &st->version, out);
3329 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3332 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3335 u32 msr = msr_info->index;
3336 u64 data = msr_info->data;
3338 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3339 return kvm_xen_write_hypercall_page(vcpu, data);
3342 case MSR_AMD64_NB_CFG:
3343 case MSR_IA32_UCODE_WRITE:
3344 case MSR_VM_HSAVE_PA:
3345 case MSR_AMD64_PATCH_LOADER:
3346 case MSR_AMD64_BU_CFG2:
3347 case MSR_AMD64_DC_CFG:
3348 case MSR_F15H_EX_CFG:
3351 case MSR_IA32_UCODE_REV:
3352 if (msr_info->host_initiated)
3353 vcpu->arch.microcode_version = data;
3355 case MSR_IA32_ARCH_CAPABILITIES:
3356 if (!msr_info->host_initiated)
3358 vcpu->arch.arch_capabilities = data;
3360 case MSR_IA32_PERF_CAPABILITIES: {
3361 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3363 if (!msr_info->host_initiated)
3365 if (kvm_get_msr_feature(&msr_ent))
3367 if (data & ~msr_ent.data)
3370 vcpu->arch.perf_capabilities = data;
3375 return set_efer(vcpu, msr_info);
3377 data &= ~(u64)0x40; /* ignore flush filter disable */
3378 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3379 data &= ~(u64)0x8; /* ignore TLB cache disable */
3381 /* Handle McStatusWrEn */
3382 if (data == BIT_ULL(18)) {
3383 vcpu->arch.msr_hwcr = data;
3384 } else if (data != 0) {
3385 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3390 case MSR_FAM10H_MMIO_CONF_BASE:
3392 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3397 case 0x200 ... 0x2ff:
3398 return kvm_mtrr_set_msr(vcpu, msr, data);
3399 case MSR_IA32_APICBASE:
3400 return kvm_set_apic_base(vcpu, msr_info);
3401 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3402 return kvm_x2apic_msr_write(vcpu, msr, data);
3403 case MSR_IA32_TSC_DEADLINE:
3404 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3406 case MSR_IA32_TSC_ADJUST:
3407 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3408 if (!msr_info->host_initiated) {
3409 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3410 adjust_tsc_offset_guest(vcpu, adj);
3411 /* Before back to guest, tsc_timestamp must be adjusted
3412 * as well, otherwise guest's percpu pvclock time could jump.
3414 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3416 vcpu->arch.ia32_tsc_adjust_msr = data;
3419 case MSR_IA32_MISC_ENABLE:
3420 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3421 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3422 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3424 vcpu->arch.ia32_misc_enable_msr = data;
3425 kvm_update_cpuid_runtime(vcpu);
3427 vcpu->arch.ia32_misc_enable_msr = data;
3430 case MSR_IA32_SMBASE:
3431 if (!msr_info->host_initiated)
3433 vcpu->arch.smbase = data;
3435 case MSR_IA32_POWER_CTL:
3436 vcpu->arch.msr_ia32_power_ctl = data;
3439 if (msr_info->host_initiated) {
3440 kvm_synchronize_tsc(vcpu, data);
3442 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3443 adjust_tsc_offset_guest(vcpu, adj);
3444 vcpu->arch.ia32_tsc_adjust_msr += adj;
3448 if (!msr_info->host_initiated &&
3449 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3452 * KVM supports exposing PT to the guest, but does not support
3453 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3454 * XSAVES/XRSTORS to save/restore PT MSRs.
3456 if (data & ~supported_xss)
3458 vcpu->arch.ia32_xss = data;
3459 kvm_update_cpuid_runtime(vcpu);
3462 if (!msr_info->host_initiated)
3464 vcpu->arch.smi_count = data;
3466 case MSR_KVM_WALL_CLOCK_NEW:
3467 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3470 vcpu->kvm->arch.wall_clock = data;
3471 kvm_write_wall_clock(vcpu->kvm, data, 0);
3473 case MSR_KVM_WALL_CLOCK:
3474 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3477 vcpu->kvm->arch.wall_clock = data;
3478 kvm_write_wall_clock(vcpu->kvm, data, 0);
3480 case MSR_KVM_SYSTEM_TIME_NEW:
3481 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3484 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3486 case MSR_KVM_SYSTEM_TIME:
3487 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3490 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3492 case MSR_KVM_ASYNC_PF_EN:
3493 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3496 if (kvm_pv_enable_async_pf(vcpu, data))
3499 case MSR_KVM_ASYNC_PF_INT:
3500 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3503 if (kvm_pv_enable_async_pf_int(vcpu, data))
3506 case MSR_KVM_ASYNC_PF_ACK:
3507 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3510 vcpu->arch.apf.pageready_pending = false;
3511 kvm_check_async_pf_completion(vcpu);
3514 case MSR_KVM_STEAL_TIME:
3515 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3518 if (unlikely(!sched_info_on()))
3521 if (data & KVM_STEAL_RESERVED_MASK)
3524 vcpu->arch.st.msr_val = data;
3526 if (!(data & KVM_MSR_ENABLED))
3529 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3532 case MSR_KVM_PV_EOI_EN:
3533 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3536 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3540 case MSR_KVM_POLL_CONTROL:
3541 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3544 /* only enable bit supported */
3545 if (data & (-1ULL << 1))
3548 vcpu->arch.msr_kvm_poll_control = data;
3551 case MSR_IA32_MCG_CTL:
3552 case MSR_IA32_MCG_STATUS:
3553 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3554 return set_msr_mce(vcpu, msr_info);
3556 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3557 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3560 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3561 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3562 if (kvm_pmu_is_valid_msr(vcpu, msr))
3563 return kvm_pmu_set_msr(vcpu, msr_info);
3565 if (pr || data != 0)
3566 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3567 "0x%x data 0x%llx\n", msr, data);
3569 case MSR_K7_CLK_CTL:
3571 * Ignore all writes to this no longer documented MSR.
3572 * Writes are only relevant for old K7 processors,
3573 * all pre-dating SVM, but a recommended workaround from
3574 * AMD for these chips. It is possible to specify the
3575 * affected processor models on the command line, hence
3576 * the need to ignore the workaround.
3579 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3580 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3581 case HV_X64_MSR_SYNDBG_OPTIONS:
3582 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3583 case HV_X64_MSR_CRASH_CTL:
3584 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3585 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3586 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3587 case HV_X64_MSR_TSC_EMULATION_STATUS:
3588 return kvm_hv_set_msr_common(vcpu, msr, data,
3589 msr_info->host_initiated);
3590 case MSR_IA32_BBL_CR_CTL3:
3591 /* Drop writes to this legacy MSR -- see rdmsr
3592 * counterpart for further detail.
3594 if (report_ignored_msrs)
3595 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3598 case MSR_AMD64_OSVW_ID_LENGTH:
3599 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3601 vcpu->arch.osvw.length = data;
3603 case MSR_AMD64_OSVW_STATUS:
3604 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3606 vcpu->arch.osvw.status = data;
3608 case MSR_PLATFORM_INFO:
3609 if (!msr_info->host_initiated ||
3610 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3611 cpuid_fault_enabled(vcpu)))
3613 vcpu->arch.msr_platform_info = data;
3615 case MSR_MISC_FEATURES_ENABLES:
3616 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3617 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3618 !supports_cpuid_fault(vcpu)))
3620 vcpu->arch.msr_misc_features_enables = data;
3623 if (kvm_pmu_is_valid_msr(vcpu, msr))
3624 return kvm_pmu_set_msr(vcpu, msr_info);
3625 return KVM_MSR_RET_INVALID;
3629 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3631 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3634 u64 mcg_cap = vcpu->arch.mcg_cap;
3635 unsigned bank_num = mcg_cap & 0xff;
3638 case MSR_IA32_P5_MC_ADDR:
3639 case MSR_IA32_P5_MC_TYPE:
3642 case MSR_IA32_MCG_CAP:
3643 data = vcpu->arch.mcg_cap;
3645 case MSR_IA32_MCG_CTL:
3646 if (!(mcg_cap & MCG_CTL_P) && !host)
3648 data = vcpu->arch.mcg_ctl;
3650 case MSR_IA32_MCG_STATUS:
3651 data = vcpu->arch.mcg_status;
3654 if (msr >= MSR_IA32_MC0_CTL &&
3655 msr < MSR_IA32_MCx_CTL(bank_num)) {
3656 u32 offset = array_index_nospec(
3657 msr - MSR_IA32_MC0_CTL,
3658 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3660 data = vcpu->arch.mce_banks[offset];
3669 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3671 switch (msr_info->index) {
3672 case MSR_IA32_PLATFORM_ID:
3673 case MSR_IA32_EBL_CR_POWERON:
3674 case MSR_IA32_LASTBRANCHFROMIP:
3675 case MSR_IA32_LASTBRANCHTOIP:
3676 case MSR_IA32_LASTINTFROMIP:
3677 case MSR_IA32_LASTINTTOIP:
3678 case MSR_AMD64_SYSCFG:
3679 case MSR_K8_TSEG_ADDR:
3680 case MSR_K8_TSEG_MASK:
3681 case MSR_VM_HSAVE_PA:
3682 case MSR_K8_INT_PENDING_MSG:
3683 case MSR_AMD64_NB_CFG:
3684 case MSR_FAM10H_MMIO_CONF_BASE:
3685 case MSR_AMD64_BU_CFG2:
3686 case MSR_IA32_PERF_CTL:
3687 case MSR_AMD64_DC_CFG:
3688 case MSR_F15H_EX_CFG:
3690 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3691 * limit) MSRs. Just return 0, as we do not want to expose the host
3692 * data here. Do not conditionalize this on CPUID, as KVM does not do
3693 * so for existing CPU-specific MSRs.
3695 case MSR_RAPL_POWER_UNIT:
3696 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3697 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3698 case MSR_PKG_ENERGY_STATUS: /* Total package */
3699 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3702 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3703 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3704 return kvm_pmu_get_msr(vcpu, msr_info);
3705 if (!msr_info->host_initiated)
3709 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3710 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3711 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3712 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3713 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3714 return kvm_pmu_get_msr(vcpu, msr_info);
3717 case MSR_IA32_UCODE_REV:
3718 msr_info->data = vcpu->arch.microcode_version;
3720 case MSR_IA32_ARCH_CAPABILITIES:
3721 if (!msr_info->host_initiated &&
3722 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3724 msr_info->data = vcpu->arch.arch_capabilities;
3726 case MSR_IA32_PERF_CAPABILITIES:
3727 if (!msr_info->host_initiated &&
3728 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3730 msr_info->data = vcpu->arch.perf_capabilities;
3732 case MSR_IA32_POWER_CTL:
3733 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3735 case MSR_IA32_TSC: {
3737 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3738 * even when not intercepted. AMD manual doesn't explicitly
3739 * state this but appears to behave the same.
3741 * On userspace reads and writes, however, we unconditionally
3742 * return L1's TSC value to ensure backwards-compatible
3743 * behavior for migration.
3747 if (msr_info->host_initiated) {
3748 offset = vcpu->arch.l1_tsc_offset;
3749 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3751 offset = vcpu->arch.tsc_offset;
3752 ratio = vcpu->arch.tsc_scaling_ratio;
3755 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3759 case 0x200 ... 0x2ff:
3760 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3761 case 0xcd: /* fsb frequency */
3765 * MSR_EBC_FREQUENCY_ID
3766 * Conservative value valid for even the basic CPU models.
3767 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3768 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3769 * and 266MHz for model 3, or 4. Set Core Clock
3770 * Frequency to System Bus Frequency Ratio to 1 (bits
3771 * 31:24) even though these are only valid for CPU
3772 * models > 2, however guests may end up dividing or
3773 * multiplying by zero otherwise.
3775 case MSR_EBC_FREQUENCY_ID:
3776 msr_info->data = 1 << 24;
3778 case MSR_IA32_APICBASE:
3779 msr_info->data = kvm_get_apic_base(vcpu);
3781 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3782 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3783 case MSR_IA32_TSC_DEADLINE:
3784 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3786 case MSR_IA32_TSC_ADJUST:
3787 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3789 case MSR_IA32_MISC_ENABLE:
3790 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3792 case MSR_IA32_SMBASE:
3793 if (!msr_info->host_initiated)
3795 msr_info->data = vcpu->arch.smbase;
3798 msr_info->data = vcpu->arch.smi_count;
3800 case MSR_IA32_PERF_STATUS:
3801 /* TSC increment by tick */
3802 msr_info->data = 1000ULL;
3803 /* CPU multiplier */
3804 msr_info->data |= (((uint64_t)4ULL) << 40);
3807 msr_info->data = vcpu->arch.efer;
3809 case MSR_KVM_WALL_CLOCK:
3810 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3813 msr_info->data = vcpu->kvm->arch.wall_clock;
3815 case MSR_KVM_WALL_CLOCK_NEW:
3816 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3819 msr_info->data = vcpu->kvm->arch.wall_clock;
3821 case MSR_KVM_SYSTEM_TIME:
3822 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3825 msr_info->data = vcpu->arch.time;
3827 case MSR_KVM_SYSTEM_TIME_NEW:
3828 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3831 msr_info->data = vcpu->arch.time;
3833 case MSR_KVM_ASYNC_PF_EN:
3834 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3837 msr_info->data = vcpu->arch.apf.msr_en_val;
3839 case MSR_KVM_ASYNC_PF_INT:
3840 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3843 msr_info->data = vcpu->arch.apf.msr_int_val;
3845 case MSR_KVM_ASYNC_PF_ACK:
3846 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3851 case MSR_KVM_STEAL_TIME:
3852 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3855 msr_info->data = vcpu->arch.st.msr_val;
3857 case MSR_KVM_PV_EOI_EN:
3858 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3861 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3863 case MSR_KVM_POLL_CONTROL:
3864 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3867 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3869 case MSR_IA32_P5_MC_ADDR:
3870 case MSR_IA32_P5_MC_TYPE:
3871 case MSR_IA32_MCG_CAP:
3872 case MSR_IA32_MCG_CTL:
3873 case MSR_IA32_MCG_STATUS:
3874 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3875 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3876 msr_info->host_initiated);
3878 if (!msr_info->host_initiated &&
3879 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3881 msr_info->data = vcpu->arch.ia32_xss;
3883 case MSR_K7_CLK_CTL:
3885 * Provide expected ramp-up count for K7. All other
3886 * are set to zero, indicating minimum divisors for
3889 * This prevents guest kernels on AMD host with CPU
3890 * type 6, model 8 and higher from exploding due to
3891 * the rdmsr failing.
3893 msr_info->data = 0x20000000;
3895 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3896 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3897 case HV_X64_MSR_SYNDBG_OPTIONS:
3898 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3899 case HV_X64_MSR_CRASH_CTL:
3900 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3901 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3902 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3903 case HV_X64_MSR_TSC_EMULATION_STATUS:
3904 return kvm_hv_get_msr_common(vcpu,
3905 msr_info->index, &msr_info->data,
3906 msr_info->host_initiated);
3907 case MSR_IA32_BBL_CR_CTL3:
3908 /* This legacy MSR exists but isn't fully documented in current
3909 * silicon. It is however accessed by winxp in very narrow
3910 * scenarios where it sets bit #19, itself documented as
3911 * a "reserved" bit. Best effort attempt to source coherent
3912 * read data here should the balance of the register be
3913 * interpreted by the guest:
3915 * L2 cache control register 3: 64GB range, 256KB size,
3916 * enabled, latency 0x1, configured
3918 msr_info->data = 0xbe702111;
3920 case MSR_AMD64_OSVW_ID_LENGTH:
3921 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3923 msr_info->data = vcpu->arch.osvw.length;
3925 case MSR_AMD64_OSVW_STATUS:
3926 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3928 msr_info->data = vcpu->arch.osvw.status;
3930 case MSR_PLATFORM_INFO:
3931 if (!msr_info->host_initiated &&
3932 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3934 msr_info->data = vcpu->arch.msr_platform_info;
3936 case MSR_MISC_FEATURES_ENABLES:
3937 msr_info->data = vcpu->arch.msr_misc_features_enables;
3940 msr_info->data = vcpu->arch.msr_hwcr;
3943 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3944 return kvm_pmu_get_msr(vcpu, msr_info);
3945 return KVM_MSR_RET_INVALID;
3949 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3952 * Read or write a bunch of msrs. All parameters are kernel addresses.
3954 * @return number of msrs set successfully.
3956 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3957 struct kvm_msr_entry *entries,
3958 int (*do_msr)(struct kvm_vcpu *vcpu,
3959 unsigned index, u64 *data))
3963 for (i = 0; i < msrs->nmsrs; ++i)
3964 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3971 * Read or write a bunch of msrs. Parameters are user addresses.
3973 * @return number of msrs set successfully.
3975 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3976 int (*do_msr)(struct kvm_vcpu *vcpu,
3977 unsigned index, u64 *data),
3980 struct kvm_msrs msrs;
3981 struct kvm_msr_entry *entries;
3986 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3990 if (msrs.nmsrs >= MAX_IO_MSRS)
3993 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3994 entries = memdup_user(user_msrs->entries, size);
3995 if (IS_ERR(entries)) {
3996 r = PTR_ERR(entries);
4000 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4005 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4016 static inline bool kvm_can_mwait_in_guest(void)
4018 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4019 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4020 boot_cpu_has(X86_FEATURE_ARAT);
4023 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4024 struct kvm_cpuid2 __user *cpuid_arg)
4026 struct kvm_cpuid2 cpuid;
4030 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4033 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4038 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4044 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4049 case KVM_CAP_IRQCHIP:
4051 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4052 case KVM_CAP_SET_TSS_ADDR:
4053 case KVM_CAP_EXT_CPUID:
4054 case KVM_CAP_EXT_EMUL_CPUID:
4055 case KVM_CAP_CLOCKSOURCE:
4057 case KVM_CAP_NOP_IO_DELAY:
4058 case KVM_CAP_MP_STATE:
4059 case KVM_CAP_SYNC_MMU:
4060 case KVM_CAP_USER_NMI:
4061 case KVM_CAP_REINJECT_CONTROL:
4062 case KVM_CAP_IRQ_INJECT_STATUS:
4063 case KVM_CAP_IOEVENTFD:
4064 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4066 case KVM_CAP_PIT_STATE2:
4067 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4068 case KVM_CAP_VCPU_EVENTS:
4069 case KVM_CAP_HYPERV:
4070 case KVM_CAP_HYPERV_VAPIC:
4071 case KVM_CAP_HYPERV_SPIN:
4072 case KVM_CAP_HYPERV_SYNIC:
4073 case KVM_CAP_HYPERV_SYNIC2:
4074 case KVM_CAP_HYPERV_VP_INDEX:
4075 case KVM_CAP_HYPERV_EVENTFD:
4076 case KVM_CAP_HYPERV_TLBFLUSH:
4077 case KVM_CAP_HYPERV_SEND_IPI:
4078 case KVM_CAP_HYPERV_CPUID:
4079 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4080 case KVM_CAP_SYS_HYPERV_CPUID:
4081 case KVM_CAP_PCI_SEGMENT:
4082 case KVM_CAP_DEBUGREGS:
4083 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4085 case KVM_CAP_ASYNC_PF:
4086 case KVM_CAP_ASYNC_PF_INT:
4087 case KVM_CAP_GET_TSC_KHZ:
4088 case KVM_CAP_KVMCLOCK_CTRL:
4089 case KVM_CAP_READONLY_MEM:
4090 case KVM_CAP_HYPERV_TIME:
4091 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4092 case KVM_CAP_TSC_DEADLINE_TIMER:
4093 case KVM_CAP_DISABLE_QUIRKS:
4094 case KVM_CAP_SET_BOOT_CPU_ID:
4095 case KVM_CAP_SPLIT_IRQCHIP:
4096 case KVM_CAP_IMMEDIATE_EXIT:
4097 case KVM_CAP_PMU_EVENT_FILTER:
4098 case KVM_CAP_GET_MSR_FEATURES:
4099 case KVM_CAP_MSR_PLATFORM_INFO:
4100 case KVM_CAP_EXCEPTION_PAYLOAD:
4101 case KVM_CAP_SET_GUEST_DEBUG:
4102 case KVM_CAP_LAST_CPU:
4103 case KVM_CAP_X86_USER_SPACE_MSR:
4104 case KVM_CAP_X86_MSR_FILTER:
4105 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4106 #ifdef CONFIG_X86_SGX_KVM
4107 case KVM_CAP_SGX_ATTRIBUTE:
4109 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4110 case KVM_CAP_SREGS2:
4111 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4114 case KVM_CAP_EXIT_HYPERCALL:
4115 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4117 case KVM_CAP_SET_GUEST_DEBUG2:
4118 return KVM_GUESTDBG_VALID_MASK;
4119 #ifdef CONFIG_KVM_XEN
4120 case KVM_CAP_XEN_HVM:
4121 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4122 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4123 KVM_XEN_HVM_CONFIG_SHARED_INFO;
4124 if (sched_info_on())
4125 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4128 case KVM_CAP_SYNC_REGS:
4129 r = KVM_SYNC_X86_VALID_FIELDS;
4131 case KVM_CAP_ADJUST_CLOCK:
4132 r = KVM_CLOCK_TSC_STABLE;
4134 case KVM_CAP_X86_DISABLE_EXITS:
4135 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4136 KVM_X86_DISABLE_EXITS_CSTATE;
4137 if(kvm_can_mwait_in_guest())
4138 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4140 case KVM_CAP_X86_SMM:
4141 /* SMBASE is usually relocated above 1M on modern chipsets,
4142 * and SMM handlers might indeed rely on 4G segment limits,
4143 * so do not report SMM to be available if real mode is
4144 * emulated via vm86 mode. Still, do not go to great lengths
4145 * to avoid userspace's usage of the feature, because it is a
4146 * fringe case that is not enabled except via specific settings
4147 * of the module parameters.
4149 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4152 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4154 case KVM_CAP_NR_VCPUS:
4155 r = KVM_SOFT_MAX_VCPUS;
4157 case KVM_CAP_MAX_VCPUS:
4160 case KVM_CAP_MAX_VCPU_ID:
4161 r = KVM_MAX_VCPU_ID;
4163 case KVM_CAP_PV_MMU: /* obsolete */
4167 r = KVM_MAX_MCE_BANKS;
4170 r = boot_cpu_has(X86_FEATURE_XSAVE);
4172 case KVM_CAP_TSC_CONTROL:
4173 r = kvm_has_tsc_control;
4175 case KVM_CAP_X2APIC_API:
4176 r = KVM_X2APIC_API_VALID_FLAGS;
4178 case KVM_CAP_NESTED_STATE:
4179 r = kvm_x86_ops.nested_ops->get_state ?
4180 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4182 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4183 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4185 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4186 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4188 case KVM_CAP_SMALLER_MAXPHYADDR:
4189 r = (int) allow_smaller_maxphyaddr;
4191 case KVM_CAP_STEAL_TIME:
4192 r = sched_info_on();
4194 case KVM_CAP_X86_BUS_LOCK_EXIT:
4195 if (kvm_has_bus_lock_exit)
4196 r = KVM_BUS_LOCK_DETECTION_OFF |
4197 KVM_BUS_LOCK_DETECTION_EXIT;
4208 long kvm_arch_dev_ioctl(struct file *filp,
4209 unsigned int ioctl, unsigned long arg)
4211 void __user *argp = (void __user *)arg;
4215 case KVM_GET_MSR_INDEX_LIST: {
4216 struct kvm_msr_list __user *user_msr_list = argp;
4217 struct kvm_msr_list msr_list;
4221 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4224 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4225 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4228 if (n < msr_list.nmsrs)
4231 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4232 num_msrs_to_save * sizeof(u32)))
4234 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4236 num_emulated_msrs * sizeof(u32)))
4241 case KVM_GET_SUPPORTED_CPUID:
4242 case KVM_GET_EMULATED_CPUID: {
4243 struct kvm_cpuid2 __user *cpuid_arg = argp;
4244 struct kvm_cpuid2 cpuid;
4247 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4250 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4256 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4261 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4263 if (copy_to_user(argp, &kvm_mce_cap_supported,
4264 sizeof(kvm_mce_cap_supported)))
4268 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4269 struct kvm_msr_list __user *user_msr_list = argp;
4270 struct kvm_msr_list msr_list;
4274 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4277 msr_list.nmsrs = num_msr_based_features;
4278 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4281 if (n < msr_list.nmsrs)
4284 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4285 num_msr_based_features * sizeof(u32)))
4291 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4293 case KVM_GET_SUPPORTED_HV_CPUID:
4294 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4304 static void wbinvd_ipi(void *garbage)
4309 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4311 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4314 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4316 /* Address WBINVD may be executed by guest */
4317 if (need_emulate_wbinvd(vcpu)) {
4318 if (static_call(kvm_x86_has_wbinvd_exit)())
4319 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4320 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4321 smp_call_function_single(vcpu->cpu,
4322 wbinvd_ipi, NULL, 1);
4325 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4327 /* Save host pkru register if supported */
4328 vcpu->arch.host_pkru = read_pkru();
4330 /* Apply any externally detected TSC adjustments (due to suspend) */
4331 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4332 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4333 vcpu->arch.tsc_offset_adjustment = 0;
4334 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4337 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4338 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4339 rdtsc() - vcpu->arch.last_host_tsc;
4341 mark_tsc_unstable("KVM discovered backwards TSC");
4343 if (kvm_check_tsc_unstable()) {
4344 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4345 vcpu->arch.last_guest_tsc);
4346 kvm_vcpu_write_tsc_offset(vcpu, offset);
4347 vcpu->arch.tsc_catchup = 1;
4350 if (kvm_lapic_hv_timer_in_use(vcpu))
4351 kvm_lapic_restart_hv_timer(vcpu);
4354 * On a host with synchronized TSC, there is no need to update
4355 * kvmclock on vcpu->cpu migration
4357 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4358 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4359 if (vcpu->cpu != cpu)
4360 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4364 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4367 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4369 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4370 struct kvm_steal_time __user *st;
4371 struct kvm_memslots *slots;
4372 static const u8 preempted = KVM_VCPU_PREEMPTED;
4374 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4377 if (vcpu->arch.st.preempted)
4380 /* This happens on process exit */
4381 if (unlikely(current->mm != vcpu->kvm->mm))
4384 slots = kvm_memslots(vcpu->kvm);
4386 if (unlikely(slots->generation != ghc->generation ||
4387 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4390 st = (struct kvm_steal_time __user *)ghc->hva;
4391 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4393 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4394 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4396 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4399 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4403 if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4404 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4407 * Take the srcu lock as memslots will be accessed to check the gfn
4408 * cache generation against the memslots generation.
4410 idx = srcu_read_lock(&vcpu->kvm->srcu);
4411 if (kvm_xen_msr_enabled(vcpu->kvm))
4412 kvm_xen_runstate_set_preempted(vcpu);
4414 kvm_steal_time_set_preempted(vcpu);
4415 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4417 static_call(kvm_x86_vcpu_put)(vcpu);
4418 vcpu->arch.last_host_tsc = rdtsc();
4421 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4422 struct kvm_lapic_state *s)
4424 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4426 return kvm_apic_get_state(vcpu, s);
4429 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4430 struct kvm_lapic_state *s)
4434 r = kvm_apic_set_state(vcpu, s);
4437 update_cr8_intercept(vcpu);
4442 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4445 * We can accept userspace's request for interrupt injection
4446 * as long as we have a place to store the interrupt number.
4447 * The actual injection will happen when the CPU is able to
4448 * deliver the interrupt.
4450 if (kvm_cpu_has_extint(vcpu))
4453 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4454 return (!lapic_in_kernel(vcpu) ||
4455 kvm_apic_accept_pic_intr(vcpu));
4458 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4461 * Do not cause an interrupt window exit if an exception
4462 * is pending or an event needs reinjection; userspace
4463 * might want to inject the interrupt manually using KVM_SET_REGS
4464 * or KVM_SET_SREGS. For that to work, we must be at an
4465 * instruction boundary and with no events half-injected.
4467 return (kvm_arch_interrupt_allowed(vcpu) &&
4468 kvm_cpu_accept_dm_intr(vcpu) &&
4469 !kvm_event_needs_reinjection(vcpu) &&
4470 !vcpu->arch.exception.pending);
4473 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4474 struct kvm_interrupt *irq)
4476 if (irq->irq >= KVM_NR_INTERRUPTS)
4479 if (!irqchip_in_kernel(vcpu->kvm)) {
4480 kvm_queue_interrupt(vcpu, irq->irq, false);
4481 kvm_make_request(KVM_REQ_EVENT, vcpu);
4486 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4487 * fail for in-kernel 8259.
4489 if (pic_in_kernel(vcpu->kvm))
4492 if (vcpu->arch.pending_external_vector != -1)
4495 vcpu->arch.pending_external_vector = irq->irq;
4496 kvm_make_request(KVM_REQ_EVENT, vcpu);
4500 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4502 kvm_inject_nmi(vcpu);
4507 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4509 kvm_make_request(KVM_REQ_SMI, vcpu);
4514 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4515 struct kvm_tpr_access_ctl *tac)
4519 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4523 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4527 unsigned bank_num = mcg_cap & 0xff, bank;
4530 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4532 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4535 vcpu->arch.mcg_cap = mcg_cap;
4536 /* Init IA32_MCG_CTL to all 1s */
4537 if (mcg_cap & MCG_CTL_P)
4538 vcpu->arch.mcg_ctl = ~(u64)0;
4539 /* Init IA32_MCi_CTL to all 1s */
4540 for (bank = 0; bank < bank_num; bank++)
4541 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4543 static_call(kvm_x86_setup_mce)(vcpu);
4548 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4549 struct kvm_x86_mce *mce)
4551 u64 mcg_cap = vcpu->arch.mcg_cap;
4552 unsigned bank_num = mcg_cap & 0xff;
4553 u64 *banks = vcpu->arch.mce_banks;
4555 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4558 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4559 * reporting is disabled
4561 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4562 vcpu->arch.mcg_ctl != ~(u64)0)
4564 banks += 4 * mce->bank;
4566 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4567 * reporting is disabled for the bank
4569 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4571 if (mce->status & MCI_STATUS_UC) {
4572 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4573 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4574 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4577 if (banks[1] & MCI_STATUS_VAL)
4578 mce->status |= MCI_STATUS_OVER;
4579 banks[2] = mce->addr;
4580 banks[3] = mce->misc;
4581 vcpu->arch.mcg_status = mce->mcg_status;
4582 banks[1] = mce->status;
4583 kvm_queue_exception(vcpu, MC_VECTOR);
4584 } else if (!(banks[1] & MCI_STATUS_VAL)
4585 || !(banks[1] & MCI_STATUS_UC)) {
4586 if (banks[1] & MCI_STATUS_VAL)
4587 mce->status |= MCI_STATUS_OVER;
4588 banks[2] = mce->addr;
4589 banks[3] = mce->misc;
4590 banks[1] = mce->status;
4592 banks[1] |= MCI_STATUS_OVER;
4596 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4597 struct kvm_vcpu_events *events)
4601 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4605 * In guest mode, payload delivery should be deferred,
4606 * so that the L1 hypervisor can intercept #PF before
4607 * CR2 is modified (or intercept #DB before DR6 is
4608 * modified under nVMX). Unless the per-VM capability,
4609 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4610 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4611 * opportunistically defer the exception payload, deliver it if the
4612 * capability hasn't been requested before processing a
4613 * KVM_GET_VCPU_EVENTS.
4615 if (!vcpu->kvm->arch.exception_payload_enabled &&
4616 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4617 kvm_deliver_exception_payload(vcpu);
4620 * The API doesn't provide the instruction length for software
4621 * exceptions, so don't report them. As long as the guest RIP
4622 * isn't advanced, we should expect to encounter the exception
4625 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4626 events->exception.injected = 0;
4627 events->exception.pending = 0;
4629 events->exception.injected = vcpu->arch.exception.injected;
4630 events->exception.pending = vcpu->arch.exception.pending;
4632 * For ABI compatibility, deliberately conflate
4633 * pending and injected exceptions when
4634 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4636 if (!vcpu->kvm->arch.exception_payload_enabled)
4637 events->exception.injected |=
4638 vcpu->arch.exception.pending;
4640 events->exception.nr = vcpu->arch.exception.nr;
4641 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4642 events->exception.error_code = vcpu->arch.exception.error_code;
4643 events->exception_has_payload = vcpu->arch.exception.has_payload;
4644 events->exception_payload = vcpu->arch.exception.payload;
4646 events->interrupt.injected =
4647 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4648 events->interrupt.nr = vcpu->arch.interrupt.nr;
4649 events->interrupt.soft = 0;
4650 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4652 events->nmi.injected = vcpu->arch.nmi_injected;
4653 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4654 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4655 events->nmi.pad = 0;
4657 events->sipi_vector = 0; /* never valid when reporting to user space */
4659 events->smi.smm = is_smm(vcpu);
4660 events->smi.pending = vcpu->arch.smi_pending;
4661 events->smi.smm_inside_nmi =
4662 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4663 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4665 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4666 | KVM_VCPUEVENT_VALID_SHADOW
4667 | KVM_VCPUEVENT_VALID_SMM);
4668 if (vcpu->kvm->arch.exception_payload_enabled)
4669 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4671 memset(&events->reserved, 0, sizeof(events->reserved));
4674 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4676 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4677 struct kvm_vcpu_events *events)
4679 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4680 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4681 | KVM_VCPUEVENT_VALID_SHADOW
4682 | KVM_VCPUEVENT_VALID_SMM
4683 | KVM_VCPUEVENT_VALID_PAYLOAD))
4686 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4687 if (!vcpu->kvm->arch.exception_payload_enabled)
4689 if (events->exception.pending)
4690 events->exception.injected = 0;
4692 events->exception_has_payload = 0;
4694 events->exception.pending = 0;
4695 events->exception_has_payload = 0;
4698 if ((events->exception.injected || events->exception.pending) &&
4699 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4702 /* INITs are latched while in SMM */
4703 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4704 (events->smi.smm || events->smi.pending) &&
4705 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4709 vcpu->arch.exception.injected = events->exception.injected;
4710 vcpu->arch.exception.pending = events->exception.pending;
4711 vcpu->arch.exception.nr = events->exception.nr;
4712 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4713 vcpu->arch.exception.error_code = events->exception.error_code;
4714 vcpu->arch.exception.has_payload = events->exception_has_payload;
4715 vcpu->arch.exception.payload = events->exception_payload;
4717 vcpu->arch.interrupt.injected = events->interrupt.injected;
4718 vcpu->arch.interrupt.nr = events->interrupt.nr;
4719 vcpu->arch.interrupt.soft = events->interrupt.soft;
4720 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4721 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4722 events->interrupt.shadow);
4724 vcpu->arch.nmi_injected = events->nmi.injected;
4725 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4726 vcpu->arch.nmi_pending = events->nmi.pending;
4727 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4729 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4730 lapic_in_kernel(vcpu))
4731 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4733 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4734 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4735 kvm_x86_ops.nested_ops->leave_nested(vcpu);
4736 kvm_smm_changed(vcpu, events->smi.smm);
4739 vcpu->arch.smi_pending = events->smi.pending;
4741 if (events->smi.smm) {
4742 if (events->smi.smm_inside_nmi)
4743 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4745 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4748 if (lapic_in_kernel(vcpu)) {
4749 if (events->smi.latched_init)
4750 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4752 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4756 kvm_make_request(KVM_REQ_EVENT, vcpu);
4761 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4762 struct kvm_debugregs *dbgregs)
4766 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4767 kvm_get_dr(vcpu, 6, &val);
4769 dbgregs->dr7 = vcpu->arch.dr7;
4771 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4774 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4775 struct kvm_debugregs *dbgregs)
4780 if (!kvm_dr6_valid(dbgregs->dr6))
4782 if (!kvm_dr7_valid(dbgregs->dr7))
4785 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4786 kvm_update_dr0123(vcpu);
4787 vcpu->arch.dr6 = dbgregs->dr6;
4788 vcpu->arch.dr7 = dbgregs->dr7;
4789 kvm_update_dr7(vcpu);
4794 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4796 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4798 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4799 u64 xstate_bv = xsave->header.xfeatures;
4803 * Copy legacy XSAVE area, to avoid complications with CPUID
4804 * leaves 0 and 1 in the loop below.
4806 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4809 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4810 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4813 * Copy each region from the possibly compacted offset to the
4814 * non-compacted offset.
4816 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4818 u32 size, offset, ecx, edx;
4819 u64 xfeature_mask = valid & -valid;
4820 int xfeature_nr = fls64(xfeature_mask) - 1;
4823 cpuid_count(XSTATE_CPUID, xfeature_nr,
4824 &size, &offset, &ecx, &edx);
4826 if (xfeature_nr == XFEATURE_PKRU) {
4827 memcpy(dest + offset, &vcpu->arch.pkru,
4828 sizeof(vcpu->arch.pkru));
4830 src = get_xsave_addr(xsave, xfeature_nr);
4832 memcpy(dest + offset, src, size);
4835 valid -= xfeature_mask;
4839 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4841 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4842 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4846 * Copy legacy XSAVE area, to avoid complications with CPUID
4847 * leaves 0 and 1 in the loop below.
4849 memcpy(xsave, src, XSAVE_HDR_OFFSET);
4851 /* Set XSTATE_BV and possibly XCOMP_BV. */
4852 xsave->header.xfeatures = xstate_bv;
4853 if (boot_cpu_has(X86_FEATURE_XSAVES))
4854 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4857 * Copy each region from the non-compacted offset to the
4858 * possibly compacted offset.
4860 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4862 u32 size, offset, ecx, edx;
4863 u64 xfeature_mask = valid & -valid;
4864 int xfeature_nr = fls64(xfeature_mask) - 1;
4866 cpuid_count(XSTATE_CPUID, xfeature_nr,
4867 &size, &offset, &ecx, &edx);
4869 if (xfeature_nr == XFEATURE_PKRU) {
4870 memcpy(&vcpu->arch.pkru, src + offset,
4871 sizeof(vcpu->arch.pkru));
4873 void *dest = get_xsave_addr(xsave, xfeature_nr);
4876 memcpy(dest, src + offset, size);
4879 valid -= xfeature_mask;
4883 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4884 struct kvm_xsave *guest_xsave)
4886 if (!vcpu->arch.guest_fpu)
4889 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4890 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4891 fill_xsave((u8 *) guest_xsave->region, vcpu);
4893 memcpy(guest_xsave->region,
4894 &vcpu->arch.guest_fpu->state.fxsave,
4895 sizeof(struct fxregs_state));
4896 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4897 XFEATURE_MASK_FPSSE;
4901 #define XSAVE_MXCSR_OFFSET 24
4903 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4904 struct kvm_xsave *guest_xsave)
4909 if (!vcpu->arch.guest_fpu)
4912 xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4913 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4915 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4917 * Here we allow setting states that are not present in
4918 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4919 * with old userspace.
4921 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4923 load_xsave(vcpu, (u8 *)guest_xsave->region);
4925 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4926 mxcsr & ~mxcsr_feature_mask)
4928 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4929 guest_xsave->region, sizeof(struct fxregs_state));
4934 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4935 struct kvm_xcrs *guest_xcrs)
4937 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4938 guest_xcrs->nr_xcrs = 0;
4942 guest_xcrs->nr_xcrs = 1;
4943 guest_xcrs->flags = 0;
4944 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4945 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4948 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4949 struct kvm_xcrs *guest_xcrs)
4953 if (!boot_cpu_has(X86_FEATURE_XSAVE))
4956 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4959 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4960 /* Only support XCR0 currently */
4961 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4962 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4963 guest_xcrs->xcrs[i].value);
4972 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4973 * stopped by the hypervisor. This function will be called from the host only.
4974 * EINVAL is returned when the host attempts to set the flag for a guest that
4975 * does not support pv clocks.
4977 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4979 if (!vcpu->arch.pv_time_enabled)
4981 vcpu->arch.pvclock_set_guest_stopped_request = true;
4982 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4986 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4987 struct kvm_enable_cap *cap)
4990 uint16_t vmcs_version;
4991 void __user *user_ptr;
4997 case KVM_CAP_HYPERV_SYNIC2:
5002 case KVM_CAP_HYPERV_SYNIC:
5003 if (!irqchip_in_kernel(vcpu->kvm))
5005 return kvm_hv_activate_synic(vcpu, cap->cap ==
5006 KVM_CAP_HYPERV_SYNIC2);
5007 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5008 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5010 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5012 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5013 if (copy_to_user(user_ptr, &vmcs_version,
5014 sizeof(vmcs_version)))
5018 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5019 if (!kvm_x86_ops.enable_direct_tlbflush)
5022 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5024 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5025 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5027 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5028 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5029 if (vcpu->arch.pv_cpuid.enforce)
5030 kvm_update_pv_runtime(vcpu);
5038 long kvm_arch_vcpu_ioctl(struct file *filp,
5039 unsigned int ioctl, unsigned long arg)
5041 struct kvm_vcpu *vcpu = filp->private_data;
5042 void __user *argp = (void __user *)arg;
5045 struct kvm_sregs2 *sregs2;
5046 struct kvm_lapic_state *lapic;
5047 struct kvm_xsave *xsave;
5048 struct kvm_xcrs *xcrs;
5056 case KVM_GET_LAPIC: {
5058 if (!lapic_in_kernel(vcpu))
5060 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5061 GFP_KERNEL_ACCOUNT);
5066 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5070 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5075 case KVM_SET_LAPIC: {
5077 if (!lapic_in_kernel(vcpu))
5079 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5080 if (IS_ERR(u.lapic)) {
5081 r = PTR_ERR(u.lapic);
5085 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5088 case KVM_INTERRUPT: {
5089 struct kvm_interrupt irq;
5092 if (copy_from_user(&irq, argp, sizeof(irq)))
5094 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5098 r = kvm_vcpu_ioctl_nmi(vcpu);
5102 r = kvm_vcpu_ioctl_smi(vcpu);
5105 case KVM_SET_CPUID: {
5106 struct kvm_cpuid __user *cpuid_arg = argp;
5107 struct kvm_cpuid cpuid;
5110 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5112 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5115 case KVM_SET_CPUID2: {
5116 struct kvm_cpuid2 __user *cpuid_arg = argp;
5117 struct kvm_cpuid2 cpuid;
5120 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5122 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5123 cpuid_arg->entries);
5126 case KVM_GET_CPUID2: {
5127 struct kvm_cpuid2 __user *cpuid_arg = argp;
5128 struct kvm_cpuid2 cpuid;
5131 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5133 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5134 cpuid_arg->entries);
5138 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5143 case KVM_GET_MSRS: {
5144 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5145 r = msr_io(vcpu, argp, do_get_msr, 1);
5146 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5149 case KVM_SET_MSRS: {
5150 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5151 r = msr_io(vcpu, argp, do_set_msr, 0);
5152 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5155 case KVM_TPR_ACCESS_REPORTING: {
5156 struct kvm_tpr_access_ctl tac;
5159 if (copy_from_user(&tac, argp, sizeof(tac)))
5161 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5165 if (copy_to_user(argp, &tac, sizeof(tac)))
5170 case KVM_SET_VAPIC_ADDR: {
5171 struct kvm_vapic_addr va;
5175 if (!lapic_in_kernel(vcpu))
5178 if (copy_from_user(&va, argp, sizeof(va)))
5180 idx = srcu_read_lock(&vcpu->kvm->srcu);
5181 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5182 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5185 case KVM_X86_SETUP_MCE: {
5189 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5191 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5194 case KVM_X86_SET_MCE: {
5195 struct kvm_x86_mce mce;
5198 if (copy_from_user(&mce, argp, sizeof(mce)))
5200 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5203 case KVM_GET_VCPU_EVENTS: {
5204 struct kvm_vcpu_events events;
5206 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5209 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5214 case KVM_SET_VCPU_EVENTS: {
5215 struct kvm_vcpu_events events;
5218 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5221 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5224 case KVM_GET_DEBUGREGS: {
5225 struct kvm_debugregs dbgregs;
5227 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5230 if (copy_to_user(argp, &dbgregs,
5231 sizeof(struct kvm_debugregs)))
5236 case KVM_SET_DEBUGREGS: {
5237 struct kvm_debugregs dbgregs;
5240 if (copy_from_user(&dbgregs, argp,
5241 sizeof(struct kvm_debugregs)))
5244 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5247 case KVM_GET_XSAVE: {
5248 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5253 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5256 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5261 case KVM_SET_XSAVE: {
5262 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5263 if (IS_ERR(u.xsave)) {
5264 r = PTR_ERR(u.xsave);
5268 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5271 case KVM_GET_XCRS: {
5272 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5277 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5280 if (copy_to_user(argp, u.xcrs,
5281 sizeof(struct kvm_xcrs)))
5286 case KVM_SET_XCRS: {
5287 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5288 if (IS_ERR(u.xcrs)) {
5289 r = PTR_ERR(u.xcrs);
5293 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5296 case KVM_SET_TSC_KHZ: {
5300 user_tsc_khz = (u32)arg;
5302 if (kvm_has_tsc_control &&
5303 user_tsc_khz >= kvm_max_guest_tsc_khz)
5306 if (user_tsc_khz == 0)
5307 user_tsc_khz = tsc_khz;
5309 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5314 case KVM_GET_TSC_KHZ: {
5315 r = vcpu->arch.virtual_tsc_khz;
5318 case KVM_KVMCLOCK_CTRL: {
5319 r = kvm_set_guest_paused(vcpu);
5322 case KVM_ENABLE_CAP: {
5323 struct kvm_enable_cap cap;
5326 if (copy_from_user(&cap, argp, sizeof(cap)))
5328 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5331 case KVM_GET_NESTED_STATE: {
5332 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5336 if (!kvm_x86_ops.nested_ops->get_state)
5339 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5341 if (get_user(user_data_size, &user_kvm_nested_state->size))
5344 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5349 if (r > user_data_size) {
5350 if (put_user(r, &user_kvm_nested_state->size))
5360 case KVM_SET_NESTED_STATE: {
5361 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5362 struct kvm_nested_state kvm_state;
5366 if (!kvm_x86_ops.nested_ops->set_state)
5370 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5374 if (kvm_state.size < sizeof(kvm_state))
5377 if (kvm_state.flags &
5378 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5379 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5380 | KVM_STATE_NESTED_GIF_SET))
5383 /* nested_run_pending implies guest_mode. */
5384 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5385 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5388 idx = srcu_read_lock(&vcpu->kvm->srcu);
5389 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5390 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5393 case KVM_GET_SUPPORTED_HV_CPUID:
5394 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5396 #ifdef CONFIG_KVM_XEN
5397 case KVM_XEN_VCPU_GET_ATTR: {
5398 struct kvm_xen_vcpu_attr xva;
5401 if (copy_from_user(&xva, argp, sizeof(xva)))
5403 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5404 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5408 case KVM_XEN_VCPU_SET_ATTR: {
5409 struct kvm_xen_vcpu_attr xva;
5412 if (copy_from_user(&xva, argp, sizeof(xva)))
5414 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5418 case KVM_GET_SREGS2: {
5419 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5423 __get_sregs2(vcpu, u.sregs2);
5425 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5430 case KVM_SET_SREGS2: {
5431 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5432 if (IS_ERR(u.sregs2)) {
5433 r = PTR_ERR(u.sregs2);
5437 r = __set_sregs2(vcpu, u.sregs2);
5450 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5452 return VM_FAULT_SIGBUS;
5455 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5459 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5461 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5465 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5468 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5471 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5472 unsigned long kvm_nr_mmu_pages)
5474 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5477 mutex_lock(&kvm->slots_lock);
5479 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5480 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5482 mutex_unlock(&kvm->slots_lock);
5486 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5488 return kvm->arch.n_max_mmu_pages;
5491 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5493 struct kvm_pic *pic = kvm->arch.vpic;
5497 switch (chip->chip_id) {
5498 case KVM_IRQCHIP_PIC_MASTER:
5499 memcpy(&chip->chip.pic, &pic->pics[0],
5500 sizeof(struct kvm_pic_state));
5502 case KVM_IRQCHIP_PIC_SLAVE:
5503 memcpy(&chip->chip.pic, &pic->pics[1],
5504 sizeof(struct kvm_pic_state));
5506 case KVM_IRQCHIP_IOAPIC:
5507 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5516 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5518 struct kvm_pic *pic = kvm->arch.vpic;
5522 switch (chip->chip_id) {
5523 case KVM_IRQCHIP_PIC_MASTER:
5524 spin_lock(&pic->lock);
5525 memcpy(&pic->pics[0], &chip->chip.pic,
5526 sizeof(struct kvm_pic_state));
5527 spin_unlock(&pic->lock);
5529 case KVM_IRQCHIP_PIC_SLAVE:
5530 spin_lock(&pic->lock);
5531 memcpy(&pic->pics[1], &chip->chip.pic,
5532 sizeof(struct kvm_pic_state));
5533 spin_unlock(&pic->lock);
5535 case KVM_IRQCHIP_IOAPIC:
5536 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5542 kvm_pic_update_irq(pic);
5546 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5548 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5550 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5552 mutex_lock(&kps->lock);
5553 memcpy(ps, &kps->channels, sizeof(*ps));
5554 mutex_unlock(&kps->lock);
5558 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5561 struct kvm_pit *pit = kvm->arch.vpit;
5563 mutex_lock(&pit->pit_state.lock);
5564 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5565 for (i = 0; i < 3; i++)
5566 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5567 mutex_unlock(&pit->pit_state.lock);
5571 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5573 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5574 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5575 sizeof(ps->channels));
5576 ps->flags = kvm->arch.vpit->pit_state.flags;
5577 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5578 memset(&ps->reserved, 0, sizeof(ps->reserved));
5582 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5586 u32 prev_legacy, cur_legacy;
5587 struct kvm_pit *pit = kvm->arch.vpit;
5589 mutex_lock(&pit->pit_state.lock);
5590 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5591 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5592 if (!prev_legacy && cur_legacy)
5594 memcpy(&pit->pit_state.channels, &ps->channels,
5595 sizeof(pit->pit_state.channels));
5596 pit->pit_state.flags = ps->flags;
5597 for (i = 0; i < 3; i++)
5598 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5600 mutex_unlock(&pit->pit_state.lock);
5604 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5605 struct kvm_reinject_control *control)
5607 struct kvm_pit *pit = kvm->arch.vpit;
5609 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5610 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5611 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5613 mutex_lock(&pit->pit_state.lock);
5614 kvm_pit_set_reinject(pit, control->pit_reinject);
5615 mutex_unlock(&pit->pit_state.lock);
5620 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5624 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5625 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5626 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5629 struct kvm_vcpu *vcpu;
5632 kvm_for_each_vcpu(i, vcpu, kvm)
5633 kvm_vcpu_kick(vcpu);
5636 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5639 if (!irqchip_in_kernel(kvm))
5642 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5643 irq_event->irq, irq_event->level,
5648 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5649 struct kvm_enable_cap *cap)
5657 case KVM_CAP_DISABLE_QUIRKS:
5658 kvm->arch.disabled_quirks = cap->args[0];
5661 case KVM_CAP_SPLIT_IRQCHIP: {
5662 mutex_lock(&kvm->lock);
5664 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5665 goto split_irqchip_unlock;
5667 if (irqchip_in_kernel(kvm))
5668 goto split_irqchip_unlock;
5669 if (kvm->created_vcpus)
5670 goto split_irqchip_unlock;
5671 r = kvm_setup_empty_irq_routing(kvm);
5673 goto split_irqchip_unlock;
5674 /* Pairs with irqchip_in_kernel. */
5676 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5677 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5679 split_irqchip_unlock:
5680 mutex_unlock(&kvm->lock);
5683 case KVM_CAP_X2APIC_API:
5685 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5688 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5689 kvm->arch.x2apic_format = true;
5690 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5691 kvm->arch.x2apic_broadcast_quirk_disabled = true;
5695 case KVM_CAP_X86_DISABLE_EXITS:
5697 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5700 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5701 kvm_can_mwait_in_guest())
5702 kvm->arch.mwait_in_guest = true;
5703 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5704 kvm->arch.hlt_in_guest = true;
5705 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5706 kvm->arch.pause_in_guest = true;
5707 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5708 kvm->arch.cstate_in_guest = true;
5711 case KVM_CAP_MSR_PLATFORM_INFO:
5712 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5715 case KVM_CAP_EXCEPTION_PAYLOAD:
5716 kvm->arch.exception_payload_enabled = cap->args[0];
5719 case KVM_CAP_X86_USER_SPACE_MSR:
5720 kvm->arch.user_space_msr_mask = cap->args[0];
5723 case KVM_CAP_X86_BUS_LOCK_EXIT:
5725 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5728 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5729 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5732 if (kvm_has_bus_lock_exit &&
5733 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5734 kvm->arch.bus_lock_detection_enabled = true;
5737 #ifdef CONFIG_X86_SGX_KVM
5738 case KVM_CAP_SGX_ATTRIBUTE: {
5739 unsigned long allowed_attributes = 0;
5741 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5745 /* KVM only supports the PROVISIONKEY privileged attribute. */
5746 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5747 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5748 kvm->arch.sgx_provisioning_allowed = true;
5754 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5756 if (kvm_x86_ops.vm_copy_enc_context_from)
5757 r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5759 case KVM_CAP_EXIT_HYPERCALL:
5760 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5764 kvm->arch.hypercall_exit_enabled = cap->args[0];
5767 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5769 if (cap->args[0] & ~1)
5771 kvm->arch.exit_on_emulation_error = cap->args[0];
5781 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5783 struct kvm_x86_msr_filter *msr_filter;
5785 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5789 msr_filter->default_allow = default_allow;
5793 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5800 for (i = 0; i < msr_filter->count; i++)
5801 kfree(msr_filter->ranges[i].bitmap);
5806 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5807 struct kvm_msr_filter_range *user_range)
5809 unsigned long *bitmap = NULL;
5812 if (!user_range->nmsrs)
5815 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5818 if (!user_range->flags)
5821 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5822 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5825 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5827 return PTR_ERR(bitmap);
5829 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5830 .flags = user_range->flags,
5831 .base = user_range->base,
5832 .nmsrs = user_range->nmsrs,
5836 msr_filter->count++;
5840 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5842 struct kvm_msr_filter __user *user_msr_filter = argp;
5843 struct kvm_x86_msr_filter *new_filter, *old_filter;
5844 struct kvm_msr_filter filter;
5850 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5853 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5854 empty &= !filter.ranges[i].nmsrs;
5856 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5857 if (empty && !default_allow)
5860 new_filter = kvm_alloc_msr_filter(default_allow);
5864 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5865 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5867 kvm_free_msr_filter(new_filter);
5872 mutex_lock(&kvm->lock);
5874 /* The per-VM filter is protected by kvm->lock... */
5875 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5877 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5878 synchronize_srcu(&kvm->srcu);
5880 kvm_free_msr_filter(old_filter);
5882 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5883 mutex_unlock(&kvm->lock);
5888 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5889 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5891 struct kvm_vcpu *vcpu;
5894 mutex_lock(&kvm->lock);
5895 kvm_for_each_vcpu(i, vcpu, kvm) {
5896 if (!vcpu->arch.pv_time_enabled)
5899 ret = kvm_set_guest_paused(vcpu);
5901 kvm_err("Failed to pause guest VCPU%d: %d\n",
5902 vcpu->vcpu_id, ret);
5906 mutex_unlock(&kvm->lock);
5908 return ret ? NOTIFY_BAD : NOTIFY_DONE;
5911 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5914 case PM_HIBERNATION_PREPARE:
5915 case PM_SUSPEND_PREPARE:
5916 return kvm_arch_suspend_notifier(kvm);
5921 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5923 long kvm_arch_vm_ioctl(struct file *filp,
5924 unsigned int ioctl, unsigned long arg)
5926 struct kvm *kvm = filp->private_data;
5927 void __user *argp = (void __user *)arg;
5930 * This union makes it completely explicit to gcc-3.x
5931 * that these two variables' stack usage should be
5932 * combined, not added together.
5935 struct kvm_pit_state ps;
5936 struct kvm_pit_state2 ps2;
5937 struct kvm_pit_config pit_config;
5941 case KVM_SET_TSS_ADDR:
5942 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5944 case KVM_SET_IDENTITY_MAP_ADDR: {
5947 mutex_lock(&kvm->lock);
5949 if (kvm->created_vcpus)
5950 goto set_identity_unlock;
5952 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5953 goto set_identity_unlock;
5954 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5955 set_identity_unlock:
5956 mutex_unlock(&kvm->lock);
5959 case KVM_SET_NR_MMU_PAGES:
5960 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5962 case KVM_GET_NR_MMU_PAGES:
5963 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5965 case KVM_CREATE_IRQCHIP: {
5966 mutex_lock(&kvm->lock);
5969 if (irqchip_in_kernel(kvm))
5970 goto create_irqchip_unlock;
5973 if (kvm->created_vcpus)
5974 goto create_irqchip_unlock;
5976 r = kvm_pic_init(kvm);
5978 goto create_irqchip_unlock;
5980 r = kvm_ioapic_init(kvm);
5982 kvm_pic_destroy(kvm);
5983 goto create_irqchip_unlock;
5986 r = kvm_setup_default_irq_routing(kvm);
5988 kvm_ioapic_destroy(kvm);
5989 kvm_pic_destroy(kvm);
5990 goto create_irqchip_unlock;
5992 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5994 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5995 create_irqchip_unlock:
5996 mutex_unlock(&kvm->lock);
5999 case KVM_CREATE_PIT:
6000 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6002 case KVM_CREATE_PIT2:
6004 if (copy_from_user(&u.pit_config, argp,
6005 sizeof(struct kvm_pit_config)))
6008 mutex_lock(&kvm->lock);
6011 goto create_pit_unlock;
6013 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6017 mutex_unlock(&kvm->lock);
6019 case KVM_GET_IRQCHIP: {
6020 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6021 struct kvm_irqchip *chip;
6023 chip = memdup_user(argp, sizeof(*chip));
6030 if (!irqchip_kernel(kvm))
6031 goto get_irqchip_out;
6032 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6034 goto get_irqchip_out;
6036 if (copy_to_user(argp, chip, sizeof(*chip)))
6037 goto get_irqchip_out;
6043 case KVM_SET_IRQCHIP: {
6044 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6045 struct kvm_irqchip *chip;
6047 chip = memdup_user(argp, sizeof(*chip));
6054 if (!irqchip_kernel(kvm))
6055 goto set_irqchip_out;
6056 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6063 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6066 if (!kvm->arch.vpit)
6068 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6072 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6079 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6081 mutex_lock(&kvm->lock);
6083 if (!kvm->arch.vpit)
6085 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6087 mutex_unlock(&kvm->lock);
6090 case KVM_GET_PIT2: {
6092 if (!kvm->arch.vpit)
6094 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6098 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6103 case KVM_SET_PIT2: {
6105 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6107 mutex_lock(&kvm->lock);
6109 if (!kvm->arch.vpit)
6111 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6113 mutex_unlock(&kvm->lock);
6116 case KVM_REINJECT_CONTROL: {
6117 struct kvm_reinject_control control;
6119 if (copy_from_user(&control, argp, sizeof(control)))
6122 if (!kvm->arch.vpit)
6124 r = kvm_vm_ioctl_reinject(kvm, &control);
6127 case KVM_SET_BOOT_CPU_ID:
6129 mutex_lock(&kvm->lock);
6130 if (kvm->created_vcpus)
6133 kvm->arch.bsp_vcpu_id = arg;
6134 mutex_unlock(&kvm->lock);
6136 #ifdef CONFIG_KVM_XEN
6137 case KVM_XEN_HVM_CONFIG: {
6138 struct kvm_xen_hvm_config xhc;
6140 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6142 r = kvm_xen_hvm_config(kvm, &xhc);
6145 case KVM_XEN_HVM_GET_ATTR: {
6146 struct kvm_xen_hvm_attr xha;
6149 if (copy_from_user(&xha, argp, sizeof(xha)))
6151 r = kvm_xen_hvm_get_attr(kvm, &xha);
6152 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6156 case KVM_XEN_HVM_SET_ATTR: {
6157 struct kvm_xen_hvm_attr xha;
6160 if (copy_from_user(&xha, argp, sizeof(xha)))
6162 r = kvm_xen_hvm_set_attr(kvm, &xha);
6166 case KVM_SET_CLOCK: {
6167 struct kvm_arch *ka = &kvm->arch;
6168 struct kvm_clock_data user_ns;
6172 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6181 * TODO: userspace has to take care of races with VCPU_RUN, so
6182 * kvm_gen_update_masterclock() can be cut down to locked
6183 * pvclock_update_vm_gtod_copy().
6185 kvm_gen_update_masterclock(kvm);
6188 * This pairs with kvm_guest_time_update(): when masterclock is
6189 * in use, we use master_kernel_ns + kvmclock_offset to set
6190 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6191 * is slightly ahead) here we risk going negative on unsigned
6192 * 'system_time' when 'user_ns.clock' is very small.
6194 raw_spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6195 if (kvm->arch.use_master_clock)
6196 now_ns = ka->master_kernel_ns;
6198 now_ns = get_kvmclock_base_ns();
6199 ka->kvmclock_offset = user_ns.clock - now_ns;
6200 raw_spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6202 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6205 case KVM_GET_CLOCK: {
6206 struct kvm_clock_data user_ns;
6209 now_ns = get_kvmclock_ns(kvm);
6210 user_ns.clock = now_ns;
6211 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6212 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6215 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6220 case KVM_MEMORY_ENCRYPT_OP: {
6222 if (kvm_x86_ops.mem_enc_op)
6223 r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6226 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6227 struct kvm_enc_region region;
6230 if (copy_from_user(®ion, argp, sizeof(region)))
6234 if (kvm_x86_ops.mem_enc_reg_region)
6235 r = static_call(kvm_x86_mem_enc_reg_region)(kvm, ®ion);
6238 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6239 struct kvm_enc_region region;
6242 if (copy_from_user(®ion, argp, sizeof(region)))
6246 if (kvm_x86_ops.mem_enc_unreg_region)
6247 r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, ®ion);
6250 case KVM_HYPERV_EVENTFD: {
6251 struct kvm_hyperv_eventfd hvevfd;
6254 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6256 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6259 case KVM_SET_PMU_EVENT_FILTER:
6260 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6262 case KVM_X86_SET_MSR_FILTER:
6263 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6272 static void kvm_init_msr_list(void)
6274 struct x86_pmu_capability x86_pmu;
6278 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6279 "Please update the fixed PMCs in msrs_to_saved_all[]");
6281 perf_get_x86_pmu_capability(&x86_pmu);
6283 num_msrs_to_save = 0;
6284 num_emulated_msrs = 0;
6285 num_msr_based_features = 0;
6287 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6288 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6292 * Even MSRs that are valid in the host may not be exposed
6293 * to the guests in some cases.
6295 switch (msrs_to_save_all[i]) {
6296 case MSR_IA32_BNDCFGS:
6297 if (!kvm_mpx_supported())
6301 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6302 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6305 case MSR_IA32_UMWAIT_CONTROL:
6306 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6309 case MSR_IA32_RTIT_CTL:
6310 case MSR_IA32_RTIT_STATUS:
6311 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6314 case MSR_IA32_RTIT_CR3_MATCH:
6315 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6316 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6319 case MSR_IA32_RTIT_OUTPUT_BASE:
6320 case MSR_IA32_RTIT_OUTPUT_MASK:
6321 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6322 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6323 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6326 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6327 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6328 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6329 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6332 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6333 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6334 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6337 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6338 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6339 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6346 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6349 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6350 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6353 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6356 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6357 struct kvm_msr_entry msr;
6359 msr.index = msr_based_features_all[i];
6360 if (kvm_get_msr_feature(&msr))
6363 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6367 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6375 if (!(lapic_in_kernel(vcpu) &&
6376 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6377 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6388 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6395 if (!(lapic_in_kernel(vcpu) &&
6396 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6398 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6400 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6410 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6411 struct kvm_segment *var, int seg)
6413 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6416 void kvm_get_segment(struct kvm_vcpu *vcpu,
6417 struct kvm_segment *var, int seg)
6419 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6422 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6423 struct x86_exception *exception)
6427 BUG_ON(!mmu_is_nested(vcpu));
6429 /* NPT walks are always user-walks */
6430 access |= PFERR_USER_MASK;
6431 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6436 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6437 struct x86_exception *exception)
6439 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6440 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6442 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6444 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6445 struct x86_exception *exception)
6447 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6448 access |= PFERR_FETCH_MASK;
6449 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6452 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6453 struct x86_exception *exception)
6455 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6456 access |= PFERR_WRITE_MASK;
6457 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6459 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6461 /* uses this to access any guest's mapped memory without checking CPL */
6462 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6463 struct x86_exception *exception)
6465 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6468 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6469 struct kvm_vcpu *vcpu, u32 access,
6470 struct x86_exception *exception)
6473 int r = X86EMUL_CONTINUE;
6476 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6478 unsigned offset = addr & (PAGE_SIZE-1);
6479 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6482 if (gpa == UNMAPPED_GVA)
6483 return X86EMUL_PROPAGATE_FAULT;
6484 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6487 r = X86EMUL_IO_NEEDED;
6499 /* used for instruction fetching */
6500 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6501 gva_t addr, void *val, unsigned int bytes,
6502 struct x86_exception *exception)
6504 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6505 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6509 /* Inline kvm_read_guest_virt_helper for speed. */
6510 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6512 if (unlikely(gpa == UNMAPPED_GVA))
6513 return X86EMUL_PROPAGATE_FAULT;
6515 offset = addr & (PAGE_SIZE-1);
6516 if (WARN_ON(offset + bytes > PAGE_SIZE))
6517 bytes = (unsigned)PAGE_SIZE - offset;
6518 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6520 if (unlikely(ret < 0))
6521 return X86EMUL_IO_NEEDED;
6523 return X86EMUL_CONTINUE;
6526 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6527 gva_t addr, void *val, unsigned int bytes,
6528 struct x86_exception *exception)
6530 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6533 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6534 * is returned, but our callers are not ready for that and they blindly
6535 * call kvm_inject_page_fault. Ensure that they at least do not leak
6536 * uninitialized kernel stack memory into cr2 and error code.
6538 memset(exception, 0, sizeof(*exception));
6539 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6542 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6544 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6545 gva_t addr, void *val, unsigned int bytes,
6546 struct x86_exception *exception, bool system)
6548 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6551 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6552 access |= PFERR_USER_MASK;
6554 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6557 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6558 unsigned long addr, void *val, unsigned int bytes)
6560 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6561 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6563 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6566 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6567 struct kvm_vcpu *vcpu, u32 access,
6568 struct x86_exception *exception)
6571 int r = X86EMUL_CONTINUE;
6574 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6577 unsigned offset = addr & (PAGE_SIZE-1);
6578 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6581 if (gpa == UNMAPPED_GVA)
6582 return X86EMUL_PROPAGATE_FAULT;
6583 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6585 r = X86EMUL_IO_NEEDED;
6597 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6598 unsigned int bytes, struct x86_exception *exception,
6601 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6602 u32 access = PFERR_WRITE_MASK;
6604 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6605 access |= PFERR_USER_MASK;
6607 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6611 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6612 unsigned int bytes, struct x86_exception *exception)
6614 /* kvm_write_guest_virt_system can pull in tons of pages. */
6615 vcpu->arch.l1tf_flush_l1d = true;
6617 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6618 PFERR_WRITE_MASK, exception);
6620 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6622 int handle_ud(struct kvm_vcpu *vcpu)
6624 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6625 int emul_type = EMULTYPE_TRAP_UD;
6626 char sig[5]; /* ud2; .ascii "kvm" */
6627 struct x86_exception e;
6629 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6632 if (force_emulation_prefix &&
6633 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6634 sig, sizeof(sig), &e) == 0 &&
6635 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6636 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6637 emul_type = EMULTYPE_TRAP_UD_FORCED;
6640 return kvm_emulate_instruction(vcpu, emul_type);
6642 EXPORT_SYMBOL_GPL(handle_ud);
6644 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6645 gpa_t gpa, bool write)
6647 /* For APIC access vmexit */
6648 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6651 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6652 trace_vcpu_match_mmio(gva, gpa, write, true);
6659 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6660 gpa_t *gpa, struct x86_exception *exception,
6663 u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6664 | (write ? PFERR_WRITE_MASK : 0);
6667 * currently PKRU is only applied to ept enabled guest so
6668 * there is no pkey in EPT page table for L1 guest or EPT
6669 * shadow page table for L2 guest.
6671 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6672 !permission_fault(vcpu, vcpu->arch.walk_mmu,
6673 vcpu->arch.mmio_access, 0, access))) {
6674 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6675 (gva & (PAGE_SIZE - 1));
6676 trace_vcpu_match_mmio(gva, *gpa, write, false);
6680 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6682 if (*gpa == UNMAPPED_GVA)
6685 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6688 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6689 const void *val, int bytes)
6693 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6696 kvm_page_track_write(vcpu, gpa, val, bytes);
6700 struct read_write_emulator_ops {
6701 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6703 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6704 void *val, int bytes);
6705 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6706 int bytes, void *val);
6707 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6708 void *val, int bytes);
6712 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6714 if (vcpu->mmio_read_completed) {
6715 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6716 vcpu->mmio_fragments[0].gpa, val);
6717 vcpu->mmio_read_completed = 0;
6724 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6725 void *val, int bytes)
6727 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6730 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6731 void *val, int bytes)
6733 return emulator_write_phys(vcpu, gpa, val, bytes);
6736 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6738 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6739 return vcpu_mmio_write(vcpu, gpa, bytes, val);
6742 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6743 void *val, int bytes)
6745 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6746 return X86EMUL_IO_NEEDED;
6749 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6750 void *val, int bytes)
6752 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6754 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6755 return X86EMUL_CONTINUE;
6758 static const struct read_write_emulator_ops read_emultor = {
6759 .read_write_prepare = read_prepare,
6760 .read_write_emulate = read_emulate,
6761 .read_write_mmio = vcpu_mmio_read,
6762 .read_write_exit_mmio = read_exit_mmio,
6765 static const struct read_write_emulator_ops write_emultor = {
6766 .read_write_emulate = write_emulate,
6767 .read_write_mmio = write_mmio,
6768 .read_write_exit_mmio = write_exit_mmio,
6772 static int emulator_read_write_onepage(unsigned long addr, void *val,
6774 struct x86_exception *exception,
6775 struct kvm_vcpu *vcpu,
6776 const struct read_write_emulator_ops *ops)
6780 bool write = ops->write;
6781 struct kvm_mmio_fragment *frag;
6782 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6785 * If the exit was due to a NPF we may already have a GPA.
6786 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6787 * Note, this cannot be used on string operations since string
6788 * operation using rep will only have the initial GPA from the NPF
6791 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6792 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6793 gpa = ctxt->gpa_val;
6794 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6796 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6798 return X86EMUL_PROPAGATE_FAULT;
6801 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6802 return X86EMUL_CONTINUE;
6805 * Is this MMIO handled locally?
6807 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6808 if (handled == bytes)
6809 return X86EMUL_CONTINUE;
6815 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6816 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6820 return X86EMUL_CONTINUE;
6823 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6825 void *val, unsigned int bytes,
6826 struct x86_exception *exception,
6827 const struct read_write_emulator_ops *ops)
6829 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6833 if (ops->read_write_prepare &&
6834 ops->read_write_prepare(vcpu, val, bytes))
6835 return X86EMUL_CONTINUE;
6837 vcpu->mmio_nr_fragments = 0;
6839 /* Crossing a page boundary? */
6840 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6843 now = -addr & ~PAGE_MASK;
6844 rc = emulator_read_write_onepage(addr, val, now, exception,
6847 if (rc != X86EMUL_CONTINUE)
6850 if (ctxt->mode != X86EMUL_MODE_PROT64)
6856 rc = emulator_read_write_onepage(addr, val, bytes, exception,
6858 if (rc != X86EMUL_CONTINUE)
6861 if (!vcpu->mmio_nr_fragments)
6864 gpa = vcpu->mmio_fragments[0].gpa;
6866 vcpu->mmio_needed = 1;
6867 vcpu->mmio_cur_fragment = 0;
6869 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6870 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6871 vcpu->run->exit_reason = KVM_EXIT_MMIO;
6872 vcpu->run->mmio.phys_addr = gpa;
6874 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6877 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6881 struct x86_exception *exception)
6883 return emulator_read_write(ctxt, addr, val, bytes,
6884 exception, &read_emultor);
6887 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6891 struct x86_exception *exception)
6893 return emulator_read_write(ctxt, addr, (void *)val, bytes,
6894 exception, &write_emultor);
6897 #define CMPXCHG_TYPE(t, ptr, old, new) \
6898 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6900 #ifdef CONFIG_X86_64
6901 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6903 # define CMPXCHG64(ptr, old, new) \
6904 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6907 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6912 struct x86_exception *exception)
6914 struct kvm_host_map map;
6915 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6921 /* guests cmpxchg8b have to be emulated atomically */
6922 if (bytes > 8 || (bytes & (bytes - 1)))
6925 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6927 if (gpa == UNMAPPED_GVA ||
6928 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6932 * Emulate the atomic as a straight write to avoid #AC if SLD is
6933 * enabled in the host and the access splits a cache line.
6935 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6936 page_line_mask = ~(cache_line_size() - 1);
6938 page_line_mask = PAGE_MASK;
6940 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6943 if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6946 kaddr = map.hva + offset_in_page(gpa);
6950 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6953 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6956 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6959 exchanged = CMPXCHG64(kaddr, old, new);
6965 kvm_vcpu_unmap(vcpu, &map, true);
6968 return X86EMUL_CMPXCHG_FAILED;
6970 kvm_page_track_write(vcpu, gpa, new, bytes);
6972 return X86EMUL_CONTINUE;
6975 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6977 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6980 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6984 for (i = 0; i < vcpu->arch.pio.count; i++) {
6985 if (vcpu->arch.pio.in)
6986 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6987 vcpu->arch.pio.size, pd);
6989 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6990 vcpu->arch.pio.port, vcpu->arch.pio.size,
6994 pd += vcpu->arch.pio.size;
6999 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7000 unsigned short port,
7001 unsigned int count, bool in)
7003 vcpu->arch.pio.port = port;
7004 vcpu->arch.pio.in = in;
7005 vcpu->arch.pio.count = count;
7006 vcpu->arch.pio.size = size;
7008 if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7011 vcpu->run->exit_reason = KVM_EXIT_IO;
7012 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7013 vcpu->run->io.size = size;
7014 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7015 vcpu->run->io.count = count;
7016 vcpu->run->io.port = port;
7021 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7022 unsigned short port, unsigned int count)
7024 WARN_ON(vcpu->arch.pio.count);
7025 memset(vcpu->arch.pio_data, 0, size * count);
7026 return emulator_pio_in_out(vcpu, size, port, count, true);
7029 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7031 int size = vcpu->arch.pio.size;
7032 unsigned count = vcpu->arch.pio.count;
7033 memcpy(val, vcpu->arch.pio_data, size * count);
7034 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7035 vcpu->arch.pio.count = 0;
7038 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7039 unsigned short port, void *val, unsigned int count)
7041 if (vcpu->arch.pio.count) {
7043 * Complete a previous iteration that required userspace I/O.
7044 * Note, @count isn't guaranteed to match pio.count as userspace
7045 * can modify ECX before rerunning the vCPU. Ignore any such
7046 * shenanigans as KVM doesn't support modifying the rep count,
7047 * and the emulator ensures @count doesn't overflow the buffer.
7050 int r = __emulator_pio_in(vcpu, size, port, count);
7054 /* Results already available, fall through. */
7057 complete_emulator_pio_in(vcpu, val);
7061 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7062 int size, unsigned short port, void *val,
7065 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7069 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7070 unsigned short port, const void *val,
7075 memcpy(vcpu->arch.pio_data, val, size * count);
7076 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7077 ret = emulator_pio_in_out(vcpu, size, port, count, false);
7079 vcpu->arch.pio.count = 0;
7084 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7085 int size, unsigned short port,
7086 const void *val, unsigned int count)
7088 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7091 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7093 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7096 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7098 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7101 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7103 if (!need_emulate_wbinvd(vcpu))
7104 return X86EMUL_CONTINUE;
7106 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7107 int cpu = get_cpu();
7109 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7110 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7111 wbinvd_ipi, NULL, 1);
7113 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7116 return X86EMUL_CONTINUE;
7119 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7121 kvm_emulate_wbinvd_noskip(vcpu);
7122 return kvm_skip_emulated_instruction(vcpu);
7124 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7128 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7130 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7133 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7134 unsigned long *dest)
7136 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7139 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7140 unsigned long value)
7143 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7146 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7148 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7151 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7153 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7154 unsigned long value;
7158 value = kvm_read_cr0(vcpu);
7161 value = vcpu->arch.cr2;
7164 value = kvm_read_cr3(vcpu);
7167 value = kvm_read_cr4(vcpu);
7170 value = kvm_get_cr8(vcpu);
7173 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7180 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7182 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7187 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7190 vcpu->arch.cr2 = val;
7193 res = kvm_set_cr3(vcpu, val);
7196 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7199 res = kvm_set_cr8(vcpu, val);
7202 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7209 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7211 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7214 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7216 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7219 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7221 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7224 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7226 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7229 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7231 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7234 static unsigned long emulator_get_cached_segment_base(
7235 struct x86_emulate_ctxt *ctxt, int seg)
7237 return get_segment_base(emul_to_vcpu(ctxt), seg);
7240 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7241 struct desc_struct *desc, u32 *base3,
7244 struct kvm_segment var;
7246 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7247 *selector = var.selector;
7250 memset(desc, 0, sizeof(*desc));
7258 set_desc_limit(desc, var.limit);
7259 set_desc_base(desc, (unsigned long)var.base);
7260 #ifdef CONFIG_X86_64
7262 *base3 = var.base >> 32;
7264 desc->type = var.type;
7266 desc->dpl = var.dpl;
7267 desc->p = var.present;
7268 desc->avl = var.avl;
7276 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7277 struct desc_struct *desc, u32 base3,
7280 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7281 struct kvm_segment var;
7283 var.selector = selector;
7284 var.base = get_desc_base(desc);
7285 #ifdef CONFIG_X86_64
7286 var.base |= ((u64)base3) << 32;
7288 var.limit = get_desc_limit(desc);
7290 var.limit = (var.limit << 12) | 0xfff;
7291 var.type = desc->type;
7292 var.dpl = desc->dpl;
7297 var.avl = desc->avl;
7298 var.present = desc->p;
7299 var.unusable = !var.present;
7302 kvm_set_segment(vcpu, &var, seg);
7306 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7307 u32 msr_index, u64 *pdata)
7309 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7312 r = kvm_get_msr(vcpu, msr_index, pdata);
7314 if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7315 /* Bounce to user space */
7316 return X86EMUL_IO_NEEDED;
7322 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7323 u32 msr_index, u64 data)
7325 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7328 r = kvm_set_msr(vcpu, msr_index, data);
7330 if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7331 /* Bounce to user space */
7332 return X86EMUL_IO_NEEDED;
7338 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7340 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7342 return vcpu->arch.smbase;
7345 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7347 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7349 vcpu->arch.smbase = smbase;
7352 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7355 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7358 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7359 u32 pmc, u64 *pdata)
7361 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7364 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7366 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7369 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7370 struct x86_instruction_info *info,
7371 enum x86_intercept_stage stage)
7373 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7377 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7378 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7381 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7384 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7386 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7389 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7391 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7394 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7396 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7399 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7401 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7404 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7406 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7409 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7411 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7414 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7416 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7419 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7421 return emul_to_vcpu(ctxt)->arch.hflags;
7424 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7426 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7428 kvm_smm_changed(vcpu, false);
7431 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7432 const char *smstate)
7434 return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7437 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7439 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7442 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7444 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7447 static const struct x86_emulate_ops emulate_ops = {
7448 .read_gpr = emulator_read_gpr,
7449 .write_gpr = emulator_write_gpr,
7450 .read_std = emulator_read_std,
7451 .write_std = emulator_write_std,
7452 .read_phys = kvm_read_guest_phys_system,
7453 .fetch = kvm_fetch_guest_virt,
7454 .read_emulated = emulator_read_emulated,
7455 .write_emulated = emulator_write_emulated,
7456 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7457 .invlpg = emulator_invlpg,
7458 .pio_in_emulated = emulator_pio_in_emulated,
7459 .pio_out_emulated = emulator_pio_out_emulated,
7460 .get_segment = emulator_get_segment,
7461 .set_segment = emulator_set_segment,
7462 .get_cached_segment_base = emulator_get_cached_segment_base,
7463 .get_gdt = emulator_get_gdt,
7464 .get_idt = emulator_get_idt,
7465 .set_gdt = emulator_set_gdt,
7466 .set_idt = emulator_set_idt,
7467 .get_cr = emulator_get_cr,
7468 .set_cr = emulator_set_cr,
7469 .cpl = emulator_get_cpl,
7470 .get_dr = emulator_get_dr,
7471 .set_dr = emulator_set_dr,
7472 .get_smbase = emulator_get_smbase,
7473 .set_smbase = emulator_set_smbase,
7474 .set_msr = emulator_set_msr,
7475 .get_msr = emulator_get_msr,
7476 .check_pmc = emulator_check_pmc,
7477 .read_pmc = emulator_read_pmc,
7478 .halt = emulator_halt,
7479 .wbinvd = emulator_wbinvd,
7480 .fix_hypercall = emulator_fix_hypercall,
7481 .intercept = emulator_intercept,
7482 .get_cpuid = emulator_get_cpuid,
7483 .guest_has_long_mode = emulator_guest_has_long_mode,
7484 .guest_has_movbe = emulator_guest_has_movbe,
7485 .guest_has_fxsr = emulator_guest_has_fxsr,
7486 .guest_has_rdpid = emulator_guest_has_rdpid,
7487 .set_nmi_mask = emulator_set_nmi_mask,
7488 .get_hflags = emulator_get_hflags,
7489 .exiting_smm = emulator_exiting_smm,
7490 .leave_smm = emulator_leave_smm,
7491 .triple_fault = emulator_triple_fault,
7492 .set_xcr = emulator_set_xcr,
7495 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7497 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7499 * an sti; sti; sequence only disable interrupts for the first
7500 * instruction. So, if the last instruction, be it emulated or
7501 * not, left the system with the INT_STI flag enabled, it
7502 * means that the last instruction is an sti. We should not
7503 * leave the flag on in this case. The same goes for mov ss
7505 if (int_shadow & mask)
7507 if (unlikely(int_shadow || mask)) {
7508 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7510 kvm_make_request(KVM_REQ_EVENT, vcpu);
7514 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7516 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7517 if (ctxt->exception.vector == PF_VECTOR)
7518 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7520 if (ctxt->exception.error_code_valid)
7521 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7522 ctxt->exception.error_code);
7524 kvm_queue_exception(vcpu, ctxt->exception.vector);
7528 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7530 struct x86_emulate_ctxt *ctxt;
7532 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7534 pr_err("kvm: failed to allocate vcpu's emulator\n");
7539 ctxt->ops = &emulate_ops;
7540 vcpu->arch.emulate_ctxt = ctxt;
7545 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7547 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7550 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7552 ctxt->gpa_available = false;
7553 ctxt->eflags = kvm_get_rflags(vcpu);
7554 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7556 ctxt->eip = kvm_rip_read(vcpu);
7557 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7558 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7559 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7560 cs_db ? X86EMUL_MODE_PROT32 :
7561 X86EMUL_MODE_PROT16;
7562 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7563 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7564 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7566 ctxt->interruptibility = 0;
7567 ctxt->have_exception = false;
7568 ctxt->exception.vector = -1;
7569 ctxt->perm_ok = false;
7571 init_decode_cache(ctxt);
7572 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7575 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7577 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7580 init_emulate_ctxt(vcpu);
7584 ctxt->_eip = ctxt->eip + inc_eip;
7585 ret = emulate_int_real(ctxt, irq);
7587 if (ret != X86EMUL_CONTINUE) {
7588 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7590 ctxt->eip = ctxt->_eip;
7591 kvm_rip_write(vcpu, ctxt->eip);
7592 kvm_set_rflags(vcpu, ctxt->eflags);
7595 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7597 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7599 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7600 u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7601 struct kvm_run *run = vcpu->run;
7603 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7604 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7605 run->emulation_failure.ndata = 0;
7606 run->emulation_failure.flags = 0;
7609 run->emulation_failure.ndata = 3;
7610 run->emulation_failure.flags |=
7611 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7612 run->emulation_failure.insn_size = insn_size;
7613 memset(run->emulation_failure.insn_bytes, 0x90,
7614 sizeof(run->emulation_failure.insn_bytes));
7615 memcpy(run->emulation_failure.insn_bytes,
7616 ctxt->fetch.data, insn_size);
7620 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7622 struct kvm *kvm = vcpu->kvm;
7624 ++vcpu->stat.insn_emulation_fail;
7625 trace_kvm_emulate_insn_failed(vcpu);
7627 if (emulation_type & EMULTYPE_VMWARE_GP) {
7628 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7632 if (kvm->arch.exit_on_emulation_error ||
7633 (emulation_type & EMULTYPE_SKIP)) {
7634 prepare_emulation_failure_exit(vcpu);
7638 kvm_queue_exception(vcpu, UD_VECTOR);
7640 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7641 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7642 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7643 vcpu->run->internal.ndata = 0;
7650 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7651 bool write_fault_to_shadow_pgtable,
7654 gpa_t gpa = cr2_or_gpa;
7657 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7660 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7661 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7664 if (!vcpu->arch.mmu->direct_map) {
7666 * Write permission should be allowed since only
7667 * write access need to be emulated.
7669 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7672 * If the mapping is invalid in guest, let cpu retry
7673 * it to generate fault.
7675 if (gpa == UNMAPPED_GVA)
7680 * Do not retry the unhandleable instruction if it faults on the
7681 * readonly host memory, otherwise it will goto a infinite loop:
7682 * retry instruction -> write #PF -> emulation fail -> retry
7683 * instruction -> ...
7685 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7688 * If the instruction failed on the error pfn, it can not be fixed,
7689 * report the error to userspace.
7691 if (is_error_noslot_pfn(pfn))
7694 kvm_release_pfn_clean(pfn);
7696 /* The instructions are well-emulated on direct mmu. */
7697 if (vcpu->arch.mmu->direct_map) {
7698 unsigned int indirect_shadow_pages;
7700 write_lock(&vcpu->kvm->mmu_lock);
7701 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7702 write_unlock(&vcpu->kvm->mmu_lock);
7704 if (indirect_shadow_pages)
7705 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7711 * if emulation was due to access to shadowed page table
7712 * and it failed try to unshadow page and re-enter the
7713 * guest to let CPU execute the instruction.
7715 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7718 * If the access faults on its page table, it can not
7719 * be fixed by unprotecting shadow page and it should
7720 * be reported to userspace.
7722 return !write_fault_to_shadow_pgtable;
7725 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7726 gpa_t cr2_or_gpa, int emulation_type)
7728 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7729 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7731 last_retry_eip = vcpu->arch.last_retry_eip;
7732 last_retry_addr = vcpu->arch.last_retry_addr;
7735 * If the emulation is caused by #PF and it is non-page_table
7736 * writing instruction, it means the VM-EXIT is caused by shadow
7737 * page protected, we can zap the shadow page and retry this
7738 * instruction directly.
7740 * Note: if the guest uses a non-page-table modifying instruction
7741 * on the PDE that points to the instruction, then we will unmap
7742 * the instruction and go to an infinite loop. So, we cache the
7743 * last retried eip and the last fault address, if we meet the eip
7744 * and the address again, we can break out of the potential infinite
7747 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7749 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7752 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7753 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7756 if (x86_page_table_writing_insn(ctxt))
7759 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7762 vcpu->arch.last_retry_eip = ctxt->eip;
7763 vcpu->arch.last_retry_addr = cr2_or_gpa;
7765 if (!vcpu->arch.mmu->direct_map)
7766 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7768 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7773 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7774 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7776 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7778 trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7781 vcpu->arch.hflags |= HF_SMM_MASK;
7783 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7785 /* Process a latched INIT or SMI, if any. */
7786 kvm_make_request(KVM_REQ_EVENT, vcpu);
7789 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7790 * on SMM exit we still need to reload them from
7793 vcpu->arch.pdptrs_from_userspace = false;
7796 kvm_mmu_reset_context(vcpu);
7799 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7808 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7809 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7814 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7816 struct kvm_run *kvm_run = vcpu->run;
7818 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7819 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7820 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7821 kvm_run->debug.arch.exception = DB_VECTOR;
7822 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7825 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7829 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7831 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7834 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7839 * rflags is the old, "raw" value of the flags. The new value has
7840 * not been saved yet.
7842 * This is correct even for TF set by the guest, because "the
7843 * processor will not generate this exception after the instruction
7844 * that sets the TF flag".
7846 if (unlikely(rflags & X86_EFLAGS_TF))
7847 r = kvm_vcpu_do_singlestep(vcpu);
7850 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7852 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
7854 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7855 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7856 struct kvm_run *kvm_run = vcpu->run;
7857 unsigned long eip = kvm_get_linear_rip(vcpu);
7858 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7859 vcpu->arch.guest_debug_dr7,
7863 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7864 kvm_run->debug.arch.pc = eip;
7865 kvm_run->debug.arch.exception = DB_VECTOR;
7866 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7872 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7873 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7874 unsigned long eip = kvm_get_linear_rip(vcpu);
7875 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7880 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7889 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7891 switch (ctxt->opcode_len) {
7898 case 0xe6: /* OUT */
7902 case 0x6c: /* INS */
7904 case 0x6e: /* OUTS */
7911 case 0x33: /* RDPMC */
7921 * Decode an instruction for emulation. The caller is responsible for handling
7922 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
7923 * (and wrong) when emulating on an intercepted fault-like exception[*], as
7924 * code breakpoints have higher priority and thus have already been done by
7927 * [*] Except #MC, which is higher priority, but KVM should never emulate in
7928 * response to a machine check.
7930 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7931 void *insn, int insn_len)
7933 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7936 init_emulate_ctxt(vcpu);
7938 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7940 trace_kvm_emulate_insn_start(vcpu);
7941 ++vcpu->stat.insn_emulation;
7945 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7947 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7948 int emulation_type, void *insn, int insn_len)
7951 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7952 bool writeback = true;
7953 bool write_fault_to_spt;
7955 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7958 vcpu->arch.l1tf_flush_l1d = true;
7961 * Clear write_fault_to_shadow_pgtable here to ensure it is
7964 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7965 vcpu->arch.write_fault_to_shadow_pgtable = false;
7967 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7968 kvm_clear_exception_queue(vcpu);
7971 * Return immediately if RIP hits a code breakpoint, such #DBs
7972 * are fault-like and are higher priority than any faults on
7973 * the code fetch itself.
7975 if (!(emulation_type & EMULTYPE_SKIP) &&
7976 kvm_vcpu_check_code_breakpoint(vcpu, &r))
7979 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7981 if (r != EMULATION_OK) {
7982 if ((emulation_type & EMULTYPE_TRAP_UD) ||
7983 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7984 kvm_queue_exception(vcpu, UD_VECTOR);
7987 if (reexecute_instruction(vcpu, cr2_or_gpa,
7991 if (ctxt->have_exception) {
7993 * #UD should result in just EMULATION_FAILED, and trap-like
7994 * exception should not be encountered during decode.
7996 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7997 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7998 inject_emulated_exception(vcpu);
8001 return handle_emulation_failure(vcpu, emulation_type);
8005 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8006 !is_vmware_backdoor_opcode(ctxt)) {
8007 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8012 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8013 * for kvm_skip_emulated_instruction(). The caller is responsible for
8014 * updating interruptibility state and injecting single-step #DBs.
8016 if (emulation_type & EMULTYPE_SKIP) {
8017 if (ctxt->mode != X86EMUL_MODE_PROT64)
8018 ctxt->eip = (u32)ctxt->_eip;
8020 ctxt->eip = ctxt->_eip;
8022 kvm_rip_write(vcpu, ctxt->eip);
8023 if (ctxt->eflags & X86_EFLAGS_RF)
8024 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8028 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8031 /* this is needed for vmware backdoor interface to work since it
8032 changes registers values during IO operation */
8033 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8034 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8035 emulator_invalidate_register_cache(ctxt);
8039 if (emulation_type & EMULTYPE_PF) {
8040 /* Save the faulting GPA (cr2) in the address field */
8041 ctxt->exception.address = cr2_or_gpa;
8043 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8044 if (vcpu->arch.mmu->direct_map) {
8045 ctxt->gpa_available = true;
8046 ctxt->gpa_val = cr2_or_gpa;
8049 /* Sanitize the address out of an abundance of paranoia. */
8050 ctxt->exception.address = 0;
8053 r = x86_emulate_insn(ctxt);
8055 if (r == EMULATION_INTERCEPTED)
8058 if (r == EMULATION_FAILED) {
8059 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8063 return handle_emulation_failure(vcpu, emulation_type);
8066 if (ctxt->have_exception) {
8068 if (inject_emulated_exception(vcpu))
8070 } else if (vcpu->arch.pio.count) {
8071 if (!vcpu->arch.pio.in) {
8072 /* FIXME: return into emulator if single-stepping. */
8073 vcpu->arch.pio.count = 0;
8076 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8079 } else if (vcpu->mmio_needed) {
8080 ++vcpu->stat.mmio_exits;
8082 if (!vcpu->mmio_is_write)
8085 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8086 } else if (vcpu->arch.complete_userspace_io) {
8089 } else if (r == EMULATION_RESTART)
8095 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8096 toggle_interruptibility(vcpu, ctxt->interruptibility);
8097 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8098 if (!ctxt->have_exception ||
8099 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8100 kvm_rip_write(vcpu, ctxt->eip);
8101 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8102 r = kvm_vcpu_do_singlestep(vcpu);
8103 if (kvm_x86_ops.update_emulated_instruction)
8104 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8105 __kvm_set_rflags(vcpu, ctxt->eflags);
8109 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8110 * do nothing, and it will be requested again as soon as
8111 * the shadow expires. But we still need to check here,
8112 * because POPF has no interrupt shadow.
8114 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8115 kvm_make_request(KVM_REQ_EVENT, vcpu);
8117 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8122 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8124 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8126 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8128 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8129 void *insn, int insn_len)
8131 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8133 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8135 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8137 vcpu->arch.pio.count = 0;
8141 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8143 vcpu->arch.pio.count = 0;
8145 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8148 return kvm_skip_emulated_instruction(vcpu);
8151 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8152 unsigned short port)
8154 unsigned long val = kvm_rax_read(vcpu);
8155 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8161 * Workaround userspace that relies on old KVM behavior of %rip being
8162 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8165 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8166 vcpu->arch.complete_userspace_io =
8167 complete_fast_pio_out_port_0x7e;
8168 kvm_skip_emulated_instruction(vcpu);
8170 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8171 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8176 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8180 /* We should only ever be called with arch.pio.count equal to 1 */
8181 BUG_ON(vcpu->arch.pio.count != 1);
8183 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8184 vcpu->arch.pio.count = 0;
8188 /* For size less than 4 we merge, else we zero extend */
8189 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8192 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8193 * the copy and tracing
8195 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8196 kvm_rax_write(vcpu, val);
8198 return kvm_skip_emulated_instruction(vcpu);
8201 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8202 unsigned short port)
8207 /* For size less than 4 we merge, else we zero extend */
8208 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8210 ret = emulator_pio_in(vcpu, size, port, &val, 1);
8212 kvm_rax_write(vcpu, val);
8216 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8217 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8222 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8227 ret = kvm_fast_pio_in(vcpu, size, port);
8229 ret = kvm_fast_pio_out(vcpu, size, port);
8230 return ret && kvm_skip_emulated_instruction(vcpu);
8232 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8234 static int kvmclock_cpu_down_prep(unsigned int cpu)
8236 __this_cpu_write(cpu_tsc_khz, 0);
8240 static void tsc_khz_changed(void *data)
8242 struct cpufreq_freqs *freq = data;
8243 unsigned long khz = 0;
8247 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8248 khz = cpufreq_quick_get(raw_smp_processor_id());
8251 __this_cpu_write(cpu_tsc_khz, khz);
8254 #ifdef CONFIG_X86_64
8255 static void kvm_hyperv_tsc_notifier(void)
8258 struct kvm_vcpu *vcpu;
8260 unsigned long flags;
8262 mutex_lock(&kvm_lock);
8263 list_for_each_entry(kvm, &vm_list, vm_list)
8264 kvm_make_mclock_inprogress_request(kvm);
8266 hyperv_stop_tsc_emulation();
8268 /* TSC frequency always matches when on Hyper-V */
8269 for_each_present_cpu(cpu)
8270 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8271 kvm_max_guest_tsc_khz = tsc_khz;
8273 list_for_each_entry(kvm, &vm_list, vm_list) {
8274 struct kvm_arch *ka = &kvm->arch;
8276 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8277 pvclock_update_vm_gtod_copy(kvm);
8278 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8280 kvm_for_each_vcpu(cpu, vcpu, kvm)
8281 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8283 kvm_for_each_vcpu(cpu, vcpu, kvm)
8284 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8286 mutex_unlock(&kvm_lock);
8290 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8293 struct kvm_vcpu *vcpu;
8294 int i, send_ipi = 0;
8297 * We allow guests to temporarily run on slowing clocks,
8298 * provided we notify them after, or to run on accelerating
8299 * clocks, provided we notify them before. Thus time never
8302 * However, we have a problem. We can't atomically update
8303 * the frequency of a given CPU from this function; it is
8304 * merely a notifier, which can be called from any CPU.
8305 * Changing the TSC frequency at arbitrary points in time
8306 * requires a recomputation of local variables related to
8307 * the TSC for each VCPU. We must flag these local variables
8308 * to be updated and be sure the update takes place with the
8309 * new frequency before any guests proceed.
8311 * Unfortunately, the combination of hotplug CPU and frequency
8312 * change creates an intractable locking scenario; the order
8313 * of when these callouts happen is undefined with respect to
8314 * CPU hotplug, and they can race with each other. As such,
8315 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8316 * undefined; you can actually have a CPU frequency change take
8317 * place in between the computation of X and the setting of the
8318 * variable. To protect against this problem, all updates of
8319 * the per_cpu tsc_khz variable are done in an interrupt
8320 * protected IPI, and all callers wishing to update the value
8321 * must wait for a synchronous IPI to complete (which is trivial
8322 * if the caller is on the CPU already). This establishes the
8323 * necessary total order on variable updates.
8325 * Note that because a guest time update may take place
8326 * anytime after the setting of the VCPU's request bit, the
8327 * correct TSC value must be set before the request. However,
8328 * to ensure the update actually makes it to any guest which
8329 * starts running in hardware virtualization between the set
8330 * and the acquisition of the spinlock, we must also ping the
8331 * CPU after setting the request bit.
8335 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8337 mutex_lock(&kvm_lock);
8338 list_for_each_entry(kvm, &vm_list, vm_list) {
8339 kvm_for_each_vcpu(i, vcpu, kvm) {
8340 if (vcpu->cpu != cpu)
8342 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8343 if (vcpu->cpu != raw_smp_processor_id())
8347 mutex_unlock(&kvm_lock);
8349 if (freq->old < freq->new && send_ipi) {
8351 * We upscale the frequency. Must make the guest
8352 * doesn't see old kvmclock values while running with
8353 * the new frequency, otherwise we risk the guest sees
8354 * time go backwards.
8356 * In case we update the frequency for another cpu
8357 * (which might be in guest context) send an interrupt
8358 * to kick the cpu out of guest context. Next time
8359 * guest context is entered kvmclock will be updated,
8360 * so the guest will not see stale values.
8362 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8366 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8369 struct cpufreq_freqs *freq = data;
8372 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8374 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8377 for_each_cpu(cpu, freq->policy->cpus)
8378 __kvmclock_cpufreq_notifier(freq, cpu);
8383 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8384 .notifier_call = kvmclock_cpufreq_notifier
8387 static int kvmclock_cpu_online(unsigned int cpu)
8389 tsc_khz_changed(NULL);
8393 static void kvm_timer_init(void)
8395 max_tsc_khz = tsc_khz;
8397 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8398 #ifdef CONFIG_CPU_FREQ
8399 struct cpufreq_policy *policy;
8403 policy = cpufreq_cpu_get(cpu);
8405 if (policy->cpuinfo.max_freq)
8406 max_tsc_khz = policy->cpuinfo.max_freq;
8407 cpufreq_cpu_put(policy);
8411 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8412 CPUFREQ_TRANSITION_NOTIFIER);
8415 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8416 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8419 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8420 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8422 int kvm_is_in_guest(void)
8424 return __this_cpu_read(current_vcpu) != NULL;
8427 static int kvm_is_user_mode(void)
8431 if (__this_cpu_read(current_vcpu))
8432 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8434 return user_mode != 0;
8437 static unsigned long kvm_get_guest_ip(void)
8439 unsigned long ip = 0;
8441 if (__this_cpu_read(current_vcpu))
8442 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8447 static void kvm_handle_intel_pt_intr(void)
8449 struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8451 kvm_make_request(KVM_REQ_PMI, vcpu);
8452 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8453 (unsigned long *)&vcpu->arch.pmu.global_status);
8456 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8457 .is_in_guest = kvm_is_in_guest,
8458 .is_user_mode = kvm_is_user_mode,
8459 .get_guest_ip = kvm_get_guest_ip,
8460 .handle_intel_pt_intr = NULL,
8463 #ifdef CONFIG_X86_64
8464 static void pvclock_gtod_update_fn(struct work_struct *work)
8468 struct kvm_vcpu *vcpu;
8471 mutex_lock(&kvm_lock);
8472 list_for_each_entry(kvm, &vm_list, vm_list)
8473 kvm_for_each_vcpu(i, vcpu, kvm)
8474 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8475 atomic_set(&kvm_guest_has_master_clock, 0);
8476 mutex_unlock(&kvm_lock);
8479 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8482 * Indirection to move queue_work() out of the tk_core.seq write held
8483 * region to prevent possible deadlocks against time accessors which
8484 * are invoked with work related locks held.
8486 static void pvclock_irq_work_fn(struct irq_work *w)
8488 queue_work(system_long_wq, &pvclock_gtod_work);
8491 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8494 * Notification about pvclock gtod data update.
8496 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8499 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8500 struct timekeeper *tk = priv;
8502 update_pvclock_gtod(tk);
8505 * Disable master clock if host does not trust, or does not use,
8506 * TSC based clocksource. Delegate queue_work() to irq_work as
8507 * this is invoked with tk_core.seq write held.
8509 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8510 atomic_read(&kvm_guest_has_master_clock) != 0)
8511 irq_work_queue(&pvclock_irq_work);
8515 static struct notifier_block pvclock_gtod_notifier = {
8516 .notifier_call = pvclock_gtod_notify,
8520 int kvm_arch_init(void *opaque)
8522 struct kvm_x86_init_ops *ops = opaque;
8525 if (kvm_x86_ops.hardware_enable) {
8526 printk(KERN_ERR "kvm: already loaded the other module\n");
8531 if (!ops->cpu_has_kvm_support()) {
8532 pr_err_ratelimited("kvm: no hardware support\n");
8536 if (ops->disabled_by_bios()) {
8537 pr_err_ratelimited("kvm: disabled by bios\n");
8543 * KVM explicitly assumes that the guest has an FPU and
8544 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8545 * vCPU's FPU state as a fxregs_state struct.
8547 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8548 printk(KERN_ERR "kvm: inadequate fpu\n");
8554 x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8555 __alignof__(struct fpu), SLAB_ACCOUNT,
8557 if (!x86_fpu_cache) {
8558 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8562 x86_emulator_cache = kvm_alloc_emulator_cache();
8563 if (!x86_emulator_cache) {
8564 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8565 goto out_free_x86_fpu_cache;
8568 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8569 if (!user_return_msrs) {
8570 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8571 goto out_free_x86_emulator_cache;
8573 kvm_nr_uret_msrs = 0;
8575 r = kvm_mmu_vendor_module_init();
8577 goto out_free_percpu;
8581 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8582 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8583 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8586 if (pi_inject_timer == -1)
8587 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8588 #ifdef CONFIG_X86_64
8589 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8591 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8592 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8598 free_percpu(user_return_msrs);
8599 out_free_x86_emulator_cache:
8600 kmem_cache_destroy(x86_emulator_cache);
8601 out_free_x86_fpu_cache:
8602 kmem_cache_destroy(x86_fpu_cache);
8607 void kvm_arch_exit(void)
8609 #ifdef CONFIG_X86_64
8610 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8611 clear_hv_tscchange_cb();
8615 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8616 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8617 CPUFREQ_TRANSITION_NOTIFIER);
8618 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8619 #ifdef CONFIG_X86_64
8620 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8621 irq_work_sync(&pvclock_irq_work);
8622 cancel_work_sync(&pvclock_gtod_work);
8624 kvm_x86_ops.hardware_enable = NULL;
8625 kvm_mmu_vendor_module_exit();
8626 free_percpu(user_return_msrs);
8627 kmem_cache_destroy(x86_emulator_cache);
8628 kmem_cache_destroy(x86_fpu_cache);
8629 #ifdef CONFIG_KVM_XEN
8630 static_key_deferred_flush(&kvm_xen_enabled);
8631 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8635 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8637 ++vcpu->stat.halt_exits;
8638 if (lapic_in_kernel(vcpu)) {
8639 vcpu->arch.mp_state = state;
8642 vcpu->run->exit_reason = reason;
8647 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8649 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8651 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8653 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8655 int ret = kvm_skip_emulated_instruction(vcpu);
8657 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8658 * KVM_EXIT_DEBUG here.
8660 return kvm_vcpu_halt(vcpu) && ret;
8662 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8664 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8666 int ret = kvm_skip_emulated_instruction(vcpu);
8668 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8670 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8672 #ifdef CONFIG_X86_64
8673 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8674 unsigned long clock_type)
8676 struct kvm_clock_pairing clock_pairing;
8677 struct timespec64 ts;
8681 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8682 return -KVM_EOPNOTSUPP;
8685 * When tsc is in permanent catchup mode guests won't be able to use
8686 * pvclock_read_retry loop to get consistent view of pvclock
8688 if (vcpu->arch.tsc_always_catchup)
8689 return -KVM_EOPNOTSUPP;
8691 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8692 return -KVM_EOPNOTSUPP;
8694 clock_pairing.sec = ts.tv_sec;
8695 clock_pairing.nsec = ts.tv_nsec;
8696 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8697 clock_pairing.flags = 0;
8698 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8701 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8702 sizeof(struct kvm_clock_pairing)))
8710 * kvm_pv_kick_cpu_op: Kick a vcpu.
8712 * @apicid - apicid of vcpu to be kicked.
8714 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8717 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
8718 * common code, e.g. for tracing. Defer initialization to the compiler.
8720 struct kvm_lapic_irq lapic_irq = {
8721 .delivery_mode = APIC_DM_REMRD,
8722 .dest_mode = APIC_DEST_PHYSICAL,
8723 .shorthand = APIC_DEST_NOSHORT,
8727 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8730 bool kvm_apicv_activated(struct kvm *kvm)
8732 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8734 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8736 static void kvm_apicv_init(struct kvm *kvm)
8738 mutex_init(&kvm->arch.apicv_update_lock);
8741 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8742 &kvm->arch.apicv_inhibit_reasons);
8744 set_bit(APICV_INHIBIT_REASON_DISABLE,
8745 &kvm->arch.apicv_inhibit_reasons);
8748 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8750 struct kvm_vcpu *target = NULL;
8751 struct kvm_apic_map *map;
8753 vcpu->stat.directed_yield_attempted++;
8755 if (single_task_running())
8759 map = rcu_dereference(vcpu->kvm->arch.apic_map);
8761 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8762 target = map->phys_map[dest_id]->vcpu;
8766 if (!target || !READ_ONCE(target->ready))
8769 /* Ignore requests to yield to self */
8773 if (kvm_vcpu_yield_to(target) <= 0)
8776 vcpu->stat.directed_yield_successful++;
8782 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8784 u64 ret = vcpu->run->hypercall.ret;
8786 if (!is_64_bit_mode(vcpu))
8788 kvm_rax_write(vcpu, ret);
8789 ++vcpu->stat.hypercalls;
8790 return kvm_skip_emulated_instruction(vcpu);
8793 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8795 unsigned long nr, a0, a1, a2, a3, ret;
8798 if (kvm_xen_hypercall_enabled(vcpu->kvm))
8799 return kvm_xen_hypercall(vcpu);
8801 if (kvm_hv_hypercall_enabled(vcpu))
8802 return kvm_hv_hypercall(vcpu);
8804 nr = kvm_rax_read(vcpu);
8805 a0 = kvm_rbx_read(vcpu);
8806 a1 = kvm_rcx_read(vcpu);
8807 a2 = kvm_rdx_read(vcpu);
8808 a3 = kvm_rsi_read(vcpu);
8810 trace_kvm_hypercall(nr, a0, a1, a2, a3);
8812 op_64_bit = is_64_bit_hypercall(vcpu);
8821 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8829 case KVM_HC_VAPIC_POLL_IRQ:
8832 case KVM_HC_KICK_CPU:
8833 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8836 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8837 kvm_sched_yield(vcpu, a1);
8840 #ifdef CONFIG_X86_64
8841 case KVM_HC_CLOCK_PAIRING:
8842 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8845 case KVM_HC_SEND_IPI:
8846 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8849 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8851 case KVM_HC_SCHED_YIELD:
8852 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8855 kvm_sched_yield(vcpu, a0);
8858 case KVM_HC_MAP_GPA_RANGE: {
8859 u64 gpa = a0, npages = a1, attrs = a2;
8862 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8865 if (!PAGE_ALIGNED(gpa) || !npages ||
8866 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8871 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
8872 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
8873 vcpu->run->hypercall.args[0] = gpa;
8874 vcpu->run->hypercall.args[1] = npages;
8875 vcpu->run->hypercall.args[2] = attrs;
8876 vcpu->run->hypercall.longmode = op_64_bit;
8877 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8887 kvm_rax_write(vcpu, ret);
8889 ++vcpu->stat.hypercalls;
8890 return kvm_skip_emulated_instruction(vcpu);
8892 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8894 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8896 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8897 char instruction[3];
8898 unsigned long rip = kvm_rip_read(vcpu);
8900 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8902 return emulator_write_emulated(ctxt, rip, instruction, 3,
8906 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8908 return vcpu->run->request_interrupt_window &&
8909 likely(!pic_in_kernel(vcpu->kvm));
8912 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8914 struct kvm_run *kvm_run = vcpu->run;
8916 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
8917 kvm_run->cr8 = kvm_get_cr8(vcpu);
8918 kvm_run->apic_base = kvm_get_apic_base(vcpu);
8921 * The call to kvm_ready_for_interrupt_injection() may end up in
8922 * kvm_xen_has_interrupt() which may require the srcu lock to be
8923 * held, to protect against changes in the vcpu_info address.
8925 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8926 kvm_run->ready_for_interrupt_injection =
8927 pic_in_kernel(vcpu->kvm) ||
8928 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8929 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8932 kvm_run->flags |= KVM_RUN_X86_SMM;
8935 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8939 if (!kvm_x86_ops.update_cr8_intercept)
8942 if (!lapic_in_kernel(vcpu))
8945 if (vcpu->arch.apicv_active)
8948 if (!vcpu->arch.apic->vapic_addr)
8949 max_irr = kvm_lapic_find_highest_irr(vcpu);
8956 tpr = kvm_lapic_get_cr8(vcpu);
8958 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8962 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8964 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8965 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8969 return kvm_x86_ops.nested_ops->check_events(vcpu);
8972 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8974 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8975 vcpu->arch.exception.error_code = false;
8976 static_call(kvm_x86_queue_exception)(vcpu);
8979 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8982 bool can_inject = true;
8984 /* try to reinject previous events if any */
8986 if (vcpu->arch.exception.injected) {
8987 kvm_inject_exception(vcpu);
8991 * Do not inject an NMI or interrupt if there is a pending
8992 * exception. Exceptions and interrupts are recognized at
8993 * instruction boundaries, i.e. the start of an instruction.
8994 * Trap-like exceptions, e.g. #DB, have higher priority than
8995 * NMIs and interrupts, i.e. traps are recognized before an
8996 * NMI/interrupt that's pending on the same instruction.
8997 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8998 * priority, but are only generated (pended) during instruction
8999 * execution, i.e. a pending fault-like exception means the
9000 * fault occurred on the *previous* instruction and must be
9001 * serviced prior to recognizing any new events in order to
9002 * fully complete the previous instruction.
9004 else if (!vcpu->arch.exception.pending) {
9005 if (vcpu->arch.nmi_injected) {
9006 static_call(kvm_x86_set_nmi)(vcpu);
9008 } else if (vcpu->arch.interrupt.injected) {
9009 static_call(kvm_x86_set_irq)(vcpu);
9014 WARN_ON_ONCE(vcpu->arch.exception.injected &&
9015 vcpu->arch.exception.pending);
9018 * Call check_nested_events() even if we reinjected a previous event
9019 * in order for caller to determine if it should require immediate-exit
9020 * from L2 to L1 due to pending L1 events which require exit
9023 if (is_guest_mode(vcpu)) {
9024 r = kvm_check_nested_events(vcpu);
9029 /* try to inject new event if pending */
9030 if (vcpu->arch.exception.pending) {
9031 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9032 vcpu->arch.exception.has_error_code,
9033 vcpu->arch.exception.error_code);
9035 vcpu->arch.exception.pending = false;
9036 vcpu->arch.exception.injected = true;
9038 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9039 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9042 if (vcpu->arch.exception.nr == DB_VECTOR) {
9043 kvm_deliver_exception_payload(vcpu);
9044 if (vcpu->arch.dr7 & DR7_GD) {
9045 vcpu->arch.dr7 &= ~DR7_GD;
9046 kvm_update_dr7(vcpu);
9050 kvm_inject_exception(vcpu);
9054 /* Don't inject interrupts if the user asked to avoid doing so */
9055 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9059 * Finally, inject interrupt events. If an event cannot be injected
9060 * due to architectural conditions (e.g. IF=0) a window-open exit
9061 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9062 * and can architecturally be injected, but we cannot do it right now:
9063 * an interrupt could have arrived just now and we have to inject it
9064 * as a vmexit, or there could already an event in the queue, which is
9065 * indicated by can_inject. In that case we request an immediate exit
9066 * in order to make progress and get back here for another iteration.
9067 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9069 if (vcpu->arch.smi_pending) {
9070 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9074 vcpu->arch.smi_pending = false;
9075 ++vcpu->arch.smi_count;
9079 static_call(kvm_x86_enable_smi_window)(vcpu);
9082 if (vcpu->arch.nmi_pending) {
9083 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9087 --vcpu->arch.nmi_pending;
9088 vcpu->arch.nmi_injected = true;
9089 static_call(kvm_x86_set_nmi)(vcpu);
9091 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9093 if (vcpu->arch.nmi_pending)
9094 static_call(kvm_x86_enable_nmi_window)(vcpu);
9097 if (kvm_cpu_has_injectable_intr(vcpu)) {
9098 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9102 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9103 static_call(kvm_x86_set_irq)(vcpu);
9104 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9106 if (kvm_cpu_has_injectable_intr(vcpu))
9107 static_call(kvm_x86_enable_irq_window)(vcpu);
9110 if (is_guest_mode(vcpu) &&
9111 kvm_x86_ops.nested_ops->hv_timer_pending &&
9112 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9113 *req_immediate_exit = true;
9115 WARN_ON(vcpu->arch.exception.pending);
9120 *req_immediate_exit = true;
9126 static void process_nmi(struct kvm_vcpu *vcpu)
9131 * x86 is limited to one NMI running, and one NMI pending after it.
9132 * If an NMI is already in progress, limit further NMIs to just one.
9133 * Otherwise, allow two (and we'll inject the first one immediately).
9135 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9138 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9139 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9140 kvm_make_request(KVM_REQ_EVENT, vcpu);
9143 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9146 flags |= seg->g << 23;
9147 flags |= seg->db << 22;
9148 flags |= seg->l << 21;
9149 flags |= seg->avl << 20;
9150 flags |= seg->present << 15;
9151 flags |= seg->dpl << 13;
9152 flags |= seg->s << 12;
9153 flags |= seg->type << 8;
9157 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9159 struct kvm_segment seg;
9162 kvm_get_segment(vcpu, &seg, n);
9163 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9166 offset = 0x7f84 + n * 12;
9168 offset = 0x7f2c + (n - 3) * 12;
9170 put_smstate(u32, buf, offset + 8, seg.base);
9171 put_smstate(u32, buf, offset + 4, seg.limit);
9172 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9175 #ifdef CONFIG_X86_64
9176 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9178 struct kvm_segment seg;
9182 kvm_get_segment(vcpu, &seg, n);
9183 offset = 0x7e00 + n * 16;
9185 flags = enter_smm_get_segment_flags(&seg) >> 8;
9186 put_smstate(u16, buf, offset, seg.selector);
9187 put_smstate(u16, buf, offset + 2, flags);
9188 put_smstate(u32, buf, offset + 4, seg.limit);
9189 put_smstate(u64, buf, offset + 8, seg.base);
9193 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9196 struct kvm_segment seg;
9200 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9201 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9202 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9203 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9205 for (i = 0; i < 8; i++)
9206 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9208 kvm_get_dr(vcpu, 6, &val);
9209 put_smstate(u32, buf, 0x7fcc, (u32)val);
9210 kvm_get_dr(vcpu, 7, &val);
9211 put_smstate(u32, buf, 0x7fc8, (u32)val);
9213 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9214 put_smstate(u32, buf, 0x7fc4, seg.selector);
9215 put_smstate(u32, buf, 0x7f64, seg.base);
9216 put_smstate(u32, buf, 0x7f60, seg.limit);
9217 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9219 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9220 put_smstate(u32, buf, 0x7fc0, seg.selector);
9221 put_smstate(u32, buf, 0x7f80, seg.base);
9222 put_smstate(u32, buf, 0x7f7c, seg.limit);
9223 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9225 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9226 put_smstate(u32, buf, 0x7f74, dt.address);
9227 put_smstate(u32, buf, 0x7f70, dt.size);
9229 static_call(kvm_x86_get_idt)(vcpu, &dt);
9230 put_smstate(u32, buf, 0x7f58, dt.address);
9231 put_smstate(u32, buf, 0x7f54, dt.size);
9233 for (i = 0; i < 6; i++)
9234 enter_smm_save_seg_32(vcpu, buf, i);
9236 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9239 put_smstate(u32, buf, 0x7efc, 0x00020000);
9240 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9243 #ifdef CONFIG_X86_64
9244 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9247 struct kvm_segment seg;
9251 for (i = 0; i < 16; i++)
9252 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9254 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9255 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9257 kvm_get_dr(vcpu, 6, &val);
9258 put_smstate(u64, buf, 0x7f68, val);
9259 kvm_get_dr(vcpu, 7, &val);
9260 put_smstate(u64, buf, 0x7f60, val);
9262 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9263 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9264 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9266 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9269 put_smstate(u32, buf, 0x7efc, 0x00020064);
9271 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9273 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9274 put_smstate(u16, buf, 0x7e90, seg.selector);
9275 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9276 put_smstate(u32, buf, 0x7e94, seg.limit);
9277 put_smstate(u64, buf, 0x7e98, seg.base);
9279 static_call(kvm_x86_get_idt)(vcpu, &dt);
9280 put_smstate(u32, buf, 0x7e84, dt.size);
9281 put_smstate(u64, buf, 0x7e88, dt.address);
9283 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9284 put_smstate(u16, buf, 0x7e70, seg.selector);
9285 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9286 put_smstate(u32, buf, 0x7e74, seg.limit);
9287 put_smstate(u64, buf, 0x7e78, seg.base);
9289 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9290 put_smstate(u32, buf, 0x7e64, dt.size);
9291 put_smstate(u64, buf, 0x7e68, dt.address);
9293 for (i = 0; i < 6; i++)
9294 enter_smm_save_seg_64(vcpu, buf, i);
9298 static void enter_smm(struct kvm_vcpu *vcpu)
9300 struct kvm_segment cs, ds;
9305 memset(buf, 0, 512);
9306 #ifdef CONFIG_X86_64
9307 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9308 enter_smm_save_state_64(vcpu, buf);
9311 enter_smm_save_state_32(vcpu, buf);
9314 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9315 * state (e.g. leave guest mode) after we've saved the state into the
9316 * SMM state-save area.
9318 static_call(kvm_x86_enter_smm)(vcpu, buf);
9320 kvm_smm_changed(vcpu, true);
9321 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9323 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9324 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9326 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9328 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9329 kvm_rip_write(vcpu, 0x8000);
9331 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9332 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9333 vcpu->arch.cr0 = cr0;
9335 static_call(kvm_x86_set_cr4)(vcpu, 0);
9337 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9338 dt.address = dt.size = 0;
9339 static_call(kvm_x86_set_idt)(vcpu, &dt);
9341 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9343 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9344 cs.base = vcpu->arch.smbase;
9349 cs.limit = ds.limit = 0xffffffff;
9350 cs.type = ds.type = 0x3;
9351 cs.dpl = ds.dpl = 0;
9356 cs.avl = ds.avl = 0;
9357 cs.present = ds.present = 1;
9358 cs.unusable = ds.unusable = 0;
9359 cs.padding = ds.padding = 0;
9361 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9362 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9363 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9364 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9365 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9366 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9368 #ifdef CONFIG_X86_64
9369 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9370 static_call(kvm_x86_set_efer)(vcpu, 0);
9373 kvm_update_cpuid_runtime(vcpu);
9374 kvm_mmu_reset_context(vcpu);
9377 static void process_smi(struct kvm_vcpu *vcpu)
9379 vcpu->arch.smi_pending = true;
9380 kvm_make_request(KVM_REQ_EVENT, vcpu);
9383 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9384 unsigned long *vcpu_bitmap)
9388 zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9390 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9391 NULL, vcpu_bitmap, cpus);
9393 free_cpumask_var(cpus);
9396 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9398 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9401 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9405 if (!lapic_in_kernel(vcpu))
9408 mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9410 activate = kvm_apicv_activated(vcpu->kvm);
9411 if (vcpu->arch.apicv_active == activate)
9414 vcpu->arch.apicv_active = activate;
9415 kvm_apic_update_apicv(vcpu);
9416 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9419 * When APICv gets disabled, we may still have injected interrupts
9420 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9421 * still active when the interrupt got accepted. Make sure
9422 * inject_pending_event() is called to check for that.
9424 if (!vcpu->arch.apicv_active)
9425 kvm_make_request(KVM_REQ_EVENT, vcpu);
9428 mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9430 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9432 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9434 unsigned long old, new;
9436 if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9437 !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9440 old = new = kvm->arch.apicv_inhibit_reasons;
9443 __clear_bit(bit, &new);
9445 __set_bit(bit, &new);
9447 if (!!old != !!new) {
9448 trace_kvm_apicv_update_request(activate, bit);
9449 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9450 kvm->arch.apicv_inhibit_reasons = new;
9452 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9453 kvm_zap_gfn_range(kvm, gfn, gfn+1);
9456 kvm->arch.apicv_inhibit_reasons = new;
9458 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9460 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9462 mutex_lock(&kvm->arch.apicv_update_lock);
9463 __kvm_request_apicv_update(kvm, activate, bit);
9464 mutex_unlock(&kvm->arch.apicv_update_lock);
9466 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9468 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9470 if (!kvm_apic_present(vcpu))
9473 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9475 if (irqchip_split(vcpu->kvm))
9476 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9478 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9479 if (ioapic_in_kernel(vcpu->kvm))
9480 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9483 if (is_guest_mode(vcpu))
9484 vcpu->arch.load_eoi_exitmap_pending = true;
9486 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9489 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9491 u64 eoi_exit_bitmap[4];
9493 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9496 if (to_hv_vcpu(vcpu)) {
9497 bitmap_or((ulong *)eoi_exit_bitmap,
9498 vcpu->arch.ioapic_handled_vectors,
9499 to_hv_synic(vcpu)->vec_bitmap, 256);
9500 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9504 static_call(kvm_x86_load_eoi_exitmap)(
9505 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9508 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9509 unsigned long start, unsigned long end)
9511 unsigned long apic_address;
9514 * The physical address of apic access page is stored in the VMCS.
9515 * Update it when it becomes invalid.
9517 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9518 if (start <= apic_address && apic_address < end)
9519 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9522 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9524 if (!lapic_in_kernel(vcpu))
9527 if (!kvm_x86_ops.set_apic_access_page_addr)
9530 static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9533 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9535 smp_send_reschedule(vcpu->cpu);
9537 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9540 * Returns 1 to let vcpu_run() continue the guest execution loop without
9541 * exiting to the userspace. Otherwise, the value will be returned to the
9544 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9548 dm_request_for_irq_injection(vcpu) &&
9549 kvm_cpu_accept_dm_intr(vcpu);
9550 fastpath_t exit_fastpath;
9552 bool req_immediate_exit = false;
9554 /* Forbid vmenter if vcpu dirty ring is soft-full */
9555 if (unlikely(vcpu->kvm->dirty_ring_size &&
9556 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9557 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9558 trace_kvm_dirty_ring_exit(vcpu);
9563 if (kvm_request_pending(vcpu)) {
9564 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9568 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9569 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9574 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9575 kvm_mmu_unload(vcpu);
9576 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9577 __kvm_migrate_timers(vcpu);
9578 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9579 kvm_gen_update_masterclock(vcpu->kvm);
9580 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9581 kvm_gen_kvmclock_update(vcpu);
9582 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9583 r = kvm_guest_time_update(vcpu);
9587 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9588 kvm_mmu_sync_roots(vcpu);
9589 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9590 kvm_mmu_load_pgd(vcpu);
9591 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9592 kvm_vcpu_flush_tlb_all(vcpu);
9594 /* Flushing all ASIDs flushes the current ASID... */
9595 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9597 kvm_service_local_tlb_flush_requests(vcpu);
9599 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9600 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9604 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9605 if (is_guest_mode(vcpu)) {
9606 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9608 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9609 vcpu->mmio_needed = 0;
9614 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9615 /* Page is swapped out. Do synthetic halt */
9616 vcpu->arch.apf.halted = true;
9620 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9621 record_steal_time(vcpu);
9622 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9624 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9626 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9627 kvm_pmu_handle_event(vcpu);
9628 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9629 kvm_pmu_deliver_pmi(vcpu);
9630 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9631 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9632 if (test_bit(vcpu->arch.pending_ioapic_eoi,
9633 vcpu->arch.ioapic_handled_vectors)) {
9634 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9635 vcpu->run->eoi.vector =
9636 vcpu->arch.pending_ioapic_eoi;
9641 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9642 vcpu_scan_ioapic(vcpu);
9643 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9644 vcpu_load_eoi_exitmap(vcpu);
9645 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9646 kvm_vcpu_reload_apic_access_page(vcpu);
9647 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9648 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9649 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9653 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9654 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9655 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9659 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9660 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9662 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9663 vcpu->run->hyperv = hv_vcpu->exit;
9669 * KVM_REQ_HV_STIMER has to be processed after
9670 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9671 * depend on the guest clock being up-to-date
9673 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9674 kvm_hv_process_stimers(vcpu);
9675 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9676 kvm_vcpu_update_apicv(vcpu);
9677 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9678 kvm_check_async_pf_completion(vcpu);
9679 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9680 static_call(kvm_x86_msr_filter_changed)(vcpu);
9682 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9683 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9686 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9687 kvm_xen_has_interrupt(vcpu)) {
9688 ++vcpu->stat.req_event;
9689 r = kvm_apic_accept_events(vcpu);
9694 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9699 r = inject_pending_event(vcpu, &req_immediate_exit);
9705 static_call(kvm_x86_enable_irq_window)(vcpu);
9707 if (kvm_lapic_enabled(vcpu)) {
9708 update_cr8_intercept(vcpu);
9709 kvm_lapic_sync_to_vapic(vcpu);
9713 r = kvm_mmu_reload(vcpu);
9715 goto cancel_injection;
9720 static_call(kvm_x86_prepare_guest_switch)(vcpu);
9723 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9724 * IPI are then delayed after guest entry, which ensures that they
9725 * result in virtual interrupt delivery.
9727 local_irq_disable();
9728 vcpu->mode = IN_GUEST_MODE;
9730 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9733 * 1) We should set ->mode before checking ->requests. Please see
9734 * the comment in kvm_vcpu_exiting_guest_mode().
9736 * 2) For APICv, we should set ->mode before checking PID.ON. This
9737 * pairs with the memory barrier implicit in pi_test_and_set_on
9738 * (see vmx_deliver_posted_interrupt).
9740 * 3) This also orders the write to mode from any reads to the page
9741 * tables done while the VCPU is running. Please see the comment
9742 * in kvm_flush_remote_tlbs.
9744 smp_mb__after_srcu_read_unlock();
9747 * This handles the case where a posted interrupt was
9748 * notified with kvm_vcpu_kick. Assigned devices can
9749 * use the POSTED_INTR_VECTOR even if APICv is disabled,
9750 * so do it even if APICv is disabled on this vCPU.
9752 if (kvm_lapic_enabled(vcpu))
9753 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9755 if (kvm_vcpu_exit_request(vcpu)) {
9756 vcpu->mode = OUTSIDE_GUEST_MODE;
9760 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9762 goto cancel_injection;
9765 if (req_immediate_exit) {
9766 kvm_make_request(KVM_REQ_EVENT, vcpu);
9767 static_call(kvm_x86_request_immediate_exit)(vcpu);
9770 fpregs_assert_state_consistent();
9771 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9772 switch_fpu_return();
9774 if (unlikely(vcpu->arch.switch_db_regs)) {
9776 set_debugreg(vcpu->arch.eff_db[0], 0);
9777 set_debugreg(vcpu->arch.eff_db[1], 1);
9778 set_debugreg(vcpu->arch.eff_db[2], 2);
9779 set_debugreg(vcpu->arch.eff_db[3], 3);
9780 } else if (unlikely(hw_breakpoint_active())) {
9785 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9786 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9789 if (kvm_lapic_enabled(vcpu))
9790 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9792 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9793 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9799 * Do this here before restoring debug registers on the host. And
9800 * since we do this before handling the vmexit, a DR access vmexit
9801 * can (a) read the correct value of the debug registers, (b) set
9802 * KVM_DEBUGREG_WONT_EXIT again.
9804 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9805 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9806 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9807 kvm_update_dr0123(vcpu);
9808 kvm_update_dr7(vcpu);
9812 * If the guest has used debug registers, at least dr7
9813 * will be disabled while returning to the host.
9814 * If we don't have active breakpoints in the host, we don't
9815 * care about the messed up debug address registers. But if
9816 * we have some of them active, restore the old state.
9818 if (hw_breakpoint_active())
9819 hw_breakpoint_restore();
9821 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9822 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9824 vcpu->mode = OUTSIDE_GUEST_MODE;
9827 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9830 * Consume any pending interrupts, including the possible source of
9831 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9832 * An instruction is required after local_irq_enable() to fully unblock
9833 * interrupts on processors that implement an interrupt shadow, the
9834 * stat.exits increment will do nicely.
9836 kvm_before_interrupt(vcpu);
9839 local_irq_disable();
9840 kvm_after_interrupt(vcpu);
9843 * Wait until after servicing IRQs to account guest time so that any
9844 * ticks that occurred while running the guest are properly accounted
9845 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9846 * of accounting via context tracking, but the loss of accuracy is
9847 * acceptable for all known use cases.
9849 vtime_account_guest_exit();
9851 if (lapic_in_kernel(vcpu)) {
9852 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9853 if (delta != S64_MIN) {
9854 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9855 vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9862 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9865 * Profile KVM exit RIPs:
9867 if (unlikely(prof_on == KVM_PROFILING)) {
9868 unsigned long rip = kvm_rip_read(vcpu);
9869 profile_hit(KVM_PROFILING, (void *)rip);
9872 if (unlikely(vcpu->arch.tsc_always_catchup))
9873 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9875 if (vcpu->arch.apic_attention)
9876 kvm_lapic_sync_from_vapic(vcpu);
9878 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9882 if (req_immediate_exit)
9883 kvm_make_request(KVM_REQ_EVENT, vcpu);
9884 static_call(kvm_x86_cancel_injection)(vcpu);
9885 if (unlikely(vcpu->arch.apic_attention))
9886 kvm_lapic_sync_from_vapic(vcpu);
9891 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9893 if (!kvm_arch_vcpu_runnable(vcpu) &&
9894 (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9895 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9896 kvm_vcpu_block(vcpu);
9897 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9899 if (kvm_x86_ops.post_block)
9900 static_call(kvm_x86_post_block)(vcpu);
9902 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9906 if (kvm_apic_accept_events(vcpu) < 0)
9908 switch(vcpu->arch.mp_state) {
9909 case KVM_MP_STATE_HALTED:
9910 case KVM_MP_STATE_AP_RESET_HOLD:
9911 vcpu->arch.pv.pv_unhalted = false;
9912 vcpu->arch.mp_state =
9913 KVM_MP_STATE_RUNNABLE;
9915 case KVM_MP_STATE_RUNNABLE:
9916 vcpu->arch.apf.halted = false;
9918 case KVM_MP_STATE_INIT_RECEIVED:
9926 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9928 if (is_guest_mode(vcpu))
9929 kvm_check_nested_events(vcpu);
9931 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9932 !vcpu->arch.apf.halted);
9935 static int vcpu_run(struct kvm_vcpu *vcpu)
9938 struct kvm *kvm = vcpu->kvm;
9940 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9941 vcpu->arch.l1tf_flush_l1d = true;
9944 if (kvm_vcpu_running(vcpu)) {
9945 r = vcpu_enter_guest(vcpu);
9947 r = vcpu_block(kvm, vcpu);
9953 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9954 if (kvm_cpu_has_pending_timer(vcpu))
9955 kvm_inject_pending_timer_irqs(vcpu);
9957 if (dm_request_for_irq_injection(vcpu) &&
9958 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9960 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9961 ++vcpu->stat.request_irq_exits;
9965 if (__xfer_to_guest_mode_work_pending()) {
9966 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9967 r = xfer_to_guest_mode_handle_work(vcpu);
9970 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9974 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9979 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9983 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9984 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9985 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9989 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9991 BUG_ON(!vcpu->arch.pio.count);
9993 return complete_emulated_io(vcpu);
9997 * Implements the following, as a state machine:
10000 * for each fragment
10001 * for each mmio piece in the fragment
10008 * for each fragment
10009 * for each mmio piece in the fragment
10014 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10016 struct kvm_run *run = vcpu->run;
10017 struct kvm_mmio_fragment *frag;
10020 BUG_ON(!vcpu->mmio_needed);
10022 /* Complete previous fragment */
10023 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10024 len = min(8u, frag->len);
10025 if (!vcpu->mmio_is_write)
10026 memcpy(frag->data, run->mmio.data, len);
10028 if (frag->len <= 8) {
10029 /* Switch to the next fragment. */
10031 vcpu->mmio_cur_fragment++;
10033 /* Go forward to the next mmio piece. */
10039 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10040 vcpu->mmio_needed = 0;
10042 /* FIXME: return into emulator if single-stepping. */
10043 if (vcpu->mmio_is_write)
10045 vcpu->mmio_read_completed = 1;
10046 return complete_emulated_io(vcpu);
10049 run->exit_reason = KVM_EXIT_MMIO;
10050 run->mmio.phys_addr = frag->gpa;
10051 if (vcpu->mmio_is_write)
10052 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10053 run->mmio.len = min(8u, frag->len);
10054 run->mmio.is_write = vcpu->mmio_is_write;
10055 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10059 static void kvm_save_current_fpu(struct fpu *fpu)
10062 * If the target FPU state is not resident in the CPU registers, just
10063 * memcpy() from current, else save CPU state directly to the target.
10065 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10066 memcpy(&fpu->state, ¤t->thread.fpu.state,
10067 fpu_kernel_xstate_size);
10069 save_fpregs_to_fpstate(fpu);
10072 /* Swap (qemu) user FPU context for the guest FPU context. */
10073 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10077 kvm_save_current_fpu(vcpu->arch.user_fpu);
10080 * Guests with protected state can't have it set by the hypervisor,
10081 * so skip trying to set it.
10083 if (vcpu->arch.guest_fpu)
10084 /* PKRU is separately restored in kvm_x86_ops.run. */
10085 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
10086 ~XFEATURE_MASK_PKRU);
10088 fpregs_mark_activate();
10094 /* When vcpu_run ends, restore user space FPU context. */
10095 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10100 * Guests with protected state can't have it read by the hypervisor,
10101 * so skip trying to save it.
10103 if (vcpu->arch.guest_fpu)
10104 kvm_save_current_fpu(vcpu->arch.guest_fpu);
10106 restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
10108 fpregs_mark_activate();
10111 ++vcpu->stat.fpu_reload;
10115 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10117 struct kvm_run *kvm_run = vcpu->run;
10121 kvm_sigset_activate(vcpu);
10122 kvm_run->flags = 0;
10123 kvm_load_guest_fpu(vcpu);
10125 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10126 if (kvm_run->immediate_exit) {
10130 kvm_vcpu_block(vcpu);
10131 if (kvm_apic_accept_events(vcpu) < 0) {
10135 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10137 if (signal_pending(current)) {
10139 kvm_run->exit_reason = KVM_EXIT_INTR;
10140 ++vcpu->stat.signal_exits;
10145 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10146 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10151 if (kvm_run->kvm_dirty_regs) {
10152 r = sync_regs(vcpu);
10157 /* re-sync apic's tpr */
10158 if (!lapic_in_kernel(vcpu)) {
10159 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10165 if (unlikely(vcpu->arch.complete_userspace_io)) {
10166 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10167 vcpu->arch.complete_userspace_io = NULL;
10172 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10174 if (kvm_run->immediate_exit)
10177 r = vcpu_run(vcpu);
10180 kvm_put_guest_fpu(vcpu);
10181 if (kvm_run->kvm_valid_regs)
10183 post_kvm_run_save(vcpu);
10184 kvm_sigset_deactivate(vcpu);
10190 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10192 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10194 * We are here if userspace calls get_regs() in the middle of
10195 * instruction emulation. Registers state needs to be copied
10196 * back from emulation context to vcpu. Userspace shouldn't do
10197 * that usually, but some bad designed PV devices (vmware
10198 * backdoor interface) need this to work
10200 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10201 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10203 regs->rax = kvm_rax_read(vcpu);
10204 regs->rbx = kvm_rbx_read(vcpu);
10205 regs->rcx = kvm_rcx_read(vcpu);
10206 regs->rdx = kvm_rdx_read(vcpu);
10207 regs->rsi = kvm_rsi_read(vcpu);
10208 regs->rdi = kvm_rdi_read(vcpu);
10209 regs->rsp = kvm_rsp_read(vcpu);
10210 regs->rbp = kvm_rbp_read(vcpu);
10211 #ifdef CONFIG_X86_64
10212 regs->r8 = kvm_r8_read(vcpu);
10213 regs->r9 = kvm_r9_read(vcpu);
10214 regs->r10 = kvm_r10_read(vcpu);
10215 regs->r11 = kvm_r11_read(vcpu);
10216 regs->r12 = kvm_r12_read(vcpu);
10217 regs->r13 = kvm_r13_read(vcpu);
10218 regs->r14 = kvm_r14_read(vcpu);
10219 regs->r15 = kvm_r15_read(vcpu);
10222 regs->rip = kvm_rip_read(vcpu);
10223 regs->rflags = kvm_get_rflags(vcpu);
10226 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10229 __get_regs(vcpu, regs);
10234 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10236 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10237 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10239 kvm_rax_write(vcpu, regs->rax);
10240 kvm_rbx_write(vcpu, regs->rbx);
10241 kvm_rcx_write(vcpu, regs->rcx);
10242 kvm_rdx_write(vcpu, regs->rdx);
10243 kvm_rsi_write(vcpu, regs->rsi);
10244 kvm_rdi_write(vcpu, regs->rdi);
10245 kvm_rsp_write(vcpu, regs->rsp);
10246 kvm_rbp_write(vcpu, regs->rbp);
10247 #ifdef CONFIG_X86_64
10248 kvm_r8_write(vcpu, regs->r8);
10249 kvm_r9_write(vcpu, regs->r9);
10250 kvm_r10_write(vcpu, regs->r10);
10251 kvm_r11_write(vcpu, regs->r11);
10252 kvm_r12_write(vcpu, regs->r12);
10253 kvm_r13_write(vcpu, regs->r13);
10254 kvm_r14_write(vcpu, regs->r14);
10255 kvm_r15_write(vcpu, regs->r15);
10258 kvm_rip_write(vcpu, regs->rip);
10259 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10261 vcpu->arch.exception.pending = false;
10263 kvm_make_request(KVM_REQ_EVENT, vcpu);
10266 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10269 __set_regs(vcpu, regs);
10274 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10276 struct kvm_segment cs;
10278 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10282 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10284 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10286 struct desc_ptr dt;
10288 if (vcpu->arch.guest_state_protected)
10289 goto skip_protected_regs;
10291 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10292 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10293 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10294 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10295 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10296 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10298 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10299 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10301 static_call(kvm_x86_get_idt)(vcpu, &dt);
10302 sregs->idt.limit = dt.size;
10303 sregs->idt.base = dt.address;
10304 static_call(kvm_x86_get_gdt)(vcpu, &dt);
10305 sregs->gdt.limit = dt.size;
10306 sregs->gdt.base = dt.address;
10308 sregs->cr2 = vcpu->arch.cr2;
10309 sregs->cr3 = kvm_read_cr3(vcpu);
10311 skip_protected_regs:
10312 sregs->cr0 = kvm_read_cr0(vcpu);
10313 sregs->cr4 = kvm_read_cr4(vcpu);
10314 sregs->cr8 = kvm_get_cr8(vcpu);
10315 sregs->efer = vcpu->arch.efer;
10316 sregs->apic_base = kvm_get_apic_base(vcpu);
10319 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10321 __get_sregs_common(vcpu, sregs);
10323 if (vcpu->arch.guest_state_protected)
10326 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10327 set_bit(vcpu->arch.interrupt.nr,
10328 (unsigned long *)sregs->interrupt_bitmap);
10331 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10335 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10337 if (vcpu->arch.guest_state_protected)
10340 if (is_pae_paging(vcpu)) {
10341 for (i = 0 ; i < 4 ; i++)
10342 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10343 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10347 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10348 struct kvm_sregs *sregs)
10351 __get_sregs(vcpu, sregs);
10356 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10357 struct kvm_mp_state *mp_state)
10362 if (kvm_mpx_supported())
10363 kvm_load_guest_fpu(vcpu);
10365 r = kvm_apic_accept_events(vcpu);
10370 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10371 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10372 vcpu->arch.pv.pv_unhalted)
10373 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10375 mp_state->mp_state = vcpu->arch.mp_state;
10378 if (kvm_mpx_supported())
10379 kvm_put_guest_fpu(vcpu);
10384 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10385 struct kvm_mp_state *mp_state)
10391 if (!lapic_in_kernel(vcpu) &&
10392 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10396 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10397 * INIT state; latched init should be reported using
10398 * KVM_SET_VCPU_EVENTS, so reject it here.
10400 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10401 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10402 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10405 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10406 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10407 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10409 vcpu->arch.mp_state = mp_state->mp_state;
10410 kvm_make_request(KVM_REQ_EVENT, vcpu);
10418 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10419 int reason, bool has_error_code, u32 error_code)
10421 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10424 init_emulate_ctxt(vcpu);
10426 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10427 has_error_code, error_code);
10429 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10430 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10431 vcpu->run->internal.ndata = 0;
10435 kvm_rip_write(vcpu, ctxt->eip);
10436 kvm_set_rflags(vcpu, ctxt->eflags);
10439 EXPORT_SYMBOL_GPL(kvm_task_switch);
10441 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10443 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10445 * When EFER.LME and CR0.PG are set, the processor is in
10446 * 64-bit mode (though maybe in a 32-bit code segment).
10447 * CR4.PAE and EFER.LMA must be set.
10449 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10451 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10455 * Not in 64-bit mode: EFER.LMA is clear and the code
10456 * segment cannot be 64-bit.
10458 if (sregs->efer & EFER_LMA || sregs->cs.l)
10462 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10465 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10466 int *mmu_reset_needed, bool update_pdptrs)
10468 struct msr_data apic_base_msr;
10470 struct desc_ptr dt;
10472 if (!kvm_is_valid_sregs(vcpu, sregs))
10475 apic_base_msr.data = sregs->apic_base;
10476 apic_base_msr.host_initiated = true;
10477 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10480 if (vcpu->arch.guest_state_protected)
10483 dt.size = sregs->idt.limit;
10484 dt.address = sregs->idt.base;
10485 static_call(kvm_x86_set_idt)(vcpu, &dt);
10486 dt.size = sregs->gdt.limit;
10487 dt.address = sregs->gdt.base;
10488 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10490 vcpu->arch.cr2 = sregs->cr2;
10491 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10492 vcpu->arch.cr3 = sregs->cr3;
10493 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10495 kvm_set_cr8(vcpu, sregs->cr8);
10497 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10498 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10500 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10501 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10502 vcpu->arch.cr0 = sregs->cr0;
10504 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10505 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10507 if (update_pdptrs) {
10508 idx = srcu_read_lock(&vcpu->kvm->srcu);
10509 if (is_pae_paging(vcpu)) {
10510 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10511 *mmu_reset_needed = 1;
10513 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10516 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10517 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10518 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10519 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10520 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10521 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10523 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10524 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10526 update_cr8_intercept(vcpu);
10528 /* Older userspace won't unhalt the vcpu on reset. */
10529 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10530 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10531 !is_protmode(vcpu))
10532 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10537 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10539 int pending_vec, max_bits;
10540 int mmu_reset_needed = 0;
10541 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10546 if (mmu_reset_needed)
10547 kvm_mmu_reset_context(vcpu);
10549 max_bits = KVM_NR_INTERRUPTS;
10550 pending_vec = find_first_bit(
10551 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10553 if (pending_vec < max_bits) {
10554 kvm_queue_interrupt(vcpu, pending_vec, false);
10555 pr_debug("Set back pending irq %d\n", pending_vec);
10556 kvm_make_request(KVM_REQ_EVENT, vcpu);
10561 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10563 int mmu_reset_needed = 0;
10564 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10565 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10566 !(sregs2->efer & EFER_LMA);
10569 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10572 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10575 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10576 &mmu_reset_needed, !valid_pdptrs);
10580 if (valid_pdptrs) {
10581 for (i = 0; i < 4 ; i++)
10582 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10584 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10585 mmu_reset_needed = 1;
10586 vcpu->arch.pdptrs_from_userspace = true;
10588 if (mmu_reset_needed)
10589 kvm_mmu_reset_context(vcpu);
10593 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10594 struct kvm_sregs *sregs)
10599 ret = __set_sregs(vcpu, sregs);
10604 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10605 struct kvm_guest_debug *dbg)
10607 unsigned long rflags;
10610 if (vcpu->arch.guest_state_protected)
10615 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10617 if (vcpu->arch.exception.pending)
10619 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10620 kvm_queue_exception(vcpu, DB_VECTOR);
10622 kvm_queue_exception(vcpu, BP_VECTOR);
10626 * Read rflags as long as potentially injected trace flags are still
10629 rflags = kvm_get_rflags(vcpu);
10631 vcpu->guest_debug = dbg->control;
10632 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10633 vcpu->guest_debug = 0;
10635 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10636 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10637 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10638 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10640 for (i = 0; i < KVM_NR_DB_REGS; i++)
10641 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10643 kvm_update_dr7(vcpu);
10645 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10646 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10649 * Trigger an rflags update that will inject or remove the trace
10652 kvm_set_rflags(vcpu, rflags);
10654 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10664 * Translate a guest virtual address to a guest physical address.
10666 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10667 struct kvm_translation *tr)
10669 unsigned long vaddr = tr->linear_address;
10675 idx = srcu_read_lock(&vcpu->kvm->srcu);
10676 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10677 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10678 tr->physical_address = gpa;
10679 tr->valid = gpa != UNMAPPED_GVA;
10687 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10689 struct fxregs_state *fxsave;
10691 if (!vcpu->arch.guest_fpu)
10696 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10697 memcpy(fpu->fpr, fxsave->st_space, 128);
10698 fpu->fcw = fxsave->cwd;
10699 fpu->fsw = fxsave->swd;
10700 fpu->ftwx = fxsave->twd;
10701 fpu->last_opcode = fxsave->fop;
10702 fpu->last_ip = fxsave->rip;
10703 fpu->last_dp = fxsave->rdp;
10704 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10710 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10712 struct fxregs_state *fxsave;
10714 if (!vcpu->arch.guest_fpu)
10719 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10721 memcpy(fxsave->st_space, fpu->fpr, 128);
10722 fxsave->cwd = fpu->fcw;
10723 fxsave->swd = fpu->fsw;
10724 fxsave->twd = fpu->ftwx;
10725 fxsave->fop = fpu->last_opcode;
10726 fxsave->rip = fpu->last_ip;
10727 fxsave->rdp = fpu->last_dp;
10728 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10734 static void store_regs(struct kvm_vcpu *vcpu)
10736 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10738 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10739 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10741 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10742 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10744 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10745 kvm_vcpu_ioctl_x86_get_vcpu_events(
10746 vcpu, &vcpu->run->s.regs.events);
10749 static int sync_regs(struct kvm_vcpu *vcpu)
10751 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10752 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10753 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10755 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10756 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10758 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10760 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10761 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10762 vcpu, &vcpu->run->s.regs.events))
10764 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10770 static void fx_init(struct kvm_vcpu *vcpu)
10772 if (!vcpu->arch.guest_fpu)
10775 fpstate_init(&vcpu->arch.guest_fpu->state);
10776 if (boot_cpu_has(X86_FEATURE_XSAVES))
10777 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10778 host_xcr0 | XSTATE_COMPACTION_ENABLED;
10781 * Ensure guest xcr0 is valid for loading
10783 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10785 vcpu->arch.cr0 |= X86_CR0_ET;
10788 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10790 if (vcpu->arch.guest_fpu) {
10791 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10792 vcpu->arch.guest_fpu = NULL;
10795 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10797 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10799 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10800 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10801 "guest TSC will not be reliable\n");
10806 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10811 vcpu->arch.last_vmentry_cpu = -1;
10812 vcpu->arch.regs_avail = ~0;
10813 vcpu->arch.regs_dirty = ~0;
10815 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10816 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10818 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10820 r = kvm_mmu_create(vcpu);
10824 if (irqchip_in_kernel(vcpu->kvm)) {
10825 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10827 goto fail_mmu_destroy;
10830 * Defer evaluating inhibits until the vCPU is first run, as
10831 * this vCPU will not get notified of any changes until this
10832 * vCPU is visible to other vCPUs (marked online and added to
10833 * the set of vCPUs). Opportunistically mark APICv active as
10834 * VMX in particularly is highly unlikely to have inhibits.
10835 * Ignore the current per-VM APICv state so that vCPU creation
10836 * is guaranteed to run with a deterministic value, the request
10837 * will ensure the vCPU gets the correct state before VM-Entry.
10839 if (enable_apicv) {
10840 vcpu->arch.apicv_active = true;
10841 kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
10844 static_branch_inc(&kvm_has_noapic_vcpu);
10848 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10850 goto fail_free_lapic;
10851 vcpu->arch.pio_data = page_address(page);
10853 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10854 GFP_KERNEL_ACCOUNT);
10855 if (!vcpu->arch.mce_banks)
10856 goto fail_free_pio_data;
10857 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10859 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10860 GFP_KERNEL_ACCOUNT))
10861 goto fail_free_mce_banks;
10863 if (!alloc_emulate_ctxt(vcpu))
10864 goto free_wbinvd_dirty_mask;
10866 vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10867 GFP_KERNEL_ACCOUNT);
10868 if (!vcpu->arch.user_fpu) {
10869 pr_err("kvm: failed to allocate userspace's fpu\n");
10870 goto free_emulate_ctxt;
10873 vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10874 GFP_KERNEL_ACCOUNT);
10875 if (!vcpu->arch.guest_fpu) {
10876 pr_err("kvm: failed to allocate vcpu's fpu\n");
10877 goto free_user_fpu;
10881 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10882 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10884 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10886 kvm_async_pf_hash_reset(vcpu);
10887 kvm_pmu_init(vcpu);
10889 vcpu->arch.pending_external_vector = -1;
10890 vcpu->arch.preempted_in_kernel = false;
10892 #if IS_ENABLED(CONFIG_HYPERV)
10893 vcpu->arch.hv_root_tdp = INVALID_PAGE;
10896 r = static_call(kvm_x86_vcpu_create)(vcpu);
10898 goto free_guest_fpu;
10900 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10901 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10902 kvm_vcpu_mtrr_init(vcpu);
10904 kvm_set_tsc_khz(vcpu, max_tsc_khz);
10905 kvm_vcpu_reset(vcpu, false);
10906 kvm_init_mmu(vcpu);
10911 kvm_free_guest_fpu(vcpu);
10913 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10915 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10916 free_wbinvd_dirty_mask:
10917 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10918 fail_free_mce_banks:
10919 kfree(vcpu->arch.mce_banks);
10920 fail_free_pio_data:
10921 free_page((unsigned long)vcpu->arch.pio_data);
10923 kvm_free_lapic(vcpu);
10925 kvm_mmu_destroy(vcpu);
10929 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10931 struct kvm *kvm = vcpu->kvm;
10933 if (mutex_lock_killable(&vcpu->mutex))
10936 kvm_synchronize_tsc(vcpu, 0);
10939 /* poll control enabled by default */
10940 vcpu->arch.msr_kvm_poll_control = 1;
10942 mutex_unlock(&vcpu->mutex);
10944 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10945 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10946 KVMCLOCK_SYNC_PERIOD);
10949 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10953 kvmclock_reset(vcpu);
10955 static_call(kvm_x86_vcpu_free)(vcpu);
10957 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10958 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10959 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10960 kvm_free_guest_fpu(vcpu);
10962 kvm_hv_vcpu_uninit(vcpu);
10963 kvm_pmu_destroy(vcpu);
10964 kfree(vcpu->arch.mce_banks);
10965 kvm_free_lapic(vcpu);
10966 idx = srcu_read_lock(&vcpu->kvm->srcu);
10967 kvm_mmu_destroy(vcpu);
10968 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10969 free_page((unsigned long)vcpu->arch.pio_data);
10970 kvfree(vcpu->arch.cpuid_entries);
10971 if (!lapic_in_kernel(vcpu))
10972 static_branch_dec(&kvm_has_noapic_vcpu);
10975 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10977 unsigned long old_cr0 = kvm_read_cr0(vcpu);
10978 unsigned long new_cr0;
10981 kvm_lapic_reset(vcpu, init_event);
10983 vcpu->arch.hflags = 0;
10985 vcpu->arch.smi_pending = 0;
10986 vcpu->arch.smi_count = 0;
10987 atomic_set(&vcpu->arch.nmi_queued, 0);
10988 vcpu->arch.nmi_pending = 0;
10989 vcpu->arch.nmi_injected = false;
10990 kvm_clear_interrupt_queue(vcpu);
10991 kvm_clear_exception_queue(vcpu);
10993 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10994 kvm_update_dr0123(vcpu);
10995 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10996 vcpu->arch.dr7 = DR7_FIXED_1;
10997 kvm_update_dr7(vcpu);
10999 vcpu->arch.cr2 = 0;
11001 kvm_make_request(KVM_REQ_EVENT, vcpu);
11002 vcpu->arch.apf.msr_en_val = 0;
11003 vcpu->arch.apf.msr_int_val = 0;
11004 vcpu->arch.st.msr_val = 0;
11006 kvmclock_reset(vcpu);
11008 kvm_clear_async_pf_completion_queue(vcpu);
11009 kvm_async_pf_hash_reset(vcpu);
11010 vcpu->arch.apf.halted = false;
11012 if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
11013 void *mpx_state_buffer;
11016 * To avoid have the INIT path from kvm_apic_has_events() that be
11017 * called with loaded FPU and does not let userspace fix the state.
11020 kvm_put_guest_fpu(vcpu);
11021 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11023 if (mpx_state_buffer)
11024 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
11025 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11027 if (mpx_state_buffer)
11028 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
11030 kvm_load_guest_fpu(vcpu);
11034 kvm_pmu_reset(vcpu);
11035 vcpu->arch.smbase = 0x30000;
11037 vcpu->arch.msr_misc_features_enables = 0;
11039 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11040 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11043 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11044 vcpu->arch.regs_avail = ~0;
11045 vcpu->arch.regs_dirty = ~0;
11048 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11049 * if no CPUID match is found. Note, it's impossible to get a match at
11050 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11051 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11052 * But, go through the motions in case that's ever remedied.
11055 if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
11057 kvm_rdx_write(vcpu, eax);
11059 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11061 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11062 kvm_rip_write(vcpu, 0xfff0);
11064 vcpu->arch.cr3 = 0;
11065 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11068 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11069 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11070 * (or qualify) that with a footnote stating that CD/NW are preserved.
11072 new_cr0 = X86_CR0_ET;
11074 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11076 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11078 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11079 static_call(kvm_x86_set_cr4)(vcpu, 0);
11080 static_call(kvm_x86_set_efer)(vcpu, 0);
11081 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11084 * Reset the MMU context if paging was enabled prior to INIT (which is
11085 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11086 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11087 * checked because it is unconditionally cleared on INIT and all other
11088 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11089 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11091 if (old_cr0 & X86_CR0_PG)
11092 kvm_mmu_reset_context(vcpu);
11095 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11096 * APM states the TLBs are untouched by INIT, but it also states that
11097 * the TLBs are flushed on "External initialization of the processor."
11098 * Flush the guest TLB regardless of vendor, there is no meaningful
11099 * benefit in relying on the guest to flush the TLB immediately after
11100 * INIT. A spurious TLB flush is benign and likely negligible from a
11101 * performance perspective.
11104 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11106 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11108 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11110 struct kvm_segment cs;
11112 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11113 cs.selector = vector << 8;
11114 cs.base = vector << 12;
11115 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11116 kvm_rip_write(vcpu, 0);
11118 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11120 int kvm_arch_hardware_enable(void)
11123 struct kvm_vcpu *vcpu;
11128 bool stable, backwards_tsc = false;
11130 kvm_user_return_msr_cpu_online();
11131 ret = static_call(kvm_x86_hardware_enable)();
11135 local_tsc = rdtsc();
11136 stable = !kvm_check_tsc_unstable();
11137 list_for_each_entry(kvm, &vm_list, vm_list) {
11138 kvm_for_each_vcpu(i, vcpu, kvm) {
11139 if (!stable && vcpu->cpu == smp_processor_id())
11140 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11141 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11142 backwards_tsc = true;
11143 if (vcpu->arch.last_host_tsc > max_tsc)
11144 max_tsc = vcpu->arch.last_host_tsc;
11150 * Sometimes, even reliable TSCs go backwards. This happens on
11151 * platforms that reset TSC during suspend or hibernate actions, but
11152 * maintain synchronization. We must compensate. Fortunately, we can
11153 * detect that condition here, which happens early in CPU bringup,
11154 * before any KVM threads can be running. Unfortunately, we can't
11155 * bring the TSCs fully up to date with real time, as we aren't yet far
11156 * enough into CPU bringup that we know how much real time has actually
11157 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11158 * variables that haven't been updated yet.
11160 * So we simply find the maximum observed TSC above, then record the
11161 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11162 * the adjustment will be applied. Note that we accumulate
11163 * adjustments, in case multiple suspend cycles happen before some VCPU
11164 * gets a chance to run again. In the event that no KVM threads get a
11165 * chance to run, we will miss the entire elapsed period, as we'll have
11166 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11167 * loose cycle time. This isn't too big a deal, since the loss will be
11168 * uniform across all VCPUs (not to mention the scenario is extremely
11169 * unlikely). It is possible that a second hibernate recovery happens
11170 * much faster than a first, causing the observed TSC here to be
11171 * smaller; this would require additional padding adjustment, which is
11172 * why we set last_host_tsc to the local tsc observed here.
11174 * N.B. - this code below runs only on platforms with reliable TSC,
11175 * as that is the only way backwards_tsc is set above. Also note
11176 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11177 * have the same delta_cyc adjustment applied if backwards_tsc
11178 * is detected. Note further, this adjustment is only done once,
11179 * as we reset last_host_tsc on all VCPUs to stop this from being
11180 * called multiple times (one for each physical CPU bringup).
11182 * Platforms with unreliable TSCs don't have to deal with this, they
11183 * will be compensated by the logic in vcpu_load, which sets the TSC to
11184 * catchup mode. This will catchup all VCPUs to real time, but cannot
11185 * guarantee that they stay in perfect synchronization.
11187 if (backwards_tsc) {
11188 u64 delta_cyc = max_tsc - local_tsc;
11189 list_for_each_entry(kvm, &vm_list, vm_list) {
11190 kvm->arch.backwards_tsc_observed = true;
11191 kvm_for_each_vcpu(i, vcpu, kvm) {
11192 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11193 vcpu->arch.last_host_tsc = local_tsc;
11194 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11198 * We have to disable TSC offset matching.. if you were
11199 * booting a VM while issuing an S4 host suspend....
11200 * you may have some problem. Solving this issue is
11201 * left as an exercise to the reader.
11203 kvm->arch.last_tsc_nsec = 0;
11204 kvm->arch.last_tsc_write = 0;
11211 void kvm_arch_hardware_disable(void)
11213 static_call(kvm_x86_hardware_disable)();
11214 drop_user_return_notifiers();
11217 int kvm_arch_hardware_setup(void *opaque)
11219 struct kvm_x86_init_ops *ops = opaque;
11222 rdmsrl_safe(MSR_EFER, &host_efer);
11224 if (boot_cpu_has(X86_FEATURE_XSAVES))
11225 rdmsrl(MSR_IA32_XSS, host_xss);
11227 r = ops->hardware_setup();
11231 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11232 kvm_ops_static_call_update();
11234 if (ops->intel_pt_intr_in_guest && ops->intel_pt_intr_in_guest())
11235 kvm_guest_cbs.handle_intel_pt_intr = kvm_handle_intel_pt_intr;
11236 perf_register_guest_info_callbacks(&kvm_guest_cbs);
11238 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11241 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11242 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11243 #undef __kvm_cpu_cap_has
11245 if (kvm_has_tsc_control) {
11247 * Make sure the user can only configure tsc_khz values that
11248 * fit into a signed integer.
11249 * A min value is not calculated because it will always
11250 * be 1 on all machines.
11252 u64 max = min(0x7fffffffULL,
11253 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11254 kvm_max_guest_tsc_khz = max;
11256 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11259 kvm_init_msr_list();
11263 void kvm_arch_hardware_unsetup(void)
11265 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
11266 kvm_guest_cbs.handle_intel_pt_intr = NULL;
11268 static_call(kvm_x86_hardware_unsetup)();
11271 int kvm_arch_check_processor_compat(void *opaque)
11273 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11274 struct kvm_x86_init_ops *ops = opaque;
11276 WARN_ON(!irqs_disabled());
11278 if (__cr4_reserved_bits(cpu_has, c) !=
11279 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11282 return ops->check_processor_compatibility();
11285 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11287 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11289 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11291 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11293 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11296 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11297 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11299 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11301 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11303 vcpu->arch.l1tf_flush_l1d = true;
11304 if (pmu->version && unlikely(pmu->event_count)) {
11305 pmu->need_cleanup = true;
11306 kvm_make_request(KVM_REQ_PMU, vcpu);
11308 static_call(kvm_x86_sched_in)(vcpu, cpu);
11311 void kvm_arch_free_vm(struct kvm *kvm)
11313 kfree(to_kvm_hv(kvm)->hv_pa_pg);
11318 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11325 ret = kvm_page_track_init(kvm);
11329 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11330 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11331 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11332 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11333 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11334 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11336 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11337 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11338 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11339 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11340 &kvm->arch.irq_sources_bitmap);
11342 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11343 mutex_init(&kvm->arch.apic_map_lock);
11344 raw_spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11346 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11347 pvclock_update_vm_gtod_copy(kvm);
11349 kvm->arch.guest_can_read_msr_platform_info = true;
11351 #if IS_ENABLED(CONFIG_HYPERV)
11352 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11353 kvm->arch.hv_root_tdp = INVALID_PAGE;
11356 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11357 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11359 kvm_apicv_init(kvm);
11360 kvm_hv_init_vm(kvm);
11361 kvm_mmu_init_vm(kvm);
11362 kvm_xen_init_vm(kvm);
11364 return static_call(kvm_x86_vm_init)(kvm);
11367 int kvm_arch_post_init_vm(struct kvm *kvm)
11369 return kvm_mmu_post_init_vm(kvm);
11372 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11375 kvm_mmu_unload(vcpu);
11379 static void kvm_free_vcpus(struct kvm *kvm)
11382 struct kvm_vcpu *vcpu;
11385 * Unpin any mmu pages first.
11387 kvm_for_each_vcpu(i, vcpu, kvm) {
11388 kvm_clear_async_pf_completion_queue(vcpu);
11389 kvm_unload_vcpu_mmu(vcpu);
11391 kvm_for_each_vcpu(i, vcpu, kvm)
11392 kvm_vcpu_destroy(vcpu);
11394 mutex_lock(&kvm->lock);
11395 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11396 kvm->vcpus[i] = NULL;
11398 atomic_set(&kvm->online_vcpus, 0);
11399 mutex_unlock(&kvm->lock);
11402 void kvm_arch_sync_events(struct kvm *kvm)
11404 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11405 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11409 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11412 * __x86_set_memory_region: Setup KVM internal memory slot
11414 * @kvm: the kvm pointer to the VM.
11415 * @id: the slot ID to setup.
11416 * @gpa: the GPA to install the slot (unused when @size == 0).
11417 * @size: the size of the slot. Set to zero to uninstall a slot.
11419 * This function helps to setup a KVM internal memory slot. Specify
11420 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11421 * slot. The return code can be one of the following:
11423 * HVA: on success (uninstall will return a bogus HVA)
11426 * The caller should always use IS_ERR() to check the return value
11427 * before use. Note, the KVM internal memory slots are guaranteed to
11428 * remain valid and unchanged until the VM is destroyed, i.e., the
11429 * GPA->HVA translation will not change. However, the HVA is a user
11430 * address, i.e. its accessibility is not guaranteed, and must be
11431 * accessed via __copy_{to,from}_user().
11433 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11437 unsigned long hva, old_npages;
11438 struct kvm_memslots *slots = kvm_memslots(kvm);
11439 struct kvm_memory_slot *slot;
11441 /* Called with kvm->slots_lock held. */
11442 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11443 return ERR_PTR_USR(-EINVAL);
11445 slot = id_to_memslot(slots, id);
11447 if (slot && slot->npages)
11448 return ERR_PTR_USR(-EEXIST);
11451 * MAP_SHARED to prevent internal slot pages from being moved
11454 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11455 MAP_SHARED | MAP_ANONYMOUS, 0);
11456 if (IS_ERR((void *)hva))
11457 return (void __user *)hva;
11459 if (!slot || !slot->npages)
11462 old_npages = slot->npages;
11463 hva = slot->userspace_addr;
11466 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11467 struct kvm_userspace_memory_region m;
11469 m.slot = id | (i << 16);
11471 m.guest_phys_addr = gpa;
11472 m.userspace_addr = hva;
11473 m.memory_size = size;
11474 r = __kvm_set_memory_region(kvm, &m);
11476 return ERR_PTR_USR(r);
11480 vm_munmap(hva, old_npages * PAGE_SIZE);
11482 return (void __user *)hva;
11484 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11486 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11488 kvm_mmu_pre_destroy_vm(kvm);
11491 void kvm_arch_destroy_vm(struct kvm *kvm)
11493 if (current->mm == kvm->mm) {
11495 * Free memory regions allocated on behalf of userspace,
11496 * unless the the memory map has changed due to process exit
11499 mutex_lock(&kvm->slots_lock);
11500 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11502 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11504 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11505 mutex_unlock(&kvm->slots_lock);
11507 static_call_cond(kvm_x86_vm_destroy)(kvm);
11508 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11509 kvm_pic_destroy(kvm);
11510 kvm_ioapic_destroy(kvm);
11511 kvm_free_vcpus(kvm);
11512 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11513 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11514 kvm_mmu_uninit_vm(kvm);
11515 kvm_page_track_cleanup(kvm);
11516 kvm_xen_destroy_vm(kvm);
11517 kvm_hv_destroy_vm(kvm);
11520 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11524 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11525 kvfree(slot->arch.rmap[i]);
11526 slot->arch.rmap[i] = NULL;
11530 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11534 memslot_rmap_free(slot);
11536 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11537 kvfree(slot->arch.lpage_info[i - 1]);
11538 slot->arch.lpage_info[i - 1] = NULL;
11541 kvm_page_track_free_memslot(slot);
11544 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11545 unsigned long npages)
11547 const int sz = sizeof(*slot->arch.rmap[0]);
11550 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11552 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11554 if (slot->arch.rmap[i])
11557 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11558 if (!slot->arch.rmap[i]) {
11559 memslot_rmap_free(slot);
11567 int alloc_all_memslots_rmaps(struct kvm *kvm)
11569 struct kvm_memslots *slots;
11570 struct kvm_memory_slot *slot;
11574 * Check if memslots alreday have rmaps early before acquiring
11575 * the slots_arch_lock below.
11577 if (kvm_memslots_have_rmaps(kvm))
11580 mutex_lock(&kvm->slots_arch_lock);
11583 * Read memslots_have_rmaps again, under the slots arch lock,
11584 * before allocating the rmaps
11586 if (kvm_memslots_have_rmaps(kvm)) {
11587 mutex_unlock(&kvm->slots_arch_lock);
11591 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11592 slots = __kvm_memslots(kvm, i);
11593 kvm_for_each_memslot(slot, slots) {
11594 r = memslot_rmap_alloc(slot, slot->npages);
11596 mutex_unlock(&kvm->slots_arch_lock);
11603 * Ensure that memslots_have_rmaps becomes true strictly after
11604 * all the rmap pointers are set.
11606 smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11607 mutex_unlock(&kvm->slots_arch_lock);
11611 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11612 struct kvm_memory_slot *slot,
11613 unsigned long npages)
11618 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11619 * old arrays will be freed by __kvm_set_memory_region() if installing
11620 * the new memslot is successful.
11622 memset(&slot->arch, 0, sizeof(slot->arch));
11624 if (kvm_memslots_have_rmaps(kvm)) {
11625 r = memslot_rmap_alloc(slot, npages);
11630 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11631 struct kvm_lpage_info *linfo;
11632 unsigned long ugfn;
11636 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11638 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11642 slot->arch.lpage_info[i - 1] = linfo;
11644 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11645 linfo[0].disallow_lpage = 1;
11646 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11647 linfo[lpages - 1].disallow_lpage = 1;
11648 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11650 * If the gfn and userspace address are not aligned wrt each
11651 * other, disable large page support for this slot.
11653 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11656 for (j = 0; j < lpages; ++j)
11657 linfo[j].disallow_lpage = 1;
11661 if (kvm_page_track_create_memslot(slot, npages))
11667 memslot_rmap_free(slot);
11669 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11670 kvfree(slot->arch.lpage_info[i - 1]);
11671 slot->arch.lpage_info[i - 1] = NULL;
11676 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11678 struct kvm_vcpu *vcpu;
11682 * memslots->generation has been incremented.
11683 * mmio generation may have reached its maximum value.
11685 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11687 /* Force re-initialization of steal_time cache */
11688 kvm_for_each_vcpu(i, vcpu, kvm)
11689 kvm_vcpu_kick(vcpu);
11692 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11693 struct kvm_memory_slot *memslot,
11694 const struct kvm_userspace_memory_region *mem,
11695 enum kvm_mr_change change)
11697 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11698 return kvm_alloc_memslot_metadata(kvm, memslot,
11699 mem->memory_size >> PAGE_SHIFT);
11704 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11706 struct kvm_arch *ka = &kvm->arch;
11708 if (!kvm_x86_ops.cpu_dirty_log_size)
11711 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11712 (!enable && --ka->cpu_dirty_logging_count == 0))
11713 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11715 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11718 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11719 struct kvm_memory_slot *old,
11720 const struct kvm_memory_slot *new,
11721 enum kvm_mr_change change)
11723 bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11726 * Update CPU dirty logging if dirty logging is being toggled. This
11727 * applies to all operations.
11729 if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11730 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11733 * Nothing more to do for RO slots (which can't be dirtied and can't be
11734 * made writable) or CREATE/MOVE/DELETE of a slot.
11736 * For a memslot with dirty logging disabled:
11737 * CREATE: No dirty mappings will already exist.
11738 * MOVE/DELETE: The old mappings will already have been cleaned up by
11739 * kvm_arch_flush_shadow_memslot()
11741 * For a memslot with dirty logging enabled:
11742 * CREATE: No shadow pages exist, thus nothing to write-protect
11743 * and no dirty bits to clear.
11744 * MOVE/DELETE: The old mappings will already have been cleaned up by
11745 * kvm_arch_flush_shadow_memslot().
11747 if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11751 * READONLY and non-flags changes were filtered out above, and the only
11752 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11753 * logging isn't being toggled on or off.
11755 if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11758 if (!log_dirty_pages) {
11760 * Dirty logging tracks sptes in 4k granularity, meaning that
11761 * large sptes have to be split. If live migration succeeds,
11762 * the guest in the source machine will be destroyed and large
11763 * sptes will be created in the destination. However, if the
11764 * guest continues to run in the source machine (for example if
11765 * live migration fails), small sptes will remain around and
11766 * cause bad performance.
11768 * Scan sptes if dirty logging has been stopped, dropping those
11769 * which can be collapsed into a single large-page spte. Later
11770 * page faults will create the large-page sptes.
11772 kvm_mmu_zap_collapsible_sptes(kvm, new);
11775 * Initially-all-set does not require write protecting any page,
11776 * because they're all assumed to be dirty.
11778 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11781 if (kvm_x86_ops.cpu_dirty_log_size) {
11782 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11783 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11785 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11790 void kvm_arch_commit_memory_region(struct kvm *kvm,
11791 const struct kvm_userspace_memory_region *mem,
11792 struct kvm_memory_slot *old,
11793 const struct kvm_memory_slot *new,
11794 enum kvm_mr_change change)
11796 if (!kvm->arch.n_requested_mmu_pages)
11797 kvm_mmu_change_mmu_pages(kvm,
11798 kvm_mmu_calculate_default_mmu_pages(kvm));
11800 kvm_mmu_slot_apply_flags(kvm, old, new, change);
11802 /* Free the arrays associated with the old memslot. */
11803 if (change == KVM_MR_MOVE)
11804 kvm_arch_free_memslot(kvm, old);
11807 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11809 kvm_mmu_zap_all(kvm);
11812 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11813 struct kvm_memory_slot *slot)
11815 kvm_page_track_flush_slot(kvm, slot);
11818 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11820 return (is_guest_mode(vcpu) &&
11821 kvm_x86_ops.guest_apic_has_interrupt &&
11822 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11825 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11827 if (!list_empty_careful(&vcpu->async_pf.done))
11830 if (kvm_apic_has_events(vcpu))
11833 if (vcpu->arch.pv.pv_unhalted)
11836 if (vcpu->arch.exception.pending)
11839 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11840 (vcpu->arch.nmi_pending &&
11841 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11844 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11845 (vcpu->arch.smi_pending &&
11846 static_call(kvm_x86_smi_allowed)(vcpu, false)))
11849 if (kvm_arch_interrupt_allowed(vcpu) &&
11850 (kvm_cpu_has_interrupt(vcpu) ||
11851 kvm_guest_apic_has_interrupt(vcpu)))
11854 if (kvm_hv_has_stimer_pending(vcpu))
11857 if (is_guest_mode(vcpu) &&
11858 kvm_x86_ops.nested_ops->hv_timer_pending &&
11859 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11865 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11867 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11870 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11872 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11878 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11880 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11883 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11884 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11885 kvm_test_request(KVM_REQ_EVENT, vcpu))
11888 return kvm_arch_dy_has_pending_interrupt(vcpu);
11891 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11893 if (vcpu->arch.guest_state_protected)
11896 return vcpu->arch.preempted_in_kernel;
11899 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11901 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11904 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11906 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11909 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11911 /* Can't read the RIP when guest state is protected, just return 0 */
11912 if (vcpu->arch.guest_state_protected)
11915 if (is_64_bit_mode(vcpu))
11916 return kvm_rip_read(vcpu);
11917 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11918 kvm_rip_read(vcpu));
11920 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11922 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11924 return kvm_get_linear_rip(vcpu) == linear_rip;
11926 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11928 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11930 unsigned long rflags;
11932 rflags = static_call(kvm_x86_get_rflags)(vcpu);
11933 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11934 rflags &= ~X86_EFLAGS_TF;
11937 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11939 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11941 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11942 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11943 rflags |= X86_EFLAGS_TF;
11944 static_call(kvm_x86_set_rflags)(vcpu, rflags);
11947 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11949 __kvm_set_rflags(vcpu, rflags);
11950 kvm_make_request(KVM_REQ_EVENT, vcpu);
11952 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11954 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11958 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11962 r = kvm_mmu_reload(vcpu);
11966 if (!vcpu->arch.mmu->direct_map &&
11967 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11970 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11973 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11975 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11977 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11980 static inline u32 kvm_async_pf_next_probe(u32 key)
11982 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11985 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11987 u32 key = kvm_async_pf_hash_fn(gfn);
11989 while (vcpu->arch.apf.gfns[key] != ~0)
11990 key = kvm_async_pf_next_probe(key);
11992 vcpu->arch.apf.gfns[key] = gfn;
11995 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11998 u32 key = kvm_async_pf_hash_fn(gfn);
12000 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12001 (vcpu->arch.apf.gfns[key] != gfn &&
12002 vcpu->arch.apf.gfns[key] != ~0); i++)
12003 key = kvm_async_pf_next_probe(key);
12008 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12010 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12013 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12017 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12019 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12023 vcpu->arch.apf.gfns[i] = ~0;
12025 j = kvm_async_pf_next_probe(j);
12026 if (vcpu->arch.apf.gfns[j] == ~0)
12028 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12030 * k lies cyclically in ]i,j]
12032 * |....j i.k.| or |.k..j i...|
12034 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12035 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12040 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12042 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12044 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12048 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12050 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12052 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12053 &token, offset, sizeof(token));
12056 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12058 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12061 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12062 &val, offset, sizeof(val)))
12068 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12070 if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12073 if (!kvm_pv_async_pf_enabled(vcpu) ||
12074 (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12080 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12082 if (unlikely(!lapic_in_kernel(vcpu) ||
12083 kvm_event_needs_reinjection(vcpu) ||
12084 vcpu->arch.exception.pending))
12087 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12091 * If interrupts are off we cannot even use an artificial
12094 return kvm_arch_interrupt_allowed(vcpu);
12097 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12098 struct kvm_async_pf *work)
12100 struct x86_exception fault;
12102 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12103 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12105 if (kvm_can_deliver_async_pf(vcpu) &&
12106 !apf_put_user_notpresent(vcpu)) {
12107 fault.vector = PF_VECTOR;
12108 fault.error_code_valid = true;
12109 fault.error_code = 0;
12110 fault.nested_page_fault = false;
12111 fault.address = work->arch.token;
12112 fault.async_page_fault = true;
12113 kvm_inject_page_fault(vcpu, &fault);
12117 * It is not possible to deliver a paravirtualized asynchronous
12118 * page fault, but putting the guest in an artificial halt state
12119 * can be beneficial nevertheless: if an interrupt arrives, we
12120 * can deliver it timely and perhaps the guest will schedule
12121 * another process. When the instruction that triggered a page
12122 * fault is retried, hopefully the page will be ready in the host.
12124 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12129 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12130 struct kvm_async_pf *work)
12132 struct kvm_lapic_irq irq = {
12133 .delivery_mode = APIC_DM_FIXED,
12134 .vector = vcpu->arch.apf.vec
12137 if (work->wakeup_all)
12138 work->arch.token = ~0; /* broadcast wakeup */
12140 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12141 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12143 if ((work->wakeup_all || work->notpresent_injected) &&
12144 kvm_pv_async_pf_enabled(vcpu) &&
12145 !apf_put_user_ready(vcpu, work->arch.token)) {
12146 vcpu->arch.apf.pageready_pending = true;
12147 kvm_apic_set_irq(vcpu, &irq, NULL);
12150 vcpu->arch.apf.halted = false;
12151 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12154 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12156 kvm_make_request(KVM_REQ_APF_READY, vcpu);
12157 if (!vcpu->arch.apf.pageready_pending)
12158 kvm_vcpu_kick(vcpu);
12161 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12163 if (!kvm_pv_async_pf_enabled(vcpu))
12166 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12169 void kvm_arch_start_assignment(struct kvm *kvm)
12171 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12172 static_call_cond(kvm_x86_start_assignment)(kvm);
12174 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12176 void kvm_arch_end_assignment(struct kvm *kvm)
12178 atomic_dec(&kvm->arch.assigned_device_count);
12180 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12182 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
12184 return arch_atomic_read(&kvm->arch.assigned_device_count);
12186 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12188 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12190 atomic_inc(&kvm->arch.noncoherent_dma_count);
12192 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12194 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12196 atomic_dec(&kvm->arch.noncoherent_dma_count);
12198 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12200 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12202 return atomic_read(&kvm->arch.noncoherent_dma_count);
12204 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12206 bool kvm_arch_has_irq_bypass(void)
12211 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12212 struct irq_bypass_producer *prod)
12214 struct kvm_kernel_irqfd *irqfd =
12215 container_of(cons, struct kvm_kernel_irqfd, consumer);
12218 irqfd->producer = prod;
12219 kvm_arch_start_assignment(irqfd->kvm);
12220 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12221 prod->irq, irqfd->gsi, 1);
12224 kvm_arch_end_assignment(irqfd->kvm);
12229 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12230 struct irq_bypass_producer *prod)
12233 struct kvm_kernel_irqfd *irqfd =
12234 container_of(cons, struct kvm_kernel_irqfd, consumer);
12236 WARN_ON(irqfd->producer != prod);
12237 irqfd->producer = NULL;
12240 * When producer of consumer is unregistered, we change back to
12241 * remapped mode, so we can re-use the current implementation
12242 * when the irq is masked/disabled or the consumer side (KVM
12243 * int this case doesn't want to receive the interrupts.
12245 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12247 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12248 " fails: %d\n", irqfd->consumer.token, ret);
12250 kvm_arch_end_assignment(irqfd->kvm);
12253 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12254 uint32_t guest_irq, bool set)
12256 return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12259 bool kvm_vector_hashing_enabled(void)
12261 return vector_hashing;
12264 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12266 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12268 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12271 int kvm_spec_ctrl_test_value(u64 value)
12274 * test that setting IA32_SPEC_CTRL to given value
12275 * is allowed by the host processor
12279 unsigned long flags;
12282 local_irq_save(flags);
12284 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12286 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12289 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12291 local_irq_restore(flags);
12295 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12297 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12299 struct x86_exception fault;
12300 u32 access = error_code &
12301 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12303 if (!(error_code & PFERR_PRESENT_MASK) ||
12304 vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12306 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12307 * tables probably do not match the TLB. Just proceed
12308 * with the error code that the processor gave.
12310 fault.vector = PF_VECTOR;
12311 fault.error_code_valid = true;
12312 fault.error_code = error_code;
12313 fault.nested_page_fault = false;
12314 fault.address = gva;
12316 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12318 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12321 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12322 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12323 * indicates whether exit to userspace is needed.
12325 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12326 struct x86_exception *e)
12328 if (r == X86EMUL_PROPAGATE_FAULT) {
12329 kvm_inject_emulated_page_fault(vcpu, e);
12334 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12335 * while handling a VMX instruction KVM could've handled the request
12336 * correctly by exiting to userspace and performing I/O but there
12337 * doesn't seem to be a real use-case behind such requests, just return
12338 * KVM_EXIT_INTERNAL_ERROR for now.
12340 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12341 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12342 vcpu->run->internal.ndata = 0;
12346 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12348 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12351 struct x86_exception e;
12358 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12359 if (r != X86EMUL_CONTINUE)
12360 return kvm_handle_memory_failure(vcpu, r, &e);
12362 if (operand.pcid >> 12 != 0) {
12363 kvm_inject_gp(vcpu, 0);
12367 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12370 case INVPCID_TYPE_INDIV_ADDR:
12371 if ((!pcid_enabled && (operand.pcid != 0)) ||
12372 is_noncanonical_address(operand.gla, vcpu)) {
12373 kvm_inject_gp(vcpu, 0);
12376 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12377 return kvm_skip_emulated_instruction(vcpu);
12379 case INVPCID_TYPE_SINGLE_CTXT:
12380 if (!pcid_enabled && (operand.pcid != 0)) {
12381 kvm_inject_gp(vcpu, 0);
12385 kvm_invalidate_pcid(vcpu, operand.pcid);
12386 return kvm_skip_emulated_instruction(vcpu);
12388 case INVPCID_TYPE_ALL_NON_GLOBAL:
12390 * Currently, KVM doesn't mark global entries in the shadow
12391 * page tables, so a non-global flush just degenerates to a
12392 * global flush. If needed, we could optimize this later by
12393 * keeping track of global entries in shadow page tables.
12397 case INVPCID_TYPE_ALL_INCL_GLOBAL:
12398 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12399 return kvm_skip_emulated_instruction(vcpu);
12402 BUG(); /* We have already checked above that type <= 3 */
12405 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12407 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12409 struct kvm_run *run = vcpu->run;
12410 struct kvm_mmio_fragment *frag;
12413 BUG_ON(!vcpu->mmio_needed);
12415 /* Complete previous fragment */
12416 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12417 len = min(8u, frag->len);
12418 if (!vcpu->mmio_is_write)
12419 memcpy(frag->data, run->mmio.data, len);
12421 if (frag->len <= 8) {
12422 /* Switch to the next fragment. */
12424 vcpu->mmio_cur_fragment++;
12426 /* Go forward to the next mmio piece. */
12432 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12433 vcpu->mmio_needed = 0;
12435 // VMG change, at this point, we're always done
12436 // RIP has already been advanced
12440 // More MMIO is needed
12441 run->mmio.phys_addr = frag->gpa;
12442 run->mmio.len = min(8u, frag->len);
12443 run->mmio.is_write = vcpu->mmio_is_write;
12444 if (run->mmio.is_write)
12445 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12446 run->exit_reason = KVM_EXIT_MMIO;
12448 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12453 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12457 struct kvm_mmio_fragment *frag;
12462 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12463 if (handled == bytes)
12470 /*TODO: Check if need to increment number of frags */
12471 frag = vcpu->mmio_fragments;
12472 vcpu->mmio_nr_fragments = 1;
12477 vcpu->mmio_needed = 1;
12478 vcpu->mmio_cur_fragment = 0;
12480 vcpu->run->mmio.phys_addr = gpa;
12481 vcpu->run->mmio.len = min(8u, frag->len);
12482 vcpu->run->mmio.is_write = 1;
12483 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12484 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12486 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12490 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12492 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12496 struct kvm_mmio_fragment *frag;
12501 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12502 if (handled == bytes)
12509 /*TODO: Check if need to increment number of frags */
12510 frag = vcpu->mmio_fragments;
12511 vcpu->mmio_nr_fragments = 1;
12516 vcpu->mmio_needed = 1;
12517 vcpu->mmio_cur_fragment = 0;
12519 vcpu->run->mmio.phys_addr = gpa;
12520 vcpu->run->mmio.len = min(8u, frag->len);
12521 vcpu->run->mmio.is_write = 0;
12522 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12524 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12528 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12530 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12531 unsigned int port);
12533 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12535 int size = vcpu->arch.pio.size;
12536 int port = vcpu->arch.pio.port;
12538 vcpu->arch.pio.count = 0;
12539 if (vcpu->arch.sev_pio_count)
12540 return kvm_sev_es_outs(vcpu, size, port);
12544 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12548 unsigned int count =
12549 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12550 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12552 /* memcpy done already by emulator_pio_out. */
12553 vcpu->arch.sev_pio_count -= count;
12554 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12558 /* Emulation done by the kernel. */
12559 if (!vcpu->arch.sev_pio_count)
12563 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12567 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12568 unsigned int port);
12570 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12572 unsigned count = vcpu->arch.pio.count;
12573 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12574 vcpu->arch.sev_pio_count -= count;
12575 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12578 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12580 int size = vcpu->arch.pio.size;
12581 int port = vcpu->arch.pio.port;
12583 advance_sev_es_emulated_ins(vcpu);
12584 if (vcpu->arch.sev_pio_count)
12585 return kvm_sev_es_ins(vcpu, size, port);
12589 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12593 unsigned int count =
12594 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12595 if (!__emulator_pio_in(vcpu, size, port, count))
12598 /* Emulation done by the kernel. */
12599 advance_sev_es_emulated_ins(vcpu);
12600 if (!vcpu->arch.sev_pio_count)
12604 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12608 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12609 unsigned int port, void *data, unsigned int count,
12612 vcpu->arch.sev_pio_data = data;
12613 vcpu->arch.sev_pio_count = count;
12614 return in ? kvm_sev_es_ins(vcpu, size, port)
12615 : kvm_sev_es_outs(vcpu, size, port);
12617 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12619 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12620 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12621 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12622 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12623 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12624 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12645 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
12647 static int __init kvm_x86_init(void)
12649 kvm_mmu_x86_module_init();
12652 module_init(kvm_x86_init);
12654 static void __exit kvm_x86_exit(void)
12657 * If module_init() is implemented, module_exit() must also be
12658 * implemented to allow module unload.
12661 module_exit(kvm_x86_exit);