2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS \
63 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS \
67 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
69 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
71 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
93 struct kvm_cpuid_entry2 __user *entries);
95 struct kvm_x86_ops *kvm_x86_ops;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
101 #define KVM_NR_SHARED_MSRS 16
103 struct kvm_shared_msrs_global {
105 u32 msrs[KVM_NR_SHARED_MSRS];
108 struct kvm_shared_msrs {
109 struct user_return_notifier urn;
111 struct kvm_shared_msr_values {
114 } values[KVM_NR_SHARED_MSRS];
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
120 struct kvm_stats_debugfs_item debugfs_entries[] = {
121 { "pf_fixed", VCPU_STAT(pf_fixed) },
122 { "pf_guest", VCPU_STAT(pf_guest) },
123 { "tlb_flush", VCPU_STAT(tlb_flush) },
124 { "invlpg", VCPU_STAT(invlpg) },
125 { "exits", VCPU_STAT(exits) },
126 { "io_exits", VCPU_STAT(io_exits) },
127 { "mmio_exits", VCPU_STAT(mmio_exits) },
128 { "signal_exits", VCPU_STAT(signal_exits) },
129 { "irq_window", VCPU_STAT(irq_window_exits) },
130 { "nmi_window", VCPU_STAT(nmi_window_exits) },
131 { "halt_exits", VCPU_STAT(halt_exits) },
132 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
133 { "hypercalls", VCPU_STAT(hypercalls) },
134 { "request_irq", VCPU_STAT(request_irq_exits) },
135 { "irq_exits", VCPU_STAT(irq_exits) },
136 { "host_state_reload", VCPU_STAT(host_state_reload) },
137 { "efer_reload", VCPU_STAT(efer_reload) },
138 { "fpu_reload", VCPU_STAT(fpu_reload) },
139 { "insn_emulation", VCPU_STAT(insn_emulation) },
140 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
141 { "irq_injections", VCPU_STAT(irq_injections) },
142 { "nmi_injections", VCPU_STAT(nmi_injections) },
143 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
144 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
145 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
146 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
147 { "mmu_flooded", VM_STAT(mmu_flooded) },
148 { "mmu_recycled", VM_STAT(mmu_recycled) },
149 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
150 { "mmu_unsync", VM_STAT(mmu_unsync) },
151 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
152 { "largepages", VM_STAT(lpages) },
156 u64 __read_mostly host_xcr0;
158 static inline u32 bit(int bitno)
160 return 1 << (bitno & 31);
163 static void kvm_on_user_return(struct user_return_notifier *urn)
166 struct kvm_shared_msrs *locals
167 = container_of(urn, struct kvm_shared_msrs, urn);
168 struct kvm_shared_msr_values *values;
170 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
171 values = &locals->values[slot];
172 if (values->host != values->curr) {
173 wrmsrl(shared_msrs_global.msrs[slot], values->host);
174 values->curr = values->host;
177 locals->registered = false;
178 user_return_notifier_unregister(urn);
181 static void shared_msr_update(unsigned slot, u32 msr)
183 struct kvm_shared_msrs *smsr;
186 smsr = &__get_cpu_var(shared_msrs);
187 /* only read, and nobody should modify it at this time,
188 * so don't need lock */
189 if (slot >= shared_msrs_global.nr) {
190 printk(KERN_ERR "kvm: invalid MSR slot!");
193 rdmsrl_safe(msr, &value);
194 smsr->values[slot].host = value;
195 smsr->values[slot].curr = value;
198 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 if (slot >= shared_msrs_global.nr)
201 shared_msrs_global.nr = slot + 1;
202 shared_msrs_global.msrs[slot] = msr;
203 /* we need ensured the shared_msr_global have been updated */
206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208 static void kvm_shared_msr_cpu_online(void)
212 for (i = 0; i < shared_msrs_global.nr; ++i)
213 shared_msr_update(i, shared_msrs_global.msrs[i]);
216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220 if (((value ^ smsr->values[slot].curr) & mask) == 0)
222 smsr->values[slot].curr = value;
223 wrmsrl(shared_msrs_global.msrs[slot], value);
224 if (!smsr->registered) {
225 smsr->urn.on_user_return = kvm_on_user_return;
226 user_return_notifier_register(&smsr->urn);
227 smsr->registered = true;
230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232 static void drop_user_return_notifiers(void *ignore)
234 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236 if (smsr->registered)
237 kvm_on_user_return(&smsr->urn);
240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 if (irqchip_in_kernel(vcpu->kvm))
243 return vcpu->arch.apic_base;
245 return vcpu->arch.apic_base;
247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 /* TODO: reserve bits check */
252 if (irqchip_in_kernel(vcpu->kvm))
253 kvm_lapic_set_base(vcpu, data);
255 vcpu->arch.apic_base = data;
257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259 #define EXCPT_BENIGN 0
260 #define EXCPT_CONTRIBUTORY 1
263 static int exception_class(int vector)
273 return EXCPT_CONTRIBUTORY;
280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
281 unsigned nr, bool has_error, u32 error_code,
287 if (!vcpu->arch.exception.pending) {
289 vcpu->arch.exception.pending = true;
290 vcpu->arch.exception.has_error_code = has_error;
291 vcpu->arch.exception.nr = nr;
292 vcpu->arch.exception.error_code = error_code;
293 vcpu->arch.exception.reinject = reinject;
297 /* to check exception */
298 prev_nr = vcpu->arch.exception.nr;
299 if (prev_nr == DF_VECTOR) {
300 /* triple fault -> shutdown */
301 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
304 class1 = exception_class(prev_nr);
305 class2 = exception_class(nr);
306 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
307 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
308 /* generate double fault per SDM Table 5-5 */
309 vcpu->arch.exception.pending = true;
310 vcpu->arch.exception.has_error_code = true;
311 vcpu->arch.exception.nr = DF_VECTOR;
312 vcpu->arch.exception.error_code = 0;
314 /* replace previous exception with a new one in a hope
315 that instruction re-execution will regenerate lost
320 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
322 kvm_multiple_exception(vcpu, nr, false, 0, false);
324 EXPORT_SYMBOL_GPL(kvm_queue_exception);
326 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
328 kvm_multiple_exception(vcpu, nr, false, 0, true);
330 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
332 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
334 unsigned error_code = vcpu->arch.fault.error_code;
336 ++vcpu->stat.pf_guest;
337 vcpu->arch.cr2 = vcpu->arch.fault.address;
338 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
341 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
343 vcpu->arch.nmi_pending = 1;
345 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
347 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
349 kvm_multiple_exception(vcpu, nr, true, error_code, false);
351 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
353 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
355 kvm_multiple_exception(vcpu, nr, true, error_code, true);
357 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
360 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
361 * a #GP and return false.
363 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
365 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
367 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
370 EXPORT_SYMBOL_GPL(kvm_require_cpl);
373 * Load the pae pdptrs. Return true is they are all valid.
375 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
377 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
378 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
381 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
383 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
384 offset * sizeof(u64), sizeof(pdpte));
389 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
390 if (is_present_gpte(pdpte[i]) &&
391 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
398 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
399 __set_bit(VCPU_EXREG_PDPTR,
400 (unsigned long *)&vcpu->arch.regs_avail);
401 __set_bit(VCPU_EXREG_PDPTR,
402 (unsigned long *)&vcpu->arch.regs_dirty);
407 EXPORT_SYMBOL_GPL(load_pdptrs);
409 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
411 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
415 if (is_long_mode(vcpu) || !is_pae(vcpu))
418 if (!test_bit(VCPU_EXREG_PDPTR,
419 (unsigned long *)&vcpu->arch.regs_avail))
422 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
425 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
431 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
433 unsigned long old_cr0 = kvm_read_cr0(vcpu);
434 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
435 X86_CR0_CD | X86_CR0_NW;
440 if (cr0 & 0xffffffff00000000UL)
444 cr0 &= ~CR0_RESERVED_BITS;
446 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
449 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
452 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
454 if ((vcpu->arch.efer & EFER_LME)) {
459 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
464 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
468 kvm_x86_ops->set_cr0(vcpu, cr0);
470 if ((cr0 ^ old_cr0) & update_bits)
471 kvm_mmu_reset_context(vcpu);
474 EXPORT_SYMBOL_GPL(kvm_set_cr0);
476 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
478 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
480 EXPORT_SYMBOL_GPL(kvm_lmsw);
482 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
486 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
487 if (index != XCR_XFEATURE_ENABLED_MASK)
490 if (kvm_x86_ops->get_cpl(vcpu) != 0)
492 if (!(xcr0 & XSTATE_FP))
494 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
496 if (xcr0 & ~host_xcr0)
498 vcpu->arch.xcr0 = xcr0;
499 vcpu->guest_xcr0_loaded = 0;
503 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
505 if (__kvm_set_xcr(vcpu, index, xcr)) {
506 kvm_inject_gp(vcpu, 0);
511 EXPORT_SYMBOL_GPL(kvm_set_xcr);
513 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
515 struct kvm_cpuid_entry2 *best;
517 best = kvm_find_cpuid_entry(vcpu, 1, 0);
518 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
521 static void update_cpuid(struct kvm_vcpu *vcpu)
523 struct kvm_cpuid_entry2 *best;
525 best = kvm_find_cpuid_entry(vcpu, 1, 0);
529 /* Update OSXSAVE bit */
530 if (cpu_has_xsave && best->function == 0x1) {
531 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
532 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
533 best->ecx |= bit(X86_FEATURE_OSXSAVE);
537 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
539 unsigned long old_cr4 = kvm_read_cr4(vcpu);
540 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
542 if (cr4 & CR4_RESERVED_BITS)
545 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
548 if (is_long_mode(vcpu)) {
549 if (!(cr4 & X86_CR4_PAE))
551 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
552 && ((cr4 ^ old_cr4) & pdptr_bits)
553 && !load_pdptrs(vcpu, vcpu->arch.cr3))
556 if (cr4 & X86_CR4_VMXE)
559 kvm_x86_ops->set_cr4(vcpu, cr4);
561 if ((cr4 ^ old_cr4) & pdptr_bits)
562 kvm_mmu_reset_context(vcpu);
564 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
569 EXPORT_SYMBOL_GPL(kvm_set_cr4);
571 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
573 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
574 kvm_mmu_sync_roots(vcpu);
575 kvm_mmu_flush_tlb(vcpu);
579 if (is_long_mode(vcpu)) {
580 if (cr3 & CR3_L_MODE_RESERVED_BITS)
584 if (cr3 & CR3_PAE_RESERVED_BITS)
586 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
590 * We don't check reserved bits in nonpae mode, because
591 * this isn't enforced, and VMware depends on this.
596 * Does the new cr3 value map to physical memory? (Note, we
597 * catch an invalid cr3 even in real-mode, because it would
598 * cause trouble later on when we turn on paging anyway.)
600 * A real CPU would silently accept an invalid cr3 and would
601 * attempt to use it - with largely undefined (and often hard
602 * to debug) behavior on the guest side.
604 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
606 vcpu->arch.cr3 = cr3;
607 vcpu->arch.mmu.new_cr3(vcpu);
610 EXPORT_SYMBOL_GPL(kvm_set_cr3);
612 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
614 if (cr8 & CR8_RESERVED_BITS)
616 if (irqchip_in_kernel(vcpu->kvm))
617 kvm_lapic_set_tpr(vcpu, cr8);
619 vcpu->arch.cr8 = cr8;
623 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
625 if (__kvm_set_cr8(vcpu, cr8))
626 kvm_inject_gp(vcpu, 0);
628 EXPORT_SYMBOL_GPL(kvm_set_cr8);
630 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
632 if (irqchip_in_kernel(vcpu->kvm))
633 return kvm_lapic_get_cr8(vcpu);
635 return vcpu->arch.cr8;
637 EXPORT_SYMBOL_GPL(kvm_get_cr8);
639 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
643 vcpu->arch.db[dr] = val;
644 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
645 vcpu->arch.eff_db[dr] = val;
648 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
652 if (val & 0xffffffff00000000ULL)
654 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
657 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
661 if (val & 0xffffffff00000000ULL)
663 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
664 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
665 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
666 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
674 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
678 res = __kvm_set_dr(vcpu, dr, val);
680 kvm_queue_exception(vcpu, UD_VECTOR);
682 kvm_inject_gp(vcpu, 0);
686 EXPORT_SYMBOL_GPL(kvm_set_dr);
688 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
692 *val = vcpu->arch.db[dr];
695 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
699 *val = vcpu->arch.dr6;
702 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
706 *val = vcpu->arch.dr7;
713 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
715 if (_kvm_get_dr(vcpu, dr, val)) {
716 kvm_queue_exception(vcpu, UD_VECTOR);
721 EXPORT_SYMBOL_GPL(kvm_get_dr);
724 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
725 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
727 * This list is modified at module load time to reflect the
728 * capabilities of the host cpu. This capabilities test skips MSRs that are
729 * kvm-specific. Those are put in the beginning of the list.
732 #define KVM_SAVE_MSRS_BEGIN 7
733 static u32 msrs_to_save[] = {
734 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
735 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
736 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
737 HV_X64_MSR_APIC_ASSIST_PAGE,
738 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
741 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
743 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
746 static unsigned num_msrs_to_save;
748 static u32 emulated_msrs[] = {
749 MSR_IA32_MISC_ENABLE,
754 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
756 u64 old_efer = vcpu->arch.efer;
758 if (efer & efer_reserved_bits)
762 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
765 if (efer & EFER_FFXSR) {
766 struct kvm_cpuid_entry2 *feat;
768 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
769 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
773 if (efer & EFER_SVME) {
774 struct kvm_cpuid_entry2 *feat;
776 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
777 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
782 efer |= vcpu->arch.efer & EFER_LMA;
784 kvm_x86_ops->set_efer(vcpu, efer);
786 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
787 kvm_mmu_reset_context(vcpu);
789 /* Update reserved bits */
790 if ((efer ^ old_efer) & EFER_NX)
791 kvm_mmu_reset_context(vcpu);
796 void kvm_enable_efer_bits(u64 mask)
798 efer_reserved_bits &= ~mask;
800 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
804 * Writes msr value into into the appropriate "register".
805 * Returns 0 on success, non-0 otherwise.
806 * Assumes vcpu_load() was already called.
808 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
810 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
814 * Adapt set_msr() to msr_io()'s calling convention
816 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
818 return kvm_set_msr(vcpu, index, *data);
821 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
825 struct pvclock_wall_clock wc;
826 struct timespec boot;
831 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
836 ++version; /* first time write, random junk */
840 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
843 * The guest calculates current wall clock time by adding
844 * system time (updated by kvm_write_guest_time below) to the
845 * wall clock specified here. guest system time equals host
846 * system time for us, thus we must fill in host boot time here.
850 wc.sec = boot.tv_sec;
851 wc.nsec = boot.tv_nsec;
852 wc.version = version;
854 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
857 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
860 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
862 uint32_t quotient, remainder;
864 /* Don't try to replace with do_div(), this one calculates
865 * "(dividend << 32) / divisor" */
867 : "=a" (quotient), "=d" (remainder)
868 : "0" (0), "1" (dividend), "r" (divisor) );
872 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
874 uint64_t nsecs = 1000000000LL;
879 tps64 = tsc_khz * 1000LL;
880 while (tps64 > nsecs*2) {
885 tps32 = (uint32_t)tps64;
886 while (tps32 <= (uint32_t)nsecs) {
891 hv_clock->tsc_shift = shift;
892 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
894 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
895 __func__, tsc_khz, hv_clock->tsc_shift,
896 hv_clock->tsc_to_system_mul);
899 static inline u64 get_kernel_ns(void)
903 WARN_ON(preemptible());
905 monotonic_to_bootbased(&ts);
906 return timespec_to_ns(&ts);
909 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
911 static inline int kvm_tsc_changes_freq(void)
914 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
915 cpufreq_quick_get(cpu) != 0;
920 static inline u64 nsec_to_cycles(u64 nsec)
924 WARN_ON(preemptible());
925 if (kvm_tsc_changes_freq())
926 printk_once(KERN_WARNING
927 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
928 ret = nsec * __get_cpu_var(cpu_tsc_khz);
929 do_div(ret, USEC_PER_SEC);
933 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
935 struct kvm *kvm = vcpu->kvm;
936 u64 offset, ns, elapsed;
940 spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
941 offset = data - native_read_tsc();
942 ns = get_kernel_ns();
943 elapsed = ns - kvm->arch.last_tsc_nsec;
944 sdiff = data - kvm->arch.last_tsc_write;
949 * Special case: close write to TSC within 5 seconds of
950 * another CPU is interpreted as an attempt to synchronize
951 * The 5 seconds is to accomodate host load / swapping as
952 * well as any reset of TSC during the boot process.
954 * In that case, for a reliable TSC, we can match TSC offsets,
955 * or make a best guest using elapsed value.
957 if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
958 elapsed < 5ULL * NSEC_PER_SEC) {
959 if (!check_tsc_unstable()) {
960 offset = kvm->arch.last_tsc_offset;
961 pr_debug("kvm: matched tsc offset for %llu\n", data);
963 u64 delta = nsec_to_cycles(elapsed);
965 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
967 ns = kvm->arch.last_tsc_nsec;
969 kvm->arch.last_tsc_nsec = ns;
970 kvm->arch.last_tsc_write = data;
971 kvm->arch.last_tsc_offset = offset;
972 kvm_x86_ops->write_tsc_offset(vcpu, offset);
973 spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
975 /* Reset of TSC must disable overshoot protection below */
976 vcpu->arch.hv_clock.tsc_timestamp = 0;
978 EXPORT_SYMBOL_GPL(kvm_write_tsc);
980 static int kvm_write_guest_time(struct kvm_vcpu *v)
983 struct kvm_vcpu_arch *vcpu = &v->arch;
985 unsigned long this_tsc_khz;
986 s64 kernel_ns, max_kernel_ns;
989 if ((!vcpu->time_page))
992 /* Keep irq disabled to prevent changes to the clock */
993 local_irq_save(flags);
994 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
995 kernel_ns = get_kernel_ns();
996 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
997 local_irq_restore(flags);
999 if (unlikely(this_tsc_khz == 0)) {
1000 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1005 * Time as measured by the TSC may go backwards when resetting the base
1006 * tsc_timestamp. The reason for this is that the TSC resolution is
1007 * higher than the resolution of the other clock scales. Thus, many
1008 * possible measurments of the TSC correspond to one measurement of any
1009 * other clock, and so a spread of values is possible. This is not a
1010 * problem for the computation of the nanosecond clock; with TSC rates
1011 * around 1GHZ, there can only be a few cycles which correspond to one
1012 * nanosecond value, and any path through this code will inevitably
1013 * take longer than that. However, with the kernel_ns value itself,
1014 * the precision may be much lower, down to HZ granularity. If the
1015 * first sampling of TSC against kernel_ns ends in the low part of the
1016 * range, and the second in the high end of the range, we can get:
1018 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1020 * As the sampling errors potentially range in the thousands of cycles,
1021 * it is possible such a time value has already been observed by the
1022 * guest. To protect against this, we must compute the system time as
1023 * observed by the guest and ensure the new system time is greater.
1026 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1027 max_kernel_ns = vcpu->last_guest_tsc -
1028 vcpu->hv_clock.tsc_timestamp;
1029 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1030 vcpu->hv_clock.tsc_to_system_mul,
1031 vcpu->hv_clock.tsc_shift);
1032 max_kernel_ns += vcpu->last_kernel_ns;
1035 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1036 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
1037 vcpu->hw_tsc_khz = this_tsc_khz;
1040 if (max_kernel_ns > kernel_ns)
1041 kernel_ns = max_kernel_ns;
1043 /* With all the info we got, fill in the values */
1044 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1045 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1046 vcpu->last_kernel_ns = kernel_ns;
1047 vcpu->hv_clock.flags = 0;
1050 * The interface expects us to write an even number signaling that the
1051 * update is finished. Since the guest won't see the intermediate
1052 * state, we just increase by 2 at the end.
1054 vcpu->hv_clock.version += 2;
1056 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1058 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1059 sizeof(vcpu->hv_clock));
1061 kunmap_atomic(shared_kaddr, KM_USER0);
1063 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1067 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1069 struct kvm_vcpu_arch *vcpu = &v->arch;
1071 if (!vcpu->time_page)
1073 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1077 static bool msr_mtrr_valid(unsigned msr)
1080 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1081 case MSR_MTRRfix64K_00000:
1082 case MSR_MTRRfix16K_80000:
1083 case MSR_MTRRfix16K_A0000:
1084 case MSR_MTRRfix4K_C0000:
1085 case MSR_MTRRfix4K_C8000:
1086 case MSR_MTRRfix4K_D0000:
1087 case MSR_MTRRfix4K_D8000:
1088 case MSR_MTRRfix4K_E0000:
1089 case MSR_MTRRfix4K_E8000:
1090 case MSR_MTRRfix4K_F0000:
1091 case MSR_MTRRfix4K_F8000:
1092 case MSR_MTRRdefType:
1093 case MSR_IA32_CR_PAT:
1101 static bool valid_pat_type(unsigned t)
1103 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1106 static bool valid_mtrr_type(unsigned t)
1108 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1111 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1115 if (!msr_mtrr_valid(msr))
1118 if (msr == MSR_IA32_CR_PAT) {
1119 for (i = 0; i < 8; i++)
1120 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1123 } else if (msr == MSR_MTRRdefType) {
1126 return valid_mtrr_type(data & 0xff);
1127 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1128 for (i = 0; i < 8 ; i++)
1129 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1134 /* variable MTRRs */
1135 return valid_mtrr_type(data & 0xff);
1138 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1140 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1142 if (!mtrr_valid(vcpu, msr, data))
1145 if (msr == MSR_MTRRdefType) {
1146 vcpu->arch.mtrr_state.def_type = data;
1147 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1148 } else if (msr == MSR_MTRRfix64K_00000)
1150 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1151 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1152 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1153 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1154 else if (msr == MSR_IA32_CR_PAT)
1155 vcpu->arch.pat = data;
1156 else { /* Variable MTRRs */
1157 int idx, is_mtrr_mask;
1160 idx = (msr - 0x200) / 2;
1161 is_mtrr_mask = msr - 0x200 - 2 * idx;
1164 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1167 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1171 kvm_mmu_reset_context(vcpu);
1175 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1177 u64 mcg_cap = vcpu->arch.mcg_cap;
1178 unsigned bank_num = mcg_cap & 0xff;
1181 case MSR_IA32_MCG_STATUS:
1182 vcpu->arch.mcg_status = data;
1184 case MSR_IA32_MCG_CTL:
1185 if (!(mcg_cap & MCG_CTL_P))
1187 if (data != 0 && data != ~(u64)0)
1189 vcpu->arch.mcg_ctl = data;
1192 if (msr >= MSR_IA32_MC0_CTL &&
1193 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1194 u32 offset = msr - MSR_IA32_MC0_CTL;
1195 /* only 0 or all 1s can be written to IA32_MCi_CTL
1196 * some Linux kernels though clear bit 10 in bank 4 to
1197 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1198 * this to avoid an uncatched #GP in the guest
1200 if ((offset & 0x3) == 0 &&
1201 data != 0 && (data | (1 << 10)) != ~(u64)0)
1203 vcpu->arch.mce_banks[offset] = data;
1211 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1213 struct kvm *kvm = vcpu->kvm;
1214 int lm = is_long_mode(vcpu);
1215 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1216 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1217 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1218 : kvm->arch.xen_hvm_config.blob_size_32;
1219 u32 page_num = data & ~PAGE_MASK;
1220 u64 page_addr = data & PAGE_MASK;
1225 if (page_num >= blob_size)
1228 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1232 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1234 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1243 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1245 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1248 static bool kvm_hv_msr_partition_wide(u32 msr)
1252 case HV_X64_MSR_GUEST_OS_ID:
1253 case HV_X64_MSR_HYPERCALL:
1261 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1263 struct kvm *kvm = vcpu->kvm;
1266 case HV_X64_MSR_GUEST_OS_ID:
1267 kvm->arch.hv_guest_os_id = data;
1268 /* setting guest os id to zero disables hypercall page */
1269 if (!kvm->arch.hv_guest_os_id)
1270 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1272 case HV_X64_MSR_HYPERCALL: {
1277 /* if guest os id is not set hypercall should remain disabled */
1278 if (!kvm->arch.hv_guest_os_id)
1280 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1281 kvm->arch.hv_hypercall = data;
1284 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1285 addr = gfn_to_hva(kvm, gfn);
1286 if (kvm_is_error_hva(addr))
1288 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1289 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1290 if (copy_to_user((void __user *)addr, instructions, 4))
1292 kvm->arch.hv_hypercall = data;
1296 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1297 "data 0x%llx\n", msr, data);
1303 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1306 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1309 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1310 vcpu->arch.hv_vapic = data;
1313 addr = gfn_to_hva(vcpu->kvm, data >>
1314 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1315 if (kvm_is_error_hva(addr))
1317 if (clear_user((void __user *)addr, PAGE_SIZE))
1319 vcpu->arch.hv_vapic = data;
1322 case HV_X64_MSR_EOI:
1323 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1324 case HV_X64_MSR_ICR:
1325 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1326 case HV_X64_MSR_TPR:
1327 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1329 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1330 "data 0x%llx\n", msr, data);
1337 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1341 return set_efer(vcpu, data);
1343 data &= ~(u64)0x40; /* ignore flush filter disable */
1344 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1346 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1351 case MSR_FAM10H_MMIO_CONF_BASE:
1353 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1358 case MSR_AMD64_NB_CFG:
1360 case MSR_IA32_DEBUGCTLMSR:
1362 /* We support the non-activated case already */
1364 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1365 /* Values other than LBR and BTF are vendor-specific,
1366 thus reserved and should throw a #GP */
1369 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1372 case MSR_IA32_UCODE_REV:
1373 case MSR_IA32_UCODE_WRITE:
1374 case MSR_VM_HSAVE_PA:
1375 case MSR_AMD64_PATCH_LOADER:
1377 case 0x200 ... 0x2ff:
1378 return set_msr_mtrr(vcpu, msr, data);
1379 case MSR_IA32_APICBASE:
1380 kvm_set_apic_base(vcpu, data);
1382 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1383 return kvm_x2apic_msr_write(vcpu, msr, data);
1384 case MSR_IA32_MISC_ENABLE:
1385 vcpu->arch.ia32_misc_enable_msr = data;
1387 case MSR_KVM_WALL_CLOCK_NEW:
1388 case MSR_KVM_WALL_CLOCK:
1389 vcpu->kvm->arch.wall_clock = data;
1390 kvm_write_wall_clock(vcpu->kvm, data);
1392 case MSR_KVM_SYSTEM_TIME_NEW:
1393 case MSR_KVM_SYSTEM_TIME: {
1394 if (vcpu->arch.time_page) {
1395 kvm_release_page_dirty(vcpu->arch.time_page);
1396 vcpu->arch.time_page = NULL;
1399 vcpu->arch.time = data;
1401 /* we verify if the enable bit is set... */
1405 /* ...but clean it before doing the actual write */
1406 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1408 vcpu->arch.time_page =
1409 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1411 if (is_error_page(vcpu->arch.time_page)) {
1412 kvm_release_page_clean(vcpu->arch.time_page);
1413 vcpu->arch.time_page = NULL;
1416 kvm_request_guest_time_update(vcpu);
1419 case MSR_IA32_MCG_CTL:
1420 case MSR_IA32_MCG_STATUS:
1421 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1422 return set_msr_mce(vcpu, msr, data);
1424 /* Performance counters are not protected by a CPUID bit,
1425 * so we should check all of them in the generic path for the sake of
1426 * cross vendor migration.
1427 * Writing a zero into the event select MSRs disables them,
1428 * which we perfectly emulate ;-). Any other value should be at least
1429 * reported, some guests depend on them.
1431 case MSR_P6_EVNTSEL0:
1432 case MSR_P6_EVNTSEL1:
1433 case MSR_K7_EVNTSEL0:
1434 case MSR_K7_EVNTSEL1:
1435 case MSR_K7_EVNTSEL2:
1436 case MSR_K7_EVNTSEL3:
1438 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1439 "0x%x data 0x%llx\n", msr, data);
1441 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1442 * so we ignore writes to make it happy.
1444 case MSR_P6_PERFCTR0:
1445 case MSR_P6_PERFCTR1:
1446 case MSR_K7_PERFCTR0:
1447 case MSR_K7_PERFCTR1:
1448 case MSR_K7_PERFCTR2:
1449 case MSR_K7_PERFCTR3:
1450 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1451 "0x%x data 0x%llx\n", msr, data);
1453 case MSR_K7_CLK_CTL:
1455 * Ignore all writes to this no longer documented MSR.
1456 * Writes are only relevant for old K7 processors,
1457 * all pre-dating SVM, but a recommended workaround from
1458 * AMD for these chips. It is possible to speicify the
1459 * affected processor models on the command line, hence
1460 * the need to ignore the workaround.
1463 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1464 if (kvm_hv_msr_partition_wide(msr)) {
1466 mutex_lock(&vcpu->kvm->lock);
1467 r = set_msr_hyperv_pw(vcpu, msr, data);
1468 mutex_unlock(&vcpu->kvm->lock);
1471 return set_msr_hyperv(vcpu, msr, data);
1474 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1475 return xen_hvm_config(vcpu, data);
1477 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1481 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1488 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1492 * Reads an msr value (of 'msr_index') into 'pdata'.
1493 * Returns 0 on success, non-0 otherwise.
1494 * Assumes vcpu_load() was already called.
1496 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1498 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1501 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1503 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1505 if (!msr_mtrr_valid(msr))
1508 if (msr == MSR_MTRRdefType)
1509 *pdata = vcpu->arch.mtrr_state.def_type +
1510 (vcpu->arch.mtrr_state.enabled << 10);
1511 else if (msr == MSR_MTRRfix64K_00000)
1513 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1514 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1515 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1516 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1517 else if (msr == MSR_IA32_CR_PAT)
1518 *pdata = vcpu->arch.pat;
1519 else { /* Variable MTRRs */
1520 int idx, is_mtrr_mask;
1523 idx = (msr - 0x200) / 2;
1524 is_mtrr_mask = msr - 0x200 - 2 * idx;
1527 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1530 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1537 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1540 u64 mcg_cap = vcpu->arch.mcg_cap;
1541 unsigned bank_num = mcg_cap & 0xff;
1544 case MSR_IA32_P5_MC_ADDR:
1545 case MSR_IA32_P5_MC_TYPE:
1548 case MSR_IA32_MCG_CAP:
1549 data = vcpu->arch.mcg_cap;
1551 case MSR_IA32_MCG_CTL:
1552 if (!(mcg_cap & MCG_CTL_P))
1554 data = vcpu->arch.mcg_ctl;
1556 case MSR_IA32_MCG_STATUS:
1557 data = vcpu->arch.mcg_status;
1560 if (msr >= MSR_IA32_MC0_CTL &&
1561 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1562 u32 offset = msr - MSR_IA32_MC0_CTL;
1563 data = vcpu->arch.mce_banks[offset];
1572 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1575 struct kvm *kvm = vcpu->kvm;
1578 case HV_X64_MSR_GUEST_OS_ID:
1579 data = kvm->arch.hv_guest_os_id;
1581 case HV_X64_MSR_HYPERCALL:
1582 data = kvm->arch.hv_hypercall;
1585 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1593 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1598 case HV_X64_MSR_VP_INDEX: {
1601 kvm_for_each_vcpu(r, v, vcpu->kvm)
1606 case HV_X64_MSR_EOI:
1607 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1608 case HV_X64_MSR_ICR:
1609 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1610 case HV_X64_MSR_TPR:
1611 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1613 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1620 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1625 case MSR_IA32_PLATFORM_ID:
1626 case MSR_IA32_UCODE_REV:
1627 case MSR_IA32_EBL_CR_POWERON:
1628 case MSR_IA32_DEBUGCTLMSR:
1629 case MSR_IA32_LASTBRANCHFROMIP:
1630 case MSR_IA32_LASTBRANCHTOIP:
1631 case MSR_IA32_LASTINTFROMIP:
1632 case MSR_IA32_LASTINTTOIP:
1635 case MSR_VM_HSAVE_PA:
1636 case MSR_P6_PERFCTR0:
1637 case MSR_P6_PERFCTR1:
1638 case MSR_P6_EVNTSEL0:
1639 case MSR_P6_EVNTSEL1:
1640 case MSR_K7_EVNTSEL0:
1641 case MSR_K7_PERFCTR0:
1642 case MSR_K8_INT_PENDING_MSG:
1643 case MSR_AMD64_NB_CFG:
1644 case MSR_FAM10H_MMIO_CONF_BASE:
1648 data = 0x500 | KVM_NR_VAR_MTRR;
1650 case 0x200 ... 0x2ff:
1651 return get_msr_mtrr(vcpu, msr, pdata);
1652 case 0xcd: /* fsb frequency */
1656 * MSR_EBC_FREQUENCY_ID
1657 * Conservative value valid for even the basic CPU models.
1658 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1659 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1660 * and 266MHz for model 3, or 4. Set Core Clock
1661 * Frequency to System Bus Frequency Ratio to 1 (bits
1662 * 31:24) even though these are only valid for CPU
1663 * models > 2, however guests may end up dividing or
1664 * multiplying by zero otherwise.
1666 case MSR_EBC_FREQUENCY_ID:
1669 case MSR_IA32_APICBASE:
1670 data = kvm_get_apic_base(vcpu);
1672 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1673 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1675 case MSR_IA32_MISC_ENABLE:
1676 data = vcpu->arch.ia32_misc_enable_msr;
1678 case MSR_IA32_PERF_STATUS:
1679 /* TSC increment by tick */
1681 /* CPU multiplier */
1682 data |= (((uint64_t)4ULL) << 40);
1685 data = vcpu->arch.efer;
1687 case MSR_KVM_WALL_CLOCK:
1688 case MSR_KVM_WALL_CLOCK_NEW:
1689 data = vcpu->kvm->arch.wall_clock;
1691 case MSR_KVM_SYSTEM_TIME:
1692 case MSR_KVM_SYSTEM_TIME_NEW:
1693 data = vcpu->arch.time;
1695 case MSR_IA32_P5_MC_ADDR:
1696 case MSR_IA32_P5_MC_TYPE:
1697 case MSR_IA32_MCG_CAP:
1698 case MSR_IA32_MCG_CTL:
1699 case MSR_IA32_MCG_STATUS:
1700 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1701 return get_msr_mce(vcpu, msr, pdata);
1702 case MSR_K7_CLK_CTL:
1704 * Provide expected ramp-up count for K7. All other
1705 * are set to zero, indicating minimum divisors for
1708 * This prevents guest kernels on AMD host with CPU
1709 * type 6, model 8 and higher from exploding due to
1710 * the rdmsr failing.
1714 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1715 if (kvm_hv_msr_partition_wide(msr)) {
1717 mutex_lock(&vcpu->kvm->lock);
1718 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1719 mutex_unlock(&vcpu->kvm->lock);
1722 return get_msr_hyperv(vcpu, msr, pdata);
1726 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1729 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1737 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1740 * Read or write a bunch of msrs. All parameters are kernel addresses.
1742 * @return number of msrs set successfully.
1744 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1745 struct kvm_msr_entry *entries,
1746 int (*do_msr)(struct kvm_vcpu *vcpu,
1747 unsigned index, u64 *data))
1751 idx = srcu_read_lock(&vcpu->kvm->srcu);
1752 for (i = 0; i < msrs->nmsrs; ++i)
1753 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1755 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1761 * Read or write a bunch of msrs. Parameters are user addresses.
1763 * @return number of msrs set successfully.
1765 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1766 int (*do_msr)(struct kvm_vcpu *vcpu,
1767 unsigned index, u64 *data),
1770 struct kvm_msrs msrs;
1771 struct kvm_msr_entry *entries;
1776 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1780 if (msrs.nmsrs >= MAX_IO_MSRS)
1784 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1785 entries = kmalloc(size, GFP_KERNEL);
1790 if (copy_from_user(entries, user_msrs->entries, size))
1793 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1798 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1809 int kvm_dev_ioctl_check_extension(long ext)
1814 case KVM_CAP_IRQCHIP:
1816 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1817 case KVM_CAP_SET_TSS_ADDR:
1818 case KVM_CAP_EXT_CPUID:
1819 case KVM_CAP_CLOCKSOURCE:
1821 case KVM_CAP_NOP_IO_DELAY:
1822 case KVM_CAP_MP_STATE:
1823 case KVM_CAP_SYNC_MMU:
1824 case KVM_CAP_REINJECT_CONTROL:
1825 case KVM_CAP_IRQ_INJECT_STATUS:
1826 case KVM_CAP_ASSIGN_DEV_IRQ:
1828 case KVM_CAP_IOEVENTFD:
1830 case KVM_CAP_PIT_STATE2:
1831 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1832 case KVM_CAP_XEN_HVM:
1833 case KVM_CAP_ADJUST_CLOCK:
1834 case KVM_CAP_VCPU_EVENTS:
1835 case KVM_CAP_HYPERV:
1836 case KVM_CAP_HYPERV_VAPIC:
1837 case KVM_CAP_HYPERV_SPIN:
1838 case KVM_CAP_PCI_SEGMENT:
1839 case KVM_CAP_DEBUGREGS:
1840 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1844 case KVM_CAP_COALESCED_MMIO:
1845 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1848 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1850 case KVM_CAP_NR_VCPUS:
1853 case KVM_CAP_NR_MEMSLOTS:
1854 r = KVM_MEMORY_SLOTS;
1856 case KVM_CAP_PV_MMU: /* obsolete */
1863 r = KVM_MAX_MCE_BANKS;
1876 long kvm_arch_dev_ioctl(struct file *filp,
1877 unsigned int ioctl, unsigned long arg)
1879 void __user *argp = (void __user *)arg;
1883 case KVM_GET_MSR_INDEX_LIST: {
1884 struct kvm_msr_list __user *user_msr_list = argp;
1885 struct kvm_msr_list msr_list;
1889 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1892 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1893 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1896 if (n < msr_list.nmsrs)
1899 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1900 num_msrs_to_save * sizeof(u32)))
1902 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1904 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1909 case KVM_GET_SUPPORTED_CPUID: {
1910 struct kvm_cpuid2 __user *cpuid_arg = argp;
1911 struct kvm_cpuid2 cpuid;
1914 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1916 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1917 cpuid_arg->entries);
1922 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1927 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1930 mce_cap = KVM_MCE_CAP_SUPPORTED;
1932 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1944 static void wbinvd_ipi(void *garbage)
1949 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1951 return vcpu->kvm->arch.iommu_domain &&
1952 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1955 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1957 /* Address WBINVD may be executed by guest */
1958 if (need_emulate_wbinvd(vcpu)) {
1959 if (kvm_x86_ops->has_wbinvd_exit())
1960 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1961 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1962 smp_call_function_single(vcpu->cpu,
1963 wbinvd_ipi, NULL, 1);
1966 kvm_x86_ops->vcpu_load(vcpu, cpu);
1967 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
1968 /* Make sure TSC doesn't go backwards */
1969 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
1970 native_read_tsc() - vcpu->arch.last_host_tsc;
1972 mark_tsc_unstable("KVM discovered backwards TSC");
1973 if (check_tsc_unstable())
1974 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
1975 kvm_migrate_timers(vcpu);
1980 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1982 kvm_x86_ops->vcpu_put(vcpu);
1983 kvm_put_guest_fpu(vcpu);
1984 vcpu->arch.last_host_tsc = native_read_tsc();
1987 static int is_efer_nx(void)
1989 unsigned long long efer = 0;
1991 rdmsrl_safe(MSR_EFER, &efer);
1992 return efer & EFER_NX;
1995 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1998 struct kvm_cpuid_entry2 *e, *entry;
2001 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2002 e = &vcpu->arch.cpuid_entries[i];
2003 if (e->function == 0x80000001) {
2008 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2009 entry->edx &= ~(1 << 20);
2010 printk(KERN_INFO "kvm: guest NX capability removed\n");
2014 /* when an old userspace process fills a new kernel module */
2015 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2016 struct kvm_cpuid *cpuid,
2017 struct kvm_cpuid_entry __user *entries)
2020 struct kvm_cpuid_entry *cpuid_entries;
2023 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2026 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2030 if (copy_from_user(cpuid_entries, entries,
2031 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2033 for (i = 0; i < cpuid->nent; i++) {
2034 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2035 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2036 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2037 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2038 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2039 vcpu->arch.cpuid_entries[i].index = 0;
2040 vcpu->arch.cpuid_entries[i].flags = 0;
2041 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2042 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2043 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2045 vcpu->arch.cpuid_nent = cpuid->nent;
2046 cpuid_fix_nx_cap(vcpu);
2048 kvm_apic_set_version(vcpu);
2049 kvm_x86_ops->cpuid_update(vcpu);
2053 vfree(cpuid_entries);
2058 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2059 struct kvm_cpuid2 *cpuid,
2060 struct kvm_cpuid_entry2 __user *entries)
2065 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2068 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2069 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2071 vcpu->arch.cpuid_nent = cpuid->nent;
2072 kvm_apic_set_version(vcpu);
2073 kvm_x86_ops->cpuid_update(vcpu);
2081 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2082 struct kvm_cpuid2 *cpuid,
2083 struct kvm_cpuid_entry2 __user *entries)
2088 if (cpuid->nent < vcpu->arch.cpuid_nent)
2091 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2092 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2097 cpuid->nent = vcpu->arch.cpuid_nent;
2101 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2104 entry->function = function;
2105 entry->index = index;
2106 cpuid_count(entry->function, entry->index,
2107 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2111 #define F(x) bit(X86_FEATURE_##x)
2113 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2114 u32 index, int *nent, int maxnent)
2116 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2117 #ifdef CONFIG_X86_64
2118 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2120 unsigned f_lm = F(LM);
2122 unsigned f_gbpages = 0;
2125 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2128 const u32 kvm_supported_word0_x86_features =
2129 F(FPU) | F(VME) | F(DE) | F(PSE) |
2130 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2131 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2132 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2133 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2134 0 /* Reserved, DS, ACPI */ | F(MMX) |
2135 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2136 0 /* HTT, TM, Reserved, PBE */;
2137 /* cpuid 0x80000001.edx */
2138 const u32 kvm_supported_word1_x86_features =
2139 F(FPU) | F(VME) | F(DE) | F(PSE) |
2140 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2141 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2142 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2143 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2144 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2145 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2146 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2148 const u32 kvm_supported_word4_x86_features =
2149 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2150 0 /* DS-CPL, VMX, SMX, EST */ |
2151 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2152 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2153 0 /* Reserved, DCA */ | F(XMM4_1) |
2154 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2155 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2156 /* cpuid 0x80000001.ecx */
2157 const u32 kvm_supported_word6_x86_features =
2158 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2159 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2160 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2161 0 /* SKINIT */ | 0 /* WDT */;
2163 /* all calls to cpuid_count() should be made on the same cpu */
2165 do_cpuid_1_ent(entry, function, index);
2170 entry->eax = min(entry->eax, (u32)0xd);
2173 entry->edx &= kvm_supported_word0_x86_features;
2174 entry->ecx &= kvm_supported_word4_x86_features;
2175 /* we support x2apic emulation even if host does not support
2176 * it since we emulate x2apic in software */
2177 entry->ecx |= F(X2APIC);
2179 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2180 * may return different values. This forces us to get_cpu() before
2181 * issuing the first command, and also to emulate this annoying behavior
2182 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2184 int t, times = entry->eax & 0xff;
2186 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2187 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2188 for (t = 1; t < times && *nent < maxnent; ++t) {
2189 do_cpuid_1_ent(&entry[t], function, 0);
2190 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2195 /* function 4 and 0xb have additional index. */
2199 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2200 /* read more entries until cache_type is zero */
2201 for (i = 1; *nent < maxnent; ++i) {
2202 cache_type = entry[i - 1].eax & 0x1f;
2205 do_cpuid_1_ent(&entry[i], function, i);
2207 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2215 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2216 /* read more entries until level_type is zero */
2217 for (i = 1; *nent < maxnent; ++i) {
2218 level_type = entry[i - 1].ecx & 0xff00;
2221 do_cpuid_1_ent(&entry[i], function, i);
2223 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2231 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2232 for (i = 1; *nent < maxnent; ++i) {
2233 if (entry[i - 1].eax == 0 && i != 2)
2235 do_cpuid_1_ent(&entry[i], function, i);
2237 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2242 case KVM_CPUID_SIGNATURE: {
2243 char signature[12] = "KVMKVMKVM\0\0";
2244 u32 *sigptr = (u32 *)signature;
2246 entry->ebx = sigptr[0];
2247 entry->ecx = sigptr[1];
2248 entry->edx = sigptr[2];
2251 case KVM_CPUID_FEATURES:
2252 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2253 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2254 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2255 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2261 entry->eax = min(entry->eax, 0x8000001a);
2264 entry->edx &= kvm_supported_word1_x86_features;
2265 entry->ecx &= kvm_supported_word6_x86_features;
2269 kvm_x86_ops->set_supported_cpuid(function, entry);
2276 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2277 struct kvm_cpuid_entry2 __user *entries)
2279 struct kvm_cpuid_entry2 *cpuid_entries;
2280 int limit, nent = 0, r = -E2BIG;
2283 if (cpuid->nent < 1)
2285 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2286 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2288 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2292 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2293 limit = cpuid_entries[0].eax;
2294 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2295 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2296 &nent, cpuid->nent);
2298 if (nent >= cpuid->nent)
2301 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2302 limit = cpuid_entries[nent - 1].eax;
2303 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2304 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2305 &nent, cpuid->nent);
2310 if (nent >= cpuid->nent)
2313 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2317 if (nent >= cpuid->nent)
2320 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2324 if (nent >= cpuid->nent)
2328 if (copy_to_user(entries, cpuid_entries,
2329 nent * sizeof(struct kvm_cpuid_entry2)))
2335 vfree(cpuid_entries);
2340 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2341 struct kvm_lapic_state *s)
2343 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2348 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2349 struct kvm_lapic_state *s)
2351 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2352 kvm_apic_post_state_restore(vcpu);
2353 update_cr8_intercept(vcpu);
2358 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2359 struct kvm_interrupt *irq)
2361 if (irq->irq < 0 || irq->irq >= 256)
2363 if (irqchip_in_kernel(vcpu->kvm))
2366 kvm_queue_interrupt(vcpu, irq->irq, false);
2371 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2373 kvm_inject_nmi(vcpu);
2378 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2379 struct kvm_tpr_access_ctl *tac)
2383 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2387 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2391 unsigned bank_num = mcg_cap & 0xff, bank;
2394 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2396 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2399 vcpu->arch.mcg_cap = mcg_cap;
2400 /* Init IA32_MCG_CTL to all 1s */
2401 if (mcg_cap & MCG_CTL_P)
2402 vcpu->arch.mcg_ctl = ~(u64)0;
2403 /* Init IA32_MCi_CTL to all 1s */
2404 for (bank = 0; bank < bank_num; bank++)
2405 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2410 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2411 struct kvm_x86_mce *mce)
2413 u64 mcg_cap = vcpu->arch.mcg_cap;
2414 unsigned bank_num = mcg_cap & 0xff;
2415 u64 *banks = vcpu->arch.mce_banks;
2417 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2420 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2421 * reporting is disabled
2423 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2424 vcpu->arch.mcg_ctl != ~(u64)0)
2426 banks += 4 * mce->bank;
2428 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2429 * reporting is disabled for the bank
2431 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2433 if (mce->status & MCI_STATUS_UC) {
2434 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2435 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2436 printk(KERN_DEBUG "kvm: set_mce: "
2437 "injects mce exception while "
2438 "previous one is in progress!\n");
2439 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2442 if (banks[1] & MCI_STATUS_VAL)
2443 mce->status |= MCI_STATUS_OVER;
2444 banks[2] = mce->addr;
2445 banks[3] = mce->misc;
2446 vcpu->arch.mcg_status = mce->mcg_status;
2447 banks[1] = mce->status;
2448 kvm_queue_exception(vcpu, MC_VECTOR);
2449 } else if (!(banks[1] & MCI_STATUS_VAL)
2450 || !(banks[1] & MCI_STATUS_UC)) {
2451 if (banks[1] & MCI_STATUS_VAL)
2452 mce->status |= MCI_STATUS_OVER;
2453 banks[2] = mce->addr;
2454 banks[3] = mce->misc;
2455 banks[1] = mce->status;
2457 banks[1] |= MCI_STATUS_OVER;
2461 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2462 struct kvm_vcpu_events *events)
2464 events->exception.injected =
2465 vcpu->arch.exception.pending &&
2466 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2467 events->exception.nr = vcpu->arch.exception.nr;
2468 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2469 events->exception.error_code = vcpu->arch.exception.error_code;
2471 events->interrupt.injected =
2472 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2473 events->interrupt.nr = vcpu->arch.interrupt.nr;
2474 events->interrupt.soft = 0;
2475 events->interrupt.shadow =
2476 kvm_x86_ops->get_interrupt_shadow(vcpu,
2477 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2479 events->nmi.injected = vcpu->arch.nmi_injected;
2480 events->nmi.pending = vcpu->arch.nmi_pending;
2481 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2483 events->sipi_vector = vcpu->arch.sipi_vector;
2485 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2486 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2487 | KVM_VCPUEVENT_VALID_SHADOW);
2490 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2491 struct kvm_vcpu_events *events)
2493 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2494 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2495 | KVM_VCPUEVENT_VALID_SHADOW))
2498 vcpu->arch.exception.pending = events->exception.injected;
2499 vcpu->arch.exception.nr = events->exception.nr;
2500 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2501 vcpu->arch.exception.error_code = events->exception.error_code;
2503 vcpu->arch.interrupt.pending = events->interrupt.injected;
2504 vcpu->arch.interrupt.nr = events->interrupt.nr;
2505 vcpu->arch.interrupt.soft = events->interrupt.soft;
2506 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2507 kvm_pic_clear_isr_ack(vcpu->kvm);
2508 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2509 kvm_x86_ops->set_interrupt_shadow(vcpu,
2510 events->interrupt.shadow);
2512 vcpu->arch.nmi_injected = events->nmi.injected;
2513 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2514 vcpu->arch.nmi_pending = events->nmi.pending;
2515 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2517 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2518 vcpu->arch.sipi_vector = events->sipi_vector;
2523 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2524 struct kvm_debugregs *dbgregs)
2526 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2527 dbgregs->dr6 = vcpu->arch.dr6;
2528 dbgregs->dr7 = vcpu->arch.dr7;
2532 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2533 struct kvm_debugregs *dbgregs)
2538 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2539 vcpu->arch.dr6 = dbgregs->dr6;
2540 vcpu->arch.dr7 = dbgregs->dr7;
2545 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2546 struct kvm_xsave *guest_xsave)
2549 memcpy(guest_xsave->region,
2550 &vcpu->arch.guest_fpu.state->xsave,
2553 memcpy(guest_xsave->region,
2554 &vcpu->arch.guest_fpu.state->fxsave,
2555 sizeof(struct i387_fxsave_struct));
2556 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2561 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2562 struct kvm_xsave *guest_xsave)
2565 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2568 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2569 guest_xsave->region, xstate_size);
2571 if (xstate_bv & ~XSTATE_FPSSE)
2573 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2574 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2579 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2580 struct kvm_xcrs *guest_xcrs)
2582 if (!cpu_has_xsave) {
2583 guest_xcrs->nr_xcrs = 0;
2587 guest_xcrs->nr_xcrs = 1;
2588 guest_xcrs->flags = 0;
2589 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2590 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2593 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2594 struct kvm_xcrs *guest_xcrs)
2601 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2604 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2605 /* Only support XCR0 currently */
2606 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2607 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2608 guest_xcrs->xcrs[0].value);
2616 long kvm_arch_vcpu_ioctl(struct file *filp,
2617 unsigned int ioctl, unsigned long arg)
2619 struct kvm_vcpu *vcpu = filp->private_data;
2620 void __user *argp = (void __user *)arg;
2623 struct kvm_lapic_state *lapic;
2624 struct kvm_xsave *xsave;
2625 struct kvm_xcrs *xcrs;
2631 case KVM_GET_LAPIC: {
2633 if (!vcpu->arch.apic)
2635 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2640 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2644 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2649 case KVM_SET_LAPIC: {
2651 if (!vcpu->arch.apic)
2653 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2658 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2660 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2666 case KVM_INTERRUPT: {
2667 struct kvm_interrupt irq;
2670 if (copy_from_user(&irq, argp, sizeof irq))
2672 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2679 r = kvm_vcpu_ioctl_nmi(vcpu);
2685 case KVM_SET_CPUID: {
2686 struct kvm_cpuid __user *cpuid_arg = argp;
2687 struct kvm_cpuid cpuid;
2690 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2692 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2697 case KVM_SET_CPUID2: {
2698 struct kvm_cpuid2 __user *cpuid_arg = argp;
2699 struct kvm_cpuid2 cpuid;
2702 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2704 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2705 cpuid_arg->entries);
2710 case KVM_GET_CPUID2: {
2711 struct kvm_cpuid2 __user *cpuid_arg = argp;
2712 struct kvm_cpuid2 cpuid;
2715 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2717 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2718 cpuid_arg->entries);
2722 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2728 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2731 r = msr_io(vcpu, argp, do_set_msr, 0);
2733 case KVM_TPR_ACCESS_REPORTING: {
2734 struct kvm_tpr_access_ctl tac;
2737 if (copy_from_user(&tac, argp, sizeof tac))
2739 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2743 if (copy_to_user(argp, &tac, sizeof tac))
2748 case KVM_SET_VAPIC_ADDR: {
2749 struct kvm_vapic_addr va;
2752 if (!irqchip_in_kernel(vcpu->kvm))
2755 if (copy_from_user(&va, argp, sizeof va))
2758 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2761 case KVM_X86_SETUP_MCE: {
2765 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2767 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2770 case KVM_X86_SET_MCE: {
2771 struct kvm_x86_mce mce;
2774 if (copy_from_user(&mce, argp, sizeof mce))
2776 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2779 case KVM_GET_VCPU_EVENTS: {
2780 struct kvm_vcpu_events events;
2782 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2785 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2790 case KVM_SET_VCPU_EVENTS: {
2791 struct kvm_vcpu_events events;
2794 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2797 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2800 case KVM_GET_DEBUGREGS: {
2801 struct kvm_debugregs dbgregs;
2803 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2806 if (copy_to_user(argp, &dbgregs,
2807 sizeof(struct kvm_debugregs)))
2812 case KVM_SET_DEBUGREGS: {
2813 struct kvm_debugregs dbgregs;
2816 if (copy_from_user(&dbgregs, argp,
2817 sizeof(struct kvm_debugregs)))
2820 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2823 case KVM_GET_XSAVE: {
2824 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2829 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2832 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2837 case KVM_SET_XSAVE: {
2838 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2844 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2847 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2850 case KVM_GET_XCRS: {
2851 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2856 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2859 if (copy_to_user(argp, u.xcrs,
2860 sizeof(struct kvm_xcrs)))
2865 case KVM_SET_XCRS: {
2866 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2872 if (copy_from_user(u.xcrs, argp,
2873 sizeof(struct kvm_xcrs)))
2876 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2887 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2891 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2893 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2897 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2900 kvm->arch.ept_identity_map_addr = ident_addr;
2904 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2905 u32 kvm_nr_mmu_pages)
2907 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2910 mutex_lock(&kvm->slots_lock);
2911 spin_lock(&kvm->mmu_lock);
2913 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2914 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2916 spin_unlock(&kvm->mmu_lock);
2917 mutex_unlock(&kvm->slots_lock);
2921 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2923 return kvm->arch.n_max_mmu_pages;
2926 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2931 switch (chip->chip_id) {
2932 case KVM_IRQCHIP_PIC_MASTER:
2933 memcpy(&chip->chip.pic,
2934 &pic_irqchip(kvm)->pics[0],
2935 sizeof(struct kvm_pic_state));
2937 case KVM_IRQCHIP_PIC_SLAVE:
2938 memcpy(&chip->chip.pic,
2939 &pic_irqchip(kvm)->pics[1],
2940 sizeof(struct kvm_pic_state));
2942 case KVM_IRQCHIP_IOAPIC:
2943 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2952 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2957 switch (chip->chip_id) {
2958 case KVM_IRQCHIP_PIC_MASTER:
2959 raw_spin_lock(&pic_irqchip(kvm)->lock);
2960 memcpy(&pic_irqchip(kvm)->pics[0],
2962 sizeof(struct kvm_pic_state));
2963 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2965 case KVM_IRQCHIP_PIC_SLAVE:
2966 raw_spin_lock(&pic_irqchip(kvm)->lock);
2967 memcpy(&pic_irqchip(kvm)->pics[1],
2969 sizeof(struct kvm_pic_state));
2970 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2972 case KVM_IRQCHIP_IOAPIC:
2973 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2979 kvm_pic_update_irq(pic_irqchip(kvm));
2983 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2987 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2988 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2989 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2993 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2997 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2998 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2999 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3000 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3004 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3008 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3009 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3010 sizeof(ps->channels));
3011 ps->flags = kvm->arch.vpit->pit_state.flags;
3012 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3016 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3018 int r = 0, start = 0;
3019 u32 prev_legacy, cur_legacy;
3020 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3021 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3022 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3023 if (!prev_legacy && cur_legacy)
3025 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3026 sizeof(kvm->arch.vpit->pit_state.channels));
3027 kvm->arch.vpit->pit_state.flags = ps->flags;
3028 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3029 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3033 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3034 struct kvm_reinject_control *control)
3036 if (!kvm->arch.vpit)
3038 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3039 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3040 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3045 * Get (and clear) the dirty memory log for a memory slot.
3047 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3048 struct kvm_dirty_log *log)
3051 struct kvm_memory_slot *memslot;
3053 unsigned long is_dirty = 0;
3055 mutex_lock(&kvm->slots_lock);
3058 if (log->slot >= KVM_MEMORY_SLOTS)
3061 memslot = &kvm->memslots->memslots[log->slot];
3063 if (!memslot->dirty_bitmap)
3066 n = kvm_dirty_bitmap_bytes(memslot);
3068 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3069 is_dirty = memslot->dirty_bitmap[i];
3071 /* If nothing is dirty, don't bother messing with page tables. */
3073 struct kvm_memslots *slots, *old_slots;
3074 unsigned long *dirty_bitmap;
3076 spin_lock(&kvm->mmu_lock);
3077 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3078 spin_unlock(&kvm->mmu_lock);
3081 dirty_bitmap = vmalloc(n);
3084 memset(dirty_bitmap, 0, n);
3087 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3089 vfree(dirty_bitmap);
3092 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3093 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3095 old_slots = kvm->memslots;
3096 rcu_assign_pointer(kvm->memslots, slots);
3097 synchronize_srcu_expedited(&kvm->srcu);
3098 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3102 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3103 vfree(dirty_bitmap);
3106 vfree(dirty_bitmap);
3109 if (clear_user(log->dirty_bitmap, n))
3115 mutex_unlock(&kvm->slots_lock);
3119 long kvm_arch_vm_ioctl(struct file *filp,
3120 unsigned int ioctl, unsigned long arg)
3122 struct kvm *kvm = filp->private_data;
3123 void __user *argp = (void __user *)arg;
3126 * This union makes it completely explicit to gcc-3.x
3127 * that these two variables' stack usage should be
3128 * combined, not added together.
3131 struct kvm_pit_state ps;
3132 struct kvm_pit_state2 ps2;
3133 struct kvm_pit_config pit_config;
3137 case KVM_SET_TSS_ADDR:
3138 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3142 case KVM_SET_IDENTITY_MAP_ADDR: {
3146 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3148 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3153 case KVM_SET_NR_MMU_PAGES:
3154 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3158 case KVM_GET_NR_MMU_PAGES:
3159 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3161 case KVM_CREATE_IRQCHIP: {
3162 struct kvm_pic *vpic;
3164 mutex_lock(&kvm->lock);
3167 goto create_irqchip_unlock;
3169 vpic = kvm_create_pic(kvm);
3171 r = kvm_ioapic_init(kvm);
3173 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3176 goto create_irqchip_unlock;
3179 goto create_irqchip_unlock;
3181 kvm->arch.vpic = vpic;
3183 r = kvm_setup_default_irq_routing(kvm);
3185 mutex_lock(&kvm->irq_lock);
3186 kvm_ioapic_destroy(kvm);
3187 kvm_destroy_pic(kvm);
3188 mutex_unlock(&kvm->irq_lock);
3190 create_irqchip_unlock:
3191 mutex_unlock(&kvm->lock);
3194 case KVM_CREATE_PIT:
3195 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3197 case KVM_CREATE_PIT2:
3199 if (copy_from_user(&u.pit_config, argp,
3200 sizeof(struct kvm_pit_config)))
3203 mutex_lock(&kvm->slots_lock);
3206 goto create_pit_unlock;
3208 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3212 mutex_unlock(&kvm->slots_lock);
3214 case KVM_IRQ_LINE_STATUS:
3215 case KVM_IRQ_LINE: {
3216 struct kvm_irq_level irq_event;
3219 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3222 if (irqchip_in_kernel(kvm)) {
3224 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3225 irq_event.irq, irq_event.level);
3226 if (ioctl == KVM_IRQ_LINE_STATUS) {
3228 irq_event.status = status;
3229 if (copy_to_user(argp, &irq_event,
3237 case KVM_GET_IRQCHIP: {
3238 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3239 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3245 if (copy_from_user(chip, argp, sizeof *chip))
3246 goto get_irqchip_out;
3248 if (!irqchip_in_kernel(kvm))
3249 goto get_irqchip_out;
3250 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3252 goto get_irqchip_out;
3254 if (copy_to_user(argp, chip, sizeof *chip))
3255 goto get_irqchip_out;
3263 case KVM_SET_IRQCHIP: {
3264 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3265 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3271 if (copy_from_user(chip, argp, sizeof *chip))
3272 goto set_irqchip_out;
3274 if (!irqchip_in_kernel(kvm))
3275 goto set_irqchip_out;
3276 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3278 goto set_irqchip_out;
3288 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3291 if (!kvm->arch.vpit)
3293 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3297 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3304 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3307 if (!kvm->arch.vpit)
3309 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3315 case KVM_GET_PIT2: {
3317 if (!kvm->arch.vpit)
3319 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3323 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3328 case KVM_SET_PIT2: {
3330 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3333 if (!kvm->arch.vpit)
3335 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3341 case KVM_REINJECT_CONTROL: {
3342 struct kvm_reinject_control control;
3344 if (copy_from_user(&control, argp, sizeof(control)))
3346 r = kvm_vm_ioctl_reinject(kvm, &control);
3352 case KVM_XEN_HVM_CONFIG: {
3354 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3355 sizeof(struct kvm_xen_hvm_config)))
3358 if (kvm->arch.xen_hvm_config.flags)
3363 case KVM_SET_CLOCK: {
3364 struct kvm_clock_data user_ns;
3369 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3377 now_ns = get_kernel_ns();
3378 delta = user_ns.clock - now_ns;
3379 kvm->arch.kvmclock_offset = delta;
3382 case KVM_GET_CLOCK: {
3383 struct kvm_clock_data user_ns;
3386 now_ns = get_kernel_ns();
3387 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3391 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3404 static void kvm_init_msr_list(void)
3409 /* skip the first msrs in the list. KVM-specific */
3410 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3411 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3414 msrs_to_save[j] = msrs_to_save[i];
3417 num_msrs_to_save = j;
3420 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3423 if (vcpu->arch.apic &&
3424 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3427 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3430 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3432 if (vcpu->arch.apic &&
3433 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3436 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3439 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3440 struct kvm_segment *var, int seg)
3442 kvm_x86_ops->set_segment(vcpu, var, seg);
3445 void kvm_get_segment(struct kvm_vcpu *vcpu,
3446 struct kvm_segment *var, int seg)
3448 kvm_x86_ops->get_segment(vcpu, var, seg);
3451 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3456 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3458 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3459 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3462 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3464 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3465 access |= PFERR_FETCH_MASK;
3466 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3469 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3471 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3472 access |= PFERR_WRITE_MASK;
3473 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3476 /* uses this to access any guest's mapped memory without checking CPL */
3477 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3479 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3482 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3483 struct kvm_vcpu *vcpu, u32 access,
3487 int r = X86EMUL_CONTINUE;
3490 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3492 unsigned offset = addr & (PAGE_SIZE-1);
3493 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3496 if (gpa == UNMAPPED_GVA) {
3497 r = X86EMUL_PROPAGATE_FAULT;
3500 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3502 r = X86EMUL_IO_NEEDED;
3514 /* used for instruction fetching */
3515 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3516 struct kvm_vcpu *vcpu, u32 *error)
3518 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3519 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3520 access | PFERR_FETCH_MASK, error);
3523 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3524 struct kvm_vcpu *vcpu, u32 *error)
3526 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3527 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3531 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3532 struct kvm_vcpu *vcpu, u32 *error)
3534 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3537 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3539 struct kvm_vcpu *vcpu,
3543 int r = X86EMUL_CONTINUE;
3546 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3549 unsigned offset = addr & (PAGE_SIZE-1);
3550 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3553 if (gpa == UNMAPPED_GVA) {
3554 r = X86EMUL_PROPAGATE_FAULT;
3557 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3559 r = X86EMUL_IO_NEEDED;
3571 static int emulator_read_emulated(unsigned long addr,
3574 unsigned int *error_code,
3575 struct kvm_vcpu *vcpu)
3579 if (vcpu->mmio_read_completed) {
3580 memcpy(val, vcpu->mmio_data, bytes);
3581 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3582 vcpu->mmio_phys_addr, *(u64 *)val);
3583 vcpu->mmio_read_completed = 0;
3584 return X86EMUL_CONTINUE;
3587 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3589 if (gpa == UNMAPPED_GVA)
3590 return X86EMUL_PROPAGATE_FAULT;
3592 /* For APIC access vmexit */
3593 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3596 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3597 == X86EMUL_CONTINUE)
3598 return X86EMUL_CONTINUE;
3602 * Is this MMIO handled locally?
3604 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3605 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3606 return X86EMUL_CONTINUE;
3609 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3611 vcpu->mmio_needed = 1;
3612 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3613 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3614 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3615 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3617 return X86EMUL_IO_NEEDED;
3620 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3621 const void *val, int bytes)
3625 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3628 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3632 static int emulator_write_emulated_onepage(unsigned long addr,
3635 unsigned int *error_code,
3636 struct kvm_vcpu *vcpu)
3640 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3642 if (gpa == UNMAPPED_GVA)
3643 return X86EMUL_PROPAGATE_FAULT;
3645 /* For APIC access vmexit */
3646 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3649 if (emulator_write_phys(vcpu, gpa, val, bytes))
3650 return X86EMUL_CONTINUE;
3653 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3655 * Is this MMIO handled locally?
3657 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3658 return X86EMUL_CONTINUE;
3660 vcpu->mmio_needed = 1;
3661 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3662 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3663 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3664 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3665 memcpy(vcpu->run->mmio.data, val, bytes);
3667 return X86EMUL_CONTINUE;
3670 int emulator_write_emulated(unsigned long addr,
3673 unsigned int *error_code,
3674 struct kvm_vcpu *vcpu)
3676 /* Crossing a page boundary? */
3677 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3680 now = -addr & ~PAGE_MASK;
3681 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3683 if (rc != X86EMUL_CONTINUE)
3689 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3693 #define CMPXCHG_TYPE(t, ptr, old, new) \
3694 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3696 #ifdef CONFIG_X86_64
3697 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3699 # define CMPXCHG64(ptr, old, new) \
3700 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3703 static int emulator_cmpxchg_emulated(unsigned long addr,
3707 unsigned int *error_code,
3708 struct kvm_vcpu *vcpu)
3715 /* guests cmpxchg8b have to be emulated atomically */
3716 if (bytes > 8 || (bytes & (bytes - 1)))
3719 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3721 if (gpa == UNMAPPED_GVA ||
3722 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3725 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3728 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3729 if (is_error_page(page)) {
3730 kvm_release_page_clean(page);
3734 kaddr = kmap_atomic(page, KM_USER0);
3735 kaddr += offset_in_page(gpa);
3738 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3741 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3744 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3747 exchanged = CMPXCHG64(kaddr, old, new);
3752 kunmap_atomic(kaddr, KM_USER0);
3753 kvm_release_page_dirty(page);
3756 return X86EMUL_CMPXCHG_FAILED;
3758 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3760 return X86EMUL_CONTINUE;
3763 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3765 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3768 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3770 /* TODO: String I/O for in kernel device */
3773 if (vcpu->arch.pio.in)
3774 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3775 vcpu->arch.pio.size, pd);
3777 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3778 vcpu->arch.pio.port, vcpu->arch.pio.size,
3784 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3785 unsigned int count, struct kvm_vcpu *vcpu)
3787 if (vcpu->arch.pio.count)
3790 trace_kvm_pio(0, port, size, 1);
3792 vcpu->arch.pio.port = port;
3793 vcpu->arch.pio.in = 1;
3794 vcpu->arch.pio.count = count;
3795 vcpu->arch.pio.size = size;
3797 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3799 memcpy(val, vcpu->arch.pio_data, size * count);
3800 vcpu->arch.pio.count = 0;
3804 vcpu->run->exit_reason = KVM_EXIT_IO;
3805 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3806 vcpu->run->io.size = size;
3807 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3808 vcpu->run->io.count = count;
3809 vcpu->run->io.port = port;
3814 static int emulator_pio_out_emulated(int size, unsigned short port,
3815 const void *val, unsigned int count,
3816 struct kvm_vcpu *vcpu)
3818 trace_kvm_pio(1, port, size, 1);
3820 vcpu->arch.pio.port = port;
3821 vcpu->arch.pio.in = 0;
3822 vcpu->arch.pio.count = count;
3823 vcpu->arch.pio.size = size;
3825 memcpy(vcpu->arch.pio_data, val, size * count);
3827 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3828 vcpu->arch.pio.count = 0;
3832 vcpu->run->exit_reason = KVM_EXIT_IO;
3833 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3834 vcpu->run->io.size = size;
3835 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3836 vcpu->run->io.count = count;
3837 vcpu->run->io.port = port;
3842 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3844 return kvm_x86_ops->get_segment_base(vcpu, seg);
3847 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3849 kvm_mmu_invlpg(vcpu, address);
3850 return X86EMUL_CONTINUE;
3853 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3855 if (!need_emulate_wbinvd(vcpu))
3856 return X86EMUL_CONTINUE;
3858 if (kvm_x86_ops->has_wbinvd_exit()) {
3859 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3860 wbinvd_ipi, NULL, 1);
3861 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3864 return X86EMUL_CONTINUE;
3866 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3868 int emulate_clts(struct kvm_vcpu *vcpu)
3870 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3871 kvm_x86_ops->fpu_activate(vcpu);
3872 return X86EMUL_CONTINUE;
3875 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3877 return _kvm_get_dr(vcpu, dr, dest);
3880 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3883 return __kvm_set_dr(vcpu, dr, value);
3886 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3888 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3891 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3893 unsigned long value;
3897 value = kvm_read_cr0(vcpu);
3900 value = vcpu->arch.cr2;
3903 value = vcpu->arch.cr3;
3906 value = kvm_read_cr4(vcpu);
3909 value = kvm_get_cr8(vcpu);
3912 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3919 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3925 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3928 vcpu->arch.cr2 = val;
3931 res = kvm_set_cr3(vcpu, val);
3934 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3937 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3940 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3947 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3949 return kvm_x86_ops->get_cpl(vcpu);
3952 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3954 kvm_x86_ops->get_gdt(vcpu, dt);
3957 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3959 kvm_x86_ops->get_idt(vcpu, dt);
3962 static unsigned long emulator_get_cached_segment_base(int seg,
3963 struct kvm_vcpu *vcpu)
3965 return get_segment_base(vcpu, seg);
3968 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3969 struct kvm_vcpu *vcpu)
3971 struct kvm_segment var;
3973 kvm_get_segment(vcpu, &var, seg);
3980 set_desc_limit(desc, var.limit);
3981 set_desc_base(desc, (unsigned long)var.base);
3982 desc->type = var.type;
3984 desc->dpl = var.dpl;
3985 desc->p = var.present;
3986 desc->avl = var.avl;
3994 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3995 struct kvm_vcpu *vcpu)
3997 struct kvm_segment var;
3999 /* needed to preserve selector */
4000 kvm_get_segment(vcpu, &var, seg);
4002 var.base = get_desc_base(desc);
4003 var.limit = get_desc_limit(desc);
4005 var.limit = (var.limit << 12) | 0xfff;
4006 var.type = desc->type;
4007 var.present = desc->p;
4008 var.dpl = desc->dpl;
4013 var.avl = desc->avl;
4014 var.present = desc->p;
4015 var.unusable = !var.present;
4018 kvm_set_segment(vcpu, &var, seg);
4022 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4024 struct kvm_segment kvm_seg;
4026 kvm_get_segment(vcpu, &kvm_seg, seg);
4027 return kvm_seg.selector;
4030 static void emulator_set_segment_selector(u16 sel, int seg,
4031 struct kvm_vcpu *vcpu)
4033 struct kvm_segment kvm_seg;
4035 kvm_get_segment(vcpu, &kvm_seg, seg);
4036 kvm_seg.selector = sel;
4037 kvm_set_segment(vcpu, &kvm_seg, seg);
4040 static struct x86_emulate_ops emulate_ops = {
4041 .read_std = kvm_read_guest_virt_system,
4042 .write_std = kvm_write_guest_virt_system,
4043 .fetch = kvm_fetch_guest_virt,
4044 .read_emulated = emulator_read_emulated,
4045 .write_emulated = emulator_write_emulated,
4046 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4047 .pio_in_emulated = emulator_pio_in_emulated,
4048 .pio_out_emulated = emulator_pio_out_emulated,
4049 .get_cached_descriptor = emulator_get_cached_descriptor,
4050 .set_cached_descriptor = emulator_set_cached_descriptor,
4051 .get_segment_selector = emulator_get_segment_selector,
4052 .set_segment_selector = emulator_set_segment_selector,
4053 .get_cached_segment_base = emulator_get_cached_segment_base,
4054 .get_gdt = emulator_get_gdt,
4055 .get_idt = emulator_get_idt,
4056 .get_cr = emulator_get_cr,
4057 .set_cr = emulator_set_cr,
4058 .cpl = emulator_get_cpl,
4059 .get_dr = emulator_get_dr,
4060 .set_dr = emulator_set_dr,
4061 .set_msr = kvm_set_msr,
4062 .get_msr = kvm_get_msr,
4065 static void cache_all_regs(struct kvm_vcpu *vcpu)
4067 kvm_register_read(vcpu, VCPU_REGS_RAX);
4068 kvm_register_read(vcpu, VCPU_REGS_RSP);
4069 kvm_register_read(vcpu, VCPU_REGS_RIP);
4070 vcpu->arch.regs_dirty = ~0;
4073 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4075 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4077 * an sti; sti; sequence only disable interrupts for the first
4078 * instruction. So, if the last instruction, be it emulated or
4079 * not, left the system with the INT_STI flag enabled, it
4080 * means that the last instruction is an sti. We should not
4081 * leave the flag on in this case. The same goes for mov ss
4083 if (!(int_shadow & mask))
4084 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4087 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4089 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4090 if (ctxt->exception == PF_VECTOR)
4091 kvm_inject_page_fault(vcpu);
4092 else if (ctxt->error_code_valid)
4093 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4095 kvm_queue_exception(vcpu, ctxt->exception);
4098 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4100 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4103 cache_all_regs(vcpu);
4105 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4107 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4108 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4109 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4110 vcpu->arch.emulate_ctxt.mode =
4111 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4112 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4113 ? X86EMUL_MODE_VM86 : cs_l
4114 ? X86EMUL_MODE_PROT64 : cs_db
4115 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4116 memset(c, 0, sizeof(struct decode_cache));
4117 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4120 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4122 ++vcpu->stat.insn_emulation_fail;
4123 trace_kvm_emulate_insn_failed(vcpu);
4124 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4125 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4126 vcpu->run->internal.ndata = 0;
4127 kvm_queue_exception(vcpu, UD_VECTOR);
4128 return EMULATE_FAIL;
4131 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4139 * if emulation was due to access to shadowed page table
4140 * and it failed try to unshadow page and re-entetr the
4141 * guest to let CPU execute the instruction.
4143 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4146 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4148 if (gpa == UNMAPPED_GVA)
4149 return true; /* let cpu generate fault */
4151 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4157 int emulate_instruction(struct kvm_vcpu *vcpu,
4163 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4165 kvm_clear_exception_queue(vcpu);
4166 vcpu->arch.mmio_fault_cr2 = cr2;
4168 * TODO: fix emulate.c to use guest_read/write_register
4169 * instead of direct ->regs accesses, can save hundred cycles
4170 * on Intel for instructions that don't read/change RSP, for
4173 cache_all_regs(vcpu);
4175 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4176 init_emulate_ctxt(vcpu);
4177 vcpu->arch.emulate_ctxt.interruptibility = 0;
4178 vcpu->arch.emulate_ctxt.exception = -1;
4179 vcpu->arch.emulate_ctxt.perm_ok = false;
4181 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4182 trace_kvm_emulate_insn_start(vcpu);
4184 /* Only allow emulation of specific instructions on #UD
4185 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4186 if (emulation_type & EMULTYPE_TRAP_UD) {
4188 return EMULATE_FAIL;
4190 case 0x01: /* VMMCALL */
4191 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4192 return EMULATE_FAIL;
4194 case 0x34: /* sysenter */
4195 case 0x35: /* sysexit */
4196 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4197 return EMULATE_FAIL;
4199 case 0x05: /* syscall */
4200 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4201 return EMULATE_FAIL;
4204 return EMULATE_FAIL;
4207 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4208 return EMULATE_FAIL;
4211 ++vcpu->stat.insn_emulation;
4213 if (reexecute_instruction(vcpu, cr2))
4214 return EMULATE_DONE;
4215 if (emulation_type & EMULTYPE_SKIP)
4216 return EMULATE_FAIL;
4217 return handle_emulation_failure(vcpu);
4221 if (emulation_type & EMULTYPE_SKIP) {
4222 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4223 return EMULATE_DONE;
4226 /* this is needed for vmware backdor interface to work since it
4227 changes registers values during IO operation */
4228 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4231 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4233 if (r == EMULATION_FAILED) {
4234 if (reexecute_instruction(vcpu, cr2))
4235 return EMULATE_DONE;
4237 return handle_emulation_failure(vcpu);
4240 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4241 inject_emulated_exception(vcpu);
4243 } else if (vcpu->arch.pio.count) {
4244 if (!vcpu->arch.pio.in)
4245 vcpu->arch.pio.count = 0;
4246 r = EMULATE_DO_MMIO;
4247 } else if (vcpu->mmio_needed) {
4248 if (vcpu->mmio_is_write)
4249 vcpu->mmio_needed = 0;
4250 r = EMULATE_DO_MMIO;
4251 } else if (r == EMULATION_RESTART)
4256 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4257 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4258 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4259 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4263 EXPORT_SYMBOL_GPL(emulate_instruction);
4265 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4267 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4268 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4269 /* do not return to emulator after return from userspace */
4270 vcpu->arch.pio.count = 0;
4273 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4275 static void tsc_bad(void *info)
4277 __get_cpu_var(cpu_tsc_khz) = 0;
4280 static void tsc_khz_changed(void *data)
4282 struct cpufreq_freqs *freq = data;
4283 unsigned long khz = 0;
4287 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4288 khz = cpufreq_quick_get(raw_smp_processor_id());
4291 __get_cpu_var(cpu_tsc_khz) = khz;
4294 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4297 struct cpufreq_freqs *freq = data;
4299 struct kvm_vcpu *vcpu;
4300 int i, send_ipi = 0;
4303 * We allow guests to temporarily run on slowing clocks,
4304 * provided we notify them after, or to run on accelerating
4305 * clocks, provided we notify them before. Thus time never
4308 * However, we have a problem. We can't atomically update
4309 * the frequency of a given CPU from this function; it is
4310 * merely a notifier, which can be called from any CPU.
4311 * Changing the TSC frequency at arbitrary points in time
4312 * requires a recomputation of local variables related to
4313 * the TSC for each VCPU. We must flag these local variables
4314 * to be updated and be sure the update takes place with the
4315 * new frequency before any guests proceed.
4317 * Unfortunately, the combination of hotplug CPU and frequency
4318 * change creates an intractable locking scenario; the order
4319 * of when these callouts happen is undefined with respect to
4320 * CPU hotplug, and they can race with each other. As such,
4321 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4322 * undefined; you can actually have a CPU frequency change take
4323 * place in between the computation of X and the setting of the
4324 * variable. To protect against this problem, all updates of
4325 * the per_cpu tsc_khz variable are done in an interrupt
4326 * protected IPI, and all callers wishing to update the value
4327 * must wait for a synchronous IPI to complete (which is trivial
4328 * if the caller is on the CPU already). This establishes the
4329 * necessary total order on variable updates.
4331 * Note that because a guest time update may take place
4332 * anytime after the setting of the VCPU's request bit, the
4333 * correct TSC value must be set before the request. However,
4334 * to ensure the update actually makes it to any guest which
4335 * starts running in hardware virtualization between the set
4336 * and the acquisition of the spinlock, we must also ping the
4337 * CPU after setting the request bit.
4341 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4343 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4346 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4348 spin_lock(&kvm_lock);
4349 list_for_each_entry(kvm, &vm_list, vm_list) {
4350 kvm_for_each_vcpu(i, vcpu, kvm) {
4351 if (vcpu->cpu != freq->cpu)
4353 if (!kvm_request_guest_time_update(vcpu))
4355 if (vcpu->cpu != smp_processor_id())
4359 spin_unlock(&kvm_lock);
4361 if (freq->old < freq->new && send_ipi) {
4363 * We upscale the frequency. Must make the guest
4364 * doesn't see old kvmclock values while running with
4365 * the new frequency, otherwise we risk the guest sees
4366 * time go backwards.
4368 * In case we update the frequency for another cpu
4369 * (which might be in guest context) send an interrupt
4370 * to kick the cpu out of guest context. Next time
4371 * guest context is entered kvmclock will be updated,
4372 * so the guest will not see stale values.
4374 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4379 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4380 .notifier_call = kvmclock_cpufreq_notifier
4383 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4384 unsigned long action, void *hcpu)
4386 unsigned int cpu = (unsigned long)hcpu;
4390 case CPU_DOWN_FAILED:
4391 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4393 case CPU_DOWN_PREPARE:
4394 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4400 static struct notifier_block kvmclock_cpu_notifier_block = {
4401 .notifier_call = kvmclock_cpu_notifier,
4402 .priority = -INT_MAX
4405 static void kvm_timer_init(void)
4409 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4410 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4411 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4412 CPUFREQ_TRANSITION_NOTIFIER);
4414 for_each_online_cpu(cpu)
4415 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4418 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4420 static int kvm_is_in_guest(void)
4422 return percpu_read(current_vcpu) != NULL;
4425 static int kvm_is_user_mode(void)
4429 if (percpu_read(current_vcpu))
4430 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4432 return user_mode != 0;
4435 static unsigned long kvm_get_guest_ip(void)
4437 unsigned long ip = 0;
4439 if (percpu_read(current_vcpu))
4440 ip = kvm_rip_read(percpu_read(current_vcpu));
4445 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4446 .is_in_guest = kvm_is_in_guest,
4447 .is_user_mode = kvm_is_user_mode,
4448 .get_guest_ip = kvm_get_guest_ip,
4451 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4453 percpu_write(current_vcpu, vcpu);
4455 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4457 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4459 percpu_write(current_vcpu, NULL);
4461 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4463 int kvm_arch_init(void *opaque)
4466 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4469 printk(KERN_ERR "kvm: already loaded the other module\n");
4474 if (!ops->cpu_has_kvm_support()) {
4475 printk(KERN_ERR "kvm: no hardware support\n");
4479 if (ops->disabled_by_bios()) {
4480 printk(KERN_ERR "kvm: disabled by bios\n");
4485 r = kvm_mmu_module_init();
4489 kvm_init_msr_list();
4492 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4493 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4494 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4495 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4499 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4502 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4510 void kvm_arch_exit(void)
4512 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4514 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4515 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4516 CPUFREQ_TRANSITION_NOTIFIER);
4517 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4519 kvm_mmu_module_exit();
4522 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4524 ++vcpu->stat.halt_exits;
4525 if (irqchip_in_kernel(vcpu->kvm)) {
4526 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4529 vcpu->run->exit_reason = KVM_EXIT_HLT;
4533 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4535 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4538 if (is_long_mode(vcpu))
4541 return a0 | ((gpa_t)a1 << 32);
4544 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4546 u64 param, ingpa, outgpa, ret;
4547 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4548 bool fast, longmode;
4552 * hypercall generates UD from non zero cpl and real mode
4555 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4556 kvm_queue_exception(vcpu, UD_VECTOR);
4560 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4561 longmode = is_long_mode(vcpu) && cs_l == 1;
4564 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4565 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4566 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4567 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4568 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4569 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4571 #ifdef CONFIG_X86_64
4573 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4574 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4575 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4579 code = param & 0xffff;
4580 fast = (param >> 16) & 0x1;
4581 rep_cnt = (param >> 32) & 0xfff;
4582 rep_idx = (param >> 48) & 0xfff;
4584 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4587 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4588 kvm_vcpu_on_spin(vcpu);
4591 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4595 ret = res | (((u64)rep_done & 0xfff) << 32);
4597 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4599 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4600 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4606 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4608 unsigned long nr, a0, a1, a2, a3, ret;
4611 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4612 return kvm_hv_hypercall(vcpu);
4614 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4615 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4616 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4617 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4618 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4620 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4622 if (!is_long_mode(vcpu)) {
4630 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4636 case KVM_HC_VAPIC_POLL_IRQ:
4640 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4647 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4648 ++vcpu->stat.hypercalls;
4651 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4653 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4655 char instruction[3];
4656 unsigned long rip = kvm_rip_read(vcpu);
4659 * Blow out the MMU to ensure that no other VCPU has an active mapping
4660 * to ensure that the updated hypercall appears atomically across all
4663 kvm_mmu_zap_all(vcpu->kvm);
4665 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4667 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4670 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4672 struct desc_ptr dt = { limit, base };
4674 kvm_x86_ops->set_gdt(vcpu, &dt);
4677 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4679 struct desc_ptr dt = { limit, base };
4681 kvm_x86_ops->set_idt(vcpu, &dt);
4684 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4686 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4687 int j, nent = vcpu->arch.cpuid_nent;
4689 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4690 /* when no next entry is found, the current entry[i] is reselected */
4691 for (j = i + 1; ; j = (j + 1) % nent) {
4692 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4693 if (ej->function == e->function) {
4694 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4698 return 0; /* silence gcc, even though control never reaches here */
4701 /* find an entry with matching function, matching index (if needed), and that
4702 * should be read next (if it's stateful) */
4703 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4704 u32 function, u32 index)
4706 if (e->function != function)
4708 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4710 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4711 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4716 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4717 u32 function, u32 index)
4720 struct kvm_cpuid_entry2 *best = NULL;
4722 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4723 struct kvm_cpuid_entry2 *e;
4725 e = &vcpu->arch.cpuid_entries[i];
4726 if (is_matching_cpuid_entry(e, function, index)) {
4727 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4728 move_to_next_stateful_cpuid_entry(vcpu, i);
4733 * Both basic or both extended?
4735 if (((e->function ^ function) & 0x80000000) == 0)
4736 if (!best || e->function > best->function)
4741 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4743 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4745 struct kvm_cpuid_entry2 *best;
4747 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4748 if (!best || best->eax < 0x80000008)
4750 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4752 return best->eax & 0xff;
4757 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4759 u32 function, index;
4760 struct kvm_cpuid_entry2 *best;
4762 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4763 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4764 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4765 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4766 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4767 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4768 best = kvm_find_cpuid_entry(vcpu, function, index);
4770 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4771 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4772 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4773 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4775 kvm_x86_ops->skip_emulated_instruction(vcpu);
4776 trace_kvm_cpuid(function,
4777 kvm_register_read(vcpu, VCPU_REGS_RAX),
4778 kvm_register_read(vcpu, VCPU_REGS_RBX),
4779 kvm_register_read(vcpu, VCPU_REGS_RCX),
4780 kvm_register_read(vcpu, VCPU_REGS_RDX));
4782 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4785 * Check if userspace requested an interrupt window, and that the
4786 * interrupt window is open.
4788 * No need to exit to userspace if we already have an interrupt queued.
4790 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4792 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4793 vcpu->run->request_interrupt_window &&
4794 kvm_arch_interrupt_allowed(vcpu));
4797 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4799 struct kvm_run *kvm_run = vcpu->run;
4801 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4802 kvm_run->cr8 = kvm_get_cr8(vcpu);
4803 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4804 if (irqchip_in_kernel(vcpu->kvm))
4805 kvm_run->ready_for_interrupt_injection = 1;
4807 kvm_run->ready_for_interrupt_injection =
4808 kvm_arch_interrupt_allowed(vcpu) &&
4809 !kvm_cpu_has_interrupt(vcpu) &&
4810 !kvm_event_needs_reinjection(vcpu);
4813 static void vapic_enter(struct kvm_vcpu *vcpu)
4815 struct kvm_lapic *apic = vcpu->arch.apic;
4818 if (!apic || !apic->vapic_addr)
4821 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4823 vcpu->arch.apic->vapic_page = page;
4826 static void vapic_exit(struct kvm_vcpu *vcpu)
4828 struct kvm_lapic *apic = vcpu->arch.apic;
4831 if (!apic || !apic->vapic_addr)
4834 idx = srcu_read_lock(&vcpu->kvm->srcu);
4835 kvm_release_page_dirty(apic->vapic_page);
4836 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4837 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4840 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4844 if (!kvm_x86_ops->update_cr8_intercept)
4847 if (!vcpu->arch.apic)
4850 if (!vcpu->arch.apic->vapic_addr)
4851 max_irr = kvm_lapic_find_highest_irr(vcpu);
4858 tpr = kvm_lapic_get_cr8(vcpu);
4860 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4863 static void inject_pending_event(struct kvm_vcpu *vcpu)
4865 /* try to reinject previous events if any */
4866 if (vcpu->arch.exception.pending) {
4867 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4868 vcpu->arch.exception.has_error_code,
4869 vcpu->arch.exception.error_code);
4870 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4871 vcpu->arch.exception.has_error_code,
4872 vcpu->arch.exception.error_code,
4873 vcpu->arch.exception.reinject);
4877 if (vcpu->arch.nmi_injected) {
4878 kvm_x86_ops->set_nmi(vcpu);
4882 if (vcpu->arch.interrupt.pending) {
4883 kvm_x86_ops->set_irq(vcpu);
4887 /* try to inject new event if pending */
4888 if (vcpu->arch.nmi_pending) {
4889 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4890 vcpu->arch.nmi_pending = false;
4891 vcpu->arch.nmi_injected = true;
4892 kvm_x86_ops->set_nmi(vcpu);
4894 } else if (kvm_cpu_has_interrupt(vcpu)) {
4895 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4896 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4898 kvm_x86_ops->set_irq(vcpu);
4903 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4905 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4906 !vcpu->guest_xcr0_loaded) {
4907 /* kvm_set_xcr() also depends on this */
4908 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4909 vcpu->guest_xcr0_loaded = 1;
4913 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4915 if (vcpu->guest_xcr0_loaded) {
4916 if (vcpu->arch.xcr0 != host_xcr0)
4917 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4918 vcpu->guest_xcr0_loaded = 0;
4922 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4925 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4926 vcpu->run->request_interrupt_window;
4928 if (vcpu->requests) {
4929 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4930 kvm_mmu_unload(vcpu);
4931 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4932 __kvm_migrate_timers(vcpu);
4933 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
4934 r = kvm_write_guest_time(vcpu);
4938 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4939 kvm_mmu_sync_roots(vcpu);
4940 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4941 kvm_x86_ops->tlb_flush(vcpu);
4942 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4943 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4947 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4948 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4952 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4953 vcpu->fpu_active = 0;
4954 kvm_x86_ops->fpu_deactivate(vcpu);
4958 r = kvm_mmu_reload(vcpu);
4964 kvm_x86_ops->prepare_guest_switch(vcpu);
4965 if (vcpu->fpu_active)
4966 kvm_load_guest_fpu(vcpu);
4967 kvm_load_guest_xcr0(vcpu);
4969 atomic_set(&vcpu->guest_mode, 1);
4972 local_irq_disable();
4974 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4975 || need_resched() || signal_pending(current)) {
4976 atomic_set(&vcpu->guest_mode, 0);
4984 inject_pending_event(vcpu);
4986 /* enable NMI/IRQ window open exits if needed */
4987 if (vcpu->arch.nmi_pending)
4988 kvm_x86_ops->enable_nmi_window(vcpu);
4989 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4990 kvm_x86_ops->enable_irq_window(vcpu);
4992 if (kvm_lapic_enabled(vcpu)) {
4993 update_cr8_intercept(vcpu);
4994 kvm_lapic_sync_to_vapic(vcpu);
4997 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5001 if (unlikely(vcpu->arch.switch_db_regs)) {
5003 set_debugreg(vcpu->arch.eff_db[0], 0);
5004 set_debugreg(vcpu->arch.eff_db[1], 1);
5005 set_debugreg(vcpu->arch.eff_db[2], 2);
5006 set_debugreg(vcpu->arch.eff_db[3], 3);
5009 trace_kvm_entry(vcpu->vcpu_id);
5010 kvm_x86_ops->run(vcpu);
5013 * If the guest has used debug registers, at least dr7
5014 * will be disabled while returning to the host.
5015 * If we don't have active breakpoints in the host, we don't
5016 * care about the messed up debug address registers. But if
5017 * we have some of them active, restore the old state.
5019 if (hw_breakpoint_active())
5020 hw_breakpoint_restore();
5022 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5024 atomic_set(&vcpu->guest_mode, 0);
5031 * We must have an instruction between local_irq_enable() and
5032 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5033 * the interrupt shadow. The stat.exits increment will do nicely.
5034 * But we need to prevent reordering, hence this barrier():
5042 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5045 * Profile KVM exit RIPs:
5047 if (unlikely(prof_on == KVM_PROFILING)) {
5048 unsigned long rip = kvm_rip_read(vcpu);
5049 profile_hit(KVM_PROFILING, (void *)rip);
5053 kvm_lapic_sync_from_vapic(vcpu);
5055 r = kvm_x86_ops->handle_exit(vcpu);
5061 static int __vcpu_run(struct kvm_vcpu *vcpu)
5064 struct kvm *kvm = vcpu->kvm;
5066 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5067 pr_debug("vcpu %d received sipi with vector # %x\n",
5068 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5069 kvm_lapic_reset(vcpu);
5070 r = kvm_arch_vcpu_reset(vcpu);
5073 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5076 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5081 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5082 r = vcpu_enter_guest(vcpu);
5084 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5085 kvm_vcpu_block(vcpu);
5086 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5087 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5089 switch(vcpu->arch.mp_state) {
5090 case KVM_MP_STATE_HALTED:
5091 vcpu->arch.mp_state =
5092 KVM_MP_STATE_RUNNABLE;
5093 case KVM_MP_STATE_RUNNABLE:
5095 case KVM_MP_STATE_SIPI_RECEIVED:
5106 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5107 if (kvm_cpu_has_pending_timer(vcpu))
5108 kvm_inject_pending_timer_irqs(vcpu);
5110 if (dm_request_for_irq_injection(vcpu)) {
5112 vcpu->run->exit_reason = KVM_EXIT_INTR;
5113 ++vcpu->stat.request_irq_exits;
5115 if (signal_pending(current)) {
5117 vcpu->run->exit_reason = KVM_EXIT_INTR;
5118 ++vcpu->stat.signal_exits;
5120 if (need_resched()) {
5121 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5123 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5127 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5134 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5139 if (vcpu->sigset_active)
5140 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5142 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5143 kvm_vcpu_block(vcpu);
5144 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5149 /* re-sync apic's tpr */
5150 if (!irqchip_in_kernel(vcpu->kvm))
5151 kvm_set_cr8(vcpu, kvm_run->cr8);
5153 if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5154 if (vcpu->mmio_needed) {
5155 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5156 vcpu->mmio_read_completed = 1;
5157 vcpu->mmio_needed = 0;
5159 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5160 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5161 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5162 if (r != EMULATE_DONE) {
5167 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5168 kvm_register_write(vcpu, VCPU_REGS_RAX,
5169 kvm_run->hypercall.ret);
5171 r = __vcpu_run(vcpu);
5174 post_kvm_run_save(vcpu);
5175 if (vcpu->sigset_active)
5176 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5181 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5183 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5184 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5185 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5186 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5187 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5188 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5189 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5190 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5191 #ifdef CONFIG_X86_64
5192 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5193 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5194 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5195 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5196 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5197 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5198 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5199 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5202 regs->rip = kvm_rip_read(vcpu);
5203 regs->rflags = kvm_get_rflags(vcpu);
5208 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5210 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5211 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5212 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5213 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5214 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5215 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5216 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5217 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5218 #ifdef CONFIG_X86_64
5219 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5220 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5221 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5222 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5223 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5224 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5225 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5226 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5229 kvm_rip_write(vcpu, regs->rip);
5230 kvm_set_rflags(vcpu, regs->rflags);
5232 vcpu->arch.exception.pending = false;
5237 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5239 struct kvm_segment cs;
5241 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5245 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5247 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5248 struct kvm_sregs *sregs)
5252 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5253 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5254 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5255 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5256 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5257 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5259 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5260 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5262 kvm_x86_ops->get_idt(vcpu, &dt);
5263 sregs->idt.limit = dt.size;
5264 sregs->idt.base = dt.address;
5265 kvm_x86_ops->get_gdt(vcpu, &dt);
5266 sregs->gdt.limit = dt.size;
5267 sregs->gdt.base = dt.address;
5269 sregs->cr0 = kvm_read_cr0(vcpu);
5270 sregs->cr2 = vcpu->arch.cr2;
5271 sregs->cr3 = vcpu->arch.cr3;
5272 sregs->cr4 = kvm_read_cr4(vcpu);
5273 sregs->cr8 = kvm_get_cr8(vcpu);
5274 sregs->efer = vcpu->arch.efer;
5275 sregs->apic_base = kvm_get_apic_base(vcpu);
5277 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5279 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5280 set_bit(vcpu->arch.interrupt.nr,
5281 (unsigned long *)sregs->interrupt_bitmap);
5286 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5287 struct kvm_mp_state *mp_state)
5289 mp_state->mp_state = vcpu->arch.mp_state;
5293 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5294 struct kvm_mp_state *mp_state)
5296 vcpu->arch.mp_state = mp_state->mp_state;
5300 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5301 bool has_error_code, u32 error_code)
5303 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5306 init_emulate_ctxt(vcpu);
5308 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5309 tss_selector, reason, has_error_code,
5313 return EMULATE_FAIL;
5315 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5316 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5317 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5318 return EMULATE_DONE;
5320 EXPORT_SYMBOL_GPL(kvm_task_switch);
5322 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5323 struct kvm_sregs *sregs)
5325 int mmu_reset_needed = 0;
5326 int pending_vec, max_bits;
5329 dt.size = sregs->idt.limit;
5330 dt.address = sregs->idt.base;
5331 kvm_x86_ops->set_idt(vcpu, &dt);
5332 dt.size = sregs->gdt.limit;
5333 dt.address = sregs->gdt.base;
5334 kvm_x86_ops->set_gdt(vcpu, &dt);
5336 vcpu->arch.cr2 = sregs->cr2;
5337 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5338 vcpu->arch.cr3 = sregs->cr3;
5340 kvm_set_cr8(vcpu, sregs->cr8);
5342 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5343 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5344 kvm_set_apic_base(vcpu, sregs->apic_base);
5346 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5347 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5348 vcpu->arch.cr0 = sregs->cr0;
5350 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5351 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5352 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5353 load_pdptrs(vcpu, vcpu->arch.cr3);
5354 mmu_reset_needed = 1;
5357 if (mmu_reset_needed)
5358 kvm_mmu_reset_context(vcpu);
5360 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5361 pending_vec = find_first_bit(
5362 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5363 if (pending_vec < max_bits) {
5364 kvm_queue_interrupt(vcpu, pending_vec, false);
5365 pr_debug("Set back pending irq %d\n", pending_vec);
5366 if (irqchip_in_kernel(vcpu->kvm))
5367 kvm_pic_clear_isr_ack(vcpu->kvm);
5370 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5371 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5372 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5373 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5374 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5375 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5377 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5378 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5380 update_cr8_intercept(vcpu);
5382 /* Older userspace won't unhalt the vcpu on reset. */
5383 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5384 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5386 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5391 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5392 struct kvm_guest_debug *dbg)
5394 unsigned long rflags;
5397 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5399 if (vcpu->arch.exception.pending)
5401 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5402 kvm_queue_exception(vcpu, DB_VECTOR);
5404 kvm_queue_exception(vcpu, BP_VECTOR);
5408 * Read rflags as long as potentially injected trace flags are still
5411 rflags = kvm_get_rflags(vcpu);
5413 vcpu->guest_debug = dbg->control;
5414 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5415 vcpu->guest_debug = 0;
5417 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5418 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5419 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5420 vcpu->arch.switch_db_regs =
5421 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5423 for (i = 0; i < KVM_NR_DB_REGS; i++)
5424 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5425 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5428 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5429 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5430 get_segment_base(vcpu, VCPU_SREG_CS);
5433 * Trigger an rflags update that will inject or remove the trace
5436 kvm_set_rflags(vcpu, rflags);
5438 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5448 * Translate a guest virtual address to a guest physical address.
5450 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5451 struct kvm_translation *tr)
5453 unsigned long vaddr = tr->linear_address;
5457 idx = srcu_read_lock(&vcpu->kvm->srcu);
5458 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5459 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5460 tr->physical_address = gpa;
5461 tr->valid = gpa != UNMAPPED_GVA;
5468 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5470 struct i387_fxsave_struct *fxsave =
5471 &vcpu->arch.guest_fpu.state->fxsave;
5473 memcpy(fpu->fpr, fxsave->st_space, 128);
5474 fpu->fcw = fxsave->cwd;
5475 fpu->fsw = fxsave->swd;
5476 fpu->ftwx = fxsave->twd;
5477 fpu->last_opcode = fxsave->fop;
5478 fpu->last_ip = fxsave->rip;
5479 fpu->last_dp = fxsave->rdp;
5480 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5485 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5487 struct i387_fxsave_struct *fxsave =
5488 &vcpu->arch.guest_fpu.state->fxsave;
5490 memcpy(fxsave->st_space, fpu->fpr, 128);
5491 fxsave->cwd = fpu->fcw;
5492 fxsave->swd = fpu->fsw;
5493 fxsave->twd = fpu->ftwx;
5494 fxsave->fop = fpu->last_opcode;
5495 fxsave->rip = fpu->last_ip;
5496 fxsave->rdp = fpu->last_dp;
5497 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5502 int fx_init(struct kvm_vcpu *vcpu)
5506 err = fpu_alloc(&vcpu->arch.guest_fpu);
5510 fpu_finit(&vcpu->arch.guest_fpu);
5513 * Ensure guest xcr0 is valid for loading
5515 vcpu->arch.xcr0 = XSTATE_FP;
5517 vcpu->arch.cr0 |= X86_CR0_ET;
5521 EXPORT_SYMBOL_GPL(fx_init);
5523 static void fx_free(struct kvm_vcpu *vcpu)
5525 fpu_free(&vcpu->arch.guest_fpu);
5528 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5530 if (vcpu->guest_fpu_loaded)
5534 * Restore all possible states in the guest,
5535 * and assume host would use all available bits.
5536 * Guest xcr0 would be loaded later.
5538 kvm_put_guest_xcr0(vcpu);
5539 vcpu->guest_fpu_loaded = 1;
5540 unlazy_fpu(current);
5541 fpu_restore_checking(&vcpu->arch.guest_fpu);
5545 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5547 kvm_put_guest_xcr0(vcpu);
5549 if (!vcpu->guest_fpu_loaded)
5552 vcpu->guest_fpu_loaded = 0;
5553 fpu_save_init(&vcpu->arch.guest_fpu);
5554 ++vcpu->stat.fpu_reload;
5555 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5559 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5561 if (vcpu->arch.time_page) {
5562 kvm_release_page_dirty(vcpu->arch.time_page);
5563 vcpu->arch.time_page = NULL;
5566 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5568 kvm_x86_ops->vcpu_free(vcpu);
5571 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5574 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5575 printk_once(KERN_WARNING
5576 "kvm: SMP vm created on host with unstable TSC; "
5577 "guest TSC will not be reliable\n");
5578 return kvm_x86_ops->vcpu_create(kvm, id);
5581 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5585 vcpu->arch.mtrr_state.have_fixed = 1;
5587 r = kvm_arch_vcpu_reset(vcpu);
5589 r = kvm_mmu_setup(vcpu);
5596 kvm_x86_ops->vcpu_free(vcpu);
5600 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5603 kvm_mmu_unload(vcpu);
5607 kvm_x86_ops->vcpu_free(vcpu);
5610 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5612 vcpu->arch.nmi_pending = false;
5613 vcpu->arch.nmi_injected = false;
5615 vcpu->arch.switch_db_regs = 0;
5616 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5617 vcpu->arch.dr6 = DR6_FIXED_1;
5618 vcpu->arch.dr7 = DR7_FIXED_1;
5620 return kvm_x86_ops->vcpu_reset(vcpu);
5623 int kvm_arch_hardware_enable(void *garbage)
5626 struct kvm_vcpu *vcpu;
5629 kvm_shared_msr_cpu_online();
5630 list_for_each_entry(kvm, &vm_list, vm_list)
5631 kvm_for_each_vcpu(i, vcpu, kvm)
5632 if (vcpu->cpu == smp_processor_id())
5633 kvm_request_guest_time_update(vcpu);
5634 return kvm_x86_ops->hardware_enable(garbage);
5637 void kvm_arch_hardware_disable(void *garbage)
5639 kvm_x86_ops->hardware_disable(garbage);
5640 drop_user_return_notifiers(garbage);
5643 int kvm_arch_hardware_setup(void)
5645 return kvm_x86_ops->hardware_setup();
5648 void kvm_arch_hardware_unsetup(void)
5650 kvm_x86_ops->hardware_unsetup();
5653 void kvm_arch_check_processor_compat(void *rtn)
5655 kvm_x86_ops->check_processor_compatibility(rtn);
5658 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5664 BUG_ON(vcpu->kvm == NULL);
5667 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5668 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5669 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5670 vcpu->arch.mmu.translate_gpa = translate_gpa;
5671 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5672 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5674 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5676 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5681 vcpu->arch.pio_data = page_address(page);
5683 r = kvm_mmu_create(vcpu);
5685 goto fail_free_pio_data;
5687 if (irqchip_in_kernel(kvm)) {
5688 r = kvm_create_lapic(vcpu);
5690 goto fail_mmu_destroy;
5693 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5695 if (!vcpu->arch.mce_banks) {
5697 goto fail_free_lapic;
5699 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5701 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5702 goto fail_free_mce_banks;
5705 fail_free_mce_banks:
5706 kfree(vcpu->arch.mce_banks);
5708 kvm_free_lapic(vcpu);
5710 kvm_mmu_destroy(vcpu);
5712 free_page((unsigned long)vcpu->arch.pio_data);
5717 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5721 kfree(vcpu->arch.mce_banks);
5722 kvm_free_lapic(vcpu);
5723 idx = srcu_read_lock(&vcpu->kvm->srcu);
5724 kvm_mmu_destroy(vcpu);
5725 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5726 free_page((unsigned long)vcpu->arch.pio_data);
5729 struct kvm *kvm_arch_create_vm(void)
5731 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5734 return ERR_PTR(-ENOMEM);
5736 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5737 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5739 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5740 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5742 spin_lock_init(&kvm->arch.tsc_write_lock);
5747 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5750 kvm_mmu_unload(vcpu);
5754 static void kvm_free_vcpus(struct kvm *kvm)
5757 struct kvm_vcpu *vcpu;
5760 * Unpin any mmu pages first.
5762 kvm_for_each_vcpu(i, vcpu, kvm)
5763 kvm_unload_vcpu_mmu(vcpu);
5764 kvm_for_each_vcpu(i, vcpu, kvm)
5765 kvm_arch_vcpu_free(vcpu);
5767 mutex_lock(&kvm->lock);
5768 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5769 kvm->vcpus[i] = NULL;
5771 atomic_set(&kvm->online_vcpus, 0);
5772 mutex_unlock(&kvm->lock);
5775 void kvm_arch_sync_events(struct kvm *kvm)
5777 kvm_free_all_assigned_devices(kvm);
5781 void kvm_arch_destroy_vm(struct kvm *kvm)
5783 kvm_iommu_unmap_guest(kvm);
5784 kfree(kvm->arch.vpic);
5785 kfree(kvm->arch.vioapic);
5786 kvm_free_vcpus(kvm);
5787 kvm_free_physmem(kvm);
5788 if (kvm->arch.apic_access_page)
5789 put_page(kvm->arch.apic_access_page);
5790 if (kvm->arch.ept_identity_pagetable)
5791 put_page(kvm->arch.ept_identity_pagetable);
5792 cleanup_srcu_struct(&kvm->srcu);
5796 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5797 struct kvm_memory_slot *memslot,
5798 struct kvm_memory_slot old,
5799 struct kvm_userspace_memory_region *mem,
5802 int npages = memslot->npages;
5803 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5805 /* Prevent internal slot pages from being moved by fork()/COW. */
5806 if (memslot->id >= KVM_MEMORY_SLOTS)
5807 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5809 /*To keep backward compatibility with older userspace,
5810 *x86 needs to hanlde !user_alloc case.
5813 if (npages && !old.rmap) {
5814 unsigned long userspace_addr;
5816 down_write(¤t->mm->mmap_sem);
5817 userspace_addr = do_mmap(NULL, 0,
5819 PROT_READ | PROT_WRITE,
5822 up_write(¤t->mm->mmap_sem);
5824 if (IS_ERR((void *)userspace_addr))
5825 return PTR_ERR((void *)userspace_addr);
5827 memslot->userspace_addr = userspace_addr;
5835 void kvm_arch_commit_memory_region(struct kvm *kvm,
5836 struct kvm_userspace_memory_region *mem,
5837 struct kvm_memory_slot old,
5841 int npages = mem->memory_size >> PAGE_SHIFT;
5843 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5846 down_write(¤t->mm->mmap_sem);
5847 ret = do_munmap(current->mm, old.userspace_addr,
5848 old.npages * PAGE_SIZE);
5849 up_write(¤t->mm->mmap_sem);
5852 "kvm_vm_ioctl_set_memory_region: "
5853 "failed to munmap memory\n");
5856 spin_lock(&kvm->mmu_lock);
5857 if (!kvm->arch.n_requested_mmu_pages) {
5858 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5859 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5862 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5863 spin_unlock(&kvm->mmu_lock);
5866 void kvm_arch_flush_shadow(struct kvm *kvm)
5868 kvm_mmu_zap_all(kvm);
5869 kvm_reload_remote_mmus(kvm);
5872 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5874 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5875 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5876 || vcpu->arch.nmi_pending ||
5877 (kvm_arch_interrupt_allowed(vcpu) &&
5878 kvm_cpu_has_interrupt(vcpu));
5881 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5884 int cpu = vcpu->cpu;
5886 if (waitqueue_active(&vcpu->wq)) {
5887 wake_up_interruptible(&vcpu->wq);
5888 ++vcpu->stat.halt_wakeup;
5892 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5893 if (atomic_xchg(&vcpu->guest_mode, 0))
5894 smp_send_reschedule(cpu);
5898 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5900 return kvm_x86_ops->interrupt_allowed(vcpu);
5903 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5905 unsigned long current_rip = kvm_rip_read(vcpu) +
5906 get_segment_base(vcpu, VCPU_SREG_CS);
5908 return current_rip == linear_rip;
5910 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5912 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5914 unsigned long rflags;
5916 rflags = kvm_x86_ops->get_rflags(vcpu);
5917 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5918 rflags &= ~X86_EFLAGS_TF;
5921 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5923 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5925 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5926 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5927 rflags |= X86_EFLAGS_TF;
5928 kvm_x86_ops->set_rflags(vcpu, rflags);
5930 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5932 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5933 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5934 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5935 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5936 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5937 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5938 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5939 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5940 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5941 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5942 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5943 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);