arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define CREATE_TRACE_POINTS
  72 #include "trace.h"
  73
  74 #define MAX_IO_MSRS 256
  75 #define KVM_MAX_MCE_BANKS 32
  76 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  78
  79 #define emul_to_vcpu(ctxt) \
  80         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  81
  82 /* EFER defaults:
  83  * - enable syscall per default because its emulated by KVM
  84  * - enable LME and LMA per default on 64 bit KVM
  85  */
  86 #ifdef CONFIG_X86_64
  87 static
  88 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  89 #else
  90 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  91 #endif
  92
  93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  95
  96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  97                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  98
  99 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 100 static void process_nmi(struct kvm_vcpu *vcpu);
 101 static void enter_smm(struct kvm_vcpu *vcpu);
 102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 103
 104 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 105 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 106
 107 static bool __read_mostly ignore_msrs = 0;
 108 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 109
 110 static bool __read_mostly report_ignored_msrs = true;
 111 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 112
 113 unsigned int min_timer_period_us = 500;
 114 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 115
 116 static bool __read_mostly kvmclock_periodic_sync = true;
 117 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 118
 119 bool __read_mostly kvm_has_tsc_control;
 120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 121 u32  __read_mostly kvm_max_guest_tsc_khz;
 122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 123 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 125 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 127 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 129
 130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 131 static u32 __read_mostly tsc_tolerance_ppm = 250;
 132 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 133
 134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 135 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 136 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly vector_hashing = true;
 139 module_param(vector_hashing, bool, S_IRUGO);
 140
 141 #define KVM_NR_SHARED_MSRS 16
 142
 143 struct kvm_shared_msrs_global {
 144         int nr;
 145         u32 msrs[KVM_NR_SHARED_MSRS];
 146 };
 147
 148 struct kvm_shared_msrs {
 149         struct user_return_notifier urn;
 150         bool registered;
 151         struct kvm_shared_msr_values {
 152                 u64 host;
 153                 u64 curr;
 154         } values[KVM_NR_SHARED_MSRS];
 155 };
 156
 157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 158 static struct kvm_shared_msrs __percpu *shared_msrs;
 159
 160 struct kvm_stats_debugfs_item debugfs_entries[] = {
 161         { "pf_fixed", VCPU_STAT(pf_fixed) },
 162         { "pf_guest", VCPU_STAT(pf_guest) },
 163         { "tlb_flush", VCPU_STAT(tlb_flush) },
 164         { "invlpg", VCPU_STAT(invlpg) },
 165         { "exits", VCPU_STAT(exits) },
 166         { "io_exits", VCPU_STAT(io_exits) },
 167         { "mmio_exits", VCPU_STAT(mmio_exits) },
 168         { "signal_exits", VCPU_STAT(signal_exits) },
 169         { "irq_window", VCPU_STAT(irq_window_exits) },
 170         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 171         { "halt_exits", VCPU_STAT(halt_exits) },
 172         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 173         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 174         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 175         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 176         { "hypercalls", VCPU_STAT(hypercalls) },
 177         { "request_irq", VCPU_STAT(request_irq_exits) },
 178         { "irq_exits", VCPU_STAT(irq_exits) },
 179         { "host_state_reload", VCPU_STAT(host_state_reload) },
 180         { "efer_reload", VCPU_STAT(efer_reload) },
 181         { "fpu_reload", VCPU_STAT(fpu_reload) },
 182         { "insn_emulation", VCPU_STAT(insn_emulation) },
 183         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 184         { "irq_injections", VCPU_STAT(irq_injections) },
 185         { "nmi_injections", VCPU_STAT(nmi_injections) },
 186         { "req_event", VCPU_STAT(req_event) },
 187         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 188         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 189         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 190         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 191         { "mmu_flooded", VM_STAT(mmu_flooded) },
 192         { "mmu_recycled", VM_STAT(mmu_recycled) },
 193         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 194         { "mmu_unsync", VM_STAT(mmu_unsync) },
 195         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 196         { "largepages", VM_STAT(lpages) },
 197         { "max_mmu_page_hash_collisions",
 198                 VM_STAT(max_mmu_page_hash_collisions) },
 199         { NULL }
 200 };
 201
 202 u64 __read_mostly host_xcr0;
 203
 204 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 205
 206 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 207 {
 208         int i;
 209         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 210                 vcpu->arch.apf.gfns[i] = ~0;
 211 }
 212
 213 static void kvm_on_user_return(struct user_return_notifier *urn)
 214 {
 215         unsigned slot;
 216         struct kvm_shared_msrs *locals
 217                 = container_of(urn, struct kvm_shared_msrs, urn);
 218         struct kvm_shared_msr_values *values;
 219         unsigned long flags;
 220
 221         /*
 222          * Disabling irqs at this point since the following code could be
 223          * interrupted and executed through kvm_arch_hardware_disable()
 224          */
 225         local_irq_save(flags);
 226         if (locals->registered) {
 227                 locals->registered = false;
 228                 user_return_notifier_unregister(urn);
 229         }
 230         local_irq_restore(flags);
 231         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 232                 values = &locals->values[slot];
 233                 if (values->host != values->curr) {
 234                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 235                         values->curr = values->host;
 236                 }
 237         }
 238 }
 239
 240 static void shared_msr_update(unsigned slot, u32 msr)
 241 {
 242         u64 value;
 243         unsigned int cpu = smp_processor_id();
 244         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 245
 246         /* only read, and nobody should modify it at this time,
 247          * so don't need lock */
 248         if (slot >= shared_msrs_global.nr) {
 249                 printk(KERN_ERR "kvm: invalid MSR slot!");
 250                 return;
 251         }
 252         rdmsrl_safe(msr, &value);
 253         smsr->values[slot].host = value;
 254         smsr->values[slot].curr = value;
 255 }
 256
 257 void kvm_define_shared_msr(unsigned slot, u32 msr)
 258 {
 259         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 260         shared_msrs_global.msrs[slot] = msr;
 261         if (slot >= shared_msrs_global.nr)
 262                 shared_msrs_global.nr = slot + 1;
 263 }
 264 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 265
 266 static void kvm_shared_msr_cpu_online(void)
 267 {
 268         unsigned i;
 269
 270         for (i = 0; i < shared_msrs_global.nr; ++i)
 271                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 272 }
 273
 274 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 275 {
 276         unsigned int cpu = smp_processor_id();
 277         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 278         int err;
 279
 280         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 281                 return 0;
 282         smsr->values[slot].curr = value;
 283         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 284         if (err)
 285                 return 1;
 286
 287         if (!smsr->registered) {
 288                 smsr->urn.on_user_return = kvm_on_user_return;
 289                 user_return_notifier_register(&smsr->urn);
 290                 smsr->registered = true;
 291         }
 292         return 0;
 293 }
 294 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 295
 296 static void drop_user_return_notifiers(void)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300
 301         if (smsr->registered)
 302                 kvm_on_user_return(&smsr->urn);
 303 }
 304
 305 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 306 {
 307         return vcpu->arch.apic_base;
 308 }
 309 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 310
 311 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 312 {
 313         u64 old_state = vcpu->arch.apic_base &
 314                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 315         u64 new_state = msr_info->data &
 316                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 317         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 318                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 319
 320         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 321                 return 1;
 322         if (!msr_info->host_initiated &&
 323             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 324               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 325              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 326               old_state == 0)))
 327                 return 1;
 328
 329         kvm_lapic_set_base(vcpu, msr_info->data);
 330         return 0;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 333
 334 asmlinkage __visible void kvm_spurious_fault(void)
 335 {
 336         /* Fault while not rebooting.  We want the trace. */
 337         BUG();
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 340
 341 #define EXCPT_BENIGN            0
 342 #define EXCPT_CONTRIBUTORY      1
 343 #define EXCPT_PF                2
 344
 345 static int exception_class(int vector)
 346 {
 347         switch (vector) {
 348         case PF_VECTOR:
 349                 return EXCPT_PF;
 350         case DE_VECTOR:
 351         case TS_VECTOR:
 352         case NP_VECTOR:
 353         case SS_VECTOR:
 354         case GP_VECTOR:
 355                 return EXCPT_CONTRIBUTORY;
 356         default:
 357                 break;
 358         }
 359         return EXCPT_BENIGN;
 360 }
 361
 362 #define EXCPT_FAULT             0
 363 #define EXCPT_TRAP              1
 364 #define EXCPT_ABORT             2
 365 #define EXCPT_INTERRUPT         3
 366
 367 static int exception_type(int vector)
 368 {
 369         unsigned int mask;
 370
 371         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 372                 return EXCPT_INTERRUPT;
 373
 374         mask = 1 << vector;
 375
 376         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 377         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 378                 return EXCPT_TRAP;
 379
 380         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 381                 return EXCPT_ABORT;
 382
 383         /* Reserved exceptions will result in fault */
 384         return EXCPT_FAULT;
 385 }
 386
 387 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 388                 unsigned nr, bool has_error, u32 error_code,
 389                 bool reinject)
 390 {
 391         u32 prev_nr;
 392         int class1, class2;
 393
 394         kvm_make_request(KVM_REQ_EVENT, vcpu);
 395
 396         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 397         queue:
 398                 if (has_error && !is_protmode(vcpu))
 399                         has_error = false;
 400                 if (reinject) {
 401                         /*
 402                          * On vmentry, vcpu->arch.exception.pending is only
 403                          * true if an event injection was blocked by
 404                          * nested_run_pending.  In that case, however,
 405                          * vcpu_enter_guest requests an immediate exit,
 406                          * and the guest shouldn't proceed far enough to
 407                          * need reinjection.
 408                          */
 409                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 410                         vcpu->arch.exception.injected = true;
 411                 } else {
 412                         vcpu->arch.exception.pending = true;
 413                         vcpu->arch.exception.injected = false;
 414                 }
 415                 vcpu->arch.exception.has_error_code = has_error;
 416                 vcpu->arch.exception.nr = nr;
 417                 vcpu->arch.exception.error_code = error_code;
 418                 return;
 419         }
 420
 421         /* to check exception */
 422         prev_nr = vcpu->arch.exception.nr;
 423         if (prev_nr == DF_VECTOR) {
 424                 /* triple fault -> shutdown */
 425                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 426                 return;
 427         }
 428         class1 = exception_class(prev_nr);
 429         class2 = exception_class(nr);
 430         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 431                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 432                 /*
 433                  * Generate double fault per SDM Table 5-5.  Set
 434                  * exception.pending = true so that the double fault
 435                  * can trigger a nested vmexit.
 436                  */
 437                 vcpu->arch.exception.pending = true;
 438                 vcpu->arch.exception.injected = false;
 439                 vcpu->arch.exception.has_error_code = true;
 440                 vcpu->arch.exception.nr = DF_VECTOR;
 441                 vcpu->arch.exception.error_code = 0;
 442         } else
 443                 /* replace previous exception with a new one in a hope
 444                    that instruction re-execution will regenerate lost
 445                    exception */
 446                 goto queue;
 447 }
 448
 449 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 450 {
 451         kvm_multiple_exception(vcpu, nr, false, 0, false);
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 454
 455 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 456 {
 457         kvm_multiple_exception(vcpu, nr, false, 0, true);
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 460
 461 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 462 {
 463         if (err)
 464                 kvm_inject_gp(vcpu, 0);
 465         else
 466                 return kvm_skip_emulated_instruction(vcpu);
 467
 468         return 1;
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 471
 472 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 473 {
 474         ++vcpu->stat.pf_guest;
 475         vcpu->arch.exception.nested_apf =
 476                 is_guest_mode(vcpu) && fault->async_page_fault;
 477         if (vcpu->arch.exception.nested_apf)
 478                 vcpu->arch.apf.nested_apf_token = fault->address;
 479         else
 480                 vcpu->arch.cr2 = fault->address;
 481         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 482 }
 483 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 484
 485 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 486 {
 487         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 488                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 489         else
 490                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 491
 492         return fault->nested_page_fault;
 493 }
 494
 495 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 496 {
 497         atomic_inc(&vcpu->arch.nmi_queued);
 498         kvm_make_request(KVM_REQ_NMI, vcpu);
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 501
 502 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 503 {
 504         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 505 }
 506 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 507
 508 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 509 {
 510         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 511 }
 512 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 513
 514 /*
 515  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 516  * a #GP and return false.
 517  */
 518 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 519 {
 520         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 521                 return true;
 522         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 523         return false;
 524 }
 525 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 526
 527 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 528 {
 529         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 530                 return true;
 531
 532         kvm_queue_exception(vcpu, UD_VECTOR);
 533         return false;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_require_dr);
 536
 537 /*
 538  * This function will be used to read from the physical memory of the currently
 539  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 540  * can read from guest physical or from the guest's guest physical memory.
 541  */
 542 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 543                             gfn_t ngfn, void *data, int offset, int len,
 544                             u32 access)
 545 {
 546         struct x86_exception exception;
 547         gfn_t real_gfn;
 548         gpa_t ngpa;
 549
 550         ngpa     = gfn_to_gpa(ngfn);
 551         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 552         if (real_gfn == UNMAPPED_GVA)
 553                 return -EFAULT;
 554
 555         real_gfn = gpa_to_gfn(real_gfn);
 556
 557         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 558 }
 559 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 560
 561 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 562                                void *data, int offset, int len, u32 access)
 563 {
 564         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 565                                        data, offset, len, access);
 566 }
 567
 568 /*
 569  * Load the pae pdptrs.  Return true is they are all valid.
 570  */
 571 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 572 {
 573         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 574         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 575         int i;
 576         int ret;
 577         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 578
 579         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 580                                       offset * sizeof(u64), sizeof(pdpte),
 581                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 582         if (ret < 0) {
 583                 ret = 0;
 584                 goto out;
 585         }
 586         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 587                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 588                     (pdpte[i] &
 589                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 590                         ret = 0;
 591                         goto out;
 592                 }
 593         }
 594         ret = 1;
 595
 596         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 597         __set_bit(VCPU_EXREG_PDPTR,
 598                   (unsigned long *)&vcpu->arch.regs_avail);
 599         __set_bit(VCPU_EXREG_PDPTR,
 600                   (unsigned long *)&vcpu->arch.regs_dirty);
 601 out:
 602
 603         return ret;
 604 }
 605 EXPORT_SYMBOL_GPL(load_pdptrs);
 606
 607 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 608 {
 609         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 610         bool changed = true;
 611         int offset;
 612         gfn_t gfn;
 613         int r;
 614
 615         if (is_long_mode(vcpu) || !is_pae(vcpu))
 616                 return false;
 617
 618         if (!test_bit(VCPU_EXREG_PDPTR,
 619                       (unsigned long *)&vcpu->arch.regs_avail))
 620                 return true;
 621
 622         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 623         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 624         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 625                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 626         if (r < 0)
 627                 goto out;
 628         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 629 out:
 630
 631         return changed;
 632 }
 633 EXPORT_SYMBOL_GPL(pdptrs_changed);
 634
 635 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 636 {
 637         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 638         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 639
 640         cr0 |= X86_CR0_ET;
 641
 642 #ifdef CONFIG_X86_64
 643         if (cr0 & 0xffffffff00000000UL)
 644                 return 1;
 645 #endif
 646
 647         cr0 &= ~CR0_RESERVED_BITS;
 648
 649         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 650                 return 1;
 651
 652         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 653                 return 1;
 654
 655         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 656 #ifdef CONFIG_X86_64
 657                 if ((vcpu->arch.efer & EFER_LME)) {
 658                         int cs_db, cs_l;
 659
 660                         if (!is_pae(vcpu))
 661                                 return 1;
 662                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 663                         if (cs_l)
 664                                 return 1;
 665                 } else
 666 #endif
 667                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 668                                                  kvm_read_cr3(vcpu)))
 669                         return 1;
 670         }
 671
 672         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 673                 return 1;
 674
 675         kvm_x86_ops->set_cr0(vcpu, cr0);
 676
 677         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 678                 kvm_clear_async_pf_completion_queue(vcpu);
 679                 kvm_async_pf_hash_reset(vcpu);
 680         }
 681
 682         if ((cr0 ^ old_cr0) & update_bits)
 683                 kvm_mmu_reset_context(vcpu);
 684
 685         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 686             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 687             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 688                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 689
 690         return 0;
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 693
 694 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 695 {
 696         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_lmsw);
 699
 700 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 701 {
 702         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 703                         !vcpu->guest_xcr0_loaded) {
 704                 /* kvm_set_xcr() also depends on this */
 705                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 706                 vcpu->guest_xcr0_loaded = 1;
 707         }
 708 }
 709
 710 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 711 {
 712         if (vcpu->guest_xcr0_loaded) {
 713                 if (vcpu->arch.xcr0 != host_xcr0)
 714                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 715                 vcpu->guest_xcr0_loaded = 0;
 716         }
 717 }
 718
 719 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 720 {
 721         u64 xcr0 = xcr;
 722         u64 old_xcr0 = vcpu->arch.xcr0;
 723         u64 valid_bits;
 724
 725         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 726         if (index != XCR_XFEATURE_ENABLED_MASK)
 727                 return 1;
 728         if (!(xcr0 & XFEATURE_MASK_FP))
 729                 return 1;
 730         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 731                 return 1;
 732
 733         /*
 734          * Do not allow the guest to set bits that we do not support
 735          * saving.  However, xcr0 bit 0 is always set, even if the
 736          * emulated CPU does not support XSAVE (see fx_init).
 737          */
 738         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 739         if (xcr0 & ~valid_bits)
 740                 return 1;
 741
 742         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 743             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 744                 return 1;
 745
 746         if (xcr0 & XFEATURE_MASK_AVX512) {
 747                 if (!(xcr0 & XFEATURE_MASK_YMM))
 748                         return 1;
 749                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 750                         return 1;
 751         }
 752         vcpu->arch.xcr0 = xcr0;
 753
 754         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 755                 kvm_update_cpuid(vcpu);
 756         return 0;
 757 }
 758
 759 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 760 {
 761         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 762             __kvm_set_xcr(vcpu, index, xcr)) {
 763                 kvm_inject_gp(vcpu, 0);
 764                 return 1;
 765         }
 766         return 0;
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 769
 770 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 771 {
 772         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 773         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 774                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 775
 776         if (cr4 & CR4_RESERVED_BITS)
 777                 return 1;
 778
 779         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 780                 return 1;
 781
 782         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 783                 return 1;
 784
 785         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 786                 return 1;
 787
 788         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 789                 return 1;
 790
 791         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 792                 return 1;
 793
 794         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 795                 return 1;
 796
 797         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 798                 return 1;
 799
 800         if (is_long_mode(vcpu)) {
 801                 if (!(cr4 & X86_CR4_PAE))
 802                         return 1;
 803         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 804                    && ((cr4 ^ old_cr4) & pdptr_bits)
 805                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 806                                    kvm_read_cr3(vcpu)))
 807                 return 1;
 808
 809         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 810                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 811                         return 1;
 812
 813                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 814                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 815                         return 1;
 816         }
 817
 818         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 819                 return 1;
 820
 821         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 822             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 823                 kvm_mmu_reset_context(vcpu);
 824
 825         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 826                 kvm_update_cpuid(vcpu);
 827
 828         return 0;
 829 }
 830 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 831
 832 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 833 {
 834 #ifdef CONFIG_X86_64
 835         cr3 &= ~CR3_PCID_INVD;
 836 #endif
 837
 838         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 839                 kvm_mmu_sync_roots(vcpu);
 840                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 841                 return 0;
 842         }
 843
 844         if (is_long_mode(vcpu) &&
 845             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 846                 return 1;
 847         else if (is_pae(vcpu) && is_paging(vcpu) &&
 848                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 849                 return 1;
 850
 851         vcpu->arch.cr3 = cr3;
 852         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 853         kvm_mmu_new_cr3(vcpu);
 854         return 0;
 855 }
 856 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 857
 858 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 859 {
 860         if (cr8 & CR8_RESERVED_BITS)
 861                 return 1;
 862         if (lapic_in_kernel(vcpu))
 863                 kvm_lapic_set_tpr(vcpu, cr8);
 864         else
 865                 vcpu->arch.cr8 = cr8;
 866         return 0;
 867 }
 868 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 869
 870 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 871 {
 872         if (lapic_in_kernel(vcpu))
 873                 return kvm_lapic_get_cr8(vcpu);
 874         else
 875                 return vcpu->arch.cr8;
 876 }
 877 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 878
 879 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 880 {
 881         int i;
 882
 883         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 884                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 885                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 886                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 887         }
 888 }
 889
 890 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 891 {
 892         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 893                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 894 }
 895
 896 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 897 {
 898         unsigned long dr7;
 899
 900         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 901                 dr7 = vcpu->arch.guest_debug_dr7;
 902         else
 903                 dr7 = vcpu->arch.dr7;
 904         kvm_x86_ops->set_dr7(vcpu, dr7);
 905         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 906         if (dr7 & DR7_BP_EN_MASK)
 907                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 908 }
 909
 910 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 911 {
 912         u64 fixed = DR6_FIXED_1;
 913
 914         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 915                 fixed |= DR6_RTM;
 916         return fixed;
 917 }
 918
 919 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 920 {
 921         switch (dr) {
 922         case 0 ... 3:
 923                 vcpu->arch.db[dr] = val;
 924                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 925                         vcpu->arch.eff_db[dr] = val;
 926                 break;
 927         case 4:
 928                 /* fall through */
 929         case 6:
 930                 if (val & 0xffffffff00000000ULL)
 931                         return -1; /* #GP */
 932                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 933                 kvm_update_dr6(vcpu);
 934                 break;
 935         case 5:
 936                 /* fall through */
 937         default: /* 7 */
 938                 if (val & 0xffffffff00000000ULL)
 939                         return -1; /* #GP */
 940                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 941                 kvm_update_dr7(vcpu);
 942                 break;
 943         }
 944
 945         return 0;
 946 }
 947
 948 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 949 {
 950         if (__kvm_set_dr(vcpu, dr, val)) {
 951                 kvm_inject_gp(vcpu, 0);
 952                 return 1;
 953         }
 954         return 0;
 955 }
 956 EXPORT_SYMBOL_GPL(kvm_set_dr);
 957
 958 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 959 {
 960         switch (dr) {
 961         case 0 ... 3:
 962                 *val = vcpu->arch.db[dr];
 963                 break;
 964         case 4:
 965                 /* fall through */
 966         case 6:
 967                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 968                         *val = vcpu->arch.dr6;
 969                 else
 970                         *val = kvm_x86_ops->get_dr6(vcpu);
 971                 break;
 972         case 5:
 973                 /* fall through */
 974         default: /* 7 */
 975                 *val = vcpu->arch.dr7;
 976                 break;
 977         }
 978         return 0;
 979 }
 980 EXPORT_SYMBOL_GPL(kvm_get_dr);
 981
 982 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 983 {
 984         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 985         u64 data;
 986         int err;
 987
 988         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 989         if (err)
 990                 return err;
 991         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 992         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 993         return err;
 994 }
 995 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 996
 997 /*
 998  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 999  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1000  *
1001  * This list is modified at module load time to reflect the
1002  * capabilities of the host cpu. This capabilities test skips MSRs that are
1003  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1004  * may depend on host virtualization features rather than host cpu features.
1005  */
1006
1007 static u32 msrs_to_save[] = {
1008         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1009         MSR_STAR,
1010 #ifdef CONFIG_X86_64
1011         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1012 #endif
1013         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1014         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1015 };
1016
1017 static unsigned num_msrs_to_save;
1018
1019 static u32 emulated_msrs[] = {
1020         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1021         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1022         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1023         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1024         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1025         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1026         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1027         HV_X64_MSR_RESET,
1028         HV_X64_MSR_VP_INDEX,
1029         HV_X64_MSR_VP_RUNTIME,
1030         HV_X64_MSR_SCONTROL,
1031         HV_X64_MSR_STIMER0_CONFIG,
1032         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1033         MSR_KVM_PV_EOI_EN,
1034
1035         MSR_IA32_TSC_ADJUST,
1036         MSR_IA32_TSCDEADLINE,
1037         MSR_IA32_MISC_ENABLE,
1038         MSR_IA32_MCG_STATUS,
1039         MSR_IA32_MCG_CTL,
1040         MSR_IA32_MCG_EXT_CTL,
1041         MSR_IA32_SMBASE,
1042         MSR_SMI_COUNT,
1043         MSR_PLATFORM_INFO,
1044         MSR_MISC_FEATURES_ENABLES,
1045 };
1046
1047 static unsigned num_emulated_msrs;
1048
1049 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1050 {
1051         if (efer & efer_reserved_bits)
1052                 return false;
1053
1054         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1055                         return false;
1056
1057         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1058                         return false;
1059
1060         return true;
1061 }
1062 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1063
1064 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1065 {
1066         u64 old_efer = vcpu->arch.efer;
1067
1068         if (!kvm_valid_efer(vcpu, efer))
1069                 return 1;
1070
1071         if (is_paging(vcpu)
1072             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1073                 return 1;
1074
1075         efer &= ~EFER_LMA;
1076         efer |= vcpu->arch.efer & EFER_LMA;
1077
1078         kvm_x86_ops->set_efer(vcpu, efer);
1079
1080         /* Update reserved bits */
1081         if ((efer ^ old_efer) & EFER_NX)
1082                 kvm_mmu_reset_context(vcpu);
1083
1084         return 0;
1085 }
1086
1087 void kvm_enable_efer_bits(u64 mask)
1088 {
1089        efer_reserved_bits &= ~mask;
1090 }
1091 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1092
1093 /*
1094  * Writes msr value into into the appropriate "register".
1095  * Returns 0 on success, non-0 otherwise.
1096  * Assumes vcpu_load() was already called.
1097  */
1098 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1099 {
1100         switch (msr->index) {
1101         case MSR_FS_BASE:
1102         case MSR_GS_BASE:
1103         case MSR_KERNEL_GS_BASE:
1104         case MSR_CSTAR:
1105         case MSR_LSTAR:
1106                 if (is_noncanonical_address(msr->data, vcpu))
1107                         return 1;
1108                 break;
1109         case MSR_IA32_SYSENTER_EIP:
1110         case MSR_IA32_SYSENTER_ESP:
1111                 /*
1112                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1113                  * non-canonical address is written on Intel but not on
1114                  * AMD (which ignores the top 32-bits, because it does
1115                  * not implement 64-bit SYSENTER).
1116                  *
1117                  * 64-bit code should hence be able to write a non-canonical
1118                  * value on AMD.  Making the address canonical ensures that
1119                  * vmentry does not fail on Intel after writing a non-canonical
1120                  * value, and that something deterministic happens if the guest
1121                  * invokes 64-bit SYSENTER.
1122                  */
1123                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1124         }
1125         return kvm_x86_ops->set_msr(vcpu, msr);
1126 }
1127 EXPORT_SYMBOL_GPL(kvm_set_msr);
1128
1129 /*
1130  * Adapt set_msr() to msr_io()'s calling convention
1131  */
1132 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1133 {
1134         struct msr_data msr;
1135         int r;
1136
1137         msr.index = index;
1138         msr.host_initiated = true;
1139         r = kvm_get_msr(vcpu, &msr);
1140         if (r)
1141                 return r;
1142
1143         *data = msr.data;
1144         return 0;
1145 }
1146
1147 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1148 {
1149         struct msr_data msr;
1150
1151         msr.data = *data;
1152         msr.index = index;
1153         msr.host_initiated = true;
1154         return kvm_set_msr(vcpu, &msr);
1155 }
1156
1157 #ifdef CONFIG_X86_64
1158 struct pvclock_gtod_data {
1159         seqcount_t      seq;
1160
1161         struct { /* extract of a clocksource struct */
1162                 int vclock_mode;
1163                 u64     cycle_last;
1164                 u64     mask;
1165                 u32     mult;
1166                 u32     shift;
1167         } clock;
1168
1169         u64             boot_ns;
1170         u64             nsec_base;
1171         u64             wall_time_sec;
1172 };
1173
1174 static struct pvclock_gtod_data pvclock_gtod_data;
1175
1176 static void update_pvclock_gtod(struct timekeeper *tk)
1177 {
1178         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1179         u64 boot_ns;
1180
1181         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1182
1183         write_seqcount_begin(&vdata->seq);
1184
1185         /* copy pvclock gtod data */
1186         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1187         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1188         vdata->clock.mask               = tk->tkr_mono.mask;
1189         vdata->clock.mult               = tk->tkr_mono.mult;
1190         vdata->clock.shift              = tk->tkr_mono.shift;
1191
1192         vdata->boot_ns                  = boot_ns;
1193         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1194
1195         vdata->wall_time_sec            = tk->xtime_sec;
1196
1197         write_seqcount_end(&vdata->seq);
1198 }
1199 #endif
1200
1201 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1202 {
1203         /*
1204          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1205          * vcpu_enter_guest.  This function is only called from
1206          * the physical CPU that is running vcpu.
1207          */
1208         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1209 }
1210
1211 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1212 {
1213         int version;
1214         int r;
1215         struct pvclock_wall_clock wc;
1216         struct timespec64 boot;
1217
1218         if (!wall_clock)
1219                 return;
1220
1221         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1222         if (r)
1223                 return;
1224
1225         if (version & 1)
1226                 ++version;  /* first time write, random junk */
1227
1228         ++version;
1229
1230         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1231                 return;
1232
1233         /*
1234          * The guest calculates current wall clock time by adding
1235          * system time (updated by kvm_guest_time_update below) to the
1236          * wall clock specified here.  guest system time equals host
1237          * system time for us, thus we must fill in host boot time here.
1238          */
1239         getboottime64(&boot);
1240
1241         if (kvm->arch.kvmclock_offset) {
1242                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1243                 boot = timespec64_sub(boot, ts);
1244         }
1245         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1246         wc.nsec = boot.tv_nsec;
1247         wc.version = version;
1248
1249         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1250
1251         version++;
1252         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1253 }
1254
1255 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1256 {
1257         do_shl32_div32(dividend, divisor);
1258         return dividend;
1259 }
1260
1261 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1262                                s8 *pshift, u32 *pmultiplier)
1263 {
1264         uint64_t scaled64;
1265         int32_t  shift = 0;
1266         uint64_t tps64;
1267         uint32_t tps32;
1268
1269         tps64 = base_hz;
1270         scaled64 = scaled_hz;
1271         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1272                 tps64 >>= 1;
1273                 shift--;
1274         }
1275
1276         tps32 = (uint32_t)tps64;
1277         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1278                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1279                         scaled64 >>= 1;
1280                 else
1281                         tps32 <<= 1;
1282                 shift++;
1283         }
1284
1285         *pshift = shift;
1286         *pmultiplier = div_frac(scaled64, tps32);
1287
1288         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1289                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1290 }
1291
1292 #ifdef CONFIG_X86_64
1293 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1294 #endif
1295
1296 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1297 static unsigned long max_tsc_khz;
1298
1299 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1300 {
1301         u64 v = (u64)khz * (1000000 + ppm);
1302         do_div(v, 1000000);
1303         return v;
1304 }
1305
1306 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1307 {
1308         u64 ratio;
1309
1310         /* Guest TSC same frequency as host TSC? */
1311         if (!scale) {
1312                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1313                 return 0;
1314         }
1315
1316         /* TSC scaling supported? */
1317         if (!kvm_has_tsc_control) {
1318                 if (user_tsc_khz > tsc_khz) {
1319                         vcpu->arch.tsc_catchup = 1;
1320                         vcpu->arch.tsc_always_catchup = 1;
1321                         return 0;
1322                 } else {
1323                         WARN(1, "user requested TSC rate below hardware speed\n");
1324                         return -1;
1325                 }
1326         }
1327
1328         /* TSC scaling required  - calculate ratio */
1329         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1330                                 user_tsc_khz, tsc_khz);
1331
1332         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1333                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1334                           user_tsc_khz);
1335                 return -1;
1336         }
1337
1338         vcpu->arch.tsc_scaling_ratio = ratio;
1339         return 0;
1340 }
1341
1342 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1343 {
1344         u32 thresh_lo, thresh_hi;
1345         int use_scaling = 0;
1346
1347         /* tsc_khz can be zero if TSC calibration fails */
1348         if (user_tsc_khz == 0) {
1349                 /* set tsc_scaling_ratio to a safe value */
1350                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1351                 return -1;
1352         }
1353
1354         /* Compute a scale to convert nanoseconds in TSC cycles */
1355         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1356                            &vcpu->arch.virtual_tsc_shift,
1357                            &vcpu->arch.virtual_tsc_mult);
1358         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1359
1360         /*
1361          * Compute the variation in TSC rate which is acceptable
1362          * within the range of tolerance and decide if the
1363          * rate being applied is within that bounds of the hardware
1364          * rate.  If so, no scaling or compensation need be done.
1365          */
1366         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1367         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1368         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1369                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1370                 use_scaling = 1;
1371         }
1372         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1373 }
1374
1375 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1376 {
1377         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1378                                       vcpu->arch.virtual_tsc_mult,
1379                                       vcpu->arch.virtual_tsc_shift);
1380         tsc += vcpu->arch.this_tsc_write;
1381         return tsc;
1382 }
1383
1384 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1385 {
1386 #ifdef CONFIG_X86_64
1387         bool vcpus_matched;
1388         struct kvm_arch *ka = &vcpu->kvm->arch;
1389         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1390
1391         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1392                          atomic_read(&vcpu->kvm->online_vcpus));
1393
1394         /*
1395          * Once the masterclock is enabled, always perform request in
1396          * order to update it.
1397          *
1398          * In order to enable masterclock, the host clocksource must be TSC
1399          * and the vcpus need to have matched TSCs.  When that happens,
1400          * perform request to enable masterclock.
1401          */
1402         if (ka->use_master_clock ||
1403             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1404                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1405
1406         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1407                             atomic_read(&vcpu->kvm->online_vcpus),
1408                             ka->use_master_clock, gtod->clock.vclock_mode);
1409 #endif
1410 }
1411
1412 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1413 {
1414         u64 curr_offset = vcpu->arch.tsc_offset;
1415         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1416 }
1417
1418 /*
1419  * Multiply tsc by a fixed point number represented by ratio.
1420  *
1421  * The most significant 64-N bits (mult) of ratio represent the
1422  * integral part of the fixed point number; the remaining N bits
1423  * (frac) represent the fractional part, ie. ratio represents a fixed
1424  * point number (mult + frac * 2^(-N)).
1425  *
1426  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1427  */
1428 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1429 {
1430         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1431 }
1432
1433 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1434 {
1435         u64 _tsc = tsc;
1436         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1437
1438         if (ratio != kvm_default_tsc_scaling_ratio)
1439                 _tsc = __scale_tsc(ratio, tsc);
1440
1441         return _tsc;
1442 }
1443 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1444
1445 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1446 {
1447         u64 tsc;
1448
1449         tsc = kvm_scale_tsc(vcpu, rdtsc());
1450
1451         return target_tsc - tsc;
1452 }
1453
1454 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1455 {
1456         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1457 }
1458 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1459
1460 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1461 {
1462         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1463         vcpu->arch.tsc_offset = offset;
1464 }
1465
1466 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1467 {
1468         struct kvm *kvm = vcpu->kvm;
1469         u64 offset, ns, elapsed;
1470         unsigned long flags;
1471         bool matched;
1472         bool already_matched;
1473         u64 data = msr->data;
1474         bool synchronizing = false;
1475
1476         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1477         offset = kvm_compute_tsc_offset(vcpu, data);
1478         ns = ktime_get_boot_ns();
1479         elapsed = ns - kvm->arch.last_tsc_nsec;
1480
1481         if (vcpu->arch.virtual_tsc_khz) {
1482                 if (data == 0 && msr->host_initiated) {
1483                         /*
1484                          * detection of vcpu initialization -- need to sync
1485                          * with other vCPUs. This particularly helps to keep
1486                          * kvm_clock stable after CPU hotplug
1487                          */
1488                         synchronizing = true;
1489                 } else {
1490                         u64 tsc_exp = kvm->arch.last_tsc_write +
1491                                                 nsec_to_cycles(vcpu, elapsed);
1492                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1493                         /*
1494                          * Special case: TSC write with a small delta (1 second)
1495                          * of virtual cycle time against real time is
1496                          * interpreted as an attempt to synchronize the CPU.
1497                          */
1498                         synchronizing = data < tsc_exp + tsc_hz &&
1499                                         data + tsc_hz > tsc_exp;
1500                 }
1501         }
1502
1503         /*
1504          * For a reliable TSC, we can match TSC offsets, and for an unstable
1505          * TSC, we add elapsed time in this computation.  We could let the
1506          * compensation code attempt to catch up if we fall behind, but
1507          * it's better to try to match offsets from the beginning.
1508          */
1509         if (synchronizing &&
1510             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1511                 if (!check_tsc_unstable()) {
1512                         offset = kvm->arch.cur_tsc_offset;
1513                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1514                 } else {
1515                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1516                         data += delta;
1517                         offset = kvm_compute_tsc_offset(vcpu, data);
1518                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1519                 }
1520                 matched = true;
1521                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1522         } else {
1523                 /*
1524                  * We split periods of matched TSC writes into generations.
1525                  * For each generation, we track the original measured
1526                  * nanosecond time, offset, and write, so if TSCs are in
1527                  * sync, we can match exact offset, and if not, we can match
1528                  * exact software computation in compute_guest_tsc()
1529                  *
1530                  * These values are tracked in kvm->arch.cur_xxx variables.
1531                  */
1532                 kvm->arch.cur_tsc_generation++;
1533                 kvm->arch.cur_tsc_nsec = ns;
1534                 kvm->arch.cur_tsc_write = data;
1535                 kvm->arch.cur_tsc_offset = offset;
1536                 matched = false;
1537                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1538                          kvm->arch.cur_tsc_generation, data);
1539         }
1540
1541         /*
1542          * We also track th most recent recorded KHZ, write and time to
1543          * allow the matching interval to be extended at each write.
1544          */
1545         kvm->arch.last_tsc_nsec = ns;
1546         kvm->arch.last_tsc_write = data;
1547         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1548
1549         vcpu->arch.last_guest_tsc = data;
1550
1551         /* Keep track of which generation this VCPU has synchronized to */
1552         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1553         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1554         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1555
1556         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1557                 update_ia32_tsc_adjust_msr(vcpu, offset);
1558
1559         kvm_vcpu_write_tsc_offset(vcpu, offset);
1560         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1561
1562         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1563         if (!matched) {
1564                 kvm->arch.nr_vcpus_matched_tsc = 0;
1565         } else if (!already_matched) {
1566                 kvm->arch.nr_vcpus_matched_tsc++;
1567         }
1568
1569         kvm_track_tsc_matching(vcpu);
1570         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1571 }
1572
1573 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1574
1575 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1576                                            s64 adjustment)
1577 {
1578         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1579 }
1580
1581 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1582 {
1583         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1584                 WARN_ON(adjustment < 0);
1585         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1586         adjust_tsc_offset_guest(vcpu, adjustment);
1587 }
1588
1589 #ifdef CONFIG_X86_64
1590
1591 static u64 read_tsc(void)
1592 {
1593         u64 ret = (u64)rdtsc_ordered();
1594         u64 last = pvclock_gtod_data.clock.cycle_last;
1595
1596         if (likely(ret >= last))
1597                 return ret;
1598
1599         /*
1600          * GCC likes to generate cmov here, but this branch is extremely
1601          * predictable (it's just a function of time and the likely is
1602          * very likely) and there's a data dependence, so force GCC
1603          * to generate a branch instead.  I don't barrier() because
1604          * we don't actually need a barrier, and if this function
1605          * ever gets inlined it will generate worse code.
1606          */
1607         asm volatile ("");
1608         return last;
1609 }
1610
1611 static inline u64 vgettsc(u64 *cycle_now)
1612 {
1613         long v;
1614         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1615
1616         *cycle_now = read_tsc();
1617
1618         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1619         return v * gtod->clock.mult;
1620 }
1621
1622 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1623 {
1624         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1625         unsigned long seq;
1626         int mode;
1627         u64 ns;
1628
1629         do {
1630                 seq = read_seqcount_begin(&gtod->seq);
1631                 mode = gtod->clock.vclock_mode;
1632                 ns = gtod->nsec_base;
1633                 ns += vgettsc(cycle_now);
1634                 ns >>= gtod->clock.shift;
1635                 ns += gtod->boot_ns;
1636         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1637         *t = ns;
1638
1639         return mode;
1640 }
1641
1642 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1643 {
1644         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1645         unsigned long seq;
1646         int mode;
1647         u64 ns;
1648
1649         do {
1650                 seq = read_seqcount_begin(&gtod->seq);
1651                 mode = gtod->clock.vclock_mode;
1652                 ts->tv_sec = gtod->wall_time_sec;
1653                 ns = gtod->nsec_base;
1654                 ns += vgettsc(cycle_now);
1655                 ns >>= gtod->clock.shift;
1656         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1657
1658         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1659         ts->tv_nsec = ns;
1660
1661         return mode;
1662 }
1663
1664 /* returns true if host is using tsc clocksource */
1665 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1666 {
1667         /* checked again under seqlock below */
1668         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1669                 return false;
1670
1671         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1672 }
1673
1674 /* returns true if host is using tsc clocksource */
1675 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1676                                            u64 *cycle_now)
1677 {
1678         /* checked again under seqlock below */
1679         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1680                 return false;
1681
1682         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1683 }
1684 #endif
1685
1686 /*
1687  *
1688  * Assuming a stable TSC across physical CPUS, and a stable TSC
1689  * across virtual CPUs, the following condition is possible.
1690  * Each numbered line represents an event visible to both
1691  * CPUs at the next numbered event.
1692  *
1693  * "timespecX" represents host monotonic time. "tscX" represents
1694  * RDTSC value.
1695  *
1696  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1697  *
1698  * 1.  read timespec0,tsc0
1699  * 2.                                   | timespec1 = timespec0 + N
1700  *                                      | tsc1 = tsc0 + M
1701  * 3. transition to guest               | transition to guest
1702  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1703  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1704  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1705  *
1706  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1707  *
1708  *      - ret0 < ret1
1709  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1710  *              ...
1711  *      - 0 < N - M => M < N
1712  *
1713  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1714  * always the case (the difference between two distinct xtime instances
1715  * might be smaller then the difference between corresponding TSC reads,
1716  * when updating guest vcpus pvclock areas).
1717  *
1718  * To avoid that problem, do not allow visibility of distinct
1719  * system_timestamp/tsc_timestamp values simultaneously: use a master
1720  * copy of host monotonic time values. Update that master copy
1721  * in lockstep.
1722  *
1723  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1724  *
1725  */
1726
1727 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1728 {
1729 #ifdef CONFIG_X86_64
1730         struct kvm_arch *ka = &kvm->arch;
1731         int vclock_mode;
1732         bool host_tsc_clocksource, vcpus_matched;
1733
1734         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1735                         atomic_read(&kvm->online_vcpus));
1736
1737         /*
1738          * If the host uses TSC clock, then passthrough TSC as stable
1739          * to the guest.
1740          */
1741         host_tsc_clocksource = kvm_get_time_and_clockread(
1742                                         &ka->master_kernel_ns,
1743                                         &ka->master_cycle_now);
1744
1745         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1746                                 && !ka->backwards_tsc_observed
1747                                 && !ka->boot_vcpu_runs_old_kvmclock;
1748
1749         if (ka->use_master_clock)
1750                 atomic_set(&kvm_guest_has_master_clock, 1);
1751
1752         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1753         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1754                                         vcpus_matched);
1755 #endif
1756 }
1757
1758 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1759 {
1760         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1761 }
1762
1763 static void kvm_gen_update_masterclock(struct kvm *kvm)
1764 {
1765 #ifdef CONFIG_X86_64
1766         int i;
1767         struct kvm_vcpu *vcpu;
1768         struct kvm_arch *ka = &kvm->arch;
1769
1770         spin_lock(&ka->pvclock_gtod_sync_lock);
1771         kvm_make_mclock_inprogress_request(kvm);
1772         /* no guest entries from this point */
1773         pvclock_update_vm_gtod_copy(kvm);
1774
1775         kvm_for_each_vcpu(i, vcpu, kvm)
1776                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1777
1778         /* guest entries allowed */
1779         kvm_for_each_vcpu(i, vcpu, kvm)
1780                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1781
1782         spin_unlock(&ka->pvclock_gtod_sync_lock);
1783 #endif
1784 }
1785
1786 u64 get_kvmclock_ns(struct kvm *kvm)
1787 {
1788         struct kvm_arch *ka = &kvm->arch;
1789         struct pvclock_vcpu_time_info hv_clock;
1790         u64 ret;
1791
1792         spin_lock(&ka->pvclock_gtod_sync_lock);
1793         if (!ka->use_master_clock) {
1794                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1795                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1796         }
1797
1798         hv_clock.tsc_timestamp = ka->master_cycle_now;
1799         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1800         spin_unlock(&ka->pvclock_gtod_sync_lock);
1801
1802         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1803         get_cpu();
1804
1805         if (__this_cpu_read(cpu_tsc_khz)) {
1806                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1807                                    &hv_clock.tsc_shift,
1808                                    &hv_clock.tsc_to_system_mul);
1809                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1810         } else
1811                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1812
1813         put_cpu();
1814
1815         return ret;
1816 }
1817
1818 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1819 {
1820         struct kvm_vcpu_arch *vcpu = &v->arch;
1821         struct pvclock_vcpu_time_info guest_hv_clock;
1822
1823         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1824                 &guest_hv_clock, sizeof(guest_hv_clock))))
1825                 return;
1826
1827         /* This VCPU is paused, but it's legal for a guest to read another
1828          * VCPU's kvmclock, so we really have to follow the specification where
1829          * it says that version is odd if data is being modified, and even after
1830          * it is consistent.
1831          *
1832          * Version field updates must be kept separate.  This is because
1833          * kvm_write_guest_cached might use a "rep movs" instruction, and
1834          * writes within a string instruction are weakly ordered.  So there
1835          * are three writes overall.
1836          *
1837          * As a small optimization, only write the version field in the first
1838          * and third write.  The vcpu->pv_time cache is still valid, because the
1839          * version field is the first in the struct.
1840          */
1841         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1842
1843         if (guest_hv_clock.version & 1)
1844                 ++guest_hv_clock.version;  /* first time write, random junk */
1845
1846         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1847         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1848                                 &vcpu->hv_clock,
1849                                 sizeof(vcpu->hv_clock.version));
1850
1851         smp_wmb();
1852
1853         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1854         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1855
1856         if (vcpu->pvclock_set_guest_stopped_request) {
1857                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1858                 vcpu->pvclock_set_guest_stopped_request = false;
1859         }
1860
1861         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1862
1863         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1864                                 &vcpu->hv_clock,
1865                                 sizeof(vcpu->hv_clock));
1866
1867         smp_wmb();
1868
1869         vcpu->hv_clock.version++;
1870         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1871                                 &vcpu->hv_clock,
1872                                 sizeof(vcpu->hv_clock.version));
1873 }
1874
1875 static int kvm_guest_time_update(struct kvm_vcpu *v)
1876 {
1877         unsigned long flags, tgt_tsc_khz;
1878         struct kvm_vcpu_arch *vcpu = &v->arch;
1879         struct kvm_arch *ka = &v->kvm->arch;
1880         s64 kernel_ns;
1881         u64 tsc_timestamp, host_tsc;
1882         u8 pvclock_flags;
1883         bool use_master_clock;
1884
1885         kernel_ns = 0;
1886         host_tsc = 0;
1887
1888         /*
1889          * If the host uses TSC clock, then passthrough TSC as stable
1890          * to the guest.
1891          */
1892         spin_lock(&ka->pvclock_gtod_sync_lock);
1893         use_master_clock = ka->use_master_clock;
1894         if (use_master_clock) {
1895                 host_tsc = ka->master_cycle_now;
1896                 kernel_ns = ka->master_kernel_ns;
1897         }
1898         spin_unlock(&ka->pvclock_gtod_sync_lock);
1899
1900         /* Keep irq disabled to prevent changes to the clock */
1901         local_irq_save(flags);
1902         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1903         if (unlikely(tgt_tsc_khz == 0)) {
1904                 local_irq_restore(flags);
1905                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1906                 return 1;
1907         }
1908         if (!use_master_clock) {
1909                 host_tsc = rdtsc();
1910                 kernel_ns = ktime_get_boot_ns();
1911         }
1912
1913         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1914
1915         /*
1916          * We may have to catch up the TSC to match elapsed wall clock
1917          * time for two reasons, even if kvmclock is used.
1918          *   1) CPU could have been running below the maximum TSC rate
1919          *   2) Broken TSC compensation resets the base at each VCPU
1920          *      entry to avoid unknown leaps of TSC even when running
1921          *      again on the same CPU.  This may cause apparent elapsed
1922          *      time to disappear, and the guest to stand still or run
1923          *      very slowly.
1924          */
1925         if (vcpu->tsc_catchup) {
1926                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1927                 if (tsc > tsc_timestamp) {
1928                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1929                         tsc_timestamp = tsc;
1930                 }
1931         }
1932
1933         local_irq_restore(flags);
1934
1935         /* With all the info we got, fill in the values */
1936
1937         if (kvm_has_tsc_control)
1938                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1939
1940         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1941                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1942                                    &vcpu->hv_clock.tsc_shift,
1943                                    &vcpu->hv_clock.tsc_to_system_mul);
1944                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1945         }
1946
1947         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1948         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1949         vcpu->last_guest_tsc = tsc_timestamp;
1950
1951         /* If the host uses TSC clocksource, then it is stable */
1952         pvclock_flags = 0;
1953         if (use_master_clock)
1954                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1955
1956         vcpu->hv_clock.flags = pvclock_flags;
1957
1958         if (vcpu->pv_time_enabled)
1959                 kvm_setup_pvclock_page(v);
1960         if (v == kvm_get_vcpu(v->kvm, 0))
1961                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1962         return 0;
1963 }
1964
1965 /*
1966  * kvmclock updates which are isolated to a given vcpu, such as
1967  * vcpu->cpu migration, should not allow system_timestamp from
1968  * the rest of the vcpus to remain static. Otherwise ntp frequency
1969  * correction applies to one vcpu's system_timestamp but not
1970  * the others.
1971  *
1972  * So in those cases, request a kvmclock update for all vcpus.
1973  * We need to rate-limit these requests though, as they can
1974  * considerably slow guests that have a large number of vcpus.
1975  * The time for a remote vcpu to update its kvmclock is bound
1976  * by the delay we use to rate-limit the updates.
1977  */
1978
1979 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1980
1981 static void kvmclock_update_fn(struct work_struct *work)
1982 {
1983         int i;
1984         struct delayed_work *dwork = to_delayed_work(work);
1985         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1986                                            kvmclock_update_work);
1987         struct kvm *kvm = container_of(ka, struct kvm, arch);
1988         struct kvm_vcpu *vcpu;
1989
1990         kvm_for_each_vcpu(i, vcpu, kvm) {
1991                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1992                 kvm_vcpu_kick(vcpu);
1993         }
1994 }
1995
1996 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1997 {
1998         struct kvm *kvm = v->kvm;
1999
2000         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2001         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2002                                         KVMCLOCK_UPDATE_DELAY);
2003 }
2004
2005 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2006
2007 static void kvmclock_sync_fn(struct work_struct *work)
2008 {
2009         struct delayed_work *dwork = to_delayed_work(work);
2010         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2011                                            kvmclock_sync_work);
2012         struct kvm *kvm = container_of(ka, struct kvm, arch);
2013
2014         if (!kvmclock_periodic_sync)
2015                 return;
2016
2017         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2018         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2019                                         KVMCLOCK_SYNC_PERIOD);
2020 }
2021
2022 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2023 {
2024         u64 mcg_cap = vcpu->arch.mcg_cap;
2025         unsigned bank_num = mcg_cap & 0xff;
2026         u32 msr = msr_info->index;
2027         u64 data = msr_info->data;
2028
2029         switch (msr) {
2030         case MSR_IA32_MCG_STATUS:
2031                 vcpu->arch.mcg_status = data;
2032                 break;
2033         case MSR_IA32_MCG_CTL:
2034                 if (!(mcg_cap & MCG_CTL_P))
2035                         return 1;
2036                 if (data != 0 && data != ~(u64)0)
2037                         return -1;
2038                 vcpu->arch.mcg_ctl = data;
2039                 break;
2040         default:
2041                 if (msr >= MSR_IA32_MC0_CTL &&
2042                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2043                         u32 offset = msr - MSR_IA32_MC0_CTL;
2044                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2045                          * some Linux kernels though clear bit 10 in bank 4 to
2046                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2047                          * this to avoid an uncatched #GP in the guest
2048                          */
2049                         if ((offset & 0x3) == 0 &&
2050                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2051                                 return -1;
2052                         if (!msr_info->host_initiated &&
2053                                 (offset & 0x3) == 1 && data != 0)
2054                                 return -1;
2055                         vcpu->arch.mce_banks[offset] = data;
2056                         break;
2057                 }
2058                 return 1;
2059         }
2060         return 0;
2061 }
2062
2063 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2064 {
2065         struct kvm *kvm = vcpu->kvm;
2066         int lm = is_long_mode(vcpu);
2067         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2068                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2069         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2070                 : kvm->arch.xen_hvm_config.blob_size_32;
2071         u32 page_num = data & ~PAGE_MASK;
2072         u64 page_addr = data & PAGE_MASK;
2073         u8 *page;
2074         int r;
2075
2076         r = -E2BIG;
2077         if (page_num >= blob_size)
2078                 goto out;
2079         r = -ENOMEM;
2080         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2081         if (IS_ERR(page)) {
2082                 r = PTR_ERR(page);
2083                 goto out;
2084         }
2085         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2086                 goto out_free;
2087         r = 0;
2088 out_free:
2089         kfree(page);
2090 out:
2091         return r;
2092 }
2093
2094 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2095 {
2096         gpa_t gpa = data & ~0x3f;
2097
2098         /* Bits 3:5 are reserved, Should be zero */
2099         if (data & 0x38)
2100                 return 1;
2101
2102         vcpu->arch.apf.msr_val = data;
2103
2104         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2105                 kvm_clear_async_pf_completion_queue(vcpu);
2106                 kvm_async_pf_hash_reset(vcpu);
2107                 return 0;
2108         }
2109
2110         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2111                                         sizeof(u32)))
2112                 return 1;
2113
2114         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2115         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2116         kvm_async_pf_wakeup_all(vcpu);
2117         return 0;
2118 }
2119
2120 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2121 {
2122         vcpu->arch.pv_time_enabled = false;
2123 }
2124
2125 static void record_steal_time(struct kvm_vcpu *vcpu)
2126 {
2127         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2128                 return;
2129
2130         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2131                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2132                 return;
2133
2134         vcpu->arch.st.steal.preempted = 0;
2135
2136         if (vcpu->arch.st.steal.version & 1)
2137                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2138
2139         vcpu->arch.st.steal.version += 1;
2140
2141         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2142                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2143
2144         smp_wmb();
2145
2146         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2147                 vcpu->arch.st.last_steal;
2148         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2149
2150         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2151                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2152
2153         smp_wmb();
2154
2155         vcpu->arch.st.steal.version += 1;
2156
2157         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2158                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2159 }
2160
2161 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2162 {
2163         bool pr = false;
2164         u32 msr = msr_info->index;
2165         u64 data = msr_info->data;
2166
2167         switch (msr) {
2168         case MSR_AMD64_NB_CFG:
2169         case MSR_IA32_UCODE_REV:
2170         case MSR_IA32_UCODE_WRITE:
2171         case MSR_VM_HSAVE_PA:
2172         case MSR_AMD64_PATCH_LOADER:
2173         case MSR_AMD64_BU_CFG2:
2174         case MSR_AMD64_DC_CFG:
2175                 break;
2176
2177         case MSR_EFER:
2178                 return set_efer(vcpu, data);
2179         case MSR_K7_HWCR:
2180                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2181                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2182                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2183                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2184                 if (data != 0) {
2185                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2186                                     data);
2187                         return 1;
2188                 }
2189                 break;
2190         case MSR_FAM10H_MMIO_CONF_BASE:
2191                 if (data != 0) {
2192                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2193                                     "0x%llx\n", data);
2194                         return 1;
2195                 }
2196                 break;
2197         case MSR_IA32_DEBUGCTLMSR:
2198                 if (!data) {
2199                         /* We support the non-activated case already */
2200                         break;
2201                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2202                         /* Values other than LBR and BTF are vendor-specific,
2203                            thus reserved and should throw a #GP */
2204                         return 1;
2205                 }
2206                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2207                             __func__, data);
2208                 break;
2209         case 0x200 ... 0x2ff:
2210                 return kvm_mtrr_set_msr(vcpu, msr, data);
2211         case MSR_IA32_APICBASE:
2212                 return kvm_set_apic_base(vcpu, msr_info);
2213         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2214                 return kvm_x2apic_msr_write(vcpu, msr, data);
2215         case MSR_IA32_TSCDEADLINE:
2216                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2217                 break;
2218         case MSR_IA32_TSC_ADJUST:
2219                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2220                         if (!msr_info->host_initiated) {
2221                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2222                                 adjust_tsc_offset_guest(vcpu, adj);
2223                         }
2224                         vcpu->arch.ia32_tsc_adjust_msr = data;
2225                 }
2226                 break;
2227         case MSR_IA32_MISC_ENABLE:
2228                 vcpu->arch.ia32_misc_enable_msr = data;
2229                 break;
2230         case MSR_IA32_SMBASE:
2231                 if (!msr_info->host_initiated)
2232                         return 1;
2233                 vcpu->arch.smbase = data;
2234                 break;
2235         case MSR_SMI_COUNT:
2236                 if (!msr_info->host_initiated)
2237                         return 1;
2238                 vcpu->arch.smi_count = data;
2239                 break;
2240         case MSR_KVM_WALL_CLOCK_NEW:
2241         case MSR_KVM_WALL_CLOCK:
2242                 vcpu->kvm->arch.wall_clock = data;
2243                 kvm_write_wall_clock(vcpu->kvm, data);
2244                 break;
2245         case MSR_KVM_SYSTEM_TIME_NEW:
2246         case MSR_KVM_SYSTEM_TIME: {
2247                 struct kvm_arch *ka = &vcpu->kvm->arch;
2248
2249                 kvmclock_reset(vcpu);
2250
2251                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2252                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2253
2254                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2255                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2256
2257                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2258                 }
2259
2260                 vcpu->arch.time = data;
2261                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2262
2263                 /* we verify if the enable bit is set... */
2264                 if (!(data & 1))
2265                         break;
2266
2267                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2268                      &vcpu->arch.pv_time, data & ~1ULL,
2269                      sizeof(struct pvclock_vcpu_time_info)))
2270                         vcpu->arch.pv_time_enabled = false;
2271                 else
2272                         vcpu->arch.pv_time_enabled = true;
2273
2274                 break;
2275         }
2276         case MSR_KVM_ASYNC_PF_EN:
2277                 if (kvm_pv_enable_async_pf(vcpu, data))
2278                         return 1;
2279                 break;
2280         case MSR_KVM_STEAL_TIME:
2281
2282                 if (unlikely(!sched_info_on()))
2283                         return 1;
2284
2285                 if (data & KVM_STEAL_RESERVED_MASK)
2286                         return 1;
2287
2288                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2289                                                 data & KVM_STEAL_VALID_BITS,
2290                                                 sizeof(struct kvm_steal_time)))
2291                         return 1;
2292
2293                 vcpu->arch.st.msr_val = data;
2294
2295                 if (!(data & KVM_MSR_ENABLED))
2296                         break;
2297
2298                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2299
2300                 break;
2301         case MSR_KVM_PV_EOI_EN:
2302                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2303                         return 1;
2304                 break;
2305
2306         case MSR_IA32_MCG_CTL:
2307         case MSR_IA32_MCG_STATUS:
2308         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2309                 return set_msr_mce(vcpu, msr_info);
2310
2311         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2312         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2313                 pr = true; /* fall through */
2314         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2315         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2316                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2317                         return kvm_pmu_set_msr(vcpu, msr_info);
2318
2319                 if (pr || data != 0)
2320                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2321                                     "0x%x data 0x%llx\n", msr, data);
2322                 break;
2323         case MSR_K7_CLK_CTL:
2324                 /*
2325                  * Ignore all writes to this no longer documented MSR.
2326                  * Writes are only relevant for old K7 processors,
2327                  * all pre-dating SVM, but a recommended workaround from
2328                  * AMD for these chips. It is possible to specify the
2329                  * affected processor models on the command line, hence
2330                  * the need to ignore the workaround.
2331                  */
2332                 break;
2333         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2334         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2335         case HV_X64_MSR_CRASH_CTL:
2336         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2337                 return kvm_hv_set_msr_common(vcpu, msr, data,
2338                                              msr_info->host_initiated);
2339         case MSR_IA32_BBL_CR_CTL3:
2340                 /* Drop writes to this legacy MSR -- see rdmsr
2341                  * counterpart for further detail.
2342                  */
2343                 if (report_ignored_msrs)
2344                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2345                                 msr, data);
2346                 break;
2347         case MSR_AMD64_OSVW_ID_LENGTH:
2348                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2349                         return 1;
2350                 vcpu->arch.osvw.length = data;
2351                 break;
2352         case MSR_AMD64_OSVW_STATUS:
2353                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2354                         return 1;
2355                 vcpu->arch.osvw.status = data;
2356                 break;
2357         case MSR_PLATFORM_INFO:
2358                 if (!msr_info->host_initiated ||
2359                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2360                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2361                      cpuid_fault_enabled(vcpu)))
2362                         return 1;
2363                 vcpu->arch.msr_platform_info = data;
2364                 break;
2365         case MSR_MISC_FEATURES_ENABLES:
2366                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2367                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2368                      !supports_cpuid_fault(vcpu)))
2369                         return 1;
2370                 vcpu->arch.msr_misc_features_enables = data;
2371                 break;
2372         default:
2373                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2374                         return xen_hvm_config(vcpu, data);
2375                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2376                         return kvm_pmu_set_msr(vcpu, msr_info);
2377                 if (!ignore_msrs) {
2378                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2379                                     msr, data);
2380                         return 1;
2381                 } else {
2382                         if (report_ignored_msrs)
2383                                 vcpu_unimpl(vcpu,
2384                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2385                                         msr, data);
2386                         break;
2387                 }
2388         }
2389         return 0;
2390 }
2391 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2392
2393
2394 /*
2395  * Reads an msr value (of 'msr_index') into 'pdata'.
2396  * Returns 0 on success, non-0 otherwise.
2397  * Assumes vcpu_load() was already called.
2398  */
2399 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2400 {
2401         return kvm_x86_ops->get_msr(vcpu, msr);
2402 }
2403 EXPORT_SYMBOL_GPL(kvm_get_msr);
2404
2405 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2406 {
2407         u64 data;
2408         u64 mcg_cap = vcpu->arch.mcg_cap;
2409         unsigned bank_num = mcg_cap & 0xff;
2410
2411         switch (msr) {
2412         case MSR_IA32_P5_MC_ADDR:
2413         case MSR_IA32_P5_MC_TYPE:
2414                 data = 0;
2415                 break;
2416         case MSR_IA32_MCG_CAP:
2417                 data = vcpu->arch.mcg_cap;
2418                 break;
2419         case MSR_IA32_MCG_CTL:
2420                 if (!(mcg_cap & MCG_CTL_P))
2421                         return 1;
2422                 data = vcpu->arch.mcg_ctl;
2423                 break;
2424         case MSR_IA32_MCG_STATUS:
2425                 data = vcpu->arch.mcg_status;
2426                 break;
2427         default:
2428                 if (msr >= MSR_IA32_MC0_CTL &&
2429                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2430                         u32 offset = msr - MSR_IA32_MC0_CTL;
2431                         data = vcpu->arch.mce_banks[offset];
2432                         break;
2433                 }
2434                 return 1;
2435         }
2436         *pdata = data;
2437         return 0;
2438 }
2439
2440 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2441 {
2442         switch (msr_info->index) {
2443         case MSR_IA32_PLATFORM_ID:
2444         case MSR_IA32_EBL_CR_POWERON:
2445         case MSR_IA32_DEBUGCTLMSR:
2446         case MSR_IA32_LASTBRANCHFROMIP:
2447         case MSR_IA32_LASTBRANCHTOIP:
2448         case MSR_IA32_LASTINTFROMIP:
2449         case MSR_IA32_LASTINTTOIP:
2450         case MSR_K8_SYSCFG:
2451         case MSR_K8_TSEG_ADDR:
2452         case MSR_K8_TSEG_MASK:
2453         case MSR_K7_HWCR:
2454         case MSR_VM_HSAVE_PA:
2455         case MSR_K8_INT_PENDING_MSG:
2456         case MSR_AMD64_NB_CFG:
2457         case MSR_FAM10H_MMIO_CONF_BASE:
2458         case MSR_AMD64_BU_CFG2:
2459         case MSR_IA32_PERF_CTL:
2460         case MSR_AMD64_DC_CFG:
2461                 msr_info->data = 0;
2462                 break;
2463         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2464         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2465         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2466         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2467                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2468                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2469                 msr_info->data = 0;
2470                 break;
2471         case MSR_IA32_UCODE_REV:
2472                 msr_info->data = 0x100000000ULL;
2473                 break;
2474         case MSR_MTRRcap:
2475         case 0x200 ... 0x2ff:
2476                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2477         case 0xcd: /* fsb frequency */
2478                 msr_info->data = 3;
2479                 break;
2480                 /*
2481                  * MSR_EBC_FREQUENCY_ID
2482                  * Conservative value valid for even the basic CPU models.
2483                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2484                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2485                  * and 266MHz for model 3, or 4. Set Core Clock
2486                  * Frequency to System Bus Frequency Ratio to 1 (bits
2487                  * 31:24) even though these are only valid for CPU
2488                  * models > 2, however guests may end up dividing or
2489                  * multiplying by zero otherwise.
2490                  */
2491         case MSR_EBC_FREQUENCY_ID:
2492                 msr_info->data = 1 << 24;
2493                 break;
2494         case MSR_IA32_APICBASE:
2495                 msr_info->data = kvm_get_apic_base(vcpu);
2496                 break;
2497         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2498                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2499                 break;
2500         case MSR_IA32_TSCDEADLINE:
2501                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2502                 break;
2503         case MSR_IA32_TSC_ADJUST:
2504                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2505                 break;
2506         case MSR_IA32_MISC_ENABLE:
2507                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2508                 break;
2509         case MSR_IA32_SMBASE:
2510                 if (!msr_info->host_initiated)
2511                         return 1;
2512                 msr_info->data = vcpu->arch.smbase;
2513                 break;
2514         case MSR_SMI_COUNT:
2515                 msr_info->data = vcpu->arch.smi_count;
2516                 break;
2517         case MSR_IA32_PERF_STATUS:
2518                 /* TSC increment by tick */
2519                 msr_info->data = 1000ULL;
2520                 /* CPU multiplier */
2521                 msr_info->data |= (((uint64_t)4ULL) << 40);
2522                 break;
2523         case MSR_EFER:
2524                 msr_info->data = vcpu->arch.efer;
2525                 break;
2526         case MSR_KVM_WALL_CLOCK:
2527         case MSR_KVM_WALL_CLOCK_NEW:
2528                 msr_info->data = vcpu->kvm->arch.wall_clock;
2529                 break;
2530         case MSR_KVM_SYSTEM_TIME:
2531         case MSR_KVM_SYSTEM_TIME_NEW:
2532                 msr_info->data = vcpu->arch.time;
2533                 break;
2534         case MSR_KVM_ASYNC_PF_EN:
2535                 msr_info->data = vcpu->arch.apf.msr_val;
2536                 break;
2537         case MSR_KVM_STEAL_TIME:
2538                 msr_info->data = vcpu->arch.st.msr_val;
2539                 break;
2540         case MSR_KVM_PV_EOI_EN:
2541                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2542                 break;
2543         case MSR_IA32_P5_MC_ADDR:
2544         case MSR_IA32_P5_MC_TYPE:
2545         case MSR_IA32_MCG_CAP:
2546         case MSR_IA32_MCG_CTL:
2547         case MSR_IA32_MCG_STATUS:
2548         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2549                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2550         case MSR_K7_CLK_CTL:
2551                 /*
2552                  * Provide expected ramp-up count for K7. All other
2553                  * are set to zero, indicating minimum divisors for
2554                  * every field.
2555                  *
2556                  * This prevents guest kernels on AMD host with CPU
2557                  * type 6, model 8 and higher from exploding due to
2558                  * the rdmsr failing.
2559                  */
2560                 msr_info->data = 0x20000000;
2561                 break;
2562         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2563         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2564         case HV_X64_MSR_CRASH_CTL:
2565         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2566                 return kvm_hv_get_msr_common(vcpu,
2567                                              msr_info->index, &msr_info->data);
2568                 break;
2569         case MSR_IA32_BBL_CR_CTL3:
2570                 /* This legacy MSR exists but isn't fully documented in current
2571                  * silicon.  It is however accessed by winxp in very narrow
2572                  * scenarios where it sets bit #19, itself documented as
2573                  * a "reserved" bit.  Best effort attempt to source coherent
2574                  * read data here should the balance of the register be
2575                  * interpreted by the guest:
2576                  *
2577                  * L2 cache control register 3: 64GB range, 256KB size,
2578                  * enabled, latency 0x1, configured
2579                  */
2580                 msr_info->data = 0xbe702111;
2581                 break;
2582         case MSR_AMD64_OSVW_ID_LENGTH:
2583                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2584                         return 1;
2585                 msr_info->data = vcpu->arch.osvw.length;
2586                 break;
2587         case MSR_AMD64_OSVW_STATUS:
2588                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2589                         return 1;
2590                 msr_info->data = vcpu->arch.osvw.status;
2591                 break;
2592         case MSR_PLATFORM_INFO:
2593                 msr_info->data = vcpu->arch.msr_platform_info;
2594                 break;
2595         case MSR_MISC_FEATURES_ENABLES:
2596                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2597                 break;
2598         default:
2599                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2600                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2601                 if (!ignore_msrs) {
2602                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2603                                                msr_info->index);
2604                         return 1;
2605                 } else {
2606                         if (report_ignored_msrs)
2607                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2608                                         msr_info->index);
2609                         msr_info->data = 0;
2610                 }
2611                 break;
2612         }
2613         return 0;
2614 }
2615 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2616
2617 /*
2618  * Read or write a bunch of msrs. All parameters are kernel addresses.
2619  *
2620  * @return number of msrs set successfully.
2621  */
2622 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2623                     struct kvm_msr_entry *entries,
2624                     int (*do_msr)(struct kvm_vcpu *vcpu,
2625                                   unsigned index, u64 *data))
2626 {
2627         int i, idx;
2628
2629         idx = srcu_read_lock(&vcpu->kvm->srcu);
2630         for (i = 0; i < msrs->nmsrs; ++i)
2631                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2632                         break;
2633         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2634
2635         return i;
2636 }
2637
2638 /*
2639  * Read or write a bunch of msrs. Parameters are user addresses.
2640  *
2641  * @return number of msrs set successfully.
2642  */
2643 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2644                   int (*do_msr)(struct kvm_vcpu *vcpu,
2645                                 unsigned index, u64 *data),
2646                   int writeback)
2647 {
2648         struct kvm_msrs msrs;
2649         struct kvm_msr_entry *entries;
2650         int r, n;
2651         unsigned size;
2652
2653         r = -EFAULT;
2654         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2655                 goto out;
2656
2657         r = -E2BIG;
2658         if (msrs.nmsrs >= MAX_IO_MSRS)
2659                 goto out;
2660
2661         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2662         entries = memdup_user(user_msrs->entries, size);
2663         if (IS_ERR(entries)) {
2664                 r = PTR_ERR(entries);
2665                 goto out;
2666         }
2667
2668         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2669         if (r < 0)
2670                 goto out_free;
2671
2672         r = -EFAULT;
2673         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2674                 goto out_free;
2675
2676         r = n;
2677
2678 out_free:
2679         kfree(entries);
2680 out:
2681         return r;
2682 }
2683
2684 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2685 {
2686         int r;
2687
2688         switch (ext) {
2689         case KVM_CAP_IRQCHIP:
2690         case KVM_CAP_HLT:
2691         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2692         case KVM_CAP_SET_TSS_ADDR:
2693         case KVM_CAP_EXT_CPUID:
2694         case KVM_CAP_EXT_EMUL_CPUID:
2695         case KVM_CAP_CLOCKSOURCE:
2696         case KVM_CAP_PIT:
2697         case KVM_CAP_NOP_IO_DELAY:
2698         case KVM_CAP_MP_STATE:
2699         case KVM_CAP_SYNC_MMU:
2700         case KVM_CAP_USER_NMI:
2701         case KVM_CAP_REINJECT_CONTROL:
2702         case KVM_CAP_IRQ_INJECT_STATUS:
2703         case KVM_CAP_IOEVENTFD:
2704         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2705         case KVM_CAP_PIT2:
2706         case KVM_CAP_PIT_STATE2:
2707         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2708         case KVM_CAP_XEN_HVM:
2709         case KVM_CAP_VCPU_EVENTS:
2710         case KVM_CAP_HYPERV:
2711         case KVM_CAP_HYPERV_VAPIC:
2712         case KVM_CAP_HYPERV_SPIN:
2713         case KVM_CAP_HYPERV_SYNIC:
2714         case KVM_CAP_HYPERV_SYNIC2:
2715         case KVM_CAP_HYPERV_VP_INDEX:
2716         case KVM_CAP_PCI_SEGMENT:
2717         case KVM_CAP_DEBUGREGS:
2718         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2719         case KVM_CAP_XSAVE:
2720         case KVM_CAP_ASYNC_PF:
2721         case KVM_CAP_GET_TSC_KHZ:
2722         case KVM_CAP_KVMCLOCK_CTRL:
2723         case KVM_CAP_READONLY_MEM:
2724         case KVM_CAP_HYPERV_TIME:
2725         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2726         case KVM_CAP_TSC_DEADLINE_TIMER:
2727         case KVM_CAP_ENABLE_CAP_VM:
2728         case KVM_CAP_DISABLE_QUIRKS:
2729         case KVM_CAP_SET_BOOT_CPU_ID:
2730         case KVM_CAP_SPLIT_IRQCHIP:
2731         case KVM_CAP_IMMEDIATE_EXIT:
2732                 r = 1;
2733                 break;
2734         case KVM_CAP_ADJUST_CLOCK:
2735                 r = KVM_CLOCK_TSC_STABLE;
2736                 break;
2737         case KVM_CAP_X86_GUEST_MWAIT:
2738                 r = kvm_mwait_in_guest();
2739                 break;
2740         case KVM_CAP_X86_SMM:
2741                 /* SMBASE is usually relocated above 1M on modern chipsets,
2742                  * and SMM handlers might indeed rely on 4G segment limits,
2743                  * so do not report SMM to be available if real mode is
2744                  * emulated via vm86 mode.  Still, do not go to great lengths
2745                  * to avoid userspace's usage of the feature, because it is a
2746                  * fringe case that is not enabled except via specific settings
2747                  * of the module parameters.
2748                  */
2749                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2750                 break;
2751         case KVM_CAP_VAPIC:
2752                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2753                 break;
2754         case KVM_CAP_NR_VCPUS:
2755                 r = KVM_SOFT_MAX_VCPUS;
2756                 break;
2757         case KVM_CAP_MAX_VCPUS:
2758                 r = KVM_MAX_VCPUS;
2759                 break;
2760         case KVM_CAP_NR_MEMSLOTS:
2761                 r = KVM_USER_MEM_SLOTS;
2762                 break;
2763         case KVM_CAP_PV_MMU:    /* obsolete */
2764                 r = 0;
2765                 break;
2766         case KVM_CAP_MCE:
2767                 r = KVM_MAX_MCE_BANKS;
2768                 break;
2769         case KVM_CAP_XCRS:
2770                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2771                 break;
2772         case KVM_CAP_TSC_CONTROL:
2773                 r = kvm_has_tsc_control;
2774                 break;
2775         case KVM_CAP_X2APIC_API:
2776                 r = KVM_X2APIC_API_VALID_FLAGS;
2777                 break;
2778         default:
2779                 r = 0;
2780                 break;
2781         }
2782         return r;
2783
2784 }
2785
2786 long kvm_arch_dev_ioctl(struct file *filp,
2787                         unsigned int ioctl, unsigned long arg)
2788 {
2789         void __user *argp = (void __user *)arg;
2790         long r;
2791
2792         switch (ioctl) {
2793         case KVM_GET_MSR_INDEX_LIST: {
2794                 struct kvm_msr_list __user *user_msr_list = argp;
2795                 struct kvm_msr_list msr_list;
2796                 unsigned n;
2797
2798                 r = -EFAULT;
2799                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2800                         goto out;
2801                 n = msr_list.nmsrs;
2802                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2803                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2804                         goto out;
2805                 r = -E2BIG;
2806                 if (n < msr_list.nmsrs)
2807                         goto out;
2808                 r = -EFAULT;
2809                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2810                                  num_msrs_to_save * sizeof(u32)))
2811                         goto out;
2812                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2813                                  &emulated_msrs,
2814                                  num_emulated_msrs * sizeof(u32)))
2815                         goto out;
2816                 r = 0;
2817                 break;
2818         }
2819         case KVM_GET_SUPPORTED_CPUID:
2820         case KVM_GET_EMULATED_CPUID: {
2821                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2822                 struct kvm_cpuid2 cpuid;
2823
2824                 r = -EFAULT;
2825                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2826                         goto out;
2827
2828                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2829                                             ioctl);
2830                 if (r)
2831                         goto out;
2832
2833                 r = -EFAULT;
2834                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2835                         goto out;
2836                 r = 0;
2837                 break;
2838         }
2839         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2840                 r = -EFAULT;
2841                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2842                                  sizeof(kvm_mce_cap_supported)))
2843                         goto out;
2844                 r = 0;
2845                 break;
2846         }
2847         default:
2848                 r = -EINVAL;
2849         }
2850 out:
2851         return r;
2852 }
2853
2854 static void wbinvd_ipi(void *garbage)
2855 {
2856         wbinvd();
2857 }
2858
2859 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2860 {
2861         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2862 }
2863
2864 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2865 {
2866         /* Address WBINVD may be executed by guest */
2867         if (need_emulate_wbinvd(vcpu)) {
2868                 if (kvm_x86_ops->has_wbinvd_exit())
2869                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2870                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2871                         smp_call_function_single(vcpu->cpu,
2872                                         wbinvd_ipi, NULL, 1);
2873         }
2874
2875         kvm_x86_ops->vcpu_load(vcpu, cpu);
2876
2877         /* Apply any externally detected TSC adjustments (due to suspend) */
2878         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2879                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2880                 vcpu->arch.tsc_offset_adjustment = 0;
2881                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2882         }
2883
2884         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2885                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2886                                 rdtsc() - vcpu->arch.last_host_tsc;
2887                 if (tsc_delta < 0)
2888                         mark_tsc_unstable("KVM discovered backwards TSC");
2889
2890                 if (check_tsc_unstable()) {
2891                         u64 offset = kvm_compute_tsc_offset(vcpu,
2892                                                 vcpu->arch.last_guest_tsc);
2893                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2894                         vcpu->arch.tsc_catchup = 1;
2895                 }
2896
2897                 if (kvm_lapic_hv_timer_in_use(vcpu))
2898                         kvm_lapic_restart_hv_timer(vcpu);
2899
2900                 /*
2901                  * On a host with synchronized TSC, there is no need to update
2902                  * kvmclock on vcpu->cpu migration
2903                  */
2904                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2905                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2906                 if (vcpu->cpu != cpu)
2907                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2908                 vcpu->cpu = cpu;
2909         }
2910
2911         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2912 }
2913
2914 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2915 {
2916         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2917                 return;
2918
2919         vcpu->arch.st.steal.preempted = 1;
2920
2921         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2922                         &vcpu->arch.st.steal.preempted,
2923                         offsetof(struct kvm_steal_time, preempted),
2924                         sizeof(vcpu->arch.st.steal.preempted));
2925 }
2926
2927 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2928 {
2929         int idx;
2930
2931         if (vcpu->preempted)
2932                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
2933
2934         /*
2935          * Disable page faults because we're in atomic context here.
2936          * kvm_write_guest_offset_cached() would call might_fault()
2937          * that relies on pagefault_disable() to tell if there's a
2938          * bug. NOTE: the write to guest memory may not go through if
2939          * during postcopy live migration or if there's heavy guest
2940          * paging.
2941          */
2942         pagefault_disable();
2943         /*
2944          * kvm_memslots() will be called by
2945          * kvm_write_guest_offset_cached() so take the srcu lock.
2946          */
2947         idx = srcu_read_lock(&vcpu->kvm->srcu);
2948         kvm_steal_time_set_preempted(vcpu);
2949         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2950         pagefault_enable();
2951         kvm_x86_ops->vcpu_put(vcpu);
2952         vcpu->arch.last_host_tsc = rdtsc();
2953 }
2954
2955 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2956                                     struct kvm_lapic_state *s)
2957 {
2958         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2959                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2960
2961         return kvm_apic_get_state(vcpu, s);
2962 }
2963
2964 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2965                                     struct kvm_lapic_state *s)
2966 {
2967         int r;
2968
2969         r = kvm_apic_set_state(vcpu, s);
2970         if (r)
2971                 return r;
2972         update_cr8_intercept(vcpu);
2973
2974         return 0;
2975 }
2976
2977 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2978 {
2979         return (!lapic_in_kernel(vcpu) ||
2980                 kvm_apic_accept_pic_intr(vcpu));
2981 }
2982
2983 /*
2984  * if userspace requested an interrupt window, check that the
2985  * interrupt window is open.
2986  *
2987  * No need to exit to userspace if we already have an interrupt queued.
2988  */
2989 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2990 {
2991         return kvm_arch_interrupt_allowed(vcpu) &&
2992                 !kvm_cpu_has_interrupt(vcpu) &&
2993                 !kvm_event_needs_reinjection(vcpu) &&
2994                 kvm_cpu_accept_dm_intr(vcpu);
2995 }
2996
2997 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2998                                     struct kvm_interrupt *irq)
2999 {
3000         if (irq->irq >= KVM_NR_INTERRUPTS)
3001                 return -EINVAL;
3002
3003         if (!irqchip_in_kernel(vcpu->kvm)) {
3004                 kvm_queue_interrupt(vcpu, irq->irq, false);
3005                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3006                 return 0;
3007         }
3008
3009         /*
3010          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3011          * fail for in-kernel 8259.
3012          */
3013         if (pic_in_kernel(vcpu->kvm))
3014                 return -ENXIO;
3015
3016         if (vcpu->arch.pending_external_vector != -1)
3017                 return -EEXIST;
3018
3019         vcpu->arch.pending_external_vector = irq->irq;
3020         kvm_make_request(KVM_REQ_EVENT, vcpu);
3021         return 0;
3022 }
3023
3024 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3025 {
3026         kvm_inject_nmi(vcpu);
3027
3028         return 0;
3029 }
3030
3031 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3032 {
3033         kvm_make_request(KVM_REQ_SMI, vcpu);
3034
3035         return 0;
3036 }
3037
3038 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3039                                            struct kvm_tpr_access_ctl *tac)
3040 {
3041         if (tac->flags)
3042                 return -EINVAL;
3043         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3044         return 0;
3045 }
3046
3047 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3048                                         u64 mcg_cap)
3049 {
3050         int r;
3051         unsigned bank_num = mcg_cap & 0xff, bank;
3052
3053         r = -EINVAL;
3054         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3055                 goto out;
3056         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3057                 goto out;
3058         r = 0;
3059         vcpu->arch.mcg_cap = mcg_cap;
3060         /* Init IA32_MCG_CTL to all 1s */
3061         if (mcg_cap & MCG_CTL_P)
3062                 vcpu->arch.mcg_ctl = ~(u64)0;
3063         /* Init IA32_MCi_CTL to all 1s */
3064         for (bank = 0; bank < bank_num; bank++)
3065                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3066
3067         if (kvm_x86_ops->setup_mce)
3068                 kvm_x86_ops->setup_mce(vcpu);
3069 out:
3070         return r;
3071 }
3072
3073 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3074                                       struct kvm_x86_mce *mce)
3075 {
3076         u64 mcg_cap = vcpu->arch.mcg_cap;
3077         unsigned bank_num = mcg_cap & 0xff;
3078         u64 *banks = vcpu->arch.mce_banks;
3079
3080         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3081                 return -EINVAL;
3082         /*
3083          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3084          * reporting is disabled
3085          */
3086         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3087             vcpu->arch.mcg_ctl != ~(u64)0)
3088                 return 0;
3089         banks += 4 * mce->bank;
3090         /*
3091          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3092          * reporting is disabled for the bank
3093          */
3094         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3095                 return 0;
3096         if (mce->status & MCI_STATUS_UC) {
3097                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3098                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3099                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3100                         return 0;
3101                 }
3102                 if (banks[1] & MCI_STATUS_VAL)
3103                         mce->status |= MCI_STATUS_OVER;
3104                 banks[2] = mce->addr;
3105                 banks[3] = mce->misc;
3106                 vcpu->arch.mcg_status = mce->mcg_status;
3107                 banks[1] = mce->status;
3108                 kvm_queue_exception(vcpu, MC_VECTOR);
3109         } else if (!(banks[1] & MCI_STATUS_VAL)
3110                    || !(banks[1] & MCI_STATUS_UC)) {
3111                 if (banks[1] & MCI_STATUS_VAL)
3112                         mce->status |= MCI_STATUS_OVER;
3113                 banks[2] = mce->addr;
3114                 banks[3] = mce->misc;
3115                 banks[1] = mce->status;
3116         } else
3117                 banks[1] |= MCI_STATUS_OVER;
3118         return 0;
3119 }
3120
3121 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3122                                                struct kvm_vcpu_events *events)
3123 {
3124         process_nmi(vcpu);
3125         /*
3126          * FIXME: pass injected and pending separately.  This is only
3127          * needed for nested virtualization, whose state cannot be
3128          * migrated yet.  For now we can combine them.
3129          */
3130         events->exception.injected =
3131                 (vcpu->arch.exception.pending ||
3132                  vcpu->arch.exception.injected) &&
3133                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3134         events->exception.nr = vcpu->arch.exception.nr;
3135         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3136         events->exception.pad = 0;
3137         events->exception.error_code = vcpu->arch.exception.error_code;
3138
3139         events->interrupt.injected =
3140                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3141         events->interrupt.nr = vcpu->arch.interrupt.nr;
3142         events->interrupt.soft = 0;
3143         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3144
3145         events->nmi.injected = vcpu->arch.nmi_injected;
3146         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3147         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3148         events->nmi.pad = 0;
3149
3150         events->sipi_vector = 0; /* never valid when reporting to user space */
3151
3152         events->smi.smm = is_smm(vcpu);
3153         events->smi.pending = vcpu->arch.smi_pending;
3154         events->smi.smm_inside_nmi =
3155                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3156         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3157
3158         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3159                          | KVM_VCPUEVENT_VALID_SHADOW
3160                          | KVM_VCPUEVENT_VALID_SMM);
3161         memset(&events->reserved, 0, sizeof(events->reserved));
3162 }
3163
3164 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3165
3166 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3167                                               struct kvm_vcpu_events *events)
3168 {
3169         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3170                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3171                               | KVM_VCPUEVENT_VALID_SHADOW
3172                               | KVM_VCPUEVENT_VALID_SMM))
3173                 return -EINVAL;
3174
3175         if (events->exception.injected &&
3176             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3177              is_guest_mode(vcpu)))
3178                 return -EINVAL;
3179
3180         /* INITs are latched while in SMM */
3181         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3182             (events->smi.smm || events->smi.pending) &&
3183             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3184                 return -EINVAL;
3185
3186         process_nmi(vcpu);
3187         vcpu->arch.exception.injected = false;
3188         vcpu->arch.exception.pending = events->exception.injected;
3189         vcpu->arch.exception.nr = events->exception.nr;
3190         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3191         vcpu->arch.exception.error_code = events->exception.error_code;
3192
3193         vcpu->arch.interrupt.pending = events->interrupt.injected;
3194         vcpu->arch.interrupt.nr = events->interrupt.nr;
3195         vcpu->arch.interrupt.soft = events->interrupt.soft;
3196         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3197                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3198                                                   events->interrupt.shadow);
3199
3200         vcpu->arch.nmi_injected = events->nmi.injected;
3201         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3202                 vcpu->arch.nmi_pending = events->nmi.pending;
3203         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3204
3205         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3206             lapic_in_kernel(vcpu))
3207                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3208
3209         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3210                 u32 hflags = vcpu->arch.hflags;
3211                 if (events->smi.smm)
3212                         hflags |= HF_SMM_MASK;
3213                 else
3214                         hflags &= ~HF_SMM_MASK;
3215                 kvm_set_hflags(vcpu, hflags);
3216
3217                 vcpu->arch.smi_pending = events->smi.pending;
3218
3219                 if (events->smi.smm) {
3220                         if (events->smi.smm_inside_nmi)
3221                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3222                         else
3223                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3224                         if (lapic_in_kernel(vcpu)) {
3225                                 if (events->smi.latched_init)
3226                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3227                                 else
3228                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3229                         }
3230                 }
3231         }
3232
3233         kvm_make_request(KVM_REQ_EVENT, vcpu);
3234
3235         return 0;
3236 }
3237
3238 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3239                                              struct kvm_debugregs *dbgregs)
3240 {
3241         unsigned long val;
3242
3243         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3244         kvm_get_dr(vcpu, 6, &val);
3245         dbgregs->dr6 = val;
3246         dbgregs->dr7 = vcpu->arch.dr7;
3247         dbgregs->flags = 0;
3248         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3249 }
3250
3251 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3252                                             struct kvm_debugregs *dbgregs)
3253 {
3254         if (dbgregs->flags)
3255                 return -EINVAL;
3256
3257         if (dbgregs->dr6 & ~0xffffffffull)
3258                 return -EINVAL;
3259         if (dbgregs->dr7 & ~0xffffffffull)
3260                 return -EINVAL;
3261
3262         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3263         kvm_update_dr0123(vcpu);
3264         vcpu->arch.dr6 = dbgregs->dr6;
3265         kvm_update_dr6(vcpu);
3266         vcpu->arch.dr7 = dbgregs->dr7;
3267         kvm_update_dr7(vcpu);
3268
3269         return 0;
3270 }
3271
3272 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3273
3274 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3275 {
3276         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3277         u64 xstate_bv = xsave->header.xfeatures;
3278         u64 valid;
3279
3280         /*
3281          * Copy legacy XSAVE area, to avoid complications with CPUID
3282          * leaves 0 and 1 in the loop below.
3283          */
3284         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3285
3286         /* Set XSTATE_BV */
3287         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3288         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3289
3290         /*
3291          * Copy each region from the possibly compacted offset to the
3292          * non-compacted offset.
3293          */
3294         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3295         while (valid) {
3296                 u64 feature = valid & -valid;
3297                 int index = fls64(feature) - 1;
3298                 void *src = get_xsave_addr(xsave, feature);
3299
3300                 if (src) {
3301                         u32 size, offset, ecx, edx;
3302                         cpuid_count(XSTATE_CPUID, index,
3303                                     &size, &offset, &ecx, &edx);
3304                         if (feature == XFEATURE_MASK_PKRU)
3305                                 memcpy(dest + offset, &vcpu->arch.pkru,
3306                                        sizeof(vcpu->arch.pkru));
3307                         else
3308                                 memcpy(dest + offset, src, size);
3309
3310                 }
3311
3312                 valid -= feature;
3313         }
3314 }
3315
3316 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3317 {
3318         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3319         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3320         u64 valid;
3321
3322         /*
3323          * Copy legacy XSAVE area, to avoid complications with CPUID
3324          * leaves 0 and 1 in the loop below.
3325          */
3326         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3327
3328         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3329         xsave->header.xfeatures = xstate_bv;
3330         if (boot_cpu_has(X86_FEATURE_XSAVES))
3331                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3332
3333         /*
3334          * Copy each region from the non-compacted offset to the
3335          * possibly compacted offset.
3336          */
3337         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3338         while (valid) {
3339                 u64 feature = valid & -valid;
3340                 int index = fls64(feature) - 1;
3341                 void *dest = get_xsave_addr(xsave, feature);
3342
3343                 if (dest) {
3344                         u32 size, offset, ecx, edx;
3345                         cpuid_count(XSTATE_CPUID, index,
3346                                     &size, &offset, &ecx, &edx);
3347                         if (feature == XFEATURE_MASK_PKRU)
3348                                 memcpy(&vcpu->arch.pkru, src + offset,
3349                                        sizeof(vcpu->arch.pkru));
3350                         else
3351                                 memcpy(dest, src + offset, size);
3352                 }
3353
3354                 valid -= feature;
3355         }
3356 }
3357
3358 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3359                                          struct kvm_xsave *guest_xsave)
3360 {
3361         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3362                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3363                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3364         } else {
3365                 memcpy(guest_xsave->region,
3366                         &vcpu->arch.guest_fpu.state.fxsave,
3367                         sizeof(struct fxregs_state));
3368                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3369                         XFEATURE_MASK_FPSSE;
3370         }
3371 }
3372
3373 #define XSAVE_MXCSR_OFFSET 24
3374
3375 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3376                                         struct kvm_xsave *guest_xsave)
3377 {
3378         u64 xstate_bv =
3379                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3380         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3381
3382         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3383                 /*
3384                  * Here we allow setting states that are not present in
3385                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3386                  * with old userspace.
3387                  */
3388                 if (xstate_bv & ~kvm_supported_xcr0() ||
3389                         mxcsr & ~mxcsr_feature_mask)
3390                         return -EINVAL;
3391                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3392         } else {
3393                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3394                         mxcsr & ~mxcsr_feature_mask)
3395                         return -EINVAL;
3396                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3397                         guest_xsave->region, sizeof(struct fxregs_state));
3398         }
3399         return 0;
3400 }
3401
3402 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3403                                         struct kvm_xcrs *guest_xcrs)
3404 {
3405         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3406                 guest_xcrs->nr_xcrs = 0;
3407                 return;
3408         }
3409
3410         guest_xcrs->nr_xcrs = 1;
3411         guest_xcrs->flags = 0;
3412         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3413         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3414 }
3415
3416 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3417                                        struct kvm_xcrs *guest_xcrs)
3418 {
3419         int i, r = 0;
3420
3421         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3422                 return -EINVAL;
3423
3424         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3425                 return -EINVAL;
3426
3427         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3428                 /* Only support XCR0 currently */
3429                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3430                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3431                                 guest_xcrs->xcrs[i].value);
3432                         break;
3433                 }
3434         if (r)
3435                 r = -EINVAL;
3436         return r;
3437 }
3438
3439 /*
3440  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3441  * stopped by the hypervisor.  This function will be called from the host only.
3442  * EINVAL is returned when the host attempts to set the flag for a guest that
3443  * does not support pv clocks.
3444  */
3445 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3446 {
3447         if (!vcpu->arch.pv_time_enabled)
3448                 return -EINVAL;
3449         vcpu->arch.pvclock_set_guest_stopped_request = true;
3450         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3451         return 0;
3452 }
3453
3454 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3455                                      struct kvm_enable_cap *cap)
3456 {
3457         if (cap->flags)
3458                 return -EINVAL;
3459
3460         switch (cap->cap) {
3461         case KVM_CAP_HYPERV_SYNIC2:
3462                 if (cap->args[0])
3463                         return -EINVAL;
3464         case KVM_CAP_HYPERV_SYNIC:
3465                 if (!irqchip_in_kernel(vcpu->kvm))
3466                         return -EINVAL;
3467                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3468                                              KVM_CAP_HYPERV_SYNIC2);
3469         default:
3470                 return -EINVAL;
3471         }
3472 }
3473
3474 long kvm_arch_vcpu_ioctl(struct file *filp,
3475                          unsigned int ioctl, unsigned long arg)
3476 {
3477         struct kvm_vcpu *vcpu = filp->private_data;
3478         void __user *argp = (void __user *)arg;
3479         int r;
3480         union {
3481                 struct kvm_lapic_state *lapic;
3482                 struct kvm_xsave *xsave;
3483                 struct kvm_xcrs *xcrs;
3484                 void *buffer;
3485         } u;
3486
3487         u.buffer = NULL;
3488         switch (ioctl) {
3489         case KVM_GET_LAPIC: {
3490                 r = -EINVAL;
3491                 if (!lapic_in_kernel(vcpu))
3492                         goto out;
3493                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3494
3495                 r = -ENOMEM;
3496                 if (!u.lapic)
3497                         goto out;
3498                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3499                 if (r)
3500                         goto out;
3501                 r = -EFAULT;
3502                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3503                         goto out;
3504                 r = 0;
3505                 break;
3506         }
3507         case KVM_SET_LAPIC: {
3508                 r = -EINVAL;
3509                 if (!lapic_in_kernel(vcpu))
3510                         goto out;
3511                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3512                 if (IS_ERR(u.lapic))
3513                         return PTR_ERR(u.lapic);
3514
3515                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3516                 break;
3517         }
3518         case KVM_INTERRUPT: {
3519                 struct kvm_interrupt irq;
3520
3521                 r = -EFAULT;
3522                 if (copy_from_user(&irq, argp, sizeof irq))
3523                         goto out;
3524                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3525                 break;
3526         }
3527         case KVM_NMI: {
3528                 r = kvm_vcpu_ioctl_nmi(vcpu);
3529                 break;
3530         }
3531         case KVM_SMI: {
3532                 r = kvm_vcpu_ioctl_smi(vcpu);
3533                 break;
3534         }
3535         case KVM_SET_CPUID: {
3536                 struct kvm_cpuid __user *cpuid_arg = argp;
3537                 struct kvm_cpuid cpuid;
3538
3539                 r = -EFAULT;
3540                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3541                         goto out;
3542                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3543                 break;
3544         }
3545         case KVM_SET_CPUID2: {
3546                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3547                 struct kvm_cpuid2 cpuid;
3548
3549                 r = -EFAULT;
3550                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3551                         goto out;
3552                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3553                                               cpuid_arg->entries);
3554                 break;
3555         }
3556         case KVM_GET_CPUID2: {
3557                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3558                 struct kvm_cpuid2 cpuid;
3559
3560                 r = -EFAULT;
3561                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3562                         goto out;
3563                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3564                                               cpuid_arg->entries);
3565                 if (r)
3566                         goto out;
3567                 r = -EFAULT;
3568                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3569                         goto out;
3570                 r = 0;
3571                 break;
3572         }
3573         case KVM_GET_MSRS:
3574                 r = msr_io(vcpu, argp, do_get_msr, 1);
3575                 break;
3576         case KVM_SET_MSRS:
3577                 r = msr_io(vcpu, argp, do_set_msr, 0);
3578                 break;
3579         case KVM_TPR_ACCESS_REPORTING: {
3580                 struct kvm_tpr_access_ctl tac;
3581
3582                 r = -EFAULT;
3583                 if (copy_from_user(&tac, argp, sizeof tac))
3584                         goto out;
3585                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3586                 if (r)
3587                         goto out;
3588                 r = -EFAULT;
3589                 if (copy_to_user(argp, &tac, sizeof tac))
3590                         goto out;
3591                 r = 0;
3592                 break;
3593         };
3594         case KVM_SET_VAPIC_ADDR: {
3595                 struct kvm_vapic_addr va;
3596                 int idx;
3597
3598                 r = -EINVAL;
3599                 if (!lapic_in_kernel(vcpu))
3600                         goto out;
3601                 r = -EFAULT;
3602                 if (copy_from_user(&va, argp, sizeof va))
3603                         goto out;
3604                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3605                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3606                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3607                 break;
3608         }
3609         case KVM_X86_SETUP_MCE: {
3610                 u64 mcg_cap;
3611
3612                 r = -EFAULT;
3613                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3614                         goto out;
3615                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3616                 break;
3617         }
3618         case KVM_X86_SET_MCE: {
3619                 struct kvm_x86_mce mce;
3620
3621                 r = -EFAULT;
3622                 if (copy_from_user(&mce, argp, sizeof mce))
3623                         goto out;
3624                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3625                 break;
3626         }
3627         case KVM_GET_VCPU_EVENTS: {
3628                 struct kvm_vcpu_events events;
3629
3630                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3631
3632                 r = -EFAULT;
3633                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3634                         break;
3635                 r = 0;
3636                 break;
3637         }
3638         case KVM_SET_VCPU_EVENTS: {
3639                 struct kvm_vcpu_events events;
3640
3641                 r = -EFAULT;
3642                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3643                         break;
3644
3645                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3646                 break;
3647         }
3648         case KVM_GET_DEBUGREGS: {
3649                 struct kvm_debugregs dbgregs;
3650
3651                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3652
3653                 r = -EFAULT;
3654                 if (copy_to_user(argp, &dbgregs,
3655                                  sizeof(struct kvm_debugregs)))
3656                         break;
3657                 r = 0;
3658                 break;
3659         }
3660         case KVM_SET_DEBUGREGS: {
3661                 struct kvm_debugregs dbgregs;
3662
3663                 r = -EFAULT;
3664                 if (copy_from_user(&dbgregs, argp,
3665                                    sizeof(struct kvm_debugregs)))
3666                         break;
3667
3668                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3669                 break;
3670         }
3671         case KVM_GET_XSAVE: {
3672                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3673                 r = -ENOMEM;
3674                 if (!u.xsave)
3675                         break;
3676
3677                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3678
3679                 r = -EFAULT;
3680                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3681                         break;
3682                 r = 0;
3683                 break;
3684         }
3685         case KVM_SET_XSAVE: {
3686                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3687                 if (IS_ERR(u.xsave))
3688                         return PTR_ERR(u.xsave);
3689
3690                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3691                 break;
3692         }
3693         case KVM_GET_XCRS: {
3694                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3695                 r = -ENOMEM;
3696                 if (!u.xcrs)
3697                         break;
3698
3699                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3700
3701                 r = -EFAULT;
3702                 if (copy_to_user(argp, u.xcrs,
3703                                  sizeof(struct kvm_xcrs)))
3704                         break;
3705                 r = 0;
3706                 break;
3707         }
3708         case KVM_SET_XCRS: {
3709                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3710                 if (IS_ERR(u.xcrs))
3711                         return PTR_ERR(u.xcrs);
3712
3713                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3714                 break;
3715         }
3716         case KVM_SET_TSC_KHZ: {
3717                 u32 user_tsc_khz;
3718
3719                 r = -EINVAL;
3720                 user_tsc_khz = (u32)arg;
3721
3722                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3723                         goto out;
3724
3725                 if (user_tsc_khz == 0)
3726                         user_tsc_khz = tsc_khz;
3727
3728                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3729                         r = 0;
3730
3731                 goto out;
3732         }
3733         case KVM_GET_TSC_KHZ: {
3734                 r = vcpu->arch.virtual_tsc_khz;
3735                 goto out;
3736         }
3737         case KVM_KVMCLOCK_CTRL: {
3738                 r = kvm_set_guest_paused(vcpu);
3739                 goto out;
3740         }
3741         case KVM_ENABLE_CAP: {
3742                 struct kvm_enable_cap cap;
3743
3744                 r = -EFAULT;
3745                 if (copy_from_user(&cap, argp, sizeof(cap)))
3746                         goto out;
3747                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3748                 break;
3749         }
3750         default:
3751                 r = -EINVAL;
3752         }
3753 out:
3754         kfree(u.buffer);
3755         return r;
3756 }
3757
3758 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3759 {
3760         return VM_FAULT_SIGBUS;
3761 }
3762
3763 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3764 {
3765         int ret;
3766
3767         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3768                 return -EINVAL;
3769         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3770         return ret;
3771 }
3772
3773 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3774                                               u64 ident_addr)
3775 {
3776         kvm->arch.ept_identity_map_addr = ident_addr;
3777         return 0;
3778 }
3779
3780 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3781                                           u32 kvm_nr_mmu_pages)
3782 {
3783         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3784                 return -EINVAL;
3785
3786         mutex_lock(&kvm->slots_lock);
3787
3788         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3789         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3790
3791         mutex_unlock(&kvm->slots_lock);
3792         return 0;
3793 }
3794
3795 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3796 {
3797         return kvm->arch.n_max_mmu_pages;
3798 }
3799
3800 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3801 {
3802         struct kvm_pic *pic = kvm->arch.vpic;
3803         int r;
3804
3805         r = 0;
3806         switch (chip->chip_id) {
3807         case KVM_IRQCHIP_PIC_MASTER:
3808                 memcpy(&chip->chip.pic, &pic->pics[0],
3809                         sizeof(struct kvm_pic_state));
3810                 break;
3811         case KVM_IRQCHIP_PIC_SLAVE:
3812                 memcpy(&chip->chip.pic, &pic->pics[1],
3813                         sizeof(struct kvm_pic_state));
3814                 break;
3815         case KVM_IRQCHIP_IOAPIC:
3816                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3817                 break;
3818         default:
3819                 r = -EINVAL;
3820                 break;
3821         }
3822         return r;
3823 }
3824
3825 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3826 {
3827         struct kvm_pic *pic = kvm->arch.vpic;
3828         int r;
3829
3830         r = 0;
3831         switch (chip->chip_id) {
3832         case KVM_IRQCHIP_PIC_MASTER:
3833                 spin_lock(&pic->lock);
3834                 memcpy(&pic->pics[0], &chip->chip.pic,
3835                         sizeof(struct kvm_pic_state));
3836                 spin_unlock(&pic->lock);
3837                 break;
3838         case KVM_IRQCHIP_PIC_SLAVE:
3839                 spin_lock(&pic->lock);
3840                 memcpy(&pic->pics[1], &chip->chip.pic,
3841                         sizeof(struct kvm_pic_state));
3842                 spin_unlock(&pic->lock);
3843                 break;
3844         case KVM_IRQCHIP_IOAPIC:
3845                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3846                 break;
3847         default:
3848                 r = -EINVAL;
3849                 break;
3850         }
3851         kvm_pic_update_irq(pic);
3852         return r;
3853 }
3854
3855 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3856 {
3857         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3858
3859         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3860
3861         mutex_lock(&kps->lock);
3862         memcpy(ps, &kps->channels, sizeof(*ps));
3863         mutex_unlock(&kps->lock);
3864         return 0;
3865 }
3866
3867 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3868 {
3869         int i;
3870         struct kvm_pit *pit = kvm->arch.vpit;
3871
3872         mutex_lock(&pit->pit_state.lock);
3873         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3874         for (i = 0; i < 3; i++)
3875                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3876         mutex_unlock(&pit->pit_state.lock);
3877         return 0;
3878 }
3879
3880 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3881 {
3882         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3883         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3884                 sizeof(ps->channels));
3885         ps->flags = kvm->arch.vpit->pit_state.flags;
3886         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3887         memset(&ps->reserved, 0, sizeof(ps->reserved));
3888         return 0;
3889 }
3890
3891 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3892 {
3893         int start = 0;
3894         int i;
3895         u32 prev_legacy, cur_legacy;
3896         struct kvm_pit *pit = kvm->arch.vpit;
3897
3898         mutex_lock(&pit->pit_state.lock);
3899         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3900         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3901         if (!prev_legacy && cur_legacy)
3902                 start = 1;
3903         memcpy(&pit->pit_state.channels, &ps->channels,
3904                sizeof(pit->pit_state.channels));
3905         pit->pit_state.flags = ps->flags;
3906         for (i = 0; i < 3; i++)
3907                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3908                                    start && i == 0);
3909         mutex_unlock(&pit->pit_state.lock);
3910         return 0;
3911 }
3912
3913 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3914                                  struct kvm_reinject_control *control)
3915 {
3916         struct kvm_pit *pit = kvm->arch.vpit;
3917
3918         if (!pit)
3919                 return -ENXIO;
3920
3921         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3922          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3923          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3924          */
3925         mutex_lock(&pit->pit_state.lock);
3926         kvm_pit_set_reinject(pit, control->pit_reinject);
3927         mutex_unlock(&pit->pit_state.lock);
3928
3929         return 0;
3930 }
3931
3932 /**
3933  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3934  * @kvm: kvm instance
3935  * @log: slot id and address to which we copy the log
3936  *
3937  * Steps 1-4 below provide general overview of dirty page logging. See
3938  * kvm_get_dirty_log_protect() function description for additional details.
3939  *
3940  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3941  * always flush the TLB (step 4) even if previous step failed  and the dirty
3942  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3943  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3944  * writes will be marked dirty for next log read.
3945  *
3946  *   1. Take a snapshot of the bit and clear it if needed.
3947  *   2. Write protect the corresponding page.
3948  *   3. Copy the snapshot to the userspace.
3949  *   4. Flush TLB's if needed.
3950  */
3951 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3952 {
3953         bool is_dirty = false;
3954         int r;
3955
3956         mutex_lock(&kvm->slots_lock);
3957
3958         /*
3959          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3960          */
3961         if (kvm_x86_ops->flush_log_dirty)
3962                 kvm_x86_ops->flush_log_dirty(kvm);
3963
3964         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3965
3966         /*
3967          * All the TLBs can be flushed out of mmu lock, see the comments in
3968          * kvm_mmu_slot_remove_write_access().
3969          */
3970         lockdep_assert_held(&kvm->slots_lock);
3971         if (is_dirty)
3972                 kvm_flush_remote_tlbs(kvm);
3973
3974         mutex_unlock(&kvm->slots_lock);
3975         return r;
3976 }
3977
3978 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3979                         bool line_status)
3980 {
3981         if (!irqchip_in_kernel(kvm))
3982                 return -ENXIO;
3983
3984         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3985                                         irq_event->irq, irq_event->level,
3986                                         line_status);
3987         return 0;
3988 }
3989
3990 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3991                                    struct kvm_enable_cap *cap)
3992 {
3993         int r;
3994
3995         if (cap->flags)
3996                 return -EINVAL;
3997
3998         switch (cap->cap) {
3999         case KVM_CAP_DISABLE_QUIRKS:
4000                 kvm->arch.disabled_quirks = cap->args[0];
4001                 r = 0;
4002                 break;
4003         case KVM_CAP_SPLIT_IRQCHIP: {
4004                 mutex_lock(&kvm->lock);
4005                 r = -EINVAL;
4006                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4007                         goto split_irqchip_unlock;
4008                 r = -EEXIST;
4009                 if (irqchip_in_kernel(kvm))
4010                         goto split_irqchip_unlock;
4011                 if (kvm->created_vcpus)
4012                         goto split_irqchip_unlock;
4013                 r = kvm_setup_empty_irq_routing(kvm);
4014                 if (r)
4015                         goto split_irqchip_unlock;
4016                 /* Pairs with irqchip_in_kernel. */
4017                 smp_wmb();
4018                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4019                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4020                 r = 0;
4021 split_irqchip_unlock:
4022                 mutex_unlock(&kvm->lock);
4023                 break;
4024         }
4025         case KVM_CAP_X2APIC_API:
4026                 r = -EINVAL;
4027                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4028                         break;
4029
4030                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4031                         kvm->arch.x2apic_format = true;
4032                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4033                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4034
4035                 r = 0;
4036                 break;
4037         default:
4038                 r = -EINVAL;
4039                 break;
4040         }
4041         return r;
4042 }
4043
4044 long kvm_arch_vm_ioctl(struct file *filp,
4045                        unsigned int ioctl, unsigned long arg)
4046 {
4047         struct kvm *kvm = filp->private_data;
4048         void __user *argp = (void __user *)arg;
4049         int r = -ENOTTY;
4050         /*
4051          * This union makes it completely explicit to gcc-3.x
4052          * that these two variables' stack usage should be
4053          * combined, not added together.
4054          */
4055         union {
4056                 struct kvm_pit_state ps;
4057                 struct kvm_pit_state2 ps2;
4058                 struct kvm_pit_config pit_config;
4059         } u;
4060
4061         switch (ioctl) {
4062         case KVM_SET_TSS_ADDR:
4063                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4064                 break;
4065         case KVM_SET_IDENTITY_MAP_ADDR: {
4066                 u64 ident_addr;
4067
4068                 mutex_lock(&kvm->lock);
4069                 r = -EINVAL;
4070                 if (kvm->created_vcpus)
4071                         goto set_identity_unlock;
4072                 r = -EFAULT;
4073                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4074                         goto set_identity_unlock;
4075                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4076 set_identity_unlock:
4077                 mutex_unlock(&kvm->lock);
4078                 break;
4079         }
4080         case KVM_SET_NR_MMU_PAGES:
4081                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4082                 break;
4083         case KVM_GET_NR_MMU_PAGES:
4084                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4085                 break;
4086         case KVM_CREATE_IRQCHIP: {
4087                 mutex_lock(&kvm->lock);
4088
4089                 r = -EEXIST;
4090                 if (irqchip_in_kernel(kvm))
4091                         goto create_irqchip_unlock;
4092
4093                 r = -EINVAL;
4094                 if (kvm->created_vcpus)
4095                         goto create_irqchip_unlock;
4096
4097                 r = kvm_pic_init(kvm);
4098                 if (r)
4099                         goto create_irqchip_unlock;
4100
4101                 r = kvm_ioapic_init(kvm);
4102                 if (r) {
4103                         kvm_pic_destroy(kvm);
4104                         goto create_irqchip_unlock;
4105                 }
4106
4107                 r = kvm_setup_default_irq_routing(kvm);
4108                 if (r) {
4109                         kvm_ioapic_destroy(kvm);
4110                         kvm_pic_destroy(kvm);
4111                         goto create_irqchip_unlock;
4112                 }
4113                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4114                 smp_wmb();
4115                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4116         create_irqchip_unlock:
4117                 mutex_unlock(&kvm->lock);
4118                 break;
4119         }
4120         case KVM_CREATE_PIT:
4121                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4122                 goto create_pit;
4123         case KVM_CREATE_PIT2:
4124                 r = -EFAULT;
4125                 if (copy_from_user(&u.pit_config, argp,
4126                                    sizeof(struct kvm_pit_config)))
4127                         goto out;
4128         create_pit:
4129                 mutex_lock(&kvm->lock);
4130                 r = -EEXIST;
4131                 if (kvm->arch.vpit)
4132                         goto create_pit_unlock;
4133                 r = -ENOMEM;
4134                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4135                 if (kvm->arch.vpit)
4136                         r = 0;
4137         create_pit_unlock:
4138                 mutex_unlock(&kvm->lock);
4139                 break;
4140         case KVM_GET_IRQCHIP: {
4141                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4142                 struct kvm_irqchip *chip;
4143
4144                 chip = memdup_user(argp, sizeof(*chip));
4145                 if (IS_ERR(chip)) {
4146                         r = PTR_ERR(chip);
4147                         goto out;
4148                 }
4149
4150                 r = -ENXIO;
4151                 if (!irqchip_kernel(kvm))
4152                         goto get_irqchip_out;
4153                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4154                 if (r)
4155                         goto get_irqchip_out;
4156                 r = -EFAULT;
4157                 if (copy_to_user(argp, chip, sizeof *chip))
4158                         goto get_irqchip_out;
4159                 r = 0;
4160         get_irqchip_out:
4161                 kfree(chip);
4162                 break;
4163         }
4164         case KVM_SET_IRQCHIP: {
4165                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4166                 struct kvm_irqchip *chip;
4167
4168                 chip = memdup_user(argp, sizeof(*chip));
4169                 if (IS_ERR(chip)) {
4170                         r = PTR_ERR(chip);
4171                         goto out;
4172                 }
4173
4174                 r = -ENXIO;
4175                 if (!irqchip_kernel(kvm))
4176                         goto set_irqchip_out;
4177                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4178                 if (r)
4179                         goto set_irqchip_out;
4180                 r = 0;
4181         set_irqchip_out:
4182                 kfree(chip);
4183                 break;
4184         }
4185         case KVM_GET_PIT: {
4186                 r = -EFAULT;
4187                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4188                         goto out;
4189                 r = -ENXIO;
4190                 if (!kvm->arch.vpit)
4191                         goto out;
4192                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4193                 if (r)
4194                         goto out;
4195                 r = -EFAULT;
4196                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4197                         goto out;
4198                 r = 0;
4199                 break;
4200         }
4201         case KVM_SET_PIT: {
4202                 r = -EFAULT;
4203                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4204                         goto out;
4205                 r = -ENXIO;
4206                 if (!kvm->arch.vpit)
4207                         goto out;
4208                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4209                 break;
4210         }
4211         case KVM_GET_PIT2: {
4212                 r = -ENXIO;
4213                 if (!kvm->arch.vpit)
4214                         goto out;
4215                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4216                 if (r)
4217                         goto out;
4218                 r = -EFAULT;
4219                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4220                         goto out;
4221                 r = 0;
4222                 break;
4223         }
4224         case KVM_SET_PIT2: {
4225                 r = -EFAULT;
4226                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4227                         goto out;
4228                 r = -ENXIO;
4229                 if (!kvm->arch.vpit)
4230                         goto out;
4231                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4232                 break;
4233         }
4234         case KVM_REINJECT_CONTROL: {
4235                 struct kvm_reinject_control control;
4236                 r =  -EFAULT;
4237                 if (copy_from_user(&control, argp, sizeof(control)))
4238                         goto out;
4239                 r = kvm_vm_ioctl_reinject(kvm, &control);
4240                 break;
4241         }
4242         case KVM_SET_BOOT_CPU_ID:
4243                 r = 0;
4244                 mutex_lock(&kvm->lock);
4245                 if (kvm->created_vcpus)
4246                         r = -EBUSY;
4247                 else
4248                         kvm->arch.bsp_vcpu_id = arg;
4249                 mutex_unlock(&kvm->lock);
4250                 break;
4251         case KVM_XEN_HVM_CONFIG: {
4252                 r = -EFAULT;
4253                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4254                                    sizeof(struct kvm_xen_hvm_config)))
4255                         goto out;
4256                 r = -EINVAL;
4257                 if (kvm->arch.xen_hvm_config.flags)
4258                         goto out;
4259                 r = 0;
4260                 break;
4261         }
4262         case KVM_SET_CLOCK: {
4263                 struct kvm_clock_data user_ns;
4264                 u64 now_ns;
4265
4266                 r = -EFAULT;
4267                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4268                         goto out;
4269
4270                 r = -EINVAL;
4271                 if (user_ns.flags)
4272                         goto out;
4273
4274                 r = 0;
4275                 /*
4276                  * TODO: userspace has to take care of races with VCPU_RUN, so
4277                  * kvm_gen_update_masterclock() can be cut down to locked
4278                  * pvclock_update_vm_gtod_copy().
4279                  */
4280                 kvm_gen_update_masterclock(kvm);
4281                 now_ns = get_kvmclock_ns(kvm);
4282                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4283                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4284                 break;
4285         }
4286         case KVM_GET_CLOCK: {
4287                 struct kvm_clock_data user_ns;
4288                 u64 now_ns;
4289
4290                 now_ns = get_kvmclock_ns(kvm);
4291                 user_ns.clock = now_ns;
4292                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4293                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4294
4295                 r = -EFAULT;
4296                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4297                         goto out;
4298                 r = 0;
4299                 break;
4300         }
4301         case KVM_ENABLE_CAP: {
4302                 struct kvm_enable_cap cap;
4303
4304                 r = -EFAULT;
4305                 if (copy_from_user(&cap, argp, sizeof(cap)))
4306                         goto out;
4307                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4308                 break;
4309         }
4310         default:
4311                 r = -ENOTTY;
4312         }
4313 out:
4314         return r;
4315 }
4316
4317 static void kvm_init_msr_list(void)
4318 {
4319         u32 dummy[2];
4320         unsigned i, j;
4321
4322         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4323                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4324                         continue;
4325
4326                 /*
4327                  * Even MSRs that are valid in the host may not be exposed
4328                  * to the guests in some cases.
4329                  */
4330                 switch (msrs_to_save[i]) {
4331                 case MSR_IA32_BNDCFGS:
4332                         if (!kvm_x86_ops->mpx_supported())
4333                                 continue;
4334                         break;
4335                 case MSR_TSC_AUX:
4336                         if (!kvm_x86_ops->rdtscp_supported())
4337                                 continue;
4338                         break;
4339                 default:
4340                         break;
4341                 }
4342
4343                 if (j < i)
4344                         msrs_to_save[j] = msrs_to_save[i];
4345                 j++;
4346         }
4347         num_msrs_to_save = j;
4348
4349         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4350                 switch (emulated_msrs[i]) {
4351                 case MSR_IA32_SMBASE:
4352                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4353                                 continue;
4354                         break;
4355                 default:
4356                         break;
4357                 }
4358
4359                 if (j < i)
4360                         emulated_msrs[j] = emulated_msrs[i];
4361                 j++;
4362         }
4363         num_emulated_msrs = j;
4364 }
4365
4366 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4367                            const void *v)
4368 {
4369         int handled = 0;
4370         int n;
4371
4372         do {
4373                 n = min(len, 8);
4374                 if (!(lapic_in_kernel(vcpu) &&
4375                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4376                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4377                         break;
4378                 handled += n;
4379                 addr += n;
4380                 len -= n;
4381                 v += n;
4382         } while (len);
4383
4384         return handled;
4385 }
4386
4387 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4388 {
4389         int handled = 0;
4390         int n;
4391
4392         do {
4393                 n = min(len, 8);
4394                 if (!(lapic_in_kernel(vcpu) &&
4395                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4396                                          addr, n, v))
4397                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4398                         break;
4399                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4400                 handled += n;
4401                 addr += n;
4402                 len -= n;
4403                 v += n;
4404         } while (len);
4405
4406         return handled;
4407 }
4408
4409 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4410                         struct kvm_segment *var, int seg)
4411 {
4412         kvm_x86_ops->set_segment(vcpu, var, seg);
4413 }
4414
4415 void kvm_get_segment(struct kvm_vcpu *vcpu,
4416                      struct kvm_segment *var, int seg)
4417 {
4418         kvm_x86_ops->get_segment(vcpu, var, seg);
4419 }
4420
4421 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4422                            struct x86_exception *exception)
4423 {
4424         gpa_t t_gpa;
4425
4426         BUG_ON(!mmu_is_nested(vcpu));
4427
4428         /* NPT walks are always user-walks */
4429         access |= PFERR_USER_MASK;
4430         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4431
4432         return t_gpa;
4433 }
4434
4435 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4436                               struct x86_exception *exception)
4437 {
4438         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4439         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4440 }
4441
4442  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4443                                 struct x86_exception *exception)
4444 {
4445         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4446         access |= PFERR_FETCH_MASK;
4447         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4448 }
4449
4450 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4451                                struct x86_exception *exception)
4452 {
4453         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4454         access |= PFERR_WRITE_MASK;
4455         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4456 }
4457
4458 /* uses this to access any guest's mapped memory without checking CPL */
4459 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4460                                 struct x86_exception *exception)
4461 {
4462         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4463 }
4464
4465 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4466                                       struct kvm_vcpu *vcpu, u32 access,
4467                                       struct x86_exception *exception)
4468 {
4469         void *data = val;
4470         int r = X86EMUL_CONTINUE;
4471
4472         while (bytes) {
4473                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4474                                                             exception);
4475                 unsigned offset = addr & (PAGE_SIZE-1);
4476                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4477                 int ret;
4478
4479                 if (gpa == UNMAPPED_GVA)
4480                         return X86EMUL_PROPAGATE_FAULT;
4481                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4482                                                offset, toread);
4483                 if (ret < 0) {
4484                         r = X86EMUL_IO_NEEDED;
4485                         goto out;
4486                 }
4487
4488                 bytes -= toread;
4489                 data += toread;
4490                 addr += toread;
4491         }
4492 out:
4493         return r;
4494 }
4495
4496 /* used for instruction fetching */
4497 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4498                                 gva_t addr, void *val, unsigned int bytes,
4499                                 struct x86_exception *exception)
4500 {
4501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4502         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4503         unsigned offset;
4504         int ret;
4505
4506         /* Inline kvm_read_guest_virt_helper for speed.  */
4507         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4508                                                     exception);
4509         if (unlikely(gpa == UNMAPPED_GVA))
4510                 return X86EMUL_PROPAGATE_FAULT;
4511
4512         offset = addr & (PAGE_SIZE-1);
4513         if (WARN_ON(offset + bytes > PAGE_SIZE))
4514                 bytes = (unsigned)PAGE_SIZE - offset;
4515         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4516                                        offset, bytes);
4517         if (unlikely(ret < 0))
4518                 return X86EMUL_IO_NEEDED;
4519
4520         return X86EMUL_CONTINUE;
4521 }
4522
4523 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4524                                gva_t addr, void *val, unsigned int bytes,
4525                                struct x86_exception *exception)
4526 {
4527         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4528         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4529
4530         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4531                                           exception);
4532 }
4533 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4534
4535 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4536                                       gva_t addr, void *val, unsigned int bytes,
4537                                       struct x86_exception *exception)
4538 {
4539         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4540         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4541 }
4542
4543 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4544                 unsigned long addr, void *val, unsigned int bytes)
4545 {
4546         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4547         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4548
4549         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4550 }
4551
4552 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4553                                        gva_t addr, void *val,
4554                                        unsigned int bytes,
4555                                        struct x86_exception *exception)
4556 {
4557         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4558         void *data = val;
4559         int r = X86EMUL_CONTINUE;
4560
4561         while (bytes) {
4562                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4563                                                              PFERR_WRITE_MASK,
4564                                                              exception);
4565                 unsigned offset = addr & (PAGE_SIZE-1);
4566                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4567                 int ret;
4568
4569                 if (gpa == UNMAPPED_GVA)
4570                         return X86EMUL_PROPAGATE_FAULT;
4571                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4572                 if (ret < 0) {
4573                         r = X86EMUL_IO_NEEDED;
4574                         goto out;
4575                 }
4576
4577                 bytes -= towrite;
4578                 data += towrite;
4579                 addr += towrite;
4580         }
4581 out:
4582         return r;
4583 }
4584 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4585
4586 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4587                             gpa_t gpa, bool write)
4588 {
4589         /* For APIC access vmexit */
4590         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4591                 return 1;
4592
4593         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4594                 trace_vcpu_match_mmio(gva, gpa, write, true);
4595                 return 1;
4596         }
4597
4598         return 0;
4599 }
4600
4601 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4602                                 gpa_t *gpa, struct x86_exception *exception,
4603                                 bool write)
4604 {
4605         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4606                 | (write ? PFERR_WRITE_MASK : 0);
4607
4608         /*
4609          * currently PKRU is only applied to ept enabled guest so
4610          * there is no pkey in EPT page table for L1 guest or EPT
4611          * shadow page table for L2 guest.
4612          */
4613         if (vcpu_match_mmio_gva(vcpu, gva)
4614             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4615                                  vcpu->arch.access, 0, access)) {
4616                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4617                                         (gva & (PAGE_SIZE - 1));
4618                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4619                 return 1;
4620         }
4621
4622         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4623
4624         if (*gpa == UNMAPPED_GVA)
4625                 return -1;
4626
4627         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4628 }
4629
4630 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4631                         const void *val, int bytes)
4632 {
4633         int ret;
4634
4635         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4636         if (ret < 0)
4637                 return 0;
4638         kvm_page_track_write(vcpu, gpa, val, bytes);
4639         return 1;
4640 }
4641
4642 struct read_write_emulator_ops {
4643         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4644                                   int bytes);
4645         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4646                                   void *val, int bytes);
4647         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4648                                int bytes, void *val);
4649         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4650                                     void *val, int bytes);
4651         bool write;
4652 };
4653
4654 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4655 {
4656         if (vcpu->mmio_read_completed) {
4657                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4658                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4659                 vcpu->mmio_read_completed = 0;
4660                 return 1;
4661         }
4662
4663         return 0;
4664 }
4665
4666 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4667                         void *val, int bytes)
4668 {
4669         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4670 }
4671
4672 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4673                          void *val, int bytes)
4674 {
4675         return emulator_write_phys(vcpu, gpa, val, bytes);
4676 }
4677
4678 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4679 {
4680         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4681         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4682 }
4683
4684 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4685                           void *val, int bytes)
4686 {
4687         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4688         return X86EMUL_IO_NEEDED;
4689 }
4690
4691 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4692                            void *val, int bytes)
4693 {
4694         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4695
4696         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4697         return X86EMUL_CONTINUE;
4698 }
4699
4700 static const struct read_write_emulator_ops read_emultor = {
4701         .read_write_prepare = read_prepare,
4702         .read_write_emulate = read_emulate,
4703         .read_write_mmio = vcpu_mmio_read,
4704         .read_write_exit_mmio = read_exit_mmio,
4705 };
4706
4707 static const struct read_write_emulator_ops write_emultor = {
4708         .read_write_emulate = write_emulate,
4709         .read_write_mmio = write_mmio,
4710         .read_write_exit_mmio = write_exit_mmio,
4711         .write = true,
4712 };
4713
4714 static int emulator_read_write_onepage(unsigned long addr, void *val,
4715                                        unsigned int bytes,
4716                                        struct x86_exception *exception,
4717                                        struct kvm_vcpu *vcpu,
4718                                        const struct read_write_emulator_ops *ops)
4719 {
4720         gpa_t gpa;
4721         int handled, ret;
4722         bool write = ops->write;
4723         struct kvm_mmio_fragment *frag;
4724         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4725
4726         /*
4727          * If the exit was due to a NPF we may already have a GPA.
4728          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4729          * Note, this cannot be used on string operations since string
4730          * operation using rep will only have the initial GPA from the NPF
4731          * occurred.
4732          */
4733         if (vcpu->arch.gpa_available &&
4734             emulator_can_use_gpa(ctxt) &&
4735             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4736                 gpa = vcpu->arch.gpa_val;
4737                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4738         } else {
4739                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4740                 if (ret < 0)
4741                         return X86EMUL_PROPAGATE_FAULT;
4742         }
4743
4744         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4745                 return X86EMUL_CONTINUE;
4746
4747         /*
4748          * Is this MMIO handled locally?
4749          */
4750         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4751         if (handled == bytes)
4752                 return X86EMUL_CONTINUE;
4753
4754         gpa += handled;
4755         bytes -= handled;
4756         val += handled;
4757
4758         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4759         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4760         frag->gpa = gpa;
4761         frag->data = val;
4762         frag->len = bytes;
4763         return X86EMUL_CONTINUE;
4764 }
4765
4766 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4767                         unsigned long addr,
4768                         void *val, unsigned int bytes,
4769                         struct x86_exception *exception,
4770                         const struct read_write_emulator_ops *ops)
4771 {
4772         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4773         gpa_t gpa;
4774         int rc;
4775
4776         if (ops->read_write_prepare &&
4777                   ops->read_write_prepare(vcpu, val, bytes))
4778                 return X86EMUL_CONTINUE;
4779
4780         vcpu->mmio_nr_fragments = 0;
4781
4782         /* Crossing a page boundary? */
4783         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4784                 int now;
4785
4786                 now = -addr & ~PAGE_MASK;
4787                 rc = emulator_read_write_onepage(addr, val, now, exception,
4788                                                  vcpu, ops);
4789
4790                 if (rc != X86EMUL_CONTINUE)
4791                         return rc;
4792                 addr += now;
4793                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4794                         addr = (u32)addr;
4795                 val += now;
4796                 bytes -= now;
4797         }
4798
4799         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4800                                          vcpu, ops);
4801         if (rc != X86EMUL_CONTINUE)
4802                 return rc;
4803
4804         if (!vcpu->mmio_nr_fragments)
4805                 return rc;
4806
4807         gpa = vcpu->mmio_fragments[0].gpa;
4808
4809         vcpu->mmio_needed = 1;
4810         vcpu->mmio_cur_fragment = 0;
4811
4812         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4813         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4814         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4815         vcpu->run->mmio.phys_addr = gpa;
4816
4817         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4818 }
4819
4820 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4821                                   unsigned long addr,
4822                                   void *val,
4823                                   unsigned int bytes,
4824                                   struct x86_exception *exception)
4825 {
4826         return emulator_read_write(ctxt, addr, val, bytes,
4827                                    exception, &read_emultor);
4828 }
4829
4830 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4831                             unsigned long addr,
4832                             const void *val,
4833                             unsigned int bytes,
4834                             struct x86_exception *exception)
4835 {
4836         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4837                                    exception, &write_emultor);
4838 }
4839
4840 #define CMPXCHG_TYPE(t, ptr, old, new) \
4841         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4842
4843 #ifdef CONFIG_X86_64
4844 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4845 #else
4846 #  define CMPXCHG64(ptr, old, new) \
4847         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4848 #endif
4849
4850 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4851                                      unsigned long addr,
4852                                      const void *old,
4853                                      const void *new,
4854                                      unsigned int bytes,
4855                                      struct x86_exception *exception)
4856 {
4857         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4858         gpa_t gpa;
4859         struct page *page;
4860         char *kaddr;
4861         bool exchanged;
4862
4863         /* guests cmpxchg8b have to be emulated atomically */
4864         if (bytes > 8 || (bytes & (bytes - 1)))
4865                 goto emul_write;
4866
4867         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4868
4869         if (gpa == UNMAPPED_GVA ||
4870             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4871                 goto emul_write;
4872
4873         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4874                 goto emul_write;
4875
4876         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4877         if (is_error_page(page))
4878                 goto emul_write;
4879
4880         kaddr = kmap_atomic(page);
4881         kaddr += offset_in_page(gpa);
4882         switch (bytes) {
4883         case 1:
4884                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4885                 break;
4886         case 2:
4887                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4888                 break;
4889         case 4:
4890                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4891                 break;
4892         case 8:
4893                 exchanged = CMPXCHG64(kaddr, old, new);
4894                 break;
4895         default:
4896                 BUG();
4897         }
4898         kunmap_atomic(kaddr);
4899         kvm_release_page_dirty(page);
4900
4901         if (!exchanged)
4902                 return X86EMUL_CMPXCHG_FAILED;
4903
4904         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4905         kvm_page_track_write(vcpu, gpa, new, bytes);
4906
4907         return X86EMUL_CONTINUE;
4908
4909 emul_write:
4910         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4911
4912         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4913 }
4914
4915 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4916 {
4917         int r = 0, i;
4918
4919         for (i = 0; i < vcpu->arch.pio.count; i++) {
4920                 if (vcpu->arch.pio.in)
4921                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4922                                             vcpu->arch.pio.size, pd);
4923                 else
4924                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4925                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4926                                              pd);
4927                 if (r)
4928                         break;
4929                 pd += vcpu->arch.pio.size;
4930         }
4931         return r;
4932 }
4933
4934 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4935                                unsigned short port, void *val,
4936                                unsigned int count, bool in)
4937 {
4938         vcpu->arch.pio.port = port;
4939         vcpu->arch.pio.in = in;
4940         vcpu->arch.pio.count  = count;
4941         vcpu->arch.pio.size = size;
4942
4943         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4944                 vcpu->arch.pio.count = 0;
4945                 return 1;
4946         }
4947
4948         vcpu->run->exit_reason = KVM_EXIT_IO;
4949         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4950         vcpu->run->io.size = size;
4951         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4952         vcpu->run->io.count = count;
4953         vcpu->run->io.port = port;
4954
4955         return 0;
4956 }
4957
4958 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4959                                     int size, unsigned short port, void *val,
4960                                     unsigned int count)
4961 {
4962         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4963         int ret;
4964
4965         if (vcpu->arch.pio.count)
4966                 goto data_avail;
4967
4968         memset(vcpu->arch.pio_data, 0, size * count);
4969
4970         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4971         if (ret) {
4972 data_avail:
4973                 memcpy(val, vcpu->arch.pio_data, size * count);
4974                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4975                 vcpu->arch.pio.count = 0;
4976                 return 1;
4977         }
4978
4979         return 0;
4980 }
4981
4982 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4983                                      int size, unsigned short port,
4984                                      const void *val, unsigned int count)
4985 {
4986         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4987
4988         memcpy(vcpu->arch.pio_data, val, size * count);
4989         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4990         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4991 }
4992
4993 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4994 {
4995         return kvm_x86_ops->get_segment_base(vcpu, seg);
4996 }
4997
4998 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4999 {
5000         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5001 }
5002
5003 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5004 {
5005         if (!need_emulate_wbinvd(vcpu))
5006                 return X86EMUL_CONTINUE;
5007
5008         if (kvm_x86_ops->has_wbinvd_exit()) {
5009                 int cpu = get_cpu();
5010
5011                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5012                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5013                                 wbinvd_ipi, NULL, 1);
5014                 put_cpu();
5015                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5016         } else
5017                 wbinvd();
5018         return X86EMUL_CONTINUE;
5019 }
5020
5021 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5022 {
5023         kvm_emulate_wbinvd_noskip(vcpu);
5024         return kvm_skip_emulated_instruction(vcpu);
5025 }
5026 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5027
5028
5029
5030 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5031 {
5032         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5033 }
5034
5035 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5036                            unsigned long *dest)
5037 {
5038         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5039 }
5040
5041 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5042                            unsigned long value)
5043 {
5044
5045         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5046 }
5047
5048 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5049 {
5050         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5051 }
5052
5053 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5054 {
5055         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5056         unsigned long value;
5057
5058         switch (cr) {
5059         case 0:
5060                 value = kvm_read_cr0(vcpu);
5061                 break;
5062         case 2:
5063                 value = vcpu->arch.cr2;
5064                 break;
5065         case 3:
5066                 value = kvm_read_cr3(vcpu);
5067                 break;
5068         case 4:
5069                 value = kvm_read_cr4(vcpu);
5070                 break;
5071         case 8:
5072                 value = kvm_get_cr8(vcpu);
5073                 break;
5074         default:
5075                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5076                 return 0;
5077         }
5078
5079         return value;
5080 }
5081
5082 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5083 {
5084         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5085         int res = 0;
5086
5087         switch (cr) {
5088         case 0:
5089                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5090                 break;
5091         case 2:
5092                 vcpu->arch.cr2 = val;
5093                 break;
5094         case 3:
5095                 res = kvm_set_cr3(vcpu, val);
5096                 break;
5097         case 4:
5098                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5099                 break;
5100         case 8:
5101                 res = kvm_set_cr8(vcpu, val);
5102                 break;
5103         default:
5104                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5105                 res = -1;
5106         }
5107
5108         return res;
5109 }
5110
5111 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5112 {
5113         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5114 }
5115
5116 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5117 {
5118         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5119 }
5120
5121 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5122 {
5123         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5124 }
5125
5126 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5127 {
5128         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5129 }
5130
5131 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5132 {
5133         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5134 }
5135
5136 static unsigned long emulator_get_cached_segment_base(
5137         struct x86_emulate_ctxt *ctxt, int seg)
5138 {
5139         return get_segment_base(emul_to_vcpu(ctxt), seg);
5140 }
5141
5142 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5143                                  struct desc_struct *desc, u32 *base3,
5144                                  int seg)
5145 {
5146         struct kvm_segment var;
5147
5148         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5149         *selector = var.selector;
5150
5151         if (var.unusable) {
5152                 memset(desc, 0, sizeof(*desc));
5153                 if (base3)
5154                         *base3 = 0;
5155                 return false;
5156         }
5157
5158         if (var.g)
5159                 var.limit >>= 12;
5160         set_desc_limit(desc, var.limit);
5161         set_desc_base(desc, (unsigned long)var.base);
5162 #ifdef CONFIG_X86_64
5163         if (base3)
5164                 *base3 = var.base >> 32;
5165 #endif
5166         desc->type = var.type;
5167         desc->s = var.s;
5168         desc->dpl = var.dpl;
5169         desc->p = var.present;
5170         desc->avl = var.avl;
5171         desc->l = var.l;
5172         desc->d = var.db;
5173         desc->g = var.g;
5174
5175         return true;
5176 }
5177
5178 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5179                                  struct desc_struct *desc, u32 base3,
5180                                  int seg)
5181 {
5182         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5183         struct kvm_segment var;
5184
5185         var.selector = selector;
5186         var.base = get_desc_base(desc);
5187 #ifdef CONFIG_X86_64
5188         var.base |= ((u64)base3) << 32;
5189 #endif
5190         var.limit = get_desc_limit(desc);
5191         if (desc->g)
5192                 var.limit = (var.limit << 12) | 0xfff;
5193         var.type = desc->type;
5194         var.dpl = desc->dpl;
5195         var.db = desc->d;
5196         var.s = desc->s;
5197         var.l = desc->l;
5198         var.g = desc->g;
5199         var.avl = desc->avl;
5200         var.present = desc->p;
5201         var.unusable = !var.present;
5202         var.padding = 0;
5203
5204         kvm_set_segment(vcpu, &var, seg);
5205         return;
5206 }
5207
5208 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5209                             u32 msr_index, u64 *pdata)
5210 {
5211         struct msr_data msr;
5212         int r;
5213
5214         msr.index = msr_index;
5215         msr.host_initiated = false;
5216         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5217         if (r)
5218                 return r;
5219
5220         *pdata = msr.data;
5221         return 0;
5222 }
5223
5224 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5225                             u32 msr_index, u64 data)
5226 {
5227         struct msr_data msr;
5228
5229         msr.data = data;
5230         msr.index = msr_index;
5231         msr.host_initiated = false;
5232         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5233 }
5234
5235 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5236 {
5237         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5238
5239         return vcpu->arch.smbase;
5240 }
5241
5242 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5243 {
5244         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5245
5246         vcpu->arch.smbase = smbase;
5247 }
5248
5249 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5250                               u32 pmc)
5251 {
5252         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5253 }
5254
5255 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5256                              u32 pmc, u64 *pdata)
5257 {
5258         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5259 }
5260
5261 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5262 {
5263         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5264 }
5265
5266 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5267                               struct x86_instruction_info *info,
5268                               enum x86_intercept_stage stage)
5269 {
5270         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5271 }
5272
5273 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5274                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5275 {
5276         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5277 }
5278
5279 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5280 {
5281         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5282 }
5283
5284 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5285 {
5286         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5287 }
5288
5289 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5290 {
5291         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5292 }
5293
5294 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5295 {
5296         return emul_to_vcpu(ctxt)->arch.hflags;
5297 }
5298
5299 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5300 {
5301         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5302 }
5303
5304 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5305 {
5306         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5307 }
5308
5309 static const struct x86_emulate_ops emulate_ops = {
5310         .read_gpr            = emulator_read_gpr,
5311         .write_gpr           = emulator_write_gpr,
5312         .read_std            = kvm_read_guest_virt_system,
5313         .write_std           = kvm_write_guest_virt_system,
5314         .read_phys           = kvm_read_guest_phys_system,
5315         .fetch               = kvm_fetch_guest_virt,
5316         .read_emulated       = emulator_read_emulated,
5317         .write_emulated      = emulator_write_emulated,
5318         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5319         .invlpg              = emulator_invlpg,
5320         .pio_in_emulated     = emulator_pio_in_emulated,
5321         .pio_out_emulated    = emulator_pio_out_emulated,
5322         .get_segment         = emulator_get_segment,
5323         .set_segment         = emulator_set_segment,
5324         .get_cached_segment_base = emulator_get_cached_segment_base,
5325         .get_gdt             = emulator_get_gdt,
5326         .get_idt             = emulator_get_idt,
5327         .set_gdt             = emulator_set_gdt,
5328         .set_idt             = emulator_set_idt,
5329         .get_cr              = emulator_get_cr,
5330         .set_cr              = emulator_set_cr,
5331         .cpl                 = emulator_get_cpl,
5332         .get_dr              = emulator_get_dr,
5333         .set_dr              = emulator_set_dr,
5334         .get_smbase          = emulator_get_smbase,
5335         .set_smbase          = emulator_set_smbase,
5336         .set_msr             = emulator_set_msr,
5337         .get_msr             = emulator_get_msr,
5338         .check_pmc           = emulator_check_pmc,
5339         .read_pmc            = emulator_read_pmc,
5340         .halt                = emulator_halt,
5341         .wbinvd              = emulator_wbinvd,
5342         .fix_hypercall       = emulator_fix_hypercall,
5343         .intercept           = emulator_intercept,
5344         .get_cpuid           = emulator_get_cpuid,
5345         .set_nmi_mask        = emulator_set_nmi_mask,
5346         .get_hflags          = emulator_get_hflags,
5347         .set_hflags          = emulator_set_hflags,
5348         .pre_leave_smm       = emulator_pre_leave_smm,
5349 };
5350
5351 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5352 {
5353         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5354         /*
5355          * an sti; sti; sequence only disable interrupts for the first
5356          * instruction. So, if the last instruction, be it emulated or
5357          * not, left the system with the INT_STI flag enabled, it
5358          * means that the last instruction is an sti. We should not
5359          * leave the flag on in this case. The same goes for mov ss
5360          */
5361         if (int_shadow & mask)
5362                 mask = 0;
5363         if (unlikely(int_shadow || mask)) {
5364                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5365                 if (!mask)
5366                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5367         }
5368 }
5369
5370 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5371 {
5372         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5373         if (ctxt->exception.vector == PF_VECTOR)
5374                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5375
5376         if (ctxt->exception.error_code_valid)
5377                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5378                                       ctxt->exception.error_code);
5379         else
5380                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5381         return false;
5382 }
5383
5384 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5385 {
5386         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5387         int cs_db, cs_l;
5388
5389         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5390
5391         ctxt->eflags = kvm_get_rflags(vcpu);
5392         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5393
5394         ctxt->eip = kvm_rip_read(vcpu);
5395         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5396                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5397                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5398                      cs_db                              ? X86EMUL_MODE_PROT32 :
5399                                                           X86EMUL_MODE_PROT16;
5400         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5401         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5402         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5403
5404         init_decode_cache(ctxt);
5405         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5406 }
5407
5408 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5409 {
5410         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5411         int ret;
5412
5413         init_emulate_ctxt(vcpu);
5414
5415         ctxt->op_bytes = 2;
5416         ctxt->ad_bytes = 2;
5417         ctxt->_eip = ctxt->eip + inc_eip;
5418         ret = emulate_int_real(ctxt, irq);
5419
5420         if (ret != X86EMUL_CONTINUE)
5421                 return EMULATE_FAIL;
5422
5423         ctxt->eip = ctxt->_eip;
5424         kvm_rip_write(vcpu, ctxt->eip);
5425         kvm_set_rflags(vcpu, ctxt->eflags);
5426
5427         if (irq == NMI_VECTOR)
5428                 vcpu->arch.nmi_pending = 0;
5429         else
5430                 vcpu->arch.interrupt.pending = false;
5431
5432         return EMULATE_DONE;
5433 }
5434 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5435
5436 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5437 {
5438         int r = EMULATE_DONE;
5439
5440         ++vcpu->stat.insn_emulation_fail;
5441         trace_kvm_emulate_insn_failed(vcpu);
5442         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5443                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5444                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5445                 vcpu->run->internal.ndata = 0;
5446                 r = EMULATE_USER_EXIT;
5447         }
5448         kvm_queue_exception(vcpu, UD_VECTOR);
5449
5450         return r;
5451 }
5452
5453 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5454                                   bool write_fault_to_shadow_pgtable,
5455                                   int emulation_type)
5456 {
5457         gpa_t gpa = cr2;
5458         kvm_pfn_t pfn;
5459
5460         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5461                 return false;
5462
5463         if (!vcpu->arch.mmu.direct_map) {
5464                 /*
5465                  * Write permission should be allowed since only
5466                  * write access need to be emulated.
5467                  */
5468                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5469
5470                 /*
5471                  * If the mapping is invalid in guest, let cpu retry
5472                  * it to generate fault.
5473                  */
5474                 if (gpa == UNMAPPED_GVA)
5475                         return true;
5476         }
5477
5478         /*
5479          * Do not retry the unhandleable instruction if it faults on the
5480          * readonly host memory, otherwise it will goto a infinite loop:
5481          * retry instruction -> write #PF -> emulation fail -> retry
5482          * instruction -> ...
5483          */
5484         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5485
5486         /*
5487          * If the instruction failed on the error pfn, it can not be fixed,
5488          * report the error to userspace.
5489          */
5490         if (is_error_noslot_pfn(pfn))
5491                 return false;
5492
5493         kvm_release_pfn_clean(pfn);
5494
5495         /* The instructions are well-emulated on direct mmu. */
5496         if (vcpu->arch.mmu.direct_map) {
5497                 unsigned int indirect_shadow_pages;
5498
5499                 spin_lock(&vcpu->kvm->mmu_lock);
5500                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5501                 spin_unlock(&vcpu->kvm->mmu_lock);
5502
5503                 if (indirect_shadow_pages)
5504                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5505
5506                 return true;
5507         }
5508
5509         /*
5510          * if emulation was due to access to shadowed page table
5511          * and it failed try to unshadow page and re-enter the
5512          * guest to let CPU execute the instruction.
5513          */
5514         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5515
5516         /*
5517          * If the access faults on its page table, it can not
5518          * be fixed by unprotecting shadow page and it should
5519          * be reported to userspace.
5520          */
5521         return !write_fault_to_shadow_pgtable;
5522 }
5523
5524 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5525                               unsigned long cr2,  int emulation_type)
5526 {
5527         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5528         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5529
5530         last_retry_eip = vcpu->arch.last_retry_eip;
5531         last_retry_addr = vcpu->arch.last_retry_addr;
5532
5533         /*
5534          * If the emulation is caused by #PF and it is non-page_table
5535          * writing instruction, it means the VM-EXIT is caused by shadow
5536          * page protected, we can zap the shadow page and retry this
5537          * instruction directly.
5538          *
5539          * Note: if the guest uses a non-page-table modifying instruction
5540          * on the PDE that points to the instruction, then we will unmap
5541          * the instruction and go to an infinite loop. So, we cache the
5542          * last retried eip and the last fault address, if we meet the eip
5543          * and the address again, we can break out of the potential infinite
5544          * loop.
5545          */
5546         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5547
5548         if (!(emulation_type & EMULTYPE_RETRY))
5549                 return false;
5550
5551         if (x86_page_table_writing_insn(ctxt))
5552                 return false;
5553
5554         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5555                 return false;
5556
5557         vcpu->arch.last_retry_eip = ctxt->eip;
5558         vcpu->arch.last_retry_addr = cr2;
5559
5560         if (!vcpu->arch.mmu.direct_map)
5561                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5562
5563         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5564
5565         return true;
5566 }
5567
5568 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5569 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5570
5571 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5572 {
5573         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5574                 /* This is a good place to trace that we are exiting SMM.  */
5575                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5576
5577                 /* Process a latched INIT or SMI, if any.  */
5578                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5579         }
5580
5581         kvm_mmu_reset_context(vcpu);
5582 }
5583
5584 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5585 {
5586         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5587
5588         vcpu->arch.hflags = emul_flags;
5589
5590         if (changed & HF_SMM_MASK)
5591                 kvm_smm_changed(vcpu);
5592 }
5593
5594 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5595                                 unsigned long *db)
5596 {
5597         u32 dr6 = 0;
5598         int i;
5599         u32 enable, rwlen;
5600
5601         enable = dr7;
5602         rwlen = dr7 >> 16;
5603         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5604                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5605                         dr6 |= (1 << i);
5606         return dr6;
5607 }
5608
5609 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5610 {
5611         struct kvm_run *kvm_run = vcpu->run;
5612
5613         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5614                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5615                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5616                 kvm_run->debug.arch.exception = DB_VECTOR;
5617                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5618                 *r = EMULATE_USER_EXIT;
5619         } else {
5620                 /*
5621                  * "Certain debug exceptions may clear bit 0-3.  The
5622                  * remaining contents of the DR6 register are never
5623                  * cleared by the processor".
5624                  */
5625                 vcpu->arch.dr6 &= ~15;
5626                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5627                 kvm_queue_exception(vcpu, DB_VECTOR);
5628         }
5629 }
5630
5631 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5632 {
5633         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5634         int r = EMULATE_DONE;
5635
5636         kvm_x86_ops->skip_emulated_instruction(vcpu);
5637
5638         /*
5639          * rflags is the old, "raw" value of the flags.  The new value has
5640          * not been saved yet.
5641          *
5642          * This is correct even for TF set by the guest, because "the
5643          * processor will not generate this exception after the instruction
5644          * that sets the TF flag".
5645          */
5646         if (unlikely(rflags & X86_EFLAGS_TF))
5647                 kvm_vcpu_do_singlestep(vcpu, &r);
5648         return r == EMULATE_DONE;
5649 }
5650 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5651
5652 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5653 {
5654         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5655             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5656                 struct kvm_run *kvm_run = vcpu->run;
5657                 unsigned long eip = kvm_get_linear_rip(vcpu);
5658                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5659                                            vcpu->arch.guest_debug_dr7,
5660                                            vcpu->arch.eff_db);
5661
5662                 if (dr6 != 0) {
5663                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5664                         kvm_run->debug.arch.pc = eip;
5665                         kvm_run->debug.arch.exception = DB_VECTOR;
5666                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5667                         *r = EMULATE_USER_EXIT;
5668                         return true;
5669                 }
5670         }
5671
5672         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5673             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5674                 unsigned long eip = kvm_get_linear_rip(vcpu);
5675                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5676                                            vcpu->arch.dr7,
5677                                            vcpu->arch.db);
5678
5679                 if (dr6 != 0) {
5680                         vcpu->arch.dr6 &= ~15;
5681                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5682                         kvm_queue_exception(vcpu, DB_VECTOR);
5683                         *r = EMULATE_DONE;
5684                         return true;
5685                 }
5686         }
5687
5688         return false;
5689 }
5690
5691 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5692                             unsigned long cr2,
5693                             int emulation_type,
5694                             void *insn,
5695                             int insn_len)
5696 {
5697         int r;
5698         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5699         bool writeback = true;
5700         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5701
5702         /*
5703          * Clear write_fault_to_shadow_pgtable here to ensure it is
5704          * never reused.
5705          */
5706         vcpu->arch.write_fault_to_shadow_pgtable = false;
5707         kvm_clear_exception_queue(vcpu);
5708
5709         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5710                 init_emulate_ctxt(vcpu);
5711
5712                 /*
5713                  * We will reenter on the same instruction since
5714                  * we do not set complete_userspace_io.  This does not
5715                  * handle watchpoints yet, those would be handled in
5716                  * the emulate_ops.
5717                  */
5718                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5719                         return r;
5720
5721                 ctxt->interruptibility = 0;
5722                 ctxt->have_exception = false;
5723                 ctxt->exception.vector = -1;
5724                 ctxt->perm_ok = false;
5725
5726                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5727
5728                 r = x86_decode_insn(ctxt, insn, insn_len);
5729
5730                 trace_kvm_emulate_insn_start(vcpu);
5731                 ++vcpu->stat.insn_emulation;
5732                 if (r != EMULATION_OK)  {
5733                         if (emulation_type & EMULTYPE_TRAP_UD)
5734                                 return EMULATE_FAIL;
5735                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5736                                                 emulation_type))
5737                                 return EMULATE_DONE;
5738                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5739                                 return EMULATE_DONE;
5740                         if (emulation_type & EMULTYPE_SKIP)
5741                                 return EMULATE_FAIL;
5742                         return handle_emulation_failure(vcpu);
5743                 }
5744         }
5745
5746         if (emulation_type & EMULTYPE_SKIP) {
5747                 kvm_rip_write(vcpu, ctxt->_eip);
5748                 if (ctxt->eflags & X86_EFLAGS_RF)
5749                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5750                 return EMULATE_DONE;
5751         }
5752
5753         if (retry_instruction(ctxt, cr2, emulation_type))
5754                 return EMULATE_DONE;
5755
5756         /* this is needed for vmware backdoor interface to work since it
5757            changes registers values  during IO operation */
5758         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5759                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5760                 emulator_invalidate_register_cache(ctxt);
5761         }
5762
5763 restart:
5764         /* Save the faulting GPA (cr2) in the address field */
5765         ctxt->exception.address = cr2;
5766
5767         r = x86_emulate_insn(ctxt);
5768
5769         if (r == EMULATION_INTERCEPTED)
5770                 return EMULATE_DONE;
5771
5772         if (r == EMULATION_FAILED) {
5773                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5774                                         emulation_type))
5775                         return EMULATE_DONE;
5776
5777                 return handle_emulation_failure(vcpu);
5778         }
5779
5780         if (ctxt->have_exception) {
5781                 r = EMULATE_DONE;
5782                 if (inject_emulated_exception(vcpu))
5783                         return r;
5784         } else if (vcpu->arch.pio.count) {
5785                 if (!vcpu->arch.pio.in) {
5786                         /* FIXME: return into emulator if single-stepping.  */
5787                         vcpu->arch.pio.count = 0;
5788                 } else {
5789                         writeback = false;
5790                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5791                 }
5792                 r = EMULATE_USER_EXIT;
5793         } else if (vcpu->mmio_needed) {
5794                 if (!vcpu->mmio_is_write)
5795                         writeback = false;
5796                 r = EMULATE_USER_EXIT;
5797                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5798         } else if (r == EMULATION_RESTART)
5799                 goto restart;
5800         else
5801                 r = EMULATE_DONE;
5802
5803         if (writeback) {
5804                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5805                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5806                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5807                 kvm_rip_write(vcpu, ctxt->eip);
5808                 if (r == EMULATE_DONE &&
5809                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5810                         kvm_vcpu_do_singlestep(vcpu, &r);
5811                 if (!ctxt->have_exception ||
5812                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5813                         __kvm_set_rflags(vcpu, ctxt->eflags);
5814
5815                 /*
5816                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5817                  * do nothing, and it will be requested again as soon as
5818                  * the shadow expires.  But we still need to check here,
5819                  * because POPF has no interrupt shadow.
5820                  */
5821                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5822                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5823         } else
5824                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5825
5826         return r;
5827 }
5828 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5829
5830 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5831 {
5832         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5833         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5834                                             size, port, &val, 1);
5835         /* do not return to emulator after return from userspace */
5836         vcpu->arch.pio.count = 0;
5837         return ret;
5838 }
5839 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5840
5841 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5842 {
5843         unsigned long val;
5844
5845         /* We should only ever be called with arch.pio.count equal to 1 */
5846         BUG_ON(vcpu->arch.pio.count != 1);
5847
5848         /* For size less than 4 we merge, else we zero extend */
5849         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5850                                         : 0;
5851
5852         /*
5853          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5854          * the copy and tracing
5855          */
5856         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5857                                  vcpu->arch.pio.port, &val, 1);
5858         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5859
5860         return 1;
5861 }
5862
5863 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5864 {
5865         unsigned long val;
5866         int ret;
5867
5868         /* For size less than 4 we merge, else we zero extend */
5869         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5870
5871         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5872                                        &val, 1);
5873         if (ret) {
5874                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5875                 return ret;
5876         }
5877
5878         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5879
5880         return 0;
5881 }
5882 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5883
5884 static int kvmclock_cpu_down_prep(unsigned int cpu)
5885 {
5886         __this_cpu_write(cpu_tsc_khz, 0);
5887         return 0;
5888 }
5889
5890 static void tsc_khz_changed(void *data)
5891 {
5892         struct cpufreq_freqs *freq = data;
5893         unsigned long khz = 0;
5894
5895         if (data)
5896                 khz = freq->new;
5897         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5898                 khz = cpufreq_quick_get(raw_smp_processor_id());
5899         if (!khz)
5900                 khz = tsc_khz;
5901         __this_cpu_write(cpu_tsc_khz, khz);
5902 }
5903
5904 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5905                                      void *data)
5906 {
5907         struct cpufreq_freqs *freq = data;
5908         struct kvm *kvm;
5909         struct kvm_vcpu *vcpu;
5910         int i, send_ipi = 0;
5911
5912         /*
5913          * We allow guests to temporarily run on slowing clocks,
5914          * provided we notify them after, or to run on accelerating
5915          * clocks, provided we notify them before.  Thus time never
5916          * goes backwards.
5917          *
5918          * However, we have a problem.  We can't atomically update
5919          * the frequency of a given CPU from this function; it is
5920          * merely a notifier, which can be called from any CPU.
5921          * Changing the TSC frequency at arbitrary points in time
5922          * requires a recomputation of local variables related to
5923          * the TSC for each VCPU.  We must flag these local variables
5924          * to be updated and be sure the update takes place with the
5925          * new frequency before any guests proceed.
5926          *
5927          * Unfortunately, the combination of hotplug CPU and frequency
5928          * change creates an intractable locking scenario; the order
5929          * of when these callouts happen is undefined with respect to
5930          * CPU hotplug, and they can race with each other.  As such,
5931          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5932          * undefined; you can actually have a CPU frequency change take
5933          * place in between the computation of X and the setting of the
5934          * variable.  To protect against this problem, all updates of
5935          * the per_cpu tsc_khz variable are done in an interrupt
5936          * protected IPI, and all callers wishing to update the value
5937          * must wait for a synchronous IPI to complete (which is trivial
5938          * if the caller is on the CPU already).  This establishes the
5939          * necessary total order on variable updates.
5940          *
5941          * Note that because a guest time update may take place
5942          * anytime after the setting of the VCPU's request bit, the
5943          * correct TSC value must be set before the request.  However,
5944          * to ensure the update actually makes it to any guest which
5945          * starts running in hardware virtualization between the set
5946          * and the acquisition of the spinlock, we must also ping the
5947          * CPU after setting the request bit.
5948          *
5949          */
5950
5951         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5952                 return 0;
5953         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5954                 return 0;
5955
5956         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5957
5958         spin_lock(&kvm_lock);
5959         list_for_each_entry(kvm, &vm_list, vm_list) {
5960                 kvm_for_each_vcpu(i, vcpu, kvm) {
5961                         if (vcpu->cpu != freq->cpu)
5962                                 continue;
5963                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5964                         if (vcpu->cpu != smp_processor_id())
5965                                 send_ipi = 1;
5966                 }
5967         }
5968         spin_unlock(&kvm_lock);
5969
5970         if (freq->old < freq->new && send_ipi) {
5971                 /*
5972                  * We upscale the frequency.  Must make the guest
5973                  * doesn't see old kvmclock values while running with
5974                  * the new frequency, otherwise we risk the guest sees
5975                  * time go backwards.
5976                  *
5977                  * In case we update the frequency for another cpu
5978                  * (which might be in guest context) send an interrupt
5979                  * to kick the cpu out of guest context.  Next time
5980                  * guest context is entered kvmclock will be updated,
5981                  * so the guest will not see stale values.
5982                  */
5983                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5984         }
5985         return 0;
5986 }
5987
5988 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5989         .notifier_call  = kvmclock_cpufreq_notifier
5990 };
5991
5992 static int kvmclock_cpu_online(unsigned int cpu)
5993 {
5994         tsc_khz_changed(NULL);
5995         return 0;
5996 }
5997
5998 static void kvm_timer_init(void)
5999 {
6000         max_tsc_khz = tsc_khz;
6001
6002         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6003 #ifdef CONFIG_CPU_FREQ
6004                 struct cpufreq_policy policy;
6005                 int cpu;
6006
6007                 memset(&policy, 0, sizeof(policy));
6008                 cpu = get_cpu();
6009                 cpufreq_get_policy(&policy, cpu);
6010                 if (policy.cpuinfo.max_freq)
6011                         max_tsc_khz = policy.cpuinfo.max_freq;
6012                 put_cpu();
6013 #endif
6014                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6015                                           CPUFREQ_TRANSITION_NOTIFIER);
6016         }
6017         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6018
6019         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6020                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6021 }
6022
6023 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6024
6025 int kvm_is_in_guest(void)
6026 {
6027         return __this_cpu_read(current_vcpu) != NULL;
6028 }
6029
6030 static int kvm_is_user_mode(void)
6031 {
6032         int user_mode = 3;
6033
6034         if (__this_cpu_read(current_vcpu))
6035                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6036
6037         return user_mode != 0;
6038 }
6039
6040 static unsigned long kvm_get_guest_ip(void)
6041 {
6042         unsigned long ip = 0;
6043
6044         if (__this_cpu_read(current_vcpu))
6045                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6046
6047         return ip;
6048 }
6049
6050 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6051         .is_in_guest            = kvm_is_in_guest,
6052         .is_user_mode           = kvm_is_user_mode,
6053         .get_guest_ip           = kvm_get_guest_ip,
6054 };
6055
6056 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6057 {
6058         __this_cpu_write(current_vcpu, vcpu);
6059 }
6060 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6061
6062 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6063 {
6064         __this_cpu_write(current_vcpu, NULL);
6065 }
6066 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6067
6068 static void kvm_set_mmio_spte_mask(void)
6069 {
6070         u64 mask;
6071         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6072
6073         /*
6074          * Set the reserved bits and the present bit of an paging-structure
6075          * entry to generate page fault with PFER.RSV = 1.
6076          */
6077          /* Mask the reserved physical address bits. */
6078         mask = rsvd_bits(maxphyaddr, 51);
6079
6080         /* Set the present bit. */
6081         mask |= 1ull;
6082
6083 #ifdef CONFIG_X86_64
6084         /*
6085          * If reserved bit is not supported, clear the present bit to disable
6086          * mmio page fault.
6087          */
6088         if (maxphyaddr == 52)
6089                 mask &= ~1ull;
6090 #endif
6091
6092         kvm_mmu_set_mmio_spte_mask(mask, mask);
6093 }
6094
6095 #ifdef CONFIG_X86_64
6096 static void pvclock_gtod_update_fn(struct work_struct *work)
6097 {
6098         struct kvm *kvm;
6099
6100         struct kvm_vcpu *vcpu;
6101         int i;
6102
6103         spin_lock(&kvm_lock);
6104         list_for_each_entry(kvm, &vm_list, vm_list)
6105                 kvm_for_each_vcpu(i, vcpu, kvm)
6106                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6107         atomic_set(&kvm_guest_has_master_clock, 0);
6108         spin_unlock(&kvm_lock);
6109 }
6110
6111 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6112
6113 /*
6114  * Notification about pvclock gtod data update.
6115  */
6116 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6117                                void *priv)
6118 {
6119         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6120         struct timekeeper *tk = priv;
6121
6122         update_pvclock_gtod(tk);
6123
6124         /* disable master clock if host does not trust, or does not
6125          * use, TSC clocksource
6126          */
6127         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6128             atomic_read(&kvm_guest_has_master_clock) != 0)
6129                 queue_work(system_long_wq, &pvclock_gtod_work);
6130
6131         return 0;
6132 }
6133
6134 static struct notifier_block pvclock_gtod_notifier = {
6135         .notifier_call = pvclock_gtod_notify,
6136 };
6137 #endif
6138
6139 int kvm_arch_init(void *opaque)
6140 {
6141         int r;
6142         struct kvm_x86_ops *ops = opaque;
6143
6144         if (kvm_x86_ops) {
6145                 printk(KERN_ERR "kvm: already loaded the other module\n");
6146                 r = -EEXIST;
6147                 goto out;
6148         }
6149
6150         if (!ops->cpu_has_kvm_support()) {
6151                 printk(KERN_ERR "kvm: no hardware support\n");
6152                 r = -EOPNOTSUPP;
6153                 goto out;
6154         }
6155         if (ops->disabled_by_bios()) {
6156                 printk(KERN_ERR "kvm: disabled by bios\n");
6157                 r = -EOPNOTSUPP;
6158                 goto out;
6159         }
6160
6161         r = -ENOMEM;
6162         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6163         if (!shared_msrs) {
6164                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6165                 goto out;
6166         }
6167
6168         r = kvm_mmu_module_init();
6169         if (r)
6170                 goto out_free_percpu;
6171
6172         kvm_set_mmio_spte_mask();
6173
6174         kvm_x86_ops = ops;
6175
6176         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6177                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6178                         PT_PRESENT_MASK, 0, sme_me_mask);
6179         kvm_timer_init();
6180
6181         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6182
6183         if (boot_cpu_has(X86_FEATURE_XSAVE))
6184                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6185
6186         kvm_lapic_init();
6187 #ifdef CONFIG_X86_64
6188         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6189 #endif
6190
6191         return 0;
6192
6193 out_free_percpu:
6194         free_percpu(shared_msrs);
6195 out:
6196         return r;
6197 }
6198
6199 void kvm_arch_exit(void)
6200 {
6201         kvm_lapic_exit();
6202         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6203
6204         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6205                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6206                                             CPUFREQ_TRANSITION_NOTIFIER);
6207         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6208 #ifdef CONFIG_X86_64
6209         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6210 #endif
6211         kvm_x86_ops = NULL;
6212         kvm_mmu_module_exit();
6213         free_percpu(shared_msrs);
6214 }
6215
6216 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6217 {
6218         ++vcpu->stat.halt_exits;
6219         if (lapic_in_kernel(vcpu)) {
6220                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6221                 return 1;
6222         } else {
6223                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6224                 return 0;
6225         }
6226 }
6227 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6228
6229 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6230 {
6231         int ret = kvm_skip_emulated_instruction(vcpu);
6232         /*
6233          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6234          * KVM_EXIT_DEBUG here.
6235          */
6236         return kvm_vcpu_halt(vcpu) && ret;
6237 }
6238 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6239
6240 #ifdef CONFIG_X86_64
6241 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6242                                 unsigned long clock_type)
6243 {
6244         struct kvm_clock_pairing clock_pairing;
6245         struct timespec ts;
6246         u64 cycle;
6247         int ret;
6248
6249         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6250                 return -KVM_EOPNOTSUPP;
6251
6252         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6253                 return -KVM_EOPNOTSUPP;
6254
6255         clock_pairing.sec = ts.tv_sec;
6256         clock_pairing.nsec = ts.tv_nsec;
6257         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6258         clock_pairing.flags = 0;
6259
6260         ret = 0;
6261         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6262                             sizeof(struct kvm_clock_pairing)))
6263                 ret = -KVM_EFAULT;
6264
6265         return ret;
6266 }
6267 #endif
6268
6269 /*
6270  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6271  *
6272  * @apicid - apicid of vcpu to be kicked.
6273  */
6274 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6275 {
6276         struct kvm_lapic_irq lapic_irq;
6277
6278         lapic_irq.shorthand = 0;
6279         lapic_irq.dest_mode = 0;
6280         lapic_irq.level = 0;
6281         lapic_irq.dest_id = apicid;
6282         lapic_irq.msi_redir_hint = false;
6283
6284         lapic_irq.delivery_mode = APIC_DM_REMRD;
6285         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6286 }
6287
6288 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6289 {
6290         vcpu->arch.apicv_active = false;
6291         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6292 }
6293
6294 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6295 {
6296         unsigned long nr, a0, a1, a2, a3, ret;
6297         int op_64_bit, r;
6298
6299         r = kvm_skip_emulated_instruction(vcpu);
6300
6301         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6302                 return kvm_hv_hypercall(vcpu);
6303
6304         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6305         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6306         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6307         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6308         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6309
6310         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6311
6312         op_64_bit = is_64_bit_mode(vcpu);
6313         if (!op_64_bit) {
6314                 nr &= 0xFFFFFFFF;
6315                 a0 &= 0xFFFFFFFF;
6316                 a1 &= 0xFFFFFFFF;
6317                 a2 &= 0xFFFFFFFF;
6318                 a3 &= 0xFFFFFFFF;
6319         }
6320
6321         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6322                 ret = -KVM_EPERM;
6323                 goto out;
6324         }
6325
6326         switch (nr) {
6327         case KVM_HC_VAPIC_POLL_IRQ:
6328                 ret = 0;
6329                 break;
6330         case KVM_HC_KICK_CPU:
6331                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6332                 ret = 0;
6333                 break;
6334 #ifdef CONFIG_X86_64
6335         case KVM_HC_CLOCK_PAIRING:
6336                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6337                 break;
6338 #endif
6339         default:
6340                 ret = -KVM_ENOSYS;
6341                 break;
6342         }
6343 out:
6344         if (!op_64_bit)
6345                 ret = (u32)ret;
6346         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6347         ++vcpu->stat.hypercalls;
6348         return r;
6349 }
6350 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6351
6352 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6353 {
6354         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6355         char instruction[3];
6356         unsigned long rip = kvm_rip_read(vcpu);
6357
6358         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6359
6360         return emulator_write_emulated(ctxt, rip, instruction, 3,
6361                 &ctxt->exception);
6362 }
6363
6364 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6365 {
6366         return vcpu->run->request_interrupt_window &&
6367                 likely(!pic_in_kernel(vcpu->kvm));
6368 }
6369
6370 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6371 {
6372         struct kvm_run *kvm_run = vcpu->run;
6373
6374         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6375         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6376         kvm_run->cr8 = kvm_get_cr8(vcpu);
6377         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6378         kvm_run->ready_for_interrupt_injection =
6379                 pic_in_kernel(vcpu->kvm) ||
6380                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6381 }
6382
6383 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6384 {
6385         int max_irr, tpr;
6386
6387         if (!kvm_x86_ops->update_cr8_intercept)
6388                 return;
6389
6390         if (!lapic_in_kernel(vcpu))
6391                 return;
6392
6393         if (vcpu->arch.apicv_active)
6394                 return;
6395
6396         if (!vcpu->arch.apic->vapic_addr)
6397                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6398         else
6399                 max_irr = -1;
6400
6401         if (max_irr != -1)
6402                 max_irr >>= 4;
6403
6404         tpr = kvm_lapic_get_cr8(vcpu);
6405
6406         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6407 }
6408
6409 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6410 {
6411         int r;
6412
6413         /* try to reinject previous events if any */
6414         if (vcpu->arch.exception.injected) {
6415                 kvm_x86_ops->queue_exception(vcpu);
6416                 return 0;
6417         }
6418
6419         /*
6420          * Exceptions must be injected immediately, or the exception
6421          * frame will have the address of the NMI or interrupt handler.
6422          */
6423         if (!vcpu->arch.exception.pending) {
6424                 if (vcpu->arch.nmi_injected) {
6425                         kvm_x86_ops->set_nmi(vcpu);
6426                         return 0;
6427                 }
6428
6429                 if (vcpu->arch.interrupt.pending) {
6430                         kvm_x86_ops->set_irq(vcpu);
6431                         return 0;
6432                 }
6433         }
6434
6435         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6436                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6437                 if (r != 0)
6438                         return r;
6439         }
6440
6441         /* try to inject new event if pending */
6442         if (vcpu->arch.exception.pending) {
6443                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6444                                         vcpu->arch.exception.has_error_code,
6445                                         vcpu->arch.exception.error_code);
6446
6447                 vcpu->arch.exception.pending = false;
6448                 vcpu->arch.exception.injected = true;
6449
6450                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6451                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6452                                              X86_EFLAGS_RF);
6453
6454                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6455                     (vcpu->arch.dr7 & DR7_GD)) {
6456                         vcpu->arch.dr7 &= ~DR7_GD;
6457                         kvm_update_dr7(vcpu);
6458                 }
6459
6460                 kvm_x86_ops->queue_exception(vcpu);
6461         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6462                 vcpu->arch.smi_pending = false;
6463                 ++vcpu->arch.smi_count;
6464                 enter_smm(vcpu);
6465         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6466                 --vcpu->arch.nmi_pending;
6467                 vcpu->arch.nmi_injected = true;
6468                 kvm_x86_ops->set_nmi(vcpu);
6469         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6470                 /*
6471                  * Because interrupts can be injected asynchronously, we are
6472                  * calling check_nested_events again here to avoid a race condition.
6473                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6474                  * proposal and current concerns.  Perhaps we should be setting
6475                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6476                  */
6477                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6478                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6479                         if (r != 0)
6480                                 return r;
6481                 }
6482                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6483                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6484                                             false);
6485                         kvm_x86_ops->set_irq(vcpu);
6486                 }
6487         }
6488
6489         return 0;
6490 }
6491
6492 static void process_nmi(struct kvm_vcpu *vcpu)
6493 {
6494         unsigned limit = 2;
6495
6496         /*
6497          * x86 is limited to one NMI running, and one NMI pending after it.
6498          * If an NMI is already in progress, limit further NMIs to just one.
6499          * Otherwise, allow two (and we'll inject the first one immediately).
6500          */
6501         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6502                 limit = 1;
6503
6504         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6505         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6506         kvm_make_request(KVM_REQ_EVENT, vcpu);
6507 }
6508
6509 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6510 {
6511         u32 flags = 0;
6512         flags |= seg->g       << 23;
6513         flags |= seg->db      << 22;
6514         flags |= seg->l       << 21;
6515         flags |= seg->avl     << 20;
6516         flags |= seg->present << 15;
6517         flags |= seg->dpl     << 13;
6518         flags |= seg->s       << 12;
6519         flags |= seg->type    << 8;
6520         return flags;
6521 }
6522
6523 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6524 {
6525         struct kvm_segment seg;
6526         int offset;
6527
6528         kvm_get_segment(vcpu, &seg, n);
6529         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6530
6531         if (n < 3)
6532                 offset = 0x7f84 + n * 12;
6533         else
6534                 offset = 0x7f2c + (n - 3) * 12;
6535
6536         put_smstate(u32, buf, offset + 8, seg.base);
6537         put_smstate(u32, buf, offset + 4, seg.limit);
6538         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6539 }
6540
6541 #ifdef CONFIG_X86_64
6542 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6543 {
6544         struct kvm_segment seg;
6545         int offset;
6546         u16 flags;
6547
6548         kvm_get_segment(vcpu, &seg, n);
6549         offset = 0x7e00 + n * 16;
6550
6551         flags = enter_smm_get_segment_flags(&seg) >> 8;
6552         put_smstate(u16, buf, offset, seg.selector);
6553         put_smstate(u16, buf, offset + 2, flags);
6554         put_smstate(u32, buf, offset + 4, seg.limit);
6555         put_smstate(u64, buf, offset + 8, seg.base);
6556 }
6557 #endif
6558
6559 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6560 {
6561         struct desc_ptr dt;
6562         struct kvm_segment seg;
6563         unsigned long val;
6564         int i;
6565
6566         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6567         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6568         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6569         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6570
6571         for (i = 0; i < 8; i++)
6572                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6573
6574         kvm_get_dr(vcpu, 6, &val);
6575         put_smstate(u32, buf, 0x7fcc, (u32)val);
6576         kvm_get_dr(vcpu, 7, &val);
6577         put_smstate(u32, buf, 0x7fc8, (u32)val);
6578
6579         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6580         put_smstate(u32, buf, 0x7fc4, seg.selector);
6581         put_smstate(u32, buf, 0x7f64, seg.base);
6582         put_smstate(u32, buf, 0x7f60, seg.limit);
6583         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6584
6585         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6586         put_smstate(u32, buf, 0x7fc0, seg.selector);
6587         put_smstate(u32, buf, 0x7f80, seg.base);
6588         put_smstate(u32, buf, 0x7f7c, seg.limit);
6589         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6590
6591         kvm_x86_ops->get_gdt(vcpu, &dt);
6592         put_smstate(u32, buf, 0x7f74, dt.address);
6593         put_smstate(u32, buf, 0x7f70, dt.size);
6594
6595         kvm_x86_ops->get_idt(vcpu, &dt);
6596         put_smstate(u32, buf, 0x7f58, dt.address);
6597         put_smstate(u32, buf, 0x7f54, dt.size);
6598
6599         for (i = 0; i < 6; i++)
6600                 enter_smm_save_seg_32(vcpu, buf, i);
6601
6602         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6603
6604         /* revision id */
6605         put_smstate(u32, buf, 0x7efc, 0x00020000);
6606         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6607 }
6608
6609 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6610 {
6611 #ifdef CONFIG_X86_64
6612         struct desc_ptr dt;
6613         struct kvm_segment seg;
6614         unsigned long val;
6615         int i;
6616
6617         for (i = 0; i < 16; i++)
6618                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6619
6620         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6621         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6622
6623         kvm_get_dr(vcpu, 6, &val);
6624         put_smstate(u64, buf, 0x7f68, val);
6625         kvm_get_dr(vcpu, 7, &val);
6626         put_smstate(u64, buf, 0x7f60, val);
6627
6628         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6629         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6630         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6631
6632         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6633
6634         /* revision id */
6635         put_smstate(u32, buf, 0x7efc, 0x00020064);
6636
6637         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6638
6639         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6640         put_smstate(u16, buf, 0x7e90, seg.selector);
6641         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6642         put_smstate(u32, buf, 0x7e94, seg.limit);
6643         put_smstate(u64, buf, 0x7e98, seg.base);
6644
6645         kvm_x86_ops->get_idt(vcpu, &dt);
6646         put_smstate(u32, buf, 0x7e84, dt.size);
6647         put_smstate(u64, buf, 0x7e88, dt.address);
6648
6649         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6650         put_smstate(u16, buf, 0x7e70, seg.selector);
6651         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6652         put_smstate(u32, buf, 0x7e74, seg.limit);
6653         put_smstate(u64, buf, 0x7e78, seg.base);
6654
6655         kvm_x86_ops->get_gdt(vcpu, &dt);
6656         put_smstate(u32, buf, 0x7e64, dt.size);
6657         put_smstate(u64, buf, 0x7e68, dt.address);
6658
6659         for (i = 0; i < 6; i++)
6660                 enter_smm_save_seg_64(vcpu, buf, i);
6661 #else
6662         WARN_ON_ONCE(1);
6663 #endif
6664 }
6665
6666 static void enter_smm(struct kvm_vcpu *vcpu)
6667 {
6668         struct kvm_segment cs, ds;
6669         struct desc_ptr dt;
6670         char buf[512];
6671         u32 cr0;
6672
6673         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6674         memset(buf, 0, 512);
6675         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6676                 enter_smm_save_state_64(vcpu, buf);
6677         else
6678                 enter_smm_save_state_32(vcpu, buf);
6679
6680         /*
6681          * Give pre_enter_smm() a chance to make ISA-specific changes to the
6682          * vCPU state (e.g. leave guest mode) after we've saved the state into
6683          * the SMM state-save area.
6684          */
6685         kvm_x86_ops->pre_enter_smm(vcpu, buf);
6686
6687         vcpu->arch.hflags |= HF_SMM_MASK;
6688         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6689
6690         if (kvm_x86_ops->get_nmi_mask(vcpu))
6691                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6692         else
6693                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6694
6695         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6696         kvm_rip_write(vcpu, 0x8000);
6697
6698         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6699         kvm_x86_ops->set_cr0(vcpu, cr0);
6700         vcpu->arch.cr0 = cr0;
6701
6702         kvm_x86_ops->set_cr4(vcpu, 0);
6703
6704         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6705         dt.address = dt.size = 0;
6706         kvm_x86_ops->set_idt(vcpu, &dt);
6707
6708         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6709
6710         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6711         cs.base = vcpu->arch.smbase;
6712
6713         ds.selector = 0;
6714         ds.base = 0;
6715
6716         cs.limit    = ds.limit = 0xffffffff;
6717         cs.type     = ds.type = 0x3;
6718         cs.dpl      = ds.dpl = 0;
6719         cs.db       = ds.db = 0;
6720         cs.s        = ds.s = 1;
6721         cs.l        = ds.l = 0;
6722         cs.g        = ds.g = 1;
6723         cs.avl      = ds.avl = 0;
6724         cs.present  = ds.present = 1;
6725         cs.unusable = ds.unusable = 0;
6726         cs.padding  = ds.padding = 0;
6727
6728         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6729         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6730         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6731         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6732         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6733         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6734
6735         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6736                 kvm_x86_ops->set_efer(vcpu, 0);
6737
6738         kvm_update_cpuid(vcpu);
6739         kvm_mmu_reset_context(vcpu);
6740 }
6741
6742 static void process_smi(struct kvm_vcpu *vcpu)
6743 {
6744         vcpu->arch.smi_pending = true;
6745         kvm_make_request(KVM_REQ_EVENT, vcpu);
6746 }
6747
6748 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6749 {
6750         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6751 }
6752
6753 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6754 {
6755         u64 eoi_exit_bitmap[4];
6756
6757         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6758                 return;
6759
6760         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6761
6762         if (irqchip_split(vcpu->kvm))
6763                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6764         else {
6765                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6766                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6767                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6768         }
6769         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6770                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6771         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6772 }
6773
6774 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6775 {
6776         ++vcpu->stat.tlb_flush;
6777         kvm_x86_ops->tlb_flush(vcpu);
6778 }
6779
6780 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
6781                 unsigned long start, unsigned long end)
6782 {
6783         unsigned long apic_address;
6784
6785         /*
6786          * The physical address of apic access page is stored in the VMCS.
6787          * Update it when it becomes invalid.
6788          */
6789         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6790         if (start <= apic_address && apic_address < end)
6791                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6792 }
6793
6794 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6795 {
6796         struct page *page = NULL;
6797
6798         if (!lapic_in_kernel(vcpu))
6799                 return;
6800
6801         if (!kvm_x86_ops->set_apic_access_page_addr)
6802                 return;
6803
6804         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6805         if (is_error_page(page))
6806                 return;
6807         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6808
6809         /*
6810          * Do not pin apic access page in memory, the MMU notifier
6811          * will call us again if it is migrated or swapped out.
6812          */
6813         put_page(page);
6814 }
6815 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6816
6817 /*
6818  * Returns 1 to let vcpu_run() continue the guest execution loop without
6819  * exiting to the userspace.  Otherwise, the value will be returned to the
6820  * userspace.
6821  */
6822 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6823 {
6824         int r;
6825         bool req_int_win =
6826                 dm_request_for_irq_injection(vcpu) &&
6827                 kvm_cpu_accept_dm_intr(vcpu);
6828
6829         bool req_immediate_exit = false;
6830
6831         if (kvm_request_pending(vcpu)) {
6832                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6833                         kvm_mmu_unload(vcpu);
6834                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6835                         __kvm_migrate_timers(vcpu);
6836                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6837                         kvm_gen_update_masterclock(vcpu->kvm);
6838                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6839                         kvm_gen_kvmclock_update(vcpu);
6840                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6841                         r = kvm_guest_time_update(vcpu);
6842                         if (unlikely(r))
6843                                 goto out;
6844                 }
6845                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6846                         kvm_mmu_sync_roots(vcpu);
6847                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6848                         kvm_vcpu_flush_tlb(vcpu);
6849                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6850                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6851                         r = 0;
6852                         goto out;
6853                 }
6854                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6855                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6856                         vcpu->mmio_needed = 0;
6857                         r = 0;
6858                         goto out;
6859                 }
6860                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6861                         /* Page is swapped out. Do synthetic halt */
6862                         vcpu->arch.apf.halted = true;
6863                         r = 1;
6864                         goto out;
6865                 }
6866                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6867                         record_steal_time(vcpu);
6868                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6869                         process_smi(vcpu);
6870                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6871                         process_nmi(vcpu);
6872                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6873                         kvm_pmu_handle_event(vcpu);
6874                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6875                         kvm_pmu_deliver_pmi(vcpu);
6876                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6877                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6878                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6879                                      vcpu->arch.ioapic_handled_vectors)) {
6880                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6881                                 vcpu->run->eoi.vector =
6882                                                 vcpu->arch.pending_ioapic_eoi;
6883                                 r = 0;
6884                                 goto out;
6885                         }
6886                 }
6887                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6888                         vcpu_scan_ioapic(vcpu);
6889                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6890                         kvm_vcpu_reload_apic_access_page(vcpu);
6891                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6892                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6893                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6894                         r = 0;
6895                         goto out;
6896                 }
6897                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6898                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6899                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6900                         r = 0;
6901                         goto out;
6902                 }
6903                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6904                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6905                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6906                         r = 0;
6907                         goto out;
6908                 }
6909
6910                 /*
6911                  * KVM_REQ_HV_STIMER has to be processed after
6912                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6913                  * depend on the guest clock being up-to-date
6914                  */
6915                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6916                         kvm_hv_process_stimers(vcpu);
6917         }
6918
6919         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6920                 ++vcpu->stat.req_event;
6921                 kvm_apic_accept_events(vcpu);
6922                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6923                         r = 1;
6924                         goto out;
6925                 }
6926
6927                 if (inject_pending_event(vcpu, req_int_win) != 0)
6928                         req_immediate_exit = true;
6929                 else {
6930                         /* Enable SMI/NMI/IRQ window open exits if needed.
6931                          *
6932                          * SMIs have three cases:
6933                          * 1) They can be nested, and then there is nothing to
6934                          *    do here because RSM will cause a vmexit anyway.
6935                          * 2) There is an ISA-specific reason why SMI cannot be
6936                          *    injected, and the moment when this changes can be
6937                          *    intercepted.
6938                          * 3) Or the SMI can be pending because
6939                          *    inject_pending_event has completed the injection
6940                          *    of an IRQ or NMI from the previous vmexit, and
6941                          *    then we request an immediate exit to inject the
6942                          *    SMI.
6943                          */
6944                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6945                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
6946                                         req_immediate_exit = true;
6947                         if (vcpu->arch.nmi_pending)
6948                                 kvm_x86_ops->enable_nmi_window(vcpu);
6949                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6950                                 kvm_x86_ops->enable_irq_window(vcpu);
6951                         WARN_ON(vcpu->arch.exception.pending);
6952                 }
6953
6954                 if (kvm_lapic_enabled(vcpu)) {
6955                         update_cr8_intercept(vcpu);
6956                         kvm_lapic_sync_to_vapic(vcpu);
6957                 }
6958         }
6959
6960         r = kvm_mmu_reload(vcpu);
6961         if (unlikely(r)) {
6962                 goto cancel_injection;
6963         }
6964
6965         preempt_disable();
6966
6967         kvm_x86_ops->prepare_guest_switch(vcpu);
6968
6969         /*
6970          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6971          * IPI are then delayed after guest entry, which ensures that they
6972          * result in virtual interrupt delivery.
6973          */
6974         local_irq_disable();
6975         vcpu->mode = IN_GUEST_MODE;
6976
6977         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6978
6979         /*
6980          * 1) We should set ->mode before checking ->requests.  Please see
6981          * the comment in kvm_vcpu_exiting_guest_mode().
6982          *
6983          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6984          * pairs with the memory barrier implicit in pi_test_and_set_on
6985          * (see vmx_deliver_posted_interrupt).
6986          *
6987          * 3) This also orders the write to mode from any reads to the page
6988          * tables done while the VCPU is running.  Please see the comment
6989          * in kvm_flush_remote_tlbs.
6990          */
6991         smp_mb__after_srcu_read_unlock();
6992
6993         /*
6994          * This handles the case where a posted interrupt was
6995          * notified with kvm_vcpu_kick.
6996          */
6997         if (kvm_lapic_enabled(vcpu)) {
6998                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6999                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7000         }
7001
7002         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7003             || need_resched() || signal_pending(current)) {
7004                 vcpu->mode = OUTSIDE_GUEST_MODE;
7005                 smp_wmb();
7006                 local_irq_enable();
7007                 preempt_enable();
7008                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7009                 r = 1;
7010                 goto cancel_injection;
7011         }
7012
7013         kvm_load_guest_xcr0(vcpu);
7014
7015         if (req_immediate_exit) {
7016                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7017                 smp_send_reschedule(vcpu->cpu);
7018         }
7019
7020         trace_kvm_entry(vcpu->vcpu_id);
7021         if (lapic_timer_advance_ns)
7022                 wait_lapic_expire(vcpu);
7023         guest_enter_irqoff();
7024
7025         if (unlikely(vcpu->arch.switch_db_regs)) {
7026                 set_debugreg(0, 7);
7027                 set_debugreg(vcpu->arch.eff_db[0], 0);
7028                 set_debugreg(vcpu->arch.eff_db[1], 1);
7029                 set_debugreg(vcpu->arch.eff_db[2], 2);
7030                 set_debugreg(vcpu->arch.eff_db[3], 3);
7031                 set_debugreg(vcpu->arch.dr6, 6);
7032                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7033         }
7034
7035         kvm_x86_ops->run(vcpu);
7036
7037         /*
7038          * Do this here before restoring debug registers on the host.  And
7039          * since we do this before handling the vmexit, a DR access vmexit
7040          * can (a) read the correct value of the debug registers, (b) set
7041          * KVM_DEBUGREG_WONT_EXIT again.
7042          */
7043         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7044                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7045                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7046                 kvm_update_dr0123(vcpu);
7047                 kvm_update_dr6(vcpu);
7048                 kvm_update_dr7(vcpu);
7049                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7050         }
7051
7052         /*
7053          * If the guest has used debug registers, at least dr7
7054          * will be disabled while returning to the host.
7055          * If we don't have active breakpoints in the host, we don't
7056          * care about the messed up debug address registers. But if
7057          * we have some of them active, restore the old state.
7058          */
7059         if (hw_breakpoint_active())
7060                 hw_breakpoint_restore();
7061
7062         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7063
7064         vcpu->mode = OUTSIDE_GUEST_MODE;
7065         smp_wmb();
7066
7067         kvm_put_guest_xcr0(vcpu);
7068
7069         kvm_x86_ops->handle_external_intr(vcpu);
7070
7071         ++vcpu->stat.exits;
7072
7073         guest_exit_irqoff();
7074
7075         local_irq_enable();
7076         preempt_enable();
7077
7078         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7079
7080         /*
7081          * Profile KVM exit RIPs:
7082          */
7083         if (unlikely(prof_on == KVM_PROFILING)) {
7084                 unsigned long rip = kvm_rip_read(vcpu);
7085                 profile_hit(KVM_PROFILING, (void *)rip);
7086         }
7087
7088         if (unlikely(vcpu->arch.tsc_always_catchup))
7089                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7090
7091         if (vcpu->arch.apic_attention)
7092                 kvm_lapic_sync_from_vapic(vcpu);
7093
7094         vcpu->arch.gpa_available = false;
7095         r = kvm_x86_ops->handle_exit(vcpu);
7096         return r;
7097
7098 cancel_injection:
7099         kvm_x86_ops->cancel_injection(vcpu);
7100         if (unlikely(vcpu->arch.apic_attention))
7101                 kvm_lapic_sync_from_vapic(vcpu);
7102 out:
7103         return r;
7104 }
7105
7106 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7107 {
7108         if (!kvm_arch_vcpu_runnable(vcpu) &&
7109             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7110                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7111                 kvm_vcpu_block(vcpu);
7112                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7113
7114                 if (kvm_x86_ops->post_block)
7115                         kvm_x86_ops->post_block(vcpu);
7116
7117                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7118                         return 1;
7119         }
7120
7121         kvm_apic_accept_events(vcpu);
7122         switch(vcpu->arch.mp_state) {
7123         case KVM_MP_STATE_HALTED:
7124                 vcpu->arch.pv.pv_unhalted = false;
7125                 vcpu->arch.mp_state =
7126                         KVM_MP_STATE_RUNNABLE;
7127         case KVM_MP_STATE_RUNNABLE:
7128                 vcpu->arch.apf.halted = false;
7129                 break;
7130         case KVM_MP_STATE_INIT_RECEIVED:
7131                 break;
7132         default:
7133                 return -EINTR;
7134                 break;
7135         }
7136         return 1;
7137 }
7138
7139 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7140 {
7141         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7142                 kvm_x86_ops->check_nested_events(vcpu, false);
7143
7144         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7145                 !vcpu->arch.apf.halted);
7146 }
7147
7148 static int vcpu_run(struct kvm_vcpu *vcpu)
7149 {
7150         int r;
7151         struct kvm *kvm = vcpu->kvm;
7152
7153         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7154
7155         for (;;) {
7156                 if (kvm_vcpu_running(vcpu)) {
7157                         r = vcpu_enter_guest(vcpu);
7158                 } else {
7159                         r = vcpu_block(kvm, vcpu);
7160                 }
7161
7162                 if (r <= 0)
7163                         break;
7164
7165                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7166                 if (kvm_cpu_has_pending_timer(vcpu))
7167                         kvm_inject_pending_timer_irqs(vcpu);
7168
7169                 if (dm_request_for_irq_injection(vcpu) &&
7170                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7171                         r = 0;
7172                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7173                         ++vcpu->stat.request_irq_exits;
7174                         break;
7175                 }
7176
7177                 kvm_check_async_pf_completion(vcpu);
7178
7179                 if (signal_pending(current)) {
7180                         r = -EINTR;
7181                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7182                         ++vcpu->stat.signal_exits;
7183                         break;
7184                 }
7185                 if (need_resched()) {
7186                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7187                         cond_resched();
7188                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7189                 }
7190         }
7191
7192         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7193
7194         return r;
7195 }
7196
7197 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7198 {
7199         int r;
7200         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7201         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7202         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7203         if (r != EMULATE_DONE)
7204                 return 0;
7205         return 1;
7206 }
7207
7208 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7209 {
7210         BUG_ON(!vcpu->arch.pio.count);
7211
7212         return complete_emulated_io(vcpu);
7213 }
7214
7215 /*
7216  * Implements the following, as a state machine:
7217  *
7218  * read:
7219  *   for each fragment
7220  *     for each mmio piece in the fragment
7221  *       write gpa, len
7222  *       exit
7223  *       copy data
7224  *   execute insn
7225  *
7226  * write:
7227  *   for each fragment
7228  *     for each mmio piece in the fragment
7229  *       write gpa, len
7230  *       copy data
7231  *       exit
7232  */
7233 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7234 {
7235         struct kvm_run *run = vcpu->run;
7236         struct kvm_mmio_fragment *frag;
7237         unsigned len;
7238
7239         BUG_ON(!vcpu->mmio_needed);
7240
7241         /* Complete previous fragment */
7242         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7243         len = min(8u, frag->len);
7244         if (!vcpu->mmio_is_write)
7245                 memcpy(frag->data, run->mmio.data, len);
7246
7247         if (frag->len <= 8) {
7248                 /* Switch to the next fragment. */
7249                 frag++;
7250                 vcpu->mmio_cur_fragment++;
7251         } else {
7252                 /* Go forward to the next mmio piece. */
7253                 frag->data += len;
7254                 frag->gpa += len;
7255                 frag->len -= len;
7256         }
7257
7258         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7259                 vcpu->mmio_needed = 0;
7260
7261                 /* FIXME: return into emulator if single-stepping.  */
7262                 if (vcpu->mmio_is_write)
7263                         return 1;
7264                 vcpu->mmio_read_completed = 1;
7265                 return complete_emulated_io(vcpu);
7266         }
7267
7268         run->exit_reason = KVM_EXIT_MMIO;
7269         run->mmio.phys_addr = frag->gpa;
7270         if (vcpu->mmio_is_write)
7271                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7272         run->mmio.len = min(8u, frag->len);
7273         run->mmio.is_write = vcpu->mmio_is_write;
7274         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7275         return 0;
7276 }
7277
7278
7279 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7280 {
7281         int r;
7282
7283         kvm_sigset_activate(vcpu);
7284
7285         kvm_load_guest_fpu(vcpu);
7286
7287         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7288                 if (kvm_run->immediate_exit) {
7289                         r = -EINTR;
7290                         goto out;
7291                 }
7292                 kvm_vcpu_block(vcpu);
7293                 kvm_apic_accept_events(vcpu);
7294                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7295                 r = -EAGAIN;
7296                 if (signal_pending(current)) {
7297                         r = -EINTR;
7298                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7299                         ++vcpu->stat.signal_exits;
7300                 }
7301                 goto out;
7302         }
7303
7304         /* re-sync apic's tpr */
7305         if (!lapic_in_kernel(vcpu)) {
7306                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7307                         r = -EINVAL;
7308                         goto out;
7309                 }
7310         }
7311
7312         if (unlikely(vcpu->arch.complete_userspace_io)) {
7313                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7314                 vcpu->arch.complete_userspace_io = NULL;
7315                 r = cui(vcpu);
7316                 if (r <= 0)
7317                         goto out;
7318         } else
7319                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7320
7321         if (kvm_run->immediate_exit)
7322                 r = -EINTR;
7323         else
7324                 r = vcpu_run(vcpu);
7325
7326 out:
7327         kvm_put_guest_fpu(vcpu);
7328         post_kvm_run_save(vcpu);
7329         kvm_sigset_deactivate(vcpu);
7330
7331         return r;
7332 }
7333
7334 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7335 {
7336         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7337                 /*
7338                  * We are here if userspace calls get_regs() in the middle of
7339                  * instruction emulation. Registers state needs to be copied
7340                  * back from emulation context to vcpu. Userspace shouldn't do
7341                  * that usually, but some bad designed PV devices (vmware
7342                  * backdoor interface) need this to work
7343                  */
7344                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7345                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7346         }
7347         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7348         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7349         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7350         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7351         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7352         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7353         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7354         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7355 #ifdef CONFIG_X86_64
7356         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7357         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7358         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7359         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7360         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7361         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7362         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7363         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7364 #endif
7365
7366         regs->rip = kvm_rip_read(vcpu);
7367         regs->rflags = kvm_get_rflags(vcpu);
7368
7369         return 0;
7370 }
7371
7372 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7373 {
7374         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7375         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7376
7377         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7378         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7379         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7380         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7381         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7382         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7383         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7384         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7385 #ifdef CONFIG_X86_64
7386         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7387         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7388         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7389         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7390         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7391         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7392         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7393         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7394 #endif
7395
7396         kvm_rip_write(vcpu, regs->rip);
7397         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7398
7399         vcpu->arch.exception.pending = false;
7400
7401         kvm_make_request(KVM_REQ_EVENT, vcpu);
7402
7403         return 0;
7404 }
7405
7406 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7407 {
7408         struct kvm_segment cs;
7409
7410         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7411         *db = cs.db;
7412         *l = cs.l;
7413 }
7414 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7415
7416 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7417                                   struct kvm_sregs *sregs)
7418 {
7419         struct desc_ptr dt;
7420
7421         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7422         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7423         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7424         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7425         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7426         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7427
7428         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7429         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7430
7431         kvm_x86_ops->get_idt(vcpu, &dt);
7432         sregs->idt.limit = dt.size;
7433         sregs->idt.base = dt.address;
7434         kvm_x86_ops->get_gdt(vcpu, &dt);
7435         sregs->gdt.limit = dt.size;
7436         sregs->gdt.base = dt.address;
7437
7438         sregs->cr0 = kvm_read_cr0(vcpu);
7439         sregs->cr2 = vcpu->arch.cr2;
7440         sregs->cr3 = kvm_read_cr3(vcpu);
7441         sregs->cr4 = kvm_read_cr4(vcpu);
7442         sregs->cr8 = kvm_get_cr8(vcpu);
7443         sregs->efer = vcpu->arch.efer;
7444         sregs->apic_base = kvm_get_apic_base(vcpu);
7445
7446         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7447
7448         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7449                 set_bit(vcpu->arch.interrupt.nr,
7450                         (unsigned long *)sregs->interrupt_bitmap);
7451
7452         return 0;
7453 }
7454
7455 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7456                                     struct kvm_mp_state *mp_state)
7457 {
7458         kvm_apic_accept_events(vcpu);
7459         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7460                                         vcpu->arch.pv.pv_unhalted)
7461                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7462         else
7463                 mp_state->mp_state = vcpu->arch.mp_state;
7464
7465         return 0;
7466 }
7467
7468 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7469                                     struct kvm_mp_state *mp_state)
7470 {
7471         if (!lapic_in_kernel(vcpu) &&
7472             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7473                 return -EINVAL;
7474
7475         /* INITs are latched while in SMM */
7476         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7477             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7478              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7479                 return -EINVAL;
7480
7481         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7482                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7483                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7484         } else
7485                 vcpu->arch.mp_state = mp_state->mp_state;
7486         kvm_make_request(KVM_REQ_EVENT, vcpu);
7487         return 0;
7488 }
7489
7490 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7491                     int reason, bool has_error_code, u32 error_code)
7492 {
7493         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7494         int ret;
7495
7496         init_emulate_ctxt(vcpu);
7497
7498         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7499                                    has_error_code, error_code);
7500
7501         if (ret)
7502                 return EMULATE_FAIL;
7503
7504         kvm_rip_write(vcpu, ctxt->eip);
7505         kvm_set_rflags(vcpu, ctxt->eflags);
7506         kvm_make_request(KVM_REQ_EVENT, vcpu);
7507         return EMULATE_DONE;
7508 }
7509 EXPORT_SYMBOL_GPL(kvm_task_switch);
7510
7511 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7512                                   struct kvm_sregs *sregs)
7513 {
7514         struct msr_data apic_base_msr;
7515         int mmu_reset_needed = 0;
7516         int pending_vec, max_bits, idx;
7517         struct desc_ptr dt;
7518
7519         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7520                         (sregs->cr4 & X86_CR4_OSXSAVE))
7521                 return -EINVAL;
7522
7523         apic_base_msr.data = sregs->apic_base;
7524         apic_base_msr.host_initiated = true;
7525         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7526                 return -EINVAL;
7527
7528         dt.size = sregs->idt.limit;
7529         dt.address = sregs->idt.base;
7530         kvm_x86_ops->set_idt(vcpu, &dt);
7531         dt.size = sregs->gdt.limit;
7532         dt.address = sregs->gdt.base;
7533         kvm_x86_ops->set_gdt(vcpu, &dt);
7534
7535         vcpu->arch.cr2 = sregs->cr2;
7536         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7537         vcpu->arch.cr3 = sregs->cr3;
7538         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7539
7540         kvm_set_cr8(vcpu, sregs->cr8);
7541
7542         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7543         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7544
7545         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7546         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7547         vcpu->arch.cr0 = sregs->cr0;
7548
7549         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7550         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7551         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7552                 kvm_update_cpuid(vcpu);
7553
7554         idx = srcu_read_lock(&vcpu->kvm->srcu);
7555         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7556                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7557                 mmu_reset_needed = 1;
7558         }
7559         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7560
7561         if (mmu_reset_needed)
7562                 kvm_mmu_reset_context(vcpu);
7563
7564         max_bits = KVM_NR_INTERRUPTS;
7565         pending_vec = find_first_bit(
7566                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7567         if (pending_vec < max_bits) {
7568                 kvm_queue_interrupt(vcpu, pending_vec, false);
7569                 pr_debug("Set back pending irq %d\n", pending_vec);
7570         }
7571
7572         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7573         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7574         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7575         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7576         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7577         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7578
7579         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7580         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7581
7582         update_cr8_intercept(vcpu);
7583
7584         /* Older userspace won't unhalt the vcpu on reset. */
7585         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7586             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7587             !is_protmode(vcpu))
7588                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7589
7590         kvm_make_request(KVM_REQ_EVENT, vcpu);
7591
7592         return 0;
7593 }
7594
7595 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7596                                         struct kvm_guest_debug *dbg)
7597 {
7598         unsigned long rflags;
7599         int i, r;
7600
7601         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7602                 r = -EBUSY;
7603                 if (vcpu->arch.exception.pending)
7604                         goto out;
7605                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7606                         kvm_queue_exception(vcpu, DB_VECTOR);
7607                 else
7608                         kvm_queue_exception(vcpu, BP_VECTOR);
7609         }
7610
7611         /*
7612          * Read rflags as long as potentially injected trace flags are still
7613          * filtered out.
7614          */
7615         rflags = kvm_get_rflags(vcpu);
7616
7617         vcpu->guest_debug = dbg->control;
7618         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7619                 vcpu->guest_debug = 0;
7620
7621         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7622                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7623                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7624                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7625         } else {
7626                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7627                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7628         }
7629         kvm_update_dr7(vcpu);
7630
7631         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7632                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7633                         get_segment_base(vcpu, VCPU_SREG_CS);
7634
7635         /*
7636          * Trigger an rflags update that will inject or remove the trace
7637          * flags.
7638          */
7639         kvm_set_rflags(vcpu, rflags);
7640
7641         kvm_x86_ops->update_bp_intercept(vcpu);
7642
7643         r = 0;
7644
7645 out:
7646
7647         return r;
7648 }
7649
7650 /*
7651  * Translate a guest virtual address to a guest physical address.
7652  */
7653 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7654                                     struct kvm_translation *tr)
7655 {
7656         unsigned long vaddr = tr->linear_address;
7657         gpa_t gpa;
7658         int idx;
7659
7660         idx = srcu_read_lock(&vcpu->kvm->srcu);
7661         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7662         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7663         tr->physical_address = gpa;
7664         tr->valid = gpa != UNMAPPED_GVA;
7665         tr->writeable = 1;
7666         tr->usermode = 0;
7667
7668         return 0;
7669 }
7670
7671 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7672 {
7673         struct fxregs_state *fxsave =
7674                         &vcpu->arch.guest_fpu.state.fxsave;
7675
7676         memcpy(fpu->fpr, fxsave->st_space, 128);
7677         fpu->fcw = fxsave->cwd;
7678         fpu->fsw = fxsave->swd;
7679         fpu->ftwx = fxsave->twd;
7680         fpu->last_opcode = fxsave->fop;
7681         fpu->last_ip = fxsave->rip;
7682         fpu->last_dp = fxsave->rdp;
7683         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7684
7685         return 0;
7686 }
7687
7688 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7689 {
7690         struct fxregs_state *fxsave =
7691                         &vcpu->arch.guest_fpu.state.fxsave;
7692
7693         memcpy(fxsave->st_space, fpu->fpr, 128);
7694         fxsave->cwd = fpu->fcw;
7695         fxsave->swd = fpu->fsw;
7696         fxsave->twd = fpu->ftwx;
7697         fxsave->fop = fpu->last_opcode;
7698         fxsave->rip = fpu->last_ip;
7699         fxsave->rdp = fpu->last_dp;
7700         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7701
7702         return 0;
7703 }
7704
7705 static void fx_init(struct kvm_vcpu *vcpu)
7706 {
7707         fpstate_init(&vcpu->arch.guest_fpu.state);
7708         if (boot_cpu_has(X86_FEATURE_XSAVES))
7709                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7710                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7711
7712         /*
7713          * Ensure guest xcr0 is valid for loading
7714          */
7715         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7716
7717         vcpu->arch.cr0 |= X86_CR0_ET;
7718 }
7719
7720 /* Swap (qemu) user FPU context for the guest FPU context. */
7721 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7722 {
7723         preempt_disable();
7724         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
7725         /* PKRU is separately restored in kvm_x86_ops->run.  */
7726         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7727                                 ~XFEATURE_MASK_PKRU);
7728         preempt_enable();
7729         trace_kvm_fpu(1);
7730 }
7731
7732 /* When vcpu_run ends, restore user space FPU context. */
7733 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7734 {
7735         preempt_disable();
7736         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7737         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
7738         preempt_enable();
7739         ++vcpu->stat.fpu_reload;
7740         trace_kvm_fpu(0);
7741 }
7742
7743 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7744 {
7745         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7746
7747         kvmclock_reset(vcpu);
7748
7749         kvm_x86_ops->vcpu_free(vcpu);
7750         free_cpumask_var(wbinvd_dirty_mask);
7751 }
7752
7753 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7754                                                 unsigned int id)
7755 {
7756         struct kvm_vcpu *vcpu;
7757
7758         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7759                 printk_once(KERN_WARNING
7760                 "kvm: SMP vm created on host with unstable TSC; "
7761                 "guest TSC will not be reliable\n");
7762
7763         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7764
7765         return vcpu;
7766 }
7767
7768 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7769 {
7770         kvm_vcpu_mtrr_init(vcpu);
7771         vcpu_load(vcpu);
7772         kvm_vcpu_reset(vcpu, false);
7773         kvm_mmu_setup(vcpu);
7774         vcpu_put(vcpu);
7775         return 0;
7776 }
7777
7778 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7779 {
7780         struct msr_data msr;
7781         struct kvm *kvm = vcpu->kvm;
7782
7783         kvm_hv_vcpu_postcreate(vcpu);
7784
7785         if (mutex_lock_killable(&vcpu->mutex))
7786                 return;
7787         vcpu_load(vcpu);
7788         msr.data = 0x0;
7789         msr.index = MSR_IA32_TSC;
7790         msr.host_initiated = true;
7791         kvm_write_tsc(vcpu, &msr);
7792         vcpu_put(vcpu);
7793         mutex_unlock(&vcpu->mutex);
7794
7795         if (!kvmclock_periodic_sync)
7796                 return;
7797
7798         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7799                                         KVMCLOCK_SYNC_PERIOD);
7800 }
7801
7802 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7803 {
7804         vcpu->arch.apf.msr_val = 0;
7805
7806         vcpu_load(vcpu);
7807         kvm_mmu_unload(vcpu);
7808         vcpu_put(vcpu);
7809
7810         kvm_x86_ops->vcpu_free(vcpu);
7811 }
7812
7813 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7814 {
7815         vcpu->arch.hflags = 0;
7816
7817         vcpu->arch.smi_pending = 0;
7818         vcpu->arch.smi_count = 0;
7819         atomic_set(&vcpu->arch.nmi_queued, 0);
7820         vcpu->arch.nmi_pending = 0;
7821         vcpu->arch.nmi_injected = false;
7822         kvm_clear_interrupt_queue(vcpu);
7823         kvm_clear_exception_queue(vcpu);
7824         vcpu->arch.exception.pending = false;
7825
7826         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7827         kvm_update_dr0123(vcpu);
7828         vcpu->arch.dr6 = DR6_INIT;
7829         kvm_update_dr6(vcpu);
7830         vcpu->arch.dr7 = DR7_FIXED_1;
7831         kvm_update_dr7(vcpu);
7832
7833         vcpu->arch.cr2 = 0;
7834
7835         kvm_make_request(KVM_REQ_EVENT, vcpu);
7836         vcpu->arch.apf.msr_val = 0;
7837         vcpu->arch.st.msr_val = 0;
7838
7839         kvmclock_reset(vcpu);
7840
7841         kvm_clear_async_pf_completion_queue(vcpu);
7842         kvm_async_pf_hash_reset(vcpu);
7843         vcpu->arch.apf.halted = false;
7844
7845         if (kvm_mpx_supported()) {
7846                 void *mpx_state_buffer;
7847
7848                 /*
7849                  * To avoid have the INIT path from kvm_apic_has_events() that be
7850                  * called with loaded FPU and does not let userspace fix the state.
7851                  */
7852                 if (init_event)
7853                         kvm_put_guest_fpu(vcpu);
7854                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
7855                                         XFEATURE_MASK_BNDREGS);
7856                 if (mpx_state_buffer)
7857                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
7858                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
7859                                         XFEATURE_MASK_BNDCSR);
7860                 if (mpx_state_buffer)
7861                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
7862                 if (init_event)
7863                         kvm_load_guest_fpu(vcpu);
7864         }
7865
7866         if (!init_event) {
7867                 kvm_pmu_reset(vcpu);
7868                 vcpu->arch.smbase = 0x30000;
7869
7870                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7871                 vcpu->arch.msr_misc_features_enables = 0;
7872
7873                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7874         }
7875
7876         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7877         vcpu->arch.regs_avail = ~0;
7878         vcpu->arch.regs_dirty = ~0;
7879
7880         vcpu->arch.ia32_xss = 0;
7881
7882         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7883 }
7884
7885 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7886 {
7887         struct kvm_segment cs;
7888
7889         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7890         cs.selector = vector << 8;
7891         cs.base = vector << 12;
7892         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7893         kvm_rip_write(vcpu, 0);
7894 }
7895
7896 int kvm_arch_hardware_enable(void)
7897 {
7898         struct kvm *kvm;
7899         struct kvm_vcpu *vcpu;
7900         int i;
7901         int ret;
7902         u64 local_tsc;
7903         u64 max_tsc = 0;
7904         bool stable, backwards_tsc = false;
7905
7906         kvm_shared_msr_cpu_online();
7907         ret = kvm_x86_ops->hardware_enable();
7908         if (ret != 0)
7909                 return ret;
7910
7911         local_tsc = rdtsc();
7912         stable = !check_tsc_unstable();
7913         list_for_each_entry(kvm, &vm_list, vm_list) {
7914                 kvm_for_each_vcpu(i, vcpu, kvm) {
7915                         if (!stable && vcpu->cpu == smp_processor_id())
7916                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7917                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7918                                 backwards_tsc = true;
7919                                 if (vcpu->arch.last_host_tsc > max_tsc)
7920                                         max_tsc = vcpu->arch.last_host_tsc;
7921                         }
7922                 }
7923         }
7924
7925         /*
7926          * Sometimes, even reliable TSCs go backwards.  This happens on
7927          * platforms that reset TSC during suspend or hibernate actions, but
7928          * maintain synchronization.  We must compensate.  Fortunately, we can
7929          * detect that condition here, which happens early in CPU bringup,
7930          * before any KVM threads can be running.  Unfortunately, we can't
7931          * bring the TSCs fully up to date with real time, as we aren't yet far
7932          * enough into CPU bringup that we know how much real time has actually
7933          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7934          * variables that haven't been updated yet.
7935          *
7936          * So we simply find the maximum observed TSC above, then record the
7937          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7938          * the adjustment will be applied.  Note that we accumulate
7939          * adjustments, in case multiple suspend cycles happen before some VCPU
7940          * gets a chance to run again.  In the event that no KVM threads get a
7941          * chance to run, we will miss the entire elapsed period, as we'll have
7942          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7943          * loose cycle time.  This isn't too big a deal, since the loss will be
7944          * uniform across all VCPUs (not to mention the scenario is extremely
7945          * unlikely). It is possible that a second hibernate recovery happens
7946          * much faster than a first, causing the observed TSC here to be
7947          * smaller; this would require additional padding adjustment, which is
7948          * why we set last_host_tsc to the local tsc observed here.
7949          *
7950          * N.B. - this code below runs only on platforms with reliable TSC,
7951          * as that is the only way backwards_tsc is set above.  Also note
7952          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7953          * have the same delta_cyc adjustment applied if backwards_tsc
7954          * is detected.  Note further, this adjustment is only done once,
7955          * as we reset last_host_tsc on all VCPUs to stop this from being
7956          * called multiple times (one for each physical CPU bringup).
7957          *
7958          * Platforms with unreliable TSCs don't have to deal with this, they
7959          * will be compensated by the logic in vcpu_load, which sets the TSC to
7960          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7961          * guarantee that they stay in perfect synchronization.
7962          */
7963         if (backwards_tsc) {
7964                 u64 delta_cyc = max_tsc - local_tsc;
7965                 list_for_each_entry(kvm, &vm_list, vm_list) {
7966                         kvm->arch.backwards_tsc_observed = true;
7967                         kvm_for_each_vcpu(i, vcpu, kvm) {
7968                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7969                                 vcpu->arch.last_host_tsc = local_tsc;
7970                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7971                         }
7972
7973                         /*
7974                          * We have to disable TSC offset matching.. if you were
7975                          * booting a VM while issuing an S4 host suspend....
7976                          * you may have some problem.  Solving this issue is
7977                          * left as an exercise to the reader.
7978                          */
7979                         kvm->arch.last_tsc_nsec = 0;
7980                         kvm->arch.last_tsc_write = 0;
7981                 }
7982
7983         }
7984         return 0;
7985 }
7986
7987 void kvm_arch_hardware_disable(void)
7988 {
7989         kvm_x86_ops->hardware_disable();
7990         drop_user_return_notifiers();
7991 }
7992
7993 int kvm_arch_hardware_setup(void)
7994 {
7995         int r;
7996
7997         r = kvm_x86_ops->hardware_setup();
7998         if (r != 0)
7999                 return r;
8000
8001         if (kvm_has_tsc_control) {
8002                 /*
8003                  * Make sure the user can only configure tsc_khz values that
8004                  * fit into a signed integer.
8005                  * A min value is not calculated needed because it will always
8006                  * be 1 on all machines.
8007                  */
8008                 u64 max = min(0x7fffffffULL,
8009                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8010                 kvm_max_guest_tsc_khz = max;
8011
8012                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8013         }
8014
8015         kvm_init_msr_list();
8016         return 0;
8017 }
8018
8019 void kvm_arch_hardware_unsetup(void)
8020 {
8021         kvm_x86_ops->hardware_unsetup();
8022 }
8023
8024 void kvm_arch_check_processor_compat(void *rtn)
8025 {
8026         kvm_x86_ops->check_processor_compatibility(rtn);
8027 }
8028
8029 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8030 {
8031         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8032 }
8033 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8034
8035 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8036 {
8037         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8038 }
8039
8040 struct static_key kvm_no_apic_vcpu __read_mostly;
8041 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8042
8043 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8044 {
8045         struct page *page;
8046         int r;
8047
8048         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8049         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8050         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8051                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8052         else
8053                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8054
8055         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8056         if (!page) {
8057                 r = -ENOMEM;
8058                 goto fail;
8059         }
8060         vcpu->arch.pio_data = page_address(page);
8061
8062         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8063
8064         r = kvm_mmu_create(vcpu);
8065         if (r < 0)
8066                 goto fail_free_pio_data;
8067
8068         if (irqchip_in_kernel(vcpu->kvm)) {
8069                 r = kvm_create_lapic(vcpu);
8070                 if (r < 0)
8071                         goto fail_mmu_destroy;
8072         } else
8073                 static_key_slow_inc(&kvm_no_apic_vcpu);
8074
8075         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8076                                        GFP_KERNEL);
8077         if (!vcpu->arch.mce_banks) {
8078                 r = -ENOMEM;
8079                 goto fail_free_lapic;
8080         }
8081         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8082
8083         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8084                 r = -ENOMEM;
8085                 goto fail_free_mce_banks;
8086         }
8087
8088         fx_init(vcpu);
8089
8090         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8091
8092         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8093
8094         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8095
8096         kvm_async_pf_hash_reset(vcpu);
8097         kvm_pmu_init(vcpu);
8098
8099         vcpu->arch.pending_external_vector = -1;
8100         vcpu->arch.preempted_in_kernel = false;
8101
8102         kvm_hv_vcpu_init(vcpu);
8103
8104         return 0;
8105
8106 fail_free_mce_banks:
8107         kfree(vcpu->arch.mce_banks);
8108 fail_free_lapic:
8109         kvm_free_lapic(vcpu);
8110 fail_mmu_destroy:
8111         kvm_mmu_destroy(vcpu);
8112 fail_free_pio_data:
8113         free_page((unsigned long)vcpu->arch.pio_data);
8114 fail:
8115         return r;
8116 }
8117
8118 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8119 {
8120         int idx;
8121
8122         kvm_hv_vcpu_uninit(vcpu);
8123         kvm_pmu_destroy(vcpu);
8124         kfree(vcpu->arch.mce_banks);
8125         kvm_free_lapic(vcpu);
8126         idx = srcu_read_lock(&vcpu->kvm->srcu);
8127         kvm_mmu_destroy(vcpu);
8128         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8129         free_page((unsigned long)vcpu->arch.pio_data);
8130         if (!lapic_in_kernel(vcpu))
8131                 static_key_slow_dec(&kvm_no_apic_vcpu);
8132 }
8133
8134 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8135 {
8136         kvm_x86_ops->sched_in(vcpu, cpu);
8137 }
8138
8139 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8140 {
8141         if (type)
8142                 return -EINVAL;
8143
8144         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8145         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8146         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8147         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8148         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8149
8150         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8151         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8152         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8153         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8154                 &kvm->arch.irq_sources_bitmap);
8155
8156         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8157         mutex_init(&kvm->arch.apic_map_lock);
8158         mutex_init(&kvm->arch.hyperv.hv_lock);
8159         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8160
8161         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8162         pvclock_update_vm_gtod_copy(kvm);
8163
8164         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8165         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8166
8167         kvm_page_track_init(kvm);
8168         kvm_mmu_init_vm(kvm);
8169
8170         if (kvm_x86_ops->vm_init)
8171                 return kvm_x86_ops->vm_init(kvm);
8172
8173         return 0;
8174 }
8175
8176 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8177 {
8178         vcpu_load(vcpu);
8179         kvm_mmu_unload(vcpu);
8180         vcpu_put(vcpu);
8181 }
8182
8183 static void kvm_free_vcpus(struct kvm *kvm)
8184 {
8185         unsigned int i;
8186         struct kvm_vcpu *vcpu;
8187
8188         /*
8189          * Unpin any mmu pages first.
8190          */
8191         kvm_for_each_vcpu(i, vcpu, kvm) {
8192                 kvm_clear_async_pf_completion_queue(vcpu);
8193                 kvm_unload_vcpu_mmu(vcpu);
8194         }
8195         kvm_for_each_vcpu(i, vcpu, kvm)
8196                 kvm_arch_vcpu_free(vcpu);
8197
8198         mutex_lock(&kvm->lock);
8199         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8200                 kvm->vcpus[i] = NULL;
8201
8202         atomic_set(&kvm->online_vcpus, 0);
8203         mutex_unlock(&kvm->lock);
8204 }
8205
8206 void kvm_arch_sync_events(struct kvm *kvm)
8207 {
8208         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8209         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8210         kvm_free_pit(kvm);
8211 }
8212
8213 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8214 {
8215         int i, r;
8216         unsigned long hva;
8217         struct kvm_memslots *slots = kvm_memslots(kvm);
8218         struct kvm_memory_slot *slot, old;
8219
8220         /* Called with kvm->slots_lock held.  */
8221         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8222                 return -EINVAL;
8223
8224         slot = id_to_memslot(slots, id);
8225         if (size) {
8226                 if (slot->npages)
8227                         return -EEXIST;
8228
8229                 /*
8230                  * MAP_SHARED to prevent internal slot pages from being moved
8231                  * by fork()/COW.
8232                  */
8233                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8234                               MAP_SHARED | MAP_ANONYMOUS, 0);
8235                 if (IS_ERR((void *)hva))
8236                         return PTR_ERR((void *)hva);
8237         } else {
8238                 if (!slot->npages)
8239                         return 0;
8240
8241                 hva = 0;
8242         }
8243
8244         old = *slot;
8245         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8246                 struct kvm_userspace_memory_region m;
8247
8248                 m.slot = id | (i << 16);
8249                 m.flags = 0;
8250                 m.guest_phys_addr = gpa;
8251                 m.userspace_addr = hva;
8252                 m.memory_size = size;
8253                 r = __kvm_set_memory_region(kvm, &m);
8254                 if (r < 0)
8255                         return r;
8256         }
8257
8258         if (!size) {
8259                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8260                 WARN_ON(r < 0);
8261         }
8262
8263         return 0;
8264 }
8265 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8266
8267 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8268 {
8269         int r;
8270
8271         mutex_lock(&kvm->slots_lock);
8272         r = __x86_set_memory_region(kvm, id, gpa, size);
8273         mutex_unlock(&kvm->slots_lock);
8274
8275         return r;
8276 }
8277 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8278
8279 void kvm_arch_destroy_vm(struct kvm *kvm)
8280 {
8281         if (current->mm == kvm->mm) {
8282                 /*
8283                  * Free memory regions allocated on behalf of userspace,
8284                  * unless the the memory map has changed due to process exit
8285                  * or fd copying.
8286                  */
8287                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8288                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8289                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8290         }
8291         if (kvm_x86_ops->vm_destroy)
8292                 kvm_x86_ops->vm_destroy(kvm);
8293         kvm_pic_destroy(kvm);
8294         kvm_ioapic_destroy(kvm);
8295         kvm_free_vcpus(kvm);
8296         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8297         kvm_mmu_uninit_vm(kvm);
8298         kvm_page_track_cleanup(kvm);
8299 }
8300
8301 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8302                            struct kvm_memory_slot *dont)
8303 {
8304         int i;
8305
8306         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8307                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8308                         kvfree(free->arch.rmap[i]);
8309                         free->arch.rmap[i] = NULL;
8310                 }
8311                 if (i == 0)
8312                         continue;
8313
8314                 if (!dont || free->arch.lpage_info[i - 1] !=
8315                              dont->arch.lpage_info[i - 1]) {
8316                         kvfree(free->arch.lpage_info[i - 1]);
8317                         free->arch.lpage_info[i - 1] = NULL;
8318                 }
8319         }
8320
8321         kvm_page_track_free_memslot(free, dont);
8322 }
8323
8324 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8325                             unsigned long npages)
8326 {
8327         int i;
8328
8329         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8330                 struct kvm_lpage_info *linfo;
8331                 unsigned long ugfn;
8332                 int lpages;
8333                 int level = i + 1;
8334
8335                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8336                                       slot->base_gfn, level) + 1;
8337
8338                 slot->arch.rmap[i] =
8339                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8340                 if (!slot->arch.rmap[i])
8341                         goto out_free;
8342                 if (i == 0)
8343                         continue;
8344
8345                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8346                 if (!linfo)
8347                         goto out_free;
8348
8349                 slot->arch.lpage_info[i - 1] = linfo;
8350
8351                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8352                         linfo[0].disallow_lpage = 1;
8353                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8354                         linfo[lpages - 1].disallow_lpage = 1;
8355                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8356                 /*
8357                  * If the gfn and userspace address are not aligned wrt each
8358                  * other, or if explicitly asked to, disable large page
8359                  * support for this slot
8360                  */
8361                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8362                     !kvm_largepages_enabled()) {
8363                         unsigned long j;
8364
8365                         for (j = 0; j < lpages; ++j)
8366                                 linfo[j].disallow_lpage = 1;
8367                 }
8368         }
8369
8370         if (kvm_page_track_create_memslot(slot, npages))
8371                 goto out_free;
8372
8373         return 0;
8374
8375 out_free:
8376         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8377                 kvfree(slot->arch.rmap[i]);
8378                 slot->arch.rmap[i] = NULL;
8379                 if (i == 0)
8380                         continue;
8381
8382                 kvfree(slot->arch.lpage_info[i - 1]);
8383                 slot->arch.lpage_info[i - 1] = NULL;
8384         }
8385         return -ENOMEM;
8386 }
8387
8388 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8389 {
8390         /*
8391          * memslots->generation has been incremented.
8392          * mmio generation may have reached its maximum value.
8393          */
8394         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8395 }
8396
8397 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8398                                 struct kvm_memory_slot *memslot,
8399                                 const struct kvm_userspace_memory_region *mem,
8400                                 enum kvm_mr_change change)
8401 {
8402         return 0;
8403 }
8404
8405 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8406                                      struct kvm_memory_slot *new)
8407 {
8408         /* Still write protect RO slot */
8409         if (new->flags & KVM_MEM_READONLY) {
8410                 kvm_mmu_slot_remove_write_access(kvm, new);
8411                 return;
8412         }
8413
8414         /*
8415          * Call kvm_x86_ops dirty logging hooks when they are valid.
8416          *
8417          * kvm_x86_ops->slot_disable_log_dirty is called when:
8418          *
8419          *  - KVM_MR_CREATE with dirty logging is disabled
8420          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8421          *
8422          * The reason is, in case of PML, we need to set D-bit for any slots
8423          * with dirty logging disabled in order to eliminate unnecessary GPA
8424          * logging in PML buffer (and potential PML buffer full VMEXT). This
8425          * guarantees leaving PML enabled during guest's lifetime won't have
8426          * any additonal overhead from PML when guest is running with dirty
8427          * logging disabled for memory slots.
8428          *
8429          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8430          * to dirty logging mode.
8431          *
8432          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8433          *
8434          * In case of write protect:
8435          *
8436          * Write protect all pages for dirty logging.
8437          *
8438          * All the sptes including the large sptes which point to this
8439          * slot are set to readonly. We can not create any new large
8440          * spte on this slot until the end of the logging.
8441          *
8442          * See the comments in fast_page_fault().
8443          */
8444         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8445                 if (kvm_x86_ops->slot_enable_log_dirty)
8446                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8447                 else
8448                         kvm_mmu_slot_remove_write_access(kvm, new);
8449         } else {
8450                 if (kvm_x86_ops->slot_disable_log_dirty)
8451                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8452         }
8453 }
8454
8455 void kvm_arch_commit_memory_region(struct kvm *kvm,
8456                                 const struct kvm_userspace_memory_region *mem,
8457                                 const struct kvm_memory_slot *old,
8458                                 const struct kvm_memory_slot *new,
8459                                 enum kvm_mr_change change)
8460 {
8461         int nr_mmu_pages = 0;
8462
8463         if (!kvm->arch.n_requested_mmu_pages)
8464                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8465
8466         if (nr_mmu_pages)
8467                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8468
8469         /*
8470          * Dirty logging tracks sptes in 4k granularity, meaning that large
8471          * sptes have to be split.  If live migration is successful, the guest
8472          * in the source machine will be destroyed and large sptes will be
8473          * created in the destination. However, if the guest continues to run
8474          * in the source machine (for example if live migration fails), small
8475          * sptes will remain around and cause bad performance.
8476          *
8477          * Scan sptes if dirty logging has been stopped, dropping those
8478          * which can be collapsed into a single large-page spte.  Later
8479          * page faults will create the large-page sptes.
8480          */
8481         if ((change != KVM_MR_DELETE) &&
8482                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8483                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8484                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8485
8486         /*
8487          * Set up write protection and/or dirty logging for the new slot.
8488          *
8489          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8490          * been zapped so no dirty logging staff is needed for old slot. For
8491          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8492          * new and it's also covered when dealing with the new slot.
8493          *
8494          * FIXME: const-ify all uses of struct kvm_memory_slot.
8495          */
8496         if (change != KVM_MR_DELETE)
8497                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8498 }
8499
8500 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8501 {
8502         kvm_mmu_invalidate_zap_all_pages(kvm);
8503 }
8504
8505 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8506                                    struct kvm_memory_slot *slot)
8507 {
8508         kvm_page_track_flush_slot(kvm, slot);
8509 }
8510
8511 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8512 {
8513         if (!list_empty_careful(&vcpu->async_pf.done))
8514                 return true;
8515
8516         if (kvm_apic_has_events(vcpu))
8517                 return true;
8518
8519         if (vcpu->arch.pv.pv_unhalted)
8520                 return true;
8521
8522         if (vcpu->arch.exception.pending)
8523                 return true;
8524
8525         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8526             (vcpu->arch.nmi_pending &&
8527              kvm_x86_ops->nmi_allowed(vcpu)))
8528                 return true;
8529
8530         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8531             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8532                 return true;
8533
8534         if (kvm_arch_interrupt_allowed(vcpu) &&
8535             kvm_cpu_has_interrupt(vcpu))
8536                 return true;
8537
8538         if (kvm_hv_has_stimer_pending(vcpu))
8539                 return true;
8540
8541         return false;
8542 }
8543
8544 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8545 {
8546         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8547 }
8548
8549 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8550 {
8551         return vcpu->arch.preempted_in_kernel;
8552 }
8553
8554 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8555 {
8556         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8557 }
8558
8559 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8560 {
8561         return kvm_x86_ops->interrupt_allowed(vcpu);
8562 }
8563
8564 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8565 {
8566         if (is_64_bit_mode(vcpu))
8567                 return kvm_rip_read(vcpu);
8568         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8569                      kvm_rip_read(vcpu));
8570 }
8571 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8572
8573 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8574 {
8575         return kvm_get_linear_rip(vcpu) == linear_rip;
8576 }
8577 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8578
8579 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8580 {
8581         unsigned long rflags;
8582
8583         rflags = kvm_x86_ops->get_rflags(vcpu);
8584         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8585                 rflags &= ~X86_EFLAGS_TF;
8586         return rflags;
8587 }
8588 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8589
8590 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8591 {
8592         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8593             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8594                 rflags |= X86_EFLAGS_TF;
8595         kvm_x86_ops->set_rflags(vcpu, rflags);
8596 }
8597
8598 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8599 {
8600         __kvm_set_rflags(vcpu, rflags);
8601         kvm_make_request(KVM_REQ_EVENT, vcpu);
8602 }
8603 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8604
8605 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8606 {
8607         int r;
8608
8609         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8610               work->wakeup_all)
8611                 return;
8612
8613         r = kvm_mmu_reload(vcpu);
8614         if (unlikely(r))
8615                 return;
8616
8617         if (!vcpu->arch.mmu.direct_map &&
8618               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8619                 return;
8620
8621         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8622 }
8623
8624 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8625 {
8626         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8627 }
8628
8629 static inline u32 kvm_async_pf_next_probe(u32 key)
8630 {
8631         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8632 }
8633
8634 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8635 {
8636         u32 key = kvm_async_pf_hash_fn(gfn);
8637
8638         while (vcpu->arch.apf.gfns[key] != ~0)
8639                 key = kvm_async_pf_next_probe(key);
8640
8641         vcpu->arch.apf.gfns[key] = gfn;
8642 }
8643
8644 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8645 {
8646         int i;
8647         u32 key = kvm_async_pf_hash_fn(gfn);
8648
8649         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8650                      (vcpu->arch.apf.gfns[key] != gfn &&
8651                       vcpu->arch.apf.gfns[key] != ~0); i++)
8652                 key = kvm_async_pf_next_probe(key);
8653
8654         return key;
8655 }
8656
8657 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8658 {
8659         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8660 }
8661
8662 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8663 {
8664         u32 i, j, k;
8665
8666         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8667         while (true) {
8668                 vcpu->arch.apf.gfns[i] = ~0;
8669                 do {
8670                         j = kvm_async_pf_next_probe(j);
8671                         if (vcpu->arch.apf.gfns[j] == ~0)
8672                                 return;
8673                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8674                         /*
8675                          * k lies cyclically in ]i,j]
8676                          * |    i.k.j |
8677                          * |....j i.k.| or  |.k..j i...|
8678                          */
8679                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8680                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8681                 i = j;
8682         }
8683 }
8684
8685 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8686 {
8687
8688         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8689                                       sizeof(val));
8690 }
8691
8692 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
8693 {
8694
8695         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
8696                                       sizeof(u32));
8697 }
8698
8699 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8700                                      struct kvm_async_pf *work)
8701 {
8702         struct x86_exception fault;
8703
8704         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8705         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8706
8707         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8708             (vcpu->arch.apf.send_user_only &&
8709              kvm_x86_ops->get_cpl(vcpu) == 0))
8710                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8711         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8712                 fault.vector = PF_VECTOR;
8713                 fault.error_code_valid = true;
8714                 fault.error_code = 0;
8715                 fault.nested_page_fault = false;
8716                 fault.address = work->arch.token;
8717                 fault.async_page_fault = true;
8718                 kvm_inject_page_fault(vcpu, &fault);
8719         }
8720 }
8721
8722 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8723                                  struct kvm_async_pf *work)
8724 {
8725         struct x86_exception fault;
8726         u32 val;
8727
8728         if (work->wakeup_all)
8729                 work->arch.token = ~0; /* broadcast wakeup */
8730         else
8731                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8732         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8733
8734         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
8735             !apf_get_user(vcpu, &val)) {
8736                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
8737                     vcpu->arch.exception.pending &&
8738                     vcpu->arch.exception.nr == PF_VECTOR &&
8739                     !apf_put_user(vcpu, 0)) {
8740                         vcpu->arch.exception.injected = false;
8741                         vcpu->arch.exception.pending = false;
8742                         vcpu->arch.exception.nr = 0;
8743                         vcpu->arch.exception.has_error_code = false;
8744                         vcpu->arch.exception.error_code = 0;
8745                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8746                         fault.vector = PF_VECTOR;
8747                         fault.error_code_valid = true;
8748                         fault.error_code = 0;
8749                         fault.nested_page_fault = false;
8750                         fault.address = work->arch.token;
8751                         fault.async_page_fault = true;
8752                         kvm_inject_page_fault(vcpu, &fault);
8753                 }
8754         }
8755         vcpu->arch.apf.halted = false;
8756         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8757 }
8758
8759 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8760 {
8761         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8762                 return true;
8763         else
8764                 return kvm_can_do_async_pf(vcpu);
8765 }
8766
8767 void kvm_arch_start_assignment(struct kvm *kvm)
8768 {
8769         atomic_inc(&kvm->arch.assigned_device_count);
8770 }
8771 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8772
8773 void kvm_arch_end_assignment(struct kvm *kvm)
8774 {
8775         atomic_dec(&kvm->arch.assigned_device_count);
8776 }
8777 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8778
8779 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8780 {
8781         return atomic_read(&kvm->arch.assigned_device_count);
8782 }
8783 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8784
8785 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8786 {
8787         atomic_inc(&kvm->arch.noncoherent_dma_count);
8788 }
8789 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8790
8791 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8792 {
8793         atomic_dec(&kvm->arch.noncoherent_dma_count);
8794 }
8795 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8796
8797 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8798 {
8799         return atomic_read(&kvm->arch.noncoherent_dma_count);
8800 }
8801 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8802
8803 bool kvm_arch_has_irq_bypass(void)
8804 {
8805         return kvm_x86_ops->update_pi_irte != NULL;
8806 }
8807
8808 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8809                                       struct irq_bypass_producer *prod)
8810 {
8811         struct kvm_kernel_irqfd *irqfd =
8812                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8813
8814         irqfd->producer = prod;
8815
8816         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8817                                            prod->irq, irqfd->gsi, 1);
8818 }
8819
8820 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8821                                       struct irq_bypass_producer *prod)
8822 {
8823         int ret;
8824         struct kvm_kernel_irqfd *irqfd =
8825                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8826
8827         WARN_ON(irqfd->producer != prod);
8828         irqfd->producer = NULL;
8829
8830         /*
8831          * When producer of consumer is unregistered, we change back to
8832          * remapped mode, so we can re-use the current implementation
8833          * when the irq is masked/disabled or the consumer side (KVM
8834          * int this case doesn't want to receive the interrupts.
8835         */
8836         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8837         if (ret)
8838                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8839                        " fails: %d\n", irqfd->consumer.token, ret);
8840 }
8841
8842 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8843                                    uint32_t guest_irq, bool set)
8844 {
8845         if (!kvm_x86_ops->update_pi_irte)
8846                 return -EINVAL;
8847
8848         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8849 }
8850
8851 bool kvm_vector_hashing_enabled(void)
8852 {
8853         return vector_hashing;
8854 }
8855 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8856
8857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);