arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 100 static u32 tsc_tolerance_ppm = 250;
 101 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 558                 return 1;
 559         if (!(xcr0 & XSTATE_FP))
 560                 return 1;
 561         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 562                 return 1;
 563         if (xcr0 & ~host_xcr0)
 564                 return 1;
 565         vcpu->arch.xcr0 = xcr0;
 566         vcpu->guest_xcr0_loaded = 0;
 567         return 0;
 568 }
 569
 570 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 571 {
 572         if (__kvm_set_xcr(vcpu, index, xcr)) {
 573                 kvm_inject_gp(vcpu, 0);
 574                 return 1;
 575         }
 576         return 0;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 579
 580 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 581 {
 582         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 583         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 584                                    X86_CR4_PAE | X86_CR4_SMEP;
 585         if (cr4 & CR4_RESERVED_BITS)
 586                 return 1;
 587
 588         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 589                 return 1;
 590
 591         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 592                 return 1;
 593
 594         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 595                 return 1;
 596
 597         if (is_long_mode(vcpu)) {
 598                 if (!(cr4 & X86_CR4_PAE))
 599                         return 1;
 600         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 601                    && ((cr4 ^ old_cr4) & pdptr_bits)
 602                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 603                                    kvm_read_cr3(vcpu)))
 604                 return 1;
 605
 606         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 607                 return 1;
 608
 609         if ((cr4 ^ old_cr4) & pdptr_bits)
 610                 kvm_mmu_reset_context(vcpu);
 611
 612         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 613                 kvm_update_cpuid(vcpu);
 614
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 618
 619 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 620 {
 621         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 622                 kvm_mmu_sync_roots(vcpu);
 623                 kvm_mmu_flush_tlb(vcpu);
 624                 return 0;
 625         }
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 629                         return 1;
 630         } else {
 631                 if (is_pae(vcpu)) {
 632                         if (cr3 & CR3_PAE_RESERVED_BITS)
 633                                 return 1;
 634                         if (is_paging(vcpu) &&
 635                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 636                                 return 1;
 637                 }
 638                 /*
 639                  * We don't check reserved bits in nonpae mode, because
 640                  * this isn't enforced, and VMware depends on this.
 641                  */
 642         }
 643
 644         /*
 645          * Does the new cr3 value map to physical memory? (Note, we
 646          * catch an invalid cr3 even in real-mode, because it would
 647          * cause trouble later on when we turn on paging anyway.)
 648          *
 649          * A real CPU would silently accept an invalid cr3 and would
 650          * attempt to use it - with largely undefined (and often hard
 651          * to debug) behavior on the guest side.
 652          */
 653         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 654                 return 1;
 655         vcpu->arch.cr3 = cr3;
 656         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 657         vcpu->arch.mmu.new_cr3(vcpu);
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 661
 662 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 663 {
 664         if (cr8 & CR8_RESERVED_BITS)
 665                 return 1;
 666         if (irqchip_in_kernel(vcpu->kvm))
 667                 kvm_lapic_set_tpr(vcpu, cr8);
 668         else
 669                 vcpu->arch.cr8 = cr8;
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 673
 674 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 675 {
 676         if (irqchip_in_kernel(vcpu->kvm))
 677                 return kvm_lapic_get_cr8(vcpu);
 678         else
 679                 return vcpu->arch.cr8;
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 682
 683 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 684 {
 685         switch (dr) {
 686         case 0 ... 3:
 687                 vcpu->arch.db[dr] = val;
 688                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 689                         vcpu->arch.eff_db[dr] = val;
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1; /* #UD */
 694                 /* fall through */
 695         case 6:
 696                 if (val & 0xffffffff00000000ULL)
 697                         return -1; /* #GP */
 698                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 699                 break;
 700         case 5:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         default: /* 7 */
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 708                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 709                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 710                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 711                 }
 712                 break;
 713         }
 714
 715         return 0;
 716 }
 717
 718 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         int res;
 721
 722         res = __kvm_set_dr(vcpu, dr, val);
 723         if (res > 0)
 724                 kvm_queue_exception(vcpu, UD_VECTOR);
 725         else if (res < 0)
 726                 kvm_inject_gp(vcpu, 0);
 727
 728         return res;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_dr);
 731
 732 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 *val = vcpu->arch.db[dr];
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1;
 741                 /* fall through */
 742         case 6:
 743                 *val = vcpu->arch.dr6;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         default: /* 7 */
 750                 *val = vcpu->arch.dr7;
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         if (_kvm_get_dr(vcpu, dr, val)) {
 760                 kvm_queue_exception(vcpu, UD_VECTOR);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_get_dr);
 766
 767 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 768 {
 769         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 770         u64 data;
 771         int err;
 772
 773         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 774         if (err)
 775                 return err;
 776         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 777         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 778         return err;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 781
 782 /*
 783  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 784  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 785  *
 786  * This list is modified at module load time to reflect the
 787  * capabilities of the host cpu. This capabilities test skips MSRs that are
 788  * kvm-specific. Those are put in the beginning of the list.
 789  */
 790
 791 #define KVM_SAVE_MSRS_BEGIN     9
 792 static u32 msrs_to_save[] = {
 793         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 794         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 795         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 796         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 797         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 798         MSR_STAR,
 799 #ifdef CONFIG_X86_64
 800         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 801 #endif
 802         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 803 };
 804
 805 static unsigned num_msrs_to_save;
 806
 807 static u32 emulated_msrs[] = {
 808         MSR_IA32_TSCDEADLINE,
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 976 {
 977         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 978                                    vcpu->arch.virtual_tsc_shift);
 979 }
 980
 981 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
 982 {
 983         u64 v = (u64)khz * (1000000 + ppm);
 984         do_div(v, 1000000);
 985         return v;
 986 }
 987
 988 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 989 {
 990         u32 thresh_lo, thresh_hi;
 991         int use_scaling = 0;
 992
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &vcpu->arch.virtual_tsc_shift,
 996                            &vcpu->arch.virtual_tsc_mult);
 997         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
 998
 999         /*
1000          * Compute the variation in TSC rate which is acceptable
1001          * within the range of tolerance and decide if the
1002          * rate being applied is within that bounds of the hardware
1003          * rate.  If so, no scaling or compensation need be done.
1004          */
1005         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1006         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1007         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1008                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1009                 use_scaling = 1;
1010         }
1011         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1012 }
1013
1014 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1015 {
1016         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1017                                       vcpu->arch.virtual_tsc_mult,
1018                                       vcpu->arch.virtual_tsc_shift);
1019         tsc += vcpu->arch.last_tsc_write;
1020         return tsc;
1021 }
1022
1023 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025         struct kvm *kvm = vcpu->kvm;
1026         u64 offset, ns, elapsed;
1027         unsigned long flags;
1028         s64 nsdiff;
1029
1030         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1031         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1032         ns = get_kernel_ns();
1033         elapsed = ns - kvm->arch.last_tsc_nsec;
1034
1035         /* n.b - signed multiplication and division required */
1036         nsdiff = data - kvm->arch.last_tsc_write;
1037 #ifdef CONFIG_X86_64
1038         nsdiff = (nsdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1039 #else
1040         /* do_div() only does unsigned */
1041         asm("idivl %2; xor %%edx, %%edx"
1042             : "=A"(nsdiff)
1043             : "A"(nsdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1044 #endif
1045         nsdiff -= elapsed;
1046         if (nsdiff < 0)
1047                 nsdiff = -nsdiff;
1048
1049         /*
1050          * Special case: TSC write with a small delta (1 second) of virtual
1051          * cycle time against real time is interpreted as an attempt to
1052          * synchronize the CPU.
1053          *
1054          * For a reliable TSC, we can match TSC offsets, and for an unstable
1055          * TSC, we add elapsed time in this computation.  We could let the
1056          * compensation code attempt to catch up if we fall behind, but
1057          * it's better to try to match offsets from the beginning.
1058          */
1059         if (nsdiff < NSEC_PER_SEC &&
1060             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1061                 if (!check_tsc_unstable()) {
1062                         offset = kvm->arch.last_tsc_offset;
1063                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1064                 } else {
1065                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1066                         data += delta;
1067                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1068                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1069                 }
1070         }
1071         kvm->arch.last_tsc_nsec = ns;
1072         kvm->arch.last_tsc_write = data;
1073         kvm->arch.last_tsc_offset = offset;
1074         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1075         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1076         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1077
1078         /* Reset of TSC must disable overshoot protection below */
1079         vcpu->arch.hv_clock.tsc_timestamp = 0;
1080         vcpu->arch.last_tsc_write = data;
1081         vcpu->arch.last_tsc_nsec = ns;
1082         vcpu->arch.last_guest_tsc = data;
1083 }
1084 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1085
1086 static int kvm_guest_time_update(struct kvm_vcpu *v)
1087 {
1088         unsigned long flags;
1089         struct kvm_vcpu_arch *vcpu = &v->arch;
1090         void *shared_kaddr;
1091         unsigned long this_tsc_khz;
1092         s64 kernel_ns, max_kernel_ns;
1093         u64 tsc_timestamp;
1094
1095         /* Keep irq disabled to prevent changes to the clock */
1096         local_irq_save(flags);
1097         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1098         kernel_ns = get_kernel_ns();
1099         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1100         if (unlikely(this_tsc_khz == 0)) {
1101                 local_irq_restore(flags);
1102                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1103                 return 1;
1104         }
1105
1106         /*
1107          * We may have to catch up the TSC to match elapsed wall clock
1108          * time for two reasons, even if kvmclock is used.
1109          *   1) CPU could have been running below the maximum TSC rate
1110          *   2) Broken TSC compensation resets the base at each VCPU
1111          *      entry to avoid unknown leaps of TSC even when running
1112          *      again on the same CPU.  This may cause apparent elapsed
1113          *      time to disappear, and the guest to stand still or run
1114          *      very slowly.
1115          */
1116         if (vcpu->tsc_catchup) {
1117                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1118                 if (tsc > tsc_timestamp) {
1119                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1120                         tsc_timestamp = tsc;
1121                 }
1122         }
1123
1124         local_irq_restore(flags);
1125
1126         if (!vcpu->time_page)
1127                 return 0;
1128
1129         /*
1130          * Time as measured by the TSC may go backwards when resetting the base
1131          * tsc_timestamp.  The reason for this is that the TSC resolution is
1132          * higher than the resolution of the other clock scales.  Thus, many
1133          * possible measurments of the TSC correspond to one measurement of any
1134          * other clock, and so a spread of values is possible.  This is not a
1135          * problem for the computation of the nanosecond clock; with TSC rates
1136          * around 1GHZ, there can only be a few cycles which correspond to one
1137          * nanosecond value, and any path through this code will inevitably
1138          * take longer than that.  However, with the kernel_ns value itself,
1139          * the precision may be much lower, down to HZ granularity.  If the
1140          * first sampling of TSC against kernel_ns ends in the low part of the
1141          * range, and the second in the high end of the range, we can get:
1142          *
1143          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1144          *
1145          * As the sampling errors potentially range in the thousands of cycles,
1146          * it is possible such a time value has already been observed by the
1147          * guest.  To protect against this, we must compute the system time as
1148          * observed by the guest and ensure the new system time is greater.
1149          */
1150         max_kernel_ns = 0;
1151         if (vcpu->hv_clock.tsc_timestamp) {
1152                 max_kernel_ns = vcpu->last_guest_tsc -
1153                                 vcpu->hv_clock.tsc_timestamp;
1154                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1155                                     vcpu->hv_clock.tsc_to_system_mul,
1156                                     vcpu->hv_clock.tsc_shift);
1157                 max_kernel_ns += vcpu->last_kernel_ns;
1158         }
1159
1160         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1161                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1162                                    &vcpu->hv_clock.tsc_shift,
1163                                    &vcpu->hv_clock.tsc_to_system_mul);
1164                 vcpu->hw_tsc_khz = this_tsc_khz;
1165         }
1166
1167         if (max_kernel_ns > kernel_ns)
1168                 kernel_ns = max_kernel_ns;
1169
1170         /* With all the info we got, fill in the values */
1171         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1172         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1173         vcpu->last_kernel_ns = kernel_ns;
1174         vcpu->last_guest_tsc = tsc_timestamp;
1175         vcpu->hv_clock.flags = 0;
1176
1177         /*
1178          * The interface expects us to write an even number signaling that the
1179          * update is finished. Since the guest won't see the intermediate
1180          * state, we just increase by 2 at the end.
1181          */
1182         vcpu->hv_clock.version += 2;
1183
1184         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1185
1186         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1187                sizeof(vcpu->hv_clock));
1188
1189         kunmap_atomic(shared_kaddr, KM_USER0);
1190
1191         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1192         return 0;
1193 }
1194
1195 static bool msr_mtrr_valid(unsigned msr)
1196 {
1197         switch (msr) {
1198         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1199         case MSR_MTRRfix64K_00000:
1200         case MSR_MTRRfix16K_80000:
1201         case MSR_MTRRfix16K_A0000:
1202         case MSR_MTRRfix4K_C0000:
1203         case MSR_MTRRfix4K_C8000:
1204         case MSR_MTRRfix4K_D0000:
1205         case MSR_MTRRfix4K_D8000:
1206         case MSR_MTRRfix4K_E0000:
1207         case MSR_MTRRfix4K_E8000:
1208         case MSR_MTRRfix4K_F0000:
1209         case MSR_MTRRfix4K_F8000:
1210         case MSR_MTRRdefType:
1211         case MSR_IA32_CR_PAT:
1212                 return true;
1213         case 0x2f8:
1214                 return true;
1215         }
1216         return false;
1217 }
1218
1219 static bool valid_pat_type(unsigned t)
1220 {
1221         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1222 }
1223
1224 static bool valid_mtrr_type(unsigned t)
1225 {
1226         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1227 }
1228
1229 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1230 {
1231         int i;
1232
1233         if (!msr_mtrr_valid(msr))
1234                 return false;
1235
1236         if (msr == MSR_IA32_CR_PAT) {
1237                 for (i = 0; i < 8; i++)
1238                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1239                                 return false;
1240                 return true;
1241         } else if (msr == MSR_MTRRdefType) {
1242                 if (data & ~0xcff)
1243                         return false;
1244                 return valid_mtrr_type(data & 0xff);
1245         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1246                 for (i = 0; i < 8 ; i++)
1247                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1248                                 return false;
1249                 return true;
1250         }
1251
1252         /* variable MTRRs */
1253         return valid_mtrr_type(data & 0xff);
1254 }
1255
1256 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1257 {
1258         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1259
1260         if (!mtrr_valid(vcpu, msr, data))
1261                 return 1;
1262
1263         if (msr == MSR_MTRRdefType) {
1264                 vcpu->arch.mtrr_state.def_type = data;
1265                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1266         } else if (msr == MSR_MTRRfix64K_00000)
1267                 p[0] = data;
1268         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1269                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1270         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1271                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1272         else if (msr == MSR_IA32_CR_PAT)
1273                 vcpu->arch.pat = data;
1274         else {  /* Variable MTRRs */
1275                 int idx, is_mtrr_mask;
1276                 u64 *pt;
1277
1278                 idx = (msr - 0x200) / 2;
1279                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1280                 if (!is_mtrr_mask)
1281                         pt =
1282                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1283                 else
1284                         pt =
1285                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1286                 *pt = data;
1287         }
1288
1289         kvm_mmu_reset_context(vcpu);
1290         return 0;
1291 }
1292
1293 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1294 {
1295         u64 mcg_cap = vcpu->arch.mcg_cap;
1296         unsigned bank_num = mcg_cap & 0xff;
1297
1298         switch (msr) {
1299         case MSR_IA32_MCG_STATUS:
1300                 vcpu->arch.mcg_status = data;
1301                 break;
1302         case MSR_IA32_MCG_CTL:
1303                 if (!(mcg_cap & MCG_CTL_P))
1304                         return 1;
1305                 if (data != 0 && data != ~(u64)0)
1306                         return -1;
1307                 vcpu->arch.mcg_ctl = data;
1308                 break;
1309         default:
1310                 if (msr >= MSR_IA32_MC0_CTL &&
1311                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1312                         u32 offset = msr - MSR_IA32_MC0_CTL;
1313                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1314                          * some Linux kernels though clear bit 10 in bank 4 to
1315                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1316                          * this to avoid an uncatched #GP in the guest
1317                          */
1318                         if ((offset & 0x3) == 0 &&
1319                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1320                                 return -1;
1321                         vcpu->arch.mce_banks[offset] = data;
1322                         break;
1323                 }
1324                 return 1;
1325         }
1326         return 0;
1327 }
1328
1329 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1330 {
1331         struct kvm *kvm = vcpu->kvm;
1332         int lm = is_long_mode(vcpu);
1333         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1334                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1335         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1336                 : kvm->arch.xen_hvm_config.blob_size_32;
1337         u32 page_num = data & ~PAGE_MASK;
1338         u64 page_addr = data & PAGE_MASK;
1339         u8 *page;
1340         int r;
1341
1342         r = -E2BIG;
1343         if (page_num >= blob_size)
1344                 goto out;
1345         r = -ENOMEM;
1346         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1347         if (IS_ERR(page)) {
1348                 r = PTR_ERR(page);
1349                 goto out;
1350         }
1351         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1352                 goto out_free;
1353         r = 0;
1354 out_free:
1355         kfree(page);
1356 out:
1357         return r;
1358 }
1359
1360 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1361 {
1362         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1363 }
1364
1365 static bool kvm_hv_msr_partition_wide(u32 msr)
1366 {
1367         bool r = false;
1368         switch (msr) {
1369         case HV_X64_MSR_GUEST_OS_ID:
1370         case HV_X64_MSR_HYPERCALL:
1371                 r = true;
1372                 break;
1373         }
1374
1375         return r;
1376 }
1377
1378 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1379 {
1380         struct kvm *kvm = vcpu->kvm;
1381
1382         switch (msr) {
1383         case HV_X64_MSR_GUEST_OS_ID:
1384                 kvm->arch.hv_guest_os_id = data;
1385                 /* setting guest os id to zero disables hypercall page */
1386                 if (!kvm->arch.hv_guest_os_id)
1387                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1388                 break;
1389         case HV_X64_MSR_HYPERCALL: {
1390                 u64 gfn;
1391                 unsigned long addr;
1392                 u8 instructions[4];
1393
1394                 /* if guest os id is not set hypercall should remain disabled */
1395                 if (!kvm->arch.hv_guest_os_id)
1396                         break;
1397                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1398                         kvm->arch.hv_hypercall = data;
1399                         break;
1400                 }
1401                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1402                 addr = gfn_to_hva(kvm, gfn);
1403                 if (kvm_is_error_hva(addr))
1404                         return 1;
1405                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1406                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1407                 if (__copy_to_user((void __user *)addr, instructions, 4))
1408                         return 1;
1409                 kvm->arch.hv_hypercall = data;
1410                 break;
1411         }
1412         default:
1413                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1414                           "data 0x%llx\n", msr, data);
1415                 return 1;
1416         }
1417         return 0;
1418 }
1419
1420 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1421 {
1422         switch (msr) {
1423         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1424                 unsigned long addr;
1425
1426                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1427                         vcpu->arch.hv_vapic = data;
1428                         break;
1429                 }
1430                 addr = gfn_to_hva(vcpu->kvm, data >>
1431                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1432                 if (kvm_is_error_hva(addr))
1433                         return 1;
1434                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1435                         return 1;
1436                 vcpu->arch.hv_vapic = data;
1437                 break;
1438         }
1439         case HV_X64_MSR_EOI:
1440                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1441         case HV_X64_MSR_ICR:
1442                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1443         case HV_X64_MSR_TPR:
1444                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1445         default:
1446                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1447                           "data 0x%llx\n", msr, data);
1448                 return 1;
1449         }
1450
1451         return 0;
1452 }
1453
1454 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1455 {
1456         gpa_t gpa = data & ~0x3f;
1457
1458         /* Bits 2:5 are resrved, Should be zero */
1459         if (data & 0x3c)
1460                 return 1;
1461
1462         vcpu->arch.apf.msr_val = data;
1463
1464         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1465                 kvm_clear_async_pf_completion_queue(vcpu);
1466                 kvm_async_pf_hash_reset(vcpu);
1467                 return 0;
1468         }
1469
1470         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1471                 return 1;
1472
1473         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1474         kvm_async_pf_wakeup_all(vcpu);
1475         return 0;
1476 }
1477
1478 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1479 {
1480         if (vcpu->arch.time_page) {
1481                 kvm_release_page_dirty(vcpu->arch.time_page);
1482                 vcpu->arch.time_page = NULL;
1483         }
1484 }
1485
1486 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1487 {
1488         u64 delta;
1489
1490         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1491                 return;
1492
1493         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1494         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1495         vcpu->arch.st.accum_steal = delta;
1496 }
1497
1498 static void record_steal_time(struct kvm_vcpu *vcpu)
1499 {
1500         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1501                 return;
1502
1503         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1504                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1505                 return;
1506
1507         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1508         vcpu->arch.st.steal.version += 2;
1509         vcpu->arch.st.accum_steal = 0;
1510
1511         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1512                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1513 }
1514
1515 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1516 {
1517         bool pr = false;
1518
1519         switch (msr) {
1520         case MSR_EFER:
1521                 return set_efer(vcpu, data);
1522         case MSR_K7_HWCR:
1523                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1524                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1525                 if (data != 0) {
1526                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1527                                 data);
1528                         return 1;
1529                 }
1530                 break;
1531         case MSR_FAM10H_MMIO_CONF_BASE:
1532                 if (data != 0) {
1533                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1534                                 "0x%llx\n", data);
1535                         return 1;
1536                 }
1537                 break;
1538         case MSR_AMD64_NB_CFG:
1539                 break;
1540         case MSR_IA32_DEBUGCTLMSR:
1541                 if (!data) {
1542                         /* We support the non-activated case already */
1543                         break;
1544                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1545                         /* Values other than LBR and BTF are vendor-specific,
1546                            thus reserved and should throw a #GP */
1547                         return 1;
1548                 }
1549                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1550                         __func__, data);
1551                 break;
1552         case MSR_IA32_UCODE_REV:
1553         case MSR_IA32_UCODE_WRITE:
1554         case MSR_VM_HSAVE_PA:
1555         case MSR_AMD64_PATCH_LOADER:
1556                 break;
1557         case 0x200 ... 0x2ff:
1558                 return set_msr_mtrr(vcpu, msr, data);
1559         case MSR_IA32_APICBASE:
1560                 kvm_set_apic_base(vcpu, data);
1561                 break;
1562         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1563                 return kvm_x2apic_msr_write(vcpu, msr, data);
1564         case MSR_IA32_TSCDEADLINE:
1565                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1566                 break;
1567         case MSR_IA32_MISC_ENABLE:
1568                 vcpu->arch.ia32_misc_enable_msr = data;
1569                 break;
1570         case MSR_KVM_WALL_CLOCK_NEW:
1571         case MSR_KVM_WALL_CLOCK:
1572                 vcpu->kvm->arch.wall_clock = data;
1573                 kvm_write_wall_clock(vcpu->kvm, data);
1574                 break;
1575         case MSR_KVM_SYSTEM_TIME_NEW:
1576         case MSR_KVM_SYSTEM_TIME: {
1577                 kvmclock_reset(vcpu);
1578
1579                 vcpu->arch.time = data;
1580                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1581
1582                 /* we verify if the enable bit is set... */
1583                 if (!(data & 1))
1584                         break;
1585
1586                 /* ...but clean it before doing the actual write */
1587                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1588
1589                 vcpu->arch.time_page =
1590                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1591
1592                 if (is_error_page(vcpu->arch.time_page)) {
1593                         kvm_release_page_clean(vcpu->arch.time_page);
1594                         vcpu->arch.time_page = NULL;
1595                 }
1596                 break;
1597         }
1598         case MSR_KVM_ASYNC_PF_EN:
1599                 if (kvm_pv_enable_async_pf(vcpu, data))
1600                         return 1;
1601                 break;
1602         case MSR_KVM_STEAL_TIME:
1603
1604                 if (unlikely(!sched_info_on()))
1605                         return 1;
1606
1607                 if (data & KVM_STEAL_RESERVED_MASK)
1608                         return 1;
1609
1610                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611                                                         data & KVM_STEAL_VALID_BITS))
1612                         return 1;
1613
1614                 vcpu->arch.st.msr_val = data;
1615
1616                 if (!(data & KVM_MSR_ENABLED))
1617                         break;
1618
1619                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1620
1621                 preempt_disable();
1622                 accumulate_steal_time(vcpu);
1623                 preempt_enable();
1624
1625                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1626
1627                 break;
1628
1629         case MSR_IA32_MCG_CTL:
1630         case MSR_IA32_MCG_STATUS:
1631         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632                 return set_msr_mce(vcpu, msr, data);
1633
1634         /* Performance counters are not protected by a CPUID bit,
1635          * so we should check all of them in the generic path for the sake of
1636          * cross vendor migration.
1637          * Writing a zero into the event select MSRs disables them,
1638          * which we perfectly emulate ;-). Any other value should be at least
1639          * reported, some guests depend on them.
1640          */
1641         case MSR_K7_EVNTSEL0:
1642         case MSR_K7_EVNTSEL1:
1643         case MSR_K7_EVNTSEL2:
1644         case MSR_K7_EVNTSEL3:
1645                 if (data != 0)
1646                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1647                                 "0x%x data 0x%llx\n", msr, data);
1648                 break;
1649         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1650          * so we ignore writes to make it happy.
1651          */
1652         case MSR_K7_PERFCTR0:
1653         case MSR_K7_PERFCTR1:
1654         case MSR_K7_PERFCTR2:
1655         case MSR_K7_PERFCTR3:
1656                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1657                         "0x%x data 0x%llx\n", msr, data);
1658                 break;
1659         case MSR_P6_PERFCTR0:
1660         case MSR_P6_PERFCTR1:
1661                 pr = true;
1662         case MSR_P6_EVNTSEL0:
1663         case MSR_P6_EVNTSEL1:
1664                 if (kvm_pmu_msr(vcpu, msr))
1665                         return kvm_pmu_set_msr(vcpu, msr, data);
1666
1667                 if (pr || data != 0)
1668                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1669                                 "0x%x data 0x%llx\n", msr, data);
1670                 break;
1671         case MSR_K7_CLK_CTL:
1672                 /*
1673                  * Ignore all writes to this no longer documented MSR.
1674                  * Writes are only relevant for old K7 processors,
1675                  * all pre-dating SVM, but a recommended workaround from
1676                  * AMD for these chips. It is possible to speicify the
1677                  * affected processor models on the command line, hence
1678                  * the need to ignore the workaround.
1679                  */
1680                 break;
1681         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1682                 if (kvm_hv_msr_partition_wide(msr)) {
1683                         int r;
1684                         mutex_lock(&vcpu->kvm->lock);
1685                         r = set_msr_hyperv_pw(vcpu, msr, data);
1686                         mutex_unlock(&vcpu->kvm->lock);
1687                         return r;
1688                 } else
1689                         return set_msr_hyperv(vcpu, msr, data);
1690                 break;
1691         case MSR_IA32_BBL_CR_CTL3:
1692                 /* Drop writes to this legacy MSR -- see rdmsr
1693                  * counterpart for further detail.
1694                  */
1695                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1696                 break;
1697         case MSR_AMD64_OSVW_ID_LENGTH:
1698                 if (!guest_cpuid_has_osvw(vcpu))
1699                         return 1;
1700                 vcpu->arch.osvw.length = data;
1701                 break;
1702         case MSR_AMD64_OSVW_STATUS:
1703                 if (!guest_cpuid_has_osvw(vcpu))
1704                         return 1;
1705                 vcpu->arch.osvw.status = data;
1706                 break;
1707         default:
1708                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1709                         return xen_hvm_config(vcpu, data);
1710                 if (kvm_pmu_msr(vcpu, msr))
1711                         return kvm_pmu_set_msr(vcpu, msr, data);
1712                 if (!ignore_msrs) {
1713                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1714                                 msr, data);
1715                         return 1;
1716                 } else {
1717                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1718                                 msr, data);
1719                         break;
1720                 }
1721         }
1722         return 0;
1723 }
1724 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1725
1726
1727 /*
1728  * Reads an msr value (of 'msr_index') into 'pdata'.
1729  * Returns 0 on success, non-0 otherwise.
1730  * Assumes vcpu_load() was already called.
1731  */
1732 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1733 {
1734         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1735 }
1736
1737 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1738 {
1739         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1740
1741         if (!msr_mtrr_valid(msr))
1742                 return 1;
1743
1744         if (msr == MSR_MTRRdefType)
1745                 *pdata = vcpu->arch.mtrr_state.def_type +
1746                          (vcpu->arch.mtrr_state.enabled << 10);
1747         else if (msr == MSR_MTRRfix64K_00000)
1748                 *pdata = p[0];
1749         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1750                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1751         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1752                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1753         else if (msr == MSR_IA32_CR_PAT)
1754                 *pdata = vcpu->arch.pat;
1755         else {  /* Variable MTRRs */
1756                 int idx, is_mtrr_mask;
1757                 u64 *pt;
1758
1759                 idx = (msr - 0x200) / 2;
1760                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1761                 if (!is_mtrr_mask)
1762                         pt =
1763                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1764                 else
1765                         pt =
1766                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1767                 *pdata = *pt;
1768         }
1769
1770         return 0;
1771 }
1772
1773 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1774 {
1775         u64 data;
1776         u64 mcg_cap = vcpu->arch.mcg_cap;
1777         unsigned bank_num = mcg_cap & 0xff;
1778
1779         switch (msr) {
1780         case MSR_IA32_P5_MC_ADDR:
1781         case MSR_IA32_P5_MC_TYPE:
1782                 data = 0;
1783                 break;
1784         case MSR_IA32_MCG_CAP:
1785                 data = vcpu->arch.mcg_cap;
1786                 break;
1787         case MSR_IA32_MCG_CTL:
1788                 if (!(mcg_cap & MCG_CTL_P))
1789                         return 1;
1790                 data = vcpu->arch.mcg_ctl;
1791                 break;
1792         case MSR_IA32_MCG_STATUS:
1793                 data = vcpu->arch.mcg_status;
1794                 break;
1795         default:
1796                 if (msr >= MSR_IA32_MC0_CTL &&
1797                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1798                         u32 offset = msr - MSR_IA32_MC0_CTL;
1799                         data = vcpu->arch.mce_banks[offset];
1800                         break;
1801                 }
1802                 return 1;
1803         }
1804         *pdata = data;
1805         return 0;
1806 }
1807
1808 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1809 {
1810         u64 data = 0;
1811         struct kvm *kvm = vcpu->kvm;
1812
1813         switch (msr) {
1814         case HV_X64_MSR_GUEST_OS_ID:
1815                 data = kvm->arch.hv_guest_os_id;
1816                 break;
1817         case HV_X64_MSR_HYPERCALL:
1818                 data = kvm->arch.hv_hypercall;
1819                 break;
1820         default:
1821                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1822                 return 1;
1823         }
1824
1825         *pdata = data;
1826         return 0;
1827 }
1828
1829 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1830 {
1831         u64 data = 0;
1832
1833         switch (msr) {
1834         case HV_X64_MSR_VP_INDEX: {
1835                 int r;
1836                 struct kvm_vcpu *v;
1837                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1838                         if (v == vcpu)
1839                                 data = r;
1840                 break;
1841         }
1842         case HV_X64_MSR_EOI:
1843                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1844         case HV_X64_MSR_ICR:
1845                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1846         case HV_X64_MSR_TPR:
1847                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1848         case HV_X64_MSR_APIC_ASSIST_PAGE:
1849                 data = vcpu->arch.hv_vapic;
1850                 break;
1851         default:
1852                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1853                 return 1;
1854         }
1855         *pdata = data;
1856         return 0;
1857 }
1858
1859 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1860 {
1861         u64 data;
1862
1863         switch (msr) {
1864         case MSR_IA32_PLATFORM_ID:
1865         case MSR_IA32_EBL_CR_POWERON:
1866         case MSR_IA32_DEBUGCTLMSR:
1867         case MSR_IA32_LASTBRANCHFROMIP:
1868         case MSR_IA32_LASTBRANCHTOIP:
1869         case MSR_IA32_LASTINTFROMIP:
1870         case MSR_IA32_LASTINTTOIP:
1871         case MSR_K8_SYSCFG:
1872         case MSR_K7_HWCR:
1873         case MSR_VM_HSAVE_PA:
1874         case MSR_K7_EVNTSEL0:
1875         case MSR_K7_PERFCTR0:
1876         case MSR_K8_INT_PENDING_MSG:
1877         case MSR_AMD64_NB_CFG:
1878         case MSR_FAM10H_MMIO_CONF_BASE:
1879                 data = 0;
1880                 break;
1881         case MSR_P6_PERFCTR0:
1882         case MSR_P6_PERFCTR1:
1883         case MSR_P6_EVNTSEL0:
1884         case MSR_P6_EVNTSEL1:
1885                 if (kvm_pmu_msr(vcpu, msr))
1886                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1887                 data = 0;
1888                 break;
1889         case MSR_IA32_UCODE_REV:
1890                 data = 0x100000000ULL;
1891                 break;
1892         case MSR_MTRRcap:
1893                 data = 0x500 | KVM_NR_VAR_MTRR;
1894                 break;
1895         case 0x200 ... 0x2ff:
1896                 return get_msr_mtrr(vcpu, msr, pdata);
1897         case 0xcd: /* fsb frequency */
1898                 data = 3;
1899                 break;
1900                 /*
1901                  * MSR_EBC_FREQUENCY_ID
1902                  * Conservative value valid for even the basic CPU models.
1903                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1904                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1905                  * and 266MHz for model 3, or 4. Set Core Clock
1906                  * Frequency to System Bus Frequency Ratio to 1 (bits
1907                  * 31:24) even though these are only valid for CPU
1908                  * models > 2, however guests may end up dividing or
1909                  * multiplying by zero otherwise.
1910                  */
1911         case MSR_EBC_FREQUENCY_ID:
1912                 data = 1 << 24;
1913                 break;
1914         case MSR_IA32_APICBASE:
1915                 data = kvm_get_apic_base(vcpu);
1916                 break;
1917         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1918                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1919                 break;
1920         case MSR_IA32_TSCDEADLINE:
1921                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1922                 break;
1923         case MSR_IA32_MISC_ENABLE:
1924                 data = vcpu->arch.ia32_misc_enable_msr;
1925                 break;
1926         case MSR_IA32_PERF_STATUS:
1927                 /* TSC increment by tick */
1928                 data = 1000ULL;
1929                 /* CPU multiplier */
1930                 data |= (((uint64_t)4ULL) << 40);
1931                 break;
1932         case MSR_EFER:
1933                 data = vcpu->arch.efer;
1934                 break;
1935         case MSR_KVM_WALL_CLOCK:
1936         case MSR_KVM_WALL_CLOCK_NEW:
1937                 data = vcpu->kvm->arch.wall_clock;
1938                 break;
1939         case MSR_KVM_SYSTEM_TIME:
1940         case MSR_KVM_SYSTEM_TIME_NEW:
1941                 data = vcpu->arch.time;
1942                 break;
1943         case MSR_KVM_ASYNC_PF_EN:
1944                 data = vcpu->arch.apf.msr_val;
1945                 break;
1946         case MSR_KVM_STEAL_TIME:
1947                 data = vcpu->arch.st.msr_val;
1948                 break;
1949         case MSR_IA32_P5_MC_ADDR:
1950         case MSR_IA32_P5_MC_TYPE:
1951         case MSR_IA32_MCG_CAP:
1952         case MSR_IA32_MCG_CTL:
1953         case MSR_IA32_MCG_STATUS:
1954         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1955                 return get_msr_mce(vcpu, msr, pdata);
1956         case MSR_K7_CLK_CTL:
1957                 /*
1958                  * Provide expected ramp-up count for K7. All other
1959                  * are set to zero, indicating minimum divisors for
1960                  * every field.
1961                  *
1962                  * This prevents guest kernels on AMD host with CPU
1963                  * type 6, model 8 and higher from exploding due to
1964                  * the rdmsr failing.
1965                  */
1966                 data = 0x20000000;
1967                 break;
1968         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1969                 if (kvm_hv_msr_partition_wide(msr)) {
1970                         int r;
1971                         mutex_lock(&vcpu->kvm->lock);
1972                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1973                         mutex_unlock(&vcpu->kvm->lock);
1974                         return r;
1975                 } else
1976                         return get_msr_hyperv(vcpu, msr, pdata);
1977                 break;
1978         case MSR_IA32_BBL_CR_CTL3:
1979                 /* This legacy MSR exists but isn't fully documented in current
1980                  * silicon.  It is however accessed by winxp in very narrow
1981                  * scenarios where it sets bit #19, itself documented as
1982                  * a "reserved" bit.  Best effort attempt to source coherent
1983                  * read data here should the balance of the register be
1984                  * interpreted by the guest:
1985                  *
1986                  * L2 cache control register 3: 64GB range, 256KB size,
1987                  * enabled, latency 0x1, configured
1988                  */
1989                 data = 0xbe702111;
1990                 break;
1991         case MSR_AMD64_OSVW_ID_LENGTH:
1992                 if (!guest_cpuid_has_osvw(vcpu))
1993                         return 1;
1994                 data = vcpu->arch.osvw.length;
1995                 break;
1996         case MSR_AMD64_OSVW_STATUS:
1997                 if (!guest_cpuid_has_osvw(vcpu))
1998                         return 1;
1999                 data = vcpu->arch.osvw.status;
2000                 break;
2001         default:
2002                 if (kvm_pmu_msr(vcpu, msr))
2003                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2004                 if (!ignore_msrs) {
2005                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2006                         return 1;
2007                 } else {
2008                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2009                         data = 0;
2010                 }
2011                 break;
2012         }
2013         *pdata = data;
2014         return 0;
2015 }
2016 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2017
2018 /*
2019  * Read or write a bunch of msrs. All parameters are kernel addresses.
2020  *
2021  * @return number of msrs set successfully.
2022  */
2023 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2024                     struct kvm_msr_entry *entries,
2025                     int (*do_msr)(struct kvm_vcpu *vcpu,
2026                                   unsigned index, u64 *data))
2027 {
2028         int i, idx;
2029
2030         idx = srcu_read_lock(&vcpu->kvm->srcu);
2031         for (i = 0; i < msrs->nmsrs; ++i)
2032                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2033                         break;
2034         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2035
2036         return i;
2037 }
2038
2039 /*
2040  * Read or write a bunch of msrs. Parameters are user addresses.
2041  *
2042  * @return number of msrs set successfully.
2043  */
2044 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2045                   int (*do_msr)(struct kvm_vcpu *vcpu,
2046                                 unsigned index, u64 *data),
2047                   int writeback)
2048 {
2049         struct kvm_msrs msrs;
2050         struct kvm_msr_entry *entries;
2051         int r, n;
2052         unsigned size;
2053
2054         r = -EFAULT;
2055         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2056                 goto out;
2057
2058         r = -E2BIG;
2059         if (msrs.nmsrs >= MAX_IO_MSRS)
2060                 goto out;
2061
2062         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2063         entries = memdup_user(user_msrs->entries, size);
2064         if (IS_ERR(entries)) {
2065                 r = PTR_ERR(entries);
2066                 goto out;
2067         }
2068
2069         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2070         if (r < 0)
2071                 goto out_free;
2072
2073         r = -EFAULT;
2074         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2075                 goto out_free;
2076
2077         r = n;
2078
2079 out_free:
2080         kfree(entries);
2081 out:
2082         return r;
2083 }
2084
2085 int kvm_dev_ioctl_check_extension(long ext)
2086 {
2087         int r;
2088
2089         switch (ext) {
2090         case KVM_CAP_IRQCHIP:
2091         case KVM_CAP_HLT:
2092         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2093         case KVM_CAP_SET_TSS_ADDR:
2094         case KVM_CAP_EXT_CPUID:
2095         case KVM_CAP_CLOCKSOURCE:
2096         case KVM_CAP_PIT:
2097         case KVM_CAP_NOP_IO_DELAY:
2098         case KVM_CAP_MP_STATE:
2099         case KVM_CAP_SYNC_MMU:
2100         case KVM_CAP_USER_NMI:
2101         case KVM_CAP_REINJECT_CONTROL:
2102         case KVM_CAP_IRQ_INJECT_STATUS:
2103         case KVM_CAP_ASSIGN_DEV_IRQ:
2104         case KVM_CAP_IRQFD:
2105         case KVM_CAP_IOEVENTFD:
2106         case KVM_CAP_PIT2:
2107         case KVM_CAP_PIT_STATE2:
2108         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2109         case KVM_CAP_XEN_HVM:
2110         case KVM_CAP_ADJUST_CLOCK:
2111         case KVM_CAP_VCPU_EVENTS:
2112         case KVM_CAP_HYPERV:
2113         case KVM_CAP_HYPERV_VAPIC:
2114         case KVM_CAP_HYPERV_SPIN:
2115         case KVM_CAP_PCI_SEGMENT:
2116         case KVM_CAP_DEBUGREGS:
2117         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2118         case KVM_CAP_XSAVE:
2119         case KVM_CAP_ASYNC_PF:
2120         case KVM_CAP_GET_TSC_KHZ:
2121                 r = 1;
2122                 break;
2123         case KVM_CAP_COALESCED_MMIO:
2124                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2125                 break;
2126         case KVM_CAP_VAPIC:
2127                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2128                 break;
2129         case KVM_CAP_NR_VCPUS:
2130                 r = KVM_SOFT_MAX_VCPUS;
2131                 break;
2132         case KVM_CAP_MAX_VCPUS:
2133                 r = KVM_MAX_VCPUS;
2134                 break;
2135         case KVM_CAP_NR_MEMSLOTS:
2136                 r = KVM_MEMORY_SLOTS;
2137                 break;
2138         case KVM_CAP_PV_MMU:    /* obsolete */
2139                 r = 0;
2140                 break;
2141         case KVM_CAP_IOMMU:
2142                 r = iommu_present(&pci_bus_type);
2143                 break;
2144         case KVM_CAP_MCE:
2145                 r = KVM_MAX_MCE_BANKS;
2146                 break;
2147         case KVM_CAP_XCRS:
2148                 r = cpu_has_xsave;
2149                 break;
2150         case KVM_CAP_TSC_CONTROL:
2151                 r = kvm_has_tsc_control;
2152                 break;
2153         case KVM_CAP_TSC_DEADLINE_TIMER:
2154                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2155                 break;
2156         default:
2157                 r = 0;
2158                 break;
2159         }
2160         return r;
2161
2162 }
2163
2164 long kvm_arch_dev_ioctl(struct file *filp,
2165                         unsigned int ioctl, unsigned long arg)
2166 {
2167         void __user *argp = (void __user *)arg;
2168         long r;
2169
2170         switch (ioctl) {
2171         case KVM_GET_MSR_INDEX_LIST: {
2172                 struct kvm_msr_list __user *user_msr_list = argp;
2173                 struct kvm_msr_list msr_list;
2174                 unsigned n;
2175
2176                 r = -EFAULT;
2177                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2178                         goto out;
2179                 n = msr_list.nmsrs;
2180                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2181                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2182                         goto out;
2183                 r = -E2BIG;
2184                 if (n < msr_list.nmsrs)
2185                         goto out;
2186                 r = -EFAULT;
2187                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2188                                  num_msrs_to_save * sizeof(u32)))
2189                         goto out;
2190                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2191                                  &emulated_msrs,
2192                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2193                         goto out;
2194                 r = 0;
2195                 break;
2196         }
2197         case KVM_GET_SUPPORTED_CPUID: {
2198                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2199                 struct kvm_cpuid2 cpuid;
2200
2201                 r = -EFAULT;
2202                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2203                         goto out;
2204                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2205                                                       cpuid_arg->entries);
2206                 if (r)
2207                         goto out;
2208
2209                 r = -EFAULT;
2210                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2211                         goto out;
2212                 r = 0;
2213                 break;
2214         }
2215         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2216                 u64 mce_cap;
2217
2218                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2219                 r = -EFAULT;
2220                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2221                         goto out;
2222                 r = 0;
2223                 break;
2224         }
2225         default:
2226                 r = -EINVAL;
2227         }
2228 out:
2229         return r;
2230 }
2231
2232 static void wbinvd_ipi(void *garbage)
2233 {
2234         wbinvd();
2235 }
2236
2237 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2238 {
2239         return vcpu->kvm->arch.iommu_domain &&
2240                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2241 }
2242
2243 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2244 {
2245         /* Address WBINVD may be executed by guest */
2246         if (need_emulate_wbinvd(vcpu)) {
2247                 if (kvm_x86_ops->has_wbinvd_exit())
2248                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2249                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2250                         smp_call_function_single(vcpu->cpu,
2251                                         wbinvd_ipi, NULL, 1);
2252         }
2253
2254         kvm_x86_ops->vcpu_load(vcpu, cpu);
2255         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2256                 /* Make sure TSC doesn't go backwards */
2257                 s64 tsc_delta;
2258                 u64 tsc;
2259
2260                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2261                 tsc_delta = tsc - vcpu->arch.last_guest_tsc;
2262
2263                 if (tsc_delta < 0)
2264                         mark_tsc_unstable("KVM discovered backwards TSC");
2265                 if (check_tsc_unstable()) {
2266                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2267                                                 vcpu->arch.last_guest_tsc);
2268                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2269                         vcpu->arch.tsc_catchup = 1;
2270                 }
2271                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2272                 if (vcpu->cpu != cpu)
2273                         kvm_migrate_timers(vcpu);
2274                 vcpu->cpu = cpu;
2275         }
2276
2277         accumulate_steal_time(vcpu);
2278         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2279 }
2280
2281 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2282 {
2283         kvm_x86_ops->vcpu_put(vcpu);
2284         kvm_put_guest_fpu(vcpu);
2285         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2286 }
2287
2288 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2289                                     struct kvm_lapic_state *s)
2290 {
2291         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2292
2293         return 0;
2294 }
2295
2296 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2297                                     struct kvm_lapic_state *s)
2298 {
2299         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2300         kvm_apic_post_state_restore(vcpu);
2301         update_cr8_intercept(vcpu);
2302
2303         return 0;
2304 }
2305
2306 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2307                                     struct kvm_interrupt *irq)
2308 {
2309         if (irq->irq < 0 || irq->irq >= 256)
2310                 return -EINVAL;
2311         if (irqchip_in_kernel(vcpu->kvm))
2312                 return -ENXIO;
2313
2314         kvm_queue_interrupt(vcpu, irq->irq, false);
2315         kvm_make_request(KVM_REQ_EVENT, vcpu);
2316
2317         return 0;
2318 }
2319
2320 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2321 {
2322         kvm_inject_nmi(vcpu);
2323
2324         return 0;
2325 }
2326
2327 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2328                                            struct kvm_tpr_access_ctl *tac)
2329 {
2330         if (tac->flags)
2331                 return -EINVAL;
2332         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2333         return 0;
2334 }
2335
2336 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2337                                         u64 mcg_cap)
2338 {
2339         int r;
2340         unsigned bank_num = mcg_cap & 0xff, bank;
2341
2342         r = -EINVAL;
2343         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2344                 goto out;
2345         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2346                 goto out;
2347         r = 0;
2348         vcpu->arch.mcg_cap = mcg_cap;
2349         /* Init IA32_MCG_CTL to all 1s */
2350         if (mcg_cap & MCG_CTL_P)
2351                 vcpu->arch.mcg_ctl = ~(u64)0;
2352         /* Init IA32_MCi_CTL to all 1s */
2353         for (bank = 0; bank < bank_num; bank++)
2354                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2355 out:
2356         return r;
2357 }
2358
2359 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2360                                       struct kvm_x86_mce *mce)
2361 {
2362         u64 mcg_cap = vcpu->arch.mcg_cap;
2363         unsigned bank_num = mcg_cap & 0xff;
2364         u64 *banks = vcpu->arch.mce_banks;
2365
2366         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2367                 return -EINVAL;
2368         /*
2369          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2370          * reporting is disabled
2371          */
2372         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2373             vcpu->arch.mcg_ctl != ~(u64)0)
2374                 return 0;
2375         banks += 4 * mce->bank;
2376         /*
2377          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2378          * reporting is disabled for the bank
2379          */
2380         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2381                 return 0;
2382         if (mce->status & MCI_STATUS_UC) {
2383                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2384                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2385                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2386                         return 0;
2387                 }
2388                 if (banks[1] & MCI_STATUS_VAL)
2389                         mce->status |= MCI_STATUS_OVER;
2390                 banks[2] = mce->addr;
2391                 banks[3] = mce->misc;
2392                 vcpu->arch.mcg_status = mce->mcg_status;
2393                 banks[1] = mce->status;
2394                 kvm_queue_exception(vcpu, MC_VECTOR);
2395         } else if (!(banks[1] & MCI_STATUS_VAL)
2396                    || !(banks[1] & MCI_STATUS_UC)) {
2397                 if (banks[1] & MCI_STATUS_VAL)
2398                         mce->status |= MCI_STATUS_OVER;
2399                 banks[2] = mce->addr;
2400                 banks[3] = mce->misc;
2401                 banks[1] = mce->status;
2402         } else
2403                 banks[1] |= MCI_STATUS_OVER;
2404         return 0;
2405 }
2406
2407 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2408                                                struct kvm_vcpu_events *events)
2409 {
2410         process_nmi(vcpu);
2411         events->exception.injected =
2412                 vcpu->arch.exception.pending &&
2413                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2414         events->exception.nr = vcpu->arch.exception.nr;
2415         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2416         events->exception.pad = 0;
2417         events->exception.error_code = vcpu->arch.exception.error_code;
2418
2419         events->interrupt.injected =
2420                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2421         events->interrupt.nr = vcpu->arch.interrupt.nr;
2422         events->interrupt.soft = 0;
2423         events->interrupt.shadow =
2424                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2425                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2426
2427         events->nmi.injected = vcpu->arch.nmi_injected;
2428         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2429         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2430         events->nmi.pad = 0;
2431
2432         events->sipi_vector = vcpu->arch.sipi_vector;
2433
2434         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2435                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2436                          | KVM_VCPUEVENT_VALID_SHADOW);
2437         memset(&events->reserved, 0, sizeof(events->reserved));
2438 }
2439
2440 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2441                                               struct kvm_vcpu_events *events)
2442 {
2443         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2444                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2445                               | KVM_VCPUEVENT_VALID_SHADOW))
2446                 return -EINVAL;
2447
2448         process_nmi(vcpu);
2449         vcpu->arch.exception.pending = events->exception.injected;
2450         vcpu->arch.exception.nr = events->exception.nr;
2451         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2452         vcpu->arch.exception.error_code = events->exception.error_code;
2453
2454         vcpu->arch.interrupt.pending = events->interrupt.injected;
2455         vcpu->arch.interrupt.nr = events->interrupt.nr;
2456         vcpu->arch.interrupt.soft = events->interrupt.soft;
2457         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2458                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2459                                                   events->interrupt.shadow);
2460
2461         vcpu->arch.nmi_injected = events->nmi.injected;
2462         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2463                 vcpu->arch.nmi_pending = events->nmi.pending;
2464         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2465
2466         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2467                 vcpu->arch.sipi_vector = events->sipi_vector;
2468
2469         kvm_make_request(KVM_REQ_EVENT, vcpu);
2470
2471         return 0;
2472 }
2473
2474 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2475                                              struct kvm_debugregs *dbgregs)
2476 {
2477         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2478         dbgregs->dr6 = vcpu->arch.dr6;
2479         dbgregs->dr7 = vcpu->arch.dr7;
2480         dbgregs->flags = 0;
2481         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2482 }
2483
2484 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2485                                             struct kvm_debugregs *dbgregs)
2486 {
2487         if (dbgregs->flags)
2488                 return -EINVAL;
2489
2490         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2491         vcpu->arch.dr6 = dbgregs->dr6;
2492         vcpu->arch.dr7 = dbgregs->dr7;
2493
2494         return 0;
2495 }
2496
2497 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2498                                          struct kvm_xsave *guest_xsave)
2499 {
2500         if (cpu_has_xsave)
2501                 memcpy(guest_xsave->region,
2502                         &vcpu->arch.guest_fpu.state->xsave,
2503                         xstate_size);
2504         else {
2505                 memcpy(guest_xsave->region,
2506                         &vcpu->arch.guest_fpu.state->fxsave,
2507                         sizeof(struct i387_fxsave_struct));
2508                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2509                         XSTATE_FPSSE;
2510         }
2511 }
2512
2513 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2514                                         struct kvm_xsave *guest_xsave)
2515 {
2516         u64 xstate_bv =
2517                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2518
2519         if (cpu_has_xsave)
2520                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2521                         guest_xsave->region, xstate_size);
2522         else {
2523                 if (xstate_bv & ~XSTATE_FPSSE)
2524                         return -EINVAL;
2525                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2526                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2527         }
2528         return 0;
2529 }
2530
2531 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2532                                         struct kvm_xcrs *guest_xcrs)
2533 {
2534         if (!cpu_has_xsave) {
2535                 guest_xcrs->nr_xcrs = 0;
2536                 return;
2537         }
2538
2539         guest_xcrs->nr_xcrs = 1;
2540         guest_xcrs->flags = 0;
2541         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2542         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2543 }
2544
2545 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2546                                        struct kvm_xcrs *guest_xcrs)
2547 {
2548         int i, r = 0;
2549
2550         if (!cpu_has_xsave)
2551                 return -EINVAL;
2552
2553         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2554                 return -EINVAL;
2555
2556         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2557                 /* Only support XCR0 currently */
2558                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2559                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2560                                 guest_xcrs->xcrs[0].value);
2561                         break;
2562                 }
2563         if (r)
2564                 r = -EINVAL;
2565         return r;
2566 }
2567
2568 long kvm_arch_vcpu_ioctl(struct file *filp,
2569                          unsigned int ioctl, unsigned long arg)
2570 {
2571         struct kvm_vcpu *vcpu = filp->private_data;
2572         void __user *argp = (void __user *)arg;
2573         int r;
2574         union {
2575                 struct kvm_lapic_state *lapic;
2576                 struct kvm_xsave *xsave;
2577                 struct kvm_xcrs *xcrs;
2578                 void *buffer;
2579         } u;
2580
2581         u.buffer = NULL;
2582         switch (ioctl) {
2583         case KVM_GET_LAPIC: {
2584                 r = -EINVAL;
2585                 if (!vcpu->arch.apic)
2586                         goto out;
2587                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2588
2589                 r = -ENOMEM;
2590                 if (!u.lapic)
2591                         goto out;
2592                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2593                 if (r)
2594                         goto out;
2595                 r = -EFAULT;
2596                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2597                         goto out;
2598                 r = 0;
2599                 break;
2600         }
2601         case KVM_SET_LAPIC: {
2602                 r = -EINVAL;
2603                 if (!vcpu->arch.apic)
2604                         goto out;
2605                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2606                 if (IS_ERR(u.lapic)) {
2607                         r = PTR_ERR(u.lapic);
2608                         goto out;
2609                 }
2610
2611                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2612                 if (r)
2613                         goto out;
2614                 r = 0;
2615                 break;
2616         }
2617         case KVM_INTERRUPT: {
2618                 struct kvm_interrupt irq;
2619
2620                 r = -EFAULT;
2621                 if (copy_from_user(&irq, argp, sizeof irq))
2622                         goto out;
2623                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2624                 if (r)
2625                         goto out;
2626                 r = 0;
2627                 break;
2628         }
2629         case KVM_NMI: {
2630                 r = kvm_vcpu_ioctl_nmi(vcpu);
2631                 if (r)
2632                         goto out;
2633                 r = 0;
2634                 break;
2635         }
2636         case KVM_SET_CPUID: {
2637                 struct kvm_cpuid __user *cpuid_arg = argp;
2638                 struct kvm_cpuid cpuid;
2639
2640                 r = -EFAULT;
2641                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2642                         goto out;
2643                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2644                 if (r)
2645                         goto out;
2646                 break;
2647         }
2648         case KVM_SET_CPUID2: {
2649                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2650                 struct kvm_cpuid2 cpuid;
2651
2652                 r = -EFAULT;
2653                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2654                         goto out;
2655                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2656                                               cpuid_arg->entries);
2657                 if (r)
2658                         goto out;
2659                 break;
2660         }
2661         case KVM_GET_CPUID2: {
2662                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2663                 struct kvm_cpuid2 cpuid;
2664
2665                 r = -EFAULT;
2666                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2667                         goto out;
2668                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2669                                               cpuid_arg->entries);
2670                 if (r)
2671                         goto out;
2672                 r = -EFAULT;
2673                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         case KVM_GET_MSRS:
2679                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2680                 break;
2681         case KVM_SET_MSRS:
2682                 r = msr_io(vcpu, argp, do_set_msr, 0);
2683                 break;
2684         case KVM_TPR_ACCESS_REPORTING: {
2685                 struct kvm_tpr_access_ctl tac;
2686
2687                 r = -EFAULT;
2688                 if (copy_from_user(&tac, argp, sizeof tac))
2689                         goto out;
2690                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2691                 if (r)
2692                         goto out;
2693                 r = -EFAULT;
2694                 if (copy_to_user(argp, &tac, sizeof tac))
2695                         goto out;
2696                 r = 0;
2697                 break;
2698         };
2699         case KVM_SET_VAPIC_ADDR: {
2700                 struct kvm_vapic_addr va;
2701
2702                 r = -EINVAL;
2703                 if (!irqchip_in_kernel(vcpu->kvm))
2704                         goto out;
2705                 r = -EFAULT;
2706                 if (copy_from_user(&va, argp, sizeof va))
2707                         goto out;
2708                 r = 0;
2709                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2710                 break;
2711         }
2712         case KVM_X86_SETUP_MCE: {
2713                 u64 mcg_cap;
2714
2715                 r = -EFAULT;
2716                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2717                         goto out;
2718                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2719                 break;
2720         }
2721         case KVM_X86_SET_MCE: {
2722                 struct kvm_x86_mce mce;
2723
2724                 r = -EFAULT;
2725                 if (copy_from_user(&mce, argp, sizeof mce))
2726                         goto out;
2727                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2728                 break;
2729         }
2730         case KVM_GET_VCPU_EVENTS: {
2731                 struct kvm_vcpu_events events;
2732
2733                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2734
2735                 r = -EFAULT;
2736                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2737                         break;
2738                 r = 0;
2739                 break;
2740         }
2741         case KVM_SET_VCPU_EVENTS: {
2742                 struct kvm_vcpu_events events;
2743
2744                 r = -EFAULT;
2745                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2746                         break;
2747
2748                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2749                 break;
2750         }
2751         case KVM_GET_DEBUGREGS: {
2752                 struct kvm_debugregs dbgregs;
2753
2754                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2755
2756                 r = -EFAULT;
2757                 if (copy_to_user(argp, &dbgregs,
2758                                  sizeof(struct kvm_debugregs)))
2759                         break;
2760                 r = 0;
2761                 break;
2762         }
2763         case KVM_SET_DEBUGREGS: {
2764                 struct kvm_debugregs dbgregs;
2765
2766                 r = -EFAULT;
2767                 if (copy_from_user(&dbgregs, argp,
2768                                    sizeof(struct kvm_debugregs)))
2769                         break;
2770
2771                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2772                 break;
2773         }
2774         case KVM_GET_XSAVE: {
2775                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2776                 r = -ENOMEM;
2777                 if (!u.xsave)
2778                         break;
2779
2780                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2781
2782                 r = -EFAULT;
2783                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2784                         break;
2785                 r = 0;
2786                 break;
2787         }
2788         case KVM_SET_XSAVE: {
2789                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2790                 if (IS_ERR(u.xsave)) {
2791                         r = PTR_ERR(u.xsave);
2792                         goto out;
2793                 }
2794
2795                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2796                 break;
2797         }
2798         case KVM_GET_XCRS: {
2799                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2800                 r = -ENOMEM;
2801                 if (!u.xcrs)
2802                         break;
2803
2804                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2805
2806                 r = -EFAULT;
2807                 if (copy_to_user(argp, u.xcrs,
2808                                  sizeof(struct kvm_xcrs)))
2809                         break;
2810                 r = 0;
2811                 break;
2812         }
2813         case KVM_SET_XCRS: {
2814                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2815                 if (IS_ERR(u.xcrs)) {
2816                         r = PTR_ERR(u.xcrs);
2817                         goto out;
2818                 }
2819
2820                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2821                 break;
2822         }
2823         case KVM_SET_TSC_KHZ: {
2824                 u32 user_tsc_khz;
2825
2826                 r = -EINVAL;
2827                 user_tsc_khz = (u32)arg;
2828
2829                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2830                         goto out;
2831
2832                 if (user_tsc_khz == 0)
2833                         user_tsc_khz = tsc_khz;
2834
2835                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2836
2837                 r = 0;
2838                 goto out;
2839         }
2840         case KVM_GET_TSC_KHZ: {
2841                 r = vcpu->arch.virtual_tsc_khz;
2842                 goto out;
2843         }
2844         default:
2845                 r = -EINVAL;
2846         }
2847 out:
2848         kfree(u.buffer);
2849         return r;
2850 }
2851
2852 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2853 {
2854         return VM_FAULT_SIGBUS;
2855 }
2856
2857 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2858 {
2859         int ret;
2860
2861         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2862                 return -1;
2863         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2864         return ret;
2865 }
2866
2867 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2868                                               u64 ident_addr)
2869 {
2870         kvm->arch.ept_identity_map_addr = ident_addr;
2871         return 0;
2872 }
2873
2874 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2875                                           u32 kvm_nr_mmu_pages)
2876 {
2877         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2878                 return -EINVAL;
2879
2880         mutex_lock(&kvm->slots_lock);
2881         spin_lock(&kvm->mmu_lock);
2882
2883         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2884         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2885
2886         spin_unlock(&kvm->mmu_lock);
2887         mutex_unlock(&kvm->slots_lock);
2888         return 0;
2889 }
2890
2891 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2892 {
2893         return kvm->arch.n_max_mmu_pages;
2894 }
2895
2896 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2897 {
2898         int r;
2899
2900         r = 0;
2901         switch (chip->chip_id) {
2902         case KVM_IRQCHIP_PIC_MASTER:
2903                 memcpy(&chip->chip.pic,
2904                         &pic_irqchip(kvm)->pics[0],
2905                         sizeof(struct kvm_pic_state));
2906                 break;
2907         case KVM_IRQCHIP_PIC_SLAVE:
2908                 memcpy(&chip->chip.pic,
2909                         &pic_irqchip(kvm)->pics[1],
2910                         sizeof(struct kvm_pic_state));
2911                 break;
2912         case KVM_IRQCHIP_IOAPIC:
2913                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2914                 break;
2915         default:
2916                 r = -EINVAL;
2917                 break;
2918         }
2919         return r;
2920 }
2921
2922 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2923 {
2924         int r;
2925
2926         r = 0;
2927         switch (chip->chip_id) {
2928         case KVM_IRQCHIP_PIC_MASTER:
2929                 spin_lock(&pic_irqchip(kvm)->lock);
2930                 memcpy(&pic_irqchip(kvm)->pics[0],
2931                         &chip->chip.pic,
2932                         sizeof(struct kvm_pic_state));
2933                 spin_unlock(&pic_irqchip(kvm)->lock);
2934                 break;
2935         case KVM_IRQCHIP_PIC_SLAVE:
2936                 spin_lock(&pic_irqchip(kvm)->lock);
2937                 memcpy(&pic_irqchip(kvm)->pics[1],
2938                         &chip->chip.pic,
2939                         sizeof(struct kvm_pic_state));
2940                 spin_unlock(&pic_irqchip(kvm)->lock);
2941                 break;
2942         case KVM_IRQCHIP_IOAPIC:
2943                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2944                 break;
2945         default:
2946                 r = -EINVAL;
2947                 break;
2948         }
2949         kvm_pic_update_irq(pic_irqchip(kvm));
2950         return r;
2951 }
2952
2953 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2954 {
2955         int r = 0;
2956
2957         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2958         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2959         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2960         return r;
2961 }
2962
2963 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2964 {
2965         int r = 0;
2966
2967         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2968         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2969         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2970         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2971         return r;
2972 }
2973
2974 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2975 {
2976         int r = 0;
2977
2978         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2979         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2980                 sizeof(ps->channels));
2981         ps->flags = kvm->arch.vpit->pit_state.flags;
2982         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2983         memset(&ps->reserved, 0, sizeof(ps->reserved));
2984         return r;
2985 }
2986
2987 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2988 {
2989         int r = 0, start = 0;
2990         u32 prev_legacy, cur_legacy;
2991         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2992         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2993         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2994         if (!prev_legacy && cur_legacy)
2995                 start = 1;
2996         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2997                sizeof(kvm->arch.vpit->pit_state.channels));
2998         kvm->arch.vpit->pit_state.flags = ps->flags;
2999         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3000         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3001         return r;
3002 }
3003
3004 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3005                                  struct kvm_reinject_control *control)
3006 {
3007         if (!kvm->arch.vpit)
3008                 return -ENXIO;
3009         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3010         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3011         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3012         return 0;
3013 }
3014
3015 /**
3016  * write_protect_slot - write protect a slot for dirty logging
3017  * @kvm: the kvm instance
3018  * @memslot: the slot we protect
3019  * @dirty_bitmap: the bitmap indicating which pages are dirty
3020  * @nr_dirty_pages: the number of dirty pages
3021  *
3022  * We have two ways to find all sptes to protect:
3023  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
3024  *    checks ones that have a spte mapping a page in the slot.
3025  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
3026  *
3027  * Generally speaking, if there are not so many dirty pages compared to the
3028  * number of shadow pages, we should use the latter.
3029  *
3030  * Note that letting others write into a page marked dirty in the old bitmap
3031  * by using the remaining tlb entry is not a problem.  That page will become
3032  * write protected again when we flush the tlb and then be reported dirty to
3033  * the user space by copying the old bitmap.
3034  */
3035 static void write_protect_slot(struct kvm *kvm,
3036                                struct kvm_memory_slot *memslot,
3037                                unsigned long *dirty_bitmap,
3038                                unsigned long nr_dirty_pages)
3039 {
3040         /* Not many dirty pages compared to # of shadow pages. */
3041         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3042                 unsigned long gfn_offset;
3043
3044                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3045                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3046
3047                         spin_lock(&kvm->mmu_lock);
3048                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3049                         spin_unlock(&kvm->mmu_lock);
3050                 }
3051                 kvm_flush_remote_tlbs(kvm);
3052         } else {
3053                 spin_lock(&kvm->mmu_lock);
3054                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3055                 spin_unlock(&kvm->mmu_lock);
3056         }
3057 }
3058
3059 /*
3060  * Get (and clear) the dirty memory log for a memory slot.
3061  */
3062 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3063                                       struct kvm_dirty_log *log)
3064 {
3065         int r;
3066         struct kvm_memory_slot *memslot;
3067         unsigned long n, nr_dirty_pages;
3068
3069         mutex_lock(&kvm->slots_lock);
3070
3071         r = -EINVAL;
3072         if (log->slot >= KVM_MEMORY_SLOTS)
3073                 goto out;
3074
3075         memslot = id_to_memslot(kvm->memslots, log->slot);
3076         r = -ENOENT;
3077         if (!memslot->dirty_bitmap)
3078                 goto out;
3079
3080         n = kvm_dirty_bitmap_bytes(memslot);
3081         nr_dirty_pages = memslot->nr_dirty_pages;
3082
3083         /* If nothing is dirty, don't bother messing with page tables. */
3084         if (nr_dirty_pages) {
3085                 struct kvm_memslots *slots, *old_slots;
3086                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3087
3088                 dirty_bitmap = memslot->dirty_bitmap;
3089                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3090                 if (dirty_bitmap == dirty_bitmap_head)
3091                         dirty_bitmap_head += n / sizeof(long);
3092                 memset(dirty_bitmap_head, 0, n);
3093
3094                 r = -ENOMEM;
3095                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3096                 if (!slots)
3097                         goto out;
3098
3099                 memslot = id_to_memslot(slots, log->slot);
3100                 memslot->nr_dirty_pages = 0;
3101                 memslot->dirty_bitmap = dirty_bitmap_head;
3102                 update_memslots(slots, NULL);
3103
3104                 old_slots = kvm->memslots;
3105                 rcu_assign_pointer(kvm->memslots, slots);
3106                 synchronize_srcu_expedited(&kvm->srcu);
3107                 kfree(old_slots);
3108
3109                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3110
3111                 r = -EFAULT;
3112                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3113                         goto out;
3114         } else {
3115                 r = -EFAULT;
3116                 if (clear_user(log->dirty_bitmap, n))
3117                         goto out;
3118         }
3119
3120         r = 0;
3121 out:
3122         mutex_unlock(&kvm->slots_lock);
3123         return r;
3124 }
3125
3126 long kvm_arch_vm_ioctl(struct file *filp,
3127                        unsigned int ioctl, unsigned long arg)
3128 {
3129         struct kvm *kvm = filp->private_data;
3130         void __user *argp = (void __user *)arg;
3131         int r = -ENOTTY;
3132         /*
3133          * This union makes it completely explicit to gcc-3.x
3134          * that these two variables' stack usage should be
3135          * combined, not added together.
3136          */
3137         union {
3138                 struct kvm_pit_state ps;
3139                 struct kvm_pit_state2 ps2;
3140                 struct kvm_pit_config pit_config;
3141         } u;
3142
3143         switch (ioctl) {
3144         case KVM_SET_TSS_ADDR:
3145                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3146                 if (r < 0)
3147                         goto out;
3148                 break;
3149         case KVM_SET_IDENTITY_MAP_ADDR: {
3150                 u64 ident_addr;
3151
3152                 r = -EFAULT;
3153                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3154                         goto out;
3155                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3156                 if (r < 0)
3157                         goto out;
3158                 break;
3159         }
3160         case KVM_SET_NR_MMU_PAGES:
3161                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3162                 if (r)
3163                         goto out;
3164                 break;
3165         case KVM_GET_NR_MMU_PAGES:
3166                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3167                 break;
3168         case KVM_CREATE_IRQCHIP: {
3169                 struct kvm_pic *vpic;
3170
3171                 mutex_lock(&kvm->lock);
3172                 r = -EEXIST;
3173                 if (kvm->arch.vpic)
3174                         goto create_irqchip_unlock;
3175                 r = -ENOMEM;
3176                 vpic = kvm_create_pic(kvm);
3177                 if (vpic) {
3178                         r = kvm_ioapic_init(kvm);
3179                         if (r) {
3180                                 mutex_lock(&kvm->slots_lock);
3181                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3182                                                           &vpic->dev_master);
3183                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3184                                                           &vpic->dev_slave);
3185                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3186                                                           &vpic->dev_eclr);
3187                                 mutex_unlock(&kvm->slots_lock);
3188                                 kfree(vpic);
3189                                 goto create_irqchip_unlock;
3190                         }
3191                 } else
3192                         goto create_irqchip_unlock;
3193                 smp_wmb();
3194                 kvm->arch.vpic = vpic;
3195                 smp_wmb();
3196                 r = kvm_setup_default_irq_routing(kvm);
3197                 if (r) {
3198                         mutex_lock(&kvm->slots_lock);
3199                         mutex_lock(&kvm->irq_lock);
3200                         kvm_ioapic_destroy(kvm);
3201                         kvm_destroy_pic(kvm);
3202                         mutex_unlock(&kvm->irq_lock);
3203                         mutex_unlock(&kvm->slots_lock);
3204                 }
3205         create_irqchip_unlock:
3206                 mutex_unlock(&kvm->lock);
3207                 break;
3208         }
3209         case KVM_CREATE_PIT:
3210                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3211                 goto create_pit;
3212         case KVM_CREATE_PIT2:
3213                 r = -EFAULT;
3214                 if (copy_from_user(&u.pit_config, argp,
3215                                    sizeof(struct kvm_pit_config)))
3216                         goto out;
3217         create_pit:
3218                 mutex_lock(&kvm->slots_lock);
3219                 r = -EEXIST;
3220                 if (kvm->arch.vpit)
3221                         goto create_pit_unlock;
3222                 r = -ENOMEM;
3223                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3224                 if (kvm->arch.vpit)
3225                         r = 0;
3226         create_pit_unlock:
3227                 mutex_unlock(&kvm->slots_lock);
3228                 break;
3229         case KVM_IRQ_LINE_STATUS:
3230         case KVM_IRQ_LINE: {
3231                 struct kvm_irq_level irq_event;
3232
3233                 r = -EFAULT;
3234                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3235                         goto out;
3236                 r = -ENXIO;
3237                 if (irqchip_in_kernel(kvm)) {
3238                         __s32 status;
3239                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3240                                         irq_event.irq, irq_event.level);
3241                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3242                                 r = -EFAULT;
3243                                 irq_event.status = status;
3244                                 if (copy_to_user(argp, &irq_event,
3245                                                         sizeof irq_event))
3246                                         goto out;
3247                         }
3248                         r = 0;
3249                 }
3250                 break;
3251         }
3252         case KVM_GET_IRQCHIP: {
3253                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3254                 struct kvm_irqchip *chip;
3255
3256                 chip = memdup_user(argp, sizeof(*chip));
3257                 if (IS_ERR(chip)) {
3258                         r = PTR_ERR(chip);
3259                         goto out;
3260                 }
3261
3262                 r = -ENXIO;
3263                 if (!irqchip_in_kernel(kvm))
3264                         goto get_irqchip_out;
3265                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3266                 if (r)
3267                         goto get_irqchip_out;
3268                 r = -EFAULT;
3269                 if (copy_to_user(argp, chip, sizeof *chip))
3270                         goto get_irqchip_out;
3271                 r = 0;
3272         get_irqchip_out:
3273                 kfree(chip);
3274                 if (r)
3275                         goto out;
3276                 break;
3277         }
3278         case KVM_SET_IRQCHIP: {
3279                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3280                 struct kvm_irqchip *chip;
3281
3282                 chip = memdup_user(argp, sizeof(*chip));
3283                 if (IS_ERR(chip)) {
3284                         r = PTR_ERR(chip);
3285                         goto out;
3286                 }
3287
3288                 r = -ENXIO;
3289                 if (!irqchip_in_kernel(kvm))
3290                         goto set_irqchip_out;
3291                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3292                 if (r)
3293                         goto set_irqchip_out;
3294                 r = 0;
3295         set_irqchip_out:
3296                 kfree(chip);
3297                 if (r)
3298                         goto out;
3299                 break;
3300         }
3301         case KVM_GET_PIT: {
3302                 r = -EFAULT;
3303                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3304                         goto out;
3305                 r = -ENXIO;
3306                 if (!kvm->arch.vpit)
3307                         goto out;
3308                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3309                 if (r)
3310                         goto out;
3311                 r = -EFAULT;
3312                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3313                         goto out;
3314                 r = 0;
3315                 break;
3316         }
3317         case KVM_SET_PIT: {
3318                 r = -EFAULT;
3319                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3320                         goto out;
3321                 r = -ENXIO;
3322                 if (!kvm->arch.vpit)
3323                         goto out;
3324                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3325                 if (r)
3326                         goto out;
3327                 r = 0;
3328                 break;
3329         }
3330         case KVM_GET_PIT2: {
3331                 r = -ENXIO;
3332                 if (!kvm->arch.vpit)
3333                         goto out;
3334                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3335                 if (r)
3336                         goto out;
3337                 r = -EFAULT;
3338                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3339                         goto out;
3340                 r = 0;
3341                 break;
3342         }
3343         case KVM_SET_PIT2: {
3344                 r = -EFAULT;
3345                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3346                         goto out;
3347                 r = -ENXIO;
3348                 if (!kvm->arch.vpit)
3349                         goto out;
3350                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3351                 if (r)
3352                         goto out;
3353                 r = 0;
3354                 break;
3355         }
3356         case KVM_REINJECT_CONTROL: {
3357                 struct kvm_reinject_control control;
3358                 r =  -EFAULT;
3359                 if (copy_from_user(&control, argp, sizeof(control)))
3360                         goto out;
3361                 r = kvm_vm_ioctl_reinject(kvm, &control);
3362                 if (r)
3363                         goto out;
3364                 r = 0;
3365                 break;
3366         }
3367         case KVM_XEN_HVM_CONFIG: {
3368                 r = -EFAULT;
3369                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3370                                    sizeof(struct kvm_xen_hvm_config)))
3371                         goto out;
3372                 r = -EINVAL;
3373                 if (kvm->arch.xen_hvm_config.flags)
3374                         goto out;
3375                 r = 0;
3376                 break;
3377         }
3378         case KVM_SET_CLOCK: {
3379                 struct kvm_clock_data user_ns;
3380                 u64 now_ns;
3381                 s64 delta;
3382
3383                 r = -EFAULT;
3384                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3385                         goto out;
3386
3387                 r = -EINVAL;
3388                 if (user_ns.flags)
3389                         goto out;
3390
3391                 r = 0;
3392                 local_irq_disable();
3393                 now_ns = get_kernel_ns();
3394                 delta = user_ns.clock - now_ns;
3395                 local_irq_enable();
3396                 kvm->arch.kvmclock_offset = delta;
3397                 break;
3398         }
3399         case KVM_GET_CLOCK: {
3400                 struct kvm_clock_data user_ns;
3401                 u64 now_ns;
3402
3403                 local_irq_disable();
3404                 now_ns = get_kernel_ns();
3405                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3406                 local_irq_enable();
3407                 user_ns.flags = 0;
3408                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3409
3410                 r = -EFAULT;
3411                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3412                         goto out;
3413                 r = 0;
3414                 break;
3415         }
3416
3417         default:
3418                 ;
3419         }
3420 out:
3421         return r;
3422 }
3423
3424 static void kvm_init_msr_list(void)
3425 {
3426         u32 dummy[2];
3427         unsigned i, j;
3428
3429         /* skip the first msrs in the list. KVM-specific */
3430         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3431                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3432                         continue;
3433                 if (j < i)
3434                         msrs_to_save[j] = msrs_to_save[i];
3435                 j++;
3436         }
3437         num_msrs_to_save = j;
3438 }
3439
3440 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3441                            const void *v)
3442 {
3443         int handled = 0;
3444         int n;
3445
3446         do {
3447                 n = min(len, 8);
3448                 if (!(vcpu->arch.apic &&
3449                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3450                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3451                         break;
3452                 handled += n;
3453                 addr += n;
3454                 len -= n;
3455                 v += n;
3456         } while (len);
3457
3458         return handled;
3459 }
3460
3461 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3462 {
3463         int handled = 0;
3464         int n;
3465
3466         do {
3467                 n = min(len, 8);
3468                 if (!(vcpu->arch.apic &&
3469                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3470                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3471                         break;
3472                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3473                 handled += n;
3474                 addr += n;
3475                 len -= n;
3476                 v += n;
3477         } while (len);
3478
3479         return handled;
3480 }
3481
3482 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3483                         struct kvm_segment *var, int seg)
3484 {
3485         kvm_x86_ops->set_segment(vcpu, var, seg);
3486 }
3487
3488 void kvm_get_segment(struct kvm_vcpu *vcpu,
3489                      struct kvm_segment *var, int seg)
3490 {
3491         kvm_x86_ops->get_segment(vcpu, var, seg);
3492 }
3493
3494 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3495 {
3496         gpa_t t_gpa;
3497         struct x86_exception exception;
3498
3499         BUG_ON(!mmu_is_nested(vcpu));
3500
3501         /* NPT walks are always user-walks */
3502         access |= PFERR_USER_MASK;
3503         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3504
3505         return t_gpa;
3506 }
3507
3508 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3509                               struct x86_exception *exception)
3510 {
3511         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3512         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3513 }
3514
3515  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3516                                 struct x86_exception *exception)
3517 {
3518         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3519         access |= PFERR_FETCH_MASK;
3520         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3521 }
3522
3523 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3524                                struct x86_exception *exception)
3525 {
3526         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3527         access |= PFERR_WRITE_MASK;
3528         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3529 }
3530
3531 /* uses this to access any guest's mapped memory without checking CPL */
3532 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3533                                 struct x86_exception *exception)
3534 {
3535         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3536 }
3537
3538 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3539                                       struct kvm_vcpu *vcpu, u32 access,
3540                                       struct x86_exception *exception)
3541 {
3542         void *data = val;
3543         int r = X86EMUL_CONTINUE;
3544
3545         while (bytes) {
3546                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3547                                                             exception);
3548                 unsigned offset = addr & (PAGE_SIZE-1);
3549                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3550                 int ret;
3551
3552                 if (gpa == UNMAPPED_GVA)
3553                         return X86EMUL_PROPAGATE_FAULT;
3554                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3555                 if (ret < 0) {
3556                         r = X86EMUL_IO_NEEDED;
3557                         goto out;
3558                 }
3559
3560                 bytes -= toread;
3561                 data += toread;
3562                 addr += toread;
3563         }
3564 out:
3565         return r;
3566 }
3567
3568 /* used for instruction fetching */
3569 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3570                                 gva_t addr, void *val, unsigned int bytes,
3571                                 struct x86_exception *exception)
3572 {
3573         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3574         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3575
3576         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3577                                           access | PFERR_FETCH_MASK,
3578                                           exception);
3579 }
3580
3581 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3582                                gva_t addr, void *val, unsigned int bytes,
3583                                struct x86_exception *exception)
3584 {
3585         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3586         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3587
3588         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3589                                           exception);
3590 }
3591 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3592
3593 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3594                                       gva_t addr, void *val, unsigned int bytes,
3595                                       struct x86_exception *exception)
3596 {
3597         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3598         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3599 }
3600
3601 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3602                                        gva_t addr, void *val,
3603                                        unsigned int bytes,
3604                                        struct x86_exception *exception)
3605 {
3606         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3607         void *data = val;
3608         int r = X86EMUL_CONTINUE;
3609
3610         while (bytes) {
3611                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3612                                                              PFERR_WRITE_MASK,
3613                                                              exception);
3614                 unsigned offset = addr & (PAGE_SIZE-1);
3615                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3616                 int ret;
3617
3618                 if (gpa == UNMAPPED_GVA)
3619                         return X86EMUL_PROPAGATE_FAULT;
3620                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3621                 if (ret < 0) {
3622                         r = X86EMUL_IO_NEEDED;
3623                         goto out;
3624                 }
3625
3626                 bytes -= towrite;
3627                 data += towrite;
3628                 addr += towrite;
3629         }
3630 out:
3631         return r;
3632 }
3633 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3634
3635 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3636                                 gpa_t *gpa, struct x86_exception *exception,
3637                                 bool write)
3638 {
3639         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3640
3641         if (vcpu_match_mmio_gva(vcpu, gva) &&
3642                   check_write_user_access(vcpu, write, access,
3643                   vcpu->arch.access)) {
3644                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3645                                         (gva & (PAGE_SIZE - 1));
3646                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3647                 return 1;
3648         }
3649
3650         if (write)
3651                 access |= PFERR_WRITE_MASK;
3652
3653         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3654
3655         if (*gpa == UNMAPPED_GVA)
3656                 return -1;
3657
3658         /* For APIC access vmexit */
3659         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3660                 return 1;
3661
3662         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3663                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3664                 return 1;
3665         }
3666
3667         return 0;
3668 }
3669
3670 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3671                         const void *val, int bytes)
3672 {
3673         int ret;
3674
3675         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3676         if (ret < 0)
3677                 return 0;
3678         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3679         return 1;
3680 }
3681
3682 struct read_write_emulator_ops {
3683         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3684                                   int bytes);
3685         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3686                                   void *val, int bytes);
3687         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3688                                int bytes, void *val);
3689         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3690                                     void *val, int bytes);
3691         bool write;
3692 };
3693
3694 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3695 {
3696         if (vcpu->mmio_read_completed) {
3697                 memcpy(val, vcpu->mmio_data, bytes);
3698                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3699                                vcpu->mmio_phys_addr, *(u64 *)val);
3700                 vcpu->mmio_read_completed = 0;
3701                 return 1;
3702         }
3703
3704         return 0;
3705 }
3706
3707 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3708                         void *val, int bytes)
3709 {
3710         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3711 }
3712
3713 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3714                          void *val, int bytes)
3715 {
3716         return emulator_write_phys(vcpu, gpa, val, bytes);
3717 }
3718
3719 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3720 {
3721         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3722         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3723 }
3724
3725 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3726                           void *val, int bytes)
3727 {
3728         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3729         return X86EMUL_IO_NEEDED;
3730 }
3731
3732 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3733                            void *val, int bytes)
3734 {
3735         memcpy(vcpu->mmio_data, val, bytes);
3736         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3737         return X86EMUL_CONTINUE;
3738 }
3739
3740 static struct read_write_emulator_ops read_emultor = {
3741         .read_write_prepare = read_prepare,
3742         .read_write_emulate = read_emulate,
3743         .read_write_mmio = vcpu_mmio_read,
3744         .read_write_exit_mmio = read_exit_mmio,
3745 };
3746
3747 static struct read_write_emulator_ops write_emultor = {
3748         .read_write_emulate = write_emulate,
3749         .read_write_mmio = write_mmio,
3750         .read_write_exit_mmio = write_exit_mmio,
3751         .write = true,
3752 };
3753
3754 static int emulator_read_write_onepage(unsigned long addr, void *val,
3755                                        unsigned int bytes,
3756                                        struct x86_exception *exception,
3757                                        struct kvm_vcpu *vcpu,
3758                                        struct read_write_emulator_ops *ops)
3759 {
3760         gpa_t gpa;
3761         int handled, ret;
3762         bool write = ops->write;
3763
3764         if (ops->read_write_prepare &&
3765                   ops->read_write_prepare(vcpu, val, bytes))
3766                 return X86EMUL_CONTINUE;
3767
3768         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3769
3770         if (ret < 0)
3771                 return X86EMUL_PROPAGATE_FAULT;
3772
3773         /* For APIC access vmexit */
3774         if (ret)
3775                 goto mmio;
3776
3777         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3778                 return X86EMUL_CONTINUE;
3779
3780 mmio:
3781         /*
3782          * Is this MMIO handled locally?
3783          */
3784         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3785         if (handled == bytes)
3786                 return X86EMUL_CONTINUE;
3787
3788         gpa += handled;
3789         bytes -= handled;
3790         val += handled;
3791
3792         vcpu->mmio_needed = 1;
3793         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3794         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3795         vcpu->mmio_size = bytes;
3796         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3797         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3798         vcpu->mmio_index = 0;
3799
3800         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3801 }
3802
3803 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3804                         void *val, unsigned int bytes,
3805                         struct x86_exception *exception,
3806                         struct read_write_emulator_ops *ops)
3807 {
3808         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3809
3810         /* Crossing a page boundary? */
3811         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3812                 int rc, now;
3813
3814                 now = -addr & ~PAGE_MASK;
3815                 rc = emulator_read_write_onepage(addr, val, now, exception,
3816                                                  vcpu, ops);
3817
3818                 if (rc != X86EMUL_CONTINUE)
3819                         return rc;
3820                 addr += now;
3821                 val += now;
3822                 bytes -= now;
3823         }
3824
3825         return emulator_read_write_onepage(addr, val, bytes, exception,
3826                                            vcpu, ops);
3827 }
3828
3829 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3830                                   unsigned long addr,
3831                                   void *val,
3832                                   unsigned int bytes,
3833                                   struct x86_exception *exception)
3834 {
3835         return emulator_read_write(ctxt, addr, val, bytes,
3836                                    exception, &read_emultor);
3837 }
3838
3839 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3840                             unsigned long addr,
3841                             const void *val,
3842                             unsigned int bytes,
3843                             struct x86_exception *exception)
3844 {
3845         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3846                                    exception, &write_emultor);
3847 }
3848
3849 #define CMPXCHG_TYPE(t, ptr, old, new) \
3850         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3851
3852 #ifdef CONFIG_X86_64
3853 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3854 #else
3855 #  define CMPXCHG64(ptr, old, new) \
3856         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3857 #endif
3858
3859 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3860                                      unsigned long addr,
3861                                      const void *old,
3862                                      const void *new,
3863                                      unsigned int bytes,
3864                                      struct x86_exception *exception)
3865 {
3866         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3867         gpa_t gpa;
3868         struct page *page;
3869         char *kaddr;
3870         bool exchanged;
3871
3872         /* guests cmpxchg8b have to be emulated atomically */
3873         if (bytes > 8 || (bytes & (bytes - 1)))
3874                 goto emul_write;
3875
3876         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3877
3878         if (gpa == UNMAPPED_GVA ||
3879             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3880                 goto emul_write;
3881
3882         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3883                 goto emul_write;
3884
3885         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3886         if (is_error_page(page)) {
3887                 kvm_release_page_clean(page);
3888                 goto emul_write;
3889         }
3890
3891         kaddr = kmap_atomic(page, KM_USER0);
3892         kaddr += offset_in_page(gpa);
3893         switch (bytes) {
3894         case 1:
3895                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3896                 break;
3897         case 2:
3898                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3899                 break;
3900         case 4:
3901                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3902                 break;
3903         case 8:
3904                 exchanged = CMPXCHG64(kaddr, old, new);
3905                 break;
3906         default:
3907                 BUG();
3908         }
3909         kunmap_atomic(kaddr, KM_USER0);
3910         kvm_release_page_dirty(page);
3911
3912         if (!exchanged)
3913                 return X86EMUL_CMPXCHG_FAILED;
3914
3915         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3916
3917         return X86EMUL_CONTINUE;
3918
3919 emul_write:
3920         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3921
3922         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3923 }
3924
3925 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3926 {
3927         /* TODO: String I/O for in kernel device */
3928         int r;
3929
3930         if (vcpu->arch.pio.in)
3931                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3932                                     vcpu->arch.pio.size, pd);
3933         else
3934                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3935                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3936                                      pd);
3937         return r;
3938 }
3939
3940 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3941                                unsigned short port, void *val,
3942                                unsigned int count, bool in)
3943 {
3944         trace_kvm_pio(!in, port, size, count);
3945
3946         vcpu->arch.pio.port = port;
3947         vcpu->arch.pio.in = in;
3948         vcpu->arch.pio.count  = count;
3949         vcpu->arch.pio.size = size;
3950
3951         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3952                 vcpu->arch.pio.count = 0;
3953                 return 1;
3954         }
3955
3956         vcpu->run->exit_reason = KVM_EXIT_IO;
3957         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3958         vcpu->run->io.size = size;
3959         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3960         vcpu->run->io.count = count;
3961         vcpu->run->io.port = port;
3962
3963         return 0;
3964 }
3965
3966 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3967                                     int size, unsigned short port, void *val,
3968                                     unsigned int count)
3969 {
3970         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3971         int ret;
3972
3973         if (vcpu->arch.pio.count)
3974                 goto data_avail;
3975
3976         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3977         if (ret) {
3978 data_avail:
3979                 memcpy(val, vcpu->arch.pio_data, size * count);
3980                 vcpu->arch.pio.count = 0;
3981                 return 1;
3982         }
3983
3984         return 0;
3985 }
3986
3987 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3988                                      int size, unsigned short port,
3989                                      const void *val, unsigned int count)
3990 {
3991         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3992
3993         memcpy(vcpu->arch.pio_data, val, size * count);
3994         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3995 }
3996
3997 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3998 {
3999         return kvm_x86_ops->get_segment_base(vcpu, seg);
4000 }
4001
4002 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4003 {
4004         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4005 }
4006
4007 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4008 {
4009         if (!need_emulate_wbinvd(vcpu))
4010                 return X86EMUL_CONTINUE;
4011
4012         if (kvm_x86_ops->has_wbinvd_exit()) {
4013                 int cpu = get_cpu();
4014
4015                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4016                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4017                                 wbinvd_ipi, NULL, 1);
4018                 put_cpu();
4019                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4020         } else
4021                 wbinvd();
4022         return X86EMUL_CONTINUE;
4023 }
4024 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4025
4026 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4027 {
4028         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4029 }
4030
4031 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4032 {
4033         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4034 }
4035
4036 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4037 {
4038
4039         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4040 }
4041
4042 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4043 {
4044         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4045 }
4046
4047 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4048 {
4049         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4050         unsigned long value;
4051
4052         switch (cr) {
4053         case 0:
4054                 value = kvm_read_cr0(vcpu);
4055                 break;
4056         case 2:
4057                 value = vcpu->arch.cr2;
4058                 break;
4059         case 3:
4060                 value = kvm_read_cr3(vcpu);
4061                 break;
4062         case 4:
4063                 value = kvm_read_cr4(vcpu);
4064                 break;
4065         case 8:
4066                 value = kvm_get_cr8(vcpu);
4067                 break;
4068         default:
4069                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4070                 return 0;
4071         }
4072
4073         return value;
4074 }
4075
4076 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4077 {
4078         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4079         int res = 0;
4080
4081         switch (cr) {
4082         case 0:
4083                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4084                 break;
4085         case 2:
4086                 vcpu->arch.cr2 = val;
4087                 break;
4088         case 3:
4089                 res = kvm_set_cr3(vcpu, val);
4090                 break;
4091         case 4:
4092                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4093                 break;
4094         case 8:
4095                 res = kvm_set_cr8(vcpu, val);
4096                 break;
4097         default:
4098                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4099                 res = -1;
4100         }
4101
4102         return res;
4103 }
4104
4105 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4106 {
4107         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4108 }
4109
4110 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4111 {
4112         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4113 }
4114
4115 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4116 {
4117         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4118 }
4119
4120 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4121 {
4122         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4123 }
4124
4125 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4126 {
4127         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4128 }
4129
4130 static unsigned long emulator_get_cached_segment_base(
4131         struct x86_emulate_ctxt *ctxt, int seg)
4132 {
4133         return get_segment_base(emul_to_vcpu(ctxt), seg);
4134 }
4135
4136 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4137                                  struct desc_struct *desc, u32 *base3,
4138                                  int seg)
4139 {
4140         struct kvm_segment var;
4141
4142         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4143         *selector = var.selector;
4144
4145         if (var.unusable)
4146                 return false;
4147
4148         if (var.g)
4149                 var.limit >>= 12;
4150         set_desc_limit(desc, var.limit);
4151         set_desc_base(desc, (unsigned long)var.base);
4152 #ifdef CONFIG_X86_64
4153         if (base3)
4154                 *base3 = var.base >> 32;
4155 #endif
4156         desc->type = var.type;
4157         desc->s = var.s;
4158         desc->dpl = var.dpl;
4159         desc->p = var.present;
4160         desc->avl = var.avl;
4161         desc->l = var.l;
4162         desc->d = var.db;
4163         desc->g = var.g;
4164
4165         return true;
4166 }
4167
4168 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4169                                  struct desc_struct *desc, u32 base3,
4170                                  int seg)
4171 {
4172         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4173         struct kvm_segment var;
4174
4175         var.selector = selector;
4176         var.base = get_desc_base(desc);
4177 #ifdef CONFIG_X86_64
4178         var.base |= ((u64)base3) << 32;
4179 #endif
4180         var.limit = get_desc_limit(desc);
4181         if (desc->g)
4182                 var.limit = (var.limit << 12) | 0xfff;
4183         var.type = desc->type;
4184         var.present = desc->p;
4185         var.dpl = desc->dpl;
4186         var.db = desc->d;
4187         var.s = desc->s;
4188         var.l = desc->l;
4189         var.g = desc->g;
4190         var.avl = desc->avl;
4191         var.present = desc->p;
4192         var.unusable = !var.present;
4193         var.padding = 0;
4194
4195         kvm_set_segment(vcpu, &var, seg);
4196         return;
4197 }
4198
4199 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4200                             u32 msr_index, u64 *pdata)
4201 {
4202         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4203 }
4204
4205 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4206                             u32 msr_index, u64 data)
4207 {
4208         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4209 }
4210
4211 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4212                              u32 pmc, u64 *pdata)
4213 {
4214         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4215 }
4216
4217 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4218 {
4219         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4220 }
4221
4222 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4223 {
4224         preempt_disable();
4225         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4226         /*
4227          * CR0.TS may reference the host fpu state, not the guest fpu state,
4228          * so it may be clear at this point.
4229          */
4230         clts();
4231 }
4232
4233 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4234 {
4235         preempt_enable();
4236 }
4237
4238 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4239                               struct x86_instruction_info *info,
4240                               enum x86_intercept_stage stage)
4241 {
4242         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4243 }
4244
4245 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4246                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4247 {
4248         struct kvm_cpuid_entry2 *cpuid = NULL;
4249
4250         if (eax && ecx)
4251                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4252                                             *eax, *ecx);
4253
4254         if (cpuid) {
4255                 *eax = cpuid->eax;
4256                 *ecx = cpuid->ecx;
4257                 if (ebx)
4258                         *ebx = cpuid->ebx;
4259                 if (edx)
4260                         *edx = cpuid->edx;
4261                 return true;
4262         }
4263
4264         return false;
4265 }
4266
4267 static struct x86_emulate_ops emulate_ops = {
4268         .read_std            = kvm_read_guest_virt_system,
4269         .write_std           = kvm_write_guest_virt_system,
4270         .fetch               = kvm_fetch_guest_virt,
4271         .read_emulated       = emulator_read_emulated,
4272         .write_emulated      = emulator_write_emulated,
4273         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4274         .invlpg              = emulator_invlpg,
4275         .pio_in_emulated     = emulator_pio_in_emulated,
4276         .pio_out_emulated    = emulator_pio_out_emulated,
4277         .get_segment         = emulator_get_segment,
4278         .set_segment         = emulator_set_segment,
4279         .get_cached_segment_base = emulator_get_cached_segment_base,
4280         .get_gdt             = emulator_get_gdt,
4281         .get_idt             = emulator_get_idt,
4282         .set_gdt             = emulator_set_gdt,
4283         .set_idt             = emulator_set_idt,
4284         .get_cr              = emulator_get_cr,
4285         .set_cr              = emulator_set_cr,
4286         .cpl                 = emulator_get_cpl,
4287         .get_dr              = emulator_get_dr,
4288         .set_dr              = emulator_set_dr,
4289         .set_msr             = emulator_set_msr,
4290         .get_msr             = emulator_get_msr,
4291         .read_pmc            = emulator_read_pmc,
4292         .halt                = emulator_halt,
4293         .wbinvd              = emulator_wbinvd,
4294         .fix_hypercall       = emulator_fix_hypercall,
4295         .get_fpu             = emulator_get_fpu,
4296         .put_fpu             = emulator_put_fpu,
4297         .intercept           = emulator_intercept,
4298         .get_cpuid           = emulator_get_cpuid,
4299 };
4300
4301 static void cache_all_regs(struct kvm_vcpu *vcpu)
4302 {
4303         kvm_register_read(vcpu, VCPU_REGS_RAX);
4304         kvm_register_read(vcpu, VCPU_REGS_RSP);
4305         kvm_register_read(vcpu, VCPU_REGS_RIP);
4306         vcpu->arch.regs_dirty = ~0;
4307 }
4308
4309 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4310 {
4311         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4312         /*
4313          * an sti; sti; sequence only disable interrupts for the first
4314          * instruction. So, if the last instruction, be it emulated or
4315          * not, left the system with the INT_STI flag enabled, it
4316          * means that the last instruction is an sti. We should not
4317          * leave the flag on in this case. The same goes for mov ss
4318          */
4319         if (!(int_shadow & mask))
4320                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4321 }
4322
4323 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4324 {
4325         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4326         if (ctxt->exception.vector == PF_VECTOR)
4327                 kvm_propagate_fault(vcpu, &ctxt->exception);
4328         else if (ctxt->exception.error_code_valid)
4329                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4330                                       ctxt->exception.error_code);
4331         else
4332                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4333 }
4334
4335 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4336                               const unsigned long *regs)
4337 {
4338         memset(&ctxt->twobyte, 0,
4339                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4340         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4341
4342         ctxt->fetch.start = 0;
4343         ctxt->fetch.end = 0;
4344         ctxt->io_read.pos = 0;
4345         ctxt->io_read.end = 0;
4346         ctxt->mem_read.pos = 0;
4347         ctxt->mem_read.end = 0;
4348 }
4349
4350 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4351 {
4352         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4353         int cs_db, cs_l;
4354
4355         /*
4356          * TODO: fix emulate.c to use guest_read/write_register
4357          * instead of direct ->regs accesses, can save hundred cycles
4358          * on Intel for instructions that don't read/change RSP, for
4359          * for example.
4360          */
4361         cache_all_regs(vcpu);
4362
4363         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4364
4365         ctxt->eflags = kvm_get_rflags(vcpu);
4366         ctxt->eip = kvm_rip_read(vcpu);
4367         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4368                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4369                      cs_l                               ? X86EMUL_MODE_PROT64 :
4370                      cs_db                              ? X86EMUL_MODE_PROT32 :
4371                                                           X86EMUL_MODE_PROT16;
4372         ctxt->guest_mode = is_guest_mode(vcpu);
4373
4374         init_decode_cache(ctxt, vcpu->arch.regs);
4375         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4376 }
4377
4378 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4379 {
4380         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4381         int ret;
4382
4383         init_emulate_ctxt(vcpu);
4384
4385         ctxt->op_bytes = 2;
4386         ctxt->ad_bytes = 2;
4387         ctxt->_eip = ctxt->eip + inc_eip;
4388         ret = emulate_int_real(ctxt, irq);
4389
4390         if (ret != X86EMUL_CONTINUE)
4391                 return EMULATE_FAIL;
4392
4393         ctxt->eip = ctxt->_eip;
4394         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4395         kvm_rip_write(vcpu, ctxt->eip);
4396         kvm_set_rflags(vcpu, ctxt->eflags);
4397
4398         if (irq == NMI_VECTOR)
4399                 vcpu->arch.nmi_pending = 0;
4400         else
4401                 vcpu->arch.interrupt.pending = false;
4402
4403         return EMULATE_DONE;
4404 }
4405 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4406
4407 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4408 {
4409         int r = EMULATE_DONE;
4410
4411         ++vcpu->stat.insn_emulation_fail;
4412         trace_kvm_emulate_insn_failed(vcpu);
4413         if (!is_guest_mode(vcpu)) {
4414                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4415                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4416                 vcpu->run->internal.ndata = 0;
4417                 r = EMULATE_FAIL;
4418         }
4419         kvm_queue_exception(vcpu, UD_VECTOR);
4420
4421         return r;
4422 }
4423
4424 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4425 {
4426         gpa_t gpa;
4427
4428         if (tdp_enabled)
4429                 return false;
4430
4431         /*
4432          * if emulation was due to access to shadowed page table
4433          * and it failed try to unshadow page and re-entetr the
4434          * guest to let CPU execute the instruction.
4435          */
4436         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4437                 return true;
4438
4439         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4440
4441         if (gpa == UNMAPPED_GVA)
4442                 return true; /* let cpu generate fault */
4443
4444         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4445                 return true;
4446
4447         return false;
4448 }
4449
4450 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4451                               unsigned long cr2,  int emulation_type)
4452 {
4453         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4454         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4455
4456         last_retry_eip = vcpu->arch.last_retry_eip;
4457         last_retry_addr = vcpu->arch.last_retry_addr;
4458
4459         /*
4460          * If the emulation is caused by #PF and it is non-page_table
4461          * writing instruction, it means the VM-EXIT is caused by shadow
4462          * page protected, we can zap the shadow page and retry this
4463          * instruction directly.
4464          *
4465          * Note: if the guest uses a non-page-table modifying instruction
4466          * on the PDE that points to the instruction, then we will unmap
4467          * the instruction and go to an infinite loop. So, we cache the
4468          * last retried eip and the last fault address, if we meet the eip
4469          * and the address again, we can break out of the potential infinite
4470          * loop.
4471          */
4472         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4473
4474         if (!(emulation_type & EMULTYPE_RETRY))
4475                 return false;
4476
4477         if (x86_page_table_writing_insn(ctxt))
4478                 return false;
4479
4480         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4481                 return false;
4482
4483         vcpu->arch.last_retry_eip = ctxt->eip;
4484         vcpu->arch.last_retry_addr = cr2;
4485
4486         if (!vcpu->arch.mmu.direct_map)
4487                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4488
4489         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4490
4491         return true;
4492 }
4493
4494 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4495                             unsigned long cr2,
4496                             int emulation_type,
4497                             void *insn,
4498                             int insn_len)
4499 {
4500         int r;
4501         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4502         bool writeback = true;
4503
4504         kvm_clear_exception_queue(vcpu);
4505
4506         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4507                 init_emulate_ctxt(vcpu);
4508                 ctxt->interruptibility = 0;
4509                 ctxt->have_exception = false;
4510                 ctxt->perm_ok = false;
4511
4512                 ctxt->only_vendor_specific_insn
4513                         = emulation_type & EMULTYPE_TRAP_UD;
4514
4515                 r = x86_decode_insn(ctxt, insn, insn_len);
4516
4517                 trace_kvm_emulate_insn_start(vcpu);
4518                 ++vcpu->stat.insn_emulation;
4519                 if (r != EMULATION_OK)  {
4520                         if (emulation_type & EMULTYPE_TRAP_UD)
4521                                 return EMULATE_FAIL;
4522                         if (reexecute_instruction(vcpu, cr2))
4523                                 return EMULATE_DONE;
4524                         if (emulation_type & EMULTYPE_SKIP)
4525                                 return EMULATE_FAIL;
4526                         return handle_emulation_failure(vcpu);
4527                 }
4528         }
4529
4530         if (emulation_type & EMULTYPE_SKIP) {
4531                 kvm_rip_write(vcpu, ctxt->_eip);
4532                 return EMULATE_DONE;
4533         }
4534
4535         if (retry_instruction(ctxt, cr2, emulation_type))
4536                 return EMULATE_DONE;
4537
4538         /* this is needed for vmware backdoor interface to work since it
4539            changes registers values  during IO operation */
4540         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4541                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4542                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4543         }
4544
4545 restart:
4546         r = x86_emulate_insn(ctxt);
4547
4548         if (r == EMULATION_INTERCEPTED)
4549                 return EMULATE_DONE;
4550
4551         if (r == EMULATION_FAILED) {
4552                 if (reexecute_instruction(vcpu, cr2))
4553                         return EMULATE_DONE;
4554
4555                 return handle_emulation_failure(vcpu);
4556         }
4557
4558         if (ctxt->have_exception) {
4559                 inject_emulated_exception(vcpu);
4560                 r = EMULATE_DONE;
4561         } else if (vcpu->arch.pio.count) {
4562                 if (!vcpu->arch.pio.in)
4563                         vcpu->arch.pio.count = 0;
4564                 else
4565                         writeback = false;
4566                 r = EMULATE_DO_MMIO;
4567         } else if (vcpu->mmio_needed) {
4568                 if (!vcpu->mmio_is_write)
4569                         writeback = false;
4570                 r = EMULATE_DO_MMIO;
4571         } else if (r == EMULATION_RESTART)
4572                 goto restart;
4573         else
4574                 r = EMULATE_DONE;
4575
4576         if (writeback) {
4577                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4578                 kvm_set_rflags(vcpu, ctxt->eflags);
4579                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4580                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4581                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4582                 kvm_rip_write(vcpu, ctxt->eip);
4583         } else
4584                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4585
4586         return r;
4587 }
4588 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4589
4590 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4591 {
4592         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4593         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4594                                             size, port, &val, 1);
4595         /* do not return to emulator after return from userspace */
4596         vcpu->arch.pio.count = 0;
4597         return ret;
4598 }
4599 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4600
4601 static void tsc_bad(void *info)
4602 {
4603         __this_cpu_write(cpu_tsc_khz, 0);
4604 }
4605
4606 static void tsc_khz_changed(void *data)
4607 {
4608         struct cpufreq_freqs *freq = data;
4609         unsigned long khz = 0;
4610
4611         if (data)
4612                 khz = freq->new;
4613         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4614                 khz = cpufreq_quick_get(raw_smp_processor_id());
4615         if (!khz)
4616                 khz = tsc_khz;
4617         __this_cpu_write(cpu_tsc_khz, khz);
4618 }
4619
4620 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4621                                      void *data)
4622 {
4623         struct cpufreq_freqs *freq = data;
4624         struct kvm *kvm;
4625         struct kvm_vcpu *vcpu;
4626         int i, send_ipi = 0;
4627
4628         /*
4629          * We allow guests to temporarily run on slowing clocks,
4630          * provided we notify them after, or to run on accelerating
4631          * clocks, provided we notify them before.  Thus time never
4632          * goes backwards.
4633          *
4634          * However, we have a problem.  We can't atomically update
4635          * the frequency of a given CPU from this function; it is
4636          * merely a notifier, which can be called from any CPU.
4637          * Changing the TSC frequency at arbitrary points in time
4638          * requires a recomputation of local variables related to
4639          * the TSC for each VCPU.  We must flag these local variables
4640          * to be updated and be sure the update takes place with the
4641          * new frequency before any guests proceed.
4642          *
4643          * Unfortunately, the combination of hotplug CPU and frequency
4644          * change creates an intractable locking scenario; the order
4645          * of when these callouts happen is undefined with respect to
4646          * CPU hotplug, and they can race with each other.  As such,
4647          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4648          * undefined; you can actually have a CPU frequency change take
4649          * place in between the computation of X and the setting of the
4650          * variable.  To protect against this problem, all updates of
4651          * the per_cpu tsc_khz variable are done in an interrupt
4652          * protected IPI, and all callers wishing to update the value
4653          * must wait for a synchronous IPI to complete (which is trivial
4654          * if the caller is on the CPU already).  This establishes the
4655          * necessary total order on variable updates.
4656          *
4657          * Note that because a guest time update may take place
4658          * anytime after the setting of the VCPU's request bit, the
4659          * correct TSC value must be set before the request.  However,
4660          * to ensure the update actually makes it to any guest which
4661          * starts running in hardware virtualization between the set
4662          * and the acquisition of the spinlock, we must also ping the
4663          * CPU after setting the request bit.
4664          *
4665          */
4666
4667         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4668                 return 0;
4669         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4670                 return 0;
4671
4672         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4673
4674         raw_spin_lock(&kvm_lock);
4675         list_for_each_entry(kvm, &vm_list, vm_list) {
4676                 kvm_for_each_vcpu(i, vcpu, kvm) {
4677                         if (vcpu->cpu != freq->cpu)
4678                                 continue;
4679                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4680                         if (vcpu->cpu != smp_processor_id())
4681                                 send_ipi = 1;
4682                 }
4683         }
4684         raw_spin_unlock(&kvm_lock);
4685
4686         if (freq->old < freq->new && send_ipi) {
4687                 /*
4688                  * We upscale the frequency.  Must make the guest
4689                  * doesn't see old kvmclock values while running with
4690                  * the new frequency, otherwise we risk the guest sees
4691                  * time go backwards.
4692                  *
4693                  * In case we update the frequency for another cpu
4694                  * (which might be in guest context) send an interrupt
4695                  * to kick the cpu out of guest context.  Next time
4696                  * guest context is entered kvmclock will be updated,
4697                  * so the guest will not see stale values.
4698                  */
4699                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4700         }
4701         return 0;
4702 }
4703
4704 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4705         .notifier_call  = kvmclock_cpufreq_notifier
4706 };
4707
4708 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4709                                         unsigned long action, void *hcpu)
4710 {
4711         unsigned int cpu = (unsigned long)hcpu;
4712
4713         switch (action) {
4714                 case CPU_ONLINE:
4715                 case CPU_DOWN_FAILED:
4716                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4717                         break;
4718                 case CPU_DOWN_PREPARE:
4719                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4720                         break;
4721         }
4722         return NOTIFY_OK;
4723 }
4724
4725 static struct notifier_block kvmclock_cpu_notifier_block = {
4726         .notifier_call  = kvmclock_cpu_notifier,
4727         .priority = -INT_MAX
4728 };
4729
4730 static void kvm_timer_init(void)
4731 {
4732         int cpu;
4733
4734         max_tsc_khz = tsc_khz;
4735         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4736         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4737 #ifdef CONFIG_CPU_FREQ
4738                 struct cpufreq_policy policy;
4739                 memset(&policy, 0, sizeof(policy));
4740                 cpu = get_cpu();
4741                 cpufreq_get_policy(&policy, cpu);
4742                 if (policy.cpuinfo.max_freq)
4743                         max_tsc_khz = policy.cpuinfo.max_freq;
4744                 put_cpu();
4745 #endif
4746                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4747                                           CPUFREQ_TRANSITION_NOTIFIER);
4748         }
4749         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4750         for_each_online_cpu(cpu)
4751                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4752 }
4753
4754 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4755
4756 int kvm_is_in_guest(void)
4757 {
4758         return __this_cpu_read(current_vcpu) != NULL;
4759 }
4760
4761 static int kvm_is_user_mode(void)
4762 {
4763         int user_mode = 3;
4764
4765         if (__this_cpu_read(current_vcpu))
4766                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4767
4768         return user_mode != 0;
4769 }
4770
4771 static unsigned long kvm_get_guest_ip(void)
4772 {
4773         unsigned long ip = 0;
4774
4775         if (__this_cpu_read(current_vcpu))
4776                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4777
4778         return ip;
4779 }
4780
4781 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4782         .is_in_guest            = kvm_is_in_guest,
4783         .is_user_mode           = kvm_is_user_mode,
4784         .get_guest_ip           = kvm_get_guest_ip,
4785 };
4786
4787 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4788 {
4789         __this_cpu_write(current_vcpu, vcpu);
4790 }
4791 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4792
4793 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4794 {
4795         __this_cpu_write(current_vcpu, NULL);
4796 }
4797 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4798
4799 static void kvm_set_mmio_spte_mask(void)
4800 {
4801         u64 mask;
4802         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4803
4804         /*
4805          * Set the reserved bits and the present bit of an paging-structure
4806          * entry to generate page fault with PFER.RSV = 1.
4807          */
4808         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4809         mask |= 1ull;
4810
4811 #ifdef CONFIG_X86_64
4812         /*
4813          * If reserved bit is not supported, clear the present bit to disable
4814          * mmio page fault.
4815          */
4816         if (maxphyaddr == 52)
4817                 mask &= ~1ull;
4818 #endif
4819
4820         kvm_mmu_set_mmio_spte_mask(mask);
4821 }
4822
4823 int kvm_arch_init(void *opaque)
4824 {
4825         int r;
4826         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4827
4828         if (kvm_x86_ops) {
4829                 printk(KERN_ERR "kvm: already loaded the other module\n");
4830                 r = -EEXIST;
4831                 goto out;
4832         }
4833
4834         if (!ops->cpu_has_kvm_support()) {
4835                 printk(KERN_ERR "kvm: no hardware support\n");
4836                 r = -EOPNOTSUPP;
4837                 goto out;
4838         }
4839         if (ops->disabled_by_bios()) {
4840                 printk(KERN_ERR "kvm: disabled by bios\n");
4841                 r = -EOPNOTSUPP;
4842                 goto out;
4843         }
4844
4845         r = kvm_mmu_module_init();
4846         if (r)
4847                 goto out;
4848
4849         kvm_set_mmio_spte_mask();
4850         kvm_init_msr_list();
4851
4852         kvm_x86_ops = ops;
4853         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4854                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4855
4856         kvm_timer_init();
4857
4858         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4859
4860         if (cpu_has_xsave)
4861                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4862
4863         return 0;
4864
4865 out:
4866         return r;
4867 }
4868
4869 void kvm_arch_exit(void)
4870 {
4871         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4872
4873         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4874                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4875                                             CPUFREQ_TRANSITION_NOTIFIER);
4876         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4877         kvm_x86_ops = NULL;
4878         kvm_mmu_module_exit();
4879 }
4880
4881 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4882 {
4883         ++vcpu->stat.halt_exits;
4884         if (irqchip_in_kernel(vcpu->kvm)) {
4885                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4886                 return 1;
4887         } else {
4888                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4889                 return 0;
4890         }
4891 }
4892 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4893
4894 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4895 {
4896         u64 param, ingpa, outgpa, ret;
4897         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4898         bool fast, longmode;
4899         int cs_db, cs_l;
4900
4901         /*
4902          * hypercall generates UD from non zero cpl and real mode
4903          * per HYPER-V spec
4904          */
4905         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4906                 kvm_queue_exception(vcpu, UD_VECTOR);
4907                 return 0;
4908         }
4909
4910         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4911         longmode = is_long_mode(vcpu) && cs_l == 1;
4912
4913         if (!longmode) {
4914                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4915                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4916                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4917                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4918                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4919                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4920         }
4921 #ifdef CONFIG_X86_64
4922         else {
4923                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4924                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4925                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4926         }
4927 #endif
4928
4929         code = param & 0xffff;
4930         fast = (param >> 16) & 0x1;
4931         rep_cnt = (param >> 32) & 0xfff;
4932         rep_idx = (param >> 48) & 0xfff;
4933
4934         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4935
4936         switch (code) {
4937         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4938                 kvm_vcpu_on_spin(vcpu);
4939                 break;
4940         default:
4941                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4942                 break;
4943         }
4944
4945         ret = res | (((u64)rep_done & 0xfff) << 32);
4946         if (longmode) {
4947                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4948         } else {
4949                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4950                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4951         }
4952
4953         return 1;
4954 }
4955
4956 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4957 {
4958         unsigned long nr, a0, a1, a2, a3, ret;
4959         int r = 1;
4960
4961         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4962                 return kvm_hv_hypercall(vcpu);
4963
4964         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4965         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4966         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4967         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4968         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4969
4970         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4971
4972         if (!is_long_mode(vcpu)) {
4973                 nr &= 0xFFFFFFFF;
4974                 a0 &= 0xFFFFFFFF;
4975                 a1 &= 0xFFFFFFFF;
4976                 a2 &= 0xFFFFFFFF;
4977                 a3 &= 0xFFFFFFFF;
4978         }
4979
4980         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4981                 ret = -KVM_EPERM;
4982                 goto out;
4983         }
4984
4985         switch (nr) {
4986         case KVM_HC_VAPIC_POLL_IRQ:
4987                 ret = 0;
4988                 break;
4989         default:
4990                 ret = -KVM_ENOSYS;
4991                 break;
4992         }
4993 out:
4994         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4995         ++vcpu->stat.hypercalls;
4996         return r;
4997 }
4998 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4999
5000 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5001 {
5002         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5003         char instruction[3];
5004         unsigned long rip = kvm_rip_read(vcpu);
5005
5006         /*
5007          * Blow out the MMU to ensure that no other VCPU has an active mapping
5008          * to ensure that the updated hypercall appears atomically across all
5009          * VCPUs.
5010          */
5011         kvm_mmu_zap_all(vcpu->kvm);
5012
5013         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5014
5015         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5016 }
5017
5018 /*
5019  * Check if userspace requested an interrupt window, and that the
5020  * interrupt window is open.
5021  *
5022  * No need to exit to userspace if we already have an interrupt queued.
5023  */
5024 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5025 {
5026         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5027                 vcpu->run->request_interrupt_window &&
5028                 kvm_arch_interrupt_allowed(vcpu));
5029 }
5030
5031 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5032 {
5033         struct kvm_run *kvm_run = vcpu->run;
5034
5035         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5036         kvm_run->cr8 = kvm_get_cr8(vcpu);
5037         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5038         if (irqchip_in_kernel(vcpu->kvm))
5039                 kvm_run->ready_for_interrupt_injection = 1;
5040         else
5041                 kvm_run->ready_for_interrupt_injection =
5042                         kvm_arch_interrupt_allowed(vcpu) &&
5043                         !kvm_cpu_has_interrupt(vcpu) &&
5044                         !kvm_event_needs_reinjection(vcpu);
5045 }
5046
5047 static void vapic_enter(struct kvm_vcpu *vcpu)
5048 {
5049         struct kvm_lapic *apic = vcpu->arch.apic;
5050         struct page *page;
5051
5052         if (!apic || !apic->vapic_addr)
5053                 return;
5054
5055         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5056
5057         vcpu->arch.apic->vapic_page = page;
5058 }
5059
5060 static void vapic_exit(struct kvm_vcpu *vcpu)
5061 {
5062         struct kvm_lapic *apic = vcpu->arch.apic;
5063         int idx;
5064
5065         if (!apic || !apic->vapic_addr)
5066                 return;
5067
5068         idx = srcu_read_lock(&vcpu->kvm->srcu);
5069         kvm_release_page_dirty(apic->vapic_page);
5070         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5071         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5072 }
5073
5074 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5075 {
5076         int max_irr, tpr;
5077
5078         if (!kvm_x86_ops->update_cr8_intercept)
5079                 return;
5080
5081         if (!vcpu->arch.apic)
5082                 return;
5083
5084         if (!vcpu->arch.apic->vapic_addr)
5085                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5086         else
5087                 max_irr = -1;
5088
5089         if (max_irr != -1)
5090                 max_irr >>= 4;
5091
5092         tpr = kvm_lapic_get_cr8(vcpu);
5093
5094         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5095 }
5096
5097 static void inject_pending_event(struct kvm_vcpu *vcpu)
5098 {
5099         /* try to reinject previous events if any */
5100         if (vcpu->arch.exception.pending) {
5101                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5102                                         vcpu->arch.exception.has_error_code,
5103                                         vcpu->arch.exception.error_code);
5104                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5105                                           vcpu->arch.exception.has_error_code,
5106                                           vcpu->arch.exception.error_code,
5107                                           vcpu->arch.exception.reinject);
5108                 return;
5109         }
5110
5111         if (vcpu->arch.nmi_injected) {
5112                 kvm_x86_ops->set_nmi(vcpu);
5113                 return;
5114         }
5115
5116         if (vcpu->arch.interrupt.pending) {
5117                 kvm_x86_ops->set_irq(vcpu);
5118                 return;
5119         }
5120
5121         /* try to inject new event if pending */
5122         if (vcpu->arch.nmi_pending) {
5123                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5124                         --vcpu->arch.nmi_pending;
5125                         vcpu->arch.nmi_injected = true;
5126                         kvm_x86_ops->set_nmi(vcpu);
5127                 }
5128         } else if (kvm_cpu_has_interrupt(vcpu)) {
5129                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5130                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5131                                             false);
5132                         kvm_x86_ops->set_irq(vcpu);
5133                 }
5134         }
5135 }
5136
5137 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5138 {
5139         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5140                         !vcpu->guest_xcr0_loaded) {
5141                 /* kvm_set_xcr() also depends on this */
5142                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5143                 vcpu->guest_xcr0_loaded = 1;
5144         }
5145 }
5146
5147 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5148 {
5149         if (vcpu->guest_xcr0_loaded) {
5150                 if (vcpu->arch.xcr0 != host_xcr0)
5151                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5152                 vcpu->guest_xcr0_loaded = 0;
5153         }
5154 }
5155
5156 static void process_nmi(struct kvm_vcpu *vcpu)
5157 {
5158         unsigned limit = 2;
5159
5160         /*
5161          * x86 is limited to one NMI running, and one NMI pending after it.
5162          * If an NMI is already in progress, limit further NMIs to just one.
5163          * Otherwise, allow two (and we'll inject the first one immediately).
5164          */
5165         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5166                 limit = 1;
5167
5168         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5169         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5170         kvm_make_request(KVM_REQ_EVENT, vcpu);
5171 }
5172
5173 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5174 {
5175         int r;
5176         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5177                 vcpu->run->request_interrupt_window;
5178         bool req_immediate_exit = 0;
5179
5180         if (vcpu->requests) {
5181                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5182                         kvm_mmu_unload(vcpu);
5183                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5184                         __kvm_migrate_timers(vcpu);
5185                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5186                         r = kvm_guest_time_update(vcpu);
5187                         if (unlikely(r))
5188                                 goto out;
5189                 }
5190                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5191                         kvm_mmu_sync_roots(vcpu);
5192                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5193                         kvm_x86_ops->tlb_flush(vcpu);
5194                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5195                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5196                         r = 0;
5197                         goto out;
5198                 }
5199                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5200                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5201                         r = 0;
5202                         goto out;
5203                 }
5204                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5205                         vcpu->fpu_active = 0;
5206                         kvm_x86_ops->fpu_deactivate(vcpu);
5207                 }
5208                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5209                         /* Page is swapped out. Do synthetic halt */
5210                         vcpu->arch.apf.halted = true;
5211                         r = 1;
5212                         goto out;
5213                 }
5214                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5215                         record_steal_time(vcpu);
5216                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5217                         process_nmi(vcpu);
5218                 req_immediate_exit =
5219                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5220                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5221                         kvm_handle_pmu_event(vcpu);
5222                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5223                         kvm_deliver_pmi(vcpu);
5224         }
5225
5226         r = kvm_mmu_reload(vcpu);
5227         if (unlikely(r))
5228                 goto out;
5229
5230         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5231                 inject_pending_event(vcpu);
5232
5233                 /* enable NMI/IRQ window open exits if needed */
5234                 if (vcpu->arch.nmi_pending)
5235                         kvm_x86_ops->enable_nmi_window(vcpu);
5236                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5237                         kvm_x86_ops->enable_irq_window(vcpu);
5238
5239                 if (kvm_lapic_enabled(vcpu)) {
5240                         update_cr8_intercept(vcpu);
5241                         kvm_lapic_sync_to_vapic(vcpu);
5242                 }
5243         }
5244
5245         preempt_disable();
5246
5247         kvm_x86_ops->prepare_guest_switch(vcpu);
5248         if (vcpu->fpu_active)
5249                 kvm_load_guest_fpu(vcpu);
5250         kvm_load_guest_xcr0(vcpu);
5251
5252         vcpu->mode = IN_GUEST_MODE;
5253
5254         /* We should set ->mode before check ->requests,
5255          * see the comment in make_all_cpus_request.
5256          */
5257         smp_mb();
5258
5259         local_irq_disable();
5260
5261         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5262             || need_resched() || signal_pending(current)) {
5263                 vcpu->mode = OUTSIDE_GUEST_MODE;
5264                 smp_wmb();
5265                 local_irq_enable();
5266                 preempt_enable();
5267                 kvm_x86_ops->cancel_injection(vcpu);
5268                 r = 1;
5269                 goto out;
5270         }
5271
5272         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5273
5274         if (req_immediate_exit)
5275                 smp_send_reschedule(vcpu->cpu);
5276
5277         kvm_guest_enter();
5278
5279         if (unlikely(vcpu->arch.switch_db_regs)) {
5280                 set_debugreg(0, 7);
5281                 set_debugreg(vcpu->arch.eff_db[0], 0);
5282                 set_debugreg(vcpu->arch.eff_db[1], 1);
5283                 set_debugreg(vcpu->arch.eff_db[2], 2);
5284                 set_debugreg(vcpu->arch.eff_db[3], 3);
5285         }
5286
5287         trace_kvm_entry(vcpu->vcpu_id);
5288         kvm_x86_ops->run(vcpu);
5289
5290         /*
5291          * If the guest has used debug registers, at least dr7
5292          * will be disabled while returning to the host.
5293          * If we don't have active breakpoints in the host, we don't
5294          * care about the messed up debug address registers. But if
5295          * we have some of them active, restore the old state.
5296          */
5297         if (hw_breakpoint_active())
5298                 hw_breakpoint_restore();
5299
5300         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5301
5302         vcpu->mode = OUTSIDE_GUEST_MODE;
5303         smp_wmb();
5304         local_irq_enable();
5305
5306         ++vcpu->stat.exits;
5307
5308         /*
5309          * We must have an instruction between local_irq_enable() and
5310          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5311          * the interrupt shadow.  The stat.exits increment will do nicely.
5312          * But we need to prevent reordering, hence this barrier():
5313          */
5314         barrier();
5315
5316         kvm_guest_exit();
5317
5318         preempt_enable();
5319
5320         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5321
5322         /*
5323          * Profile KVM exit RIPs:
5324          */
5325         if (unlikely(prof_on == KVM_PROFILING)) {
5326                 unsigned long rip = kvm_rip_read(vcpu);
5327                 profile_hit(KVM_PROFILING, (void *)rip);
5328         }
5329
5330         if (unlikely(vcpu->arch.tsc_always_catchup))
5331                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5332
5333         kvm_lapic_sync_from_vapic(vcpu);
5334
5335         r = kvm_x86_ops->handle_exit(vcpu);
5336 out:
5337         return r;
5338 }
5339
5340
5341 static int __vcpu_run(struct kvm_vcpu *vcpu)
5342 {
5343         int r;
5344         struct kvm *kvm = vcpu->kvm;
5345
5346         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5347                 pr_debug("vcpu %d received sipi with vector # %x\n",
5348                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5349                 kvm_lapic_reset(vcpu);
5350                 r = kvm_arch_vcpu_reset(vcpu);
5351                 if (r)
5352                         return r;
5353                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5354         }
5355
5356         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5357         vapic_enter(vcpu);
5358
5359         r = 1;
5360         while (r > 0) {
5361                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5362                     !vcpu->arch.apf.halted)
5363                         r = vcpu_enter_guest(vcpu);
5364                 else {
5365                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5366                         kvm_vcpu_block(vcpu);
5367                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5368                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5369                         {
5370                                 switch(vcpu->arch.mp_state) {
5371                                 case KVM_MP_STATE_HALTED:
5372                                         vcpu->arch.mp_state =
5373                                                 KVM_MP_STATE_RUNNABLE;
5374                                 case KVM_MP_STATE_RUNNABLE:
5375                                         vcpu->arch.apf.halted = false;
5376                                         break;
5377                                 case KVM_MP_STATE_SIPI_RECEIVED:
5378                                 default:
5379                                         r = -EINTR;
5380                                         break;
5381                                 }
5382                         }
5383                 }
5384
5385                 if (r <= 0)
5386                         break;
5387
5388                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5389                 if (kvm_cpu_has_pending_timer(vcpu))
5390                         kvm_inject_pending_timer_irqs(vcpu);
5391
5392                 if (dm_request_for_irq_injection(vcpu)) {
5393                         r = -EINTR;
5394                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5395                         ++vcpu->stat.request_irq_exits;
5396                 }
5397
5398                 kvm_check_async_pf_completion(vcpu);
5399
5400                 if (signal_pending(current)) {
5401                         r = -EINTR;
5402                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5403                         ++vcpu->stat.signal_exits;
5404                 }
5405                 if (need_resched()) {
5406                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5407                         kvm_resched(vcpu);
5408                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5409                 }
5410         }
5411
5412         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5413
5414         vapic_exit(vcpu);
5415
5416         return r;
5417 }
5418
5419 static int complete_mmio(struct kvm_vcpu *vcpu)
5420 {
5421         struct kvm_run *run = vcpu->run;
5422         int r;
5423
5424         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5425                 return 1;
5426
5427         if (vcpu->mmio_needed) {
5428                 vcpu->mmio_needed = 0;
5429                 if (!vcpu->mmio_is_write)
5430                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5431                                run->mmio.data, 8);
5432                 vcpu->mmio_index += 8;
5433                 if (vcpu->mmio_index < vcpu->mmio_size) {
5434                         run->exit_reason = KVM_EXIT_MMIO;
5435                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5436                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5437                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5438                         run->mmio.is_write = vcpu->mmio_is_write;
5439                         vcpu->mmio_needed = 1;
5440                         return 0;
5441                 }
5442                 if (vcpu->mmio_is_write)
5443                         return 1;
5444                 vcpu->mmio_read_completed = 1;
5445         }
5446         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5447         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5448         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5449         if (r != EMULATE_DONE)
5450                 return 0;
5451         return 1;
5452 }
5453
5454 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5455 {
5456         int r;
5457         sigset_t sigsaved;
5458
5459         if (!tsk_used_math(current) && init_fpu(current))
5460                 return -ENOMEM;
5461
5462         if (vcpu->sigset_active)
5463                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5464
5465         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5466                 kvm_vcpu_block(vcpu);
5467                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5468                 r = -EAGAIN;
5469                 goto out;
5470         }
5471
5472         /* re-sync apic's tpr */
5473         if (!irqchip_in_kernel(vcpu->kvm)) {
5474                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5475                         r = -EINVAL;
5476                         goto out;
5477                 }
5478         }
5479
5480         r = complete_mmio(vcpu);
5481         if (r <= 0)
5482                 goto out;
5483
5484         r = __vcpu_run(vcpu);
5485
5486 out:
5487         post_kvm_run_save(vcpu);
5488         if (vcpu->sigset_active)
5489                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5490
5491         return r;
5492 }
5493
5494 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5495 {
5496         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5497                 /*
5498                  * We are here if userspace calls get_regs() in the middle of
5499                  * instruction emulation. Registers state needs to be copied
5500                  * back from emulation context to vcpu. Usrapace shouldn't do
5501                  * that usually, but some bad designed PV devices (vmware
5502                  * backdoor interface) need this to work
5503                  */
5504                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5505                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5506                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5507         }
5508         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5509         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5510         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5511         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5512         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5513         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5514         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5515         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5516 #ifdef CONFIG_X86_64
5517         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5518         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5519         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5520         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5521         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5522         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5523         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5524         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5525 #endif
5526
5527         regs->rip = kvm_rip_read(vcpu);
5528         regs->rflags = kvm_get_rflags(vcpu);
5529
5530         return 0;
5531 }
5532
5533 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5534 {
5535         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5536         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5537
5538         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5539         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5540         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5541         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5542         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5543         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5544         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5545         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5546 #ifdef CONFIG_X86_64
5547         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5548         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5549         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5550         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5551         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5552         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5553         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5554         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5555 #endif
5556
5557         kvm_rip_write(vcpu, regs->rip);
5558         kvm_set_rflags(vcpu, regs->rflags);
5559
5560         vcpu->arch.exception.pending = false;
5561
5562         kvm_make_request(KVM_REQ_EVENT, vcpu);
5563
5564         return 0;
5565 }
5566
5567 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5568 {
5569         struct kvm_segment cs;
5570
5571         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5572         *db = cs.db;
5573         *l = cs.l;
5574 }
5575 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5576
5577 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5578                                   struct kvm_sregs *sregs)
5579 {
5580         struct desc_ptr dt;
5581
5582         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5583         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5584         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5585         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5586         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5587         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5588
5589         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5590         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5591
5592         kvm_x86_ops->get_idt(vcpu, &dt);
5593         sregs->idt.limit = dt.size;
5594         sregs->idt.base = dt.address;
5595         kvm_x86_ops->get_gdt(vcpu, &dt);
5596         sregs->gdt.limit = dt.size;
5597         sregs->gdt.base = dt.address;
5598
5599         sregs->cr0 = kvm_read_cr0(vcpu);
5600         sregs->cr2 = vcpu->arch.cr2;
5601         sregs->cr3 = kvm_read_cr3(vcpu);
5602         sregs->cr4 = kvm_read_cr4(vcpu);
5603         sregs->cr8 = kvm_get_cr8(vcpu);
5604         sregs->efer = vcpu->arch.efer;
5605         sregs->apic_base = kvm_get_apic_base(vcpu);
5606
5607         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5608
5609         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5610                 set_bit(vcpu->arch.interrupt.nr,
5611                         (unsigned long *)sregs->interrupt_bitmap);
5612
5613         return 0;
5614 }
5615
5616 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5617                                     struct kvm_mp_state *mp_state)
5618 {
5619         mp_state->mp_state = vcpu->arch.mp_state;
5620         return 0;
5621 }
5622
5623 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5624                                     struct kvm_mp_state *mp_state)
5625 {
5626         vcpu->arch.mp_state = mp_state->mp_state;
5627         kvm_make_request(KVM_REQ_EVENT, vcpu);
5628         return 0;
5629 }
5630
5631 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5632                     bool has_error_code, u32 error_code)
5633 {
5634         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5635         int ret;
5636
5637         init_emulate_ctxt(vcpu);
5638
5639         ret = emulator_task_switch(ctxt, tss_selector, reason,
5640                                    has_error_code, error_code);
5641
5642         if (ret)
5643                 return EMULATE_FAIL;
5644
5645         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5646         kvm_rip_write(vcpu, ctxt->eip);
5647         kvm_set_rflags(vcpu, ctxt->eflags);
5648         kvm_make_request(KVM_REQ_EVENT, vcpu);
5649         return EMULATE_DONE;
5650 }
5651 EXPORT_SYMBOL_GPL(kvm_task_switch);
5652
5653 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5654                                   struct kvm_sregs *sregs)
5655 {
5656         int mmu_reset_needed = 0;
5657         int pending_vec, max_bits, idx;
5658         struct desc_ptr dt;
5659
5660         dt.size = sregs->idt.limit;
5661         dt.address = sregs->idt.base;
5662         kvm_x86_ops->set_idt(vcpu, &dt);
5663         dt.size = sregs->gdt.limit;
5664         dt.address = sregs->gdt.base;
5665         kvm_x86_ops->set_gdt(vcpu, &dt);
5666
5667         vcpu->arch.cr2 = sregs->cr2;
5668         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5669         vcpu->arch.cr3 = sregs->cr3;
5670         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5671
5672         kvm_set_cr8(vcpu, sregs->cr8);
5673
5674         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5675         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5676         kvm_set_apic_base(vcpu, sregs->apic_base);
5677
5678         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5679         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5680         vcpu->arch.cr0 = sregs->cr0;
5681
5682         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5683         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5684         if (sregs->cr4 & X86_CR4_OSXSAVE)
5685                 kvm_update_cpuid(vcpu);
5686
5687         idx = srcu_read_lock(&vcpu->kvm->srcu);
5688         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5689                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5690                 mmu_reset_needed = 1;
5691         }
5692         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5693
5694         if (mmu_reset_needed)
5695                 kvm_mmu_reset_context(vcpu);
5696
5697         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5698         pending_vec = find_first_bit(
5699                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5700         if (pending_vec < max_bits) {
5701                 kvm_queue_interrupt(vcpu, pending_vec, false);
5702                 pr_debug("Set back pending irq %d\n", pending_vec);
5703         }
5704
5705         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5706         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5707         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5708         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5709         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5710         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5711
5712         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5713         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5714
5715         update_cr8_intercept(vcpu);
5716
5717         /* Older userspace won't unhalt the vcpu on reset. */
5718         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5719             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5720             !is_protmode(vcpu))
5721                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5722
5723         kvm_make_request(KVM_REQ_EVENT, vcpu);
5724
5725         return 0;
5726 }
5727
5728 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5729                                         struct kvm_guest_debug *dbg)
5730 {
5731         unsigned long rflags;
5732         int i, r;
5733
5734         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5735                 r = -EBUSY;
5736                 if (vcpu->arch.exception.pending)
5737                         goto out;
5738                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5739                         kvm_queue_exception(vcpu, DB_VECTOR);
5740                 else
5741                         kvm_queue_exception(vcpu, BP_VECTOR);
5742         }
5743
5744         /*
5745          * Read rflags as long as potentially injected trace flags are still
5746          * filtered out.
5747          */
5748         rflags = kvm_get_rflags(vcpu);
5749
5750         vcpu->guest_debug = dbg->control;
5751         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5752                 vcpu->guest_debug = 0;
5753
5754         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5755                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5756                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5757                 vcpu->arch.switch_db_regs =
5758                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5759         } else {
5760                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5761                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5762                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5763         }
5764
5765         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5766                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5767                         get_segment_base(vcpu, VCPU_SREG_CS);
5768
5769         /*
5770          * Trigger an rflags update that will inject or remove the trace
5771          * flags.
5772          */
5773         kvm_set_rflags(vcpu, rflags);
5774
5775         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5776
5777         r = 0;
5778
5779 out:
5780
5781         return r;
5782 }
5783
5784 /*
5785  * Translate a guest virtual address to a guest physical address.
5786  */
5787 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5788                                     struct kvm_translation *tr)
5789 {
5790         unsigned long vaddr = tr->linear_address;
5791         gpa_t gpa;
5792         int idx;
5793
5794         idx = srcu_read_lock(&vcpu->kvm->srcu);
5795         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5796         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5797         tr->physical_address = gpa;
5798         tr->valid = gpa != UNMAPPED_GVA;
5799         tr->writeable = 1;
5800         tr->usermode = 0;
5801
5802         return 0;
5803 }
5804
5805 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5806 {
5807         struct i387_fxsave_struct *fxsave =
5808                         &vcpu->arch.guest_fpu.state->fxsave;
5809
5810         memcpy(fpu->fpr, fxsave->st_space, 128);
5811         fpu->fcw = fxsave->cwd;
5812         fpu->fsw = fxsave->swd;
5813         fpu->ftwx = fxsave->twd;
5814         fpu->last_opcode = fxsave->fop;
5815         fpu->last_ip = fxsave->rip;
5816         fpu->last_dp = fxsave->rdp;
5817         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5818
5819         return 0;
5820 }
5821
5822 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5823 {
5824         struct i387_fxsave_struct *fxsave =
5825                         &vcpu->arch.guest_fpu.state->fxsave;
5826
5827         memcpy(fxsave->st_space, fpu->fpr, 128);
5828         fxsave->cwd = fpu->fcw;
5829         fxsave->swd = fpu->fsw;
5830         fxsave->twd = fpu->ftwx;
5831         fxsave->fop = fpu->last_opcode;
5832         fxsave->rip = fpu->last_ip;
5833         fxsave->rdp = fpu->last_dp;
5834         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5835
5836         return 0;
5837 }
5838
5839 int fx_init(struct kvm_vcpu *vcpu)
5840 {
5841         int err;
5842
5843         err = fpu_alloc(&vcpu->arch.guest_fpu);
5844         if (err)
5845                 return err;
5846
5847         fpu_finit(&vcpu->arch.guest_fpu);
5848
5849         /*
5850          * Ensure guest xcr0 is valid for loading
5851          */
5852         vcpu->arch.xcr0 = XSTATE_FP;
5853
5854         vcpu->arch.cr0 |= X86_CR0_ET;
5855
5856         return 0;
5857 }
5858 EXPORT_SYMBOL_GPL(fx_init);
5859
5860 static void fx_free(struct kvm_vcpu *vcpu)
5861 {
5862         fpu_free(&vcpu->arch.guest_fpu);
5863 }
5864
5865 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5866 {
5867         if (vcpu->guest_fpu_loaded)
5868                 return;
5869
5870         /*
5871          * Restore all possible states in the guest,
5872          * and assume host would use all available bits.
5873          * Guest xcr0 would be loaded later.
5874          */
5875         kvm_put_guest_xcr0(vcpu);
5876         vcpu->guest_fpu_loaded = 1;
5877         unlazy_fpu(current);
5878         fpu_restore_checking(&vcpu->arch.guest_fpu);
5879         trace_kvm_fpu(1);
5880 }
5881
5882 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5883 {
5884         kvm_put_guest_xcr0(vcpu);
5885
5886         if (!vcpu->guest_fpu_loaded)
5887                 return;
5888
5889         vcpu->guest_fpu_loaded = 0;
5890         fpu_save_init(&vcpu->arch.guest_fpu);
5891         ++vcpu->stat.fpu_reload;
5892         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5893         trace_kvm_fpu(0);
5894 }
5895
5896 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5897 {
5898         kvmclock_reset(vcpu);
5899
5900         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5901         fx_free(vcpu);
5902         kvm_x86_ops->vcpu_free(vcpu);
5903 }
5904
5905 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5906                                                 unsigned int id)
5907 {
5908         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5909                 printk_once(KERN_WARNING
5910                 "kvm: SMP vm created on host with unstable TSC; "
5911                 "guest TSC will not be reliable\n");
5912         return kvm_x86_ops->vcpu_create(kvm, id);
5913 }
5914
5915 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5916 {
5917         int r;
5918
5919         vcpu->arch.mtrr_state.have_fixed = 1;
5920         vcpu_load(vcpu);
5921         r = kvm_arch_vcpu_reset(vcpu);
5922         if (r == 0)
5923                 r = kvm_mmu_setup(vcpu);
5924         vcpu_put(vcpu);
5925
5926         return r;
5927 }
5928
5929 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5930 {
5931         vcpu->arch.apf.msr_val = 0;
5932
5933         vcpu_load(vcpu);
5934         kvm_mmu_unload(vcpu);
5935         vcpu_put(vcpu);
5936
5937         fx_free(vcpu);
5938         kvm_x86_ops->vcpu_free(vcpu);
5939 }
5940
5941 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5942 {
5943         atomic_set(&vcpu->arch.nmi_queued, 0);
5944         vcpu->arch.nmi_pending = 0;
5945         vcpu->arch.nmi_injected = false;
5946
5947         vcpu->arch.switch_db_regs = 0;
5948         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5949         vcpu->arch.dr6 = DR6_FIXED_1;
5950         vcpu->arch.dr7 = DR7_FIXED_1;
5951
5952         kvm_make_request(KVM_REQ_EVENT, vcpu);
5953         vcpu->arch.apf.msr_val = 0;
5954         vcpu->arch.st.msr_val = 0;
5955
5956         kvmclock_reset(vcpu);
5957
5958         kvm_clear_async_pf_completion_queue(vcpu);
5959         kvm_async_pf_hash_reset(vcpu);
5960         vcpu->arch.apf.halted = false;
5961
5962         kvm_pmu_reset(vcpu);
5963
5964         return kvm_x86_ops->vcpu_reset(vcpu);
5965 }
5966
5967 int kvm_arch_hardware_enable(void *garbage)
5968 {
5969         struct kvm *kvm;
5970         struct kvm_vcpu *vcpu;
5971         int i;
5972
5973         kvm_shared_msr_cpu_online();
5974         list_for_each_entry(kvm, &vm_list, vm_list)
5975                 kvm_for_each_vcpu(i, vcpu, kvm)
5976                         if (vcpu->cpu == smp_processor_id())
5977                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5978         return kvm_x86_ops->hardware_enable(garbage);
5979 }
5980
5981 void kvm_arch_hardware_disable(void *garbage)
5982 {
5983         kvm_x86_ops->hardware_disable(garbage);
5984         drop_user_return_notifiers(garbage);
5985 }
5986
5987 int kvm_arch_hardware_setup(void)
5988 {
5989         return kvm_x86_ops->hardware_setup();
5990 }
5991
5992 void kvm_arch_hardware_unsetup(void)
5993 {
5994         kvm_x86_ops->hardware_unsetup();
5995 }
5996
5997 void kvm_arch_check_processor_compat(void *rtn)
5998 {
5999         kvm_x86_ops->check_processor_compatibility(rtn);
6000 }
6001
6002 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6003 {
6004         struct page *page;
6005         struct kvm *kvm;
6006         int r;
6007
6008         BUG_ON(vcpu->kvm == NULL);
6009         kvm = vcpu->kvm;
6010
6011         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6012         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6013                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6014         else
6015                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6016
6017         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6018         if (!page) {
6019                 r = -ENOMEM;
6020                 goto fail;
6021         }
6022         vcpu->arch.pio_data = page_address(page);
6023
6024         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6025
6026         r = kvm_mmu_create(vcpu);
6027         if (r < 0)
6028                 goto fail_free_pio_data;
6029
6030         if (irqchip_in_kernel(kvm)) {
6031                 r = kvm_create_lapic(vcpu);
6032                 if (r < 0)
6033                         goto fail_mmu_destroy;
6034         }
6035
6036         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6037                                        GFP_KERNEL);
6038         if (!vcpu->arch.mce_banks) {
6039                 r = -ENOMEM;
6040                 goto fail_free_lapic;
6041         }
6042         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6043
6044         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6045                 goto fail_free_mce_banks;
6046
6047         kvm_async_pf_hash_reset(vcpu);
6048         kvm_pmu_init(vcpu);
6049
6050         return 0;
6051 fail_free_mce_banks:
6052         kfree(vcpu->arch.mce_banks);
6053 fail_free_lapic:
6054         kvm_free_lapic(vcpu);
6055 fail_mmu_destroy:
6056         kvm_mmu_destroy(vcpu);
6057 fail_free_pio_data:
6058         free_page((unsigned long)vcpu->arch.pio_data);
6059 fail:
6060         return r;
6061 }
6062
6063 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6064 {
6065         int idx;
6066
6067         kvm_pmu_destroy(vcpu);
6068         kfree(vcpu->arch.mce_banks);
6069         kvm_free_lapic(vcpu);
6070         idx = srcu_read_lock(&vcpu->kvm->srcu);
6071         kvm_mmu_destroy(vcpu);
6072         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6073         free_page((unsigned long)vcpu->arch.pio_data);
6074 }
6075
6076 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6077 {
6078         if (type)
6079                 return -EINVAL;
6080
6081         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6082         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6083
6084         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6085         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6086
6087         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6088
6089         return 0;
6090 }
6091
6092 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6093 {
6094         vcpu_load(vcpu);
6095         kvm_mmu_unload(vcpu);
6096         vcpu_put(vcpu);
6097 }
6098
6099 static void kvm_free_vcpus(struct kvm *kvm)
6100 {
6101         unsigned int i;
6102         struct kvm_vcpu *vcpu;
6103
6104         /*
6105          * Unpin any mmu pages first.
6106          */
6107         kvm_for_each_vcpu(i, vcpu, kvm) {
6108                 kvm_clear_async_pf_completion_queue(vcpu);
6109                 kvm_unload_vcpu_mmu(vcpu);
6110         }
6111         kvm_for_each_vcpu(i, vcpu, kvm)
6112                 kvm_arch_vcpu_free(vcpu);
6113
6114         mutex_lock(&kvm->lock);
6115         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6116                 kvm->vcpus[i] = NULL;
6117
6118         atomic_set(&kvm->online_vcpus, 0);
6119         mutex_unlock(&kvm->lock);
6120 }
6121
6122 void kvm_arch_sync_events(struct kvm *kvm)
6123 {
6124         kvm_free_all_assigned_devices(kvm);
6125         kvm_free_pit(kvm);
6126 }
6127
6128 void kvm_arch_destroy_vm(struct kvm *kvm)
6129 {
6130         kvm_iommu_unmap_guest(kvm);
6131         kfree(kvm->arch.vpic);
6132         kfree(kvm->arch.vioapic);
6133         kvm_free_vcpus(kvm);
6134         if (kvm->arch.apic_access_page)
6135                 put_page(kvm->arch.apic_access_page);
6136         if (kvm->arch.ept_identity_pagetable)
6137                 put_page(kvm->arch.ept_identity_pagetable);
6138 }
6139
6140 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6141                                 struct kvm_memory_slot *memslot,
6142                                 struct kvm_memory_slot old,
6143                                 struct kvm_userspace_memory_region *mem,
6144                                 int user_alloc)
6145 {
6146         int npages = memslot->npages;
6147         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6148
6149         /* Prevent internal slot pages from being moved by fork()/COW. */
6150         if (memslot->id >= KVM_MEMORY_SLOTS)
6151                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6152
6153         /*To keep backward compatibility with older userspace,
6154          *x86 needs to hanlde !user_alloc case.
6155          */
6156         if (!user_alloc) {
6157                 if (npages && !old.rmap) {
6158                         unsigned long userspace_addr;
6159
6160                         down_write(&current->mm->mmap_sem);
6161                         userspace_addr = do_mmap(NULL, 0,
6162                                                  npages * PAGE_SIZE,
6163                                                  PROT_READ | PROT_WRITE,
6164                                                  map_flags,
6165                                                  0);
6166                         up_write(&current->mm->mmap_sem);
6167
6168                         if (IS_ERR((void *)userspace_addr))
6169                                 return PTR_ERR((void *)userspace_addr);
6170
6171                         memslot->userspace_addr = userspace_addr;
6172                 }
6173         }
6174
6175
6176         return 0;
6177 }
6178
6179 void kvm_arch_commit_memory_region(struct kvm *kvm,
6180                                 struct kvm_userspace_memory_region *mem,
6181                                 struct kvm_memory_slot old,
6182                                 int user_alloc)
6183 {
6184
6185         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6186
6187         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6188                 int ret;
6189
6190                 down_write(&current->mm->mmap_sem);
6191                 ret = do_munmap(current->mm, old.userspace_addr,
6192                                 old.npages * PAGE_SIZE);
6193                 up_write(&current->mm->mmap_sem);
6194                 if (ret < 0)
6195                         printk(KERN_WARNING
6196                                "kvm_vm_ioctl_set_memory_region: "
6197                                "failed to munmap memory\n");
6198         }
6199
6200         if (!kvm->arch.n_requested_mmu_pages)
6201                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6202
6203         spin_lock(&kvm->mmu_lock);
6204         if (nr_mmu_pages)
6205                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6206         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6207         spin_unlock(&kvm->mmu_lock);
6208 }
6209
6210 void kvm_arch_flush_shadow(struct kvm *kvm)
6211 {
6212         kvm_mmu_zap_all(kvm);
6213         kvm_reload_remote_mmus(kvm);
6214 }
6215
6216 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6217 {
6218         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6219                 !vcpu->arch.apf.halted)
6220                 || !list_empty_careful(&vcpu->async_pf.done)
6221                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6222                 || atomic_read(&vcpu->arch.nmi_queued) ||
6223                 (kvm_arch_interrupt_allowed(vcpu) &&
6224                  kvm_cpu_has_interrupt(vcpu));
6225 }
6226
6227 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6228 {
6229         int me;
6230         int cpu = vcpu->cpu;
6231
6232         if (waitqueue_active(&vcpu->wq)) {
6233                 wake_up_interruptible(&vcpu->wq);
6234                 ++vcpu->stat.halt_wakeup;
6235         }
6236
6237         me = get_cpu();
6238         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6239                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6240                         smp_send_reschedule(cpu);
6241         put_cpu();
6242 }
6243
6244 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6245 {
6246         return kvm_x86_ops->interrupt_allowed(vcpu);
6247 }
6248
6249 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6250 {
6251         unsigned long current_rip = kvm_rip_read(vcpu) +
6252                 get_segment_base(vcpu, VCPU_SREG_CS);
6253
6254         return current_rip == linear_rip;
6255 }
6256 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6257
6258 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6259 {
6260         unsigned long rflags;
6261
6262         rflags = kvm_x86_ops->get_rflags(vcpu);
6263         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6264                 rflags &= ~X86_EFLAGS_TF;
6265         return rflags;
6266 }
6267 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6268
6269 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6270 {
6271         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6272             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6273                 rflags |= X86_EFLAGS_TF;
6274         kvm_x86_ops->set_rflags(vcpu, rflags);
6275         kvm_make_request(KVM_REQ_EVENT, vcpu);
6276 }
6277 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6278
6279 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6280 {
6281         int r;
6282
6283         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6284               is_error_page(work->page))
6285                 return;
6286
6287         r = kvm_mmu_reload(vcpu);
6288         if (unlikely(r))
6289                 return;
6290
6291         if (!vcpu->arch.mmu.direct_map &&
6292               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6293                 return;
6294
6295         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6296 }
6297
6298 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6299 {
6300         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6301 }
6302
6303 static inline u32 kvm_async_pf_next_probe(u32 key)
6304 {
6305         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6306 }
6307
6308 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6309 {
6310         u32 key = kvm_async_pf_hash_fn(gfn);
6311
6312         while (vcpu->arch.apf.gfns[key] != ~0)
6313                 key = kvm_async_pf_next_probe(key);
6314
6315         vcpu->arch.apf.gfns[key] = gfn;
6316 }
6317
6318 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6319 {
6320         int i;
6321         u32 key = kvm_async_pf_hash_fn(gfn);
6322
6323         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6324                      (vcpu->arch.apf.gfns[key] != gfn &&
6325                       vcpu->arch.apf.gfns[key] != ~0); i++)
6326                 key = kvm_async_pf_next_probe(key);
6327
6328         return key;
6329 }
6330
6331 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6332 {
6333         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6334 }
6335
6336 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6337 {
6338         u32 i, j, k;
6339
6340         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6341         while (true) {
6342                 vcpu->arch.apf.gfns[i] = ~0;
6343                 do {
6344                         j = kvm_async_pf_next_probe(j);
6345                         if (vcpu->arch.apf.gfns[j] == ~0)
6346                                 return;
6347                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6348                         /*
6349                          * k lies cyclically in ]i,j]
6350                          * |    i.k.j |
6351                          * |....j i.k.| or  |.k..j i...|
6352                          */
6353                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6354                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6355                 i = j;
6356         }
6357 }
6358
6359 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6360 {
6361
6362         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6363                                       sizeof(val));
6364 }
6365
6366 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6367                                      struct kvm_async_pf *work)
6368 {
6369         struct x86_exception fault;
6370
6371         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6372         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6373
6374         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6375             (vcpu->arch.apf.send_user_only &&
6376              kvm_x86_ops->get_cpl(vcpu) == 0))
6377                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6378         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6379                 fault.vector = PF_VECTOR;
6380                 fault.error_code_valid = true;
6381                 fault.error_code = 0;
6382                 fault.nested_page_fault = false;
6383                 fault.address = work->arch.token;
6384                 kvm_inject_page_fault(vcpu, &fault);
6385         }
6386 }
6387
6388 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6389                                  struct kvm_async_pf *work)
6390 {
6391         struct x86_exception fault;
6392
6393         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6394         if (is_error_page(work->page))
6395                 work->arch.token = ~0; /* broadcast wakeup */
6396         else
6397                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6398
6399         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6400             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6401                 fault.vector = PF_VECTOR;
6402                 fault.error_code_valid = true;
6403                 fault.error_code = 0;
6404                 fault.nested_page_fault = false;
6405                 fault.address = work->arch.token;
6406                 kvm_inject_page_fault(vcpu, &fault);
6407         }
6408         vcpu->arch.apf.halted = false;
6409 }
6410
6411 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6412 {
6413         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6414                 return true;
6415         else
6416                 return !kvm_event_needs_reinjection(vcpu) &&
6417                         kvm_x86_ops->interrupt_allowed(vcpu);
6418 }
6419
6420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6427 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6428 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6429 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6430 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6431 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);