1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
113 static void process_nmi(struct kvm_vcpu *vcpu);
114 static void process_smi(struct kvm_vcpu *vcpu);
115 static void enter_smm(struct kvm_vcpu *vcpu);
116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
117 static void store_regs(struct kvm_vcpu *vcpu);
118 static int sync_regs(struct kvm_vcpu *vcpu);
120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
135 static bool __read_mostly ignore_msrs = 0;
136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
138 bool __read_mostly report_ignored_msrs = true;
139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
142 unsigned int min_timer_period_us = 200;
143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
145 static bool __read_mostly kvmclock_periodic_sync = true;
146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
148 bool __read_mostly kvm_has_tsc_control;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
150 u32 __read_mostly kvm_max_guest_tsc_khz;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
158 bool __read_mostly kvm_has_bus_lock_exit;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm = 250;
163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns = -1;
172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
174 static bool __read_mostly vector_hashing = true;
175 module_param(vector_hashing, bool, S_IRUGO);
177 bool __read_mostly enable_vmware_backdoor = false;
178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
181 static bool __read_mostly force_emulation_prefix = false;
182 module_param(force_emulation_prefix, bool, S_IRUGO);
184 int __read_mostly pi_inject_timer = -1;
185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs {
195 struct user_return_notifier urn;
197 struct kvm_user_return_msr_values {
200 } values[KVM_MAX_NR_USER_RETURN_MSRS];
203 u32 __read_mostly kvm_nr_uret_msrs;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer;
214 EXPORT_SYMBOL_GPL(host_efer);
216 bool __read_mostly allow_smaller_maxphyaddr = 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
219 bool __read_mostly enable_apicv = true;
220 EXPORT_SYMBOL_GPL(enable_apicv);
222 u64 __read_mostly host_xss;
223 EXPORT_SYMBOL_GPL(host_xss);
224 u64 __read_mostly supported_xss;
225 EXPORT_SYMBOL_GPL(supported_xss);
227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
230 STATS_DESC_COUNTER(VM, mmu_pte_write),
231 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
232 STATS_DESC_COUNTER(VM, mmu_flooded),
233 STATS_DESC_COUNTER(VM, mmu_recycled),
234 STATS_DESC_COUNTER(VM, mmu_cache_miss),
235 STATS_DESC_ICOUNTER(VM, mmu_unsync),
236 STATS_DESC_ICOUNTER(VM, pages_4k),
237 STATS_DESC_ICOUNTER(VM, pages_2m),
238 STATS_DESC_ICOUNTER(VM, pages_1g),
239 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
240 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
241 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
244 const struct kvm_stats_header kvm_vm_stats_header = {
245 .name_size = KVM_STATS_NAME_SIZE,
246 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
247 .id_offset = sizeof(struct kvm_stats_header),
248 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
249 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
250 sizeof(kvm_vm_stats_desc),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU, pf_fixed),
256 STATS_DESC_COUNTER(VCPU, pf_guest),
257 STATS_DESC_COUNTER(VCPU, tlb_flush),
258 STATS_DESC_COUNTER(VCPU, invlpg),
259 STATS_DESC_COUNTER(VCPU, exits),
260 STATS_DESC_COUNTER(VCPU, io_exits),
261 STATS_DESC_COUNTER(VCPU, mmio_exits),
262 STATS_DESC_COUNTER(VCPU, signal_exits),
263 STATS_DESC_COUNTER(VCPU, irq_window_exits),
264 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
265 STATS_DESC_COUNTER(VCPU, l1d_flush),
266 STATS_DESC_COUNTER(VCPU, halt_exits),
267 STATS_DESC_COUNTER(VCPU, request_irq_exits),
268 STATS_DESC_COUNTER(VCPU, irq_exits),
269 STATS_DESC_COUNTER(VCPU, host_state_reload),
270 STATS_DESC_COUNTER(VCPU, fpu_reload),
271 STATS_DESC_COUNTER(VCPU, insn_emulation),
272 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
273 STATS_DESC_COUNTER(VCPU, hypercalls),
274 STATS_DESC_COUNTER(VCPU, irq_injections),
275 STATS_DESC_COUNTER(VCPU, nmi_injections),
276 STATS_DESC_COUNTER(VCPU, req_event),
277 STATS_DESC_COUNTER(VCPU, nested_run),
278 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
279 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
280 STATS_DESC_ICOUNTER(VCPU, guest_mode)
283 const struct kvm_stats_header kvm_vcpu_stats_header = {
284 .name_size = KVM_STATS_NAME_SIZE,
285 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
286 .id_offset = sizeof(struct kvm_stats_header),
287 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
288 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
289 sizeof(kvm_vcpu_stats_desc),
292 u64 __read_mostly host_xcr0;
293 u64 __read_mostly supported_xcr0;
294 EXPORT_SYMBOL_GPL(supported_xcr0);
296 static struct kmem_cache *x86_fpu_cache;
298 static struct kmem_cache *x86_emulator_cache;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
306 const char *op = write ? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
323 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
324 unsigned int size = sizeof(struct x86_emulate_ctxt);
326 return kmem_cache_create_usercopy("x86_emulator", size,
327 __alignof__(struct x86_emulate_ctxt),
328 SLAB_ACCOUNT, useroffset,
329 size - useroffset, NULL);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
337 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
338 vcpu->arch.apf.gfns[i] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier *urn)
344 struct kvm_user_return_msrs *msrs
345 = container_of(urn, struct kvm_user_return_msrs, urn);
346 struct kvm_user_return_msr_values *values;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags);
354 if (msrs->registered) {
355 msrs->registered = false;
356 user_return_notifier_unregister(urn);
358 local_irq_restore(flags);
359 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
360 values = &msrs->values[slot];
361 if (values->host != values->curr) {
362 wrmsrl(kvm_uret_msrs_list[slot], values->host);
363 values->curr = values->host;
368 static int kvm_probe_user_return_msr(u32 msr)
374 ret = rdmsrl_safe(msr, &val);
377 ret = wrmsrl_safe(msr, val);
383 int kvm_add_user_return_msr(u32 msr)
385 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
387 if (kvm_probe_user_return_msr(msr))
390 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
391 return kvm_nr_uret_msrs++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
395 int kvm_find_user_return_msr(u32 msr)
399 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
400 if (kvm_uret_msrs_list[i] == msr)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu = smp_processor_id();
410 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
414 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
415 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
416 msrs->values[i].host = value;
417 msrs->values[i].curr = value;
421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
423 unsigned int cpu = smp_processor_id();
424 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
427 value = (value & mask) | (msrs->values[slot].host & ~mask);
428 if (value == msrs->values[slot].curr)
430 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
434 msrs->values[slot].curr = value;
435 if (!msrs->registered) {
436 msrs->urn.on_user_return = kvm_on_user_return;
437 user_return_notifier_register(&msrs->urn);
438 msrs->registered = true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu = smp_processor_id();
447 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
449 if (msrs->registered)
450 kvm_on_user_return(&msrs->urn);
453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
455 return vcpu->arch.apic_base;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
467 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
468 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
469 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
470 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
472 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
474 if (!msr_info->host_initiated) {
475 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
477 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
481 kvm_lapic_set_base(vcpu, msr_info->data);
482 kvm_recalculate_apic_map(vcpu->kvm);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector)
515 return EXCPT_CONTRIBUTORY;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector)
531 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
532 return EXCPT_INTERRUPT;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
540 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
549 unsigned nr = vcpu->arch.exception.nr;
550 bool has_payload = vcpu->arch.exception.has_payload;
551 unsigned long payload = vcpu->arch.exception.payload;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
581 vcpu->arch.dr6 |= payload;
582 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu->arch.dr6 &= ~BIT(12);
593 vcpu->arch.cr2 = payload;
597 vcpu->arch.exception.has_payload = false;
598 vcpu->arch.exception.payload = 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
603 unsigned nr, bool has_error, u32 error_code,
604 bool has_payload, unsigned long payload, bool reinject)
609 kvm_make_request(KVM_REQ_EVENT, vcpu);
611 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu->arch.exception.pending);
623 vcpu->arch.exception.injected = true;
624 if (WARN_ON_ONCE(has_payload)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu->arch.exception.pending = true;
634 vcpu->arch.exception.injected = false;
636 vcpu->arch.exception.has_error_code = has_error;
637 vcpu->arch.exception.nr = nr;
638 vcpu->arch.exception.error_code = error_code;
639 vcpu->arch.exception.has_payload = has_payload;
640 vcpu->arch.exception.payload = payload;
641 if (!is_guest_mode(vcpu))
642 kvm_deliver_exception_payload(vcpu);
646 /* to check exception */
647 prev_nr = vcpu->arch.exception.nr;
648 if (prev_nr == DF_VECTOR) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
653 class1 = exception_class(prev_nr);
654 class2 = exception_class(nr);
655 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
656 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu->arch.exception.pending = true;
663 vcpu->arch.exception.injected = false;
664 vcpu->arch.exception.has_error_code = true;
665 vcpu->arch.exception.nr = DF_VECTOR;
666 vcpu->arch.exception.error_code = 0;
667 vcpu->arch.exception.has_payload = false;
668 vcpu->arch.exception.payload = 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
678 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
684 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
689 unsigned long payload)
691 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
696 u32 error_code, unsigned long payload)
698 kvm_multiple_exception(vcpu, nr, true, error_code,
699 true, payload, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
705 kvm_inject_gp(vcpu, 0);
707 return kvm_skip_emulated_instruction(vcpu);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
715 ++vcpu->stat.pf_guest;
716 vcpu->arch.exception.nested_apf =
717 is_guest_mode(vcpu) && fault->async_page_fault;
718 if (vcpu->arch.exception.nested_apf) {
719 vcpu->arch.apf.nested_apf_token = fault->address;
720 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
722 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
729 struct x86_exception *fault)
731 struct kvm_mmu *fault_mmu;
732 WARN_ON_ONCE(fault->vector != PF_VECTOR);
734 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault->error_code & PFERR_PRESENT_MASK) &&
742 !(fault->error_code & PFERR_RSVD_MASK))
743 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
744 fault_mmu->root_hpa);
746 fault_mmu->inject_page_fault(vcpu, fault);
747 return fault->nested_page_fault;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
753 atomic_inc(&vcpu->arch.nmi_queued);
754 kvm_make_request(KVM_REQ_NMI, vcpu);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
760 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
766 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
776 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
778 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
785 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
788 kvm_queue_exception(vcpu, UD_VECTOR);
791 EXPORT_SYMBOL_GPL(kvm_require_dr);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
799 gfn_t ngfn, void *data, int offset, int len,
802 struct x86_exception exception;
806 ngpa = gfn_to_gpa(ngfn);
807 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
808 if (real_gfn == UNMAPPED_GVA)
811 real_gfn = gpa_to_gfn(real_gfn);
813 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
817 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
819 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
827 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
828 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
831 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
833 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
834 offset * sizeof(u64), sizeof(pdpte),
835 PFERR_USER_MASK|PFERR_WRITE_MASK);
840 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
841 if ((pdpte[i] & PT_PRESENT_MASK) &&
842 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
849 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
850 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
851 vcpu->arch.pdptrs_from_userspace = false;
857 EXPORT_SYMBOL_GPL(load_pdptrs);
859 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
861 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
862 kvm_clear_async_pf_completion_queue(vcpu);
863 kvm_async_pf_hash_reset(vcpu);
866 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
867 kvm_mmu_reset_context(vcpu);
869 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
870 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
871 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
872 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
876 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
878 unsigned long old_cr0 = kvm_read_cr0(vcpu);
879 unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
884 if (cr0 & 0xffffffff00000000UL)
888 cr0 &= ~CR0_RESERVED_BITS;
890 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
893 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
897 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
898 (cr0 & X86_CR0_PG)) {
903 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
908 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
909 is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
910 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
913 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
916 static_call(kvm_x86_set_cr0)(vcpu, cr0);
918 kvm_post_set_cr0(vcpu, old_cr0, cr0);
922 EXPORT_SYMBOL_GPL(kvm_set_cr0);
924 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
926 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
928 EXPORT_SYMBOL_GPL(kvm_lmsw);
930 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
932 if (vcpu->arch.guest_state_protected)
935 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
937 if (vcpu->arch.xcr0 != host_xcr0)
938 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
940 if (vcpu->arch.xsaves_enabled &&
941 vcpu->arch.ia32_xss != host_xss)
942 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
945 if (static_cpu_has(X86_FEATURE_PKU) &&
946 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
947 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
948 vcpu->arch.pkru != vcpu->arch.host_pkru)
949 write_pkru(vcpu->arch.pkru);
951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
953 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
955 if (vcpu->arch.guest_state_protected)
958 if (static_cpu_has(X86_FEATURE_PKU) &&
959 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
960 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
961 vcpu->arch.pkru = rdpkru();
962 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
963 write_pkru(vcpu->arch.host_pkru);
966 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
968 if (vcpu->arch.xcr0 != host_xcr0)
969 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
971 if (vcpu->arch.xsaves_enabled &&
972 vcpu->arch.ia32_xss != host_xss)
973 wrmsrl(MSR_IA32_XSS, host_xss);
977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
979 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
982 u64 old_xcr0 = vcpu->arch.xcr0;
985 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
986 if (index != XCR_XFEATURE_ENABLED_MASK)
988 if (!(xcr0 & XFEATURE_MASK_FP))
990 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
994 * Do not allow the guest to set bits that we do not support
995 * saving. However, xcr0 bit 0 is always set, even if the
996 * emulated CPU does not support XSAVE (see fx_init).
998 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
999 if (xcr0 & ~valid_bits)
1002 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1003 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1006 if (xcr0 & XFEATURE_MASK_AVX512) {
1007 if (!(xcr0 & XFEATURE_MASK_YMM))
1009 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1012 vcpu->arch.xcr0 = xcr0;
1014 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1015 kvm_update_cpuid_runtime(vcpu);
1019 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1021 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1022 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1023 kvm_inject_gp(vcpu, 0);
1027 return kvm_skip_emulated_instruction(vcpu);
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1031 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1033 if (cr4 & cr4_reserved_bits)
1036 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1039 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1043 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1045 if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1046 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1047 kvm_mmu_reset_context(vcpu);
1049 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1051 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1053 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1054 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1057 if (!kvm_is_valid_cr4(vcpu, cr4))
1060 if (is_long_mode(vcpu)) {
1061 if (!(cr4 & X86_CR4_PAE))
1063 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1065 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1066 && ((cr4 ^ old_cr4) & pdptr_bits)
1067 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1068 kvm_read_cr3(vcpu)))
1071 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1072 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1075 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1076 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1080 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1082 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1086 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1088 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1090 struct kvm_mmu *mmu = vcpu->arch.mmu;
1091 unsigned long roots_to_free = 0;
1095 * If neither the current CR3 nor any of the prev_roots use the given
1096 * PCID, then nothing needs to be done here because a resync will
1097 * happen anyway before switching to any other CR3.
1099 if (kvm_get_active_pcid(vcpu) == pcid) {
1100 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1101 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1104 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1105 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1106 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1108 kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1111 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1113 bool skip_tlb_flush = false;
1114 unsigned long pcid = 0;
1115 #ifdef CONFIG_X86_64
1116 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1119 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1120 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1121 pcid = cr3 & X86_CR3_PCID_MASK;
1125 /* PDPTRs are always reloaded for PAE paging. */
1126 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1127 goto handle_tlb_flush;
1130 * Do not condition the GPA check on long mode, this helper is used to
1131 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1132 * the current vCPU mode is accurate.
1134 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1137 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1140 if (cr3 != kvm_read_cr3(vcpu))
1141 kvm_mmu_new_pgd(vcpu, cr3);
1143 vcpu->arch.cr3 = cr3;
1144 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1148 * A load of CR3 that flushes the TLB flushes only the current PCID,
1149 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1150 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1151 * and it's impossible to use a non-zero PCID when PCID is disabled,
1152 * i.e. only PCID=0 can be relevant.
1154 if (!skip_tlb_flush)
1155 kvm_invalidate_pcid(vcpu, pcid);
1159 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1161 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1163 if (cr8 & CR8_RESERVED_BITS)
1165 if (lapic_in_kernel(vcpu))
1166 kvm_lapic_set_tpr(vcpu, cr8);
1168 vcpu->arch.cr8 = cr8;
1171 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1173 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1175 if (lapic_in_kernel(vcpu))
1176 return kvm_lapic_get_cr8(vcpu);
1178 return vcpu->arch.cr8;
1180 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1182 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1186 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1187 for (i = 0; i < KVM_NR_DB_REGS; i++)
1188 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1192 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1196 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1197 dr7 = vcpu->arch.guest_debug_dr7;
1199 dr7 = vcpu->arch.dr7;
1200 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1201 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1202 if (dr7 & DR7_BP_EN_MASK)
1203 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1205 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1207 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1209 u64 fixed = DR6_FIXED_1;
1211 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1214 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1215 fixed |= DR6_BUS_LOCK;
1219 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1221 size_t size = ARRAY_SIZE(vcpu->arch.db);
1225 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1226 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1227 vcpu->arch.eff_db[dr] = val;
1231 if (!kvm_dr6_valid(val))
1233 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1237 if (!kvm_dr7_valid(val))
1239 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1240 kvm_update_dr7(vcpu);
1246 EXPORT_SYMBOL_GPL(kvm_set_dr);
1248 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1250 size_t size = ARRAY_SIZE(vcpu->arch.db);
1254 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1258 *val = vcpu->arch.dr6;
1262 *val = vcpu->arch.dr7;
1266 EXPORT_SYMBOL_GPL(kvm_get_dr);
1268 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1270 u32 ecx = kvm_rcx_read(vcpu);
1273 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1274 kvm_inject_gp(vcpu, 0);
1278 kvm_rax_write(vcpu, (u32)data);
1279 kvm_rdx_write(vcpu, data >> 32);
1280 return kvm_skip_emulated_instruction(vcpu);
1282 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1285 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1286 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1288 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1289 * extract the supported MSRs from the related const lists.
1290 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1291 * capabilities of the host cpu. This capabilities test skips MSRs that are
1292 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1293 * may depend on host virtualization features rather than host cpu features.
1296 static const u32 msrs_to_save_all[] = {
1297 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1299 #ifdef CONFIG_X86_64
1300 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1302 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1303 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1305 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1306 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1307 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1308 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1309 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1310 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1311 MSR_IA32_UMWAIT_CONTROL,
1313 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1314 MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1315 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1316 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1317 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1318 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1319 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1320 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1321 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1322 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1323 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1324 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1325 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1326 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1327 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1328 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1329 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1330 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1331 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1332 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1333 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1334 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1337 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1338 static unsigned num_msrs_to_save;
1340 static const u32 emulated_msrs_all[] = {
1341 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1342 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1343 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1344 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1345 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1346 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1347 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1349 HV_X64_MSR_VP_INDEX,
1350 HV_X64_MSR_VP_RUNTIME,
1351 HV_X64_MSR_SCONTROL,
1352 HV_X64_MSR_STIMER0_CONFIG,
1353 HV_X64_MSR_VP_ASSIST_PAGE,
1354 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1355 HV_X64_MSR_TSC_EMULATION_STATUS,
1356 HV_X64_MSR_SYNDBG_OPTIONS,
1357 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1358 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1359 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1361 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1362 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1364 MSR_IA32_TSC_ADJUST,
1365 MSR_IA32_TSC_DEADLINE,
1366 MSR_IA32_ARCH_CAPABILITIES,
1367 MSR_IA32_PERF_CAPABILITIES,
1368 MSR_IA32_MISC_ENABLE,
1369 MSR_IA32_MCG_STATUS,
1371 MSR_IA32_MCG_EXT_CTL,
1375 MSR_MISC_FEATURES_ENABLES,
1376 MSR_AMD64_VIRT_SPEC_CTRL,
1381 * The following list leaves out MSRs whose values are determined
1382 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1383 * We always support the "true" VMX control MSRs, even if the host
1384 * processor does not, so I am putting these registers here rather
1385 * than in msrs_to_save_all.
1388 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1389 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1390 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1391 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1393 MSR_IA32_VMX_CR0_FIXED0,
1394 MSR_IA32_VMX_CR4_FIXED0,
1395 MSR_IA32_VMX_VMCS_ENUM,
1396 MSR_IA32_VMX_PROCBASED_CTLS2,
1397 MSR_IA32_VMX_EPT_VPID_CAP,
1398 MSR_IA32_VMX_VMFUNC,
1401 MSR_KVM_POLL_CONTROL,
1404 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1405 static unsigned num_emulated_msrs;
1408 * List of msr numbers which are used to expose MSR-based features that
1409 * can be used by a hypervisor to validate requested CPU features.
1411 static const u32 msr_based_features_all[] = {
1413 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1414 MSR_IA32_VMX_PINBASED_CTLS,
1415 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1416 MSR_IA32_VMX_PROCBASED_CTLS,
1417 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1418 MSR_IA32_VMX_EXIT_CTLS,
1419 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1420 MSR_IA32_VMX_ENTRY_CTLS,
1422 MSR_IA32_VMX_CR0_FIXED0,
1423 MSR_IA32_VMX_CR0_FIXED1,
1424 MSR_IA32_VMX_CR4_FIXED0,
1425 MSR_IA32_VMX_CR4_FIXED1,
1426 MSR_IA32_VMX_VMCS_ENUM,
1427 MSR_IA32_VMX_PROCBASED_CTLS2,
1428 MSR_IA32_VMX_EPT_VPID_CAP,
1429 MSR_IA32_VMX_VMFUNC,
1433 MSR_IA32_ARCH_CAPABILITIES,
1434 MSR_IA32_PERF_CAPABILITIES,
1437 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1438 static unsigned int num_msr_based_features;
1440 static u64 kvm_get_arch_capabilities(void)
1444 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1445 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1448 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1449 * the nested hypervisor runs with NX huge pages. If it is not,
1450 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1451 * L1 guests, so it need not worry about its own (L2) guests.
1453 data |= ARCH_CAP_PSCHANGE_MC_NO;
1456 * If we're doing cache flushes (either "always" or "cond")
1457 * we will do one whenever the guest does a vmlaunch/vmresume.
1458 * If an outer hypervisor is doing the cache flush for us
1459 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1460 * capability to the guest too, and if EPT is disabled we're not
1461 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1462 * require a nested hypervisor to do a flush of its own.
1464 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1465 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1467 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1468 data |= ARCH_CAP_RDCL_NO;
1469 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1470 data |= ARCH_CAP_SSB_NO;
1471 if (!boot_cpu_has_bug(X86_BUG_MDS))
1472 data |= ARCH_CAP_MDS_NO;
1474 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1476 * If RTM=0 because the kernel has disabled TSX, the host might
1477 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1478 * and therefore knows that there cannot be TAA) but keep
1479 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1480 * and we want to allow migrating those guests to tsx=off hosts.
1482 data &= ~ARCH_CAP_TAA_NO;
1483 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1484 data |= ARCH_CAP_TAA_NO;
1487 * Nothing to do here; we emulate TSX_CTRL if present on the
1488 * host so the guest can choose between disabling TSX or
1489 * using VERW to clear CPU buffers.
1496 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1498 switch (msr->index) {
1499 case MSR_IA32_ARCH_CAPABILITIES:
1500 msr->data = kvm_get_arch_capabilities();
1502 case MSR_IA32_UCODE_REV:
1503 rdmsrl_safe(msr->index, &msr->data);
1506 return static_call(kvm_x86_get_msr_feature)(msr);
1511 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1513 struct kvm_msr_entry msr;
1517 r = kvm_get_msr_feature(&msr);
1519 if (r == KVM_MSR_RET_INVALID) {
1520 /* Unconditionally clear the output for simplicity */
1522 if (kvm_msr_ignored_check(index, 0, false))
1534 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1536 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1539 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1542 if (efer & (EFER_LME | EFER_LMA) &&
1543 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1546 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1552 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1554 if (efer & efer_reserved_bits)
1557 return __kvm_valid_efer(vcpu, efer);
1559 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1561 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1563 u64 old_efer = vcpu->arch.efer;
1564 u64 efer = msr_info->data;
1567 if (efer & efer_reserved_bits)
1570 if (!msr_info->host_initiated) {
1571 if (!__kvm_valid_efer(vcpu, efer))
1574 if (is_paging(vcpu) &&
1575 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1580 efer |= vcpu->arch.efer & EFER_LMA;
1582 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1588 /* Update reserved bits */
1589 if ((efer ^ old_efer) & EFER_NX)
1590 kvm_mmu_reset_context(vcpu);
1595 void kvm_enable_efer_bits(u64 mask)
1597 efer_reserved_bits &= ~mask;
1599 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1601 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1603 struct kvm_x86_msr_filter *msr_filter;
1604 struct msr_bitmap_range *ranges;
1605 struct kvm *kvm = vcpu->kvm;
1610 /* x2APIC MSRs do not support filtering. */
1611 if (index >= 0x800 && index <= 0x8ff)
1614 idx = srcu_read_lock(&kvm->srcu);
1616 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1622 allowed = msr_filter->default_allow;
1623 ranges = msr_filter->ranges;
1625 for (i = 0; i < msr_filter->count; i++) {
1626 u32 start = ranges[i].base;
1627 u32 end = start + ranges[i].nmsrs;
1628 u32 flags = ranges[i].flags;
1629 unsigned long *bitmap = ranges[i].bitmap;
1631 if ((index >= start) && (index < end) && (flags & type)) {
1632 allowed = !!test_bit(index - start, bitmap);
1638 srcu_read_unlock(&kvm->srcu, idx);
1642 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1645 * Write @data into the MSR specified by @index. Select MSR specific fault
1646 * checks are bypassed if @host_initiated is %true.
1647 * Returns 0 on success, non-0 otherwise.
1648 * Assumes vcpu_load() was already called.
1650 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1651 bool host_initiated)
1653 struct msr_data msr;
1655 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1656 return KVM_MSR_RET_FILTERED;
1661 case MSR_KERNEL_GS_BASE:
1664 if (is_noncanonical_address(data, vcpu))
1667 case MSR_IA32_SYSENTER_EIP:
1668 case MSR_IA32_SYSENTER_ESP:
1670 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1671 * non-canonical address is written on Intel but not on
1672 * AMD (which ignores the top 32-bits, because it does
1673 * not implement 64-bit SYSENTER).
1675 * 64-bit code should hence be able to write a non-canonical
1676 * value on AMD. Making the address canonical ensures that
1677 * vmentry does not fail on Intel after writing a non-canonical
1678 * value, and that something deterministic happens if the guest
1679 * invokes 64-bit SYSENTER.
1681 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1684 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1687 if (!host_initiated &&
1688 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1689 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1693 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1694 * incomplete and conflicting architectural behavior. Current
1695 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1696 * reserved and always read as zeros. Enforce Intel's reserved
1697 * bits check if and only if the guest CPU is Intel, and clear
1698 * the bits in all other cases. This ensures cross-vendor
1699 * migration will provide consistent behavior for the guest.
1701 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1710 msr.host_initiated = host_initiated;
1712 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1715 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1716 u32 index, u64 data, bool host_initiated)
1718 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1720 if (ret == KVM_MSR_RET_INVALID)
1721 if (kvm_msr_ignored_check(index, data, true))
1728 * Read the MSR specified by @index into @data. Select MSR specific fault
1729 * checks are bypassed if @host_initiated is %true.
1730 * Returns 0 on success, non-0 otherwise.
1731 * Assumes vcpu_load() was already called.
1733 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1734 bool host_initiated)
1736 struct msr_data msr;
1739 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1740 return KVM_MSR_RET_FILTERED;
1744 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1747 if (!host_initiated &&
1748 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1749 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1755 msr.host_initiated = host_initiated;
1757 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1763 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1764 u32 index, u64 *data, bool host_initiated)
1766 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1768 if (ret == KVM_MSR_RET_INVALID) {
1769 /* Unconditionally clear *data for simplicity */
1771 if (kvm_msr_ignored_check(index, 0, false))
1778 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1780 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1782 EXPORT_SYMBOL_GPL(kvm_get_msr);
1784 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1786 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1788 EXPORT_SYMBOL_GPL(kvm_set_msr);
1790 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1792 int err = vcpu->run->msr.error;
1794 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1795 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1798 return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1801 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1803 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1806 static u64 kvm_msr_reason(int r)
1809 case KVM_MSR_RET_INVALID:
1810 return KVM_MSR_EXIT_REASON_UNKNOWN;
1811 case KVM_MSR_RET_FILTERED:
1812 return KVM_MSR_EXIT_REASON_FILTER;
1814 return KVM_MSR_EXIT_REASON_INVAL;
1818 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1819 u32 exit_reason, u64 data,
1820 int (*completion)(struct kvm_vcpu *vcpu),
1823 u64 msr_reason = kvm_msr_reason(r);
1825 /* Check if the user wanted to know about this MSR fault */
1826 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1829 vcpu->run->exit_reason = exit_reason;
1830 vcpu->run->msr.error = 0;
1831 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1832 vcpu->run->msr.reason = msr_reason;
1833 vcpu->run->msr.index = index;
1834 vcpu->run->msr.data = data;
1835 vcpu->arch.complete_userspace_io = completion;
1840 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1842 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1843 complete_emulated_rdmsr, r);
1846 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1848 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1849 complete_emulated_wrmsr, r);
1852 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1854 u32 ecx = kvm_rcx_read(vcpu);
1858 r = kvm_get_msr(vcpu, ecx, &data);
1860 /* MSR read failed? See if we should ask user space */
1861 if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1862 /* Bounce to user space */
1867 trace_kvm_msr_read(ecx, data);
1869 kvm_rax_write(vcpu, data & -1u);
1870 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1872 trace_kvm_msr_read_ex(ecx);
1875 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1877 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1879 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1881 u32 ecx = kvm_rcx_read(vcpu);
1882 u64 data = kvm_read_edx_eax(vcpu);
1885 r = kvm_set_msr(vcpu, ecx, data);
1887 /* MSR write failed? See if we should ask user space */
1888 if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1889 /* Bounce to user space */
1892 /* Signal all other negative errors to userspace */
1897 trace_kvm_msr_write(ecx, data);
1899 trace_kvm_msr_write_ex(ecx, data);
1901 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1903 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1905 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1907 return kvm_skip_emulated_instruction(vcpu);
1909 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1911 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1913 /* Treat an INVD instruction as a NOP and just skip it. */
1914 return kvm_emulate_as_nop(vcpu);
1916 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1918 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1920 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1921 return kvm_emulate_as_nop(vcpu);
1923 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1925 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1927 kvm_queue_exception(vcpu, UD_VECTOR);
1930 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1932 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1934 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1935 return kvm_emulate_as_nop(vcpu);
1937 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1939 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1941 xfer_to_guest_mode_prepare();
1942 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1943 xfer_to_guest_mode_work_pending();
1947 * The fast path for frequent and performance sensitive wrmsr emulation,
1948 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1949 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1950 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1951 * other cases which must be called after interrupts are enabled on the host.
1953 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1955 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1958 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1959 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1960 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1961 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1964 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1965 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1966 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1967 trace_kvm_apic_write(APIC_ICR, (u32)data);
1974 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1976 if (!kvm_can_use_hv_timer(vcpu))
1979 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1983 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1985 u32 msr = kvm_rcx_read(vcpu);
1987 fastpath_t ret = EXIT_FASTPATH_NONE;
1990 case APIC_BASE_MSR + (APIC_ICR >> 4):
1991 data = kvm_read_edx_eax(vcpu);
1992 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1993 kvm_skip_emulated_instruction(vcpu);
1994 ret = EXIT_FASTPATH_EXIT_HANDLED;
1997 case MSR_IA32_TSC_DEADLINE:
1998 data = kvm_read_edx_eax(vcpu);
1999 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2000 kvm_skip_emulated_instruction(vcpu);
2001 ret = EXIT_FASTPATH_REENTER_GUEST;
2008 if (ret != EXIT_FASTPATH_NONE)
2009 trace_kvm_msr_write(msr, data);
2013 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2016 * Adapt set_msr() to msr_io()'s calling convention
2018 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2020 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2023 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2025 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2028 #ifdef CONFIG_X86_64
2029 struct pvclock_clock {
2039 struct pvclock_gtod_data {
2042 struct pvclock_clock clock; /* extract of a clocksource struct */
2043 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2049 static struct pvclock_gtod_data pvclock_gtod_data;
2051 static void update_pvclock_gtod(struct timekeeper *tk)
2053 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2055 write_seqcount_begin(&vdata->seq);
2057 /* copy pvclock gtod data */
2058 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2059 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2060 vdata->clock.mask = tk->tkr_mono.mask;
2061 vdata->clock.mult = tk->tkr_mono.mult;
2062 vdata->clock.shift = tk->tkr_mono.shift;
2063 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2064 vdata->clock.offset = tk->tkr_mono.base;
2066 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2067 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2068 vdata->raw_clock.mask = tk->tkr_raw.mask;
2069 vdata->raw_clock.mult = tk->tkr_raw.mult;
2070 vdata->raw_clock.shift = tk->tkr_raw.shift;
2071 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2072 vdata->raw_clock.offset = tk->tkr_raw.base;
2074 vdata->wall_time_sec = tk->xtime_sec;
2076 vdata->offs_boot = tk->offs_boot;
2078 write_seqcount_end(&vdata->seq);
2081 static s64 get_kvmclock_base_ns(void)
2083 /* Count up from boot time, but with the frequency of the raw clock. */
2084 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2087 static s64 get_kvmclock_base_ns(void)
2089 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2090 return ktime_get_boottime_ns();
2094 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2098 struct pvclock_wall_clock wc;
2105 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2110 ++version; /* first time write, random junk */
2114 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2118 * The guest calculates current wall clock time by adding
2119 * system time (updated by kvm_guest_time_update below) to the
2120 * wall clock specified here. We do the reverse here.
2122 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2124 wc.nsec = do_div(wall_nsec, 1000000000);
2125 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2126 wc.version = version;
2128 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2131 wc_sec_hi = wall_nsec >> 32;
2132 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2133 &wc_sec_hi, sizeof(wc_sec_hi));
2137 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2140 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2141 bool old_msr, bool host_initiated)
2143 struct kvm_arch *ka = &vcpu->kvm->arch;
2145 if (vcpu->vcpu_id == 0 && !host_initiated) {
2146 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2147 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2149 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2152 vcpu->arch.time = system_time;
2153 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2155 /* we verify if the enable bit is set... */
2156 vcpu->arch.pv_time_enabled = false;
2157 if (!(system_time & 1))
2160 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2161 &vcpu->arch.pv_time, system_time & ~1ULL,
2162 sizeof(struct pvclock_vcpu_time_info)))
2163 vcpu->arch.pv_time_enabled = true;
2168 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2170 do_shl32_div32(dividend, divisor);
2174 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2175 s8 *pshift, u32 *pmultiplier)
2183 scaled64 = scaled_hz;
2184 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2189 tps32 = (uint32_t)tps64;
2190 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2191 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2199 *pmultiplier = div_frac(scaled64, tps32);
2202 #ifdef CONFIG_X86_64
2203 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2206 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2207 static unsigned long max_tsc_khz;
2209 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2211 u64 v = (u64)khz * (1000000 + ppm);
2216 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2218 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2222 /* Guest TSC same frequency as host TSC? */
2224 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2228 /* TSC scaling supported? */
2229 if (!kvm_has_tsc_control) {
2230 if (user_tsc_khz > tsc_khz) {
2231 vcpu->arch.tsc_catchup = 1;
2232 vcpu->arch.tsc_always_catchup = 1;
2235 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2240 /* TSC scaling required - calculate ratio */
2241 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2242 user_tsc_khz, tsc_khz);
2244 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2245 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2250 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2254 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2256 u32 thresh_lo, thresh_hi;
2257 int use_scaling = 0;
2259 /* tsc_khz can be zero if TSC calibration fails */
2260 if (user_tsc_khz == 0) {
2261 /* set tsc_scaling_ratio to a safe value */
2262 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2266 /* Compute a scale to convert nanoseconds in TSC cycles */
2267 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2268 &vcpu->arch.virtual_tsc_shift,
2269 &vcpu->arch.virtual_tsc_mult);
2270 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2273 * Compute the variation in TSC rate which is acceptable
2274 * within the range of tolerance and decide if the
2275 * rate being applied is within that bounds of the hardware
2276 * rate. If so, no scaling or compensation need be done.
2278 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2279 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2280 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2281 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2284 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2287 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2289 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2290 vcpu->arch.virtual_tsc_mult,
2291 vcpu->arch.virtual_tsc_shift);
2292 tsc += vcpu->arch.this_tsc_write;
2296 static inline int gtod_is_based_on_tsc(int mode)
2298 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2301 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2303 #ifdef CONFIG_X86_64
2305 struct kvm_arch *ka = &vcpu->kvm->arch;
2306 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2308 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2309 atomic_read(&vcpu->kvm->online_vcpus));
2312 * Once the masterclock is enabled, always perform request in
2313 * order to update it.
2315 * In order to enable masterclock, the host clocksource must be TSC
2316 * and the vcpus need to have matched TSCs. When that happens,
2317 * perform request to enable masterclock.
2319 if (ka->use_master_clock ||
2320 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2321 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2323 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2324 atomic_read(&vcpu->kvm->online_vcpus),
2325 ka->use_master_clock, gtod->clock.vclock_mode);
2330 * Multiply tsc by a fixed point number represented by ratio.
2332 * The most significant 64-N bits (mult) of ratio represent the
2333 * integral part of the fixed point number; the remaining N bits
2334 * (frac) represent the fractional part, ie. ratio represents a fixed
2335 * point number (mult + frac * 2^(-N)).
2337 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2339 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2341 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2344 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2348 if (ratio != kvm_default_tsc_scaling_ratio)
2349 _tsc = __scale_tsc(ratio, tsc);
2353 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2355 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2359 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2361 return target_tsc - tsc;
2364 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2366 return vcpu->arch.l1_tsc_offset +
2367 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2369 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2371 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2375 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2376 nested_offset = l1_offset;
2378 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2379 kvm_tsc_scaling_ratio_frac_bits);
2381 nested_offset += l2_offset;
2382 return nested_offset;
2384 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2386 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2388 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2389 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2390 kvm_tsc_scaling_ratio_frac_bits);
2392 return l1_multiplier;
2394 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2396 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2398 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2399 vcpu->arch.l1_tsc_offset,
2402 vcpu->arch.l1_tsc_offset = l1_offset;
2405 * If we are here because L1 chose not to trap WRMSR to TSC then
2406 * according to the spec this should set L1's TSC (as opposed to
2407 * setting L1's offset for L2).
2409 if (is_guest_mode(vcpu))
2410 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2412 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2413 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2415 vcpu->arch.tsc_offset = l1_offset;
2417 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2420 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2422 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2424 /* Userspace is changing the multiplier while L2 is active */
2425 if (is_guest_mode(vcpu))
2426 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2428 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2430 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2432 if (kvm_has_tsc_control)
2433 static_call(kvm_x86_write_tsc_multiplier)(
2434 vcpu, vcpu->arch.tsc_scaling_ratio);
2437 static inline bool kvm_check_tsc_unstable(void)
2439 #ifdef CONFIG_X86_64
2441 * TSC is marked unstable when we're running on Hyper-V,
2442 * 'TSC page' clocksource is good.
2444 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2447 return check_tsc_unstable();
2450 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2452 struct kvm *kvm = vcpu->kvm;
2453 u64 offset, ns, elapsed;
2454 unsigned long flags;
2456 bool already_matched;
2457 bool synchronizing = false;
2459 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2460 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2461 ns = get_kvmclock_base_ns();
2462 elapsed = ns - kvm->arch.last_tsc_nsec;
2464 if (vcpu->arch.virtual_tsc_khz) {
2467 * detection of vcpu initialization -- need to sync
2468 * with other vCPUs. This particularly helps to keep
2469 * kvm_clock stable after CPU hotplug
2471 synchronizing = true;
2473 u64 tsc_exp = kvm->arch.last_tsc_write +
2474 nsec_to_cycles(vcpu, elapsed);
2475 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2477 * Special case: TSC write with a small delta (1 second)
2478 * of virtual cycle time against real time is
2479 * interpreted as an attempt to synchronize the CPU.
2481 synchronizing = data < tsc_exp + tsc_hz &&
2482 data + tsc_hz > tsc_exp;
2487 * For a reliable TSC, we can match TSC offsets, and for an unstable
2488 * TSC, we add elapsed time in this computation. We could let the
2489 * compensation code attempt to catch up if we fall behind, but
2490 * it's better to try to match offsets from the beginning.
2492 if (synchronizing &&
2493 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2494 if (!kvm_check_tsc_unstable()) {
2495 offset = kvm->arch.cur_tsc_offset;
2497 u64 delta = nsec_to_cycles(vcpu, elapsed);
2499 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2502 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2505 * We split periods of matched TSC writes into generations.
2506 * For each generation, we track the original measured
2507 * nanosecond time, offset, and write, so if TSCs are in
2508 * sync, we can match exact offset, and if not, we can match
2509 * exact software computation in compute_guest_tsc()
2511 * These values are tracked in kvm->arch.cur_xxx variables.
2513 kvm->arch.cur_tsc_generation++;
2514 kvm->arch.cur_tsc_nsec = ns;
2515 kvm->arch.cur_tsc_write = data;
2516 kvm->arch.cur_tsc_offset = offset;
2521 * We also track th most recent recorded KHZ, write and time to
2522 * allow the matching interval to be extended at each write.
2524 kvm->arch.last_tsc_nsec = ns;
2525 kvm->arch.last_tsc_write = data;
2526 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2528 vcpu->arch.last_guest_tsc = data;
2530 /* Keep track of which generation this VCPU has synchronized to */
2531 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2532 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2533 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2535 kvm_vcpu_write_tsc_offset(vcpu, offset);
2536 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2538 spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2540 kvm->arch.nr_vcpus_matched_tsc = 0;
2541 } else if (!already_matched) {
2542 kvm->arch.nr_vcpus_matched_tsc++;
2545 kvm_track_tsc_matching(vcpu);
2546 spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2549 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2552 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2553 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2556 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2558 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2559 WARN_ON(adjustment < 0);
2560 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2561 vcpu->arch.l1_tsc_scaling_ratio);
2562 adjust_tsc_offset_guest(vcpu, adjustment);
2565 #ifdef CONFIG_X86_64
2567 static u64 read_tsc(void)
2569 u64 ret = (u64)rdtsc_ordered();
2570 u64 last = pvclock_gtod_data.clock.cycle_last;
2572 if (likely(ret >= last))
2576 * GCC likes to generate cmov here, but this branch is extremely
2577 * predictable (it's just a function of time and the likely is
2578 * very likely) and there's a data dependence, so force GCC
2579 * to generate a branch instead. I don't barrier() because
2580 * we don't actually need a barrier, and if this function
2581 * ever gets inlined it will generate worse code.
2587 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2593 switch (clock->vclock_mode) {
2594 case VDSO_CLOCKMODE_HVCLOCK:
2595 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2597 if (tsc_pg_val != U64_MAX) {
2598 /* TSC page valid */
2599 *mode = VDSO_CLOCKMODE_HVCLOCK;
2600 v = (tsc_pg_val - clock->cycle_last) &
2603 /* TSC page invalid */
2604 *mode = VDSO_CLOCKMODE_NONE;
2607 case VDSO_CLOCKMODE_TSC:
2608 *mode = VDSO_CLOCKMODE_TSC;
2609 *tsc_timestamp = read_tsc();
2610 v = (*tsc_timestamp - clock->cycle_last) &
2614 *mode = VDSO_CLOCKMODE_NONE;
2617 if (*mode == VDSO_CLOCKMODE_NONE)
2618 *tsc_timestamp = v = 0;
2620 return v * clock->mult;
2623 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2625 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2631 seq = read_seqcount_begin(>od->seq);
2632 ns = gtod->raw_clock.base_cycles;
2633 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2634 ns >>= gtod->raw_clock.shift;
2635 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2636 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2642 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2644 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2650 seq = read_seqcount_begin(>od->seq);
2651 ts->tv_sec = gtod->wall_time_sec;
2652 ns = gtod->clock.base_cycles;
2653 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2654 ns >>= gtod->clock.shift;
2655 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2657 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2663 /* returns true if host is using TSC based clocksource */
2664 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2666 /* checked again under seqlock below */
2667 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2670 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2674 /* returns true if host is using TSC based clocksource */
2675 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2678 /* checked again under seqlock below */
2679 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2682 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2688 * Assuming a stable TSC across physical CPUS, and a stable TSC
2689 * across virtual CPUs, the following condition is possible.
2690 * Each numbered line represents an event visible to both
2691 * CPUs at the next numbered event.
2693 * "timespecX" represents host monotonic time. "tscX" represents
2696 * VCPU0 on CPU0 | VCPU1 on CPU1
2698 * 1. read timespec0,tsc0
2699 * 2. | timespec1 = timespec0 + N
2701 * 3. transition to guest | transition to guest
2702 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2703 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2704 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2706 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2709 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2711 * - 0 < N - M => M < N
2713 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2714 * always the case (the difference between two distinct xtime instances
2715 * might be smaller then the difference between corresponding TSC reads,
2716 * when updating guest vcpus pvclock areas).
2718 * To avoid that problem, do not allow visibility of distinct
2719 * system_timestamp/tsc_timestamp values simultaneously: use a master
2720 * copy of host monotonic time values. Update that master copy
2723 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2727 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2729 #ifdef CONFIG_X86_64
2730 struct kvm_arch *ka = &kvm->arch;
2732 bool host_tsc_clocksource, vcpus_matched;
2734 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2735 atomic_read(&kvm->online_vcpus));
2738 * If the host uses TSC clock, then passthrough TSC as stable
2741 host_tsc_clocksource = kvm_get_time_and_clockread(
2742 &ka->master_kernel_ns,
2743 &ka->master_cycle_now);
2745 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2746 && !ka->backwards_tsc_observed
2747 && !ka->boot_vcpu_runs_old_kvmclock;
2749 if (ka->use_master_clock)
2750 atomic_set(&kvm_guest_has_master_clock, 1);
2752 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2753 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2758 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2760 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2763 static void kvm_gen_update_masterclock(struct kvm *kvm)
2765 #ifdef CONFIG_X86_64
2767 struct kvm_vcpu *vcpu;
2768 struct kvm_arch *ka = &kvm->arch;
2769 unsigned long flags;
2771 kvm_hv_invalidate_tsc_page(kvm);
2773 kvm_make_mclock_inprogress_request(kvm);
2775 /* no guest entries from this point */
2776 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2777 pvclock_update_vm_gtod_copy(kvm);
2778 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2780 kvm_for_each_vcpu(i, vcpu, kvm)
2781 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2783 /* guest entries allowed */
2784 kvm_for_each_vcpu(i, vcpu, kvm)
2785 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2789 u64 get_kvmclock_ns(struct kvm *kvm)
2791 struct kvm_arch *ka = &kvm->arch;
2792 struct pvclock_vcpu_time_info hv_clock;
2793 unsigned long flags;
2796 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2797 if (!ka->use_master_clock) {
2798 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2799 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2802 hv_clock.tsc_timestamp = ka->master_cycle_now;
2803 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2804 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2806 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2809 if (__this_cpu_read(cpu_tsc_khz)) {
2810 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2811 &hv_clock.tsc_shift,
2812 &hv_clock.tsc_to_system_mul);
2813 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2815 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2822 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2823 struct gfn_to_hva_cache *cache,
2824 unsigned int offset)
2826 struct kvm_vcpu_arch *vcpu = &v->arch;
2827 struct pvclock_vcpu_time_info guest_hv_clock;
2829 if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2830 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2833 /* This VCPU is paused, but it's legal for a guest to read another
2834 * VCPU's kvmclock, so we really have to follow the specification where
2835 * it says that version is odd if data is being modified, and even after
2838 * Version field updates must be kept separate. This is because
2839 * kvm_write_guest_cached might use a "rep movs" instruction, and
2840 * writes within a string instruction are weakly ordered. So there
2841 * are three writes overall.
2843 * As a small optimization, only write the version field in the first
2844 * and third write. The vcpu->pv_time cache is still valid, because the
2845 * version field is the first in the struct.
2847 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2849 if (guest_hv_clock.version & 1)
2850 ++guest_hv_clock.version; /* first time write, random junk */
2852 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2853 kvm_write_guest_offset_cached(v->kvm, cache,
2854 &vcpu->hv_clock, offset,
2855 sizeof(vcpu->hv_clock.version));
2859 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2860 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2862 if (vcpu->pvclock_set_guest_stopped_request) {
2863 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2864 vcpu->pvclock_set_guest_stopped_request = false;
2867 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2869 kvm_write_guest_offset_cached(v->kvm, cache,
2870 &vcpu->hv_clock, offset,
2871 sizeof(vcpu->hv_clock));
2875 vcpu->hv_clock.version++;
2876 kvm_write_guest_offset_cached(v->kvm, cache,
2877 &vcpu->hv_clock, offset,
2878 sizeof(vcpu->hv_clock.version));
2881 static int kvm_guest_time_update(struct kvm_vcpu *v)
2883 unsigned long flags, tgt_tsc_khz;
2884 struct kvm_vcpu_arch *vcpu = &v->arch;
2885 struct kvm_arch *ka = &v->kvm->arch;
2887 u64 tsc_timestamp, host_tsc;
2889 bool use_master_clock;
2895 * If the host uses TSC clock, then passthrough TSC as stable
2898 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2899 use_master_clock = ka->use_master_clock;
2900 if (use_master_clock) {
2901 host_tsc = ka->master_cycle_now;
2902 kernel_ns = ka->master_kernel_ns;
2904 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2906 /* Keep irq disabled to prevent changes to the clock */
2907 local_irq_save(flags);
2908 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2909 if (unlikely(tgt_tsc_khz == 0)) {
2910 local_irq_restore(flags);
2911 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2914 if (!use_master_clock) {
2916 kernel_ns = get_kvmclock_base_ns();
2919 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2922 * We may have to catch up the TSC to match elapsed wall clock
2923 * time for two reasons, even if kvmclock is used.
2924 * 1) CPU could have been running below the maximum TSC rate
2925 * 2) Broken TSC compensation resets the base at each VCPU
2926 * entry to avoid unknown leaps of TSC even when running
2927 * again on the same CPU. This may cause apparent elapsed
2928 * time to disappear, and the guest to stand still or run
2931 if (vcpu->tsc_catchup) {
2932 u64 tsc = compute_guest_tsc(v, kernel_ns);
2933 if (tsc > tsc_timestamp) {
2934 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2935 tsc_timestamp = tsc;
2939 local_irq_restore(flags);
2941 /* With all the info we got, fill in the values */
2943 if (kvm_has_tsc_control)
2944 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2945 v->arch.l1_tsc_scaling_ratio);
2947 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2948 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2949 &vcpu->hv_clock.tsc_shift,
2950 &vcpu->hv_clock.tsc_to_system_mul);
2951 vcpu->hw_tsc_khz = tgt_tsc_khz;
2954 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2955 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2956 vcpu->last_guest_tsc = tsc_timestamp;
2958 /* If the host uses TSC clocksource, then it is stable */
2960 if (use_master_clock)
2961 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2963 vcpu->hv_clock.flags = pvclock_flags;
2965 if (vcpu->pv_time_enabled)
2966 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2967 if (vcpu->xen.vcpu_info_set)
2968 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2969 offsetof(struct compat_vcpu_info, time));
2970 if (vcpu->xen.vcpu_time_info_set)
2971 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2972 if (v == kvm_get_vcpu(v->kvm, 0))
2973 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2978 * kvmclock updates which are isolated to a given vcpu, such as
2979 * vcpu->cpu migration, should not allow system_timestamp from
2980 * the rest of the vcpus to remain static. Otherwise ntp frequency
2981 * correction applies to one vcpu's system_timestamp but not
2984 * So in those cases, request a kvmclock update for all vcpus.
2985 * We need to rate-limit these requests though, as they can
2986 * considerably slow guests that have a large number of vcpus.
2987 * The time for a remote vcpu to update its kvmclock is bound
2988 * by the delay we use to rate-limit the updates.
2991 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2993 static void kvmclock_update_fn(struct work_struct *work)
2996 struct delayed_work *dwork = to_delayed_work(work);
2997 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2998 kvmclock_update_work);
2999 struct kvm *kvm = container_of(ka, struct kvm, arch);
3000 struct kvm_vcpu *vcpu;
3002 kvm_for_each_vcpu(i, vcpu, kvm) {
3003 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3004 kvm_vcpu_kick(vcpu);
3008 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3010 struct kvm *kvm = v->kvm;
3012 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3013 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3014 KVMCLOCK_UPDATE_DELAY);
3017 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3019 static void kvmclock_sync_fn(struct work_struct *work)
3021 struct delayed_work *dwork = to_delayed_work(work);
3022 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3023 kvmclock_sync_work);
3024 struct kvm *kvm = container_of(ka, struct kvm, arch);
3026 if (!kvmclock_periodic_sync)
3029 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3030 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3031 KVMCLOCK_SYNC_PERIOD);
3035 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3037 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3039 /* McStatusWrEn enabled? */
3040 if (guest_cpuid_is_amd_or_hygon(vcpu))
3041 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3046 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3048 u64 mcg_cap = vcpu->arch.mcg_cap;
3049 unsigned bank_num = mcg_cap & 0xff;
3050 u32 msr = msr_info->index;
3051 u64 data = msr_info->data;
3054 case MSR_IA32_MCG_STATUS:
3055 vcpu->arch.mcg_status = data;
3057 case MSR_IA32_MCG_CTL:
3058 if (!(mcg_cap & MCG_CTL_P) &&
3059 (data || !msr_info->host_initiated))
3061 if (data != 0 && data != ~(u64)0)
3063 vcpu->arch.mcg_ctl = data;
3066 if (msr >= MSR_IA32_MC0_CTL &&
3067 msr < MSR_IA32_MCx_CTL(bank_num)) {
3068 u32 offset = array_index_nospec(
3069 msr - MSR_IA32_MC0_CTL,
3070 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3072 /* only 0 or all 1s can be written to IA32_MCi_CTL
3073 * some Linux kernels though clear bit 10 in bank 4 to
3074 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3075 * this to avoid an uncatched #GP in the guest
3077 if ((offset & 0x3) == 0 &&
3078 data != 0 && (data | (1 << 10)) != ~(u64)0)
3082 if (!msr_info->host_initiated &&
3083 (offset & 0x3) == 1 && data != 0) {
3084 if (!can_set_mci_status(vcpu))
3088 vcpu->arch.mce_banks[offset] = data;
3096 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3098 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3100 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3103 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3105 gpa_t gpa = data & ~0x3f;
3107 /* Bits 4:5 are reserved, Should be zero */
3111 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3112 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3115 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3116 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3119 if (!lapic_in_kernel(vcpu))
3120 return data ? 1 : 0;
3122 vcpu->arch.apf.msr_en_val = data;
3124 if (!kvm_pv_async_pf_enabled(vcpu)) {
3125 kvm_clear_async_pf_completion_queue(vcpu);
3126 kvm_async_pf_hash_reset(vcpu);
3130 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3134 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3135 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3137 kvm_async_pf_wakeup_all(vcpu);
3142 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3144 /* Bits 8-63 are reserved */
3148 if (!lapic_in_kernel(vcpu))
3151 vcpu->arch.apf.msr_int_val = data;
3153 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3158 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3160 vcpu->arch.pv_time_enabled = false;
3161 vcpu->arch.time = 0;
3164 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3166 ++vcpu->stat.tlb_flush;
3167 static_call(kvm_x86_tlb_flush_all)(vcpu);
3170 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3172 ++vcpu->stat.tlb_flush;
3176 * A TLB flush on behalf of the guest is equivalent to
3177 * INVPCID(all), toggling CR4.PGE, etc., which requires
3178 * a forced sync of the shadow page tables. Unload the
3179 * entire MMU here and the subsequent load will sync the
3180 * shadow page tables, and also flush the TLB.
3182 kvm_mmu_unload(vcpu);
3186 static_call(kvm_x86_tlb_flush_guest)(vcpu);
3189 static void record_steal_time(struct kvm_vcpu *vcpu)
3191 struct kvm_host_map map;
3192 struct kvm_steal_time *st;
3194 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3195 kvm_xen_runstate_set_running(vcpu);
3199 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3202 /* -EAGAIN is returned in atomic context so we can just return. */
3203 if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3204 &map, &vcpu->arch.st.cache, false))
3208 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3211 * Doing a TLB flush here, on the guest's behalf, can avoid
3214 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3215 u8 st_preempted = xchg(&st->preempted, 0);
3217 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3218 st_preempted & KVM_VCPU_FLUSH_TLB);
3219 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3220 kvm_vcpu_flush_tlb_guest(vcpu);
3225 vcpu->arch.st.preempted = 0;
3227 if (st->version & 1)
3228 st->version += 1; /* first time write, random junk */
3234 st->steal += current->sched_info.run_delay -
3235 vcpu->arch.st.last_steal;
3236 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3242 kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3245 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3248 u32 msr = msr_info->index;
3249 u64 data = msr_info->data;
3251 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3252 return kvm_xen_write_hypercall_page(vcpu, data);
3255 case MSR_AMD64_NB_CFG:
3256 case MSR_IA32_UCODE_WRITE:
3257 case MSR_VM_HSAVE_PA:
3258 case MSR_AMD64_PATCH_LOADER:
3259 case MSR_AMD64_BU_CFG2:
3260 case MSR_AMD64_DC_CFG:
3261 case MSR_F15H_EX_CFG:
3264 case MSR_IA32_UCODE_REV:
3265 if (msr_info->host_initiated)
3266 vcpu->arch.microcode_version = data;
3268 case MSR_IA32_ARCH_CAPABILITIES:
3269 if (!msr_info->host_initiated)
3271 vcpu->arch.arch_capabilities = data;
3273 case MSR_IA32_PERF_CAPABILITIES: {
3274 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3276 if (!msr_info->host_initiated)
3278 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3280 if (data & ~msr_ent.data)
3283 vcpu->arch.perf_capabilities = data;
3288 return set_efer(vcpu, msr_info);
3290 data &= ~(u64)0x40; /* ignore flush filter disable */
3291 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3292 data &= ~(u64)0x8; /* ignore TLB cache disable */
3294 /* Handle McStatusWrEn */
3295 if (data == BIT_ULL(18)) {
3296 vcpu->arch.msr_hwcr = data;
3297 } else if (data != 0) {
3298 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3303 case MSR_FAM10H_MMIO_CONF_BASE:
3305 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3310 case 0x200 ... 0x2ff:
3311 return kvm_mtrr_set_msr(vcpu, msr, data);
3312 case MSR_IA32_APICBASE:
3313 return kvm_set_apic_base(vcpu, msr_info);
3314 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3315 return kvm_x2apic_msr_write(vcpu, msr, data);
3316 case MSR_IA32_TSC_DEADLINE:
3317 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3319 case MSR_IA32_TSC_ADJUST:
3320 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3321 if (!msr_info->host_initiated) {
3322 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3323 adjust_tsc_offset_guest(vcpu, adj);
3324 /* Before back to guest, tsc_timestamp must be adjusted
3325 * as well, otherwise guest's percpu pvclock time could jump.
3327 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3329 vcpu->arch.ia32_tsc_adjust_msr = data;
3332 case MSR_IA32_MISC_ENABLE:
3333 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3334 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3335 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3337 vcpu->arch.ia32_misc_enable_msr = data;
3338 kvm_update_cpuid_runtime(vcpu);
3340 vcpu->arch.ia32_misc_enable_msr = data;
3343 case MSR_IA32_SMBASE:
3344 if (!msr_info->host_initiated)
3346 vcpu->arch.smbase = data;
3348 case MSR_IA32_POWER_CTL:
3349 vcpu->arch.msr_ia32_power_ctl = data;
3352 if (msr_info->host_initiated) {
3353 kvm_synchronize_tsc(vcpu, data);
3355 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3356 adjust_tsc_offset_guest(vcpu, adj);
3357 vcpu->arch.ia32_tsc_adjust_msr += adj;
3361 if (!msr_info->host_initiated &&
3362 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3365 * KVM supports exposing PT to the guest, but does not support
3366 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3367 * XSAVES/XRSTORS to save/restore PT MSRs.
3369 if (data & ~supported_xss)
3371 vcpu->arch.ia32_xss = data;
3374 if (!msr_info->host_initiated)
3376 vcpu->arch.smi_count = data;
3378 case MSR_KVM_WALL_CLOCK_NEW:
3379 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3382 vcpu->kvm->arch.wall_clock = data;
3383 kvm_write_wall_clock(vcpu->kvm, data, 0);
3385 case MSR_KVM_WALL_CLOCK:
3386 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3389 vcpu->kvm->arch.wall_clock = data;
3390 kvm_write_wall_clock(vcpu->kvm, data, 0);
3392 case MSR_KVM_SYSTEM_TIME_NEW:
3393 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3396 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3398 case MSR_KVM_SYSTEM_TIME:
3399 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3402 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3404 case MSR_KVM_ASYNC_PF_EN:
3405 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3408 if (kvm_pv_enable_async_pf(vcpu, data))
3411 case MSR_KVM_ASYNC_PF_INT:
3412 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3415 if (kvm_pv_enable_async_pf_int(vcpu, data))
3418 case MSR_KVM_ASYNC_PF_ACK:
3419 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3422 vcpu->arch.apf.pageready_pending = false;
3423 kvm_check_async_pf_completion(vcpu);
3426 case MSR_KVM_STEAL_TIME:
3427 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3430 if (unlikely(!sched_info_on()))
3433 if (data & KVM_STEAL_RESERVED_MASK)
3436 vcpu->arch.st.msr_val = data;
3438 if (!(data & KVM_MSR_ENABLED))
3441 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3444 case MSR_KVM_PV_EOI_EN:
3445 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3448 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3452 case MSR_KVM_POLL_CONTROL:
3453 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3456 /* only enable bit supported */
3457 if (data & (-1ULL << 1))
3460 vcpu->arch.msr_kvm_poll_control = data;
3463 case MSR_IA32_MCG_CTL:
3464 case MSR_IA32_MCG_STATUS:
3465 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3466 return set_msr_mce(vcpu, msr_info);
3468 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3469 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3472 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3473 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3474 if (kvm_pmu_is_valid_msr(vcpu, msr))
3475 return kvm_pmu_set_msr(vcpu, msr_info);
3477 if (pr || data != 0)
3478 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3479 "0x%x data 0x%llx\n", msr, data);
3481 case MSR_K7_CLK_CTL:
3483 * Ignore all writes to this no longer documented MSR.
3484 * Writes are only relevant for old K7 processors,
3485 * all pre-dating SVM, but a recommended workaround from
3486 * AMD for these chips. It is possible to specify the
3487 * affected processor models on the command line, hence
3488 * the need to ignore the workaround.
3491 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3492 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3493 case HV_X64_MSR_SYNDBG_OPTIONS:
3494 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3495 case HV_X64_MSR_CRASH_CTL:
3496 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3497 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3498 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3499 case HV_X64_MSR_TSC_EMULATION_STATUS:
3500 return kvm_hv_set_msr_common(vcpu, msr, data,
3501 msr_info->host_initiated);
3502 case MSR_IA32_BBL_CR_CTL3:
3503 /* Drop writes to this legacy MSR -- see rdmsr
3504 * counterpart for further detail.
3506 if (report_ignored_msrs)
3507 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3510 case MSR_AMD64_OSVW_ID_LENGTH:
3511 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3513 vcpu->arch.osvw.length = data;
3515 case MSR_AMD64_OSVW_STATUS:
3516 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3518 vcpu->arch.osvw.status = data;
3520 case MSR_PLATFORM_INFO:
3521 if (!msr_info->host_initiated ||
3522 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3523 cpuid_fault_enabled(vcpu)))
3525 vcpu->arch.msr_platform_info = data;
3527 case MSR_MISC_FEATURES_ENABLES:
3528 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3529 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3530 !supports_cpuid_fault(vcpu)))
3532 vcpu->arch.msr_misc_features_enables = data;
3535 if (kvm_pmu_is_valid_msr(vcpu, msr))
3536 return kvm_pmu_set_msr(vcpu, msr_info);
3537 return KVM_MSR_RET_INVALID;
3541 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3543 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3546 u64 mcg_cap = vcpu->arch.mcg_cap;
3547 unsigned bank_num = mcg_cap & 0xff;
3550 case MSR_IA32_P5_MC_ADDR:
3551 case MSR_IA32_P5_MC_TYPE:
3554 case MSR_IA32_MCG_CAP:
3555 data = vcpu->arch.mcg_cap;
3557 case MSR_IA32_MCG_CTL:
3558 if (!(mcg_cap & MCG_CTL_P) && !host)
3560 data = vcpu->arch.mcg_ctl;
3562 case MSR_IA32_MCG_STATUS:
3563 data = vcpu->arch.mcg_status;
3566 if (msr >= MSR_IA32_MC0_CTL &&
3567 msr < MSR_IA32_MCx_CTL(bank_num)) {
3568 u32 offset = array_index_nospec(
3569 msr - MSR_IA32_MC0_CTL,
3570 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3572 data = vcpu->arch.mce_banks[offset];
3581 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3583 switch (msr_info->index) {
3584 case MSR_IA32_PLATFORM_ID:
3585 case MSR_IA32_EBL_CR_POWERON:
3586 case MSR_IA32_LASTBRANCHFROMIP:
3587 case MSR_IA32_LASTBRANCHTOIP:
3588 case MSR_IA32_LASTINTFROMIP:
3589 case MSR_IA32_LASTINTTOIP:
3590 case MSR_AMD64_SYSCFG:
3591 case MSR_K8_TSEG_ADDR:
3592 case MSR_K8_TSEG_MASK:
3593 case MSR_VM_HSAVE_PA:
3594 case MSR_K8_INT_PENDING_MSG:
3595 case MSR_AMD64_NB_CFG:
3596 case MSR_FAM10H_MMIO_CONF_BASE:
3597 case MSR_AMD64_BU_CFG2:
3598 case MSR_IA32_PERF_CTL:
3599 case MSR_AMD64_DC_CFG:
3600 case MSR_F15H_EX_CFG:
3602 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3603 * limit) MSRs. Just return 0, as we do not want to expose the host
3604 * data here. Do not conditionalize this on CPUID, as KVM does not do
3605 * so for existing CPU-specific MSRs.
3607 case MSR_RAPL_POWER_UNIT:
3608 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3609 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3610 case MSR_PKG_ENERGY_STATUS: /* Total package */
3611 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3614 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3615 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3616 return kvm_pmu_get_msr(vcpu, msr_info);
3617 if (!msr_info->host_initiated)
3621 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3622 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3623 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3624 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3625 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3626 return kvm_pmu_get_msr(vcpu, msr_info);
3629 case MSR_IA32_UCODE_REV:
3630 msr_info->data = vcpu->arch.microcode_version;
3632 case MSR_IA32_ARCH_CAPABILITIES:
3633 if (!msr_info->host_initiated &&
3634 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3636 msr_info->data = vcpu->arch.arch_capabilities;
3638 case MSR_IA32_PERF_CAPABILITIES:
3639 if (!msr_info->host_initiated &&
3640 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3642 msr_info->data = vcpu->arch.perf_capabilities;
3644 case MSR_IA32_POWER_CTL:
3645 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3647 case MSR_IA32_TSC: {
3649 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3650 * even when not intercepted. AMD manual doesn't explicitly
3651 * state this but appears to behave the same.
3653 * On userspace reads and writes, however, we unconditionally
3654 * return L1's TSC value to ensure backwards-compatible
3655 * behavior for migration.
3659 if (msr_info->host_initiated) {
3660 offset = vcpu->arch.l1_tsc_offset;
3661 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3663 offset = vcpu->arch.tsc_offset;
3664 ratio = vcpu->arch.tsc_scaling_ratio;
3667 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3671 case 0x200 ... 0x2ff:
3672 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3673 case 0xcd: /* fsb frequency */
3677 * MSR_EBC_FREQUENCY_ID
3678 * Conservative value valid for even the basic CPU models.
3679 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3680 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3681 * and 266MHz for model 3, or 4. Set Core Clock
3682 * Frequency to System Bus Frequency Ratio to 1 (bits
3683 * 31:24) even though these are only valid for CPU
3684 * models > 2, however guests may end up dividing or
3685 * multiplying by zero otherwise.
3687 case MSR_EBC_FREQUENCY_ID:
3688 msr_info->data = 1 << 24;
3690 case MSR_IA32_APICBASE:
3691 msr_info->data = kvm_get_apic_base(vcpu);
3693 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3694 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3695 case MSR_IA32_TSC_DEADLINE:
3696 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3698 case MSR_IA32_TSC_ADJUST:
3699 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3701 case MSR_IA32_MISC_ENABLE:
3702 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3704 case MSR_IA32_SMBASE:
3705 if (!msr_info->host_initiated)
3707 msr_info->data = vcpu->arch.smbase;
3710 msr_info->data = vcpu->arch.smi_count;
3712 case MSR_IA32_PERF_STATUS:
3713 /* TSC increment by tick */
3714 msr_info->data = 1000ULL;
3715 /* CPU multiplier */
3716 msr_info->data |= (((uint64_t)4ULL) << 40);
3719 msr_info->data = vcpu->arch.efer;
3721 case MSR_KVM_WALL_CLOCK:
3722 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3725 msr_info->data = vcpu->kvm->arch.wall_clock;
3727 case MSR_KVM_WALL_CLOCK_NEW:
3728 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3731 msr_info->data = vcpu->kvm->arch.wall_clock;
3733 case MSR_KVM_SYSTEM_TIME:
3734 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3737 msr_info->data = vcpu->arch.time;
3739 case MSR_KVM_SYSTEM_TIME_NEW:
3740 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3743 msr_info->data = vcpu->arch.time;
3745 case MSR_KVM_ASYNC_PF_EN:
3746 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3749 msr_info->data = vcpu->arch.apf.msr_en_val;
3751 case MSR_KVM_ASYNC_PF_INT:
3752 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3755 msr_info->data = vcpu->arch.apf.msr_int_val;
3757 case MSR_KVM_ASYNC_PF_ACK:
3758 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3763 case MSR_KVM_STEAL_TIME:
3764 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3767 msr_info->data = vcpu->arch.st.msr_val;
3769 case MSR_KVM_PV_EOI_EN:
3770 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3773 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3775 case MSR_KVM_POLL_CONTROL:
3776 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3779 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3781 case MSR_IA32_P5_MC_ADDR:
3782 case MSR_IA32_P5_MC_TYPE:
3783 case MSR_IA32_MCG_CAP:
3784 case MSR_IA32_MCG_CTL:
3785 case MSR_IA32_MCG_STATUS:
3786 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3787 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3788 msr_info->host_initiated);
3790 if (!msr_info->host_initiated &&
3791 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3793 msr_info->data = vcpu->arch.ia32_xss;
3795 case MSR_K7_CLK_CTL:
3797 * Provide expected ramp-up count for K7. All other
3798 * are set to zero, indicating minimum divisors for
3801 * This prevents guest kernels on AMD host with CPU
3802 * type 6, model 8 and higher from exploding due to
3803 * the rdmsr failing.
3805 msr_info->data = 0x20000000;
3807 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3808 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3809 case HV_X64_MSR_SYNDBG_OPTIONS:
3810 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3811 case HV_X64_MSR_CRASH_CTL:
3812 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3813 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3814 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3815 case HV_X64_MSR_TSC_EMULATION_STATUS:
3816 return kvm_hv_get_msr_common(vcpu,
3817 msr_info->index, &msr_info->data,
3818 msr_info->host_initiated);
3819 case MSR_IA32_BBL_CR_CTL3:
3820 /* This legacy MSR exists but isn't fully documented in current
3821 * silicon. It is however accessed by winxp in very narrow
3822 * scenarios where it sets bit #19, itself documented as
3823 * a "reserved" bit. Best effort attempt to source coherent
3824 * read data here should the balance of the register be
3825 * interpreted by the guest:
3827 * L2 cache control register 3: 64GB range, 256KB size,
3828 * enabled, latency 0x1, configured
3830 msr_info->data = 0xbe702111;
3832 case MSR_AMD64_OSVW_ID_LENGTH:
3833 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3835 msr_info->data = vcpu->arch.osvw.length;
3837 case MSR_AMD64_OSVW_STATUS:
3838 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3840 msr_info->data = vcpu->arch.osvw.status;
3842 case MSR_PLATFORM_INFO:
3843 if (!msr_info->host_initiated &&
3844 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3846 msr_info->data = vcpu->arch.msr_platform_info;
3848 case MSR_MISC_FEATURES_ENABLES:
3849 msr_info->data = vcpu->arch.msr_misc_features_enables;
3852 msr_info->data = vcpu->arch.msr_hwcr;
3855 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3856 return kvm_pmu_get_msr(vcpu, msr_info);
3857 return KVM_MSR_RET_INVALID;
3861 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3864 * Read or write a bunch of msrs. All parameters are kernel addresses.
3866 * @return number of msrs set successfully.
3868 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3869 struct kvm_msr_entry *entries,
3870 int (*do_msr)(struct kvm_vcpu *vcpu,
3871 unsigned index, u64 *data))
3875 for (i = 0; i < msrs->nmsrs; ++i)
3876 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3883 * Read or write a bunch of msrs. Parameters are user addresses.
3885 * @return number of msrs set successfully.
3887 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3888 int (*do_msr)(struct kvm_vcpu *vcpu,
3889 unsigned index, u64 *data),
3892 struct kvm_msrs msrs;
3893 struct kvm_msr_entry *entries;
3898 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3902 if (msrs.nmsrs >= MAX_IO_MSRS)
3905 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3906 entries = memdup_user(user_msrs->entries, size);
3907 if (IS_ERR(entries)) {
3908 r = PTR_ERR(entries);
3912 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3917 if (writeback && copy_to_user(user_msrs->entries, entries, size))
3928 static inline bool kvm_can_mwait_in_guest(void)
3930 return boot_cpu_has(X86_FEATURE_MWAIT) &&
3931 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3932 boot_cpu_has(X86_FEATURE_ARAT);
3935 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3936 struct kvm_cpuid2 __user *cpuid_arg)
3938 struct kvm_cpuid2 cpuid;
3942 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3945 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3950 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3956 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3961 case KVM_CAP_IRQCHIP:
3963 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3964 case KVM_CAP_SET_TSS_ADDR:
3965 case KVM_CAP_EXT_CPUID:
3966 case KVM_CAP_EXT_EMUL_CPUID:
3967 case KVM_CAP_CLOCKSOURCE:
3969 case KVM_CAP_NOP_IO_DELAY:
3970 case KVM_CAP_MP_STATE:
3971 case KVM_CAP_SYNC_MMU:
3972 case KVM_CAP_USER_NMI:
3973 case KVM_CAP_REINJECT_CONTROL:
3974 case KVM_CAP_IRQ_INJECT_STATUS:
3975 case KVM_CAP_IOEVENTFD:
3976 case KVM_CAP_IOEVENTFD_NO_LENGTH:
3978 case KVM_CAP_PIT_STATE2:
3979 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3980 case KVM_CAP_VCPU_EVENTS:
3981 case KVM_CAP_HYPERV:
3982 case KVM_CAP_HYPERV_VAPIC:
3983 case KVM_CAP_HYPERV_SPIN:
3984 case KVM_CAP_HYPERV_SYNIC:
3985 case KVM_CAP_HYPERV_SYNIC2:
3986 case KVM_CAP_HYPERV_VP_INDEX:
3987 case KVM_CAP_HYPERV_EVENTFD:
3988 case KVM_CAP_HYPERV_TLBFLUSH:
3989 case KVM_CAP_HYPERV_SEND_IPI:
3990 case KVM_CAP_HYPERV_CPUID:
3991 case KVM_CAP_HYPERV_ENFORCE_CPUID:
3992 case KVM_CAP_SYS_HYPERV_CPUID:
3993 case KVM_CAP_PCI_SEGMENT:
3994 case KVM_CAP_DEBUGREGS:
3995 case KVM_CAP_X86_ROBUST_SINGLESTEP:
3997 case KVM_CAP_ASYNC_PF:
3998 case KVM_CAP_ASYNC_PF_INT:
3999 case KVM_CAP_GET_TSC_KHZ:
4000 case KVM_CAP_KVMCLOCK_CTRL:
4001 case KVM_CAP_READONLY_MEM:
4002 case KVM_CAP_HYPERV_TIME:
4003 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4004 case KVM_CAP_TSC_DEADLINE_TIMER:
4005 case KVM_CAP_DISABLE_QUIRKS:
4006 case KVM_CAP_SET_BOOT_CPU_ID:
4007 case KVM_CAP_SPLIT_IRQCHIP:
4008 case KVM_CAP_IMMEDIATE_EXIT:
4009 case KVM_CAP_PMU_EVENT_FILTER:
4010 case KVM_CAP_GET_MSR_FEATURES:
4011 case KVM_CAP_MSR_PLATFORM_INFO:
4012 case KVM_CAP_EXCEPTION_PAYLOAD:
4013 case KVM_CAP_SET_GUEST_DEBUG:
4014 case KVM_CAP_LAST_CPU:
4015 case KVM_CAP_X86_USER_SPACE_MSR:
4016 case KVM_CAP_X86_MSR_FILTER:
4017 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4018 #ifdef CONFIG_X86_SGX_KVM
4019 case KVM_CAP_SGX_ATTRIBUTE:
4021 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4022 case KVM_CAP_SREGS2:
4023 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4026 case KVM_CAP_EXIT_HYPERCALL:
4027 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4029 case KVM_CAP_SET_GUEST_DEBUG2:
4030 return KVM_GUESTDBG_VALID_MASK;
4031 #ifdef CONFIG_KVM_XEN
4032 case KVM_CAP_XEN_HVM:
4033 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4034 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4035 KVM_XEN_HVM_CONFIG_SHARED_INFO;
4036 if (sched_info_on())
4037 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4040 case KVM_CAP_SYNC_REGS:
4041 r = KVM_SYNC_X86_VALID_FIELDS;
4043 case KVM_CAP_ADJUST_CLOCK:
4044 r = KVM_CLOCK_TSC_STABLE;
4046 case KVM_CAP_X86_DISABLE_EXITS:
4047 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4048 KVM_X86_DISABLE_EXITS_CSTATE;
4049 if(kvm_can_mwait_in_guest())
4050 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4052 case KVM_CAP_X86_SMM:
4053 /* SMBASE is usually relocated above 1M on modern chipsets,
4054 * and SMM handlers might indeed rely on 4G segment limits,
4055 * so do not report SMM to be available if real mode is
4056 * emulated via vm86 mode. Still, do not go to great lengths
4057 * to avoid userspace's usage of the feature, because it is a
4058 * fringe case that is not enabled except via specific settings
4059 * of the module parameters.
4061 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4064 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4066 case KVM_CAP_NR_VCPUS:
4067 r = KVM_SOFT_MAX_VCPUS;
4069 case KVM_CAP_MAX_VCPUS:
4072 case KVM_CAP_MAX_VCPU_ID:
4073 r = KVM_MAX_VCPU_ID;
4075 case KVM_CAP_PV_MMU: /* obsolete */
4079 r = KVM_MAX_MCE_BANKS;
4082 r = boot_cpu_has(X86_FEATURE_XSAVE);
4084 case KVM_CAP_TSC_CONTROL:
4085 r = kvm_has_tsc_control;
4087 case KVM_CAP_X2APIC_API:
4088 r = KVM_X2APIC_API_VALID_FLAGS;
4090 case KVM_CAP_NESTED_STATE:
4091 r = kvm_x86_ops.nested_ops->get_state ?
4092 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4094 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4095 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4097 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4098 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4100 case KVM_CAP_SMALLER_MAXPHYADDR:
4101 r = (int) allow_smaller_maxphyaddr;
4103 case KVM_CAP_STEAL_TIME:
4104 r = sched_info_on();
4106 case KVM_CAP_X86_BUS_LOCK_EXIT:
4107 if (kvm_has_bus_lock_exit)
4108 r = KVM_BUS_LOCK_DETECTION_OFF |
4109 KVM_BUS_LOCK_DETECTION_EXIT;
4120 long kvm_arch_dev_ioctl(struct file *filp,
4121 unsigned int ioctl, unsigned long arg)
4123 void __user *argp = (void __user *)arg;
4127 case KVM_GET_MSR_INDEX_LIST: {
4128 struct kvm_msr_list __user *user_msr_list = argp;
4129 struct kvm_msr_list msr_list;
4133 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4136 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4137 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4140 if (n < msr_list.nmsrs)
4143 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4144 num_msrs_to_save * sizeof(u32)))
4146 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4148 num_emulated_msrs * sizeof(u32)))
4153 case KVM_GET_SUPPORTED_CPUID:
4154 case KVM_GET_EMULATED_CPUID: {
4155 struct kvm_cpuid2 __user *cpuid_arg = argp;
4156 struct kvm_cpuid2 cpuid;
4159 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4162 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4168 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4173 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4175 if (copy_to_user(argp, &kvm_mce_cap_supported,
4176 sizeof(kvm_mce_cap_supported)))
4180 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4181 struct kvm_msr_list __user *user_msr_list = argp;
4182 struct kvm_msr_list msr_list;
4186 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4189 msr_list.nmsrs = num_msr_based_features;
4190 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4193 if (n < msr_list.nmsrs)
4196 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4197 num_msr_based_features * sizeof(u32)))
4203 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4205 case KVM_GET_SUPPORTED_HV_CPUID:
4206 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4216 static void wbinvd_ipi(void *garbage)
4221 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4223 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4226 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4228 /* Address WBINVD may be executed by guest */
4229 if (need_emulate_wbinvd(vcpu)) {
4230 if (static_call(kvm_x86_has_wbinvd_exit)())
4231 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4232 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4233 smp_call_function_single(vcpu->cpu,
4234 wbinvd_ipi, NULL, 1);
4237 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4239 /* Save host pkru register if supported */
4240 vcpu->arch.host_pkru = read_pkru();
4242 /* Apply any externally detected TSC adjustments (due to suspend) */
4243 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4244 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4245 vcpu->arch.tsc_offset_adjustment = 0;
4246 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4249 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4250 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4251 rdtsc() - vcpu->arch.last_host_tsc;
4253 mark_tsc_unstable("KVM discovered backwards TSC");
4255 if (kvm_check_tsc_unstable()) {
4256 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4257 vcpu->arch.last_guest_tsc);
4258 kvm_vcpu_write_tsc_offset(vcpu, offset);
4259 vcpu->arch.tsc_catchup = 1;
4262 if (kvm_lapic_hv_timer_in_use(vcpu))
4263 kvm_lapic_restart_hv_timer(vcpu);
4266 * On a host with synchronized TSC, there is no need to update
4267 * kvmclock on vcpu->cpu migration
4269 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4270 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4271 if (vcpu->cpu != cpu)
4272 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4276 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4279 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4281 struct kvm_host_map map;
4282 struct kvm_steal_time *st;
4284 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4287 if (vcpu->arch.st.preempted)
4290 if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4291 &vcpu->arch.st.cache, true))
4295 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4297 st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4299 kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4302 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4306 if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4307 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4310 * Take the srcu lock as memslots will be accessed to check the gfn
4311 * cache generation against the memslots generation.
4313 idx = srcu_read_lock(&vcpu->kvm->srcu);
4314 if (kvm_xen_msr_enabled(vcpu->kvm))
4315 kvm_xen_runstate_set_preempted(vcpu);
4317 kvm_steal_time_set_preempted(vcpu);
4318 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4320 static_call(kvm_x86_vcpu_put)(vcpu);
4321 vcpu->arch.last_host_tsc = rdtsc();
4324 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4325 struct kvm_lapic_state *s)
4327 if (vcpu->arch.apicv_active)
4328 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4330 return kvm_apic_get_state(vcpu, s);
4333 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4334 struct kvm_lapic_state *s)
4338 r = kvm_apic_set_state(vcpu, s);
4341 update_cr8_intercept(vcpu);
4346 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4349 * We can accept userspace's request for interrupt injection
4350 * as long as we have a place to store the interrupt number.
4351 * The actual injection will happen when the CPU is able to
4352 * deliver the interrupt.
4354 if (kvm_cpu_has_extint(vcpu))
4357 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4358 return (!lapic_in_kernel(vcpu) ||
4359 kvm_apic_accept_pic_intr(vcpu));
4362 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4365 * Do not cause an interrupt window exit if an exception
4366 * is pending or an event needs reinjection; userspace
4367 * might want to inject the interrupt manually using KVM_SET_REGS
4368 * or KVM_SET_SREGS. For that to work, we must be at an
4369 * instruction boundary and with no events half-injected.
4371 return (kvm_arch_interrupt_allowed(vcpu) &&
4372 kvm_cpu_accept_dm_intr(vcpu) &&
4373 !kvm_event_needs_reinjection(vcpu) &&
4374 !vcpu->arch.exception.pending);
4377 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4378 struct kvm_interrupt *irq)
4380 if (irq->irq >= KVM_NR_INTERRUPTS)
4383 if (!irqchip_in_kernel(vcpu->kvm)) {
4384 kvm_queue_interrupt(vcpu, irq->irq, false);
4385 kvm_make_request(KVM_REQ_EVENT, vcpu);
4390 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4391 * fail for in-kernel 8259.
4393 if (pic_in_kernel(vcpu->kvm))
4396 if (vcpu->arch.pending_external_vector != -1)
4399 vcpu->arch.pending_external_vector = irq->irq;
4400 kvm_make_request(KVM_REQ_EVENT, vcpu);
4404 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4406 kvm_inject_nmi(vcpu);
4411 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4413 kvm_make_request(KVM_REQ_SMI, vcpu);
4418 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4419 struct kvm_tpr_access_ctl *tac)
4423 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4427 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4431 unsigned bank_num = mcg_cap & 0xff, bank;
4434 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4436 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4439 vcpu->arch.mcg_cap = mcg_cap;
4440 /* Init IA32_MCG_CTL to all 1s */
4441 if (mcg_cap & MCG_CTL_P)
4442 vcpu->arch.mcg_ctl = ~(u64)0;
4443 /* Init IA32_MCi_CTL to all 1s */
4444 for (bank = 0; bank < bank_num; bank++)
4445 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4447 static_call(kvm_x86_setup_mce)(vcpu);
4452 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4453 struct kvm_x86_mce *mce)
4455 u64 mcg_cap = vcpu->arch.mcg_cap;
4456 unsigned bank_num = mcg_cap & 0xff;
4457 u64 *banks = vcpu->arch.mce_banks;
4459 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4462 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4463 * reporting is disabled
4465 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4466 vcpu->arch.mcg_ctl != ~(u64)0)
4468 banks += 4 * mce->bank;
4470 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4471 * reporting is disabled for the bank
4473 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4475 if (mce->status & MCI_STATUS_UC) {
4476 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4477 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4478 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4481 if (banks[1] & MCI_STATUS_VAL)
4482 mce->status |= MCI_STATUS_OVER;
4483 banks[2] = mce->addr;
4484 banks[3] = mce->misc;
4485 vcpu->arch.mcg_status = mce->mcg_status;
4486 banks[1] = mce->status;
4487 kvm_queue_exception(vcpu, MC_VECTOR);
4488 } else if (!(banks[1] & MCI_STATUS_VAL)
4489 || !(banks[1] & MCI_STATUS_UC)) {
4490 if (banks[1] & MCI_STATUS_VAL)
4491 mce->status |= MCI_STATUS_OVER;
4492 banks[2] = mce->addr;
4493 banks[3] = mce->misc;
4494 banks[1] = mce->status;
4496 banks[1] |= MCI_STATUS_OVER;
4500 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4501 struct kvm_vcpu_events *events)
4505 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4509 * In guest mode, payload delivery should be deferred,
4510 * so that the L1 hypervisor can intercept #PF before
4511 * CR2 is modified (or intercept #DB before DR6 is
4512 * modified under nVMX). Unless the per-VM capability,
4513 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4514 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4515 * opportunistically defer the exception payload, deliver it if the
4516 * capability hasn't been requested before processing a
4517 * KVM_GET_VCPU_EVENTS.
4519 if (!vcpu->kvm->arch.exception_payload_enabled &&
4520 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4521 kvm_deliver_exception_payload(vcpu);
4524 * The API doesn't provide the instruction length for software
4525 * exceptions, so don't report them. As long as the guest RIP
4526 * isn't advanced, we should expect to encounter the exception
4529 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4530 events->exception.injected = 0;
4531 events->exception.pending = 0;
4533 events->exception.injected = vcpu->arch.exception.injected;
4534 events->exception.pending = vcpu->arch.exception.pending;
4536 * For ABI compatibility, deliberately conflate
4537 * pending and injected exceptions when
4538 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4540 if (!vcpu->kvm->arch.exception_payload_enabled)
4541 events->exception.injected |=
4542 vcpu->arch.exception.pending;
4544 events->exception.nr = vcpu->arch.exception.nr;
4545 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4546 events->exception.error_code = vcpu->arch.exception.error_code;
4547 events->exception_has_payload = vcpu->arch.exception.has_payload;
4548 events->exception_payload = vcpu->arch.exception.payload;
4550 events->interrupt.injected =
4551 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4552 events->interrupt.nr = vcpu->arch.interrupt.nr;
4553 events->interrupt.soft = 0;
4554 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4556 events->nmi.injected = vcpu->arch.nmi_injected;
4557 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4558 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4559 events->nmi.pad = 0;
4561 events->sipi_vector = 0; /* never valid when reporting to user space */
4563 events->smi.smm = is_smm(vcpu);
4564 events->smi.pending = vcpu->arch.smi_pending;
4565 events->smi.smm_inside_nmi =
4566 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4567 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4569 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4570 | KVM_VCPUEVENT_VALID_SHADOW
4571 | KVM_VCPUEVENT_VALID_SMM);
4572 if (vcpu->kvm->arch.exception_payload_enabled)
4573 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4575 memset(&events->reserved, 0, sizeof(events->reserved));
4578 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4580 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4581 struct kvm_vcpu_events *events)
4583 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4584 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4585 | KVM_VCPUEVENT_VALID_SHADOW
4586 | KVM_VCPUEVENT_VALID_SMM
4587 | KVM_VCPUEVENT_VALID_PAYLOAD))
4590 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4591 if (!vcpu->kvm->arch.exception_payload_enabled)
4593 if (events->exception.pending)
4594 events->exception.injected = 0;
4596 events->exception_has_payload = 0;
4598 events->exception.pending = 0;
4599 events->exception_has_payload = 0;
4602 if ((events->exception.injected || events->exception.pending) &&
4603 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4606 /* INITs are latched while in SMM */
4607 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4608 (events->smi.smm || events->smi.pending) &&
4609 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4613 vcpu->arch.exception.injected = events->exception.injected;
4614 vcpu->arch.exception.pending = events->exception.pending;
4615 vcpu->arch.exception.nr = events->exception.nr;
4616 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4617 vcpu->arch.exception.error_code = events->exception.error_code;
4618 vcpu->arch.exception.has_payload = events->exception_has_payload;
4619 vcpu->arch.exception.payload = events->exception_payload;
4621 vcpu->arch.interrupt.injected = events->interrupt.injected;
4622 vcpu->arch.interrupt.nr = events->interrupt.nr;
4623 vcpu->arch.interrupt.soft = events->interrupt.soft;
4624 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4625 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4626 events->interrupt.shadow);
4628 vcpu->arch.nmi_injected = events->nmi.injected;
4629 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4630 vcpu->arch.nmi_pending = events->nmi.pending;
4631 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4633 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4634 lapic_in_kernel(vcpu))
4635 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4637 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4638 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4639 kvm_smm_changed(vcpu, events->smi.smm);
4641 vcpu->arch.smi_pending = events->smi.pending;
4643 if (events->smi.smm) {
4644 if (events->smi.smm_inside_nmi)
4645 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4647 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4650 if (lapic_in_kernel(vcpu)) {
4651 if (events->smi.latched_init)
4652 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4654 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4658 kvm_make_request(KVM_REQ_EVENT, vcpu);
4663 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4664 struct kvm_debugregs *dbgregs)
4668 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4669 kvm_get_dr(vcpu, 6, &val);
4671 dbgregs->dr7 = vcpu->arch.dr7;
4673 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4676 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4677 struct kvm_debugregs *dbgregs)
4682 if (!kvm_dr6_valid(dbgregs->dr6))
4684 if (!kvm_dr7_valid(dbgregs->dr7))
4687 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4688 kvm_update_dr0123(vcpu);
4689 vcpu->arch.dr6 = dbgregs->dr6;
4690 vcpu->arch.dr7 = dbgregs->dr7;
4691 kvm_update_dr7(vcpu);
4696 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4698 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4700 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4701 u64 xstate_bv = xsave->header.xfeatures;
4705 * Copy legacy XSAVE area, to avoid complications with CPUID
4706 * leaves 0 and 1 in the loop below.
4708 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4711 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4712 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4715 * Copy each region from the possibly compacted offset to the
4716 * non-compacted offset.
4718 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4720 u32 size, offset, ecx, edx;
4721 u64 xfeature_mask = valid & -valid;
4722 int xfeature_nr = fls64(xfeature_mask) - 1;
4725 cpuid_count(XSTATE_CPUID, xfeature_nr,
4726 &size, &offset, &ecx, &edx);
4728 if (xfeature_nr == XFEATURE_PKRU) {
4729 memcpy(dest + offset, &vcpu->arch.pkru,
4730 sizeof(vcpu->arch.pkru));
4732 src = get_xsave_addr(xsave, xfeature_nr);
4734 memcpy(dest + offset, src, size);
4737 valid -= xfeature_mask;
4741 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4743 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4744 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4748 * Copy legacy XSAVE area, to avoid complications with CPUID
4749 * leaves 0 and 1 in the loop below.
4751 memcpy(xsave, src, XSAVE_HDR_OFFSET);
4753 /* Set XSTATE_BV and possibly XCOMP_BV. */
4754 xsave->header.xfeatures = xstate_bv;
4755 if (boot_cpu_has(X86_FEATURE_XSAVES))
4756 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4759 * Copy each region from the non-compacted offset to the
4760 * possibly compacted offset.
4762 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4764 u32 size, offset, ecx, edx;
4765 u64 xfeature_mask = valid & -valid;
4766 int xfeature_nr = fls64(xfeature_mask) - 1;
4768 cpuid_count(XSTATE_CPUID, xfeature_nr,
4769 &size, &offset, &ecx, &edx);
4771 if (xfeature_nr == XFEATURE_PKRU) {
4772 memcpy(&vcpu->arch.pkru, src + offset,
4773 sizeof(vcpu->arch.pkru));
4775 void *dest = get_xsave_addr(xsave, xfeature_nr);
4778 memcpy(dest, src + offset, size);
4781 valid -= xfeature_mask;
4785 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4786 struct kvm_xsave *guest_xsave)
4788 if (!vcpu->arch.guest_fpu)
4791 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4792 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4793 fill_xsave((u8 *) guest_xsave->region, vcpu);
4795 memcpy(guest_xsave->region,
4796 &vcpu->arch.guest_fpu->state.fxsave,
4797 sizeof(struct fxregs_state));
4798 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4799 XFEATURE_MASK_FPSSE;
4803 #define XSAVE_MXCSR_OFFSET 24
4805 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4806 struct kvm_xsave *guest_xsave)
4811 if (!vcpu->arch.guest_fpu)
4814 xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4815 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4817 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4819 * Here we allow setting states that are not present in
4820 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4821 * with old userspace.
4823 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4825 load_xsave(vcpu, (u8 *)guest_xsave->region);
4827 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4828 mxcsr & ~mxcsr_feature_mask)
4830 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4831 guest_xsave->region, sizeof(struct fxregs_state));
4836 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4837 struct kvm_xcrs *guest_xcrs)
4839 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4840 guest_xcrs->nr_xcrs = 0;
4844 guest_xcrs->nr_xcrs = 1;
4845 guest_xcrs->flags = 0;
4846 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4847 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4850 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4851 struct kvm_xcrs *guest_xcrs)
4855 if (!boot_cpu_has(X86_FEATURE_XSAVE))
4858 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4861 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4862 /* Only support XCR0 currently */
4863 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4864 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4865 guest_xcrs->xcrs[i].value);
4874 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4875 * stopped by the hypervisor. This function will be called from the host only.
4876 * EINVAL is returned when the host attempts to set the flag for a guest that
4877 * does not support pv clocks.
4879 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4881 if (!vcpu->arch.pv_time_enabled)
4883 vcpu->arch.pvclock_set_guest_stopped_request = true;
4884 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4888 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4889 struct kvm_enable_cap *cap)
4892 uint16_t vmcs_version;
4893 void __user *user_ptr;
4899 case KVM_CAP_HYPERV_SYNIC2:
4904 case KVM_CAP_HYPERV_SYNIC:
4905 if (!irqchip_in_kernel(vcpu->kvm))
4907 return kvm_hv_activate_synic(vcpu, cap->cap ==
4908 KVM_CAP_HYPERV_SYNIC2);
4909 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4910 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4912 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4914 user_ptr = (void __user *)(uintptr_t)cap->args[0];
4915 if (copy_to_user(user_ptr, &vmcs_version,
4916 sizeof(vmcs_version)))
4920 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4921 if (!kvm_x86_ops.enable_direct_tlbflush)
4924 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4926 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4927 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4929 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4930 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4931 if (vcpu->arch.pv_cpuid.enforce)
4932 kvm_update_pv_runtime(vcpu);
4940 long kvm_arch_vcpu_ioctl(struct file *filp,
4941 unsigned int ioctl, unsigned long arg)
4943 struct kvm_vcpu *vcpu = filp->private_data;
4944 void __user *argp = (void __user *)arg;
4947 struct kvm_sregs2 *sregs2;
4948 struct kvm_lapic_state *lapic;
4949 struct kvm_xsave *xsave;
4950 struct kvm_xcrs *xcrs;
4958 case KVM_GET_LAPIC: {
4960 if (!lapic_in_kernel(vcpu))
4962 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4963 GFP_KERNEL_ACCOUNT);
4968 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4972 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4977 case KVM_SET_LAPIC: {
4979 if (!lapic_in_kernel(vcpu))
4981 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4982 if (IS_ERR(u.lapic)) {
4983 r = PTR_ERR(u.lapic);
4987 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4990 case KVM_INTERRUPT: {
4991 struct kvm_interrupt irq;
4994 if (copy_from_user(&irq, argp, sizeof(irq)))
4996 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5000 r = kvm_vcpu_ioctl_nmi(vcpu);
5004 r = kvm_vcpu_ioctl_smi(vcpu);
5007 case KVM_SET_CPUID: {
5008 struct kvm_cpuid __user *cpuid_arg = argp;
5009 struct kvm_cpuid cpuid;
5012 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5014 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5017 case KVM_SET_CPUID2: {
5018 struct kvm_cpuid2 __user *cpuid_arg = argp;
5019 struct kvm_cpuid2 cpuid;
5022 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5024 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5025 cpuid_arg->entries);
5028 case KVM_GET_CPUID2: {
5029 struct kvm_cpuid2 __user *cpuid_arg = argp;
5030 struct kvm_cpuid2 cpuid;
5033 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5035 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5036 cpuid_arg->entries);
5040 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5045 case KVM_GET_MSRS: {
5046 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5047 r = msr_io(vcpu, argp, do_get_msr, 1);
5048 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5051 case KVM_SET_MSRS: {
5052 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5053 r = msr_io(vcpu, argp, do_set_msr, 0);
5054 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5057 case KVM_TPR_ACCESS_REPORTING: {
5058 struct kvm_tpr_access_ctl tac;
5061 if (copy_from_user(&tac, argp, sizeof(tac)))
5063 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5067 if (copy_to_user(argp, &tac, sizeof(tac)))
5072 case KVM_SET_VAPIC_ADDR: {
5073 struct kvm_vapic_addr va;
5077 if (!lapic_in_kernel(vcpu))
5080 if (copy_from_user(&va, argp, sizeof(va)))
5082 idx = srcu_read_lock(&vcpu->kvm->srcu);
5083 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5084 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5087 case KVM_X86_SETUP_MCE: {
5091 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5093 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5096 case KVM_X86_SET_MCE: {
5097 struct kvm_x86_mce mce;
5100 if (copy_from_user(&mce, argp, sizeof(mce)))
5102 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5105 case KVM_GET_VCPU_EVENTS: {
5106 struct kvm_vcpu_events events;
5108 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5111 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5116 case KVM_SET_VCPU_EVENTS: {
5117 struct kvm_vcpu_events events;
5120 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5123 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5126 case KVM_GET_DEBUGREGS: {
5127 struct kvm_debugregs dbgregs;
5129 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5132 if (copy_to_user(argp, &dbgregs,
5133 sizeof(struct kvm_debugregs)))
5138 case KVM_SET_DEBUGREGS: {
5139 struct kvm_debugregs dbgregs;
5142 if (copy_from_user(&dbgregs, argp,
5143 sizeof(struct kvm_debugregs)))
5146 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5149 case KVM_GET_XSAVE: {
5150 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5155 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5158 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5163 case KVM_SET_XSAVE: {
5164 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5165 if (IS_ERR(u.xsave)) {
5166 r = PTR_ERR(u.xsave);
5170 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5173 case KVM_GET_XCRS: {
5174 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5179 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5182 if (copy_to_user(argp, u.xcrs,
5183 sizeof(struct kvm_xcrs)))
5188 case KVM_SET_XCRS: {
5189 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5190 if (IS_ERR(u.xcrs)) {
5191 r = PTR_ERR(u.xcrs);
5195 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5198 case KVM_SET_TSC_KHZ: {
5202 user_tsc_khz = (u32)arg;
5204 if (kvm_has_tsc_control &&
5205 user_tsc_khz >= kvm_max_guest_tsc_khz)
5208 if (user_tsc_khz == 0)
5209 user_tsc_khz = tsc_khz;
5211 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5216 case KVM_GET_TSC_KHZ: {
5217 r = vcpu->arch.virtual_tsc_khz;
5220 case KVM_KVMCLOCK_CTRL: {
5221 r = kvm_set_guest_paused(vcpu);
5224 case KVM_ENABLE_CAP: {
5225 struct kvm_enable_cap cap;
5228 if (copy_from_user(&cap, argp, sizeof(cap)))
5230 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5233 case KVM_GET_NESTED_STATE: {
5234 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5238 if (!kvm_x86_ops.nested_ops->get_state)
5241 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5243 if (get_user(user_data_size, &user_kvm_nested_state->size))
5246 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5251 if (r > user_data_size) {
5252 if (put_user(r, &user_kvm_nested_state->size))
5262 case KVM_SET_NESTED_STATE: {
5263 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5264 struct kvm_nested_state kvm_state;
5268 if (!kvm_x86_ops.nested_ops->set_state)
5272 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5276 if (kvm_state.size < sizeof(kvm_state))
5279 if (kvm_state.flags &
5280 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5281 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5282 | KVM_STATE_NESTED_GIF_SET))
5285 /* nested_run_pending implies guest_mode. */
5286 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5287 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5290 idx = srcu_read_lock(&vcpu->kvm->srcu);
5291 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5292 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5295 case KVM_GET_SUPPORTED_HV_CPUID:
5296 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5298 #ifdef CONFIG_KVM_XEN
5299 case KVM_XEN_VCPU_GET_ATTR: {
5300 struct kvm_xen_vcpu_attr xva;
5303 if (copy_from_user(&xva, argp, sizeof(xva)))
5305 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5306 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5310 case KVM_XEN_VCPU_SET_ATTR: {
5311 struct kvm_xen_vcpu_attr xva;
5314 if (copy_from_user(&xva, argp, sizeof(xva)))
5316 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5320 case KVM_GET_SREGS2: {
5321 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5325 __get_sregs2(vcpu, u.sregs2);
5327 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5332 case KVM_SET_SREGS2: {
5333 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5334 if (IS_ERR(u.sregs2)) {
5335 r = PTR_ERR(u.sregs2);
5339 r = __set_sregs2(vcpu, u.sregs2);
5352 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5354 return VM_FAULT_SIGBUS;
5357 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5361 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5363 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5367 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5370 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5373 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5374 unsigned long kvm_nr_mmu_pages)
5376 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5379 mutex_lock(&kvm->slots_lock);
5381 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5382 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5384 mutex_unlock(&kvm->slots_lock);
5388 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5390 return kvm->arch.n_max_mmu_pages;
5393 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5395 struct kvm_pic *pic = kvm->arch.vpic;
5399 switch (chip->chip_id) {
5400 case KVM_IRQCHIP_PIC_MASTER:
5401 memcpy(&chip->chip.pic, &pic->pics[0],
5402 sizeof(struct kvm_pic_state));
5404 case KVM_IRQCHIP_PIC_SLAVE:
5405 memcpy(&chip->chip.pic, &pic->pics[1],
5406 sizeof(struct kvm_pic_state));
5408 case KVM_IRQCHIP_IOAPIC:
5409 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5418 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5420 struct kvm_pic *pic = kvm->arch.vpic;
5424 switch (chip->chip_id) {
5425 case KVM_IRQCHIP_PIC_MASTER:
5426 spin_lock(&pic->lock);
5427 memcpy(&pic->pics[0], &chip->chip.pic,
5428 sizeof(struct kvm_pic_state));
5429 spin_unlock(&pic->lock);
5431 case KVM_IRQCHIP_PIC_SLAVE:
5432 spin_lock(&pic->lock);
5433 memcpy(&pic->pics[1], &chip->chip.pic,
5434 sizeof(struct kvm_pic_state));
5435 spin_unlock(&pic->lock);
5437 case KVM_IRQCHIP_IOAPIC:
5438 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5444 kvm_pic_update_irq(pic);
5448 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5450 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5452 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5454 mutex_lock(&kps->lock);
5455 memcpy(ps, &kps->channels, sizeof(*ps));
5456 mutex_unlock(&kps->lock);
5460 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5463 struct kvm_pit *pit = kvm->arch.vpit;
5465 mutex_lock(&pit->pit_state.lock);
5466 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5467 for (i = 0; i < 3; i++)
5468 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5469 mutex_unlock(&pit->pit_state.lock);
5473 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5475 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5476 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5477 sizeof(ps->channels));
5478 ps->flags = kvm->arch.vpit->pit_state.flags;
5479 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5480 memset(&ps->reserved, 0, sizeof(ps->reserved));
5484 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5488 u32 prev_legacy, cur_legacy;
5489 struct kvm_pit *pit = kvm->arch.vpit;
5491 mutex_lock(&pit->pit_state.lock);
5492 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5493 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5494 if (!prev_legacy && cur_legacy)
5496 memcpy(&pit->pit_state.channels, &ps->channels,
5497 sizeof(pit->pit_state.channels));
5498 pit->pit_state.flags = ps->flags;
5499 for (i = 0; i < 3; i++)
5500 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5502 mutex_unlock(&pit->pit_state.lock);
5506 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5507 struct kvm_reinject_control *control)
5509 struct kvm_pit *pit = kvm->arch.vpit;
5511 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5512 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5513 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5515 mutex_lock(&pit->pit_state.lock);
5516 kvm_pit_set_reinject(pit, control->pit_reinject);
5517 mutex_unlock(&pit->pit_state.lock);
5522 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5526 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5527 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5528 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5531 struct kvm_vcpu *vcpu;
5534 kvm_for_each_vcpu(i, vcpu, kvm)
5535 kvm_vcpu_kick(vcpu);
5538 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5541 if (!irqchip_in_kernel(kvm))
5544 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5545 irq_event->irq, irq_event->level,
5550 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5551 struct kvm_enable_cap *cap)
5559 case KVM_CAP_DISABLE_QUIRKS:
5560 kvm->arch.disabled_quirks = cap->args[0];
5563 case KVM_CAP_SPLIT_IRQCHIP: {
5564 mutex_lock(&kvm->lock);
5566 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5567 goto split_irqchip_unlock;
5569 if (irqchip_in_kernel(kvm))
5570 goto split_irqchip_unlock;
5571 if (kvm->created_vcpus)
5572 goto split_irqchip_unlock;
5573 r = kvm_setup_empty_irq_routing(kvm);
5575 goto split_irqchip_unlock;
5576 /* Pairs with irqchip_in_kernel. */
5578 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5579 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5581 split_irqchip_unlock:
5582 mutex_unlock(&kvm->lock);
5585 case KVM_CAP_X2APIC_API:
5587 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5590 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5591 kvm->arch.x2apic_format = true;
5592 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5593 kvm->arch.x2apic_broadcast_quirk_disabled = true;
5597 case KVM_CAP_X86_DISABLE_EXITS:
5599 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5602 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5603 kvm_can_mwait_in_guest())
5604 kvm->arch.mwait_in_guest = true;
5605 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5606 kvm->arch.hlt_in_guest = true;
5607 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5608 kvm->arch.pause_in_guest = true;
5609 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5610 kvm->arch.cstate_in_guest = true;
5613 case KVM_CAP_MSR_PLATFORM_INFO:
5614 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5617 case KVM_CAP_EXCEPTION_PAYLOAD:
5618 kvm->arch.exception_payload_enabled = cap->args[0];
5621 case KVM_CAP_X86_USER_SPACE_MSR:
5622 kvm->arch.user_space_msr_mask = cap->args[0];
5625 case KVM_CAP_X86_BUS_LOCK_EXIT:
5627 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5630 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5631 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5634 if (kvm_has_bus_lock_exit &&
5635 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5636 kvm->arch.bus_lock_detection_enabled = true;
5639 #ifdef CONFIG_X86_SGX_KVM
5640 case KVM_CAP_SGX_ATTRIBUTE: {
5641 unsigned long allowed_attributes = 0;
5643 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5647 /* KVM only supports the PROVISIONKEY privileged attribute. */
5648 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5649 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5650 kvm->arch.sgx_provisioning_allowed = true;
5656 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5658 if (kvm_x86_ops.vm_copy_enc_context_from)
5659 r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5661 case KVM_CAP_EXIT_HYPERCALL:
5662 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5666 kvm->arch.hypercall_exit_enabled = cap->args[0];
5669 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5671 if (cap->args[0] & ~1)
5673 kvm->arch.exit_on_emulation_error = cap->args[0];
5683 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5685 struct kvm_x86_msr_filter *msr_filter;
5687 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5691 msr_filter->default_allow = default_allow;
5695 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5702 for (i = 0; i < msr_filter->count; i++)
5703 kfree(msr_filter->ranges[i].bitmap);
5708 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5709 struct kvm_msr_filter_range *user_range)
5711 unsigned long *bitmap = NULL;
5714 if (!user_range->nmsrs)
5717 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5720 if (!user_range->flags)
5723 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5724 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5727 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5729 return PTR_ERR(bitmap);
5731 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5732 .flags = user_range->flags,
5733 .base = user_range->base,
5734 .nmsrs = user_range->nmsrs,
5738 msr_filter->count++;
5742 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5744 struct kvm_msr_filter __user *user_msr_filter = argp;
5745 struct kvm_x86_msr_filter *new_filter, *old_filter;
5746 struct kvm_msr_filter filter;
5752 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5755 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5756 empty &= !filter.ranges[i].nmsrs;
5758 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5759 if (empty && !default_allow)
5762 new_filter = kvm_alloc_msr_filter(default_allow);
5766 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5767 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5769 kvm_free_msr_filter(new_filter);
5774 mutex_lock(&kvm->lock);
5776 /* The per-VM filter is protected by kvm->lock... */
5777 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5779 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5780 synchronize_srcu(&kvm->srcu);
5782 kvm_free_msr_filter(old_filter);
5784 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5785 mutex_unlock(&kvm->lock);
5790 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5791 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5793 struct kvm_vcpu *vcpu;
5796 mutex_lock(&kvm->lock);
5797 kvm_for_each_vcpu(i, vcpu, kvm) {
5798 if (!vcpu->arch.pv_time_enabled)
5801 ret = kvm_set_guest_paused(vcpu);
5803 kvm_err("Failed to pause guest VCPU%d: %d\n",
5804 vcpu->vcpu_id, ret);
5808 mutex_unlock(&kvm->lock);
5810 return ret ? NOTIFY_BAD : NOTIFY_DONE;
5813 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5816 case PM_HIBERNATION_PREPARE:
5817 case PM_SUSPEND_PREPARE:
5818 return kvm_arch_suspend_notifier(kvm);
5823 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5825 long kvm_arch_vm_ioctl(struct file *filp,
5826 unsigned int ioctl, unsigned long arg)
5828 struct kvm *kvm = filp->private_data;
5829 void __user *argp = (void __user *)arg;
5832 * This union makes it completely explicit to gcc-3.x
5833 * that these two variables' stack usage should be
5834 * combined, not added together.
5837 struct kvm_pit_state ps;
5838 struct kvm_pit_state2 ps2;
5839 struct kvm_pit_config pit_config;
5843 case KVM_SET_TSS_ADDR:
5844 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5846 case KVM_SET_IDENTITY_MAP_ADDR: {
5849 mutex_lock(&kvm->lock);
5851 if (kvm->created_vcpus)
5852 goto set_identity_unlock;
5854 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5855 goto set_identity_unlock;
5856 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5857 set_identity_unlock:
5858 mutex_unlock(&kvm->lock);
5861 case KVM_SET_NR_MMU_PAGES:
5862 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5864 case KVM_GET_NR_MMU_PAGES:
5865 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5867 case KVM_CREATE_IRQCHIP: {
5868 mutex_lock(&kvm->lock);
5871 if (irqchip_in_kernel(kvm))
5872 goto create_irqchip_unlock;
5875 if (kvm->created_vcpus)
5876 goto create_irqchip_unlock;
5878 r = kvm_pic_init(kvm);
5880 goto create_irqchip_unlock;
5882 r = kvm_ioapic_init(kvm);
5884 kvm_pic_destroy(kvm);
5885 goto create_irqchip_unlock;
5888 r = kvm_setup_default_irq_routing(kvm);
5890 kvm_ioapic_destroy(kvm);
5891 kvm_pic_destroy(kvm);
5892 goto create_irqchip_unlock;
5894 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5896 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5897 create_irqchip_unlock:
5898 mutex_unlock(&kvm->lock);
5901 case KVM_CREATE_PIT:
5902 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5904 case KVM_CREATE_PIT2:
5906 if (copy_from_user(&u.pit_config, argp,
5907 sizeof(struct kvm_pit_config)))
5910 mutex_lock(&kvm->lock);
5913 goto create_pit_unlock;
5915 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5919 mutex_unlock(&kvm->lock);
5921 case KVM_GET_IRQCHIP: {
5922 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5923 struct kvm_irqchip *chip;
5925 chip = memdup_user(argp, sizeof(*chip));
5932 if (!irqchip_kernel(kvm))
5933 goto get_irqchip_out;
5934 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5936 goto get_irqchip_out;
5938 if (copy_to_user(argp, chip, sizeof(*chip)))
5939 goto get_irqchip_out;
5945 case KVM_SET_IRQCHIP: {
5946 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5947 struct kvm_irqchip *chip;
5949 chip = memdup_user(argp, sizeof(*chip));
5956 if (!irqchip_kernel(kvm))
5957 goto set_irqchip_out;
5958 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5965 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5968 if (!kvm->arch.vpit)
5970 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5974 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5981 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5983 mutex_lock(&kvm->lock);
5985 if (!kvm->arch.vpit)
5987 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5989 mutex_unlock(&kvm->lock);
5992 case KVM_GET_PIT2: {
5994 if (!kvm->arch.vpit)
5996 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6000 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6005 case KVM_SET_PIT2: {
6007 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6009 mutex_lock(&kvm->lock);
6011 if (!kvm->arch.vpit)
6013 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6015 mutex_unlock(&kvm->lock);
6018 case KVM_REINJECT_CONTROL: {
6019 struct kvm_reinject_control control;
6021 if (copy_from_user(&control, argp, sizeof(control)))
6024 if (!kvm->arch.vpit)
6026 r = kvm_vm_ioctl_reinject(kvm, &control);
6029 case KVM_SET_BOOT_CPU_ID:
6031 mutex_lock(&kvm->lock);
6032 if (kvm->created_vcpus)
6035 kvm->arch.bsp_vcpu_id = arg;
6036 mutex_unlock(&kvm->lock);
6038 #ifdef CONFIG_KVM_XEN
6039 case KVM_XEN_HVM_CONFIG: {
6040 struct kvm_xen_hvm_config xhc;
6042 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6044 r = kvm_xen_hvm_config(kvm, &xhc);
6047 case KVM_XEN_HVM_GET_ATTR: {
6048 struct kvm_xen_hvm_attr xha;
6051 if (copy_from_user(&xha, argp, sizeof(xha)))
6053 r = kvm_xen_hvm_get_attr(kvm, &xha);
6054 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6058 case KVM_XEN_HVM_SET_ATTR: {
6059 struct kvm_xen_hvm_attr xha;
6062 if (copy_from_user(&xha, argp, sizeof(xha)))
6064 r = kvm_xen_hvm_set_attr(kvm, &xha);
6068 case KVM_SET_CLOCK: {
6069 struct kvm_arch *ka = &kvm->arch;
6070 struct kvm_clock_data user_ns;
6074 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6083 * TODO: userspace has to take care of races with VCPU_RUN, so
6084 * kvm_gen_update_masterclock() can be cut down to locked
6085 * pvclock_update_vm_gtod_copy().
6087 kvm_gen_update_masterclock(kvm);
6090 * This pairs with kvm_guest_time_update(): when masterclock is
6091 * in use, we use master_kernel_ns + kvmclock_offset to set
6092 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6093 * is slightly ahead) here we risk going negative on unsigned
6094 * 'system_time' when 'user_ns.clock' is very small.
6096 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6097 if (kvm->arch.use_master_clock)
6098 now_ns = ka->master_kernel_ns;
6100 now_ns = get_kvmclock_base_ns();
6101 ka->kvmclock_offset = user_ns.clock - now_ns;
6102 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6104 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6107 case KVM_GET_CLOCK: {
6108 struct kvm_clock_data user_ns;
6111 now_ns = get_kvmclock_ns(kvm);
6112 user_ns.clock = now_ns;
6113 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6114 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6117 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6122 case KVM_MEMORY_ENCRYPT_OP: {
6124 if (kvm_x86_ops.mem_enc_op)
6125 r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6128 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6129 struct kvm_enc_region region;
6132 if (copy_from_user(®ion, argp, sizeof(region)))
6136 if (kvm_x86_ops.mem_enc_reg_region)
6137 r = static_call(kvm_x86_mem_enc_reg_region)(kvm, ®ion);
6140 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6141 struct kvm_enc_region region;
6144 if (copy_from_user(®ion, argp, sizeof(region)))
6148 if (kvm_x86_ops.mem_enc_unreg_region)
6149 r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, ®ion);
6152 case KVM_HYPERV_EVENTFD: {
6153 struct kvm_hyperv_eventfd hvevfd;
6156 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6158 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6161 case KVM_SET_PMU_EVENT_FILTER:
6162 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6164 case KVM_X86_SET_MSR_FILTER:
6165 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6174 static void kvm_init_msr_list(void)
6176 struct x86_pmu_capability x86_pmu;
6180 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6181 "Please update the fixed PMCs in msrs_to_saved_all[]");
6183 perf_get_x86_pmu_capability(&x86_pmu);
6185 num_msrs_to_save = 0;
6186 num_emulated_msrs = 0;
6187 num_msr_based_features = 0;
6189 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6190 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6194 * Even MSRs that are valid in the host may not be exposed
6195 * to the guests in some cases.
6197 switch (msrs_to_save_all[i]) {
6198 case MSR_IA32_BNDCFGS:
6199 if (!kvm_mpx_supported())
6203 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6204 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6207 case MSR_IA32_UMWAIT_CONTROL:
6208 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6211 case MSR_IA32_RTIT_CTL:
6212 case MSR_IA32_RTIT_STATUS:
6213 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6216 case MSR_IA32_RTIT_CR3_MATCH:
6217 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6218 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6221 case MSR_IA32_RTIT_OUTPUT_BASE:
6222 case MSR_IA32_RTIT_OUTPUT_MASK:
6223 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6224 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6225 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6228 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6229 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6230 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6231 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6234 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6235 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6236 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6239 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6240 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6241 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6248 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6251 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6252 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6255 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6258 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6259 struct kvm_msr_entry msr;
6261 msr.index = msr_based_features_all[i];
6262 if (kvm_get_msr_feature(&msr))
6265 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6269 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6277 if (!(lapic_in_kernel(vcpu) &&
6278 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6279 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6290 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6297 if (!(lapic_in_kernel(vcpu) &&
6298 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6300 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6302 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6312 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6313 struct kvm_segment *var, int seg)
6315 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6318 void kvm_get_segment(struct kvm_vcpu *vcpu,
6319 struct kvm_segment *var, int seg)
6321 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6324 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6325 struct x86_exception *exception)
6329 BUG_ON(!mmu_is_nested(vcpu));
6331 /* NPT walks are always user-walks */
6332 access |= PFERR_USER_MASK;
6333 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6338 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6339 struct x86_exception *exception)
6341 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6342 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6344 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6346 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6347 struct x86_exception *exception)
6349 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6350 access |= PFERR_FETCH_MASK;
6351 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6354 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6355 struct x86_exception *exception)
6357 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6358 access |= PFERR_WRITE_MASK;
6359 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6361 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6363 /* uses this to access any guest's mapped memory without checking CPL */
6364 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6365 struct x86_exception *exception)
6367 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6370 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6371 struct kvm_vcpu *vcpu, u32 access,
6372 struct x86_exception *exception)
6375 int r = X86EMUL_CONTINUE;
6378 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6380 unsigned offset = addr & (PAGE_SIZE-1);
6381 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6384 if (gpa == UNMAPPED_GVA)
6385 return X86EMUL_PROPAGATE_FAULT;
6386 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6389 r = X86EMUL_IO_NEEDED;
6401 /* used for instruction fetching */
6402 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6403 gva_t addr, void *val, unsigned int bytes,
6404 struct x86_exception *exception)
6406 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6407 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6411 /* Inline kvm_read_guest_virt_helper for speed. */
6412 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6414 if (unlikely(gpa == UNMAPPED_GVA))
6415 return X86EMUL_PROPAGATE_FAULT;
6417 offset = addr & (PAGE_SIZE-1);
6418 if (WARN_ON(offset + bytes > PAGE_SIZE))
6419 bytes = (unsigned)PAGE_SIZE - offset;
6420 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6422 if (unlikely(ret < 0))
6423 return X86EMUL_IO_NEEDED;
6425 return X86EMUL_CONTINUE;
6428 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6429 gva_t addr, void *val, unsigned int bytes,
6430 struct x86_exception *exception)
6432 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6435 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6436 * is returned, but our callers are not ready for that and they blindly
6437 * call kvm_inject_page_fault. Ensure that they at least do not leak
6438 * uninitialized kernel stack memory into cr2 and error code.
6440 memset(exception, 0, sizeof(*exception));
6441 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6444 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6446 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6447 gva_t addr, void *val, unsigned int bytes,
6448 struct x86_exception *exception, bool system)
6450 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6453 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6454 access |= PFERR_USER_MASK;
6456 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6459 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6460 unsigned long addr, void *val, unsigned int bytes)
6462 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6463 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6465 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6468 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6469 struct kvm_vcpu *vcpu, u32 access,
6470 struct x86_exception *exception)
6473 int r = X86EMUL_CONTINUE;
6476 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6479 unsigned offset = addr & (PAGE_SIZE-1);
6480 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6483 if (gpa == UNMAPPED_GVA)
6484 return X86EMUL_PROPAGATE_FAULT;
6485 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6487 r = X86EMUL_IO_NEEDED;
6499 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6500 unsigned int bytes, struct x86_exception *exception,
6503 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6504 u32 access = PFERR_WRITE_MASK;
6506 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6507 access |= PFERR_USER_MASK;
6509 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6513 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6514 unsigned int bytes, struct x86_exception *exception)
6516 /* kvm_write_guest_virt_system can pull in tons of pages. */
6517 vcpu->arch.l1tf_flush_l1d = true;
6519 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6520 PFERR_WRITE_MASK, exception);
6522 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6524 int handle_ud(struct kvm_vcpu *vcpu)
6526 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6527 int emul_type = EMULTYPE_TRAP_UD;
6528 char sig[5]; /* ud2; .ascii "kvm" */
6529 struct x86_exception e;
6531 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6534 if (force_emulation_prefix &&
6535 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6536 sig, sizeof(sig), &e) == 0 &&
6537 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6538 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6539 emul_type = EMULTYPE_TRAP_UD_FORCED;
6542 return kvm_emulate_instruction(vcpu, emul_type);
6544 EXPORT_SYMBOL_GPL(handle_ud);
6546 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6547 gpa_t gpa, bool write)
6549 /* For APIC access vmexit */
6550 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6553 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6554 trace_vcpu_match_mmio(gva, gpa, write, true);
6561 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6562 gpa_t *gpa, struct x86_exception *exception,
6565 u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6566 | (write ? PFERR_WRITE_MASK : 0);
6569 * currently PKRU is only applied to ept enabled guest so
6570 * there is no pkey in EPT page table for L1 guest or EPT
6571 * shadow page table for L2 guest.
6573 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6574 !permission_fault(vcpu, vcpu->arch.walk_mmu,
6575 vcpu->arch.mmio_access, 0, access))) {
6576 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6577 (gva & (PAGE_SIZE - 1));
6578 trace_vcpu_match_mmio(gva, *gpa, write, false);
6582 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6584 if (*gpa == UNMAPPED_GVA)
6587 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6590 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6591 const void *val, int bytes)
6595 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6598 kvm_page_track_write(vcpu, gpa, val, bytes);
6602 struct read_write_emulator_ops {
6603 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6605 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6606 void *val, int bytes);
6607 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6608 int bytes, void *val);
6609 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6610 void *val, int bytes);
6614 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6616 if (vcpu->mmio_read_completed) {
6617 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6618 vcpu->mmio_fragments[0].gpa, val);
6619 vcpu->mmio_read_completed = 0;
6626 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6627 void *val, int bytes)
6629 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6632 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6633 void *val, int bytes)
6635 return emulator_write_phys(vcpu, gpa, val, bytes);
6638 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6640 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6641 return vcpu_mmio_write(vcpu, gpa, bytes, val);
6644 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6645 void *val, int bytes)
6647 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6648 return X86EMUL_IO_NEEDED;
6651 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6652 void *val, int bytes)
6654 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6656 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6657 return X86EMUL_CONTINUE;
6660 static const struct read_write_emulator_ops read_emultor = {
6661 .read_write_prepare = read_prepare,
6662 .read_write_emulate = read_emulate,
6663 .read_write_mmio = vcpu_mmio_read,
6664 .read_write_exit_mmio = read_exit_mmio,
6667 static const struct read_write_emulator_ops write_emultor = {
6668 .read_write_emulate = write_emulate,
6669 .read_write_mmio = write_mmio,
6670 .read_write_exit_mmio = write_exit_mmio,
6674 static int emulator_read_write_onepage(unsigned long addr, void *val,
6676 struct x86_exception *exception,
6677 struct kvm_vcpu *vcpu,
6678 const struct read_write_emulator_ops *ops)
6682 bool write = ops->write;
6683 struct kvm_mmio_fragment *frag;
6684 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6687 * If the exit was due to a NPF we may already have a GPA.
6688 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6689 * Note, this cannot be used on string operations since string
6690 * operation using rep will only have the initial GPA from the NPF
6693 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6694 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6695 gpa = ctxt->gpa_val;
6696 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6698 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6700 return X86EMUL_PROPAGATE_FAULT;
6703 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6704 return X86EMUL_CONTINUE;
6707 * Is this MMIO handled locally?
6709 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6710 if (handled == bytes)
6711 return X86EMUL_CONTINUE;
6717 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6718 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6722 return X86EMUL_CONTINUE;
6725 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6727 void *val, unsigned int bytes,
6728 struct x86_exception *exception,
6729 const struct read_write_emulator_ops *ops)
6731 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6735 if (ops->read_write_prepare &&
6736 ops->read_write_prepare(vcpu, val, bytes))
6737 return X86EMUL_CONTINUE;
6739 vcpu->mmio_nr_fragments = 0;
6741 /* Crossing a page boundary? */
6742 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6745 now = -addr & ~PAGE_MASK;
6746 rc = emulator_read_write_onepage(addr, val, now, exception,
6749 if (rc != X86EMUL_CONTINUE)
6752 if (ctxt->mode != X86EMUL_MODE_PROT64)
6758 rc = emulator_read_write_onepage(addr, val, bytes, exception,
6760 if (rc != X86EMUL_CONTINUE)
6763 if (!vcpu->mmio_nr_fragments)
6766 gpa = vcpu->mmio_fragments[0].gpa;
6768 vcpu->mmio_needed = 1;
6769 vcpu->mmio_cur_fragment = 0;
6771 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6772 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6773 vcpu->run->exit_reason = KVM_EXIT_MMIO;
6774 vcpu->run->mmio.phys_addr = gpa;
6776 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6779 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6783 struct x86_exception *exception)
6785 return emulator_read_write(ctxt, addr, val, bytes,
6786 exception, &read_emultor);
6789 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6793 struct x86_exception *exception)
6795 return emulator_read_write(ctxt, addr, (void *)val, bytes,
6796 exception, &write_emultor);
6799 #define CMPXCHG_TYPE(t, ptr, old, new) \
6800 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6802 #ifdef CONFIG_X86_64
6803 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6805 # define CMPXCHG64(ptr, old, new) \
6806 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6809 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6814 struct x86_exception *exception)
6816 struct kvm_host_map map;
6817 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6823 /* guests cmpxchg8b have to be emulated atomically */
6824 if (bytes > 8 || (bytes & (bytes - 1)))
6827 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6829 if (gpa == UNMAPPED_GVA ||
6830 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6834 * Emulate the atomic as a straight write to avoid #AC if SLD is
6835 * enabled in the host and the access splits a cache line.
6837 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6838 page_line_mask = ~(cache_line_size() - 1);
6840 page_line_mask = PAGE_MASK;
6842 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6845 if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6848 kaddr = map.hva + offset_in_page(gpa);
6852 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6855 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6858 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6861 exchanged = CMPXCHG64(kaddr, old, new);
6867 kvm_vcpu_unmap(vcpu, &map, true);
6870 return X86EMUL_CMPXCHG_FAILED;
6872 kvm_page_track_write(vcpu, gpa, new, bytes);
6874 return X86EMUL_CONTINUE;
6877 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6879 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6882 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6886 for (i = 0; i < vcpu->arch.pio.count; i++) {
6887 if (vcpu->arch.pio.in)
6888 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6889 vcpu->arch.pio.size, pd);
6891 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6892 vcpu->arch.pio.port, vcpu->arch.pio.size,
6896 pd += vcpu->arch.pio.size;
6901 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6902 unsigned short port, void *val,
6903 unsigned int count, bool in)
6905 vcpu->arch.pio.port = port;
6906 vcpu->arch.pio.in = in;
6907 vcpu->arch.pio.count = count;
6908 vcpu->arch.pio.size = size;
6910 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6911 vcpu->arch.pio.count = 0;
6915 vcpu->run->exit_reason = KVM_EXIT_IO;
6916 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6917 vcpu->run->io.size = size;
6918 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6919 vcpu->run->io.count = count;
6920 vcpu->run->io.port = port;
6925 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6926 unsigned short port, void *val, unsigned int count)
6930 if (vcpu->arch.pio.count)
6933 memset(vcpu->arch.pio_data, 0, size * count);
6935 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6938 memcpy(val, vcpu->arch.pio_data, size * count);
6939 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6940 vcpu->arch.pio.count = 0;
6947 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6948 int size, unsigned short port, void *val,
6951 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6955 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6956 unsigned short port, const void *val,
6959 memcpy(vcpu->arch.pio_data, val, size * count);
6960 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6961 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6964 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6965 int size, unsigned short port,
6966 const void *val, unsigned int count)
6968 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6971 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6973 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6976 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6978 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6981 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6983 if (!need_emulate_wbinvd(vcpu))
6984 return X86EMUL_CONTINUE;
6986 if (static_call(kvm_x86_has_wbinvd_exit)()) {
6987 int cpu = get_cpu();
6989 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6990 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6991 wbinvd_ipi, NULL, 1);
6993 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6996 return X86EMUL_CONTINUE;
6999 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7001 kvm_emulate_wbinvd_noskip(vcpu);
7002 return kvm_skip_emulated_instruction(vcpu);
7004 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7008 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7010 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7013 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7014 unsigned long *dest)
7016 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7019 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7020 unsigned long value)
7023 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7026 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7028 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7031 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7033 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7034 unsigned long value;
7038 value = kvm_read_cr0(vcpu);
7041 value = vcpu->arch.cr2;
7044 value = kvm_read_cr3(vcpu);
7047 value = kvm_read_cr4(vcpu);
7050 value = kvm_get_cr8(vcpu);
7053 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7060 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7062 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7067 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7070 vcpu->arch.cr2 = val;
7073 res = kvm_set_cr3(vcpu, val);
7076 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7079 res = kvm_set_cr8(vcpu, val);
7082 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7089 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7091 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7094 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7096 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7099 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7101 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7104 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7106 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7109 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7111 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7114 static unsigned long emulator_get_cached_segment_base(
7115 struct x86_emulate_ctxt *ctxt, int seg)
7117 return get_segment_base(emul_to_vcpu(ctxt), seg);
7120 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7121 struct desc_struct *desc, u32 *base3,
7124 struct kvm_segment var;
7126 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7127 *selector = var.selector;
7130 memset(desc, 0, sizeof(*desc));
7138 set_desc_limit(desc, var.limit);
7139 set_desc_base(desc, (unsigned long)var.base);
7140 #ifdef CONFIG_X86_64
7142 *base3 = var.base >> 32;
7144 desc->type = var.type;
7146 desc->dpl = var.dpl;
7147 desc->p = var.present;
7148 desc->avl = var.avl;
7156 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7157 struct desc_struct *desc, u32 base3,
7160 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7161 struct kvm_segment var;
7163 var.selector = selector;
7164 var.base = get_desc_base(desc);
7165 #ifdef CONFIG_X86_64
7166 var.base |= ((u64)base3) << 32;
7168 var.limit = get_desc_limit(desc);
7170 var.limit = (var.limit << 12) | 0xfff;
7171 var.type = desc->type;
7172 var.dpl = desc->dpl;
7177 var.avl = desc->avl;
7178 var.present = desc->p;
7179 var.unusable = !var.present;
7182 kvm_set_segment(vcpu, &var, seg);
7186 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7187 u32 msr_index, u64 *pdata)
7189 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7192 r = kvm_get_msr(vcpu, msr_index, pdata);
7194 if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7195 /* Bounce to user space */
7196 return X86EMUL_IO_NEEDED;
7202 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7203 u32 msr_index, u64 data)
7205 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7208 r = kvm_set_msr(vcpu, msr_index, data);
7210 if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7211 /* Bounce to user space */
7212 return X86EMUL_IO_NEEDED;
7218 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7220 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7222 return vcpu->arch.smbase;
7225 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7227 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7229 vcpu->arch.smbase = smbase;
7232 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7235 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7238 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7239 u32 pmc, u64 *pdata)
7241 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7244 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7246 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7249 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7250 struct x86_instruction_info *info,
7251 enum x86_intercept_stage stage)
7253 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7257 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7258 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7261 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7264 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7266 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7269 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7271 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7274 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7276 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7279 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7281 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7284 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7286 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7289 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7291 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7294 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7296 return emul_to_vcpu(ctxt)->arch.hflags;
7299 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7301 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7303 kvm_smm_changed(vcpu, false);
7306 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7307 const char *smstate)
7309 return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7312 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7314 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7317 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7319 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7322 static const struct x86_emulate_ops emulate_ops = {
7323 .read_gpr = emulator_read_gpr,
7324 .write_gpr = emulator_write_gpr,
7325 .read_std = emulator_read_std,
7326 .write_std = emulator_write_std,
7327 .read_phys = kvm_read_guest_phys_system,
7328 .fetch = kvm_fetch_guest_virt,
7329 .read_emulated = emulator_read_emulated,
7330 .write_emulated = emulator_write_emulated,
7331 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7332 .invlpg = emulator_invlpg,
7333 .pio_in_emulated = emulator_pio_in_emulated,
7334 .pio_out_emulated = emulator_pio_out_emulated,
7335 .get_segment = emulator_get_segment,
7336 .set_segment = emulator_set_segment,
7337 .get_cached_segment_base = emulator_get_cached_segment_base,
7338 .get_gdt = emulator_get_gdt,
7339 .get_idt = emulator_get_idt,
7340 .set_gdt = emulator_set_gdt,
7341 .set_idt = emulator_set_idt,
7342 .get_cr = emulator_get_cr,
7343 .set_cr = emulator_set_cr,
7344 .cpl = emulator_get_cpl,
7345 .get_dr = emulator_get_dr,
7346 .set_dr = emulator_set_dr,
7347 .get_smbase = emulator_get_smbase,
7348 .set_smbase = emulator_set_smbase,
7349 .set_msr = emulator_set_msr,
7350 .get_msr = emulator_get_msr,
7351 .check_pmc = emulator_check_pmc,
7352 .read_pmc = emulator_read_pmc,
7353 .halt = emulator_halt,
7354 .wbinvd = emulator_wbinvd,
7355 .fix_hypercall = emulator_fix_hypercall,
7356 .intercept = emulator_intercept,
7357 .get_cpuid = emulator_get_cpuid,
7358 .guest_has_long_mode = emulator_guest_has_long_mode,
7359 .guest_has_movbe = emulator_guest_has_movbe,
7360 .guest_has_fxsr = emulator_guest_has_fxsr,
7361 .set_nmi_mask = emulator_set_nmi_mask,
7362 .get_hflags = emulator_get_hflags,
7363 .exiting_smm = emulator_exiting_smm,
7364 .leave_smm = emulator_leave_smm,
7365 .triple_fault = emulator_triple_fault,
7366 .set_xcr = emulator_set_xcr,
7369 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7371 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7373 * an sti; sti; sequence only disable interrupts for the first
7374 * instruction. So, if the last instruction, be it emulated or
7375 * not, left the system with the INT_STI flag enabled, it
7376 * means that the last instruction is an sti. We should not
7377 * leave the flag on in this case. The same goes for mov ss
7379 if (int_shadow & mask)
7381 if (unlikely(int_shadow || mask)) {
7382 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7384 kvm_make_request(KVM_REQ_EVENT, vcpu);
7388 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7390 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7391 if (ctxt->exception.vector == PF_VECTOR)
7392 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7394 if (ctxt->exception.error_code_valid)
7395 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7396 ctxt->exception.error_code);
7398 kvm_queue_exception(vcpu, ctxt->exception.vector);
7402 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7404 struct x86_emulate_ctxt *ctxt;
7406 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7408 pr_err("kvm: failed to allocate vcpu's emulator\n");
7413 ctxt->ops = &emulate_ops;
7414 vcpu->arch.emulate_ctxt = ctxt;
7419 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7421 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7424 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7426 ctxt->gpa_available = false;
7427 ctxt->eflags = kvm_get_rflags(vcpu);
7428 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7430 ctxt->eip = kvm_rip_read(vcpu);
7431 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7432 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7433 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7434 cs_db ? X86EMUL_MODE_PROT32 :
7435 X86EMUL_MODE_PROT16;
7436 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7437 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7438 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7440 ctxt->interruptibility = 0;
7441 ctxt->have_exception = false;
7442 ctxt->exception.vector = -1;
7443 ctxt->perm_ok = false;
7445 init_decode_cache(ctxt);
7446 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7449 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7451 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7454 init_emulate_ctxt(vcpu);
7458 ctxt->_eip = ctxt->eip + inc_eip;
7459 ret = emulate_int_real(ctxt, irq);
7461 if (ret != X86EMUL_CONTINUE) {
7462 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7464 ctxt->eip = ctxt->_eip;
7465 kvm_rip_write(vcpu, ctxt->eip);
7466 kvm_set_rflags(vcpu, ctxt->eflags);
7469 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7471 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7473 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7474 u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7475 struct kvm_run *run = vcpu->run;
7477 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7478 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7479 run->emulation_failure.ndata = 0;
7480 run->emulation_failure.flags = 0;
7483 run->emulation_failure.ndata = 3;
7484 run->emulation_failure.flags |=
7485 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7486 run->emulation_failure.insn_size = insn_size;
7487 memset(run->emulation_failure.insn_bytes, 0x90,
7488 sizeof(run->emulation_failure.insn_bytes));
7489 memcpy(run->emulation_failure.insn_bytes,
7490 ctxt->fetch.data, insn_size);
7494 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7496 struct kvm *kvm = vcpu->kvm;
7498 ++vcpu->stat.insn_emulation_fail;
7499 trace_kvm_emulate_insn_failed(vcpu);
7501 if (emulation_type & EMULTYPE_VMWARE_GP) {
7502 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7506 if (kvm->arch.exit_on_emulation_error ||
7507 (emulation_type & EMULTYPE_SKIP)) {
7508 prepare_emulation_failure_exit(vcpu);
7512 kvm_queue_exception(vcpu, UD_VECTOR);
7514 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7515 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7516 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7517 vcpu->run->internal.ndata = 0;
7524 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7525 bool write_fault_to_shadow_pgtable,
7528 gpa_t gpa = cr2_or_gpa;
7531 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7534 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7535 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7538 if (!vcpu->arch.mmu->direct_map) {
7540 * Write permission should be allowed since only
7541 * write access need to be emulated.
7543 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7546 * If the mapping is invalid in guest, let cpu retry
7547 * it to generate fault.
7549 if (gpa == UNMAPPED_GVA)
7554 * Do not retry the unhandleable instruction if it faults on the
7555 * readonly host memory, otherwise it will goto a infinite loop:
7556 * retry instruction -> write #PF -> emulation fail -> retry
7557 * instruction -> ...
7559 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7562 * If the instruction failed on the error pfn, it can not be fixed,
7563 * report the error to userspace.
7565 if (is_error_noslot_pfn(pfn))
7568 kvm_release_pfn_clean(pfn);
7570 /* The instructions are well-emulated on direct mmu. */
7571 if (vcpu->arch.mmu->direct_map) {
7572 unsigned int indirect_shadow_pages;
7574 write_lock(&vcpu->kvm->mmu_lock);
7575 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7576 write_unlock(&vcpu->kvm->mmu_lock);
7578 if (indirect_shadow_pages)
7579 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7585 * if emulation was due to access to shadowed page table
7586 * and it failed try to unshadow page and re-enter the
7587 * guest to let CPU execute the instruction.
7589 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7592 * If the access faults on its page table, it can not
7593 * be fixed by unprotecting shadow page and it should
7594 * be reported to userspace.
7596 return !write_fault_to_shadow_pgtable;
7599 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7600 gpa_t cr2_or_gpa, int emulation_type)
7602 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7603 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7605 last_retry_eip = vcpu->arch.last_retry_eip;
7606 last_retry_addr = vcpu->arch.last_retry_addr;
7609 * If the emulation is caused by #PF and it is non-page_table
7610 * writing instruction, it means the VM-EXIT is caused by shadow
7611 * page protected, we can zap the shadow page and retry this
7612 * instruction directly.
7614 * Note: if the guest uses a non-page-table modifying instruction
7615 * on the PDE that points to the instruction, then we will unmap
7616 * the instruction and go to an infinite loop. So, we cache the
7617 * last retried eip and the last fault address, if we meet the eip
7618 * and the address again, we can break out of the potential infinite
7621 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7623 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7626 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7627 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7630 if (x86_page_table_writing_insn(ctxt))
7633 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7636 vcpu->arch.last_retry_eip = ctxt->eip;
7637 vcpu->arch.last_retry_addr = cr2_or_gpa;
7639 if (!vcpu->arch.mmu->direct_map)
7640 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7642 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7647 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7648 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7650 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7652 trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7655 vcpu->arch.hflags |= HF_SMM_MASK;
7657 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7659 /* Process a latched INIT or SMI, if any. */
7660 kvm_make_request(KVM_REQ_EVENT, vcpu);
7663 kvm_mmu_reset_context(vcpu);
7666 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7675 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7676 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7681 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7683 struct kvm_run *kvm_run = vcpu->run;
7685 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7686 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7687 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7688 kvm_run->debug.arch.exception = DB_VECTOR;
7689 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7692 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7696 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7698 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7701 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7706 * rflags is the old, "raw" value of the flags. The new value has
7707 * not been saved yet.
7709 * This is correct even for TF set by the guest, because "the
7710 * processor will not generate this exception after the instruction
7711 * that sets the TF flag".
7713 if (unlikely(rflags & X86_EFLAGS_TF))
7714 r = kvm_vcpu_do_singlestep(vcpu);
7717 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7719 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7721 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7722 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7723 struct kvm_run *kvm_run = vcpu->run;
7724 unsigned long eip = kvm_get_linear_rip(vcpu);
7725 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7726 vcpu->arch.guest_debug_dr7,
7730 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7731 kvm_run->debug.arch.pc = eip;
7732 kvm_run->debug.arch.exception = DB_VECTOR;
7733 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7739 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7740 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7741 unsigned long eip = kvm_get_linear_rip(vcpu);
7742 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7747 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7756 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7758 switch (ctxt->opcode_len) {
7765 case 0xe6: /* OUT */
7769 case 0x6c: /* INS */
7771 case 0x6e: /* OUTS */
7778 case 0x33: /* RDPMC */
7788 * Decode to be emulated instruction. Return EMULATION_OK if success.
7790 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7791 void *insn, int insn_len)
7793 int r = EMULATION_OK;
7794 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7796 init_emulate_ctxt(vcpu);
7799 * We will reenter on the same instruction since we do not set
7800 * complete_userspace_io. This does not handle watchpoints yet,
7801 * those would be handled in the emulate_ops.
7803 if (!(emulation_type & EMULTYPE_SKIP) &&
7804 kvm_vcpu_check_breakpoint(vcpu, &r))
7807 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7809 trace_kvm_emulate_insn_start(vcpu);
7810 ++vcpu->stat.insn_emulation;
7814 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7816 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7817 int emulation_type, void *insn, int insn_len)
7820 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7821 bool writeback = true;
7822 bool write_fault_to_spt;
7824 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7827 vcpu->arch.l1tf_flush_l1d = true;
7830 * Clear write_fault_to_shadow_pgtable here to ensure it is
7833 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7834 vcpu->arch.write_fault_to_shadow_pgtable = false;
7836 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7837 kvm_clear_exception_queue(vcpu);
7839 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7841 if (r != EMULATION_OK) {
7842 if ((emulation_type & EMULTYPE_TRAP_UD) ||
7843 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7844 kvm_queue_exception(vcpu, UD_VECTOR);
7847 if (reexecute_instruction(vcpu, cr2_or_gpa,
7851 if (ctxt->have_exception) {
7853 * #UD should result in just EMULATION_FAILED, and trap-like
7854 * exception should not be encountered during decode.
7856 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7857 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7858 inject_emulated_exception(vcpu);
7861 return handle_emulation_failure(vcpu, emulation_type);
7865 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7866 !is_vmware_backdoor_opcode(ctxt)) {
7867 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7872 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7873 * for kvm_skip_emulated_instruction(). The caller is responsible for
7874 * updating interruptibility state and injecting single-step #DBs.
7876 if (emulation_type & EMULTYPE_SKIP) {
7877 kvm_rip_write(vcpu, ctxt->_eip);
7878 if (ctxt->eflags & X86_EFLAGS_RF)
7879 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7883 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7886 /* this is needed for vmware backdoor interface to work since it
7887 changes registers values during IO operation */
7888 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7889 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7890 emulator_invalidate_register_cache(ctxt);
7894 if (emulation_type & EMULTYPE_PF) {
7895 /* Save the faulting GPA (cr2) in the address field */
7896 ctxt->exception.address = cr2_or_gpa;
7898 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7899 if (vcpu->arch.mmu->direct_map) {
7900 ctxt->gpa_available = true;
7901 ctxt->gpa_val = cr2_or_gpa;
7904 /* Sanitize the address out of an abundance of paranoia. */
7905 ctxt->exception.address = 0;
7908 r = x86_emulate_insn(ctxt);
7910 if (r == EMULATION_INTERCEPTED)
7913 if (r == EMULATION_FAILED) {
7914 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7918 return handle_emulation_failure(vcpu, emulation_type);
7921 if (ctxt->have_exception) {
7923 if (inject_emulated_exception(vcpu))
7925 } else if (vcpu->arch.pio.count) {
7926 if (!vcpu->arch.pio.in) {
7927 /* FIXME: return into emulator if single-stepping. */
7928 vcpu->arch.pio.count = 0;
7931 vcpu->arch.complete_userspace_io = complete_emulated_pio;
7934 } else if (vcpu->mmio_needed) {
7935 ++vcpu->stat.mmio_exits;
7937 if (!vcpu->mmio_is_write)
7940 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7941 } else if (r == EMULATION_RESTART)
7947 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7948 toggle_interruptibility(vcpu, ctxt->interruptibility);
7949 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7950 if (!ctxt->have_exception ||
7951 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7952 kvm_rip_write(vcpu, ctxt->eip);
7953 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7954 r = kvm_vcpu_do_singlestep(vcpu);
7955 if (kvm_x86_ops.update_emulated_instruction)
7956 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7957 __kvm_set_rflags(vcpu, ctxt->eflags);
7961 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7962 * do nothing, and it will be requested again as soon as
7963 * the shadow expires. But we still need to check here,
7964 * because POPF has no interrupt shadow.
7966 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7967 kvm_make_request(KVM_REQ_EVENT, vcpu);
7969 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7974 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7976 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7978 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7980 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7981 void *insn, int insn_len)
7983 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7985 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7987 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7989 vcpu->arch.pio.count = 0;
7993 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7995 vcpu->arch.pio.count = 0;
7997 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8000 return kvm_skip_emulated_instruction(vcpu);
8003 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8004 unsigned short port)
8006 unsigned long val = kvm_rax_read(vcpu);
8007 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8013 * Workaround userspace that relies on old KVM behavior of %rip being
8014 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8017 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8018 vcpu->arch.complete_userspace_io =
8019 complete_fast_pio_out_port_0x7e;
8020 kvm_skip_emulated_instruction(vcpu);
8022 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8023 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8028 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8032 /* We should only ever be called with arch.pio.count equal to 1 */
8033 BUG_ON(vcpu->arch.pio.count != 1);
8035 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8036 vcpu->arch.pio.count = 0;
8040 /* For size less than 4 we merge, else we zero extend */
8041 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8044 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8045 * the copy and tracing
8047 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8048 kvm_rax_write(vcpu, val);
8050 return kvm_skip_emulated_instruction(vcpu);
8053 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8054 unsigned short port)
8059 /* For size less than 4 we merge, else we zero extend */
8060 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8062 ret = emulator_pio_in(vcpu, size, port, &val, 1);
8064 kvm_rax_write(vcpu, val);
8068 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8069 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8074 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8079 ret = kvm_fast_pio_in(vcpu, size, port);
8081 ret = kvm_fast_pio_out(vcpu, size, port);
8082 return ret && kvm_skip_emulated_instruction(vcpu);
8084 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8086 static int kvmclock_cpu_down_prep(unsigned int cpu)
8088 __this_cpu_write(cpu_tsc_khz, 0);
8092 static void tsc_khz_changed(void *data)
8094 struct cpufreq_freqs *freq = data;
8095 unsigned long khz = 0;
8099 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8100 khz = cpufreq_quick_get(raw_smp_processor_id());
8103 __this_cpu_write(cpu_tsc_khz, khz);
8106 #ifdef CONFIG_X86_64
8107 static void kvm_hyperv_tsc_notifier(void)
8110 struct kvm_vcpu *vcpu;
8112 unsigned long flags;
8114 mutex_lock(&kvm_lock);
8115 list_for_each_entry(kvm, &vm_list, vm_list)
8116 kvm_make_mclock_inprogress_request(kvm);
8118 hyperv_stop_tsc_emulation();
8120 /* TSC frequency always matches when on Hyper-V */
8121 for_each_present_cpu(cpu)
8122 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8123 kvm_max_guest_tsc_khz = tsc_khz;
8125 list_for_each_entry(kvm, &vm_list, vm_list) {
8126 struct kvm_arch *ka = &kvm->arch;
8128 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8129 pvclock_update_vm_gtod_copy(kvm);
8130 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8132 kvm_for_each_vcpu(cpu, vcpu, kvm)
8133 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8135 kvm_for_each_vcpu(cpu, vcpu, kvm)
8136 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8138 mutex_unlock(&kvm_lock);
8142 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8145 struct kvm_vcpu *vcpu;
8146 int i, send_ipi = 0;
8149 * We allow guests to temporarily run on slowing clocks,
8150 * provided we notify them after, or to run on accelerating
8151 * clocks, provided we notify them before. Thus time never
8154 * However, we have a problem. We can't atomically update
8155 * the frequency of a given CPU from this function; it is
8156 * merely a notifier, which can be called from any CPU.
8157 * Changing the TSC frequency at arbitrary points in time
8158 * requires a recomputation of local variables related to
8159 * the TSC for each VCPU. We must flag these local variables
8160 * to be updated and be sure the update takes place with the
8161 * new frequency before any guests proceed.
8163 * Unfortunately, the combination of hotplug CPU and frequency
8164 * change creates an intractable locking scenario; the order
8165 * of when these callouts happen is undefined with respect to
8166 * CPU hotplug, and they can race with each other. As such,
8167 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8168 * undefined; you can actually have a CPU frequency change take
8169 * place in between the computation of X and the setting of the
8170 * variable. To protect against this problem, all updates of
8171 * the per_cpu tsc_khz variable are done in an interrupt
8172 * protected IPI, and all callers wishing to update the value
8173 * must wait for a synchronous IPI to complete (which is trivial
8174 * if the caller is on the CPU already). This establishes the
8175 * necessary total order on variable updates.
8177 * Note that because a guest time update may take place
8178 * anytime after the setting of the VCPU's request bit, the
8179 * correct TSC value must be set before the request. However,
8180 * to ensure the update actually makes it to any guest which
8181 * starts running in hardware virtualization between the set
8182 * and the acquisition of the spinlock, we must also ping the
8183 * CPU after setting the request bit.
8187 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8189 mutex_lock(&kvm_lock);
8190 list_for_each_entry(kvm, &vm_list, vm_list) {
8191 kvm_for_each_vcpu(i, vcpu, kvm) {
8192 if (vcpu->cpu != cpu)
8194 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8195 if (vcpu->cpu != raw_smp_processor_id())
8199 mutex_unlock(&kvm_lock);
8201 if (freq->old < freq->new && send_ipi) {
8203 * We upscale the frequency. Must make the guest
8204 * doesn't see old kvmclock values while running with
8205 * the new frequency, otherwise we risk the guest sees
8206 * time go backwards.
8208 * In case we update the frequency for another cpu
8209 * (which might be in guest context) send an interrupt
8210 * to kick the cpu out of guest context. Next time
8211 * guest context is entered kvmclock will be updated,
8212 * so the guest will not see stale values.
8214 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8218 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8221 struct cpufreq_freqs *freq = data;
8224 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8226 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8229 for_each_cpu(cpu, freq->policy->cpus)
8230 __kvmclock_cpufreq_notifier(freq, cpu);
8235 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8236 .notifier_call = kvmclock_cpufreq_notifier
8239 static int kvmclock_cpu_online(unsigned int cpu)
8241 tsc_khz_changed(NULL);
8245 static void kvm_timer_init(void)
8247 max_tsc_khz = tsc_khz;
8249 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8250 #ifdef CONFIG_CPU_FREQ
8251 struct cpufreq_policy *policy;
8255 policy = cpufreq_cpu_get(cpu);
8257 if (policy->cpuinfo.max_freq)
8258 max_tsc_khz = policy->cpuinfo.max_freq;
8259 cpufreq_cpu_put(policy);
8263 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8264 CPUFREQ_TRANSITION_NOTIFIER);
8267 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8268 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8271 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8272 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8274 int kvm_is_in_guest(void)
8276 return __this_cpu_read(current_vcpu) != NULL;
8279 static int kvm_is_user_mode(void)
8283 if (__this_cpu_read(current_vcpu))
8284 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8286 return user_mode != 0;
8289 static unsigned long kvm_get_guest_ip(void)
8291 unsigned long ip = 0;
8293 if (__this_cpu_read(current_vcpu))
8294 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8299 static void kvm_handle_intel_pt_intr(void)
8301 struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8303 kvm_make_request(KVM_REQ_PMI, vcpu);
8304 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8305 (unsigned long *)&vcpu->arch.pmu.global_status);
8308 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8309 .is_in_guest = kvm_is_in_guest,
8310 .is_user_mode = kvm_is_user_mode,
8311 .get_guest_ip = kvm_get_guest_ip,
8312 .handle_intel_pt_intr = kvm_handle_intel_pt_intr,
8315 #ifdef CONFIG_X86_64
8316 static void pvclock_gtod_update_fn(struct work_struct *work)
8320 struct kvm_vcpu *vcpu;
8323 mutex_lock(&kvm_lock);
8324 list_for_each_entry(kvm, &vm_list, vm_list)
8325 kvm_for_each_vcpu(i, vcpu, kvm)
8326 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8327 atomic_set(&kvm_guest_has_master_clock, 0);
8328 mutex_unlock(&kvm_lock);
8331 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8334 * Indirection to move queue_work() out of the tk_core.seq write held
8335 * region to prevent possible deadlocks against time accessors which
8336 * are invoked with work related locks held.
8338 static void pvclock_irq_work_fn(struct irq_work *w)
8340 queue_work(system_long_wq, &pvclock_gtod_work);
8343 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8346 * Notification about pvclock gtod data update.
8348 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8351 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8352 struct timekeeper *tk = priv;
8354 update_pvclock_gtod(tk);
8357 * Disable master clock if host does not trust, or does not use,
8358 * TSC based clocksource. Delegate queue_work() to irq_work as
8359 * this is invoked with tk_core.seq write held.
8361 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8362 atomic_read(&kvm_guest_has_master_clock) != 0)
8363 irq_work_queue(&pvclock_irq_work);
8367 static struct notifier_block pvclock_gtod_notifier = {
8368 .notifier_call = pvclock_gtod_notify,
8372 int kvm_arch_init(void *opaque)
8374 struct kvm_x86_init_ops *ops = opaque;
8377 if (kvm_x86_ops.hardware_enable) {
8378 printk(KERN_ERR "kvm: already loaded the other module\n");
8383 if (!ops->cpu_has_kvm_support()) {
8384 pr_err_ratelimited("kvm: no hardware support\n");
8388 if (ops->disabled_by_bios()) {
8389 pr_err_ratelimited("kvm: disabled by bios\n");
8395 * KVM explicitly assumes that the guest has an FPU and
8396 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8397 * vCPU's FPU state as a fxregs_state struct.
8399 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8400 printk(KERN_ERR "kvm: inadequate fpu\n");
8406 x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8407 __alignof__(struct fpu), SLAB_ACCOUNT,
8409 if (!x86_fpu_cache) {
8410 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8414 x86_emulator_cache = kvm_alloc_emulator_cache();
8415 if (!x86_emulator_cache) {
8416 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8417 goto out_free_x86_fpu_cache;
8420 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8421 if (!user_return_msrs) {
8422 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8423 goto out_free_x86_emulator_cache;
8425 kvm_nr_uret_msrs = 0;
8427 r = kvm_mmu_module_init();
8429 goto out_free_percpu;
8433 perf_register_guest_info_callbacks(&kvm_guest_cbs);
8435 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8436 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8437 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8440 if (pi_inject_timer == -1)
8441 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8442 #ifdef CONFIG_X86_64
8443 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8445 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8446 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8452 free_percpu(user_return_msrs);
8453 out_free_x86_emulator_cache:
8454 kmem_cache_destroy(x86_emulator_cache);
8455 out_free_x86_fpu_cache:
8456 kmem_cache_destroy(x86_fpu_cache);
8461 void kvm_arch_exit(void)
8463 #ifdef CONFIG_X86_64
8464 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8465 clear_hv_tscchange_cb();
8468 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8470 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8471 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8472 CPUFREQ_TRANSITION_NOTIFIER);
8473 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8474 #ifdef CONFIG_X86_64
8475 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8476 irq_work_sync(&pvclock_irq_work);
8477 cancel_work_sync(&pvclock_gtod_work);
8479 kvm_x86_ops.hardware_enable = NULL;
8480 kvm_mmu_module_exit();
8481 free_percpu(user_return_msrs);
8482 kmem_cache_destroy(x86_emulator_cache);
8483 kmem_cache_destroy(x86_fpu_cache);
8484 #ifdef CONFIG_KVM_XEN
8485 static_key_deferred_flush(&kvm_xen_enabled);
8486 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8490 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8492 ++vcpu->stat.halt_exits;
8493 if (lapic_in_kernel(vcpu)) {
8494 vcpu->arch.mp_state = state;
8497 vcpu->run->exit_reason = reason;
8502 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8504 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8506 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8508 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8510 int ret = kvm_skip_emulated_instruction(vcpu);
8512 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8513 * KVM_EXIT_DEBUG here.
8515 return kvm_vcpu_halt(vcpu) && ret;
8517 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8519 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8521 int ret = kvm_skip_emulated_instruction(vcpu);
8523 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8525 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8527 #ifdef CONFIG_X86_64
8528 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8529 unsigned long clock_type)
8531 struct kvm_clock_pairing clock_pairing;
8532 struct timespec64 ts;
8536 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8537 return -KVM_EOPNOTSUPP;
8539 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8540 return -KVM_EOPNOTSUPP;
8542 clock_pairing.sec = ts.tv_sec;
8543 clock_pairing.nsec = ts.tv_nsec;
8544 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8545 clock_pairing.flags = 0;
8546 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8549 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8550 sizeof(struct kvm_clock_pairing)))
8558 * kvm_pv_kick_cpu_op: Kick a vcpu.
8560 * @apicid - apicid of vcpu to be kicked.
8562 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8564 struct kvm_lapic_irq lapic_irq;
8566 lapic_irq.shorthand = APIC_DEST_NOSHORT;
8567 lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8568 lapic_irq.level = 0;
8569 lapic_irq.dest_id = apicid;
8570 lapic_irq.msi_redir_hint = false;
8572 lapic_irq.delivery_mode = APIC_DM_REMRD;
8573 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8576 bool kvm_apicv_activated(struct kvm *kvm)
8578 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8580 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8582 static void kvm_apicv_init(struct kvm *kvm)
8584 mutex_init(&kvm->arch.apicv_update_lock);
8587 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8588 &kvm->arch.apicv_inhibit_reasons);
8590 set_bit(APICV_INHIBIT_REASON_DISABLE,
8591 &kvm->arch.apicv_inhibit_reasons);
8594 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8596 struct kvm_vcpu *target = NULL;
8597 struct kvm_apic_map *map;
8599 vcpu->stat.directed_yield_attempted++;
8601 if (single_task_running())
8605 map = rcu_dereference(vcpu->kvm->arch.apic_map);
8607 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8608 target = map->phys_map[dest_id]->vcpu;
8612 if (!target || !READ_ONCE(target->ready))
8615 /* Ignore requests to yield to self */
8619 if (kvm_vcpu_yield_to(target) <= 0)
8622 vcpu->stat.directed_yield_successful++;
8628 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8630 u64 ret = vcpu->run->hypercall.ret;
8632 if (!is_64_bit_mode(vcpu))
8634 kvm_rax_write(vcpu, ret);
8635 ++vcpu->stat.hypercalls;
8636 return kvm_skip_emulated_instruction(vcpu);
8639 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8641 unsigned long nr, a0, a1, a2, a3, ret;
8644 if (kvm_xen_hypercall_enabled(vcpu->kvm))
8645 return kvm_xen_hypercall(vcpu);
8647 if (kvm_hv_hypercall_enabled(vcpu))
8648 return kvm_hv_hypercall(vcpu);
8650 nr = kvm_rax_read(vcpu);
8651 a0 = kvm_rbx_read(vcpu);
8652 a1 = kvm_rcx_read(vcpu);
8653 a2 = kvm_rdx_read(vcpu);
8654 a3 = kvm_rsi_read(vcpu);
8656 trace_kvm_hypercall(nr, a0, a1, a2, a3);
8658 op_64_bit = is_64_bit_mode(vcpu);
8667 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8675 case KVM_HC_VAPIC_POLL_IRQ:
8678 case KVM_HC_KICK_CPU:
8679 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8682 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8683 kvm_sched_yield(vcpu, a1);
8686 #ifdef CONFIG_X86_64
8687 case KVM_HC_CLOCK_PAIRING:
8688 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8691 case KVM_HC_SEND_IPI:
8692 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8695 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8697 case KVM_HC_SCHED_YIELD:
8698 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8701 kvm_sched_yield(vcpu, a0);
8704 case KVM_HC_MAP_GPA_RANGE: {
8705 u64 gpa = a0, npages = a1, attrs = a2;
8708 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8711 if (!PAGE_ALIGNED(gpa) || !npages ||
8712 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8717 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
8718 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
8719 vcpu->run->hypercall.args[0] = gpa;
8720 vcpu->run->hypercall.args[1] = npages;
8721 vcpu->run->hypercall.args[2] = attrs;
8722 vcpu->run->hypercall.longmode = op_64_bit;
8723 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8733 kvm_rax_write(vcpu, ret);
8735 ++vcpu->stat.hypercalls;
8736 return kvm_skip_emulated_instruction(vcpu);
8738 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8740 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8742 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8743 char instruction[3];
8744 unsigned long rip = kvm_rip_read(vcpu);
8746 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8748 return emulator_write_emulated(ctxt, rip, instruction, 3,
8752 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8754 return vcpu->run->request_interrupt_window &&
8755 likely(!pic_in_kernel(vcpu->kvm));
8758 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8760 struct kvm_run *kvm_run = vcpu->run;
8763 * if_flag is obsolete and useless, so do not bother
8764 * setting it for SEV-ES guests. Userspace can just
8765 * use kvm_run->ready_for_interrupt_injection.
8767 kvm_run->if_flag = !vcpu->arch.guest_state_protected
8768 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8770 kvm_run->cr8 = kvm_get_cr8(vcpu);
8771 kvm_run->apic_base = kvm_get_apic_base(vcpu);
8772 kvm_run->ready_for_interrupt_injection =
8773 pic_in_kernel(vcpu->kvm) ||
8774 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8777 kvm_run->flags |= KVM_RUN_X86_SMM;
8780 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8784 if (!kvm_x86_ops.update_cr8_intercept)
8787 if (!lapic_in_kernel(vcpu))
8790 if (vcpu->arch.apicv_active)
8793 if (!vcpu->arch.apic->vapic_addr)
8794 max_irr = kvm_lapic_find_highest_irr(vcpu);
8801 tpr = kvm_lapic_get_cr8(vcpu);
8803 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8807 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8809 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8810 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8814 return kvm_x86_ops.nested_ops->check_events(vcpu);
8817 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8819 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8820 vcpu->arch.exception.error_code = false;
8821 static_call(kvm_x86_queue_exception)(vcpu);
8824 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8827 bool can_inject = true;
8829 /* try to reinject previous events if any */
8831 if (vcpu->arch.exception.injected) {
8832 kvm_inject_exception(vcpu);
8836 * Do not inject an NMI or interrupt if there is a pending
8837 * exception. Exceptions and interrupts are recognized at
8838 * instruction boundaries, i.e. the start of an instruction.
8839 * Trap-like exceptions, e.g. #DB, have higher priority than
8840 * NMIs and interrupts, i.e. traps are recognized before an
8841 * NMI/interrupt that's pending on the same instruction.
8842 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8843 * priority, but are only generated (pended) during instruction
8844 * execution, i.e. a pending fault-like exception means the
8845 * fault occurred on the *previous* instruction and must be
8846 * serviced prior to recognizing any new events in order to
8847 * fully complete the previous instruction.
8849 else if (!vcpu->arch.exception.pending) {
8850 if (vcpu->arch.nmi_injected) {
8851 static_call(kvm_x86_set_nmi)(vcpu);
8853 } else if (vcpu->arch.interrupt.injected) {
8854 static_call(kvm_x86_set_irq)(vcpu);
8859 WARN_ON_ONCE(vcpu->arch.exception.injected &&
8860 vcpu->arch.exception.pending);
8863 * Call check_nested_events() even if we reinjected a previous event
8864 * in order for caller to determine if it should require immediate-exit
8865 * from L2 to L1 due to pending L1 events which require exit
8868 if (is_guest_mode(vcpu)) {
8869 r = kvm_check_nested_events(vcpu);
8874 /* try to inject new event if pending */
8875 if (vcpu->arch.exception.pending) {
8876 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8877 vcpu->arch.exception.has_error_code,
8878 vcpu->arch.exception.error_code);
8880 vcpu->arch.exception.pending = false;
8881 vcpu->arch.exception.injected = true;
8883 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8884 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8887 if (vcpu->arch.exception.nr == DB_VECTOR) {
8888 kvm_deliver_exception_payload(vcpu);
8889 if (vcpu->arch.dr7 & DR7_GD) {
8890 vcpu->arch.dr7 &= ~DR7_GD;
8891 kvm_update_dr7(vcpu);
8895 kvm_inject_exception(vcpu);
8899 /* Don't inject interrupts if the user asked to avoid doing so */
8900 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
8904 * Finally, inject interrupt events. If an event cannot be injected
8905 * due to architectural conditions (e.g. IF=0) a window-open exit
8906 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8907 * and can architecturally be injected, but we cannot do it right now:
8908 * an interrupt could have arrived just now and we have to inject it
8909 * as a vmexit, or there could already an event in the queue, which is
8910 * indicated by can_inject. In that case we request an immediate exit
8911 * in order to make progress and get back here for another iteration.
8912 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8914 if (vcpu->arch.smi_pending) {
8915 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8919 vcpu->arch.smi_pending = false;
8920 ++vcpu->arch.smi_count;
8924 static_call(kvm_x86_enable_smi_window)(vcpu);
8927 if (vcpu->arch.nmi_pending) {
8928 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8932 --vcpu->arch.nmi_pending;
8933 vcpu->arch.nmi_injected = true;
8934 static_call(kvm_x86_set_nmi)(vcpu);
8936 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8938 if (vcpu->arch.nmi_pending)
8939 static_call(kvm_x86_enable_nmi_window)(vcpu);
8942 if (kvm_cpu_has_injectable_intr(vcpu)) {
8943 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8947 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8948 static_call(kvm_x86_set_irq)(vcpu);
8949 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8951 if (kvm_cpu_has_injectable_intr(vcpu))
8952 static_call(kvm_x86_enable_irq_window)(vcpu);
8955 if (is_guest_mode(vcpu) &&
8956 kvm_x86_ops.nested_ops->hv_timer_pending &&
8957 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8958 *req_immediate_exit = true;
8960 WARN_ON(vcpu->arch.exception.pending);
8965 *req_immediate_exit = true;
8971 static void process_nmi(struct kvm_vcpu *vcpu)
8976 * x86 is limited to one NMI running, and one NMI pending after it.
8977 * If an NMI is already in progress, limit further NMIs to just one.
8978 * Otherwise, allow two (and we'll inject the first one immediately).
8980 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8983 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8984 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8985 kvm_make_request(KVM_REQ_EVENT, vcpu);
8988 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8991 flags |= seg->g << 23;
8992 flags |= seg->db << 22;
8993 flags |= seg->l << 21;
8994 flags |= seg->avl << 20;
8995 flags |= seg->present << 15;
8996 flags |= seg->dpl << 13;
8997 flags |= seg->s << 12;
8998 flags |= seg->type << 8;
9002 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9004 struct kvm_segment seg;
9007 kvm_get_segment(vcpu, &seg, n);
9008 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9011 offset = 0x7f84 + n * 12;
9013 offset = 0x7f2c + (n - 3) * 12;
9015 put_smstate(u32, buf, offset + 8, seg.base);
9016 put_smstate(u32, buf, offset + 4, seg.limit);
9017 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9020 #ifdef CONFIG_X86_64
9021 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9023 struct kvm_segment seg;
9027 kvm_get_segment(vcpu, &seg, n);
9028 offset = 0x7e00 + n * 16;
9030 flags = enter_smm_get_segment_flags(&seg) >> 8;
9031 put_smstate(u16, buf, offset, seg.selector);
9032 put_smstate(u16, buf, offset + 2, flags);
9033 put_smstate(u32, buf, offset + 4, seg.limit);
9034 put_smstate(u64, buf, offset + 8, seg.base);
9038 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9041 struct kvm_segment seg;
9045 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9046 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9047 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9048 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9050 for (i = 0; i < 8; i++)
9051 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9053 kvm_get_dr(vcpu, 6, &val);
9054 put_smstate(u32, buf, 0x7fcc, (u32)val);
9055 kvm_get_dr(vcpu, 7, &val);
9056 put_smstate(u32, buf, 0x7fc8, (u32)val);
9058 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9059 put_smstate(u32, buf, 0x7fc4, seg.selector);
9060 put_smstate(u32, buf, 0x7f64, seg.base);
9061 put_smstate(u32, buf, 0x7f60, seg.limit);
9062 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9064 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9065 put_smstate(u32, buf, 0x7fc0, seg.selector);
9066 put_smstate(u32, buf, 0x7f80, seg.base);
9067 put_smstate(u32, buf, 0x7f7c, seg.limit);
9068 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9070 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9071 put_smstate(u32, buf, 0x7f74, dt.address);
9072 put_smstate(u32, buf, 0x7f70, dt.size);
9074 static_call(kvm_x86_get_idt)(vcpu, &dt);
9075 put_smstate(u32, buf, 0x7f58, dt.address);
9076 put_smstate(u32, buf, 0x7f54, dt.size);
9078 for (i = 0; i < 6; i++)
9079 enter_smm_save_seg_32(vcpu, buf, i);
9081 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9084 put_smstate(u32, buf, 0x7efc, 0x00020000);
9085 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9088 #ifdef CONFIG_X86_64
9089 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9092 struct kvm_segment seg;
9096 for (i = 0; i < 16; i++)
9097 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9099 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9100 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9102 kvm_get_dr(vcpu, 6, &val);
9103 put_smstate(u64, buf, 0x7f68, val);
9104 kvm_get_dr(vcpu, 7, &val);
9105 put_smstate(u64, buf, 0x7f60, val);
9107 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9108 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9109 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9111 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9114 put_smstate(u32, buf, 0x7efc, 0x00020064);
9116 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9118 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9119 put_smstate(u16, buf, 0x7e90, seg.selector);
9120 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9121 put_smstate(u32, buf, 0x7e94, seg.limit);
9122 put_smstate(u64, buf, 0x7e98, seg.base);
9124 static_call(kvm_x86_get_idt)(vcpu, &dt);
9125 put_smstate(u32, buf, 0x7e84, dt.size);
9126 put_smstate(u64, buf, 0x7e88, dt.address);
9128 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9129 put_smstate(u16, buf, 0x7e70, seg.selector);
9130 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9131 put_smstate(u32, buf, 0x7e74, seg.limit);
9132 put_smstate(u64, buf, 0x7e78, seg.base);
9134 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9135 put_smstate(u32, buf, 0x7e64, dt.size);
9136 put_smstate(u64, buf, 0x7e68, dt.address);
9138 for (i = 0; i < 6; i++)
9139 enter_smm_save_seg_64(vcpu, buf, i);
9143 static void enter_smm(struct kvm_vcpu *vcpu)
9145 struct kvm_segment cs, ds;
9150 memset(buf, 0, 512);
9151 #ifdef CONFIG_X86_64
9152 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9153 enter_smm_save_state_64(vcpu, buf);
9156 enter_smm_save_state_32(vcpu, buf);
9159 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9160 * state (e.g. leave guest mode) after we've saved the state into the
9161 * SMM state-save area.
9163 static_call(kvm_x86_enter_smm)(vcpu, buf);
9165 kvm_smm_changed(vcpu, true);
9166 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9168 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9169 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9171 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9173 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9174 kvm_rip_write(vcpu, 0x8000);
9176 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9177 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9178 vcpu->arch.cr0 = cr0;
9180 static_call(kvm_x86_set_cr4)(vcpu, 0);
9182 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9183 dt.address = dt.size = 0;
9184 static_call(kvm_x86_set_idt)(vcpu, &dt);
9186 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9188 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9189 cs.base = vcpu->arch.smbase;
9194 cs.limit = ds.limit = 0xffffffff;
9195 cs.type = ds.type = 0x3;
9196 cs.dpl = ds.dpl = 0;
9201 cs.avl = ds.avl = 0;
9202 cs.present = ds.present = 1;
9203 cs.unusable = ds.unusable = 0;
9204 cs.padding = ds.padding = 0;
9206 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9207 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9208 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9209 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9210 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9211 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9213 #ifdef CONFIG_X86_64
9214 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9215 static_call(kvm_x86_set_efer)(vcpu, 0);
9218 kvm_update_cpuid_runtime(vcpu);
9219 kvm_mmu_reset_context(vcpu);
9222 static void process_smi(struct kvm_vcpu *vcpu)
9224 vcpu->arch.smi_pending = true;
9225 kvm_make_request(KVM_REQ_EVENT, vcpu);
9228 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9229 unsigned long *vcpu_bitmap)
9233 zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9235 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9236 NULL, vcpu_bitmap, cpus);
9238 free_cpumask_var(cpus);
9241 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9243 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9246 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9250 if (!lapic_in_kernel(vcpu))
9253 mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9255 activate = kvm_apicv_activated(vcpu->kvm);
9256 if (vcpu->arch.apicv_active == activate)
9259 vcpu->arch.apicv_active = activate;
9260 kvm_apic_update_apicv(vcpu);
9261 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9264 * When APICv gets disabled, we may still have injected interrupts
9265 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9266 * still active when the interrupt got accepted. Make sure
9267 * inject_pending_event() is called to check for that.
9269 if (!vcpu->arch.apicv_active)
9270 kvm_make_request(KVM_REQ_EVENT, vcpu);
9273 mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9275 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9277 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9279 unsigned long old, new;
9281 if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9282 !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9285 old = new = kvm->arch.apicv_inhibit_reasons;
9288 __clear_bit(bit, &new);
9290 __set_bit(bit, &new);
9292 if (!!old != !!new) {
9293 trace_kvm_apicv_update_request(activate, bit);
9294 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9295 kvm->arch.apicv_inhibit_reasons = new;
9297 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9298 kvm_zap_gfn_range(kvm, gfn, gfn+1);
9301 kvm->arch.apicv_inhibit_reasons = new;
9303 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9305 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9307 mutex_lock(&kvm->arch.apicv_update_lock);
9308 __kvm_request_apicv_update(kvm, activate, bit);
9309 mutex_unlock(&kvm->arch.apicv_update_lock);
9311 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9313 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9315 if (!kvm_apic_present(vcpu))
9318 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9320 if (irqchip_split(vcpu->kvm))
9321 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9323 if (vcpu->arch.apicv_active)
9324 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9325 if (ioapic_in_kernel(vcpu->kvm))
9326 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9329 if (is_guest_mode(vcpu))
9330 vcpu->arch.load_eoi_exitmap_pending = true;
9332 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9335 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9337 u64 eoi_exit_bitmap[4];
9339 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9342 if (to_hv_vcpu(vcpu))
9343 bitmap_or((ulong *)eoi_exit_bitmap,
9344 vcpu->arch.ioapic_handled_vectors,
9345 to_hv_synic(vcpu)->vec_bitmap, 256);
9347 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9350 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9351 unsigned long start, unsigned long end)
9353 unsigned long apic_address;
9356 * The physical address of apic access page is stored in the VMCS.
9357 * Update it when it becomes invalid.
9359 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9360 if (start <= apic_address && apic_address < end)
9361 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9364 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9366 if (!lapic_in_kernel(vcpu))
9369 if (!kvm_x86_ops.set_apic_access_page_addr)
9372 static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9375 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9377 smp_send_reschedule(vcpu->cpu);
9379 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9382 * Returns 1 to let vcpu_run() continue the guest execution loop without
9383 * exiting to the userspace. Otherwise, the value will be returned to the
9386 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9390 dm_request_for_irq_injection(vcpu) &&
9391 kvm_cpu_accept_dm_intr(vcpu);
9392 fastpath_t exit_fastpath;
9394 bool req_immediate_exit = false;
9396 /* Forbid vmenter if vcpu dirty ring is soft-full */
9397 if (unlikely(vcpu->kvm->dirty_ring_size &&
9398 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9399 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9400 trace_kvm_dirty_ring_exit(vcpu);
9405 if (kvm_request_pending(vcpu)) {
9406 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9410 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9411 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9416 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9417 kvm_mmu_unload(vcpu);
9418 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9419 __kvm_migrate_timers(vcpu);
9420 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9421 kvm_gen_update_masterclock(vcpu->kvm);
9422 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9423 kvm_gen_kvmclock_update(vcpu);
9424 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9425 r = kvm_guest_time_update(vcpu);
9429 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9430 kvm_mmu_sync_roots(vcpu);
9431 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9432 kvm_mmu_load_pgd(vcpu);
9433 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9434 kvm_vcpu_flush_tlb_all(vcpu);
9436 /* Flushing all ASIDs flushes the current ASID... */
9437 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9439 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9440 kvm_vcpu_flush_tlb_current(vcpu);
9441 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9442 kvm_vcpu_flush_tlb_guest(vcpu);
9444 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9445 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9449 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9450 if (is_guest_mode(vcpu)) {
9451 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9453 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9454 vcpu->mmio_needed = 0;
9459 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9460 /* Page is swapped out. Do synthetic halt */
9461 vcpu->arch.apf.halted = true;
9465 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9466 record_steal_time(vcpu);
9467 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9469 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9471 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9472 kvm_pmu_handle_event(vcpu);
9473 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9474 kvm_pmu_deliver_pmi(vcpu);
9475 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9476 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9477 if (test_bit(vcpu->arch.pending_ioapic_eoi,
9478 vcpu->arch.ioapic_handled_vectors)) {
9479 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9480 vcpu->run->eoi.vector =
9481 vcpu->arch.pending_ioapic_eoi;
9486 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9487 vcpu_scan_ioapic(vcpu);
9488 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9489 vcpu_load_eoi_exitmap(vcpu);
9490 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9491 kvm_vcpu_reload_apic_access_page(vcpu);
9492 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9493 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9494 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9498 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9499 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9500 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9504 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9505 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9507 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9508 vcpu->run->hyperv = hv_vcpu->exit;
9514 * KVM_REQ_HV_STIMER has to be processed after
9515 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9516 * depend on the guest clock being up-to-date
9518 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9519 kvm_hv_process_stimers(vcpu);
9520 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9521 kvm_vcpu_update_apicv(vcpu);
9522 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9523 kvm_check_async_pf_completion(vcpu);
9524 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9525 static_call(kvm_x86_msr_filter_changed)(vcpu);
9527 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9528 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9531 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9532 kvm_xen_has_interrupt(vcpu)) {
9533 ++vcpu->stat.req_event;
9534 r = kvm_apic_accept_events(vcpu);
9539 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9544 r = inject_pending_event(vcpu, &req_immediate_exit);
9550 static_call(kvm_x86_enable_irq_window)(vcpu);
9552 if (kvm_lapic_enabled(vcpu)) {
9553 update_cr8_intercept(vcpu);
9554 kvm_lapic_sync_to_vapic(vcpu);
9558 r = kvm_mmu_reload(vcpu);
9560 goto cancel_injection;
9565 static_call(kvm_x86_prepare_guest_switch)(vcpu);
9568 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9569 * IPI are then delayed after guest entry, which ensures that they
9570 * result in virtual interrupt delivery.
9572 local_irq_disable();
9573 vcpu->mode = IN_GUEST_MODE;
9575 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9578 * 1) We should set ->mode before checking ->requests. Please see
9579 * the comment in kvm_vcpu_exiting_guest_mode().
9581 * 2) For APICv, we should set ->mode before checking PID.ON. This
9582 * pairs with the memory barrier implicit in pi_test_and_set_on
9583 * (see vmx_deliver_posted_interrupt).
9585 * 3) This also orders the write to mode from any reads to the page
9586 * tables done while the VCPU is running. Please see the comment
9587 * in kvm_flush_remote_tlbs.
9589 smp_mb__after_srcu_read_unlock();
9592 * This handles the case where a posted interrupt was
9593 * notified with kvm_vcpu_kick.
9595 if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9596 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9598 if (kvm_vcpu_exit_request(vcpu)) {
9599 vcpu->mode = OUTSIDE_GUEST_MODE;
9603 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9605 goto cancel_injection;
9608 if (req_immediate_exit) {
9609 kvm_make_request(KVM_REQ_EVENT, vcpu);
9610 static_call(kvm_x86_request_immediate_exit)(vcpu);
9613 fpregs_assert_state_consistent();
9614 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9615 switch_fpu_return();
9617 if (unlikely(vcpu->arch.switch_db_regs)) {
9619 set_debugreg(vcpu->arch.eff_db[0], 0);
9620 set_debugreg(vcpu->arch.eff_db[1], 1);
9621 set_debugreg(vcpu->arch.eff_db[2], 2);
9622 set_debugreg(vcpu->arch.eff_db[3], 3);
9623 } else if (unlikely(hw_breakpoint_active())) {
9628 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9629 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9632 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9633 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9637 if (vcpu->arch.apicv_active)
9638 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9642 * Do this here before restoring debug registers on the host. And
9643 * since we do this before handling the vmexit, a DR access vmexit
9644 * can (a) read the correct value of the debug registers, (b) set
9645 * KVM_DEBUGREG_WONT_EXIT again.
9647 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9648 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9649 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9650 kvm_update_dr0123(vcpu);
9651 kvm_update_dr7(vcpu);
9655 * If the guest has used debug registers, at least dr7
9656 * will be disabled while returning to the host.
9657 * If we don't have active breakpoints in the host, we don't
9658 * care about the messed up debug address registers. But if
9659 * we have some of them active, restore the old state.
9661 if (hw_breakpoint_active())
9662 hw_breakpoint_restore();
9664 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9665 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9667 vcpu->mode = OUTSIDE_GUEST_MODE;
9670 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9673 * Consume any pending interrupts, including the possible source of
9674 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9675 * An instruction is required after local_irq_enable() to fully unblock
9676 * interrupts on processors that implement an interrupt shadow, the
9677 * stat.exits increment will do nicely.
9679 kvm_before_interrupt(vcpu);
9682 local_irq_disable();
9683 kvm_after_interrupt(vcpu);
9686 * Wait until after servicing IRQs to account guest time so that any
9687 * ticks that occurred while running the guest are properly accounted
9688 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9689 * of accounting via context tracking, but the loss of accuracy is
9690 * acceptable for all known use cases.
9692 vtime_account_guest_exit();
9694 if (lapic_in_kernel(vcpu)) {
9695 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9696 if (delta != S64_MIN) {
9697 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9698 vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9705 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9708 * Profile KVM exit RIPs:
9710 if (unlikely(prof_on == KVM_PROFILING)) {
9711 unsigned long rip = kvm_rip_read(vcpu);
9712 profile_hit(KVM_PROFILING, (void *)rip);
9715 if (unlikely(vcpu->arch.tsc_always_catchup))
9716 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9718 if (vcpu->arch.apic_attention)
9719 kvm_lapic_sync_from_vapic(vcpu);
9721 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9725 if (req_immediate_exit)
9726 kvm_make_request(KVM_REQ_EVENT, vcpu);
9727 static_call(kvm_x86_cancel_injection)(vcpu);
9728 if (unlikely(vcpu->arch.apic_attention))
9729 kvm_lapic_sync_from_vapic(vcpu);
9734 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9736 if (!kvm_arch_vcpu_runnable(vcpu) &&
9737 (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9738 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9739 kvm_vcpu_block(vcpu);
9740 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9742 if (kvm_x86_ops.post_block)
9743 static_call(kvm_x86_post_block)(vcpu);
9745 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9749 if (kvm_apic_accept_events(vcpu) < 0)
9751 switch(vcpu->arch.mp_state) {
9752 case KVM_MP_STATE_HALTED:
9753 case KVM_MP_STATE_AP_RESET_HOLD:
9754 vcpu->arch.pv.pv_unhalted = false;
9755 vcpu->arch.mp_state =
9756 KVM_MP_STATE_RUNNABLE;
9758 case KVM_MP_STATE_RUNNABLE:
9759 vcpu->arch.apf.halted = false;
9761 case KVM_MP_STATE_INIT_RECEIVED:
9769 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9771 if (is_guest_mode(vcpu))
9772 kvm_check_nested_events(vcpu);
9774 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9775 !vcpu->arch.apf.halted);
9778 static int vcpu_run(struct kvm_vcpu *vcpu)
9781 struct kvm *kvm = vcpu->kvm;
9783 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9784 vcpu->arch.l1tf_flush_l1d = true;
9787 if (kvm_vcpu_running(vcpu)) {
9788 r = vcpu_enter_guest(vcpu);
9790 r = vcpu_block(kvm, vcpu);
9796 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9797 if (kvm_cpu_has_pending_timer(vcpu))
9798 kvm_inject_pending_timer_irqs(vcpu);
9800 if (dm_request_for_irq_injection(vcpu) &&
9801 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9803 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9804 ++vcpu->stat.request_irq_exits;
9808 if (__xfer_to_guest_mode_work_pending()) {
9809 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9810 r = xfer_to_guest_mode_handle_work(vcpu);
9813 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9817 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9822 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9826 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9827 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9828 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9832 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9834 BUG_ON(!vcpu->arch.pio.count);
9836 return complete_emulated_io(vcpu);
9840 * Implements the following, as a state machine:
9844 * for each mmio piece in the fragment
9852 * for each mmio piece in the fragment
9857 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9859 struct kvm_run *run = vcpu->run;
9860 struct kvm_mmio_fragment *frag;
9863 BUG_ON(!vcpu->mmio_needed);
9865 /* Complete previous fragment */
9866 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9867 len = min(8u, frag->len);
9868 if (!vcpu->mmio_is_write)
9869 memcpy(frag->data, run->mmio.data, len);
9871 if (frag->len <= 8) {
9872 /* Switch to the next fragment. */
9874 vcpu->mmio_cur_fragment++;
9876 /* Go forward to the next mmio piece. */
9882 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9883 vcpu->mmio_needed = 0;
9885 /* FIXME: return into emulator if single-stepping. */
9886 if (vcpu->mmio_is_write)
9888 vcpu->mmio_read_completed = 1;
9889 return complete_emulated_io(vcpu);
9892 run->exit_reason = KVM_EXIT_MMIO;
9893 run->mmio.phys_addr = frag->gpa;
9894 if (vcpu->mmio_is_write)
9895 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9896 run->mmio.len = min(8u, frag->len);
9897 run->mmio.is_write = vcpu->mmio_is_write;
9898 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9902 static void kvm_save_current_fpu(struct fpu *fpu)
9905 * If the target FPU state is not resident in the CPU registers, just
9906 * memcpy() from current, else save CPU state directly to the target.
9908 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9909 memcpy(&fpu->state, ¤t->thread.fpu.state,
9910 fpu_kernel_xstate_size);
9912 save_fpregs_to_fpstate(fpu);
9915 /* Swap (qemu) user FPU context for the guest FPU context. */
9916 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9920 kvm_save_current_fpu(vcpu->arch.user_fpu);
9923 * Guests with protected state can't have it set by the hypervisor,
9924 * so skip trying to set it.
9926 if (vcpu->arch.guest_fpu)
9927 /* PKRU is separately restored in kvm_x86_ops.run. */
9928 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
9929 ~XFEATURE_MASK_PKRU);
9931 fpregs_mark_activate();
9937 /* When vcpu_run ends, restore user space FPU context. */
9938 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9943 * Guests with protected state can't have it read by the hypervisor,
9944 * so skip trying to save it.
9946 if (vcpu->arch.guest_fpu)
9947 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9949 restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
9951 fpregs_mark_activate();
9954 ++vcpu->stat.fpu_reload;
9958 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9960 struct kvm_run *kvm_run = vcpu->run;
9964 kvm_sigset_activate(vcpu);
9966 kvm_load_guest_fpu(vcpu);
9968 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9969 if (kvm_run->immediate_exit) {
9973 kvm_vcpu_block(vcpu);
9974 if (kvm_apic_accept_events(vcpu) < 0) {
9978 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9980 if (signal_pending(current)) {
9982 kvm_run->exit_reason = KVM_EXIT_INTR;
9983 ++vcpu->stat.signal_exits;
9988 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
9989 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
9994 if (kvm_run->kvm_dirty_regs) {
9995 r = sync_regs(vcpu);
10000 /* re-sync apic's tpr */
10001 if (!lapic_in_kernel(vcpu)) {
10002 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10008 if (unlikely(vcpu->arch.complete_userspace_io)) {
10009 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10010 vcpu->arch.complete_userspace_io = NULL;
10015 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10017 if (kvm_run->immediate_exit)
10020 r = vcpu_run(vcpu);
10023 kvm_put_guest_fpu(vcpu);
10024 if (kvm_run->kvm_valid_regs)
10026 post_kvm_run_save(vcpu);
10027 kvm_sigset_deactivate(vcpu);
10033 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10035 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10037 * We are here if userspace calls get_regs() in the middle of
10038 * instruction emulation. Registers state needs to be copied
10039 * back from emulation context to vcpu. Userspace shouldn't do
10040 * that usually, but some bad designed PV devices (vmware
10041 * backdoor interface) need this to work
10043 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10044 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10046 regs->rax = kvm_rax_read(vcpu);
10047 regs->rbx = kvm_rbx_read(vcpu);
10048 regs->rcx = kvm_rcx_read(vcpu);
10049 regs->rdx = kvm_rdx_read(vcpu);
10050 regs->rsi = kvm_rsi_read(vcpu);
10051 regs->rdi = kvm_rdi_read(vcpu);
10052 regs->rsp = kvm_rsp_read(vcpu);
10053 regs->rbp = kvm_rbp_read(vcpu);
10054 #ifdef CONFIG_X86_64
10055 regs->r8 = kvm_r8_read(vcpu);
10056 regs->r9 = kvm_r9_read(vcpu);
10057 regs->r10 = kvm_r10_read(vcpu);
10058 regs->r11 = kvm_r11_read(vcpu);
10059 regs->r12 = kvm_r12_read(vcpu);
10060 regs->r13 = kvm_r13_read(vcpu);
10061 regs->r14 = kvm_r14_read(vcpu);
10062 regs->r15 = kvm_r15_read(vcpu);
10065 regs->rip = kvm_rip_read(vcpu);
10066 regs->rflags = kvm_get_rflags(vcpu);
10069 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10072 __get_regs(vcpu, regs);
10077 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10079 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10080 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10082 kvm_rax_write(vcpu, regs->rax);
10083 kvm_rbx_write(vcpu, regs->rbx);
10084 kvm_rcx_write(vcpu, regs->rcx);
10085 kvm_rdx_write(vcpu, regs->rdx);
10086 kvm_rsi_write(vcpu, regs->rsi);
10087 kvm_rdi_write(vcpu, regs->rdi);
10088 kvm_rsp_write(vcpu, regs->rsp);
10089 kvm_rbp_write(vcpu, regs->rbp);
10090 #ifdef CONFIG_X86_64
10091 kvm_r8_write(vcpu, regs->r8);
10092 kvm_r9_write(vcpu, regs->r9);
10093 kvm_r10_write(vcpu, regs->r10);
10094 kvm_r11_write(vcpu, regs->r11);
10095 kvm_r12_write(vcpu, regs->r12);
10096 kvm_r13_write(vcpu, regs->r13);
10097 kvm_r14_write(vcpu, regs->r14);
10098 kvm_r15_write(vcpu, regs->r15);
10101 kvm_rip_write(vcpu, regs->rip);
10102 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10104 vcpu->arch.exception.pending = false;
10106 kvm_make_request(KVM_REQ_EVENT, vcpu);
10109 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10112 __set_regs(vcpu, regs);
10117 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10119 struct kvm_segment cs;
10121 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10125 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10127 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10129 struct desc_ptr dt;
10131 if (vcpu->arch.guest_state_protected)
10132 goto skip_protected_regs;
10134 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10135 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10136 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10137 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10138 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10139 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10141 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10142 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10144 static_call(kvm_x86_get_idt)(vcpu, &dt);
10145 sregs->idt.limit = dt.size;
10146 sregs->idt.base = dt.address;
10147 static_call(kvm_x86_get_gdt)(vcpu, &dt);
10148 sregs->gdt.limit = dt.size;
10149 sregs->gdt.base = dt.address;
10151 sregs->cr2 = vcpu->arch.cr2;
10152 sregs->cr3 = kvm_read_cr3(vcpu);
10154 skip_protected_regs:
10155 sregs->cr0 = kvm_read_cr0(vcpu);
10156 sregs->cr4 = kvm_read_cr4(vcpu);
10157 sregs->cr8 = kvm_get_cr8(vcpu);
10158 sregs->efer = vcpu->arch.efer;
10159 sregs->apic_base = kvm_get_apic_base(vcpu);
10162 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10164 __get_sregs_common(vcpu, sregs);
10166 if (vcpu->arch.guest_state_protected)
10169 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10170 set_bit(vcpu->arch.interrupt.nr,
10171 (unsigned long *)sregs->interrupt_bitmap);
10174 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10178 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10180 if (vcpu->arch.guest_state_protected)
10183 if (is_pae_paging(vcpu)) {
10184 for (i = 0 ; i < 4 ; i++)
10185 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10186 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10190 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10191 struct kvm_sregs *sregs)
10194 __get_sregs(vcpu, sregs);
10199 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10200 struct kvm_mp_state *mp_state)
10205 if (kvm_mpx_supported())
10206 kvm_load_guest_fpu(vcpu);
10208 r = kvm_apic_accept_events(vcpu);
10213 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10214 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10215 vcpu->arch.pv.pv_unhalted)
10216 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10218 mp_state->mp_state = vcpu->arch.mp_state;
10221 if (kvm_mpx_supported())
10222 kvm_put_guest_fpu(vcpu);
10227 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10228 struct kvm_mp_state *mp_state)
10234 if (!lapic_in_kernel(vcpu) &&
10235 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10239 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10240 * INIT state; latched init should be reported using
10241 * KVM_SET_VCPU_EVENTS, so reject it here.
10243 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10244 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10245 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10248 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10249 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10250 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10252 vcpu->arch.mp_state = mp_state->mp_state;
10253 kvm_make_request(KVM_REQ_EVENT, vcpu);
10261 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10262 int reason, bool has_error_code, u32 error_code)
10264 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10267 init_emulate_ctxt(vcpu);
10269 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10270 has_error_code, error_code);
10272 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10273 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10274 vcpu->run->internal.ndata = 0;
10278 kvm_rip_write(vcpu, ctxt->eip);
10279 kvm_set_rflags(vcpu, ctxt->eflags);
10282 EXPORT_SYMBOL_GPL(kvm_task_switch);
10284 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10286 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10288 * When EFER.LME and CR0.PG are set, the processor is in
10289 * 64-bit mode (though maybe in a 32-bit code segment).
10290 * CR4.PAE and EFER.LMA must be set.
10292 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10294 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10298 * Not in 64-bit mode: EFER.LMA is clear and the code
10299 * segment cannot be 64-bit.
10301 if (sregs->efer & EFER_LMA || sregs->cs.l)
10305 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10308 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10309 int *mmu_reset_needed, bool update_pdptrs)
10311 struct msr_data apic_base_msr;
10313 struct desc_ptr dt;
10315 if (!kvm_is_valid_sregs(vcpu, sregs))
10318 apic_base_msr.data = sregs->apic_base;
10319 apic_base_msr.host_initiated = true;
10320 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10323 if (vcpu->arch.guest_state_protected)
10326 dt.size = sregs->idt.limit;
10327 dt.address = sregs->idt.base;
10328 static_call(kvm_x86_set_idt)(vcpu, &dt);
10329 dt.size = sregs->gdt.limit;
10330 dt.address = sregs->gdt.base;
10331 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10333 vcpu->arch.cr2 = sregs->cr2;
10334 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10335 vcpu->arch.cr3 = sregs->cr3;
10336 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10338 kvm_set_cr8(vcpu, sregs->cr8);
10340 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10341 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10343 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10344 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10345 vcpu->arch.cr0 = sregs->cr0;
10347 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10348 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10350 if (update_pdptrs) {
10351 idx = srcu_read_lock(&vcpu->kvm->srcu);
10352 if (is_pae_paging(vcpu)) {
10353 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10354 *mmu_reset_needed = 1;
10356 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10359 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10360 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10361 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10362 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10363 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10364 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10366 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10367 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10369 update_cr8_intercept(vcpu);
10371 /* Older userspace won't unhalt the vcpu on reset. */
10372 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10373 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10374 !is_protmode(vcpu))
10375 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10380 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10382 int pending_vec, max_bits;
10383 int mmu_reset_needed = 0;
10384 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10389 if (mmu_reset_needed)
10390 kvm_mmu_reset_context(vcpu);
10392 max_bits = KVM_NR_INTERRUPTS;
10393 pending_vec = find_first_bit(
10394 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10396 if (pending_vec < max_bits) {
10397 kvm_queue_interrupt(vcpu, pending_vec, false);
10398 pr_debug("Set back pending irq %d\n", pending_vec);
10399 kvm_make_request(KVM_REQ_EVENT, vcpu);
10404 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10406 int mmu_reset_needed = 0;
10407 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10408 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10409 !(sregs2->efer & EFER_LMA);
10412 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10415 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10418 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10419 &mmu_reset_needed, !valid_pdptrs);
10423 if (valid_pdptrs) {
10424 for (i = 0; i < 4 ; i++)
10425 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10427 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10428 mmu_reset_needed = 1;
10429 vcpu->arch.pdptrs_from_userspace = true;
10431 if (mmu_reset_needed)
10432 kvm_mmu_reset_context(vcpu);
10436 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10437 struct kvm_sregs *sregs)
10442 ret = __set_sregs(vcpu, sregs);
10447 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10448 struct kvm_guest_debug *dbg)
10450 unsigned long rflags;
10453 if (vcpu->arch.guest_state_protected)
10458 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10460 if (vcpu->arch.exception.pending)
10462 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10463 kvm_queue_exception(vcpu, DB_VECTOR);
10465 kvm_queue_exception(vcpu, BP_VECTOR);
10469 * Read rflags as long as potentially injected trace flags are still
10472 rflags = kvm_get_rflags(vcpu);
10474 vcpu->guest_debug = dbg->control;
10475 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10476 vcpu->guest_debug = 0;
10478 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10479 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10480 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10481 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10483 for (i = 0; i < KVM_NR_DB_REGS; i++)
10484 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10486 kvm_update_dr7(vcpu);
10488 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10489 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10492 * Trigger an rflags update that will inject or remove the trace
10495 kvm_set_rflags(vcpu, rflags);
10497 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10507 * Translate a guest virtual address to a guest physical address.
10509 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10510 struct kvm_translation *tr)
10512 unsigned long vaddr = tr->linear_address;
10518 idx = srcu_read_lock(&vcpu->kvm->srcu);
10519 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10520 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10521 tr->physical_address = gpa;
10522 tr->valid = gpa != UNMAPPED_GVA;
10530 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10532 struct fxregs_state *fxsave;
10534 if (!vcpu->arch.guest_fpu)
10539 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10540 memcpy(fpu->fpr, fxsave->st_space, 128);
10541 fpu->fcw = fxsave->cwd;
10542 fpu->fsw = fxsave->swd;
10543 fpu->ftwx = fxsave->twd;
10544 fpu->last_opcode = fxsave->fop;
10545 fpu->last_ip = fxsave->rip;
10546 fpu->last_dp = fxsave->rdp;
10547 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10553 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10555 struct fxregs_state *fxsave;
10557 if (!vcpu->arch.guest_fpu)
10562 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10564 memcpy(fxsave->st_space, fpu->fpr, 128);
10565 fxsave->cwd = fpu->fcw;
10566 fxsave->swd = fpu->fsw;
10567 fxsave->twd = fpu->ftwx;
10568 fxsave->fop = fpu->last_opcode;
10569 fxsave->rip = fpu->last_ip;
10570 fxsave->rdp = fpu->last_dp;
10571 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10577 static void store_regs(struct kvm_vcpu *vcpu)
10579 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10581 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10582 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10584 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10585 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10587 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10588 kvm_vcpu_ioctl_x86_get_vcpu_events(
10589 vcpu, &vcpu->run->s.regs.events);
10592 static int sync_regs(struct kvm_vcpu *vcpu)
10594 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10595 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10596 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10598 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10599 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10601 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10603 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10604 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10605 vcpu, &vcpu->run->s.regs.events))
10607 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10613 static void fx_init(struct kvm_vcpu *vcpu)
10615 if (!vcpu->arch.guest_fpu)
10618 fpstate_init(&vcpu->arch.guest_fpu->state);
10619 if (boot_cpu_has(X86_FEATURE_XSAVES))
10620 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10621 host_xcr0 | XSTATE_COMPACTION_ENABLED;
10624 * Ensure guest xcr0 is valid for loading
10626 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10628 vcpu->arch.cr0 |= X86_CR0_ET;
10631 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10633 if (vcpu->arch.guest_fpu) {
10634 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10635 vcpu->arch.guest_fpu = NULL;
10638 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10640 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10642 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10643 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10644 "guest TSC will not be reliable\n");
10649 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10654 vcpu->arch.last_vmentry_cpu = -1;
10656 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10657 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10659 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10661 r = kvm_mmu_create(vcpu);
10665 if (irqchip_in_kernel(vcpu->kvm)) {
10666 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10668 goto fail_mmu_destroy;
10669 if (kvm_apicv_activated(vcpu->kvm))
10670 vcpu->arch.apicv_active = true;
10672 static_branch_inc(&kvm_has_noapic_vcpu);
10676 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10678 goto fail_free_lapic;
10679 vcpu->arch.pio_data = page_address(page);
10681 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10682 GFP_KERNEL_ACCOUNT);
10683 if (!vcpu->arch.mce_banks)
10684 goto fail_free_pio_data;
10685 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10687 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10688 GFP_KERNEL_ACCOUNT))
10689 goto fail_free_mce_banks;
10691 if (!alloc_emulate_ctxt(vcpu))
10692 goto free_wbinvd_dirty_mask;
10694 vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10695 GFP_KERNEL_ACCOUNT);
10696 if (!vcpu->arch.user_fpu) {
10697 pr_err("kvm: failed to allocate userspace's fpu\n");
10698 goto free_emulate_ctxt;
10701 vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10702 GFP_KERNEL_ACCOUNT);
10703 if (!vcpu->arch.guest_fpu) {
10704 pr_err("kvm: failed to allocate vcpu's fpu\n");
10705 goto free_user_fpu;
10709 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10710 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10712 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10714 kvm_async_pf_hash_reset(vcpu);
10715 kvm_pmu_init(vcpu);
10717 vcpu->arch.pending_external_vector = -1;
10718 vcpu->arch.preempted_in_kernel = false;
10720 #if IS_ENABLED(CONFIG_HYPERV)
10721 vcpu->arch.hv_root_tdp = INVALID_PAGE;
10724 r = static_call(kvm_x86_vcpu_create)(vcpu);
10726 goto free_guest_fpu;
10728 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10729 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10730 kvm_vcpu_mtrr_init(vcpu);
10732 kvm_set_tsc_khz(vcpu, max_tsc_khz);
10733 kvm_vcpu_reset(vcpu, false);
10734 kvm_init_mmu(vcpu);
10739 kvm_free_guest_fpu(vcpu);
10741 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10743 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10744 free_wbinvd_dirty_mask:
10745 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10746 fail_free_mce_banks:
10747 kfree(vcpu->arch.mce_banks);
10748 fail_free_pio_data:
10749 free_page((unsigned long)vcpu->arch.pio_data);
10751 kvm_free_lapic(vcpu);
10753 kvm_mmu_destroy(vcpu);
10757 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10759 struct kvm *kvm = vcpu->kvm;
10761 if (mutex_lock_killable(&vcpu->mutex))
10764 kvm_synchronize_tsc(vcpu, 0);
10767 /* poll control enabled by default */
10768 vcpu->arch.msr_kvm_poll_control = 1;
10770 mutex_unlock(&vcpu->mutex);
10772 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10773 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10774 KVMCLOCK_SYNC_PERIOD);
10777 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10779 struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10782 kvm_release_pfn(cache->pfn, cache->dirty, cache);
10784 kvmclock_reset(vcpu);
10786 static_call(kvm_x86_vcpu_free)(vcpu);
10788 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10789 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10790 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10791 kvm_free_guest_fpu(vcpu);
10793 kvm_hv_vcpu_uninit(vcpu);
10794 kvm_pmu_destroy(vcpu);
10795 kfree(vcpu->arch.mce_banks);
10796 kvm_free_lapic(vcpu);
10797 idx = srcu_read_lock(&vcpu->kvm->srcu);
10798 kvm_mmu_destroy(vcpu);
10799 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10800 free_page((unsigned long)vcpu->arch.pio_data);
10801 kvfree(vcpu->arch.cpuid_entries);
10802 if (!lapic_in_kernel(vcpu))
10803 static_branch_dec(&kvm_has_noapic_vcpu);
10806 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10808 unsigned long old_cr0 = kvm_read_cr0(vcpu);
10809 unsigned long new_cr0;
10812 kvm_lapic_reset(vcpu, init_event);
10814 vcpu->arch.hflags = 0;
10816 vcpu->arch.smi_pending = 0;
10817 vcpu->arch.smi_count = 0;
10818 atomic_set(&vcpu->arch.nmi_queued, 0);
10819 vcpu->arch.nmi_pending = 0;
10820 vcpu->arch.nmi_injected = false;
10821 kvm_clear_interrupt_queue(vcpu);
10822 kvm_clear_exception_queue(vcpu);
10824 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10825 kvm_update_dr0123(vcpu);
10826 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10827 vcpu->arch.dr7 = DR7_FIXED_1;
10828 kvm_update_dr7(vcpu);
10830 vcpu->arch.cr2 = 0;
10832 kvm_make_request(KVM_REQ_EVENT, vcpu);
10833 vcpu->arch.apf.msr_en_val = 0;
10834 vcpu->arch.apf.msr_int_val = 0;
10835 vcpu->arch.st.msr_val = 0;
10837 kvmclock_reset(vcpu);
10839 kvm_clear_async_pf_completion_queue(vcpu);
10840 kvm_async_pf_hash_reset(vcpu);
10841 vcpu->arch.apf.halted = false;
10843 if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10844 void *mpx_state_buffer;
10847 * To avoid have the INIT path from kvm_apic_has_events() that be
10848 * called with loaded FPU and does not let userspace fix the state.
10851 kvm_put_guest_fpu(vcpu);
10852 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10854 if (mpx_state_buffer)
10855 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10856 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10858 if (mpx_state_buffer)
10859 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10861 kvm_load_guest_fpu(vcpu);
10865 kvm_pmu_reset(vcpu);
10866 vcpu->arch.smbase = 0x30000;
10868 vcpu->arch.msr_misc_features_enables = 0;
10870 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10873 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10874 vcpu->arch.regs_avail = ~0;
10875 vcpu->arch.regs_dirty = ~0;
10878 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10879 * if no CPUID match is found. Note, it's impossible to get a match at
10880 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10881 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10882 * But, go through the motions in case that's ever remedied.
10885 if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
10887 kvm_rdx_write(vcpu, eax);
10889 vcpu->arch.ia32_xss = 0;
10891 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10893 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
10894 kvm_rip_write(vcpu, 0xfff0);
10897 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
10898 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10899 * (or qualify) that with a footnote stating that CD/NW are preserved.
10901 new_cr0 = X86_CR0_ET;
10903 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
10905 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
10907 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
10908 static_call(kvm_x86_set_cr4)(vcpu, 0);
10909 static_call(kvm_x86_set_efer)(vcpu, 0);
10910 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10913 * Reset the MMU context if paging was enabled prior to INIT (which is
10914 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
10915 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10916 * checked because it is unconditionally cleared on INIT and all other
10917 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10918 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10920 if (old_cr0 & X86_CR0_PG)
10921 kvm_mmu_reset_context(vcpu);
10924 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
10925 * APM states the TLBs are untouched by INIT, but it also states that
10926 * the TLBs are flushed on "External initialization of the processor."
10927 * Flush the guest TLB regardless of vendor, there is no meaningful
10928 * benefit in relying on the guest to flush the TLB immediately after
10929 * INIT. A spurious TLB flush is benign and likely negligible from a
10930 * performance perspective.
10933 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
10935 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
10937 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10939 struct kvm_segment cs;
10941 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10942 cs.selector = vector << 8;
10943 cs.base = vector << 12;
10944 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10945 kvm_rip_write(vcpu, 0);
10947 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10949 int kvm_arch_hardware_enable(void)
10952 struct kvm_vcpu *vcpu;
10957 bool stable, backwards_tsc = false;
10959 kvm_user_return_msr_cpu_online();
10960 ret = static_call(kvm_x86_hardware_enable)();
10964 local_tsc = rdtsc();
10965 stable = !kvm_check_tsc_unstable();
10966 list_for_each_entry(kvm, &vm_list, vm_list) {
10967 kvm_for_each_vcpu(i, vcpu, kvm) {
10968 if (!stable && vcpu->cpu == smp_processor_id())
10969 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10970 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10971 backwards_tsc = true;
10972 if (vcpu->arch.last_host_tsc > max_tsc)
10973 max_tsc = vcpu->arch.last_host_tsc;
10979 * Sometimes, even reliable TSCs go backwards. This happens on
10980 * platforms that reset TSC during suspend or hibernate actions, but
10981 * maintain synchronization. We must compensate. Fortunately, we can
10982 * detect that condition here, which happens early in CPU bringup,
10983 * before any KVM threads can be running. Unfortunately, we can't
10984 * bring the TSCs fully up to date with real time, as we aren't yet far
10985 * enough into CPU bringup that we know how much real time has actually
10986 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10987 * variables that haven't been updated yet.
10989 * So we simply find the maximum observed TSC above, then record the
10990 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10991 * the adjustment will be applied. Note that we accumulate
10992 * adjustments, in case multiple suspend cycles happen before some VCPU
10993 * gets a chance to run again. In the event that no KVM threads get a
10994 * chance to run, we will miss the entire elapsed period, as we'll have
10995 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10996 * loose cycle time. This isn't too big a deal, since the loss will be
10997 * uniform across all VCPUs (not to mention the scenario is extremely
10998 * unlikely). It is possible that a second hibernate recovery happens
10999 * much faster than a first, causing the observed TSC here to be
11000 * smaller; this would require additional padding adjustment, which is
11001 * why we set last_host_tsc to the local tsc observed here.
11003 * N.B. - this code below runs only on platforms with reliable TSC,
11004 * as that is the only way backwards_tsc is set above. Also note
11005 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11006 * have the same delta_cyc adjustment applied if backwards_tsc
11007 * is detected. Note further, this adjustment is only done once,
11008 * as we reset last_host_tsc on all VCPUs to stop this from being
11009 * called multiple times (one for each physical CPU bringup).
11011 * Platforms with unreliable TSCs don't have to deal with this, they
11012 * will be compensated by the logic in vcpu_load, which sets the TSC to
11013 * catchup mode. This will catchup all VCPUs to real time, but cannot
11014 * guarantee that they stay in perfect synchronization.
11016 if (backwards_tsc) {
11017 u64 delta_cyc = max_tsc - local_tsc;
11018 list_for_each_entry(kvm, &vm_list, vm_list) {
11019 kvm->arch.backwards_tsc_observed = true;
11020 kvm_for_each_vcpu(i, vcpu, kvm) {
11021 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11022 vcpu->arch.last_host_tsc = local_tsc;
11023 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11027 * We have to disable TSC offset matching.. if you were
11028 * booting a VM while issuing an S4 host suspend....
11029 * you may have some problem. Solving this issue is
11030 * left as an exercise to the reader.
11032 kvm->arch.last_tsc_nsec = 0;
11033 kvm->arch.last_tsc_write = 0;
11040 void kvm_arch_hardware_disable(void)
11042 static_call(kvm_x86_hardware_disable)();
11043 drop_user_return_notifiers();
11046 int kvm_arch_hardware_setup(void *opaque)
11048 struct kvm_x86_init_ops *ops = opaque;
11051 rdmsrl_safe(MSR_EFER, &host_efer);
11053 if (boot_cpu_has(X86_FEATURE_XSAVES))
11054 rdmsrl(MSR_IA32_XSS, host_xss);
11056 r = ops->hardware_setup();
11060 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11061 kvm_ops_static_call_update();
11063 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11066 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11067 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11068 #undef __kvm_cpu_cap_has
11070 if (kvm_has_tsc_control) {
11072 * Make sure the user can only configure tsc_khz values that
11073 * fit into a signed integer.
11074 * A min value is not calculated because it will always
11075 * be 1 on all machines.
11077 u64 max = min(0x7fffffffULL,
11078 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11079 kvm_max_guest_tsc_khz = max;
11081 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11084 kvm_init_msr_list();
11088 void kvm_arch_hardware_unsetup(void)
11090 static_call(kvm_x86_hardware_unsetup)();
11093 int kvm_arch_check_processor_compat(void *opaque)
11095 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11096 struct kvm_x86_init_ops *ops = opaque;
11098 WARN_ON(!irqs_disabled());
11100 if (__cr4_reserved_bits(cpu_has, c) !=
11101 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11104 return ops->check_processor_compatibility();
11107 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11109 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11111 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11113 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11115 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11118 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11119 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11121 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11123 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11125 vcpu->arch.l1tf_flush_l1d = true;
11126 if (pmu->version && unlikely(pmu->event_count)) {
11127 pmu->need_cleanup = true;
11128 kvm_make_request(KVM_REQ_PMU, vcpu);
11130 static_call(kvm_x86_sched_in)(vcpu, cpu);
11133 void kvm_arch_free_vm(struct kvm *kvm)
11135 kfree(to_kvm_hv(kvm)->hv_pa_pg);
11140 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11145 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11146 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11147 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11148 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11149 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11150 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11152 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11153 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11154 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11155 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11156 &kvm->arch.irq_sources_bitmap);
11158 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11159 mutex_init(&kvm->arch.apic_map_lock);
11160 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11162 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11163 pvclock_update_vm_gtod_copy(kvm);
11165 kvm->arch.guest_can_read_msr_platform_info = true;
11167 #if IS_ENABLED(CONFIG_HYPERV)
11168 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11169 kvm->arch.hv_root_tdp = INVALID_PAGE;
11172 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11173 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11175 kvm_apicv_init(kvm);
11176 kvm_hv_init_vm(kvm);
11177 kvm_page_track_init(kvm);
11178 kvm_mmu_init_vm(kvm);
11179 kvm_xen_init_vm(kvm);
11181 return static_call(kvm_x86_vm_init)(kvm);
11184 int kvm_arch_post_init_vm(struct kvm *kvm)
11186 return kvm_mmu_post_init_vm(kvm);
11189 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11192 kvm_mmu_unload(vcpu);
11196 static void kvm_free_vcpus(struct kvm *kvm)
11199 struct kvm_vcpu *vcpu;
11202 * Unpin any mmu pages first.
11204 kvm_for_each_vcpu(i, vcpu, kvm) {
11205 kvm_clear_async_pf_completion_queue(vcpu);
11206 kvm_unload_vcpu_mmu(vcpu);
11208 kvm_for_each_vcpu(i, vcpu, kvm)
11209 kvm_vcpu_destroy(vcpu);
11211 mutex_lock(&kvm->lock);
11212 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11213 kvm->vcpus[i] = NULL;
11215 atomic_set(&kvm->online_vcpus, 0);
11216 mutex_unlock(&kvm->lock);
11219 void kvm_arch_sync_events(struct kvm *kvm)
11221 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11222 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11226 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11229 * __x86_set_memory_region: Setup KVM internal memory slot
11231 * @kvm: the kvm pointer to the VM.
11232 * @id: the slot ID to setup.
11233 * @gpa: the GPA to install the slot (unused when @size == 0).
11234 * @size: the size of the slot. Set to zero to uninstall a slot.
11236 * This function helps to setup a KVM internal memory slot. Specify
11237 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11238 * slot. The return code can be one of the following:
11240 * HVA: on success (uninstall will return a bogus HVA)
11243 * The caller should always use IS_ERR() to check the return value
11244 * before use. Note, the KVM internal memory slots are guaranteed to
11245 * remain valid and unchanged until the VM is destroyed, i.e., the
11246 * GPA->HVA translation will not change. However, the HVA is a user
11247 * address, i.e. its accessibility is not guaranteed, and must be
11248 * accessed via __copy_{to,from}_user().
11250 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11254 unsigned long hva, old_npages;
11255 struct kvm_memslots *slots = kvm_memslots(kvm);
11256 struct kvm_memory_slot *slot;
11258 /* Called with kvm->slots_lock held. */
11259 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11260 return ERR_PTR_USR(-EINVAL);
11262 slot = id_to_memslot(slots, id);
11264 if (slot && slot->npages)
11265 return ERR_PTR_USR(-EEXIST);
11268 * MAP_SHARED to prevent internal slot pages from being moved
11271 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11272 MAP_SHARED | MAP_ANONYMOUS, 0);
11273 if (IS_ERR((void *)hva))
11274 return (void __user *)hva;
11276 if (!slot || !slot->npages)
11279 old_npages = slot->npages;
11280 hva = slot->userspace_addr;
11283 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11284 struct kvm_userspace_memory_region m;
11286 m.slot = id | (i << 16);
11288 m.guest_phys_addr = gpa;
11289 m.userspace_addr = hva;
11290 m.memory_size = size;
11291 r = __kvm_set_memory_region(kvm, &m);
11293 return ERR_PTR_USR(r);
11297 vm_munmap(hva, old_npages * PAGE_SIZE);
11299 return (void __user *)hva;
11301 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11303 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11305 kvm_mmu_pre_destroy_vm(kvm);
11308 void kvm_arch_destroy_vm(struct kvm *kvm)
11310 if (current->mm == kvm->mm) {
11312 * Free memory regions allocated on behalf of userspace,
11313 * unless the the memory map has changed due to process exit
11316 mutex_lock(&kvm->slots_lock);
11317 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11319 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11321 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11322 mutex_unlock(&kvm->slots_lock);
11324 static_call_cond(kvm_x86_vm_destroy)(kvm);
11325 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11326 kvm_pic_destroy(kvm);
11327 kvm_ioapic_destroy(kvm);
11328 kvm_free_vcpus(kvm);
11329 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11330 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11331 kvm_mmu_uninit_vm(kvm);
11332 kvm_page_track_cleanup(kvm);
11333 kvm_xen_destroy_vm(kvm);
11334 kvm_hv_destroy_vm(kvm);
11337 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11341 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11342 kvfree(slot->arch.rmap[i]);
11343 slot->arch.rmap[i] = NULL;
11347 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11351 memslot_rmap_free(slot);
11353 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11354 kvfree(slot->arch.lpage_info[i - 1]);
11355 slot->arch.lpage_info[i - 1] = NULL;
11358 kvm_page_track_free_memslot(slot);
11361 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11362 unsigned long npages)
11364 const int sz = sizeof(*slot->arch.rmap[0]);
11367 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11369 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11371 WARN_ON(slot->arch.rmap[i]);
11373 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11374 if (!slot->arch.rmap[i]) {
11375 memslot_rmap_free(slot);
11383 int alloc_all_memslots_rmaps(struct kvm *kvm)
11385 struct kvm_memslots *slots;
11386 struct kvm_memory_slot *slot;
11390 * Check if memslots alreday have rmaps early before acquiring
11391 * the slots_arch_lock below.
11393 if (kvm_memslots_have_rmaps(kvm))
11396 mutex_lock(&kvm->slots_arch_lock);
11399 * Read memslots_have_rmaps again, under the slots arch lock,
11400 * before allocating the rmaps
11402 if (kvm_memslots_have_rmaps(kvm)) {
11403 mutex_unlock(&kvm->slots_arch_lock);
11407 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11408 slots = __kvm_memslots(kvm, i);
11409 kvm_for_each_memslot(slot, slots) {
11410 r = memslot_rmap_alloc(slot, slot->npages);
11412 mutex_unlock(&kvm->slots_arch_lock);
11419 * Ensure that memslots_have_rmaps becomes true strictly after
11420 * all the rmap pointers are set.
11422 smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11423 mutex_unlock(&kvm->slots_arch_lock);
11427 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11428 struct kvm_memory_slot *slot,
11429 unsigned long npages)
11434 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11435 * old arrays will be freed by __kvm_set_memory_region() if installing
11436 * the new memslot is successful.
11438 memset(&slot->arch, 0, sizeof(slot->arch));
11440 if (kvm_memslots_have_rmaps(kvm)) {
11441 r = memslot_rmap_alloc(slot, npages);
11446 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11447 struct kvm_lpage_info *linfo;
11448 unsigned long ugfn;
11452 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11454 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11458 slot->arch.lpage_info[i - 1] = linfo;
11460 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11461 linfo[0].disallow_lpage = 1;
11462 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11463 linfo[lpages - 1].disallow_lpage = 1;
11464 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11466 * If the gfn and userspace address are not aligned wrt each
11467 * other, disable large page support for this slot.
11469 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11472 for (j = 0; j < lpages; ++j)
11473 linfo[j].disallow_lpage = 1;
11477 if (kvm_page_track_create_memslot(slot, npages))
11483 memslot_rmap_free(slot);
11485 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11486 kvfree(slot->arch.lpage_info[i - 1]);
11487 slot->arch.lpage_info[i - 1] = NULL;
11492 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11494 struct kvm_vcpu *vcpu;
11498 * memslots->generation has been incremented.
11499 * mmio generation may have reached its maximum value.
11501 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11503 /* Force re-initialization of steal_time cache */
11504 kvm_for_each_vcpu(i, vcpu, kvm)
11505 kvm_vcpu_kick(vcpu);
11508 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11509 struct kvm_memory_slot *memslot,
11510 const struct kvm_userspace_memory_region *mem,
11511 enum kvm_mr_change change)
11513 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11514 return kvm_alloc_memslot_metadata(kvm, memslot,
11515 mem->memory_size >> PAGE_SHIFT);
11520 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11522 struct kvm_arch *ka = &kvm->arch;
11524 if (!kvm_x86_ops.cpu_dirty_log_size)
11527 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11528 (!enable && --ka->cpu_dirty_logging_count == 0))
11529 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11531 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11534 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11535 struct kvm_memory_slot *old,
11536 const struct kvm_memory_slot *new,
11537 enum kvm_mr_change change)
11539 bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11542 * Update CPU dirty logging if dirty logging is being toggled. This
11543 * applies to all operations.
11545 if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11546 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11549 * Nothing more to do for RO slots (which can't be dirtied and can't be
11550 * made writable) or CREATE/MOVE/DELETE of a slot.
11552 * For a memslot with dirty logging disabled:
11553 * CREATE: No dirty mappings will already exist.
11554 * MOVE/DELETE: The old mappings will already have been cleaned up by
11555 * kvm_arch_flush_shadow_memslot()
11557 * For a memslot with dirty logging enabled:
11558 * CREATE: No shadow pages exist, thus nothing to write-protect
11559 * and no dirty bits to clear.
11560 * MOVE/DELETE: The old mappings will already have been cleaned up by
11561 * kvm_arch_flush_shadow_memslot().
11563 if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11567 * READONLY and non-flags changes were filtered out above, and the only
11568 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11569 * logging isn't being toggled on or off.
11571 if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11574 if (!log_dirty_pages) {
11576 * Dirty logging tracks sptes in 4k granularity, meaning that
11577 * large sptes have to be split. If live migration succeeds,
11578 * the guest in the source machine will be destroyed and large
11579 * sptes will be created in the destination. However, if the
11580 * guest continues to run in the source machine (for example if
11581 * live migration fails), small sptes will remain around and
11582 * cause bad performance.
11584 * Scan sptes if dirty logging has been stopped, dropping those
11585 * which can be collapsed into a single large-page spte. Later
11586 * page faults will create the large-page sptes.
11588 kvm_mmu_zap_collapsible_sptes(kvm, new);
11591 * Initially-all-set does not require write protecting any page,
11592 * because they're all assumed to be dirty.
11594 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11597 if (kvm_x86_ops.cpu_dirty_log_size) {
11598 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11599 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11601 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11606 void kvm_arch_commit_memory_region(struct kvm *kvm,
11607 const struct kvm_userspace_memory_region *mem,
11608 struct kvm_memory_slot *old,
11609 const struct kvm_memory_slot *new,
11610 enum kvm_mr_change change)
11612 if (!kvm->arch.n_requested_mmu_pages)
11613 kvm_mmu_change_mmu_pages(kvm,
11614 kvm_mmu_calculate_default_mmu_pages(kvm));
11616 kvm_mmu_slot_apply_flags(kvm, old, new, change);
11618 /* Free the arrays associated with the old memslot. */
11619 if (change == KVM_MR_MOVE)
11620 kvm_arch_free_memslot(kvm, old);
11623 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11625 kvm_mmu_zap_all(kvm);
11628 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11629 struct kvm_memory_slot *slot)
11631 kvm_page_track_flush_slot(kvm, slot);
11634 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11636 return (is_guest_mode(vcpu) &&
11637 kvm_x86_ops.guest_apic_has_interrupt &&
11638 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11641 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11643 if (!list_empty_careful(&vcpu->async_pf.done))
11646 if (kvm_apic_has_events(vcpu))
11649 if (vcpu->arch.pv.pv_unhalted)
11652 if (vcpu->arch.exception.pending)
11655 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11656 (vcpu->arch.nmi_pending &&
11657 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11660 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11661 (vcpu->arch.smi_pending &&
11662 static_call(kvm_x86_smi_allowed)(vcpu, false)))
11665 if (kvm_arch_interrupt_allowed(vcpu) &&
11666 (kvm_cpu_has_interrupt(vcpu) ||
11667 kvm_guest_apic_has_interrupt(vcpu)))
11670 if (kvm_hv_has_stimer_pending(vcpu))
11673 if (is_guest_mode(vcpu) &&
11674 kvm_x86_ops.nested_ops->hv_timer_pending &&
11675 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11681 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11683 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11686 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11688 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11694 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11696 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11699 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11700 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11701 kvm_test_request(KVM_REQ_EVENT, vcpu))
11704 return kvm_arch_dy_has_pending_interrupt(vcpu);
11707 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11709 if (vcpu->arch.guest_state_protected)
11712 return vcpu->arch.preempted_in_kernel;
11715 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11717 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11720 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11722 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11725 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11727 /* Can't read the RIP when guest state is protected, just return 0 */
11728 if (vcpu->arch.guest_state_protected)
11731 if (is_64_bit_mode(vcpu))
11732 return kvm_rip_read(vcpu);
11733 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11734 kvm_rip_read(vcpu));
11736 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11738 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11740 return kvm_get_linear_rip(vcpu) == linear_rip;
11742 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11744 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11746 unsigned long rflags;
11748 rflags = static_call(kvm_x86_get_rflags)(vcpu);
11749 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11750 rflags &= ~X86_EFLAGS_TF;
11753 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11755 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11757 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11758 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11759 rflags |= X86_EFLAGS_TF;
11760 static_call(kvm_x86_set_rflags)(vcpu, rflags);
11763 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11765 __kvm_set_rflags(vcpu, rflags);
11766 kvm_make_request(KVM_REQ_EVENT, vcpu);
11768 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11770 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11774 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11778 r = kvm_mmu_reload(vcpu);
11782 if (!vcpu->arch.mmu->direct_map &&
11783 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11786 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11789 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11791 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11793 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11796 static inline u32 kvm_async_pf_next_probe(u32 key)
11798 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11801 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11803 u32 key = kvm_async_pf_hash_fn(gfn);
11805 while (vcpu->arch.apf.gfns[key] != ~0)
11806 key = kvm_async_pf_next_probe(key);
11808 vcpu->arch.apf.gfns[key] = gfn;
11811 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11814 u32 key = kvm_async_pf_hash_fn(gfn);
11816 for (i = 0; i < ASYNC_PF_PER_VCPU &&
11817 (vcpu->arch.apf.gfns[key] != gfn &&
11818 vcpu->arch.apf.gfns[key] != ~0); i++)
11819 key = kvm_async_pf_next_probe(key);
11824 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11826 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11829 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11833 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11835 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11839 vcpu->arch.apf.gfns[i] = ~0;
11841 j = kvm_async_pf_next_probe(j);
11842 if (vcpu->arch.apf.gfns[j] == ~0)
11844 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11846 * k lies cyclically in ]i,j]
11848 * |....j i.k.| or |.k..j i...|
11850 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11851 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11856 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11858 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11860 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11864 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11866 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11868 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11869 &token, offset, sizeof(token));
11872 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11874 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11877 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11878 &val, offset, sizeof(val)))
11884 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11886 if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11889 if (!kvm_pv_async_pf_enabled(vcpu) ||
11890 (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11896 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11898 if (unlikely(!lapic_in_kernel(vcpu) ||
11899 kvm_event_needs_reinjection(vcpu) ||
11900 vcpu->arch.exception.pending))
11903 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11907 * If interrupts are off we cannot even use an artificial
11910 return kvm_arch_interrupt_allowed(vcpu);
11913 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11914 struct kvm_async_pf *work)
11916 struct x86_exception fault;
11918 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11919 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11921 if (kvm_can_deliver_async_pf(vcpu) &&
11922 !apf_put_user_notpresent(vcpu)) {
11923 fault.vector = PF_VECTOR;
11924 fault.error_code_valid = true;
11925 fault.error_code = 0;
11926 fault.nested_page_fault = false;
11927 fault.address = work->arch.token;
11928 fault.async_page_fault = true;
11929 kvm_inject_page_fault(vcpu, &fault);
11933 * It is not possible to deliver a paravirtualized asynchronous
11934 * page fault, but putting the guest in an artificial halt state
11935 * can be beneficial nevertheless: if an interrupt arrives, we
11936 * can deliver it timely and perhaps the guest will schedule
11937 * another process. When the instruction that triggered a page
11938 * fault is retried, hopefully the page will be ready in the host.
11940 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11945 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11946 struct kvm_async_pf *work)
11948 struct kvm_lapic_irq irq = {
11949 .delivery_mode = APIC_DM_FIXED,
11950 .vector = vcpu->arch.apf.vec
11953 if (work->wakeup_all)
11954 work->arch.token = ~0; /* broadcast wakeup */
11956 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11957 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11959 if ((work->wakeup_all || work->notpresent_injected) &&
11960 kvm_pv_async_pf_enabled(vcpu) &&
11961 !apf_put_user_ready(vcpu, work->arch.token)) {
11962 vcpu->arch.apf.pageready_pending = true;
11963 kvm_apic_set_irq(vcpu, &irq, NULL);
11966 vcpu->arch.apf.halted = false;
11967 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11970 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11972 kvm_make_request(KVM_REQ_APF_READY, vcpu);
11973 if (!vcpu->arch.apf.pageready_pending)
11974 kvm_vcpu_kick(vcpu);
11977 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11979 if (!kvm_pv_async_pf_enabled(vcpu))
11982 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11985 void kvm_arch_start_assignment(struct kvm *kvm)
11987 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11988 static_call_cond(kvm_x86_start_assignment)(kvm);
11990 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11992 void kvm_arch_end_assignment(struct kvm *kvm)
11994 atomic_dec(&kvm->arch.assigned_device_count);
11996 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11998 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12000 return atomic_read(&kvm->arch.assigned_device_count);
12002 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12004 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12006 atomic_inc(&kvm->arch.noncoherent_dma_count);
12008 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12010 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12012 atomic_dec(&kvm->arch.noncoherent_dma_count);
12014 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12016 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12018 return atomic_read(&kvm->arch.noncoherent_dma_count);
12020 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12022 bool kvm_arch_has_irq_bypass(void)
12027 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12028 struct irq_bypass_producer *prod)
12030 struct kvm_kernel_irqfd *irqfd =
12031 container_of(cons, struct kvm_kernel_irqfd, consumer);
12034 irqfd->producer = prod;
12035 kvm_arch_start_assignment(irqfd->kvm);
12036 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12037 prod->irq, irqfd->gsi, 1);
12040 kvm_arch_end_assignment(irqfd->kvm);
12045 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12046 struct irq_bypass_producer *prod)
12049 struct kvm_kernel_irqfd *irqfd =
12050 container_of(cons, struct kvm_kernel_irqfd, consumer);
12052 WARN_ON(irqfd->producer != prod);
12053 irqfd->producer = NULL;
12056 * When producer of consumer is unregistered, we change back to
12057 * remapped mode, so we can re-use the current implementation
12058 * when the irq is masked/disabled or the consumer side (KVM
12059 * int this case doesn't want to receive the interrupts.
12061 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12063 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12064 " fails: %d\n", irqfd->consumer.token, ret);
12066 kvm_arch_end_assignment(irqfd->kvm);
12069 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12070 uint32_t guest_irq, bool set)
12072 return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12075 bool kvm_vector_hashing_enabled(void)
12077 return vector_hashing;
12080 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12082 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12084 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12087 int kvm_spec_ctrl_test_value(u64 value)
12090 * test that setting IA32_SPEC_CTRL to given value
12091 * is allowed by the host processor
12095 unsigned long flags;
12098 local_irq_save(flags);
12100 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12102 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12105 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12107 local_irq_restore(flags);
12111 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12113 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12115 struct x86_exception fault;
12116 u32 access = error_code &
12117 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12119 if (!(error_code & PFERR_PRESENT_MASK) ||
12120 vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12122 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12123 * tables probably do not match the TLB. Just proceed
12124 * with the error code that the processor gave.
12126 fault.vector = PF_VECTOR;
12127 fault.error_code_valid = true;
12128 fault.error_code = error_code;
12129 fault.nested_page_fault = false;
12130 fault.address = gva;
12132 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12134 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12137 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12138 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12139 * indicates whether exit to userspace is needed.
12141 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12142 struct x86_exception *e)
12144 if (r == X86EMUL_PROPAGATE_FAULT) {
12145 kvm_inject_emulated_page_fault(vcpu, e);
12150 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12151 * while handling a VMX instruction KVM could've handled the request
12152 * correctly by exiting to userspace and performing I/O but there
12153 * doesn't seem to be a real use-case behind such requests, just return
12154 * KVM_EXIT_INTERNAL_ERROR for now.
12156 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12157 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12158 vcpu->run->internal.ndata = 0;
12162 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12164 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12167 struct x86_exception e;
12174 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12175 if (r != X86EMUL_CONTINUE)
12176 return kvm_handle_memory_failure(vcpu, r, &e);
12178 if (operand.pcid >> 12 != 0) {
12179 kvm_inject_gp(vcpu, 0);
12183 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12186 case INVPCID_TYPE_INDIV_ADDR:
12187 if ((!pcid_enabled && (operand.pcid != 0)) ||
12188 is_noncanonical_address(operand.gla, vcpu)) {
12189 kvm_inject_gp(vcpu, 0);
12192 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12193 return kvm_skip_emulated_instruction(vcpu);
12195 case INVPCID_TYPE_SINGLE_CTXT:
12196 if (!pcid_enabled && (operand.pcid != 0)) {
12197 kvm_inject_gp(vcpu, 0);
12201 kvm_invalidate_pcid(vcpu, operand.pcid);
12202 return kvm_skip_emulated_instruction(vcpu);
12204 case INVPCID_TYPE_ALL_NON_GLOBAL:
12206 * Currently, KVM doesn't mark global entries in the shadow
12207 * page tables, so a non-global flush just degenerates to a
12208 * global flush. If needed, we could optimize this later by
12209 * keeping track of global entries in shadow page tables.
12213 case INVPCID_TYPE_ALL_INCL_GLOBAL:
12214 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12215 return kvm_skip_emulated_instruction(vcpu);
12218 BUG(); /* We have already checked above that type <= 3 */
12221 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12223 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12225 struct kvm_run *run = vcpu->run;
12226 struct kvm_mmio_fragment *frag;
12229 BUG_ON(!vcpu->mmio_needed);
12231 /* Complete previous fragment */
12232 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12233 len = min(8u, frag->len);
12234 if (!vcpu->mmio_is_write)
12235 memcpy(frag->data, run->mmio.data, len);
12237 if (frag->len <= 8) {
12238 /* Switch to the next fragment. */
12240 vcpu->mmio_cur_fragment++;
12242 /* Go forward to the next mmio piece. */
12248 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12249 vcpu->mmio_needed = 0;
12251 // VMG change, at this point, we're always done
12252 // RIP has already been advanced
12256 // More MMIO is needed
12257 run->mmio.phys_addr = frag->gpa;
12258 run->mmio.len = min(8u, frag->len);
12259 run->mmio.is_write = vcpu->mmio_is_write;
12260 if (run->mmio.is_write)
12261 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12262 run->exit_reason = KVM_EXIT_MMIO;
12264 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12269 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12273 struct kvm_mmio_fragment *frag;
12278 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12279 if (handled == bytes)
12286 /*TODO: Check if need to increment number of frags */
12287 frag = vcpu->mmio_fragments;
12288 vcpu->mmio_nr_fragments = 1;
12293 vcpu->mmio_needed = 1;
12294 vcpu->mmio_cur_fragment = 0;
12296 vcpu->run->mmio.phys_addr = gpa;
12297 vcpu->run->mmio.len = min(8u, frag->len);
12298 vcpu->run->mmio.is_write = 1;
12299 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12300 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12302 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12306 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12308 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12312 struct kvm_mmio_fragment *frag;
12317 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12318 if (handled == bytes)
12325 /*TODO: Check if need to increment number of frags */
12326 frag = vcpu->mmio_fragments;
12327 vcpu->mmio_nr_fragments = 1;
12332 vcpu->mmio_needed = 1;
12333 vcpu->mmio_cur_fragment = 0;
12335 vcpu->run->mmio.phys_addr = gpa;
12336 vcpu->run->mmio.len = min(8u, frag->len);
12337 vcpu->run->mmio.is_write = 0;
12338 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12340 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12344 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12346 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12348 memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12349 vcpu->arch.pio.count * vcpu->arch.pio.size);
12350 vcpu->arch.pio.count = 0;
12355 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12356 unsigned int port, void *data, unsigned int count)
12360 ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12365 vcpu->arch.pio.count = 0;
12370 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12371 unsigned int port, void *data, unsigned int count)
12375 ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12378 vcpu->arch.pio.count = 0;
12380 vcpu->arch.guest_ins_data = data;
12381 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12387 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12388 unsigned int port, void *data, unsigned int count,
12391 return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12392 : kvm_sev_es_outs(vcpu, size, port, data, count);
12394 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12396 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12397 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12398 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12399 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12400 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12401 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);