arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105
 106 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 107 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 108
 109 static bool __read_mostly ignore_msrs = 0;
 110 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 111
 112 static bool __read_mostly report_ignored_msrs = true;
 113 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 114
 115 unsigned int min_timer_period_us = 500;
 116 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool __read_mostly kvmclock_periodic_sync = true;
 119 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 120
 121 bool __read_mostly kvm_has_tsc_control;
 122 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 123 u32  __read_mostly kvm_max_guest_tsc_khz;
 124 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 125 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 126 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 127 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 128 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 129 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 131
 132 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 133 static u32 __read_mostly tsc_tolerance_ppm = 250;
 134 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 135
 136 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 137 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 138 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 139
 140 static bool __read_mostly vector_hashing = true;
 141 module_param(vector_hashing, bool, S_IRUGO);
 142
 143 #define KVM_NR_SHARED_MSRS 16
 144
 145 struct kvm_shared_msrs_global {
 146         int nr;
 147         u32 msrs[KVM_NR_SHARED_MSRS];
 148 };
 149
 150 struct kvm_shared_msrs {
 151         struct user_return_notifier urn;
 152         bool registered;
 153         struct kvm_shared_msr_values {
 154                 u64 host;
 155                 u64 curr;
 156         } values[KVM_NR_SHARED_MSRS];
 157 };
 158
 159 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 160 static struct kvm_shared_msrs __percpu *shared_msrs;
 161
 162 struct kvm_stats_debugfs_item debugfs_entries[] = {
 163         { "pf_fixed", VCPU_STAT(pf_fixed) },
 164         { "pf_guest", VCPU_STAT(pf_guest) },
 165         { "tlb_flush", VCPU_STAT(tlb_flush) },
 166         { "invlpg", VCPU_STAT(invlpg) },
 167         { "exits", VCPU_STAT(exits) },
 168         { "io_exits", VCPU_STAT(io_exits) },
 169         { "mmio_exits", VCPU_STAT(mmio_exits) },
 170         { "signal_exits", VCPU_STAT(signal_exits) },
 171         { "irq_window", VCPU_STAT(irq_window_exits) },
 172         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 173         { "halt_exits", VCPU_STAT(halt_exits) },
 174         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 175         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 176         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 177         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 178         { "hypercalls", VCPU_STAT(hypercalls) },
 179         { "request_irq", VCPU_STAT(request_irq_exits) },
 180         { "irq_exits", VCPU_STAT(irq_exits) },
 181         { "host_state_reload", VCPU_STAT(host_state_reload) },
 182         { "fpu_reload", VCPU_STAT(fpu_reload) },
 183         { "insn_emulation", VCPU_STAT(insn_emulation) },
 184         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 185         { "irq_injections", VCPU_STAT(irq_injections) },
 186         { "nmi_injections", VCPU_STAT(nmi_injections) },
 187         { "req_event", VCPU_STAT(req_event) },
 188         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 189         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 190         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 191         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 192         { "mmu_flooded", VM_STAT(mmu_flooded) },
 193         { "mmu_recycled", VM_STAT(mmu_recycled) },
 194         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 195         { "mmu_unsync", VM_STAT(mmu_unsync) },
 196         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 197         { "largepages", VM_STAT(lpages) },
 198         { "max_mmu_page_hash_collisions",
 199                 VM_STAT(max_mmu_page_hash_collisions) },
 200         { NULL }
 201 };
 202
 203 u64 __read_mostly host_xcr0;
 204
 205 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 206
 207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 208 {
 209         int i;
 210         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 211                 vcpu->arch.apf.gfns[i] = ~0;
 212 }
 213
 214 static void kvm_on_user_return(struct user_return_notifier *urn)
 215 {
 216         unsigned slot;
 217         struct kvm_shared_msrs *locals
 218                 = container_of(urn, struct kvm_shared_msrs, urn);
 219         struct kvm_shared_msr_values *values;
 220         unsigned long flags;
 221
 222         /*
 223          * Disabling irqs at this point since the following code could be
 224          * interrupted and executed through kvm_arch_hardware_disable()
 225          */
 226         local_irq_save(flags);
 227         if (locals->registered) {
 228                 locals->registered = false;
 229                 user_return_notifier_unregister(urn);
 230         }
 231         local_irq_restore(flags);
 232         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 233                 values = &locals->values[slot];
 234                 if (values->host != values->curr) {
 235                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 236                         values->curr = values->host;
 237                 }
 238         }
 239 }
 240
 241 static void shared_msr_update(unsigned slot, u32 msr)
 242 {
 243         u64 value;
 244         unsigned int cpu = smp_processor_id();
 245         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 246
 247         /* only read, and nobody should modify it at this time,
 248          * so don't need lock */
 249         if (slot >= shared_msrs_global.nr) {
 250                 printk(KERN_ERR "kvm: invalid MSR slot!");
 251                 return;
 252         }
 253         rdmsrl_safe(msr, &value);
 254         smsr->values[slot].host = value;
 255         smsr->values[slot].curr = value;
 256 }
 257
 258 void kvm_define_shared_msr(unsigned slot, u32 msr)
 259 {
 260         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 261         shared_msrs_global.msrs[slot] = msr;
 262         if (slot >= shared_msrs_global.nr)
 263                 shared_msrs_global.nr = slot + 1;
 264 }
 265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 266
 267 static void kvm_shared_msr_cpu_online(void)
 268 {
 269         unsigned i;
 270
 271         for (i = 0; i < shared_msrs_global.nr; ++i)
 272                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 273 }
 274
 275 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 276 {
 277         unsigned int cpu = smp_processor_id();
 278         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 279         int err;
 280
 281         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 282                 return 0;
 283         smsr->values[slot].curr = value;
 284         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 285         if (err)
 286                 return 1;
 287
 288         if (!smsr->registered) {
 289                 smsr->urn.on_user_return = kvm_on_user_return;
 290                 user_return_notifier_register(&smsr->urn);
 291                 smsr->registered = true;
 292         }
 293         return 0;
 294 }
 295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 296
 297 static void drop_user_return_notifiers(void)
 298 {
 299         unsigned int cpu = smp_processor_id();
 300         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 301
 302         if (smsr->registered)
 303                 kvm_on_user_return(&smsr->urn);
 304 }
 305
 306 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 307 {
 308         return vcpu->arch.apic_base;
 309 }
 310 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 311
 312 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 313 {
 314         u64 old_state = vcpu->arch.apic_base &
 315                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 316         u64 new_state = msr_info->data &
 317                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 318         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 319                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 320
 321         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 322                 return 1;
 323         if (!msr_info->host_initiated &&
 324             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 325               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 326              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 327               old_state == 0)))
 328                 return 1;
 329
 330         kvm_lapic_set_base(vcpu, msr_info->data);
 331         return 0;
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 334
 335 asmlinkage __visible void kvm_spurious_fault(void)
 336 {
 337         /* Fault while not rebooting.  We want the trace. */
 338         BUG();
 339 }
 340 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 341
 342 #define EXCPT_BENIGN            0
 343 #define EXCPT_CONTRIBUTORY      1
 344 #define EXCPT_PF                2
 345
 346 static int exception_class(int vector)
 347 {
 348         switch (vector) {
 349         case PF_VECTOR:
 350                 return EXCPT_PF;
 351         case DE_VECTOR:
 352         case TS_VECTOR:
 353         case NP_VECTOR:
 354         case SS_VECTOR:
 355         case GP_VECTOR:
 356                 return EXCPT_CONTRIBUTORY;
 357         default:
 358                 break;
 359         }
 360         return EXCPT_BENIGN;
 361 }
 362
 363 #define EXCPT_FAULT             0
 364 #define EXCPT_TRAP              1
 365 #define EXCPT_ABORT             2
 366 #define EXCPT_INTERRUPT         3
 367
 368 static int exception_type(int vector)
 369 {
 370         unsigned int mask;
 371
 372         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 373                 return EXCPT_INTERRUPT;
 374
 375         mask = 1 << vector;
 376
 377         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 378         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 379                 return EXCPT_TRAP;
 380
 381         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 382                 return EXCPT_ABORT;
 383
 384         /* Reserved exceptions will result in fault */
 385         return EXCPT_FAULT;
 386 }
 387
 388 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 389                 unsigned nr, bool has_error, u32 error_code,
 390                 bool reinject)
 391 {
 392         u32 prev_nr;
 393         int class1, class2;
 394
 395         kvm_make_request(KVM_REQ_EVENT, vcpu);
 396
 397         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 398         queue:
 399                 if (has_error && !is_protmode(vcpu))
 400                         has_error = false;
 401                 if (reinject) {
 402                         /*
 403                          * On vmentry, vcpu->arch.exception.pending is only
 404                          * true if an event injection was blocked by
 405                          * nested_run_pending.  In that case, however,
 406                          * vcpu_enter_guest requests an immediate exit,
 407                          * and the guest shouldn't proceed far enough to
 408                          * need reinjection.
 409                          */
 410                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 411                         vcpu->arch.exception.injected = true;
 412                 } else {
 413                         vcpu->arch.exception.pending = true;
 414                         vcpu->arch.exception.injected = false;
 415                 }
 416                 vcpu->arch.exception.has_error_code = has_error;
 417                 vcpu->arch.exception.nr = nr;
 418                 vcpu->arch.exception.error_code = error_code;
 419                 return;
 420         }
 421
 422         /* to check exception */
 423         prev_nr = vcpu->arch.exception.nr;
 424         if (prev_nr == DF_VECTOR) {
 425                 /* triple fault -> shutdown */
 426                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 427                 return;
 428         }
 429         class1 = exception_class(prev_nr);
 430         class2 = exception_class(nr);
 431         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 432                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 433                 /*
 434                  * Generate double fault per SDM Table 5-5.  Set
 435                  * exception.pending = true so that the double fault
 436                  * can trigger a nested vmexit.
 437                  */
 438                 vcpu->arch.exception.pending = true;
 439                 vcpu->arch.exception.injected = false;
 440                 vcpu->arch.exception.has_error_code = true;
 441                 vcpu->arch.exception.nr = DF_VECTOR;
 442                 vcpu->arch.exception.error_code = 0;
 443         } else
 444                 /* replace previous exception with a new one in a hope
 445                    that instruction re-execution will regenerate lost
 446                    exception */
 447                 goto queue;
 448 }
 449
 450 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 451 {
 452         kvm_multiple_exception(vcpu, nr, false, 0, false);
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 455
 456 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 457 {
 458         kvm_multiple_exception(vcpu, nr, false, 0, true);
 459 }
 460 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 461
 462 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 463 {
 464         if (err)
 465                 kvm_inject_gp(vcpu, 0);
 466         else
 467                 return kvm_skip_emulated_instruction(vcpu);
 468
 469         return 1;
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 472
 473 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 474 {
 475         ++vcpu->stat.pf_guest;
 476         vcpu->arch.exception.nested_apf =
 477                 is_guest_mode(vcpu) && fault->async_page_fault;
 478         if (vcpu->arch.exception.nested_apf)
 479                 vcpu->arch.apf.nested_apf_token = fault->address;
 480         else
 481                 vcpu->arch.cr2 = fault->address;
 482         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 485
 486 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 487 {
 488         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 489                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 490         else
 491                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 492
 493         return fault->nested_page_fault;
 494 }
 495
 496 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 497 {
 498         atomic_inc(&vcpu->arch.nmi_queued);
 499         kvm_make_request(KVM_REQ_NMI, vcpu);
 500 }
 501 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 502
 503 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 504 {
 505         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 506 }
 507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 508
 509 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 510 {
 511         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 512 }
 513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 514
 515 /*
 516  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 517  * a #GP and return false.
 518  */
 519 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 520 {
 521         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 522                 return true;
 523         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 524         return false;
 525 }
 526 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 527
 528 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 529 {
 530         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 531                 return true;
 532
 533         kvm_queue_exception(vcpu, UD_VECTOR);
 534         return false;
 535 }
 536 EXPORT_SYMBOL_GPL(kvm_require_dr);
 537
 538 /*
 539  * This function will be used to read from the physical memory of the currently
 540  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 541  * can read from guest physical or from the guest's guest physical memory.
 542  */
 543 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 544                             gfn_t ngfn, void *data, int offset, int len,
 545                             u32 access)
 546 {
 547         struct x86_exception exception;
 548         gfn_t real_gfn;
 549         gpa_t ngpa;
 550
 551         ngpa     = gfn_to_gpa(ngfn);
 552         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 553         if (real_gfn == UNMAPPED_GVA)
 554                 return -EFAULT;
 555
 556         real_gfn = gpa_to_gfn(real_gfn);
 557
 558         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 559 }
 560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 561
 562 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 563                                void *data, int offset, int len, u32 access)
 564 {
 565         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 566                                        data, offset, len, access);
 567 }
 568
 569 /*
 570  * Load the pae pdptrs.  Return true is they are all valid.
 571  */
 572 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 573 {
 574         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 575         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 576         int i;
 577         int ret;
 578         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 579
 580         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 581                                       offset * sizeof(u64), sizeof(pdpte),
 582                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 583         if (ret < 0) {
 584                 ret = 0;
 585                 goto out;
 586         }
 587         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 588                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 589                     (pdpte[i] &
 590                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 591                         ret = 0;
 592                         goto out;
 593                 }
 594         }
 595         ret = 1;
 596
 597         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 598         __set_bit(VCPU_EXREG_PDPTR,
 599                   (unsigned long *)&vcpu->arch.regs_avail);
 600         __set_bit(VCPU_EXREG_PDPTR,
 601                   (unsigned long *)&vcpu->arch.regs_dirty);
 602 out:
 603
 604         return ret;
 605 }
 606 EXPORT_SYMBOL_GPL(load_pdptrs);
 607
 608 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 609 {
 610         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 611         bool changed = true;
 612         int offset;
 613         gfn_t gfn;
 614         int r;
 615
 616         if (is_long_mode(vcpu) || !is_pae(vcpu))
 617                 return false;
 618
 619         if (!test_bit(VCPU_EXREG_PDPTR,
 620                       (unsigned long *)&vcpu->arch.regs_avail))
 621                 return true;
 622
 623         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 624         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 625         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 626                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 627         if (r < 0)
 628                 goto out;
 629         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 630 out:
 631
 632         return changed;
 633 }
 634 EXPORT_SYMBOL_GPL(pdptrs_changed);
 635
 636 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 637 {
 638         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 639         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 640
 641         cr0 |= X86_CR0_ET;
 642
 643 #ifdef CONFIG_X86_64
 644         if (cr0 & 0xffffffff00000000UL)
 645                 return 1;
 646 #endif
 647
 648         cr0 &= ~CR0_RESERVED_BITS;
 649
 650         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 651                 return 1;
 652
 653         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 654                 return 1;
 655
 656         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 657 #ifdef CONFIG_X86_64
 658                 if ((vcpu->arch.efer & EFER_LME)) {
 659                         int cs_db, cs_l;
 660
 661                         if (!is_pae(vcpu))
 662                                 return 1;
 663                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 664                         if (cs_l)
 665                                 return 1;
 666                 } else
 667 #endif
 668                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 669                                                  kvm_read_cr3(vcpu)))
 670                         return 1;
 671         }
 672
 673         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 674                 return 1;
 675
 676         kvm_x86_ops->set_cr0(vcpu, cr0);
 677
 678         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 679                 kvm_clear_async_pf_completion_queue(vcpu);
 680                 kvm_async_pf_hash_reset(vcpu);
 681         }
 682
 683         if ((cr0 ^ old_cr0) & update_bits)
 684                 kvm_mmu_reset_context(vcpu);
 685
 686         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 687             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 688             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 689                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 690
 691         return 0;
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 694
 695 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 696 {
 697         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_lmsw);
 700
 701 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 702 {
 703         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 704                         !vcpu->guest_xcr0_loaded) {
 705                 /* kvm_set_xcr() also depends on this */
 706                 if (vcpu->arch.xcr0 != host_xcr0)
 707                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 708                 vcpu->guest_xcr0_loaded = 1;
 709         }
 710 }
 711
 712 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 713 {
 714         if (vcpu->guest_xcr0_loaded) {
 715                 if (vcpu->arch.xcr0 != host_xcr0)
 716                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 717                 vcpu->guest_xcr0_loaded = 0;
 718         }
 719 }
 720
 721 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 722 {
 723         u64 xcr0 = xcr;
 724         u64 old_xcr0 = vcpu->arch.xcr0;
 725         u64 valid_bits;
 726
 727         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 728         if (index != XCR_XFEATURE_ENABLED_MASK)
 729                 return 1;
 730         if (!(xcr0 & XFEATURE_MASK_FP))
 731                 return 1;
 732         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 733                 return 1;
 734
 735         /*
 736          * Do not allow the guest to set bits that we do not support
 737          * saving.  However, xcr0 bit 0 is always set, even if the
 738          * emulated CPU does not support XSAVE (see fx_init).
 739          */
 740         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 741         if (xcr0 & ~valid_bits)
 742                 return 1;
 743
 744         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 745             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 746                 return 1;
 747
 748         if (xcr0 & XFEATURE_MASK_AVX512) {
 749                 if (!(xcr0 & XFEATURE_MASK_YMM))
 750                         return 1;
 751                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 752                         return 1;
 753         }
 754         vcpu->arch.xcr0 = xcr0;
 755
 756         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 757                 kvm_update_cpuid(vcpu);
 758         return 0;
 759 }
 760
 761 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 762 {
 763         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 764             __kvm_set_xcr(vcpu, index, xcr)) {
 765                 kvm_inject_gp(vcpu, 0);
 766                 return 1;
 767         }
 768         return 0;
 769 }
 770 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 771
 772 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 773 {
 774         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 775         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 776                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 777
 778         if (cr4 & CR4_RESERVED_BITS)
 779                 return 1;
 780
 781         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 782                 return 1;
 783
 784         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 785                 return 1;
 786
 787         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 788                 return 1;
 789
 790         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 791                 return 1;
 792
 793         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 794                 return 1;
 795
 796         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 797                 return 1;
 798
 799         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 800                 return 1;
 801
 802         if (is_long_mode(vcpu)) {
 803                 if (!(cr4 & X86_CR4_PAE))
 804                         return 1;
 805         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 806                    && ((cr4 ^ old_cr4) & pdptr_bits)
 807                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 808                                    kvm_read_cr3(vcpu)))
 809                 return 1;
 810
 811         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 812                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 813                         return 1;
 814
 815                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 816                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 817                         return 1;
 818         }
 819
 820         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 821                 return 1;
 822
 823         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 824             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 825                 kvm_mmu_reset_context(vcpu);
 826
 827         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 828                 kvm_update_cpuid(vcpu);
 829
 830         return 0;
 831 }
 832 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 833
 834 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 835 {
 836 #ifdef CONFIG_X86_64
 837         cr3 &= ~CR3_PCID_INVD;
 838 #endif
 839
 840         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 841                 kvm_mmu_sync_roots(vcpu);
 842                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 843                 return 0;
 844         }
 845
 846         if (is_long_mode(vcpu) &&
 847             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 848                 return 1;
 849         else if (is_pae(vcpu) && is_paging(vcpu) &&
 850                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 851                 return 1;
 852
 853         vcpu->arch.cr3 = cr3;
 854         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 855         kvm_mmu_new_cr3(vcpu);
 856         return 0;
 857 }
 858 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 859
 860 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 861 {
 862         if (cr8 & CR8_RESERVED_BITS)
 863                 return 1;
 864         if (lapic_in_kernel(vcpu))
 865                 kvm_lapic_set_tpr(vcpu, cr8);
 866         else
 867                 vcpu->arch.cr8 = cr8;
 868         return 0;
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 871
 872 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 873 {
 874         if (lapic_in_kernel(vcpu))
 875                 return kvm_lapic_get_cr8(vcpu);
 876         else
 877                 return vcpu->arch.cr8;
 878 }
 879 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 880
 881 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 882 {
 883         int i;
 884
 885         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 886                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 887                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 888                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 889         }
 890 }
 891
 892 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 893 {
 894         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 895                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 896 }
 897
 898 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 899 {
 900         unsigned long dr7;
 901
 902         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 903                 dr7 = vcpu->arch.guest_debug_dr7;
 904         else
 905                 dr7 = vcpu->arch.dr7;
 906         kvm_x86_ops->set_dr7(vcpu, dr7);
 907         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 908         if (dr7 & DR7_BP_EN_MASK)
 909                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 910 }
 911
 912 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 913 {
 914         u64 fixed = DR6_FIXED_1;
 915
 916         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 917                 fixed |= DR6_RTM;
 918         return fixed;
 919 }
 920
 921 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 922 {
 923         switch (dr) {
 924         case 0 ... 3:
 925                 vcpu->arch.db[dr] = val;
 926                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 927                         vcpu->arch.eff_db[dr] = val;
 928                 break;
 929         case 4:
 930                 /* fall through */
 931         case 6:
 932                 if (val & 0xffffffff00000000ULL)
 933                         return -1; /* #GP */
 934                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 935                 kvm_update_dr6(vcpu);
 936                 break;
 937         case 5:
 938                 /* fall through */
 939         default: /* 7 */
 940                 if (val & 0xffffffff00000000ULL)
 941                         return -1; /* #GP */
 942                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 943                 kvm_update_dr7(vcpu);
 944                 break;
 945         }
 946
 947         return 0;
 948 }
 949
 950 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 951 {
 952         if (__kvm_set_dr(vcpu, dr, val)) {
 953                 kvm_inject_gp(vcpu, 0);
 954                 return 1;
 955         }
 956         return 0;
 957 }
 958 EXPORT_SYMBOL_GPL(kvm_set_dr);
 959
 960 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 961 {
 962         switch (dr) {
 963         case 0 ... 3:
 964                 *val = vcpu->arch.db[dr];
 965                 break;
 966         case 4:
 967                 /* fall through */
 968         case 6:
 969                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 970                         *val = vcpu->arch.dr6;
 971                 else
 972                         *val = kvm_x86_ops->get_dr6(vcpu);
 973                 break;
 974         case 5:
 975                 /* fall through */
 976         default: /* 7 */
 977                 *val = vcpu->arch.dr7;
 978                 break;
 979         }
 980         return 0;
 981 }
 982 EXPORT_SYMBOL_GPL(kvm_get_dr);
 983
 984 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 985 {
 986         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 987         u64 data;
 988         int err;
 989
 990         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 991         if (err)
 992                 return err;
 993         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 994         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 995         return err;
 996 }
 997 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 998
 999 /*
1000  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1001  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1002  *
1003  * This list is modified at module load time to reflect the
1004  * capabilities of the host cpu. This capabilities test skips MSRs that are
1005  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1006  * may depend on host virtualization features rather than host cpu features.
1007  */
1008
1009 static u32 msrs_to_save[] = {
1010         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1011         MSR_STAR,
1012 #ifdef CONFIG_X86_64
1013         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1014 #endif
1015         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1016         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1017         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1018 };
1019
1020 static unsigned num_msrs_to_save;
1021
1022 static u32 emulated_msrs[] = {
1023         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1024         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1025         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1026         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1027         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1028         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1029         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1030         HV_X64_MSR_RESET,
1031         HV_X64_MSR_VP_INDEX,
1032         HV_X64_MSR_VP_RUNTIME,
1033         HV_X64_MSR_SCONTROL,
1034         HV_X64_MSR_STIMER0_CONFIG,
1035         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1036         MSR_KVM_PV_EOI_EN,
1037
1038         MSR_IA32_TSC_ADJUST,
1039         MSR_IA32_TSCDEADLINE,
1040         MSR_IA32_MISC_ENABLE,
1041         MSR_IA32_MCG_STATUS,
1042         MSR_IA32_MCG_CTL,
1043         MSR_IA32_MCG_EXT_CTL,
1044         MSR_IA32_SMBASE,
1045         MSR_SMI_COUNT,
1046         MSR_PLATFORM_INFO,
1047         MSR_MISC_FEATURES_ENABLES,
1048 };
1049
1050 static unsigned num_emulated_msrs;
1051
1052 /*
1053  * List of msr numbers which are used to expose MSR-based features that
1054  * can be used by a hypervisor to validate requested CPU features.
1055  */
1056 static u32 msr_based_features[] = {
1057         MSR_F10H_DECFG,
1058         MSR_IA32_UCODE_REV,
1059 };
1060
1061 static unsigned int num_msr_based_features;
1062
1063 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1064 {
1065         switch (msr->index) {
1066         case MSR_IA32_UCODE_REV:
1067                 rdmsrl(msr->index, msr->data);
1068                 break;
1069         default:
1070                 if (kvm_x86_ops->get_msr_feature(msr))
1071                         return 1;
1072         }
1073         return 0;
1074 }
1075
1076 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1077 {
1078         struct kvm_msr_entry msr;
1079         int r;
1080
1081         msr.index = index;
1082         r = kvm_get_msr_feature(&msr);
1083         if (r)
1084                 return r;
1085
1086         *data = msr.data;
1087
1088         return 0;
1089 }
1090
1091 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1092 {
1093         if (efer & efer_reserved_bits)
1094                 return false;
1095
1096         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1097                         return false;
1098
1099         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1100                         return false;
1101
1102         return true;
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1105
1106 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1107 {
1108         u64 old_efer = vcpu->arch.efer;
1109
1110         if (!kvm_valid_efer(vcpu, efer))
1111                 return 1;
1112
1113         if (is_paging(vcpu)
1114             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1115                 return 1;
1116
1117         efer &= ~EFER_LMA;
1118         efer |= vcpu->arch.efer & EFER_LMA;
1119
1120         kvm_x86_ops->set_efer(vcpu, efer);
1121
1122         /* Update reserved bits */
1123         if ((efer ^ old_efer) & EFER_NX)
1124                 kvm_mmu_reset_context(vcpu);
1125
1126         return 0;
1127 }
1128
1129 void kvm_enable_efer_bits(u64 mask)
1130 {
1131        efer_reserved_bits &= ~mask;
1132 }
1133 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1134
1135 /*
1136  * Writes msr value into into the appropriate "register".
1137  * Returns 0 on success, non-0 otherwise.
1138  * Assumes vcpu_load() was already called.
1139  */
1140 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1141 {
1142         switch (msr->index) {
1143         case MSR_FS_BASE:
1144         case MSR_GS_BASE:
1145         case MSR_KERNEL_GS_BASE:
1146         case MSR_CSTAR:
1147         case MSR_LSTAR:
1148                 if (is_noncanonical_address(msr->data, vcpu))
1149                         return 1;
1150                 break;
1151         case MSR_IA32_SYSENTER_EIP:
1152         case MSR_IA32_SYSENTER_ESP:
1153                 /*
1154                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1155                  * non-canonical address is written on Intel but not on
1156                  * AMD (which ignores the top 32-bits, because it does
1157                  * not implement 64-bit SYSENTER).
1158                  *
1159                  * 64-bit code should hence be able to write a non-canonical
1160                  * value on AMD.  Making the address canonical ensures that
1161                  * vmentry does not fail on Intel after writing a non-canonical
1162                  * value, and that something deterministic happens if the guest
1163                  * invokes 64-bit SYSENTER.
1164                  */
1165                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1166         }
1167         return kvm_x86_ops->set_msr(vcpu, msr);
1168 }
1169 EXPORT_SYMBOL_GPL(kvm_set_msr);
1170
1171 /*
1172  * Adapt set_msr() to msr_io()'s calling convention
1173  */
1174 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1175 {
1176         struct msr_data msr;
1177         int r;
1178
1179         msr.index = index;
1180         msr.host_initiated = true;
1181         r = kvm_get_msr(vcpu, &msr);
1182         if (r)
1183                 return r;
1184
1185         *data = msr.data;
1186         return 0;
1187 }
1188
1189 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1190 {
1191         struct msr_data msr;
1192
1193         msr.data = *data;
1194         msr.index = index;
1195         msr.host_initiated = true;
1196         return kvm_set_msr(vcpu, &msr);
1197 }
1198
1199 #ifdef CONFIG_X86_64
1200 struct pvclock_gtod_data {
1201         seqcount_t      seq;
1202
1203         struct { /* extract of a clocksource struct */
1204                 int vclock_mode;
1205                 u64     cycle_last;
1206                 u64     mask;
1207                 u32     mult;
1208                 u32     shift;
1209         } clock;
1210
1211         u64             boot_ns;
1212         u64             nsec_base;
1213         u64             wall_time_sec;
1214 };
1215
1216 static struct pvclock_gtod_data pvclock_gtod_data;
1217
1218 static void update_pvclock_gtod(struct timekeeper *tk)
1219 {
1220         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1221         u64 boot_ns;
1222
1223         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1224
1225         write_seqcount_begin(&vdata->seq);
1226
1227         /* copy pvclock gtod data */
1228         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1229         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1230         vdata->clock.mask               = tk->tkr_mono.mask;
1231         vdata->clock.mult               = tk->tkr_mono.mult;
1232         vdata->clock.shift              = tk->tkr_mono.shift;
1233
1234         vdata->boot_ns                  = boot_ns;
1235         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1236
1237         vdata->wall_time_sec            = tk->xtime_sec;
1238
1239         write_seqcount_end(&vdata->seq);
1240 }
1241 #endif
1242
1243 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1244 {
1245         /*
1246          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1247          * vcpu_enter_guest.  This function is only called from
1248          * the physical CPU that is running vcpu.
1249          */
1250         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1251 }
1252
1253 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1254 {
1255         int version;
1256         int r;
1257         struct pvclock_wall_clock wc;
1258         struct timespec64 boot;
1259
1260         if (!wall_clock)
1261                 return;
1262
1263         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1264         if (r)
1265                 return;
1266
1267         if (version & 1)
1268                 ++version;  /* first time write, random junk */
1269
1270         ++version;
1271
1272         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1273                 return;
1274
1275         /*
1276          * The guest calculates current wall clock time by adding
1277          * system time (updated by kvm_guest_time_update below) to the
1278          * wall clock specified here.  guest system time equals host
1279          * system time for us, thus we must fill in host boot time here.
1280          */
1281         getboottime64(&boot);
1282
1283         if (kvm->arch.kvmclock_offset) {
1284                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1285                 boot = timespec64_sub(boot, ts);
1286         }
1287         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1288         wc.nsec = boot.tv_nsec;
1289         wc.version = version;
1290
1291         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1292
1293         version++;
1294         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1295 }
1296
1297 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1298 {
1299         do_shl32_div32(dividend, divisor);
1300         return dividend;
1301 }
1302
1303 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1304                                s8 *pshift, u32 *pmultiplier)
1305 {
1306         uint64_t scaled64;
1307         int32_t  shift = 0;
1308         uint64_t tps64;
1309         uint32_t tps32;
1310
1311         tps64 = base_hz;
1312         scaled64 = scaled_hz;
1313         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1314                 tps64 >>= 1;
1315                 shift--;
1316         }
1317
1318         tps32 = (uint32_t)tps64;
1319         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1320                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1321                         scaled64 >>= 1;
1322                 else
1323                         tps32 <<= 1;
1324                 shift++;
1325         }
1326
1327         *pshift = shift;
1328         *pmultiplier = div_frac(scaled64, tps32);
1329
1330         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1331                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1332 }
1333
1334 #ifdef CONFIG_X86_64
1335 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1336 #endif
1337
1338 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1339 static unsigned long max_tsc_khz;
1340
1341 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1342 {
1343         u64 v = (u64)khz * (1000000 + ppm);
1344         do_div(v, 1000000);
1345         return v;
1346 }
1347
1348 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1349 {
1350         u64 ratio;
1351
1352         /* Guest TSC same frequency as host TSC? */
1353         if (!scale) {
1354                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1355                 return 0;
1356         }
1357
1358         /* TSC scaling supported? */
1359         if (!kvm_has_tsc_control) {
1360                 if (user_tsc_khz > tsc_khz) {
1361                         vcpu->arch.tsc_catchup = 1;
1362                         vcpu->arch.tsc_always_catchup = 1;
1363                         return 0;
1364                 } else {
1365                         WARN(1, "user requested TSC rate below hardware speed\n");
1366                         return -1;
1367                 }
1368         }
1369
1370         /* TSC scaling required  - calculate ratio */
1371         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1372                                 user_tsc_khz, tsc_khz);
1373
1374         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1375                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1376                           user_tsc_khz);
1377                 return -1;
1378         }
1379
1380         vcpu->arch.tsc_scaling_ratio = ratio;
1381         return 0;
1382 }
1383
1384 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1385 {
1386         u32 thresh_lo, thresh_hi;
1387         int use_scaling = 0;
1388
1389         /* tsc_khz can be zero if TSC calibration fails */
1390         if (user_tsc_khz == 0) {
1391                 /* set tsc_scaling_ratio to a safe value */
1392                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1393                 return -1;
1394         }
1395
1396         /* Compute a scale to convert nanoseconds in TSC cycles */
1397         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1398                            &vcpu->arch.virtual_tsc_shift,
1399                            &vcpu->arch.virtual_tsc_mult);
1400         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1401
1402         /*
1403          * Compute the variation in TSC rate which is acceptable
1404          * within the range of tolerance and decide if the
1405          * rate being applied is within that bounds of the hardware
1406          * rate.  If so, no scaling or compensation need be done.
1407          */
1408         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1409         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1410         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1411                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1412                 use_scaling = 1;
1413         }
1414         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1415 }
1416
1417 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1418 {
1419         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1420                                       vcpu->arch.virtual_tsc_mult,
1421                                       vcpu->arch.virtual_tsc_shift);
1422         tsc += vcpu->arch.this_tsc_write;
1423         return tsc;
1424 }
1425
1426 static inline int gtod_is_based_on_tsc(int mode)
1427 {
1428         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1429 }
1430
1431 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1432 {
1433 #ifdef CONFIG_X86_64
1434         bool vcpus_matched;
1435         struct kvm_arch *ka = &vcpu->kvm->arch;
1436         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1437
1438         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1439                          atomic_read(&vcpu->kvm->online_vcpus));
1440
1441         /*
1442          * Once the masterclock is enabled, always perform request in
1443          * order to update it.
1444          *
1445          * In order to enable masterclock, the host clocksource must be TSC
1446          * and the vcpus need to have matched TSCs.  When that happens,
1447          * perform request to enable masterclock.
1448          */
1449         if (ka->use_master_clock ||
1450             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1451                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1452
1453         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1454                             atomic_read(&vcpu->kvm->online_vcpus),
1455                             ka->use_master_clock, gtod->clock.vclock_mode);
1456 #endif
1457 }
1458
1459 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1460 {
1461         u64 curr_offset = vcpu->arch.tsc_offset;
1462         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1463 }
1464
1465 /*
1466  * Multiply tsc by a fixed point number represented by ratio.
1467  *
1468  * The most significant 64-N bits (mult) of ratio represent the
1469  * integral part of the fixed point number; the remaining N bits
1470  * (frac) represent the fractional part, ie. ratio represents a fixed
1471  * point number (mult + frac * 2^(-N)).
1472  *
1473  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1474  */
1475 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1476 {
1477         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1478 }
1479
1480 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1481 {
1482         u64 _tsc = tsc;
1483         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1484
1485         if (ratio != kvm_default_tsc_scaling_ratio)
1486                 _tsc = __scale_tsc(ratio, tsc);
1487
1488         return _tsc;
1489 }
1490 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1491
1492 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1493 {
1494         u64 tsc;
1495
1496         tsc = kvm_scale_tsc(vcpu, rdtsc());
1497
1498         return target_tsc - tsc;
1499 }
1500
1501 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1502 {
1503         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1504 }
1505 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1506
1507 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1508 {
1509         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1510         vcpu->arch.tsc_offset = offset;
1511 }
1512
1513 static inline bool kvm_check_tsc_unstable(void)
1514 {
1515 #ifdef CONFIG_X86_64
1516         /*
1517          * TSC is marked unstable when we're running on Hyper-V,
1518          * 'TSC page' clocksource is good.
1519          */
1520         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1521                 return false;
1522 #endif
1523         return check_tsc_unstable();
1524 }
1525
1526 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1527 {
1528         struct kvm *kvm = vcpu->kvm;
1529         u64 offset, ns, elapsed;
1530         unsigned long flags;
1531         bool matched;
1532         bool already_matched;
1533         u64 data = msr->data;
1534         bool synchronizing = false;
1535
1536         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1537         offset = kvm_compute_tsc_offset(vcpu, data);
1538         ns = ktime_get_boot_ns();
1539         elapsed = ns - kvm->arch.last_tsc_nsec;
1540
1541         if (vcpu->arch.virtual_tsc_khz) {
1542                 if (data == 0 && msr->host_initiated) {
1543                         /*
1544                          * detection of vcpu initialization -- need to sync
1545                          * with other vCPUs. This particularly helps to keep
1546                          * kvm_clock stable after CPU hotplug
1547                          */
1548                         synchronizing = true;
1549                 } else {
1550                         u64 tsc_exp = kvm->arch.last_tsc_write +
1551                                                 nsec_to_cycles(vcpu, elapsed);
1552                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1553                         /*
1554                          * Special case: TSC write with a small delta (1 second)
1555                          * of virtual cycle time against real time is
1556                          * interpreted as an attempt to synchronize the CPU.
1557                          */
1558                         synchronizing = data < tsc_exp + tsc_hz &&
1559                                         data + tsc_hz > tsc_exp;
1560                 }
1561         }
1562
1563         /*
1564          * For a reliable TSC, we can match TSC offsets, and for an unstable
1565          * TSC, we add elapsed time in this computation.  We could let the
1566          * compensation code attempt to catch up if we fall behind, but
1567          * it's better to try to match offsets from the beginning.
1568          */
1569         if (synchronizing &&
1570             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1571                 if (!kvm_check_tsc_unstable()) {
1572                         offset = kvm->arch.cur_tsc_offset;
1573                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1574                 } else {
1575                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1576                         data += delta;
1577                         offset = kvm_compute_tsc_offset(vcpu, data);
1578                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1579                 }
1580                 matched = true;
1581                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1582         } else {
1583                 /*
1584                  * We split periods of matched TSC writes into generations.
1585                  * For each generation, we track the original measured
1586                  * nanosecond time, offset, and write, so if TSCs are in
1587                  * sync, we can match exact offset, and if not, we can match
1588                  * exact software computation in compute_guest_tsc()
1589                  *
1590                  * These values are tracked in kvm->arch.cur_xxx variables.
1591                  */
1592                 kvm->arch.cur_tsc_generation++;
1593                 kvm->arch.cur_tsc_nsec = ns;
1594                 kvm->arch.cur_tsc_write = data;
1595                 kvm->arch.cur_tsc_offset = offset;
1596                 matched = false;
1597                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1598                          kvm->arch.cur_tsc_generation, data);
1599         }
1600
1601         /*
1602          * We also track th most recent recorded KHZ, write and time to
1603          * allow the matching interval to be extended at each write.
1604          */
1605         kvm->arch.last_tsc_nsec = ns;
1606         kvm->arch.last_tsc_write = data;
1607         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1608
1609         vcpu->arch.last_guest_tsc = data;
1610
1611         /* Keep track of which generation this VCPU has synchronized to */
1612         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1613         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1614         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1615
1616         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1617                 update_ia32_tsc_adjust_msr(vcpu, offset);
1618
1619         kvm_vcpu_write_tsc_offset(vcpu, offset);
1620         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1621
1622         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1623         if (!matched) {
1624                 kvm->arch.nr_vcpus_matched_tsc = 0;
1625         } else if (!already_matched) {
1626                 kvm->arch.nr_vcpus_matched_tsc++;
1627         }
1628
1629         kvm_track_tsc_matching(vcpu);
1630         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1631 }
1632
1633 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1634
1635 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1636                                            s64 adjustment)
1637 {
1638         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1639 }
1640
1641 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1642 {
1643         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1644                 WARN_ON(adjustment < 0);
1645         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1646         adjust_tsc_offset_guest(vcpu, adjustment);
1647 }
1648
1649 #ifdef CONFIG_X86_64
1650
1651 static u64 read_tsc(void)
1652 {
1653         u64 ret = (u64)rdtsc_ordered();
1654         u64 last = pvclock_gtod_data.clock.cycle_last;
1655
1656         if (likely(ret >= last))
1657                 return ret;
1658
1659         /*
1660          * GCC likes to generate cmov here, but this branch is extremely
1661          * predictable (it's just a function of time and the likely is
1662          * very likely) and there's a data dependence, so force GCC
1663          * to generate a branch instead.  I don't barrier() because
1664          * we don't actually need a barrier, and if this function
1665          * ever gets inlined it will generate worse code.
1666          */
1667         asm volatile ("");
1668         return last;
1669 }
1670
1671 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1672 {
1673         long v;
1674         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1675         u64 tsc_pg_val;
1676
1677         switch (gtod->clock.vclock_mode) {
1678         case VCLOCK_HVCLOCK:
1679                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1680                                                   tsc_timestamp);
1681                 if (tsc_pg_val != U64_MAX) {
1682                         /* TSC page valid */
1683                         *mode = VCLOCK_HVCLOCK;
1684                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1685                                 gtod->clock.mask;
1686                 } else {
1687                         /* TSC page invalid */
1688                         *mode = VCLOCK_NONE;
1689                 }
1690                 break;
1691         case VCLOCK_TSC:
1692                 *mode = VCLOCK_TSC;
1693                 *tsc_timestamp = read_tsc();
1694                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1695                         gtod->clock.mask;
1696                 break;
1697         default:
1698                 *mode = VCLOCK_NONE;
1699         }
1700
1701         if (*mode == VCLOCK_NONE)
1702                 *tsc_timestamp = v = 0;
1703
1704         return v * gtod->clock.mult;
1705 }
1706
1707 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1708 {
1709         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1710         unsigned long seq;
1711         int mode;
1712         u64 ns;
1713
1714         do {
1715                 seq = read_seqcount_begin(&gtod->seq);
1716                 ns = gtod->nsec_base;
1717                 ns += vgettsc(tsc_timestamp, &mode);
1718                 ns >>= gtod->clock.shift;
1719                 ns += gtod->boot_ns;
1720         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1721         *t = ns;
1722
1723         return mode;
1724 }
1725
1726 static int do_realtime(struct timespec *ts, u64 *tsc_timestamp)
1727 {
1728         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1729         unsigned long seq;
1730         int mode;
1731         u64 ns;
1732
1733         do {
1734                 seq = read_seqcount_begin(&gtod->seq);
1735                 ts->tv_sec = gtod->wall_time_sec;
1736                 ns = gtod->nsec_base;
1737                 ns += vgettsc(tsc_timestamp, &mode);
1738                 ns >>= gtod->clock.shift;
1739         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1740
1741         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1742         ts->tv_nsec = ns;
1743
1744         return mode;
1745 }
1746
1747 /* returns true if host is using TSC based clocksource */
1748 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1749 {
1750         /* checked again under seqlock below */
1751         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1752                 return false;
1753
1754         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1755                                                       tsc_timestamp));
1756 }
1757
1758 /* returns true if host is using TSC based clocksource */
1759 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1760                                            u64 *tsc_timestamp)
1761 {
1762         /* checked again under seqlock below */
1763         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1764                 return false;
1765
1766         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1767 }
1768 #endif
1769
1770 /*
1771  *
1772  * Assuming a stable TSC across physical CPUS, and a stable TSC
1773  * across virtual CPUs, the following condition is possible.
1774  * Each numbered line represents an event visible to both
1775  * CPUs at the next numbered event.
1776  *
1777  * "timespecX" represents host monotonic time. "tscX" represents
1778  * RDTSC value.
1779  *
1780  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1781  *
1782  * 1.  read timespec0,tsc0
1783  * 2.                                   | timespec1 = timespec0 + N
1784  *                                      | tsc1 = tsc0 + M
1785  * 3. transition to guest               | transition to guest
1786  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1787  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1788  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1789  *
1790  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1791  *
1792  *      - ret0 < ret1
1793  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1794  *              ...
1795  *      - 0 < N - M => M < N
1796  *
1797  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1798  * always the case (the difference between two distinct xtime instances
1799  * might be smaller then the difference between corresponding TSC reads,
1800  * when updating guest vcpus pvclock areas).
1801  *
1802  * To avoid that problem, do not allow visibility of distinct
1803  * system_timestamp/tsc_timestamp values simultaneously: use a master
1804  * copy of host monotonic time values. Update that master copy
1805  * in lockstep.
1806  *
1807  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1808  *
1809  */
1810
1811 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1812 {
1813 #ifdef CONFIG_X86_64
1814         struct kvm_arch *ka = &kvm->arch;
1815         int vclock_mode;
1816         bool host_tsc_clocksource, vcpus_matched;
1817
1818         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1819                         atomic_read(&kvm->online_vcpus));
1820
1821         /*
1822          * If the host uses TSC clock, then passthrough TSC as stable
1823          * to the guest.
1824          */
1825         host_tsc_clocksource = kvm_get_time_and_clockread(
1826                                         &ka->master_kernel_ns,
1827                                         &ka->master_cycle_now);
1828
1829         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1830                                 && !ka->backwards_tsc_observed
1831                                 && !ka->boot_vcpu_runs_old_kvmclock;
1832
1833         if (ka->use_master_clock)
1834                 atomic_set(&kvm_guest_has_master_clock, 1);
1835
1836         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1837         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1838                                         vcpus_matched);
1839 #endif
1840 }
1841
1842 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1843 {
1844         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1845 }
1846
1847 static void kvm_gen_update_masterclock(struct kvm *kvm)
1848 {
1849 #ifdef CONFIG_X86_64
1850         int i;
1851         struct kvm_vcpu *vcpu;
1852         struct kvm_arch *ka = &kvm->arch;
1853
1854         spin_lock(&ka->pvclock_gtod_sync_lock);
1855         kvm_make_mclock_inprogress_request(kvm);
1856         /* no guest entries from this point */
1857         pvclock_update_vm_gtod_copy(kvm);
1858
1859         kvm_for_each_vcpu(i, vcpu, kvm)
1860                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1861
1862         /* guest entries allowed */
1863         kvm_for_each_vcpu(i, vcpu, kvm)
1864                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1865
1866         spin_unlock(&ka->pvclock_gtod_sync_lock);
1867 #endif
1868 }
1869
1870 u64 get_kvmclock_ns(struct kvm *kvm)
1871 {
1872         struct kvm_arch *ka = &kvm->arch;
1873         struct pvclock_vcpu_time_info hv_clock;
1874         u64 ret;
1875
1876         spin_lock(&ka->pvclock_gtod_sync_lock);
1877         if (!ka->use_master_clock) {
1878                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1879                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1880         }
1881
1882         hv_clock.tsc_timestamp = ka->master_cycle_now;
1883         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1884         spin_unlock(&ka->pvclock_gtod_sync_lock);
1885
1886         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1887         get_cpu();
1888
1889         if (__this_cpu_read(cpu_tsc_khz)) {
1890                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1891                                    &hv_clock.tsc_shift,
1892                                    &hv_clock.tsc_to_system_mul);
1893                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1894         } else
1895                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1896
1897         put_cpu();
1898
1899         return ret;
1900 }
1901
1902 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1903 {
1904         struct kvm_vcpu_arch *vcpu = &v->arch;
1905         struct pvclock_vcpu_time_info guest_hv_clock;
1906
1907         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1908                 &guest_hv_clock, sizeof(guest_hv_clock))))
1909                 return;
1910
1911         /* This VCPU is paused, but it's legal for a guest to read another
1912          * VCPU's kvmclock, so we really have to follow the specification where
1913          * it says that version is odd if data is being modified, and even after
1914          * it is consistent.
1915          *
1916          * Version field updates must be kept separate.  This is because
1917          * kvm_write_guest_cached might use a "rep movs" instruction, and
1918          * writes within a string instruction are weakly ordered.  So there
1919          * are three writes overall.
1920          *
1921          * As a small optimization, only write the version field in the first
1922          * and third write.  The vcpu->pv_time cache is still valid, because the
1923          * version field is the first in the struct.
1924          */
1925         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1926
1927         if (guest_hv_clock.version & 1)
1928                 ++guest_hv_clock.version;  /* first time write, random junk */
1929
1930         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1931         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1932                                 &vcpu->hv_clock,
1933                                 sizeof(vcpu->hv_clock.version));
1934
1935         smp_wmb();
1936
1937         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1938         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1939
1940         if (vcpu->pvclock_set_guest_stopped_request) {
1941                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1942                 vcpu->pvclock_set_guest_stopped_request = false;
1943         }
1944
1945         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1946
1947         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1948                                 &vcpu->hv_clock,
1949                                 sizeof(vcpu->hv_clock));
1950
1951         smp_wmb();
1952
1953         vcpu->hv_clock.version++;
1954         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1955                                 &vcpu->hv_clock,
1956                                 sizeof(vcpu->hv_clock.version));
1957 }
1958
1959 static int kvm_guest_time_update(struct kvm_vcpu *v)
1960 {
1961         unsigned long flags, tgt_tsc_khz;
1962         struct kvm_vcpu_arch *vcpu = &v->arch;
1963         struct kvm_arch *ka = &v->kvm->arch;
1964         s64 kernel_ns;
1965         u64 tsc_timestamp, host_tsc;
1966         u8 pvclock_flags;
1967         bool use_master_clock;
1968
1969         kernel_ns = 0;
1970         host_tsc = 0;
1971
1972         /*
1973          * If the host uses TSC clock, then passthrough TSC as stable
1974          * to the guest.
1975          */
1976         spin_lock(&ka->pvclock_gtod_sync_lock);
1977         use_master_clock = ka->use_master_clock;
1978         if (use_master_clock) {
1979                 host_tsc = ka->master_cycle_now;
1980                 kernel_ns = ka->master_kernel_ns;
1981         }
1982         spin_unlock(&ka->pvclock_gtod_sync_lock);
1983
1984         /* Keep irq disabled to prevent changes to the clock */
1985         local_irq_save(flags);
1986         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1987         if (unlikely(tgt_tsc_khz == 0)) {
1988                 local_irq_restore(flags);
1989                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1990                 return 1;
1991         }
1992         if (!use_master_clock) {
1993                 host_tsc = rdtsc();
1994                 kernel_ns = ktime_get_boot_ns();
1995         }
1996
1997         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1998
1999         /*
2000          * We may have to catch up the TSC to match elapsed wall clock
2001          * time for two reasons, even if kvmclock is used.
2002          *   1) CPU could have been running below the maximum TSC rate
2003          *   2) Broken TSC compensation resets the base at each VCPU
2004          *      entry to avoid unknown leaps of TSC even when running
2005          *      again on the same CPU.  This may cause apparent elapsed
2006          *      time to disappear, and the guest to stand still or run
2007          *      very slowly.
2008          */
2009         if (vcpu->tsc_catchup) {
2010                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2011                 if (tsc > tsc_timestamp) {
2012                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2013                         tsc_timestamp = tsc;
2014                 }
2015         }
2016
2017         local_irq_restore(flags);
2018
2019         /* With all the info we got, fill in the values */
2020
2021         if (kvm_has_tsc_control)
2022                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2023
2024         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2025                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2026                                    &vcpu->hv_clock.tsc_shift,
2027                                    &vcpu->hv_clock.tsc_to_system_mul);
2028                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2029         }
2030
2031         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2032         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2033         vcpu->last_guest_tsc = tsc_timestamp;
2034
2035         /* If the host uses TSC clocksource, then it is stable */
2036         pvclock_flags = 0;
2037         if (use_master_clock)
2038                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2039
2040         vcpu->hv_clock.flags = pvclock_flags;
2041
2042         if (vcpu->pv_time_enabled)
2043                 kvm_setup_pvclock_page(v);
2044         if (v == kvm_get_vcpu(v->kvm, 0))
2045                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2046         return 0;
2047 }
2048
2049 /*
2050  * kvmclock updates which are isolated to a given vcpu, such as
2051  * vcpu->cpu migration, should not allow system_timestamp from
2052  * the rest of the vcpus to remain static. Otherwise ntp frequency
2053  * correction applies to one vcpu's system_timestamp but not
2054  * the others.
2055  *
2056  * So in those cases, request a kvmclock update for all vcpus.
2057  * We need to rate-limit these requests though, as they can
2058  * considerably slow guests that have a large number of vcpus.
2059  * The time for a remote vcpu to update its kvmclock is bound
2060  * by the delay we use to rate-limit the updates.
2061  */
2062
2063 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2064
2065 static void kvmclock_update_fn(struct work_struct *work)
2066 {
2067         int i;
2068         struct delayed_work *dwork = to_delayed_work(work);
2069         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2070                                            kvmclock_update_work);
2071         struct kvm *kvm = container_of(ka, struct kvm, arch);
2072         struct kvm_vcpu *vcpu;
2073
2074         kvm_for_each_vcpu(i, vcpu, kvm) {
2075                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2076                 kvm_vcpu_kick(vcpu);
2077         }
2078 }
2079
2080 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2081 {
2082         struct kvm *kvm = v->kvm;
2083
2084         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2085         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2086                                         KVMCLOCK_UPDATE_DELAY);
2087 }
2088
2089 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2090
2091 static void kvmclock_sync_fn(struct work_struct *work)
2092 {
2093         struct delayed_work *dwork = to_delayed_work(work);
2094         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2095                                            kvmclock_sync_work);
2096         struct kvm *kvm = container_of(ka, struct kvm, arch);
2097
2098         if (!kvmclock_periodic_sync)
2099                 return;
2100
2101         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2102         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2103                                         KVMCLOCK_SYNC_PERIOD);
2104 }
2105
2106 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2107 {
2108         u64 mcg_cap = vcpu->arch.mcg_cap;
2109         unsigned bank_num = mcg_cap & 0xff;
2110         u32 msr = msr_info->index;
2111         u64 data = msr_info->data;
2112
2113         switch (msr) {
2114         case MSR_IA32_MCG_STATUS:
2115                 vcpu->arch.mcg_status = data;
2116                 break;
2117         case MSR_IA32_MCG_CTL:
2118                 if (!(mcg_cap & MCG_CTL_P))
2119                         return 1;
2120                 if (data != 0 && data != ~(u64)0)
2121                         return -1;
2122                 vcpu->arch.mcg_ctl = data;
2123                 break;
2124         default:
2125                 if (msr >= MSR_IA32_MC0_CTL &&
2126                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2127                         u32 offset = msr - MSR_IA32_MC0_CTL;
2128                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2129                          * some Linux kernels though clear bit 10 in bank 4 to
2130                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2131                          * this to avoid an uncatched #GP in the guest
2132                          */
2133                         if ((offset & 0x3) == 0 &&
2134                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2135                                 return -1;
2136                         if (!msr_info->host_initiated &&
2137                                 (offset & 0x3) == 1 && data != 0)
2138                                 return -1;
2139                         vcpu->arch.mce_banks[offset] = data;
2140                         break;
2141                 }
2142                 return 1;
2143         }
2144         return 0;
2145 }
2146
2147 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2148 {
2149         struct kvm *kvm = vcpu->kvm;
2150         int lm = is_long_mode(vcpu);
2151         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2152                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2153         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2154                 : kvm->arch.xen_hvm_config.blob_size_32;
2155         u32 page_num = data & ~PAGE_MASK;
2156         u64 page_addr = data & PAGE_MASK;
2157         u8 *page;
2158         int r;
2159
2160         r = -E2BIG;
2161         if (page_num >= blob_size)
2162                 goto out;
2163         r = -ENOMEM;
2164         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2165         if (IS_ERR(page)) {
2166                 r = PTR_ERR(page);
2167                 goto out;
2168         }
2169         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2170                 goto out_free;
2171         r = 0;
2172 out_free:
2173         kfree(page);
2174 out:
2175         return r;
2176 }
2177
2178 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2179 {
2180         gpa_t gpa = data & ~0x3f;
2181
2182         /* Bits 3:5 are reserved, Should be zero */
2183         if (data & 0x38)
2184                 return 1;
2185
2186         vcpu->arch.apf.msr_val = data;
2187
2188         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2189                 kvm_clear_async_pf_completion_queue(vcpu);
2190                 kvm_async_pf_hash_reset(vcpu);
2191                 return 0;
2192         }
2193
2194         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2195                                         sizeof(u32)))
2196                 return 1;
2197
2198         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2199         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2200         kvm_async_pf_wakeup_all(vcpu);
2201         return 0;
2202 }
2203
2204 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2205 {
2206         vcpu->arch.pv_time_enabled = false;
2207 }
2208
2209 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2210 {
2211         ++vcpu->stat.tlb_flush;
2212         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2213 }
2214
2215 static void record_steal_time(struct kvm_vcpu *vcpu)
2216 {
2217         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2218                 return;
2219
2220         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2221                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2222                 return;
2223
2224         /*
2225          * Doing a TLB flush here, on the guest's behalf, can avoid
2226          * expensive IPIs.
2227          */
2228         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2229                 kvm_vcpu_flush_tlb(vcpu, false);
2230
2231         if (vcpu->arch.st.steal.version & 1)
2232                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2233
2234         vcpu->arch.st.steal.version += 1;
2235
2236         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2237                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2238
2239         smp_wmb();
2240
2241         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2242                 vcpu->arch.st.last_steal;
2243         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2244
2245         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2246                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2247
2248         smp_wmb();
2249
2250         vcpu->arch.st.steal.version += 1;
2251
2252         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2253                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2254 }
2255
2256 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2257 {
2258         bool pr = false;
2259         u32 msr = msr_info->index;
2260         u64 data = msr_info->data;
2261
2262         switch (msr) {
2263         case MSR_AMD64_NB_CFG:
2264         case MSR_IA32_UCODE_WRITE:
2265         case MSR_VM_HSAVE_PA:
2266         case MSR_AMD64_PATCH_LOADER:
2267         case MSR_AMD64_BU_CFG2:
2268         case MSR_AMD64_DC_CFG:
2269                 break;
2270
2271         case MSR_IA32_UCODE_REV:
2272                 if (msr_info->host_initiated)
2273                         vcpu->arch.microcode_version = data;
2274                 break;
2275         case MSR_EFER:
2276                 return set_efer(vcpu, data);
2277         case MSR_K7_HWCR:
2278                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2279                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2280                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2281                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2282                 if (data != 0) {
2283                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2284                                     data);
2285                         return 1;
2286                 }
2287                 break;
2288         case MSR_FAM10H_MMIO_CONF_BASE:
2289                 if (data != 0) {
2290                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2291                                     "0x%llx\n", data);
2292                         return 1;
2293                 }
2294                 break;
2295         case MSR_IA32_DEBUGCTLMSR:
2296                 if (!data) {
2297                         /* We support the non-activated case already */
2298                         break;
2299                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2300                         /* Values other than LBR and BTF are vendor-specific,
2301                            thus reserved and should throw a #GP */
2302                         return 1;
2303                 }
2304                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2305                             __func__, data);
2306                 break;
2307         case 0x200 ... 0x2ff:
2308                 return kvm_mtrr_set_msr(vcpu, msr, data);
2309         case MSR_IA32_APICBASE:
2310                 return kvm_set_apic_base(vcpu, msr_info);
2311         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2312                 return kvm_x2apic_msr_write(vcpu, msr, data);
2313         case MSR_IA32_TSCDEADLINE:
2314                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2315                 break;
2316         case MSR_IA32_TSC_ADJUST:
2317                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2318                         if (!msr_info->host_initiated) {
2319                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2320                                 adjust_tsc_offset_guest(vcpu, adj);
2321                         }
2322                         vcpu->arch.ia32_tsc_adjust_msr = data;
2323                 }
2324                 break;
2325         case MSR_IA32_MISC_ENABLE:
2326                 vcpu->arch.ia32_misc_enable_msr = data;
2327                 break;
2328         case MSR_IA32_SMBASE:
2329                 if (!msr_info->host_initiated)
2330                         return 1;
2331                 vcpu->arch.smbase = data;
2332                 break;
2333         case MSR_SMI_COUNT:
2334                 if (!msr_info->host_initiated)
2335                         return 1;
2336                 vcpu->arch.smi_count = data;
2337                 break;
2338         case MSR_KVM_WALL_CLOCK_NEW:
2339         case MSR_KVM_WALL_CLOCK:
2340                 vcpu->kvm->arch.wall_clock = data;
2341                 kvm_write_wall_clock(vcpu->kvm, data);
2342                 break;
2343         case MSR_KVM_SYSTEM_TIME_NEW:
2344         case MSR_KVM_SYSTEM_TIME: {
2345                 struct kvm_arch *ka = &vcpu->kvm->arch;
2346
2347                 kvmclock_reset(vcpu);
2348
2349                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2350                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2351
2352                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2353                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2354
2355                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2356                 }
2357
2358                 vcpu->arch.time = data;
2359                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2360
2361                 /* we verify if the enable bit is set... */
2362                 if (!(data & 1))
2363                         break;
2364
2365                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2366                      &vcpu->arch.pv_time, data & ~1ULL,
2367                      sizeof(struct pvclock_vcpu_time_info)))
2368                         vcpu->arch.pv_time_enabled = false;
2369                 else
2370                         vcpu->arch.pv_time_enabled = true;
2371
2372                 break;
2373         }
2374         case MSR_KVM_ASYNC_PF_EN:
2375                 if (kvm_pv_enable_async_pf(vcpu, data))
2376                         return 1;
2377                 break;
2378         case MSR_KVM_STEAL_TIME:
2379
2380                 if (unlikely(!sched_info_on()))
2381                         return 1;
2382
2383                 if (data & KVM_STEAL_RESERVED_MASK)
2384                         return 1;
2385
2386                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2387                                                 data & KVM_STEAL_VALID_BITS,
2388                                                 sizeof(struct kvm_steal_time)))
2389                         return 1;
2390
2391                 vcpu->arch.st.msr_val = data;
2392
2393                 if (!(data & KVM_MSR_ENABLED))
2394                         break;
2395
2396                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2397
2398                 break;
2399         case MSR_KVM_PV_EOI_EN:
2400                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2401                         return 1;
2402                 break;
2403
2404         case MSR_IA32_MCG_CTL:
2405         case MSR_IA32_MCG_STATUS:
2406         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2407                 return set_msr_mce(vcpu, msr_info);
2408
2409         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2410         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2411                 pr = true; /* fall through */
2412         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2413         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2414                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2415                         return kvm_pmu_set_msr(vcpu, msr_info);
2416
2417                 if (pr || data != 0)
2418                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2419                                     "0x%x data 0x%llx\n", msr, data);
2420                 break;
2421         case MSR_K7_CLK_CTL:
2422                 /*
2423                  * Ignore all writes to this no longer documented MSR.
2424                  * Writes are only relevant for old K7 processors,
2425                  * all pre-dating SVM, but a recommended workaround from
2426                  * AMD for these chips. It is possible to specify the
2427                  * affected processor models on the command line, hence
2428                  * the need to ignore the workaround.
2429                  */
2430                 break;
2431         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2432         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2433         case HV_X64_MSR_CRASH_CTL:
2434         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2435                 return kvm_hv_set_msr_common(vcpu, msr, data,
2436                                              msr_info->host_initiated);
2437         case MSR_IA32_BBL_CR_CTL3:
2438                 /* Drop writes to this legacy MSR -- see rdmsr
2439                  * counterpart for further detail.
2440                  */
2441                 if (report_ignored_msrs)
2442                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2443                                 msr, data);
2444                 break;
2445         case MSR_AMD64_OSVW_ID_LENGTH:
2446                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2447                         return 1;
2448                 vcpu->arch.osvw.length = data;
2449                 break;
2450         case MSR_AMD64_OSVW_STATUS:
2451                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2452                         return 1;
2453                 vcpu->arch.osvw.status = data;
2454                 break;
2455         case MSR_PLATFORM_INFO:
2456                 if (!msr_info->host_initiated ||
2457                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2458                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2459                      cpuid_fault_enabled(vcpu)))
2460                         return 1;
2461                 vcpu->arch.msr_platform_info = data;
2462                 break;
2463         case MSR_MISC_FEATURES_ENABLES:
2464                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2465                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2466                      !supports_cpuid_fault(vcpu)))
2467                         return 1;
2468                 vcpu->arch.msr_misc_features_enables = data;
2469                 break;
2470         default:
2471                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2472                         return xen_hvm_config(vcpu, data);
2473                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2474                         return kvm_pmu_set_msr(vcpu, msr_info);
2475                 if (!ignore_msrs) {
2476                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2477                                     msr, data);
2478                         return 1;
2479                 } else {
2480                         if (report_ignored_msrs)
2481                                 vcpu_unimpl(vcpu,
2482                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2483                                         msr, data);
2484                         break;
2485                 }
2486         }
2487         return 0;
2488 }
2489 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2490
2491
2492 /*
2493  * Reads an msr value (of 'msr_index') into 'pdata'.
2494  * Returns 0 on success, non-0 otherwise.
2495  * Assumes vcpu_load() was already called.
2496  */
2497 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2498 {
2499         return kvm_x86_ops->get_msr(vcpu, msr);
2500 }
2501 EXPORT_SYMBOL_GPL(kvm_get_msr);
2502
2503 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2504 {
2505         u64 data;
2506         u64 mcg_cap = vcpu->arch.mcg_cap;
2507         unsigned bank_num = mcg_cap & 0xff;
2508
2509         switch (msr) {
2510         case MSR_IA32_P5_MC_ADDR:
2511         case MSR_IA32_P5_MC_TYPE:
2512                 data = 0;
2513                 break;
2514         case MSR_IA32_MCG_CAP:
2515                 data = vcpu->arch.mcg_cap;
2516                 break;
2517         case MSR_IA32_MCG_CTL:
2518                 if (!(mcg_cap & MCG_CTL_P))
2519                         return 1;
2520                 data = vcpu->arch.mcg_ctl;
2521                 break;
2522         case MSR_IA32_MCG_STATUS:
2523                 data = vcpu->arch.mcg_status;
2524                 break;
2525         default:
2526                 if (msr >= MSR_IA32_MC0_CTL &&
2527                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2528                         u32 offset = msr - MSR_IA32_MC0_CTL;
2529                         data = vcpu->arch.mce_banks[offset];
2530                         break;
2531                 }
2532                 return 1;
2533         }
2534         *pdata = data;
2535         return 0;
2536 }
2537
2538 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2539 {
2540         switch (msr_info->index) {
2541         case MSR_IA32_PLATFORM_ID:
2542         case MSR_IA32_EBL_CR_POWERON:
2543         case MSR_IA32_DEBUGCTLMSR:
2544         case MSR_IA32_LASTBRANCHFROMIP:
2545         case MSR_IA32_LASTBRANCHTOIP:
2546         case MSR_IA32_LASTINTFROMIP:
2547         case MSR_IA32_LASTINTTOIP:
2548         case MSR_K8_SYSCFG:
2549         case MSR_K8_TSEG_ADDR:
2550         case MSR_K8_TSEG_MASK:
2551         case MSR_K7_HWCR:
2552         case MSR_VM_HSAVE_PA:
2553         case MSR_K8_INT_PENDING_MSG:
2554         case MSR_AMD64_NB_CFG:
2555         case MSR_FAM10H_MMIO_CONF_BASE:
2556         case MSR_AMD64_BU_CFG2:
2557         case MSR_IA32_PERF_CTL:
2558         case MSR_AMD64_DC_CFG:
2559                 msr_info->data = 0;
2560                 break;
2561         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2562         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2563         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2564         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2565                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2566                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2567                 msr_info->data = 0;
2568                 break;
2569         case MSR_IA32_UCODE_REV:
2570                 msr_info->data = vcpu->arch.microcode_version;
2571                 break;
2572         case MSR_MTRRcap:
2573         case 0x200 ... 0x2ff:
2574                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2575         case 0xcd: /* fsb frequency */
2576                 msr_info->data = 3;
2577                 break;
2578                 /*
2579                  * MSR_EBC_FREQUENCY_ID
2580                  * Conservative value valid for even the basic CPU models.
2581                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2582                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2583                  * and 266MHz for model 3, or 4. Set Core Clock
2584                  * Frequency to System Bus Frequency Ratio to 1 (bits
2585                  * 31:24) even though these are only valid for CPU
2586                  * models > 2, however guests may end up dividing or
2587                  * multiplying by zero otherwise.
2588                  */
2589         case MSR_EBC_FREQUENCY_ID:
2590                 msr_info->data = 1 << 24;
2591                 break;
2592         case MSR_IA32_APICBASE:
2593                 msr_info->data = kvm_get_apic_base(vcpu);
2594                 break;
2595         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2596                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2597                 break;
2598         case MSR_IA32_TSCDEADLINE:
2599                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2600                 break;
2601         case MSR_IA32_TSC_ADJUST:
2602                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2603                 break;
2604         case MSR_IA32_MISC_ENABLE:
2605                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2606                 break;
2607         case MSR_IA32_SMBASE:
2608                 if (!msr_info->host_initiated)
2609                         return 1;
2610                 msr_info->data = vcpu->arch.smbase;
2611                 break;
2612         case MSR_SMI_COUNT:
2613                 msr_info->data = vcpu->arch.smi_count;
2614                 break;
2615         case MSR_IA32_PERF_STATUS:
2616                 /* TSC increment by tick */
2617                 msr_info->data = 1000ULL;
2618                 /* CPU multiplier */
2619                 msr_info->data |= (((uint64_t)4ULL) << 40);
2620                 break;
2621         case MSR_EFER:
2622                 msr_info->data = vcpu->arch.efer;
2623                 break;
2624         case MSR_KVM_WALL_CLOCK:
2625         case MSR_KVM_WALL_CLOCK_NEW:
2626                 msr_info->data = vcpu->kvm->arch.wall_clock;
2627                 break;
2628         case MSR_KVM_SYSTEM_TIME:
2629         case MSR_KVM_SYSTEM_TIME_NEW:
2630                 msr_info->data = vcpu->arch.time;
2631                 break;
2632         case MSR_KVM_ASYNC_PF_EN:
2633                 msr_info->data = vcpu->arch.apf.msr_val;
2634                 break;
2635         case MSR_KVM_STEAL_TIME:
2636                 msr_info->data = vcpu->arch.st.msr_val;
2637                 break;
2638         case MSR_KVM_PV_EOI_EN:
2639                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2640                 break;
2641         case MSR_IA32_P5_MC_ADDR:
2642         case MSR_IA32_P5_MC_TYPE:
2643         case MSR_IA32_MCG_CAP:
2644         case MSR_IA32_MCG_CTL:
2645         case MSR_IA32_MCG_STATUS:
2646         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2647                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2648         case MSR_K7_CLK_CTL:
2649                 /*
2650                  * Provide expected ramp-up count for K7. All other
2651                  * are set to zero, indicating minimum divisors for
2652                  * every field.
2653                  *
2654                  * This prevents guest kernels on AMD host with CPU
2655                  * type 6, model 8 and higher from exploding due to
2656                  * the rdmsr failing.
2657                  */
2658                 msr_info->data = 0x20000000;
2659                 break;
2660         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2661         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2662         case HV_X64_MSR_CRASH_CTL:
2663         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2664                 return kvm_hv_get_msr_common(vcpu,
2665                                              msr_info->index, &msr_info->data);
2666                 break;
2667         case MSR_IA32_BBL_CR_CTL3:
2668                 /* This legacy MSR exists but isn't fully documented in current
2669                  * silicon.  It is however accessed by winxp in very narrow
2670                  * scenarios where it sets bit #19, itself documented as
2671                  * a "reserved" bit.  Best effort attempt to source coherent
2672                  * read data here should the balance of the register be
2673                  * interpreted by the guest:
2674                  *
2675                  * L2 cache control register 3: 64GB range, 256KB size,
2676                  * enabled, latency 0x1, configured
2677                  */
2678                 msr_info->data = 0xbe702111;
2679                 break;
2680         case MSR_AMD64_OSVW_ID_LENGTH:
2681                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2682                         return 1;
2683                 msr_info->data = vcpu->arch.osvw.length;
2684                 break;
2685         case MSR_AMD64_OSVW_STATUS:
2686                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2687                         return 1;
2688                 msr_info->data = vcpu->arch.osvw.status;
2689                 break;
2690         case MSR_PLATFORM_INFO:
2691                 msr_info->data = vcpu->arch.msr_platform_info;
2692                 break;
2693         case MSR_MISC_FEATURES_ENABLES:
2694                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2695                 break;
2696         default:
2697                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2698                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2699                 if (!ignore_msrs) {
2700                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2701                                                msr_info->index);
2702                         return 1;
2703                 } else {
2704                         if (report_ignored_msrs)
2705                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2706                                         msr_info->index);
2707                         msr_info->data = 0;
2708                 }
2709                 break;
2710         }
2711         return 0;
2712 }
2713 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2714
2715 /*
2716  * Read or write a bunch of msrs. All parameters are kernel addresses.
2717  *
2718  * @return number of msrs set successfully.
2719  */
2720 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2721                     struct kvm_msr_entry *entries,
2722                     int (*do_msr)(struct kvm_vcpu *vcpu,
2723                                   unsigned index, u64 *data))
2724 {
2725         int i;
2726
2727         for (i = 0; i < msrs->nmsrs; ++i)
2728                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2729                         break;
2730
2731         return i;
2732 }
2733
2734 /*
2735  * Read or write a bunch of msrs. Parameters are user addresses.
2736  *
2737  * @return number of msrs set successfully.
2738  */
2739 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2740                   int (*do_msr)(struct kvm_vcpu *vcpu,
2741                                 unsigned index, u64 *data),
2742                   int writeback)
2743 {
2744         struct kvm_msrs msrs;
2745         struct kvm_msr_entry *entries;
2746         int r, n;
2747         unsigned size;
2748
2749         r = -EFAULT;
2750         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2751                 goto out;
2752
2753         r = -E2BIG;
2754         if (msrs.nmsrs >= MAX_IO_MSRS)
2755                 goto out;
2756
2757         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2758         entries = memdup_user(user_msrs->entries, size);
2759         if (IS_ERR(entries)) {
2760                 r = PTR_ERR(entries);
2761                 goto out;
2762         }
2763
2764         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2765         if (r < 0)
2766                 goto out_free;
2767
2768         r = -EFAULT;
2769         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2770                 goto out_free;
2771
2772         r = n;
2773
2774 out_free:
2775         kfree(entries);
2776 out:
2777         return r;
2778 }
2779
2780 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2781 {
2782         int r;
2783
2784         switch (ext) {
2785         case KVM_CAP_IRQCHIP:
2786         case KVM_CAP_HLT:
2787         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2788         case KVM_CAP_SET_TSS_ADDR:
2789         case KVM_CAP_EXT_CPUID:
2790         case KVM_CAP_EXT_EMUL_CPUID:
2791         case KVM_CAP_CLOCKSOURCE:
2792         case KVM_CAP_PIT:
2793         case KVM_CAP_NOP_IO_DELAY:
2794         case KVM_CAP_MP_STATE:
2795         case KVM_CAP_SYNC_MMU:
2796         case KVM_CAP_USER_NMI:
2797         case KVM_CAP_REINJECT_CONTROL:
2798         case KVM_CAP_IRQ_INJECT_STATUS:
2799         case KVM_CAP_IOEVENTFD:
2800         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2801         case KVM_CAP_PIT2:
2802         case KVM_CAP_PIT_STATE2:
2803         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2804         case KVM_CAP_XEN_HVM:
2805         case KVM_CAP_VCPU_EVENTS:
2806         case KVM_CAP_HYPERV:
2807         case KVM_CAP_HYPERV_VAPIC:
2808         case KVM_CAP_HYPERV_SPIN:
2809         case KVM_CAP_HYPERV_SYNIC:
2810         case KVM_CAP_HYPERV_SYNIC2:
2811         case KVM_CAP_HYPERV_VP_INDEX:
2812         case KVM_CAP_PCI_SEGMENT:
2813         case KVM_CAP_DEBUGREGS:
2814         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2815         case KVM_CAP_XSAVE:
2816         case KVM_CAP_ASYNC_PF:
2817         case KVM_CAP_GET_TSC_KHZ:
2818         case KVM_CAP_KVMCLOCK_CTRL:
2819         case KVM_CAP_READONLY_MEM:
2820         case KVM_CAP_HYPERV_TIME:
2821         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2822         case KVM_CAP_TSC_DEADLINE_TIMER:
2823         case KVM_CAP_ENABLE_CAP_VM:
2824         case KVM_CAP_DISABLE_QUIRKS:
2825         case KVM_CAP_SET_BOOT_CPU_ID:
2826         case KVM_CAP_SPLIT_IRQCHIP:
2827         case KVM_CAP_IMMEDIATE_EXIT:
2828         case KVM_CAP_GET_MSR_FEATURES:
2829                 r = 1;
2830                 break;
2831         case KVM_CAP_ADJUST_CLOCK:
2832                 r = KVM_CLOCK_TSC_STABLE;
2833                 break;
2834         case KVM_CAP_X86_GUEST_MWAIT:
2835                 r = kvm_mwait_in_guest();
2836                 break;
2837         case KVM_CAP_X86_SMM:
2838                 /* SMBASE is usually relocated above 1M on modern chipsets,
2839                  * and SMM handlers might indeed rely on 4G segment limits,
2840                  * so do not report SMM to be available if real mode is
2841                  * emulated via vm86 mode.  Still, do not go to great lengths
2842                  * to avoid userspace's usage of the feature, because it is a
2843                  * fringe case that is not enabled except via specific settings
2844                  * of the module parameters.
2845                  */
2846                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2847                 break;
2848         case KVM_CAP_VAPIC:
2849                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2850                 break;
2851         case KVM_CAP_NR_VCPUS:
2852                 r = KVM_SOFT_MAX_VCPUS;
2853                 break;
2854         case KVM_CAP_MAX_VCPUS:
2855                 r = KVM_MAX_VCPUS;
2856                 break;
2857         case KVM_CAP_NR_MEMSLOTS:
2858                 r = KVM_USER_MEM_SLOTS;
2859                 break;
2860         case KVM_CAP_PV_MMU:    /* obsolete */
2861                 r = 0;
2862                 break;
2863         case KVM_CAP_MCE:
2864                 r = KVM_MAX_MCE_BANKS;
2865                 break;
2866         case KVM_CAP_XCRS:
2867                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2868                 break;
2869         case KVM_CAP_TSC_CONTROL:
2870                 r = kvm_has_tsc_control;
2871                 break;
2872         case KVM_CAP_X2APIC_API:
2873                 r = KVM_X2APIC_API_VALID_FLAGS;
2874                 break;
2875         default:
2876                 r = 0;
2877                 break;
2878         }
2879         return r;
2880
2881 }
2882
2883 long kvm_arch_dev_ioctl(struct file *filp,
2884                         unsigned int ioctl, unsigned long arg)
2885 {
2886         void __user *argp = (void __user *)arg;
2887         long r;
2888
2889         switch (ioctl) {
2890         case KVM_GET_MSR_INDEX_LIST: {
2891                 struct kvm_msr_list __user *user_msr_list = argp;
2892                 struct kvm_msr_list msr_list;
2893                 unsigned n;
2894
2895                 r = -EFAULT;
2896                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2897                         goto out;
2898                 n = msr_list.nmsrs;
2899                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2900                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2901                         goto out;
2902                 r = -E2BIG;
2903                 if (n < msr_list.nmsrs)
2904                         goto out;
2905                 r = -EFAULT;
2906                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2907                                  num_msrs_to_save * sizeof(u32)))
2908                         goto out;
2909                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2910                                  &emulated_msrs,
2911                                  num_emulated_msrs * sizeof(u32)))
2912                         goto out;
2913                 r = 0;
2914                 break;
2915         }
2916         case KVM_GET_SUPPORTED_CPUID:
2917         case KVM_GET_EMULATED_CPUID: {
2918                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2919                 struct kvm_cpuid2 cpuid;
2920
2921                 r = -EFAULT;
2922                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2923                         goto out;
2924
2925                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2926                                             ioctl);
2927                 if (r)
2928                         goto out;
2929
2930                 r = -EFAULT;
2931                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2932                         goto out;
2933                 r = 0;
2934                 break;
2935         }
2936         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2937                 r = -EFAULT;
2938                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2939                                  sizeof(kvm_mce_cap_supported)))
2940                         goto out;
2941                 r = 0;
2942                 break;
2943         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
2944                 struct kvm_msr_list __user *user_msr_list = argp;
2945                 struct kvm_msr_list msr_list;
2946                 unsigned int n;
2947
2948                 r = -EFAULT;
2949                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
2950                         goto out;
2951                 n = msr_list.nmsrs;
2952                 msr_list.nmsrs = num_msr_based_features;
2953                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
2954                         goto out;
2955                 r = -E2BIG;
2956                 if (n < msr_list.nmsrs)
2957                         goto out;
2958                 r = -EFAULT;
2959                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
2960                                  num_msr_based_features * sizeof(u32)))
2961                         goto out;
2962                 r = 0;
2963                 break;
2964         }
2965         case KVM_GET_MSRS:
2966                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
2967                 break;
2968         }
2969         default:
2970                 r = -EINVAL;
2971         }
2972 out:
2973         return r;
2974 }
2975
2976 static void wbinvd_ipi(void *garbage)
2977 {
2978         wbinvd();
2979 }
2980
2981 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2982 {
2983         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2984 }
2985
2986 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2987 {
2988         /* Address WBINVD may be executed by guest */
2989         if (need_emulate_wbinvd(vcpu)) {
2990                 if (kvm_x86_ops->has_wbinvd_exit())
2991                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2992                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2993                         smp_call_function_single(vcpu->cpu,
2994                                         wbinvd_ipi, NULL, 1);
2995         }
2996
2997         kvm_x86_ops->vcpu_load(vcpu, cpu);
2998
2999         /* Apply any externally detected TSC adjustments (due to suspend) */
3000         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3001                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3002                 vcpu->arch.tsc_offset_adjustment = 0;
3003                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3004         }
3005
3006         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3007                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3008                                 rdtsc() - vcpu->arch.last_host_tsc;
3009                 if (tsc_delta < 0)
3010                         mark_tsc_unstable("KVM discovered backwards TSC");
3011
3012                 if (kvm_check_tsc_unstable()) {
3013                         u64 offset = kvm_compute_tsc_offset(vcpu,
3014                                                 vcpu->arch.last_guest_tsc);
3015                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3016                         vcpu->arch.tsc_catchup = 1;
3017                 }
3018
3019                 if (kvm_lapic_hv_timer_in_use(vcpu))
3020                         kvm_lapic_restart_hv_timer(vcpu);
3021
3022                 /*
3023                  * On a host with synchronized TSC, there is no need to update
3024                  * kvmclock on vcpu->cpu migration
3025                  */
3026                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3027                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3028                 if (vcpu->cpu != cpu)
3029                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3030                 vcpu->cpu = cpu;
3031         }
3032
3033         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3034 }
3035
3036 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3037 {
3038         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3039                 return;
3040
3041         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3042
3043         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3044                         &vcpu->arch.st.steal.preempted,
3045                         offsetof(struct kvm_steal_time, preempted),
3046                         sizeof(vcpu->arch.st.steal.preempted));
3047 }
3048
3049 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3050 {
3051         int idx;
3052
3053         if (vcpu->preempted)
3054                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3055
3056         /*
3057          * Disable page faults because we're in atomic context here.
3058          * kvm_write_guest_offset_cached() would call might_fault()
3059          * that relies on pagefault_disable() to tell if there's a
3060          * bug. NOTE: the write to guest memory may not go through if
3061          * during postcopy live migration or if there's heavy guest
3062          * paging.
3063          */
3064         pagefault_disable();
3065         /*
3066          * kvm_memslots() will be called by
3067          * kvm_write_guest_offset_cached() so take the srcu lock.
3068          */
3069         idx = srcu_read_lock(&vcpu->kvm->srcu);
3070         kvm_steal_time_set_preempted(vcpu);
3071         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3072         pagefault_enable();
3073         kvm_x86_ops->vcpu_put(vcpu);
3074         vcpu->arch.last_host_tsc = rdtsc();
3075         /*
3076          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3077          * on every vmexit, but if not, we might have a stale dr6 from the
3078          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3079          */
3080         set_debugreg(0, 6);
3081 }
3082
3083 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3084                                     struct kvm_lapic_state *s)
3085 {
3086         if (vcpu->arch.apicv_active)
3087                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3088
3089         return kvm_apic_get_state(vcpu, s);
3090 }
3091
3092 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3093                                     struct kvm_lapic_state *s)
3094 {
3095         int r;
3096
3097         r = kvm_apic_set_state(vcpu, s);
3098         if (r)
3099                 return r;
3100         update_cr8_intercept(vcpu);
3101
3102         return 0;
3103 }
3104
3105 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3106 {
3107         return (!lapic_in_kernel(vcpu) ||
3108                 kvm_apic_accept_pic_intr(vcpu));
3109 }
3110
3111 /*
3112  * if userspace requested an interrupt window, check that the
3113  * interrupt window is open.
3114  *
3115  * No need to exit to userspace if we already have an interrupt queued.
3116  */
3117 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3118 {
3119         return kvm_arch_interrupt_allowed(vcpu) &&
3120                 !kvm_cpu_has_interrupt(vcpu) &&
3121                 !kvm_event_needs_reinjection(vcpu) &&
3122                 kvm_cpu_accept_dm_intr(vcpu);
3123 }
3124
3125 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3126                                     struct kvm_interrupt *irq)
3127 {
3128         if (irq->irq >= KVM_NR_INTERRUPTS)
3129                 return -EINVAL;
3130
3131         if (!irqchip_in_kernel(vcpu->kvm)) {
3132                 kvm_queue_interrupt(vcpu, irq->irq, false);
3133                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3134                 return 0;
3135         }
3136
3137         /*
3138          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3139          * fail for in-kernel 8259.
3140          */
3141         if (pic_in_kernel(vcpu->kvm))
3142                 return -ENXIO;
3143
3144         if (vcpu->arch.pending_external_vector != -1)
3145                 return -EEXIST;
3146
3147         vcpu->arch.pending_external_vector = irq->irq;
3148         kvm_make_request(KVM_REQ_EVENT, vcpu);
3149         return 0;
3150 }
3151
3152 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3153 {
3154         kvm_inject_nmi(vcpu);
3155
3156         return 0;
3157 }
3158
3159 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3160 {
3161         kvm_make_request(KVM_REQ_SMI, vcpu);
3162
3163         return 0;
3164 }
3165
3166 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3167                                            struct kvm_tpr_access_ctl *tac)
3168 {
3169         if (tac->flags)
3170                 return -EINVAL;
3171         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3172         return 0;
3173 }
3174
3175 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3176                                         u64 mcg_cap)
3177 {
3178         int r;
3179         unsigned bank_num = mcg_cap & 0xff, bank;
3180
3181         r = -EINVAL;
3182         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3183                 goto out;
3184         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3185                 goto out;
3186         r = 0;
3187         vcpu->arch.mcg_cap = mcg_cap;
3188         /* Init IA32_MCG_CTL to all 1s */
3189         if (mcg_cap & MCG_CTL_P)
3190                 vcpu->arch.mcg_ctl = ~(u64)0;
3191         /* Init IA32_MCi_CTL to all 1s */
3192         for (bank = 0; bank < bank_num; bank++)
3193                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3194
3195         if (kvm_x86_ops->setup_mce)
3196                 kvm_x86_ops->setup_mce(vcpu);
3197 out:
3198         return r;
3199 }
3200
3201 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3202                                       struct kvm_x86_mce *mce)
3203 {
3204         u64 mcg_cap = vcpu->arch.mcg_cap;
3205         unsigned bank_num = mcg_cap & 0xff;
3206         u64 *banks = vcpu->arch.mce_banks;
3207
3208         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3209                 return -EINVAL;
3210         /*
3211          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3212          * reporting is disabled
3213          */
3214         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3215             vcpu->arch.mcg_ctl != ~(u64)0)
3216                 return 0;
3217         banks += 4 * mce->bank;
3218         /*
3219          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3220          * reporting is disabled for the bank
3221          */
3222         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3223                 return 0;
3224         if (mce->status & MCI_STATUS_UC) {
3225                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3226                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3227                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3228                         return 0;
3229                 }
3230                 if (banks[1] & MCI_STATUS_VAL)
3231                         mce->status |= MCI_STATUS_OVER;
3232                 banks[2] = mce->addr;
3233                 banks[3] = mce->misc;
3234                 vcpu->arch.mcg_status = mce->mcg_status;
3235                 banks[1] = mce->status;
3236                 kvm_queue_exception(vcpu, MC_VECTOR);
3237         } else if (!(banks[1] & MCI_STATUS_VAL)
3238                    || !(banks[1] & MCI_STATUS_UC)) {
3239                 if (banks[1] & MCI_STATUS_VAL)
3240                         mce->status |= MCI_STATUS_OVER;
3241                 banks[2] = mce->addr;
3242                 banks[3] = mce->misc;
3243                 banks[1] = mce->status;
3244         } else
3245                 banks[1] |= MCI_STATUS_OVER;
3246         return 0;
3247 }
3248
3249 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3250                                                struct kvm_vcpu_events *events)
3251 {
3252         process_nmi(vcpu);
3253         /*
3254          * FIXME: pass injected and pending separately.  This is only
3255          * needed for nested virtualization, whose state cannot be
3256          * migrated yet.  For now we can combine them.
3257          */
3258         events->exception.injected =
3259                 (vcpu->arch.exception.pending ||
3260                  vcpu->arch.exception.injected) &&
3261                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3262         events->exception.nr = vcpu->arch.exception.nr;
3263         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3264         events->exception.pad = 0;
3265         events->exception.error_code = vcpu->arch.exception.error_code;
3266
3267         events->interrupt.injected =
3268                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3269         events->interrupt.nr = vcpu->arch.interrupt.nr;
3270         events->interrupt.soft = 0;
3271         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3272
3273         events->nmi.injected = vcpu->arch.nmi_injected;
3274         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3275         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3276         events->nmi.pad = 0;
3277
3278         events->sipi_vector = 0; /* never valid when reporting to user space */
3279
3280         events->smi.smm = is_smm(vcpu);
3281         events->smi.pending = vcpu->arch.smi_pending;
3282         events->smi.smm_inside_nmi =
3283                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3284         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3285
3286         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3287                          | KVM_VCPUEVENT_VALID_SHADOW
3288                          | KVM_VCPUEVENT_VALID_SMM);
3289         memset(&events->reserved, 0, sizeof(events->reserved));
3290 }
3291
3292 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3293
3294 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3295                                               struct kvm_vcpu_events *events)
3296 {
3297         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3298                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3299                               | KVM_VCPUEVENT_VALID_SHADOW
3300                               | KVM_VCPUEVENT_VALID_SMM))
3301                 return -EINVAL;
3302
3303         if (events->exception.injected &&
3304             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3305              is_guest_mode(vcpu)))
3306                 return -EINVAL;
3307
3308         /* INITs are latched while in SMM */
3309         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3310             (events->smi.smm || events->smi.pending) &&
3311             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3312                 return -EINVAL;
3313
3314         process_nmi(vcpu);
3315         vcpu->arch.exception.injected = false;
3316         vcpu->arch.exception.pending = events->exception.injected;
3317         vcpu->arch.exception.nr = events->exception.nr;
3318         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3319         vcpu->arch.exception.error_code = events->exception.error_code;
3320
3321         vcpu->arch.interrupt.pending = events->interrupt.injected;
3322         vcpu->arch.interrupt.nr = events->interrupt.nr;
3323         vcpu->arch.interrupt.soft = events->interrupt.soft;
3324         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3325                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3326                                                   events->interrupt.shadow);
3327
3328         vcpu->arch.nmi_injected = events->nmi.injected;
3329         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3330                 vcpu->arch.nmi_pending = events->nmi.pending;
3331         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3332
3333         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3334             lapic_in_kernel(vcpu))
3335                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3336
3337         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3338                 u32 hflags = vcpu->arch.hflags;
3339                 if (events->smi.smm)
3340                         hflags |= HF_SMM_MASK;
3341                 else
3342                         hflags &= ~HF_SMM_MASK;
3343                 kvm_set_hflags(vcpu, hflags);
3344
3345                 vcpu->arch.smi_pending = events->smi.pending;
3346
3347                 if (events->smi.smm) {
3348                         if (events->smi.smm_inside_nmi)
3349                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3350                         else
3351                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3352                         if (lapic_in_kernel(vcpu)) {
3353                                 if (events->smi.latched_init)
3354                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3355                                 else
3356                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3357                         }
3358                 }
3359         }
3360
3361         kvm_make_request(KVM_REQ_EVENT, vcpu);
3362
3363         return 0;
3364 }
3365
3366 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3367                                              struct kvm_debugregs *dbgregs)
3368 {
3369         unsigned long val;
3370
3371         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3372         kvm_get_dr(vcpu, 6, &val);
3373         dbgregs->dr6 = val;
3374         dbgregs->dr7 = vcpu->arch.dr7;
3375         dbgregs->flags = 0;
3376         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3377 }
3378
3379 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3380                                             struct kvm_debugregs *dbgregs)
3381 {
3382         if (dbgregs->flags)
3383                 return -EINVAL;
3384
3385         if (dbgregs->dr6 & ~0xffffffffull)
3386                 return -EINVAL;
3387         if (dbgregs->dr7 & ~0xffffffffull)
3388                 return -EINVAL;
3389
3390         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3391         kvm_update_dr0123(vcpu);
3392         vcpu->arch.dr6 = dbgregs->dr6;
3393         kvm_update_dr6(vcpu);
3394         vcpu->arch.dr7 = dbgregs->dr7;
3395         kvm_update_dr7(vcpu);
3396
3397         return 0;
3398 }
3399
3400 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3401
3402 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3403 {
3404         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3405         u64 xstate_bv = xsave->header.xfeatures;
3406         u64 valid;
3407
3408         /*
3409          * Copy legacy XSAVE area, to avoid complications with CPUID
3410          * leaves 0 and 1 in the loop below.
3411          */
3412         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3413
3414         /* Set XSTATE_BV */
3415         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3416         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3417
3418         /*
3419          * Copy each region from the possibly compacted offset to the
3420          * non-compacted offset.
3421          */
3422         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3423         while (valid) {
3424                 u64 feature = valid & -valid;
3425                 int index = fls64(feature) - 1;
3426                 void *src = get_xsave_addr(xsave, feature);
3427
3428                 if (src) {
3429                         u32 size, offset, ecx, edx;
3430                         cpuid_count(XSTATE_CPUID, index,
3431                                     &size, &offset, &ecx, &edx);
3432                         if (feature == XFEATURE_MASK_PKRU)
3433                                 memcpy(dest + offset, &vcpu->arch.pkru,
3434                                        sizeof(vcpu->arch.pkru));
3435                         else
3436                                 memcpy(dest + offset, src, size);
3437
3438                 }
3439
3440                 valid -= feature;
3441         }
3442 }
3443
3444 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3445 {
3446         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3447         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3448         u64 valid;
3449
3450         /*
3451          * Copy legacy XSAVE area, to avoid complications with CPUID
3452          * leaves 0 and 1 in the loop below.
3453          */
3454         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3455
3456         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3457         xsave->header.xfeatures = xstate_bv;
3458         if (boot_cpu_has(X86_FEATURE_XSAVES))
3459                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3460
3461         /*
3462          * Copy each region from the non-compacted offset to the
3463          * possibly compacted offset.
3464          */
3465         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3466         while (valid) {
3467                 u64 feature = valid & -valid;
3468                 int index = fls64(feature) - 1;
3469                 void *dest = get_xsave_addr(xsave, feature);
3470
3471                 if (dest) {
3472                         u32 size, offset, ecx, edx;
3473                         cpuid_count(XSTATE_CPUID, index,
3474                                     &size, &offset, &ecx, &edx);
3475                         if (feature == XFEATURE_MASK_PKRU)
3476                                 memcpy(&vcpu->arch.pkru, src + offset,
3477                                        sizeof(vcpu->arch.pkru));
3478                         else
3479                                 memcpy(dest, src + offset, size);
3480                 }
3481
3482                 valid -= feature;
3483         }
3484 }
3485
3486 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3487                                          struct kvm_xsave *guest_xsave)
3488 {
3489         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3490                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3491                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3492         } else {
3493                 memcpy(guest_xsave->region,
3494                         &vcpu->arch.guest_fpu.state.fxsave,
3495                         sizeof(struct fxregs_state));
3496                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3497                         XFEATURE_MASK_FPSSE;
3498         }
3499 }
3500
3501 #define XSAVE_MXCSR_OFFSET 24
3502
3503 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3504                                         struct kvm_xsave *guest_xsave)
3505 {
3506         u64 xstate_bv =
3507                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3508         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3509
3510         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3511                 /*
3512                  * Here we allow setting states that are not present in
3513                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3514                  * with old userspace.
3515                  */
3516                 if (xstate_bv & ~kvm_supported_xcr0() ||
3517                         mxcsr & ~mxcsr_feature_mask)
3518                         return -EINVAL;
3519                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3520         } else {
3521                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3522                         mxcsr & ~mxcsr_feature_mask)
3523                         return -EINVAL;
3524                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3525                         guest_xsave->region, sizeof(struct fxregs_state));
3526         }
3527         return 0;
3528 }
3529
3530 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3531                                         struct kvm_xcrs *guest_xcrs)
3532 {
3533         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3534                 guest_xcrs->nr_xcrs = 0;
3535                 return;
3536         }
3537
3538         guest_xcrs->nr_xcrs = 1;
3539         guest_xcrs->flags = 0;
3540         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3541         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3542 }
3543
3544 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3545                                        struct kvm_xcrs *guest_xcrs)
3546 {
3547         int i, r = 0;
3548
3549         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3550                 return -EINVAL;
3551
3552         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3553                 return -EINVAL;
3554
3555         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3556                 /* Only support XCR0 currently */
3557                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3558                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3559                                 guest_xcrs->xcrs[i].value);
3560                         break;
3561                 }
3562         if (r)
3563                 r = -EINVAL;
3564         return r;
3565 }
3566
3567 /*
3568  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3569  * stopped by the hypervisor.  This function will be called from the host only.
3570  * EINVAL is returned when the host attempts to set the flag for a guest that
3571  * does not support pv clocks.
3572  */
3573 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3574 {
3575         if (!vcpu->arch.pv_time_enabled)
3576                 return -EINVAL;
3577         vcpu->arch.pvclock_set_guest_stopped_request = true;
3578         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3579         return 0;
3580 }
3581
3582 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3583                                      struct kvm_enable_cap *cap)
3584 {
3585         if (cap->flags)
3586                 return -EINVAL;
3587
3588         switch (cap->cap) {
3589         case KVM_CAP_HYPERV_SYNIC2:
3590                 if (cap->args[0])
3591                         return -EINVAL;
3592         case KVM_CAP_HYPERV_SYNIC:
3593                 if (!irqchip_in_kernel(vcpu->kvm))
3594                         return -EINVAL;
3595                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3596                                              KVM_CAP_HYPERV_SYNIC2);
3597         default:
3598                 return -EINVAL;
3599         }
3600 }
3601
3602 long kvm_arch_vcpu_ioctl(struct file *filp,
3603                          unsigned int ioctl, unsigned long arg)
3604 {
3605         struct kvm_vcpu *vcpu = filp->private_data;
3606         void __user *argp = (void __user *)arg;
3607         int r;
3608         union {
3609                 struct kvm_lapic_state *lapic;
3610                 struct kvm_xsave *xsave;
3611                 struct kvm_xcrs *xcrs;
3612                 void *buffer;
3613         } u;
3614
3615         vcpu_load(vcpu);
3616
3617         u.buffer = NULL;
3618         switch (ioctl) {
3619         case KVM_GET_LAPIC: {
3620                 r = -EINVAL;
3621                 if (!lapic_in_kernel(vcpu))
3622                         goto out;
3623                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3624
3625                 r = -ENOMEM;
3626                 if (!u.lapic)
3627                         goto out;
3628                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3629                 if (r)
3630                         goto out;
3631                 r = -EFAULT;
3632                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3633                         goto out;
3634                 r = 0;
3635                 break;
3636         }
3637         case KVM_SET_LAPIC: {
3638                 r = -EINVAL;
3639                 if (!lapic_in_kernel(vcpu))
3640                         goto out;
3641                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3642                 if (IS_ERR(u.lapic)) {
3643                         r = PTR_ERR(u.lapic);
3644                         goto out_nofree;
3645                 }
3646
3647                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3648                 break;
3649         }
3650         case KVM_INTERRUPT: {
3651                 struct kvm_interrupt irq;
3652
3653                 r = -EFAULT;
3654                 if (copy_from_user(&irq, argp, sizeof irq))
3655                         goto out;
3656                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3657                 break;
3658         }
3659         case KVM_NMI: {
3660                 r = kvm_vcpu_ioctl_nmi(vcpu);
3661                 break;
3662         }
3663         case KVM_SMI: {
3664                 r = kvm_vcpu_ioctl_smi(vcpu);
3665                 break;
3666         }
3667         case KVM_SET_CPUID: {
3668                 struct kvm_cpuid __user *cpuid_arg = argp;
3669                 struct kvm_cpuid cpuid;
3670
3671                 r = -EFAULT;
3672                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3673                         goto out;
3674                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3675                 break;
3676         }
3677         case KVM_SET_CPUID2: {
3678                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3679                 struct kvm_cpuid2 cpuid;
3680
3681                 r = -EFAULT;
3682                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3683                         goto out;
3684                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3685                                               cpuid_arg->entries);
3686                 break;
3687         }
3688         case KVM_GET_CPUID2: {
3689                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3690                 struct kvm_cpuid2 cpuid;
3691
3692                 r = -EFAULT;
3693                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3694                         goto out;
3695                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3696                                               cpuid_arg->entries);
3697                 if (r)
3698                         goto out;
3699                 r = -EFAULT;
3700                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3701                         goto out;
3702                 r = 0;
3703                 break;
3704         }
3705         case KVM_GET_MSRS: {
3706                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3707                 r = msr_io(vcpu, argp, do_get_msr, 1);
3708                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3709                 break;
3710         }
3711         case KVM_SET_MSRS: {
3712                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3713                 r = msr_io(vcpu, argp, do_set_msr, 0);
3714                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3715                 break;
3716         }
3717         case KVM_TPR_ACCESS_REPORTING: {
3718                 struct kvm_tpr_access_ctl tac;
3719
3720                 r = -EFAULT;
3721                 if (copy_from_user(&tac, argp, sizeof tac))
3722                         goto out;
3723                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3724                 if (r)
3725                         goto out;
3726                 r = -EFAULT;
3727                 if (copy_to_user(argp, &tac, sizeof tac))
3728                         goto out;
3729                 r = 0;
3730                 break;
3731         };
3732         case KVM_SET_VAPIC_ADDR: {
3733                 struct kvm_vapic_addr va;
3734                 int idx;
3735
3736                 r = -EINVAL;
3737                 if (!lapic_in_kernel(vcpu))
3738                         goto out;
3739                 r = -EFAULT;
3740                 if (copy_from_user(&va, argp, sizeof va))
3741                         goto out;
3742                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3743                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3744                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3745                 break;
3746         }
3747         case KVM_X86_SETUP_MCE: {
3748                 u64 mcg_cap;
3749
3750                 r = -EFAULT;
3751                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3752                         goto out;
3753                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3754                 break;
3755         }
3756         case KVM_X86_SET_MCE: {
3757                 struct kvm_x86_mce mce;
3758
3759                 r = -EFAULT;
3760                 if (copy_from_user(&mce, argp, sizeof mce))
3761                         goto out;
3762                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3763                 break;
3764         }
3765         case KVM_GET_VCPU_EVENTS: {
3766                 struct kvm_vcpu_events events;
3767
3768                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3769
3770                 r = -EFAULT;
3771                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3772                         break;
3773                 r = 0;
3774                 break;
3775         }
3776         case KVM_SET_VCPU_EVENTS: {
3777                 struct kvm_vcpu_events events;
3778
3779                 r = -EFAULT;
3780                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3781                         break;
3782
3783                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3784                 break;
3785         }
3786         case KVM_GET_DEBUGREGS: {
3787                 struct kvm_debugregs dbgregs;
3788
3789                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3790
3791                 r = -EFAULT;
3792                 if (copy_to_user(argp, &dbgregs,
3793                                  sizeof(struct kvm_debugregs)))
3794                         break;
3795                 r = 0;
3796                 break;
3797         }
3798         case KVM_SET_DEBUGREGS: {
3799                 struct kvm_debugregs dbgregs;
3800
3801                 r = -EFAULT;
3802                 if (copy_from_user(&dbgregs, argp,
3803                                    sizeof(struct kvm_debugregs)))
3804                         break;
3805
3806                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3807                 break;
3808         }
3809         case KVM_GET_XSAVE: {
3810                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3811                 r = -ENOMEM;
3812                 if (!u.xsave)
3813                         break;
3814
3815                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3816
3817                 r = -EFAULT;
3818                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3819                         break;
3820                 r = 0;
3821                 break;
3822         }
3823         case KVM_SET_XSAVE: {
3824                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3825                 if (IS_ERR(u.xsave)) {
3826                         r = PTR_ERR(u.xsave);
3827                         goto out_nofree;
3828                 }
3829
3830                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3831                 break;
3832         }
3833         case KVM_GET_XCRS: {
3834                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3835                 r = -ENOMEM;
3836                 if (!u.xcrs)
3837                         break;
3838
3839                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3840
3841                 r = -EFAULT;
3842                 if (copy_to_user(argp, u.xcrs,
3843                                  sizeof(struct kvm_xcrs)))
3844                         break;
3845                 r = 0;
3846                 break;
3847         }
3848         case KVM_SET_XCRS: {
3849                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3850                 if (IS_ERR(u.xcrs)) {
3851                         r = PTR_ERR(u.xcrs);
3852                         goto out_nofree;
3853                 }
3854
3855                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3856                 break;
3857         }
3858         case KVM_SET_TSC_KHZ: {
3859                 u32 user_tsc_khz;
3860
3861                 r = -EINVAL;
3862                 user_tsc_khz = (u32)arg;
3863
3864                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3865                         goto out;
3866
3867                 if (user_tsc_khz == 0)
3868                         user_tsc_khz = tsc_khz;
3869
3870                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3871                         r = 0;
3872
3873                 goto out;
3874         }
3875         case KVM_GET_TSC_KHZ: {
3876                 r = vcpu->arch.virtual_tsc_khz;
3877                 goto out;
3878         }
3879         case KVM_KVMCLOCK_CTRL: {
3880                 r = kvm_set_guest_paused(vcpu);
3881                 goto out;
3882         }
3883         case KVM_ENABLE_CAP: {
3884                 struct kvm_enable_cap cap;
3885
3886                 r = -EFAULT;
3887                 if (copy_from_user(&cap, argp, sizeof(cap)))
3888                         goto out;
3889                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3890                 break;
3891         }
3892         default:
3893                 r = -EINVAL;
3894         }
3895 out:
3896         kfree(u.buffer);
3897 out_nofree:
3898         vcpu_put(vcpu);
3899         return r;
3900 }
3901
3902 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3903 {
3904         return VM_FAULT_SIGBUS;
3905 }
3906
3907 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3908 {
3909         int ret;
3910
3911         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3912                 return -EINVAL;
3913         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3914         return ret;
3915 }
3916
3917 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3918                                               u64 ident_addr)
3919 {
3920         kvm->arch.ept_identity_map_addr = ident_addr;
3921         return 0;
3922 }
3923
3924 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3925                                           u32 kvm_nr_mmu_pages)
3926 {
3927         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3928                 return -EINVAL;
3929
3930         mutex_lock(&kvm->slots_lock);
3931
3932         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3933         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3934
3935         mutex_unlock(&kvm->slots_lock);
3936         return 0;
3937 }
3938
3939 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3940 {
3941         return kvm->arch.n_max_mmu_pages;
3942 }
3943
3944 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3945 {
3946         struct kvm_pic *pic = kvm->arch.vpic;
3947         int r;
3948
3949         r = 0;
3950         switch (chip->chip_id) {
3951         case KVM_IRQCHIP_PIC_MASTER:
3952                 memcpy(&chip->chip.pic, &pic->pics[0],
3953                         sizeof(struct kvm_pic_state));
3954                 break;
3955         case KVM_IRQCHIP_PIC_SLAVE:
3956                 memcpy(&chip->chip.pic, &pic->pics[1],
3957                         sizeof(struct kvm_pic_state));
3958                 break;
3959         case KVM_IRQCHIP_IOAPIC:
3960                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3961                 break;
3962         default:
3963                 r = -EINVAL;
3964                 break;
3965         }
3966         return r;
3967 }
3968
3969 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3970 {
3971         struct kvm_pic *pic = kvm->arch.vpic;
3972         int r;
3973
3974         r = 0;
3975         switch (chip->chip_id) {
3976         case KVM_IRQCHIP_PIC_MASTER:
3977                 spin_lock(&pic->lock);
3978                 memcpy(&pic->pics[0], &chip->chip.pic,
3979                         sizeof(struct kvm_pic_state));
3980                 spin_unlock(&pic->lock);
3981                 break;
3982         case KVM_IRQCHIP_PIC_SLAVE:
3983                 spin_lock(&pic->lock);
3984                 memcpy(&pic->pics[1], &chip->chip.pic,
3985                         sizeof(struct kvm_pic_state));
3986                 spin_unlock(&pic->lock);
3987                 break;
3988         case KVM_IRQCHIP_IOAPIC:
3989                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3990                 break;
3991         default:
3992                 r = -EINVAL;
3993                 break;
3994         }
3995         kvm_pic_update_irq(pic);
3996         return r;
3997 }
3998
3999 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4000 {
4001         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4002
4003         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4004
4005         mutex_lock(&kps->lock);
4006         memcpy(ps, &kps->channels, sizeof(*ps));
4007         mutex_unlock(&kps->lock);
4008         return 0;
4009 }
4010
4011 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4012 {
4013         int i;
4014         struct kvm_pit *pit = kvm->arch.vpit;
4015
4016         mutex_lock(&pit->pit_state.lock);
4017         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4018         for (i = 0; i < 3; i++)
4019                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4020         mutex_unlock(&pit->pit_state.lock);
4021         return 0;
4022 }
4023
4024 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4025 {
4026         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4027         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4028                 sizeof(ps->channels));
4029         ps->flags = kvm->arch.vpit->pit_state.flags;
4030         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4031         memset(&ps->reserved, 0, sizeof(ps->reserved));
4032         return 0;
4033 }
4034
4035 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4036 {
4037         int start = 0;
4038         int i;
4039         u32 prev_legacy, cur_legacy;
4040         struct kvm_pit *pit = kvm->arch.vpit;
4041
4042         mutex_lock(&pit->pit_state.lock);
4043         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4044         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4045         if (!prev_legacy && cur_legacy)
4046                 start = 1;
4047         memcpy(&pit->pit_state.channels, &ps->channels,
4048                sizeof(pit->pit_state.channels));
4049         pit->pit_state.flags = ps->flags;
4050         for (i = 0; i < 3; i++)
4051                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4052                                    start && i == 0);
4053         mutex_unlock(&pit->pit_state.lock);
4054         return 0;
4055 }
4056
4057 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4058                                  struct kvm_reinject_control *control)
4059 {
4060         struct kvm_pit *pit = kvm->arch.vpit;
4061
4062         if (!pit)
4063                 return -ENXIO;
4064
4065         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4066          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4067          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4068          */
4069         mutex_lock(&pit->pit_state.lock);
4070         kvm_pit_set_reinject(pit, control->pit_reinject);
4071         mutex_unlock(&pit->pit_state.lock);
4072
4073         return 0;
4074 }
4075
4076 /**
4077  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4078  * @kvm: kvm instance
4079  * @log: slot id and address to which we copy the log
4080  *
4081  * Steps 1-4 below provide general overview of dirty page logging. See
4082  * kvm_get_dirty_log_protect() function description for additional details.
4083  *
4084  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4085  * always flush the TLB (step 4) even if previous step failed  and the dirty
4086  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4087  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4088  * writes will be marked dirty for next log read.
4089  *
4090  *   1. Take a snapshot of the bit and clear it if needed.
4091  *   2. Write protect the corresponding page.
4092  *   3. Copy the snapshot to the userspace.
4093  *   4. Flush TLB's if needed.
4094  */
4095 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4096 {
4097         bool is_dirty = false;
4098         int r;
4099
4100         mutex_lock(&kvm->slots_lock);
4101
4102         /*
4103          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4104          */
4105         if (kvm_x86_ops->flush_log_dirty)
4106                 kvm_x86_ops->flush_log_dirty(kvm);
4107
4108         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4109
4110         /*
4111          * All the TLBs can be flushed out of mmu lock, see the comments in
4112          * kvm_mmu_slot_remove_write_access().
4113          */
4114         lockdep_assert_held(&kvm->slots_lock);
4115         if (is_dirty)
4116                 kvm_flush_remote_tlbs(kvm);
4117
4118         mutex_unlock(&kvm->slots_lock);
4119         return r;
4120 }
4121
4122 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4123                         bool line_status)
4124 {
4125         if (!irqchip_in_kernel(kvm))
4126                 return -ENXIO;
4127
4128         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4129                                         irq_event->irq, irq_event->level,
4130                                         line_status);
4131         return 0;
4132 }
4133
4134 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4135                                    struct kvm_enable_cap *cap)
4136 {
4137         int r;
4138
4139         if (cap->flags)
4140                 return -EINVAL;
4141
4142         switch (cap->cap) {
4143         case KVM_CAP_DISABLE_QUIRKS:
4144                 kvm->arch.disabled_quirks = cap->args[0];
4145                 r = 0;
4146                 break;
4147         case KVM_CAP_SPLIT_IRQCHIP: {
4148                 mutex_lock(&kvm->lock);
4149                 r = -EINVAL;
4150                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4151                         goto split_irqchip_unlock;
4152                 r = -EEXIST;
4153                 if (irqchip_in_kernel(kvm))
4154                         goto split_irqchip_unlock;
4155                 if (kvm->created_vcpus)
4156                         goto split_irqchip_unlock;
4157                 r = kvm_setup_empty_irq_routing(kvm);
4158                 if (r)
4159                         goto split_irqchip_unlock;
4160                 /* Pairs with irqchip_in_kernel. */
4161                 smp_wmb();
4162                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4163                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4164                 r = 0;
4165 split_irqchip_unlock:
4166                 mutex_unlock(&kvm->lock);
4167                 break;
4168         }
4169         case KVM_CAP_X2APIC_API:
4170                 r = -EINVAL;
4171                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4172                         break;
4173
4174                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4175                         kvm->arch.x2apic_format = true;
4176                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4177                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4178
4179                 r = 0;
4180                 break;
4181         default:
4182                 r = -EINVAL;
4183                 break;
4184         }
4185         return r;
4186 }
4187
4188 long kvm_arch_vm_ioctl(struct file *filp,
4189                        unsigned int ioctl, unsigned long arg)
4190 {
4191         struct kvm *kvm = filp->private_data;
4192         void __user *argp = (void __user *)arg;
4193         int r = -ENOTTY;
4194         /*
4195          * This union makes it completely explicit to gcc-3.x
4196          * that these two variables' stack usage should be
4197          * combined, not added together.
4198          */
4199         union {
4200                 struct kvm_pit_state ps;
4201                 struct kvm_pit_state2 ps2;
4202                 struct kvm_pit_config pit_config;
4203         } u;
4204
4205         switch (ioctl) {
4206         case KVM_SET_TSS_ADDR:
4207                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4208                 break;
4209         case KVM_SET_IDENTITY_MAP_ADDR: {
4210                 u64 ident_addr;
4211
4212                 mutex_lock(&kvm->lock);
4213                 r = -EINVAL;
4214                 if (kvm->created_vcpus)
4215                         goto set_identity_unlock;
4216                 r = -EFAULT;
4217                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4218                         goto set_identity_unlock;
4219                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4220 set_identity_unlock:
4221                 mutex_unlock(&kvm->lock);
4222                 break;
4223         }
4224         case KVM_SET_NR_MMU_PAGES:
4225                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4226                 break;
4227         case KVM_GET_NR_MMU_PAGES:
4228                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4229                 break;
4230         case KVM_CREATE_IRQCHIP: {
4231                 mutex_lock(&kvm->lock);
4232
4233                 r = -EEXIST;
4234                 if (irqchip_in_kernel(kvm))
4235                         goto create_irqchip_unlock;
4236
4237                 r = -EINVAL;
4238                 if (kvm->created_vcpus)
4239                         goto create_irqchip_unlock;
4240
4241                 r = kvm_pic_init(kvm);
4242                 if (r)
4243                         goto create_irqchip_unlock;
4244
4245                 r = kvm_ioapic_init(kvm);
4246                 if (r) {
4247                         kvm_pic_destroy(kvm);
4248                         goto create_irqchip_unlock;
4249                 }
4250
4251                 r = kvm_setup_default_irq_routing(kvm);
4252                 if (r) {
4253                         kvm_ioapic_destroy(kvm);
4254                         kvm_pic_destroy(kvm);
4255                         goto create_irqchip_unlock;
4256                 }
4257                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4258                 smp_wmb();
4259                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4260         create_irqchip_unlock:
4261                 mutex_unlock(&kvm->lock);
4262                 break;
4263         }
4264         case KVM_CREATE_PIT:
4265                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4266                 goto create_pit;
4267         case KVM_CREATE_PIT2:
4268                 r = -EFAULT;
4269                 if (copy_from_user(&u.pit_config, argp,
4270                                    sizeof(struct kvm_pit_config)))
4271                         goto out;
4272         create_pit:
4273                 mutex_lock(&kvm->lock);
4274                 r = -EEXIST;
4275                 if (kvm->arch.vpit)
4276                         goto create_pit_unlock;
4277                 r = -ENOMEM;
4278                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4279                 if (kvm->arch.vpit)
4280                         r = 0;
4281         create_pit_unlock:
4282                 mutex_unlock(&kvm->lock);
4283                 break;
4284         case KVM_GET_IRQCHIP: {
4285                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4286                 struct kvm_irqchip *chip;
4287
4288                 chip = memdup_user(argp, sizeof(*chip));
4289                 if (IS_ERR(chip)) {
4290                         r = PTR_ERR(chip);
4291                         goto out;
4292                 }
4293
4294                 r = -ENXIO;
4295                 if (!irqchip_kernel(kvm))
4296                         goto get_irqchip_out;
4297                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4298                 if (r)
4299                         goto get_irqchip_out;
4300                 r = -EFAULT;
4301                 if (copy_to_user(argp, chip, sizeof *chip))
4302                         goto get_irqchip_out;
4303                 r = 0;
4304         get_irqchip_out:
4305                 kfree(chip);
4306                 break;
4307         }
4308         case KVM_SET_IRQCHIP: {
4309                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4310                 struct kvm_irqchip *chip;
4311
4312                 chip = memdup_user(argp, sizeof(*chip));
4313                 if (IS_ERR(chip)) {
4314                         r = PTR_ERR(chip);
4315                         goto out;
4316                 }
4317
4318                 r = -ENXIO;
4319                 if (!irqchip_kernel(kvm))
4320                         goto set_irqchip_out;
4321                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4322                 if (r)
4323                         goto set_irqchip_out;
4324                 r = 0;
4325         set_irqchip_out:
4326                 kfree(chip);
4327                 break;
4328         }
4329         case KVM_GET_PIT: {
4330                 r = -EFAULT;
4331                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4332                         goto out;
4333                 r = -ENXIO;
4334                 if (!kvm->arch.vpit)
4335                         goto out;
4336                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4337                 if (r)
4338                         goto out;
4339                 r = -EFAULT;
4340                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4341                         goto out;
4342                 r = 0;
4343                 break;
4344         }
4345         case KVM_SET_PIT: {
4346                 r = -EFAULT;
4347                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4348                         goto out;
4349                 r = -ENXIO;
4350                 if (!kvm->arch.vpit)
4351                         goto out;
4352                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4353                 break;
4354         }
4355         case KVM_GET_PIT2: {
4356                 r = -ENXIO;
4357                 if (!kvm->arch.vpit)
4358                         goto out;
4359                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4360                 if (r)
4361                         goto out;
4362                 r = -EFAULT;
4363                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4364                         goto out;
4365                 r = 0;
4366                 break;
4367         }
4368         case KVM_SET_PIT2: {
4369                 r = -EFAULT;
4370                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4371                         goto out;
4372                 r = -ENXIO;
4373                 if (!kvm->arch.vpit)
4374                         goto out;
4375                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4376                 break;
4377         }
4378         case KVM_REINJECT_CONTROL: {
4379                 struct kvm_reinject_control control;
4380                 r =  -EFAULT;
4381                 if (copy_from_user(&control, argp, sizeof(control)))
4382                         goto out;
4383                 r = kvm_vm_ioctl_reinject(kvm, &control);
4384                 break;
4385         }
4386         case KVM_SET_BOOT_CPU_ID:
4387                 r = 0;
4388                 mutex_lock(&kvm->lock);
4389                 if (kvm->created_vcpus)
4390                         r = -EBUSY;
4391                 else
4392                         kvm->arch.bsp_vcpu_id = arg;
4393                 mutex_unlock(&kvm->lock);
4394                 break;
4395         case KVM_XEN_HVM_CONFIG: {
4396                 struct kvm_xen_hvm_config xhc;
4397                 r = -EFAULT;
4398                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4399                         goto out;
4400                 r = -EINVAL;
4401                 if (xhc.flags)
4402                         goto out;
4403                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4404                 r = 0;
4405                 break;
4406         }
4407         case KVM_SET_CLOCK: {
4408                 struct kvm_clock_data user_ns;
4409                 u64 now_ns;
4410
4411                 r = -EFAULT;
4412                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4413                         goto out;
4414
4415                 r = -EINVAL;
4416                 if (user_ns.flags)
4417                         goto out;
4418
4419                 r = 0;
4420                 /*
4421                  * TODO: userspace has to take care of races with VCPU_RUN, so
4422                  * kvm_gen_update_masterclock() can be cut down to locked
4423                  * pvclock_update_vm_gtod_copy().
4424                  */
4425                 kvm_gen_update_masterclock(kvm);
4426                 now_ns = get_kvmclock_ns(kvm);
4427                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4428                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4429                 break;
4430         }
4431         case KVM_GET_CLOCK: {
4432                 struct kvm_clock_data user_ns;
4433                 u64 now_ns;
4434
4435                 now_ns = get_kvmclock_ns(kvm);
4436                 user_ns.clock = now_ns;
4437                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4438                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4439
4440                 r = -EFAULT;
4441                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4442                         goto out;
4443                 r = 0;
4444                 break;
4445         }
4446         case KVM_ENABLE_CAP: {
4447                 struct kvm_enable_cap cap;
4448
4449                 r = -EFAULT;
4450                 if (copy_from_user(&cap, argp, sizeof(cap)))
4451                         goto out;
4452                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4453                 break;
4454         }
4455         case KVM_MEMORY_ENCRYPT_OP: {
4456                 r = -ENOTTY;
4457                 if (kvm_x86_ops->mem_enc_op)
4458                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4459                 break;
4460         }
4461         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4462                 struct kvm_enc_region region;
4463
4464                 r = -EFAULT;
4465                 if (copy_from_user(&region, argp, sizeof(region)))
4466                         goto out;
4467
4468                 r = -ENOTTY;
4469                 if (kvm_x86_ops->mem_enc_reg_region)
4470                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4471                 break;
4472         }
4473         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4474                 struct kvm_enc_region region;
4475
4476                 r = -EFAULT;
4477                 if (copy_from_user(&region, argp, sizeof(region)))
4478                         goto out;
4479
4480                 r = -ENOTTY;
4481                 if (kvm_x86_ops->mem_enc_unreg_region)
4482                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4483                 break;
4484         }
4485         default:
4486                 r = -ENOTTY;
4487         }
4488 out:
4489         return r;
4490 }
4491
4492 static void kvm_init_msr_list(void)
4493 {
4494         u32 dummy[2];
4495         unsigned i, j;
4496
4497         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4498                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4499                         continue;
4500
4501                 /*
4502                  * Even MSRs that are valid in the host may not be exposed
4503                  * to the guests in some cases.
4504                  */
4505                 switch (msrs_to_save[i]) {
4506                 case MSR_IA32_BNDCFGS:
4507                         if (!kvm_x86_ops->mpx_supported())
4508                                 continue;
4509                         break;
4510                 case MSR_TSC_AUX:
4511                         if (!kvm_x86_ops->rdtscp_supported())
4512                                 continue;
4513                         break;
4514                 default:
4515                         break;
4516                 }
4517
4518                 if (j < i)
4519                         msrs_to_save[j] = msrs_to_save[i];
4520                 j++;
4521         }
4522         num_msrs_to_save = j;
4523
4524         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4525                 switch (emulated_msrs[i]) {
4526                 case MSR_IA32_SMBASE:
4527                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4528                                 continue;
4529                         break;
4530                 default:
4531                         break;
4532                 }
4533
4534                 if (j < i)
4535                         emulated_msrs[j] = emulated_msrs[i];
4536                 j++;
4537         }
4538         num_emulated_msrs = j;
4539
4540         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4541                 struct kvm_msr_entry msr;
4542
4543                 msr.index = msr_based_features[i];
4544                 if (kvm_get_msr_feature(&msr))
4545                         continue;
4546
4547                 if (j < i)
4548                         msr_based_features[j] = msr_based_features[i];
4549                 j++;
4550         }
4551         num_msr_based_features = j;
4552 }
4553
4554 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4555                            const void *v)
4556 {
4557         int handled = 0;
4558         int n;
4559
4560         do {
4561                 n = min(len, 8);
4562                 if (!(lapic_in_kernel(vcpu) &&
4563                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4564                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4565                         break;
4566                 handled += n;
4567                 addr += n;
4568                 len -= n;
4569                 v += n;
4570         } while (len);
4571
4572         return handled;
4573 }
4574
4575 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4576 {
4577         int handled = 0;
4578         int n;
4579
4580         do {
4581                 n = min(len, 8);
4582                 if (!(lapic_in_kernel(vcpu) &&
4583                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4584                                          addr, n, v))
4585                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4586                         break;
4587                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4588                 handled += n;
4589                 addr += n;
4590                 len -= n;
4591                 v += n;
4592         } while (len);
4593
4594         return handled;
4595 }
4596
4597 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4598                         struct kvm_segment *var, int seg)
4599 {
4600         kvm_x86_ops->set_segment(vcpu, var, seg);
4601 }
4602
4603 void kvm_get_segment(struct kvm_vcpu *vcpu,
4604                      struct kvm_segment *var, int seg)
4605 {
4606         kvm_x86_ops->get_segment(vcpu, var, seg);
4607 }
4608
4609 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4610                            struct x86_exception *exception)
4611 {
4612         gpa_t t_gpa;
4613
4614         BUG_ON(!mmu_is_nested(vcpu));
4615
4616         /* NPT walks are always user-walks */
4617         access |= PFERR_USER_MASK;
4618         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4619
4620         return t_gpa;
4621 }
4622
4623 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4624                               struct x86_exception *exception)
4625 {
4626         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4627         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4628 }
4629
4630  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4631                                 struct x86_exception *exception)
4632 {
4633         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4634         access |= PFERR_FETCH_MASK;
4635         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4636 }
4637
4638 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4639                                struct x86_exception *exception)
4640 {
4641         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4642         access |= PFERR_WRITE_MASK;
4643         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4644 }
4645
4646 /* uses this to access any guest's mapped memory without checking CPL */
4647 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4648                                 struct x86_exception *exception)
4649 {
4650         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4651 }
4652
4653 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4654                                       struct kvm_vcpu *vcpu, u32 access,
4655                                       struct x86_exception *exception)
4656 {
4657         void *data = val;
4658         int r = X86EMUL_CONTINUE;
4659
4660         while (bytes) {
4661                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4662                                                             exception);
4663                 unsigned offset = addr & (PAGE_SIZE-1);
4664                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4665                 int ret;
4666
4667                 if (gpa == UNMAPPED_GVA)
4668                         return X86EMUL_PROPAGATE_FAULT;
4669                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4670                                                offset, toread);
4671                 if (ret < 0) {
4672                         r = X86EMUL_IO_NEEDED;
4673                         goto out;
4674                 }
4675
4676                 bytes -= toread;
4677                 data += toread;
4678                 addr += toread;
4679         }
4680 out:
4681         return r;
4682 }
4683
4684 /* used for instruction fetching */
4685 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4686                                 gva_t addr, void *val, unsigned int bytes,
4687                                 struct x86_exception *exception)
4688 {
4689         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4690         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4691         unsigned offset;
4692         int ret;
4693
4694         /* Inline kvm_read_guest_virt_helper for speed.  */
4695         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4696                                                     exception);
4697         if (unlikely(gpa == UNMAPPED_GVA))
4698                 return X86EMUL_PROPAGATE_FAULT;
4699
4700         offset = addr & (PAGE_SIZE-1);
4701         if (WARN_ON(offset + bytes > PAGE_SIZE))
4702                 bytes = (unsigned)PAGE_SIZE - offset;
4703         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4704                                        offset, bytes);
4705         if (unlikely(ret < 0))
4706                 return X86EMUL_IO_NEEDED;
4707
4708         return X86EMUL_CONTINUE;
4709 }
4710
4711 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4712                                gva_t addr, void *val, unsigned int bytes,
4713                                struct x86_exception *exception)
4714 {
4715         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4716         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4717
4718         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4719                                           exception);
4720 }
4721 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4722
4723 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4724                                       gva_t addr, void *val, unsigned int bytes,
4725                                       struct x86_exception *exception)
4726 {
4727         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4728         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4729 }
4730
4731 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4732                 unsigned long addr, void *val, unsigned int bytes)
4733 {
4734         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4735         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4736
4737         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4738 }
4739
4740 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4741                                        gva_t addr, void *val,
4742                                        unsigned int bytes,
4743                                        struct x86_exception *exception)
4744 {
4745         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4746         void *data = val;
4747         int r = X86EMUL_CONTINUE;
4748
4749         while (bytes) {
4750                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4751                                                              PFERR_WRITE_MASK,
4752                                                              exception);
4753                 unsigned offset = addr & (PAGE_SIZE-1);
4754                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4755                 int ret;
4756
4757                 if (gpa == UNMAPPED_GVA)
4758                         return X86EMUL_PROPAGATE_FAULT;
4759                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4760                 if (ret < 0) {
4761                         r = X86EMUL_IO_NEEDED;
4762                         goto out;
4763                 }
4764
4765                 bytes -= towrite;
4766                 data += towrite;
4767                 addr += towrite;
4768         }
4769 out:
4770         return r;
4771 }
4772 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4773
4774 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4775                             gpa_t gpa, bool write)
4776 {
4777         /* For APIC access vmexit */
4778         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4779                 return 1;
4780
4781         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4782                 trace_vcpu_match_mmio(gva, gpa, write, true);
4783                 return 1;
4784         }
4785
4786         return 0;
4787 }
4788
4789 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4790                                 gpa_t *gpa, struct x86_exception *exception,
4791                                 bool write)
4792 {
4793         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4794                 | (write ? PFERR_WRITE_MASK : 0);
4795
4796         /*
4797          * currently PKRU is only applied to ept enabled guest so
4798          * there is no pkey in EPT page table for L1 guest or EPT
4799          * shadow page table for L2 guest.
4800          */
4801         if (vcpu_match_mmio_gva(vcpu, gva)
4802             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4803                                  vcpu->arch.access, 0, access)) {
4804                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4805                                         (gva & (PAGE_SIZE - 1));
4806                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4807                 return 1;
4808         }
4809
4810         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4811
4812         if (*gpa == UNMAPPED_GVA)
4813                 return -1;
4814
4815         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4816 }
4817
4818 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4819                         const void *val, int bytes)
4820 {
4821         int ret;
4822
4823         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4824         if (ret < 0)
4825                 return 0;
4826         kvm_page_track_write(vcpu, gpa, val, bytes);
4827         return 1;
4828 }
4829
4830 struct read_write_emulator_ops {
4831         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4832                                   int bytes);
4833         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4834                                   void *val, int bytes);
4835         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4836                                int bytes, void *val);
4837         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4838                                     void *val, int bytes);
4839         bool write;
4840 };
4841
4842 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4843 {
4844         if (vcpu->mmio_read_completed) {
4845                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4846                                vcpu->mmio_fragments[0].gpa, val);
4847                 vcpu->mmio_read_completed = 0;
4848                 return 1;
4849         }
4850
4851         return 0;
4852 }
4853
4854 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4855                         void *val, int bytes)
4856 {
4857         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4858 }
4859
4860 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4861                          void *val, int bytes)
4862 {
4863         return emulator_write_phys(vcpu, gpa, val, bytes);
4864 }
4865
4866 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4867 {
4868         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4869         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4870 }
4871
4872 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4873                           void *val, int bytes)
4874 {
4875         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4876         return X86EMUL_IO_NEEDED;
4877 }
4878
4879 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4880                            void *val, int bytes)
4881 {
4882         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4883
4884         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4885         return X86EMUL_CONTINUE;
4886 }
4887
4888 static const struct read_write_emulator_ops read_emultor = {
4889         .read_write_prepare = read_prepare,
4890         .read_write_emulate = read_emulate,
4891         .read_write_mmio = vcpu_mmio_read,
4892         .read_write_exit_mmio = read_exit_mmio,
4893 };
4894
4895 static const struct read_write_emulator_ops write_emultor = {
4896         .read_write_emulate = write_emulate,
4897         .read_write_mmio = write_mmio,
4898         .read_write_exit_mmio = write_exit_mmio,
4899         .write = true,
4900 };
4901
4902 static int emulator_read_write_onepage(unsigned long addr, void *val,
4903                                        unsigned int bytes,
4904                                        struct x86_exception *exception,
4905                                        struct kvm_vcpu *vcpu,
4906                                        const struct read_write_emulator_ops *ops)
4907 {
4908         gpa_t gpa;
4909         int handled, ret;
4910         bool write = ops->write;
4911         struct kvm_mmio_fragment *frag;
4912         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4913
4914         /*
4915          * If the exit was due to a NPF we may already have a GPA.
4916          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4917          * Note, this cannot be used on string operations since string
4918          * operation using rep will only have the initial GPA from the NPF
4919          * occurred.
4920          */
4921         if (vcpu->arch.gpa_available &&
4922             emulator_can_use_gpa(ctxt) &&
4923             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4924                 gpa = vcpu->arch.gpa_val;
4925                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4926         } else {
4927                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4928                 if (ret < 0)
4929                         return X86EMUL_PROPAGATE_FAULT;
4930         }
4931
4932         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4933                 return X86EMUL_CONTINUE;
4934
4935         /*
4936          * Is this MMIO handled locally?
4937          */
4938         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4939         if (handled == bytes)
4940                 return X86EMUL_CONTINUE;
4941
4942         gpa += handled;
4943         bytes -= handled;
4944         val += handled;
4945
4946         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4947         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4948         frag->gpa = gpa;
4949         frag->data = val;
4950         frag->len = bytes;
4951         return X86EMUL_CONTINUE;
4952 }
4953
4954 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4955                         unsigned long addr,
4956                         void *val, unsigned int bytes,
4957                         struct x86_exception *exception,
4958                         const struct read_write_emulator_ops *ops)
4959 {
4960         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4961         gpa_t gpa;
4962         int rc;
4963
4964         if (ops->read_write_prepare &&
4965                   ops->read_write_prepare(vcpu, val, bytes))
4966                 return X86EMUL_CONTINUE;
4967
4968         vcpu->mmio_nr_fragments = 0;
4969
4970         /* Crossing a page boundary? */
4971         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4972                 int now;
4973
4974                 now = -addr & ~PAGE_MASK;
4975                 rc = emulator_read_write_onepage(addr, val, now, exception,
4976                                                  vcpu, ops);
4977
4978                 if (rc != X86EMUL_CONTINUE)
4979                         return rc;
4980                 addr += now;
4981                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4982                         addr = (u32)addr;
4983                 val += now;
4984                 bytes -= now;
4985         }
4986
4987         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4988                                          vcpu, ops);
4989         if (rc != X86EMUL_CONTINUE)
4990                 return rc;
4991
4992         if (!vcpu->mmio_nr_fragments)
4993                 return rc;
4994
4995         gpa = vcpu->mmio_fragments[0].gpa;
4996
4997         vcpu->mmio_needed = 1;
4998         vcpu->mmio_cur_fragment = 0;
4999
5000         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5001         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5002         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5003         vcpu->run->mmio.phys_addr = gpa;
5004
5005         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5006 }
5007
5008 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5009                                   unsigned long addr,
5010                                   void *val,
5011                                   unsigned int bytes,
5012                                   struct x86_exception *exception)
5013 {
5014         return emulator_read_write(ctxt, addr, val, bytes,
5015                                    exception, &read_emultor);
5016 }
5017
5018 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5019                             unsigned long addr,
5020                             const void *val,
5021                             unsigned int bytes,
5022                             struct x86_exception *exception)
5023 {
5024         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5025                                    exception, &write_emultor);
5026 }
5027
5028 #define CMPXCHG_TYPE(t, ptr, old, new) \
5029         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5030
5031 #ifdef CONFIG_X86_64
5032 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5033 #else
5034 #  define CMPXCHG64(ptr, old, new) \
5035         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5036 #endif
5037
5038 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5039                                      unsigned long addr,
5040                                      const void *old,
5041                                      const void *new,
5042                                      unsigned int bytes,
5043                                      struct x86_exception *exception)
5044 {
5045         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5046         gpa_t gpa;
5047         struct page *page;
5048         char *kaddr;
5049         bool exchanged;
5050
5051         /* guests cmpxchg8b have to be emulated atomically */
5052         if (bytes > 8 || (bytes & (bytes - 1)))
5053                 goto emul_write;
5054
5055         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5056
5057         if (gpa == UNMAPPED_GVA ||
5058             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5059                 goto emul_write;
5060
5061         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5062                 goto emul_write;
5063
5064         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5065         if (is_error_page(page))
5066                 goto emul_write;
5067
5068         kaddr = kmap_atomic(page);
5069         kaddr += offset_in_page(gpa);
5070         switch (bytes) {
5071         case 1:
5072                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5073                 break;
5074         case 2:
5075                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5076                 break;
5077         case 4:
5078                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5079                 break;
5080         case 8:
5081                 exchanged = CMPXCHG64(kaddr, old, new);
5082                 break;
5083         default:
5084                 BUG();
5085         }
5086         kunmap_atomic(kaddr);
5087         kvm_release_page_dirty(page);
5088
5089         if (!exchanged)
5090                 return X86EMUL_CMPXCHG_FAILED;
5091
5092         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5093         kvm_page_track_write(vcpu, gpa, new, bytes);
5094
5095         return X86EMUL_CONTINUE;
5096
5097 emul_write:
5098         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5099
5100         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5101 }
5102
5103 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5104 {
5105         int r = 0, i;
5106
5107         for (i = 0; i < vcpu->arch.pio.count; i++) {
5108                 if (vcpu->arch.pio.in)
5109                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5110                                             vcpu->arch.pio.size, pd);
5111                 else
5112                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5113                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5114                                              pd);
5115                 if (r)
5116                         break;
5117                 pd += vcpu->arch.pio.size;
5118         }
5119         return r;
5120 }
5121
5122 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5123                                unsigned short port, void *val,
5124                                unsigned int count, bool in)
5125 {
5126         vcpu->arch.pio.port = port;
5127         vcpu->arch.pio.in = in;
5128         vcpu->arch.pio.count  = count;
5129         vcpu->arch.pio.size = size;
5130
5131         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5132                 vcpu->arch.pio.count = 0;
5133                 return 1;
5134         }
5135
5136         vcpu->run->exit_reason = KVM_EXIT_IO;
5137         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5138         vcpu->run->io.size = size;
5139         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5140         vcpu->run->io.count = count;
5141         vcpu->run->io.port = port;
5142
5143         return 0;
5144 }
5145
5146 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5147                                     int size, unsigned short port, void *val,
5148                                     unsigned int count)
5149 {
5150         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5151         int ret;
5152
5153         if (vcpu->arch.pio.count)
5154                 goto data_avail;
5155
5156         memset(vcpu->arch.pio_data, 0, size * count);
5157
5158         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5159         if (ret) {
5160 data_avail:
5161                 memcpy(val, vcpu->arch.pio_data, size * count);
5162                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5163                 vcpu->arch.pio.count = 0;
5164                 return 1;
5165         }
5166
5167         return 0;
5168 }
5169
5170 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5171                                      int size, unsigned short port,
5172                                      const void *val, unsigned int count)
5173 {
5174         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5175
5176         memcpy(vcpu->arch.pio_data, val, size * count);
5177         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5178         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5179 }
5180
5181 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5182 {
5183         return kvm_x86_ops->get_segment_base(vcpu, seg);
5184 }
5185
5186 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5187 {
5188         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5189 }
5190
5191 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5192 {
5193         if (!need_emulate_wbinvd(vcpu))
5194                 return X86EMUL_CONTINUE;
5195
5196         if (kvm_x86_ops->has_wbinvd_exit()) {
5197                 int cpu = get_cpu();
5198
5199                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5200                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5201                                 wbinvd_ipi, NULL, 1);
5202                 put_cpu();
5203                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5204         } else
5205                 wbinvd();
5206         return X86EMUL_CONTINUE;
5207 }
5208
5209 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5210 {
5211         kvm_emulate_wbinvd_noskip(vcpu);
5212         return kvm_skip_emulated_instruction(vcpu);
5213 }
5214 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5215
5216
5217
5218 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5219 {
5220         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5221 }
5222
5223 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5224                            unsigned long *dest)
5225 {
5226         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5227 }
5228
5229 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5230                            unsigned long value)
5231 {
5232
5233         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5234 }
5235
5236 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5237 {
5238         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5239 }
5240
5241 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5242 {
5243         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5244         unsigned long value;
5245
5246         switch (cr) {
5247         case 0:
5248                 value = kvm_read_cr0(vcpu);
5249                 break;
5250         case 2:
5251                 value = vcpu->arch.cr2;
5252                 break;
5253         case 3:
5254                 value = kvm_read_cr3(vcpu);
5255                 break;
5256         case 4:
5257                 value = kvm_read_cr4(vcpu);
5258                 break;
5259         case 8:
5260                 value = kvm_get_cr8(vcpu);
5261                 break;
5262         default:
5263                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5264                 return 0;
5265         }
5266
5267         return value;
5268 }
5269
5270 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5271 {
5272         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5273         int res = 0;
5274
5275         switch (cr) {
5276         case 0:
5277                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5278                 break;
5279         case 2:
5280                 vcpu->arch.cr2 = val;
5281                 break;
5282         case 3:
5283                 res = kvm_set_cr3(vcpu, val);
5284                 break;
5285         case 4:
5286                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5287                 break;
5288         case 8:
5289                 res = kvm_set_cr8(vcpu, val);
5290                 break;
5291         default:
5292                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5293                 res = -1;
5294         }
5295
5296         return res;
5297 }
5298
5299 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5300 {
5301         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5302 }
5303
5304 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5305 {
5306         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5307 }
5308
5309 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5310 {
5311         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5312 }
5313
5314 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5315 {
5316         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5317 }
5318
5319 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5320 {
5321         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5322 }
5323
5324 static unsigned long emulator_get_cached_segment_base(
5325         struct x86_emulate_ctxt *ctxt, int seg)
5326 {
5327         return get_segment_base(emul_to_vcpu(ctxt), seg);
5328 }
5329
5330 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5331                                  struct desc_struct *desc, u32 *base3,
5332                                  int seg)
5333 {
5334         struct kvm_segment var;
5335
5336         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5337         *selector = var.selector;
5338
5339         if (var.unusable) {
5340                 memset(desc, 0, sizeof(*desc));
5341                 if (base3)
5342                         *base3 = 0;
5343                 return false;
5344         }
5345
5346         if (var.g)
5347                 var.limit >>= 12;
5348         set_desc_limit(desc, var.limit);
5349         set_desc_base(desc, (unsigned long)var.base);
5350 #ifdef CONFIG_X86_64
5351         if (base3)
5352                 *base3 = var.base >> 32;
5353 #endif
5354         desc->type = var.type;
5355         desc->s = var.s;
5356         desc->dpl = var.dpl;
5357         desc->p = var.present;
5358         desc->avl = var.avl;
5359         desc->l = var.l;
5360         desc->d = var.db;
5361         desc->g = var.g;
5362
5363         return true;
5364 }
5365
5366 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5367                                  struct desc_struct *desc, u32 base3,
5368                                  int seg)
5369 {
5370         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5371         struct kvm_segment var;
5372
5373         var.selector = selector;
5374         var.base = get_desc_base(desc);
5375 #ifdef CONFIG_X86_64
5376         var.base |= ((u64)base3) << 32;
5377 #endif
5378         var.limit = get_desc_limit(desc);
5379         if (desc->g)
5380                 var.limit = (var.limit << 12) | 0xfff;
5381         var.type = desc->type;
5382         var.dpl = desc->dpl;
5383         var.db = desc->d;
5384         var.s = desc->s;
5385         var.l = desc->l;
5386         var.g = desc->g;
5387         var.avl = desc->avl;
5388         var.present = desc->p;
5389         var.unusable = !var.present;
5390         var.padding = 0;
5391
5392         kvm_set_segment(vcpu, &var, seg);
5393         return;
5394 }
5395
5396 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5397                             u32 msr_index, u64 *pdata)
5398 {
5399         struct msr_data msr;
5400         int r;
5401
5402         msr.index = msr_index;
5403         msr.host_initiated = false;
5404         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5405         if (r)
5406                 return r;
5407
5408         *pdata = msr.data;
5409         return 0;
5410 }
5411
5412 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5413                             u32 msr_index, u64 data)
5414 {
5415         struct msr_data msr;
5416
5417         msr.data = data;
5418         msr.index = msr_index;
5419         msr.host_initiated = false;
5420         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5421 }
5422
5423 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5424 {
5425         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5426
5427         return vcpu->arch.smbase;
5428 }
5429
5430 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5431 {
5432         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5433
5434         vcpu->arch.smbase = smbase;
5435 }
5436
5437 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5438                               u32 pmc)
5439 {
5440         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5441 }
5442
5443 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5444                              u32 pmc, u64 *pdata)
5445 {
5446         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5447 }
5448
5449 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5450 {
5451         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5452 }
5453
5454 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5455                               struct x86_instruction_info *info,
5456                               enum x86_intercept_stage stage)
5457 {
5458         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5459 }
5460
5461 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5462                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5463 {
5464         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5465 }
5466
5467 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5468 {
5469         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5470 }
5471
5472 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5473 {
5474         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5475 }
5476
5477 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5478 {
5479         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5480 }
5481
5482 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5483 {
5484         return emul_to_vcpu(ctxt)->arch.hflags;
5485 }
5486
5487 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5488 {
5489         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5490 }
5491
5492 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5493 {
5494         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5495 }
5496
5497 static const struct x86_emulate_ops emulate_ops = {
5498         .read_gpr            = emulator_read_gpr,
5499         .write_gpr           = emulator_write_gpr,
5500         .read_std            = kvm_read_guest_virt_system,
5501         .write_std           = kvm_write_guest_virt_system,
5502         .read_phys           = kvm_read_guest_phys_system,
5503         .fetch               = kvm_fetch_guest_virt,
5504         .read_emulated       = emulator_read_emulated,
5505         .write_emulated      = emulator_write_emulated,
5506         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5507         .invlpg              = emulator_invlpg,
5508         .pio_in_emulated     = emulator_pio_in_emulated,
5509         .pio_out_emulated    = emulator_pio_out_emulated,
5510         .get_segment         = emulator_get_segment,
5511         .set_segment         = emulator_set_segment,
5512         .get_cached_segment_base = emulator_get_cached_segment_base,
5513         .get_gdt             = emulator_get_gdt,
5514         .get_idt             = emulator_get_idt,
5515         .set_gdt             = emulator_set_gdt,
5516         .set_idt             = emulator_set_idt,
5517         .get_cr              = emulator_get_cr,
5518         .set_cr              = emulator_set_cr,
5519         .cpl                 = emulator_get_cpl,
5520         .get_dr              = emulator_get_dr,
5521         .set_dr              = emulator_set_dr,
5522         .get_smbase          = emulator_get_smbase,
5523         .set_smbase          = emulator_set_smbase,
5524         .set_msr             = emulator_set_msr,
5525         .get_msr             = emulator_get_msr,
5526         .check_pmc           = emulator_check_pmc,
5527         .read_pmc            = emulator_read_pmc,
5528         .halt                = emulator_halt,
5529         .wbinvd              = emulator_wbinvd,
5530         .fix_hypercall       = emulator_fix_hypercall,
5531         .intercept           = emulator_intercept,
5532         .get_cpuid           = emulator_get_cpuid,
5533         .set_nmi_mask        = emulator_set_nmi_mask,
5534         .get_hflags          = emulator_get_hflags,
5535         .set_hflags          = emulator_set_hflags,
5536         .pre_leave_smm       = emulator_pre_leave_smm,
5537 };
5538
5539 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5540 {
5541         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5542         /*
5543          * an sti; sti; sequence only disable interrupts for the first
5544          * instruction. So, if the last instruction, be it emulated or
5545          * not, left the system with the INT_STI flag enabled, it
5546          * means that the last instruction is an sti. We should not
5547          * leave the flag on in this case. The same goes for mov ss
5548          */
5549         if (int_shadow & mask)
5550                 mask = 0;
5551         if (unlikely(int_shadow || mask)) {
5552                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5553                 if (!mask)
5554                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5555         }
5556 }
5557
5558 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5559 {
5560         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5561         if (ctxt->exception.vector == PF_VECTOR)
5562                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5563
5564         if (ctxt->exception.error_code_valid)
5565                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5566                                       ctxt->exception.error_code);
5567         else
5568                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5569         return false;
5570 }
5571
5572 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5573 {
5574         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5575         int cs_db, cs_l;
5576
5577         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5578
5579         ctxt->eflags = kvm_get_rflags(vcpu);
5580         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5581
5582         ctxt->eip = kvm_rip_read(vcpu);
5583         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5584                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5585                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5586                      cs_db                              ? X86EMUL_MODE_PROT32 :
5587                                                           X86EMUL_MODE_PROT16;
5588         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5589         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5590         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5591
5592         init_decode_cache(ctxt);
5593         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5594 }
5595
5596 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5597 {
5598         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5599         int ret;
5600
5601         init_emulate_ctxt(vcpu);
5602
5603         ctxt->op_bytes = 2;
5604         ctxt->ad_bytes = 2;
5605         ctxt->_eip = ctxt->eip + inc_eip;
5606         ret = emulate_int_real(ctxt, irq);
5607
5608         if (ret != X86EMUL_CONTINUE)
5609                 return EMULATE_FAIL;
5610
5611         ctxt->eip = ctxt->_eip;
5612         kvm_rip_write(vcpu, ctxt->eip);
5613         kvm_set_rflags(vcpu, ctxt->eflags);
5614
5615         if (irq == NMI_VECTOR)
5616                 vcpu->arch.nmi_pending = 0;
5617         else
5618                 vcpu->arch.interrupt.pending = false;
5619
5620         return EMULATE_DONE;
5621 }
5622 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5623
5624 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5625 {
5626         int r = EMULATE_DONE;
5627
5628         ++vcpu->stat.insn_emulation_fail;
5629         trace_kvm_emulate_insn_failed(vcpu);
5630         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5631                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5632                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5633                 vcpu->run->internal.ndata = 0;
5634                 r = EMULATE_USER_EXIT;
5635         }
5636         kvm_queue_exception(vcpu, UD_VECTOR);
5637
5638         return r;
5639 }
5640
5641 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5642                                   bool write_fault_to_shadow_pgtable,
5643                                   int emulation_type)
5644 {
5645         gpa_t gpa = cr2;
5646         kvm_pfn_t pfn;
5647
5648         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5649                 return false;
5650
5651         if (!vcpu->arch.mmu.direct_map) {
5652                 /*
5653                  * Write permission should be allowed since only
5654                  * write access need to be emulated.
5655                  */
5656                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5657
5658                 /*
5659                  * If the mapping is invalid in guest, let cpu retry
5660                  * it to generate fault.
5661                  */
5662                 if (gpa == UNMAPPED_GVA)
5663                         return true;
5664         }
5665
5666         /*
5667          * Do not retry the unhandleable instruction if it faults on the
5668          * readonly host memory, otherwise it will goto a infinite loop:
5669          * retry instruction -> write #PF -> emulation fail -> retry
5670          * instruction -> ...
5671          */
5672         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5673
5674         /*
5675          * If the instruction failed on the error pfn, it can not be fixed,
5676          * report the error to userspace.
5677          */
5678         if (is_error_noslot_pfn(pfn))
5679                 return false;
5680
5681         kvm_release_pfn_clean(pfn);
5682
5683         /* The instructions are well-emulated on direct mmu. */
5684         if (vcpu->arch.mmu.direct_map) {
5685                 unsigned int indirect_shadow_pages;
5686
5687                 spin_lock(&vcpu->kvm->mmu_lock);
5688                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5689                 spin_unlock(&vcpu->kvm->mmu_lock);
5690
5691                 if (indirect_shadow_pages)
5692                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5693
5694                 return true;
5695         }
5696
5697         /*
5698          * if emulation was due to access to shadowed page table
5699          * and it failed try to unshadow page and re-enter the
5700          * guest to let CPU execute the instruction.
5701          */
5702         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5703
5704         /*
5705          * If the access faults on its page table, it can not
5706          * be fixed by unprotecting shadow page and it should
5707          * be reported to userspace.
5708          */
5709         return !write_fault_to_shadow_pgtable;
5710 }
5711
5712 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5713                               unsigned long cr2,  int emulation_type)
5714 {
5715         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5716         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5717
5718         last_retry_eip = vcpu->arch.last_retry_eip;
5719         last_retry_addr = vcpu->arch.last_retry_addr;
5720
5721         /*
5722          * If the emulation is caused by #PF and it is non-page_table
5723          * writing instruction, it means the VM-EXIT is caused by shadow
5724          * page protected, we can zap the shadow page and retry this
5725          * instruction directly.
5726          *
5727          * Note: if the guest uses a non-page-table modifying instruction
5728          * on the PDE that points to the instruction, then we will unmap
5729          * the instruction and go to an infinite loop. So, we cache the
5730          * last retried eip and the last fault address, if we meet the eip
5731          * and the address again, we can break out of the potential infinite
5732          * loop.
5733          */
5734         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5735
5736         if (!(emulation_type & EMULTYPE_RETRY))
5737                 return false;
5738
5739         if (x86_page_table_writing_insn(ctxt))
5740                 return false;
5741
5742         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5743                 return false;
5744
5745         vcpu->arch.last_retry_eip = ctxt->eip;
5746         vcpu->arch.last_retry_addr = cr2;
5747
5748         if (!vcpu->arch.mmu.direct_map)
5749                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5750
5751         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5752
5753         return true;
5754 }
5755
5756 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5757 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5758
5759 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5760 {
5761         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5762                 /* This is a good place to trace that we are exiting SMM.  */
5763                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5764
5765                 /* Process a latched INIT or SMI, if any.  */
5766                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5767         }
5768
5769         kvm_mmu_reset_context(vcpu);
5770 }
5771
5772 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5773 {
5774         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5775
5776         vcpu->arch.hflags = emul_flags;
5777
5778         if (changed & HF_SMM_MASK)
5779                 kvm_smm_changed(vcpu);
5780 }
5781
5782 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5783                                 unsigned long *db)
5784 {
5785         u32 dr6 = 0;
5786         int i;
5787         u32 enable, rwlen;
5788
5789         enable = dr7;
5790         rwlen = dr7 >> 16;
5791         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5792                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5793                         dr6 |= (1 << i);
5794         return dr6;
5795 }
5796
5797 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5798 {
5799         struct kvm_run *kvm_run = vcpu->run;
5800
5801         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5802                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5803                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5804                 kvm_run->debug.arch.exception = DB_VECTOR;
5805                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5806                 *r = EMULATE_USER_EXIT;
5807         } else {
5808                 /*
5809                  * "Certain debug exceptions may clear bit 0-3.  The
5810                  * remaining contents of the DR6 register are never
5811                  * cleared by the processor".
5812                  */
5813                 vcpu->arch.dr6 &= ~15;
5814                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5815                 kvm_queue_exception(vcpu, DB_VECTOR);
5816         }
5817 }
5818
5819 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5820 {
5821         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5822         int r = EMULATE_DONE;
5823
5824         kvm_x86_ops->skip_emulated_instruction(vcpu);
5825
5826         /*
5827          * rflags is the old, "raw" value of the flags.  The new value has
5828          * not been saved yet.
5829          *
5830          * This is correct even for TF set by the guest, because "the
5831          * processor will not generate this exception after the instruction
5832          * that sets the TF flag".
5833          */
5834         if (unlikely(rflags & X86_EFLAGS_TF))
5835                 kvm_vcpu_do_singlestep(vcpu, &r);
5836         return r == EMULATE_DONE;
5837 }
5838 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5839
5840 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5841 {
5842         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5843             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5844                 struct kvm_run *kvm_run = vcpu->run;
5845                 unsigned long eip = kvm_get_linear_rip(vcpu);
5846                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5847                                            vcpu->arch.guest_debug_dr7,
5848                                            vcpu->arch.eff_db);
5849
5850                 if (dr6 != 0) {
5851                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5852                         kvm_run->debug.arch.pc = eip;
5853                         kvm_run->debug.arch.exception = DB_VECTOR;
5854                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5855                         *r = EMULATE_USER_EXIT;
5856                         return true;
5857                 }
5858         }
5859
5860         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5861             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5862                 unsigned long eip = kvm_get_linear_rip(vcpu);
5863                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5864                                            vcpu->arch.dr7,
5865                                            vcpu->arch.db);
5866
5867                 if (dr6 != 0) {
5868                         vcpu->arch.dr6 &= ~15;
5869                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5870                         kvm_queue_exception(vcpu, DB_VECTOR);
5871                         *r = EMULATE_DONE;
5872                         return true;
5873                 }
5874         }
5875
5876         return false;
5877 }
5878
5879 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5880                             unsigned long cr2,
5881                             int emulation_type,
5882                             void *insn,
5883                             int insn_len)
5884 {
5885         int r;
5886         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5887         bool writeback = true;
5888         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5889
5890         /*
5891          * Clear write_fault_to_shadow_pgtable here to ensure it is
5892          * never reused.
5893          */
5894         vcpu->arch.write_fault_to_shadow_pgtable = false;
5895         kvm_clear_exception_queue(vcpu);
5896
5897         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5898                 init_emulate_ctxt(vcpu);
5899
5900                 /*
5901                  * We will reenter on the same instruction since
5902                  * we do not set complete_userspace_io.  This does not
5903                  * handle watchpoints yet, those would be handled in
5904                  * the emulate_ops.
5905                  */
5906                 if (!(emulation_type & EMULTYPE_SKIP) &&
5907                     kvm_vcpu_check_breakpoint(vcpu, &r))
5908                         return r;
5909
5910                 ctxt->interruptibility = 0;
5911                 ctxt->have_exception = false;
5912                 ctxt->exception.vector = -1;
5913                 ctxt->perm_ok = false;
5914
5915                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5916
5917                 r = x86_decode_insn(ctxt, insn, insn_len);
5918
5919                 trace_kvm_emulate_insn_start(vcpu);
5920                 ++vcpu->stat.insn_emulation;
5921                 if (r != EMULATION_OK)  {
5922                         if (emulation_type & EMULTYPE_TRAP_UD)
5923                                 return EMULATE_FAIL;
5924                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5925                                                 emulation_type))
5926                                 return EMULATE_DONE;
5927                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5928                                 return EMULATE_DONE;
5929                         if (emulation_type & EMULTYPE_SKIP)
5930                                 return EMULATE_FAIL;
5931                         return handle_emulation_failure(vcpu);
5932                 }
5933         }
5934
5935         if (emulation_type & EMULTYPE_SKIP) {
5936                 kvm_rip_write(vcpu, ctxt->_eip);
5937                 if (ctxt->eflags & X86_EFLAGS_RF)
5938                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5939                 return EMULATE_DONE;
5940         }
5941
5942         if (retry_instruction(ctxt, cr2, emulation_type))
5943                 return EMULATE_DONE;
5944
5945         /* this is needed for vmware backdoor interface to work since it
5946            changes registers values  during IO operation */
5947         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5948                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5949                 emulator_invalidate_register_cache(ctxt);
5950         }
5951
5952 restart:
5953         /* Save the faulting GPA (cr2) in the address field */
5954         ctxt->exception.address = cr2;
5955
5956         r = x86_emulate_insn(ctxt);
5957
5958         if (r == EMULATION_INTERCEPTED)
5959                 return EMULATE_DONE;
5960
5961         if (r == EMULATION_FAILED) {
5962                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5963                                         emulation_type))
5964                         return EMULATE_DONE;
5965
5966                 return handle_emulation_failure(vcpu);
5967         }
5968
5969         if (ctxt->have_exception) {
5970                 r = EMULATE_DONE;
5971                 if (inject_emulated_exception(vcpu))
5972                         return r;
5973         } else if (vcpu->arch.pio.count) {
5974                 if (!vcpu->arch.pio.in) {
5975                         /* FIXME: return into emulator if single-stepping.  */
5976                         vcpu->arch.pio.count = 0;
5977                 } else {
5978                         writeback = false;
5979                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5980                 }
5981                 r = EMULATE_USER_EXIT;
5982         } else if (vcpu->mmio_needed) {
5983                 if (!vcpu->mmio_is_write)
5984                         writeback = false;
5985                 r = EMULATE_USER_EXIT;
5986                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5987         } else if (r == EMULATION_RESTART)
5988                 goto restart;
5989         else
5990                 r = EMULATE_DONE;
5991
5992         if (writeback) {
5993                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5994                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5995                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5996                 kvm_rip_write(vcpu, ctxt->eip);
5997                 if (r == EMULATE_DONE &&
5998                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5999                         kvm_vcpu_do_singlestep(vcpu, &r);
6000                 if (!ctxt->have_exception ||
6001                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6002                         __kvm_set_rflags(vcpu, ctxt->eflags);
6003
6004                 /*
6005                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6006                  * do nothing, and it will be requested again as soon as
6007                  * the shadow expires.  But we still need to check here,
6008                  * because POPF has no interrupt shadow.
6009                  */
6010                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6011                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6012         } else
6013                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6014
6015         return r;
6016 }
6017 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6018
6019 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
6020 {
6021         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6022         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6023                                             size, port, &val, 1);
6024         /* do not return to emulator after return from userspace */
6025         vcpu->arch.pio.count = 0;
6026         return ret;
6027 }
6028 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
6029
6030 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6031 {
6032         unsigned long val;
6033
6034         /* We should only ever be called with arch.pio.count equal to 1 */
6035         BUG_ON(vcpu->arch.pio.count != 1);
6036
6037         /* For size less than 4 we merge, else we zero extend */
6038         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6039                                         : 0;
6040
6041         /*
6042          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6043          * the copy and tracing
6044          */
6045         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6046                                  vcpu->arch.pio.port, &val, 1);
6047         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6048
6049         return 1;
6050 }
6051
6052 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
6053 {
6054         unsigned long val;
6055         int ret;
6056
6057         /* For size less than 4 we merge, else we zero extend */
6058         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6059
6060         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6061                                        &val, 1);
6062         if (ret) {
6063                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6064                 return ret;
6065         }
6066
6067         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6068
6069         return 0;
6070 }
6071 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
6072
6073 static int kvmclock_cpu_down_prep(unsigned int cpu)
6074 {
6075         __this_cpu_write(cpu_tsc_khz, 0);
6076         return 0;
6077 }
6078
6079 static void tsc_khz_changed(void *data)
6080 {
6081         struct cpufreq_freqs *freq = data;
6082         unsigned long khz = 0;
6083
6084         if (data)
6085                 khz = freq->new;
6086         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6087                 khz = cpufreq_quick_get(raw_smp_processor_id());
6088         if (!khz)
6089                 khz = tsc_khz;
6090         __this_cpu_write(cpu_tsc_khz, khz);
6091 }
6092
6093 #ifdef CONFIG_X86_64
6094 static void kvm_hyperv_tsc_notifier(void)
6095 {
6096         struct kvm *kvm;
6097         struct kvm_vcpu *vcpu;
6098         int cpu;
6099
6100         spin_lock(&kvm_lock);
6101         list_for_each_entry(kvm, &vm_list, vm_list)
6102                 kvm_make_mclock_inprogress_request(kvm);
6103
6104         hyperv_stop_tsc_emulation();
6105
6106         /* TSC frequency always matches when on Hyper-V */
6107         for_each_present_cpu(cpu)
6108                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6109         kvm_max_guest_tsc_khz = tsc_khz;
6110
6111         list_for_each_entry(kvm, &vm_list, vm_list) {
6112                 struct kvm_arch *ka = &kvm->arch;
6113
6114                 spin_lock(&ka->pvclock_gtod_sync_lock);
6115
6116                 pvclock_update_vm_gtod_copy(kvm);
6117
6118                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6119                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6120
6121                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6122                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6123
6124                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6125         }
6126         spin_unlock(&kvm_lock);
6127 }
6128 #endif
6129
6130 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6131                                      void *data)
6132 {
6133         struct cpufreq_freqs *freq = data;
6134         struct kvm *kvm;
6135         struct kvm_vcpu *vcpu;
6136         int i, send_ipi = 0;
6137
6138         /*
6139          * We allow guests to temporarily run on slowing clocks,
6140          * provided we notify them after, or to run on accelerating
6141          * clocks, provided we notify them before.  Thus time never
6142          * goes backwards.
6143          *
6144          * However, we have a problem.  We can't atomically update
6145          * the frequency of a given CPU from this function; it is
6146          * merely a notifier, which can be called from any CPU.
6147          * Changing the TSC frequency at arbitrary points in time
6148          * requires a recomputation of local variables related to
6149          * the TSC for each VCPU.  We must flag these local variables
6150          * to be updated and be sure the update takes place with the
6151          * new frequency before any guests proceed.
6152          *
6153          * Unfortunately, the combination of hotplug CPU and frequency
6154          * change creates an intractable locking scenario; the order
6155          * of when these callouts happen is undefined with respect to
6156          * CPU hotplug, and they can race with each other.  As such,
6157          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6158          * undefined; you can actually have a CPU frequency change take
6159          * place in between the computation of X and the setting of the
6160          * variable.  To protect against this problem, all updates of
6161          * the per_cpu tsc_khz variable are done in an interrupt
6162          * protected IPI, and all callers wishing to update the value
6163          * must wait for a synchronous IPI to complete (which is trivial
6164          * if the caller is on the CPU already).  This establishes the
6165          * necessary total order on variable updates.
6166          *
6167          * Note that because a guest time update may take place
6168          * anytime after the setting of the VCPU's request bit, the
6169          * correct TSC value must be set before the request.  However,
6170          * to ensure the update actually makes it to any guest which
6171          * starts running in hardware virtualization between the set
6172          * and the acquisition of the spinlock, we must also ping the
6173          * CPU after setting the request bit.
6174          *
6175          */
6176
6177         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6178                 return 0;
6179         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6180                 return 0;
6181
6182         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6183
6184         spin_lock(&kvm_lock);
6185         list_for_each_entry(kvm, &vm_list, vm_list) {
6186                 kvm_for_each_vcpu(i, vcpu, kvm) {
6187                         if (vcpu->cpu != freq->cpu)
6188                                 continue;
6189                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6190                         if (vcpu->cpu != smp_processor_id())
6191                                 send_ipi = 1;
6192                 }
6193         }
6194         spin_unlock(&kvm_lock);
6195
6196         if (freq->old < freq->new && send_ipi) {
6197                 /*
6198                  * We upscale the frequency.  Must make the guest
6199                  * doesn't see old kvmclock values while running with
6200                  * the new frequency, otherwise we risk the guest sees
6201                  * time go backwards.
6202                  *
6203                  * In case we update the frequency for another cpu
6204                  * (which might be in guest context) send an interrupt
6205                  * to kick the cpu out of guest context.  Next time
6206                  * guest context is entered kvmclock will be updated,
6207                  * so the guest will not see stale values.
6208                  */
6209                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6210         }
6211         return 0;
6212 }
6213
6214 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6215         .notifier_call  = kvmclock_cpufreq_notifier
6216 };
6217
6218 static int kvmclock_cpu_online(unsigned int cpu)
6219 {
6220         tsc_khz_changed(NULL);
6221         return 0;
6222 }
6223
6224 static void kvm_timer_init(void)
6225 {
6226         max_tsc_khz = tsc_khz;
6227
6228         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6229 #ifdef CONFIG_CPU_FREQ
6230                 struct cpufreq_policy policy;
6231                 int cpu;
6232
6233                 memset(&policy, 0, sizeof(policy));
6234                 cpu = get_cpu();
6235                 cpufreq_get_policy(&policy, cpu);
6236                 if (policy.cpuinfo.max_freq)
6237                         max_tsc_khz = policy.cpuinfo.max_freq;
6238                 put_cpu();
6239 #endif
6240                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6241                                           CPUFREQ_TRANSITION_NOTIFIER);
6242         }
6243         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6244
6245         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6246                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6247 }
6248
6249 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6250
6251 int kvm_is_in_guest(void)
6252 {
6253         return __this_cpu_read(current_vcpu) != NULL;
6254 }
6255
6256 static int kvm_is_user_mode(void)
6257 {
6258         int user_mode = 3;
6259
6260         if (__this_cpu_read(current_vcpu))
6261                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6262
6263         return user_mode != 0;
6264 }
6265
6266 static unsigned long kvm_get_guest_ip(void)
6267 {
6268         unsigned long ip = 0;
6269
6270         if (__this_cpu_read(current_vcpu))
6271                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6272
6273         return ip;
6274 }
6275
6276 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6277         .is_in_guest            = kvm_is_in_guest,
6278         .is_user_mode           = kvm_is_user_mode,
6279         .get_guest_ip           = kvm_get_guest_ip,
6280 };
6281
6282 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6283 {
6284         __this_cpu_write(current_vcpu, vcpu);
6285 }
6286 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6287
6288 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6289 {
6290         __this_cpu_write(current_vcpu, NULL);
6291 }
6292 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6293
6294 static void kvm_set_mmio_spte_mask(void)
6295 {
6296         u64 mask;
6297         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6298
6299         /*
6300          * Set the reserved bits and the present bit of an paging-structure
6301          * entry to generate page fault with PFER.RSV = 1.
6302          */
6303          /* Mask the reserved physical address bits. */
6304         mask = rsvd_bits(maxphyaddr, 51);
6305
6306         /* Set the present bit. */
6307         mask |= 1ull;
6308
6309 #ifdef CONFIG_X86_64
6310         /*
6311          * If reserved bit is not supported, clear the present bit to disable
6312          * mmio page fault.
6313          */
6314         if (maxphyaddr == 52)
6315                 mask &= ~1ull;
6316 #endif
6317
6318         kvm_mmu_set_mmio_spte_mask(mask, mask);
6319 }
6320
6321 #ifdef CONFIG_X86_64
6322 static void pvclock_gtod_update_fn(struct work_struct *work)
6323 {
6324         struct kvm *kvm;
6325
6326         struct kvm_vcpu *vcpu;
6327         int i;
6328
6329         spin_lock(&kvm_lock);
6330         list_for_each_entry(kvm, &vm_list, vm_list)
6331                 kvm_for_each_vcpu(i, vcpu, kvm)
6332                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6333         atomic_set(&kvm_guest_has_master_clock, 0);
6334         spin_unlock(&kvm_lock);
6335 }
6336
6337 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6338
6339 /*
6340  * Notification about pvclock gtod data update.
6341  */
6342 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6343                                void *priv)
6344 {
6345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6346         struct timekeeper *tk = priv;
6347
6348         update_pvclock_gtod(tk);
6349
6350         /* disable master clock if host does not trust, or does not
6351          * use, TSC based clocksource.
6352          */
6353         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6354             atomic_read(&kvm_guest_has_master_clock) != 0)
6355                 queue_work(system_long_wq, &pvclock_gtod_work);
6356
6357         return 0;
6358 }
6359
6360 static struct notifier_block pvclock_gtod_notifier = {
6361         .notifier_call = pvclock_gtod_notify,
6362 };
6363 #endif
6364
6365 int kvm_arch_init(void *opaque)
6366 {
6367         int r;
6368         struct kvm_x86_ops *ops = opaque;
6369
6370         if (kvm_x86_ops) {
6371                 printk(KERN_ERR "kvm: already loaded the other module\n");
6372                 r = -EEXIST;
6373                 goto out;
6374         }
6375
6376         if (!ops->cpu_has_kvm_support()) {
6377                 printk(KERN_ERR "kvm: no hardware support\n");
6378                 r = -EOPNOTSUPP;
6379                 goto out;
6380         }
6381         if (ops->disabled_by_bios()) {
6382                 printk(KERN_ERR "kvm: disabled by bios\n");
6383                 r = -EOPNOTSUPP;
6384                 goto out;
6385         }
6386
6387         r = -ENOMEM;
6388         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6389         if (!shared_msrs) {
6390                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6391                 goto out;
6392         }
6393
6394         r = kvm_mmu_module_init();
6395         if (r)
6396                 goto out_free_percpu;
6397
6398         kvm_set_mmio_spte_mask();
6399
6400         kvm_x86_ops = ops;
6401
6402         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6403                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6404                         PT_PRESENT_MASK, 0, sme_me_mask);
6405         kvm_timer_init();
6406
6407         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6408
6409         if (boot_cpu_has(X86_FEATURE_XSAVE))
6410                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6411
6412         kvm_lapic_init();
6413 #ifdef CONFIG_X86_64
6414         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6415
6416         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6417                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6418 #endif
6419
6420         return 0;
6421
6422 out_free_percpu:
6423         free_percpu(shared_msrs);
6424 out:
6425         return r;
6426 }
6427
6428 void kvm_arch_exit(void)
6429 {
6430 #ifdef CONFIG_X86_64
6431         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6432                 clear_hv_tscchange_cb();
6433 #endif
6434         kvm_lapic_exit();
6435         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6436
6437         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6438                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6439                                             CPUFREQ_TRANSITION_NOTIFIER);
6440         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6441 #ifdef CONFIG_X86_64
6442         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6443 #endif
6444         kvm_x86_ops = NULL;
6445         kvm_mmu_module_exit();
6446         free_percpu(shared_msrs);
6447 }
6448
6449 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6450 {
6451         ++vcpu->stat.halt_exits;
6452         if (lapic_in_kernel(vcpu)) {
6453                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6454                 return 1;
6455         } else {
6456                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6457                 return 0;
6458         }
6459 }
6460 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6461
6462 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6463 {
6464         int ret = kvm_skip_emulated_instruction(vcpu);
6465         /*
6466          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6467          * KVM_EXIT_DEBUG here.
6468          */
6469         return kvm_vcpu_halt(vcpu) && ret;
6470 }
6471 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6472
6473 #ifdef CONFIG_X86_64
6474 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6475                                 unsigned long clock_type)
6476 {
6477         struct kvm_clock_pairing clock_pairing;
6478         struct timespec ts;
6479         u64 cycle;
6480         int ret;
6481
6482         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6483                 return -KVM_EOPNOTSUPP;
6484
6485         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6486                 return -KVM_EOPNOTSUPP;
6487
6488         clock_pairing.sec = ts.tv_sec;
6489         clock_pairing.nsec = ts.tv_nsec;
6490         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6491         clock_pairing.flags = 0;
6492
6493         ret = 0;
6494         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6495                             sizeof(struct kvm_clock_pairing)))
6496                 ret = -KVM_EFAULT;
6497
6498         return ret;
6499 }
6500 #endif
6501
6502 /*
6503  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6504  *
6505  * @apicid - apicid of vcpu to be kicked.
6506  */
6507 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6508 {
6509         struct kvm_lapic_irq lapic_irq;
6510
6511         lapic_irq.shorthand = 0;
6512         lapic_irq.dest_mode = 0;
6513         lapic_irq.level = 0;
6514         lapic_irq.dest_id = apicid;
6515         lapic_irq.msi_redir_hint = false;
6516
6517         lapic_irq.delivery_mode = APIC_DM_REMRD;
6518         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6519 }
6520
6521 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6522 {
6523         vcpu->arch.apicv_active = false;
6524         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6525 }
6526
6527 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6528 {
6529         unsigned long nr, a0, a1, a2, a3, ret;
6530         int op_64_bit, r;
6531
6532         r = kvm_skip_emulated_instruction(vcpu);
6533
6534         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6535                 return kvm_hv_hypercall(vcpu);
6536
6537         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6538         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6539         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6540         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6541         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6542
6543         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6544
6545         op_64_bit = is_64_bit_mode(vcpu);
6546         if (!op_64_bit) {
6547                 nr &= 0xFFFFFFFF;
6548                 a0 &= 0xFFFFFFFF;
6549                 a1 &= 0xFFFFFFFF;
6550                 a2 &= 0xFFFFFFFF;
6551                 a3 &= 0xFFFFFFFF;
6552         }
6553
6554         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6555                 ret = -KVM_EPERM;
6556                 goto out;
6557         }
6558
6559         switch (nr) {
6560         case KVM_HC_VAPIC_POLL_IRQ:
6561                 ret = 0;
6562                 break;
6563         case KVM_HC_KICK_CPU:
6564                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6565                 ret = 0;
6566                 break;
6567 #ifdef CONFIG_X86_64
6568         case KVM_HC_CLOCK_PAIRING:
6569                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6570                 break;
6571 #endif
6572         default:
6573                 ret = -KVM_ENOSYS;
6574                 break;
6575         }
6576 out:
6577         if (!op_64_bit)
6578                 ret = (u32)ret;
6579         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6580         ++vcpu->stat.hypercalls;
6581         return r;
6582 }
6583 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6584
6585 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6586 {
6587         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6588         char instruction[3];
6589         unsigned long rip = kvm_rip_read(vcpu);
6590
6591         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6592
6593         return emulator_write_emulated(ctxt, rip, instruction, 3,
6594                 &ctxt->exception);
6595 }
6596
6597 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6598 {
6599         return vcpu->run->request_interrupt_window &&
6600                 likely(!pic_in_kernel(vcpu->kvm));
6601 }
6602
6603 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6604 {
6605         struct kvm_run *kvm_run = vcpu->run;
6606
6607         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6608         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6609         kvm_run->cr8 = kvm_get_cr8(vcpu);
6610         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6611         kvm_run->ready_for_interrupt_injection =
6612                 pic_in_kernel(vcpu->kvm) ||
6613                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6614 }
6615
6616 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6617 {
6618         int max_irr, tpr;
6619
6620         if (!kvm_x86_ops->update_cr8_intercept)
6621                 return;
6622
6623         if (!lapic_in_kernel(vcpu))
6624                 return;
6625
6626         if (vcpu->arch.apicv_active)
6627                 return;
6628
6629         if (!vcpu->arch.apic->vapic_addr)
6630                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6631         else
6632                 max_irr = -1;
6633
6634         if (max_irr != -1)
6635                 max_irr >>= 4;
6636
6637         tpr = kvm_lapic_get_cr8(vcpu);
6638
6639         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6640 }
6641
6642 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6643 {
6644         int r;
6645
6646         /* try to reinject previous events if any */
6647         if (vcpu->arch.exception.injected) {
6648                 kvm_x86_ops->queue_exception(vcpu);
6649                 return 0;
6650         }
6651
6652         /*
6653          * Exceptions must be injected immediately, or the exception
6654          * frame will have the address of the NMI or interrupt handler.
6655          */
6656         if (!vcpu->arch.exception.pending) {
6657                 if (vcpu->arch.nmi_injected) {
6658                         kvm_x86_ops->set_nmi(vcpu);
6659                         return 0;
6660                 }
6661
6662                 if (vcpu->arch.interrupt.pending) {
6663                         kvm_x86_ops->set_irq(vcpu);
6664                         return 0;
6665                 }
6666         }
6667
6668         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6669                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6670                 if (r != 0)
6671                         return r;
6672         }
6673
6674         /* try to inject new event if pending */
6675         if (vcpu->arch.exception.pending) {
6676                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6677                                         vcpu->arch.exception.has_error_code,
6678                                         vcpu->arch.exception.error_code);
6679
6680                 vcpu->arch.exception.pending = false;
6681                 vcpu->arch.exception.injected = true;
6682
6683                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6684                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6685                                              X86_EFLAGS_RF);
6686
6687                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6688                     (vcpu->arch.dr7 & DR7_GD)) {
6689                         vcpu->arch.dr7 &= ~DR7_GD;
6690                         kvm_update_dr7(vcpu);
6691                 }
6692
6693                 kvm_x86_ops->queue_exception(vcpu);
6694         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6695                 vcpu->arch.smi_pending = false;
6696                 ++vcpu->arch.smi_count;
6697                 enter_smm(vcpu);
6698         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6699                 --vcpu->arch.nmi_pending;
6700                 vcpu->arch.nmi_injected = true;
6701                 kvm_x86_ops->set_nmi(vcpu);
6702         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6703                 /*
6704                  * Because interrupts can be injected asynchronously, we are
6705                  * calling check_nested_events again here to avoid a race condition.
6706                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6707                  * proposal and current concerns.  Perhaps we should be setting
6708                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6709                  */
6710                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6711                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6712                         if (r != 0)
6713                                 return r;
6714                 }
6715                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6716                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6717                                             false);
6718                         kvm_x86_ops->set_irq(vcpu);
6719                 }
6720         }
6721
6722         return 0;
6723 }
6724
6725 static void process_nmi(struct kvm_vcpu *vcpu)
6726 {
6727         unsigned limit = 2;
6728
6729         /*
6730          * x86 is limited to one NMI running, and one NMI pending after it.
6731          * If an NMI is already in progress, limit further NMIs to just one.
6732          * Otherwise, allow two (and we'll inject the first one immediately).
6733          */
6734         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6735                 limit = 1;
6736
6737         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6738         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6739         kvm_make_request(KVM_REQ_EVENT, vcpu);
6740 }
6741
6742 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6743 {
6744         u32 flags = 0;
6745         flags |= seg->g       << 23;
6746         flags |= seg->db      << 22;
6747         flags |= seg->l       << 21;
6748         flags |= seg->avl     << 20;
6749         flags |= seg->present << 15;
6750         flags |= seg->dpl     << 13;
6751         flags |= seg->s       << 12;
6752         flags |= seg->type    << 8;
6753         return flags;
6754 }
6755
6756 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6757 {
6758         struct kvm_segment seg;
6759         int offset;
6760
6761         kvm_get_segment(vcpu, &seg, n);
6762         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6763
6764         if (n < 3)
6765                 offset = 0x7f84 + n * 12;
6766         else
6767                 offset = 0x7f2c + (n - 3) * 12;
6768
6769         put_smstate(u32, buf, offset + 8, seg.base);
6770         put_smstate(u32, buf, offset + 4, seg.limit);
6771         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6772 }
6773
6774 #ifdef CONFIG_X86_64
6775 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6776 {
6777         struct kvm_segment seg;
6778         int offset;
6779         u16 flags;
6780
6781         kvm_get_segment(vcpu, &seg, n);
6782         offset = 0x7e00 + n * 16;
6783
6784         flags = enter_smm_get_segment_flags(&seg) >> 8;
6785         put_smstate(u16, buf, offset, seg.selector);
6786         put_smstate(u16, buf, offset + 2, flags);
6787         put_smstate(u32, buf, offset + 4, seg.limit);
6788         put_smstate(u64, buf, offset + 8, seg.base);
6789 }
6790 #endif
6791
6792 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6793 {
6794         struct desc_ptr dt;
6795         struct kvm_segment seg;
6796         unsigned long val;
6797         int i;
6798
6799         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6800         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6801         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6802         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6803
6804         for (i = 0; i < 8; i++)
6805                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6806
6807         kvm_get_dr(vcpu, 6, &val);
6808         put_smstate(u32, buf, 0x7fcc, (u32)val);
6809         kvm_get_dr(vcpu, 7, &val);
6810         put_smstate(u32, buf, 0x7fc8, (u32)val);
6811
6812         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6813         put_smstate(u32, buf, 0x7fc4, seg.selector);
6814         put_smstate(u32, buf, 0x7f64, seg.base);
6815         put_smstate(u32, buf, 0x7f60, seg.limit);
6816         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6817
6818         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6819         put_smstate(u32, buf, 0x7fc0, seg.selector);
6820         put_smstate(u32, buf, 0x7f80, seg.base);
6821         put_smstate(u32, buf, 0x7f7c, seg.limit);
6822         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6823
6824         kvm_x86_ops->get_gdt(vcpu, &dt);
6825         put_smstate(u32, buf, 0x7f74, dt.address);
6826         put_smstate(u32, buf, 0x7f70, dt.size);
6827
6828         kvm_x86_ops->get_idt(vcpu, &dt);
6829         put_smstate(u32, buf, 0x7f58, dt.address);
6830         put_smstate(u32, buf, 0x7f54, dt.size);
6831
6832         for (i = 0; i < 6; i++)
6833                 enter_smm_save_seg_32(vcpu, buf, i);
6834
6835         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6836
6837         /* revision id */
6838         put_smstate(u32, buf, 0x7efc, 0x00020000);
6839         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6840 }
6841
6842 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6843 {
6844 #ifdef CONFIG_X86_64
6845         struct desc_ptr dt;
6846         struct kvm_segment seg;
6847         unsigned long val;
6848         int i;
6849
6850         for (i = 0; i < 16; i++)
6851                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6852
6853         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6854         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6855
6856         kvm_get_dr(vcpu, 6, &val);
6857         put_smstate(u64, buf, 0x7f68, val);
6858         kvm_get_dr(vcpu, 7, &val);
6859         put_smstate(u64, buf, 0x7f60, val);
6860
6861         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6862         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6863         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6864
6865         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6866
6867         /* revision id */
6868         put_smstate(u32, buf, 0x7efc, 0x00020064);
6869
6870         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6871
6872         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6873         put_smstate(u16, buf, 0x7e90, seg.selector);
6874         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6875         put_smstate(u32, buf, 0x7e94, seg.limit);
6876         put_smstate(u64, buf, 0x7e98, seg.base);
6877
6878         kvm_x86_ops->get_idt(vcpu, &dt);
6879         put_smstate(u32, buf, 0x7e84, dt.size);
6880         put_smstate(u64, buf, 0x7e88, dt.address);
6881
6882         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6883         put_smstate(u16, buf, 0x7e70, seg.selector);
6884         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6885         put_smstate(u32, buf, 0x7e74, seg.limit);
6886         put_smstate(u64, buf, 0x7e78, seg.base);
6887
6888         kvm_x86_ops->get_gdt(vcpu, &dt);
6889         put_smstate(u32, buf, 0x7e64, dt.size);
6890         put_smstate(u64, buf, 0x7e68, dt.address);
6891
6892         for (i = 0; i < 6; i++)
6893                 enter_smm_save_seg_64(vcpu, buf, i);
6894 #else
6895         WARN_ON_ONCE(1);
6896 #endif
6897 }
6898
6899 static void enter_smm(struct kvm_vcpu *vcpu)
6900 {
6901         struct kvm_segment cs, ds;
6902         struct desc_ptr dt;
6903         char buf[512];
6904         u32 cr0;
6905
6906         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6907         memset(buf, 0, 512);
6908         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6909                 enter_smm_save_state_64(vcpu, buf);
6910         else
6911                 enter_smm_save_state_32(vcpu, buf);
6912
6913         /*
6914          * Give pre_enter_smm() a chance to make ISA-specific changes to the
6915          * vCPU state (e.g. leave guest mode) after we've saved the state into
6916          * the SMM state-save area.
6917          */
6918         kvm_x86_ops->pre_enter_smm(vcpu, buf);
6919
6920         vcpu->arch.hflags |= HF_SMM_MASK;
6921         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6922
6923         if (kvm_x86_ops->get_nmi_mask(vcpu))
6924                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6925         else
6926                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6927
6928         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6929         kvm_rip_write(vcpu, 0x8000);
6930
6931         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6932         kvm_x86_ops->set_cr0(vcpu, cr0);
6933         vcpu->arch.cr0 = cr0;
6934
6935         kvm_x86_ops->set_cr4(vcpu, 0);
6936
6937         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6938         dt.address = dt.size = 0;
6939         kvm_x86_ops->set_idt(vcpu, &dt);
6940
6941         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6942
6943         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6944         cs.base = vcpu->arch.smbase;
6945
6946         ds.selector = 0;
6947         ds.base = 0;
6948
6949         cs.limit    = ds.limit = 0xffffffff;
6950         cs.type     = ds.type = 0x3;
6951         cs.dpl      = ds.dpl = 0;
6952         cs.db       = ds.db = 0;
6953         cs.s        = ds.s = 1;
6954         cs.l        = ds.l = 0;
6955         cs.g        = ds.g = 1;
6956         cs.avl      = ds.avl = 0;
6957         cs.present  = ds.present = 1;
6958         cs.unusable = ds.unusable = 0;
6959         cs.padding  = ds.padding = 0;
6960
6961         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6962         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6963         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6964         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6965         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6966         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6967
6968         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6969                 kvm_x86_ops->set_efer(vcpu, 0);
6970
6971         kvm_update_cpuid(vcpu);
6972         kvm_mmu_reset_context(vcpu);
6973 }
6974
6975 static void process_smi(struct kvm_vcpu *vcpu)
6976 {
6977         vcpu->arch.smi_pending = true;
6978         kvm_make_request(KVM_REQ_EVENT, vcpu);
6979 }
6980
6981 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6982 {
6983         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6984 }
6985
6986 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6987 {
6988         u64 eoi_exit_bitmap[4];
6989
6990         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6991                 return;
6992
6993         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6994
6995         if (irqchip_split(vcpu->kvm))
6996                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6997         else {
6998                 if (vcpu->arch.apicv_active)
6999                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7000                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7001         }
7002         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7003                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7004         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7005 }
7006
7007 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7008                 unsigned long start, unsigned long end)
7009 {
7010         unsigned long apic_address;
7011
7012         /*
7013          * The physical address of apic access page is stored in the VMCS.
7014          * Update it when it becomes invalid.
7015          */
7016         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7017         if (start <= apic_address && apic_address < end)
7018                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7019 }
7020
7021 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7022 {
7023         struct page *page = NULL;
7024
7025         if (!lapic_in_kernel(vcpu))
7026                 return;
7027
7028         if (!kvm_x86_ops->set_apic_access_page_addr)
7029                 return;
7030
7031         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7032         if (is_error_page(page))
7033                 return;
7034         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7035
7036         /*
7037          * Do not pin apic access page in memory, the MMU notifier
7038          * will call us again if it is migrated or swapped out.
7039          */
7040         put_page(page);
7041 }
7042 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7043
7044 /*
7045  * Returns 1 to let vcpu_run() continue the guest execution loop without
7046  * exiting to the userspace.  Otherwise, the value will be returned to the
7047  * userspace.
7048  */
7049 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7050 {
7051         int r;
7052         bool req_int_win =
7053                 dm_request_for_irq_injection(vcpu) &&
7054                 kvm_cpu_accept_dm_intr(vcpu);
7055
7056         bool req_immediate_exit = false;
7057
7058         if (kvm_request_pending(vcpu)) {
7059                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7060                         kvm_mmu_unload(vcpu);
7061                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7062                         __kvm_migrate_timers(vcpu);
7063                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7064                         kvm_gen_update_masterclock(vcpu->kvm);
7065                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7066                         kvm_gen_kvmclock_update(vcpu);
7067                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7068                         r = kvm_guest_time_update(vcpu);
7069                         if (unlikely(r))
7070                                 goto out;
7071                 }
7072                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7073                         kvm_mmu_sync_roots(vcpu);
7074                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7075                         kvm_vcpu_flush_tlb(vcpu, true);
7076                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7077                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7078                         r = 0;
7079                         goto out;
7080                 }
7081                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7082                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7083                         vcpu->mmio_needed = 0;
7084                         r = 0;
7085                         goto out;
7086                 }
7087                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7088                         /* Page is swapped out. Do synthetic halt */
7089                         vcpu->arch.apf.halted = true;
7090                         r = 1;
7091                         goto out;
7092                 }
7093                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7094                         record_steal_time(vcpu);
7095                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7096                         process_smi(vcpu);
7097                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7098                         process_nmi(vcpu);
7099                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7100                         kvm_pmu_handle_event(vcpu);
7101                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7102                         kvm_pmu_deliver_pmi(vcpu);
7103                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7104                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7105                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7106                                      vcpu->arch.ioapic_handled_vectors)) {
7107                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7108                                 vcpu->run->eoi.vector =
7109                                                 vcpu->arch.pending_ioapic_eoi;
7110                                 r = 0;
7111                                 goto out;
7112                         }
7113                 }
7114                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7115                         vcpu_scan_ioapic(vcpu);
7116                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7117                         kvm_vcpu_reload_apic_access_page(vcpu);
7118                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7119                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7120                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7121                         r = 0;
7122                         goto out;
7123                 }
7124                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7125                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7126                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7127                         r = 0;
7128                         goto out;
7129                 }
7130                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7131                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7132                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7133                         r = 0;
7134                         goto out;
7135                 }
7136
7137                 /*
7138                  * KVM_REQ_HV_STIMER has to be processed after
7139                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7140                  * depend on the guest clock being up-to-date
7141                  */
7142                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7143                         kvm_hv_process_stimers(vcpu);
7144         }
7145
7146         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7147                 ++vcpu->stat.req_event;
7148                 kvm_apic_accept_events(vcpu);
7149                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7150                         r = 1;
7151                         goto out;
7152                 }
7153
7154                 if (inject_pending_event(vcpu, req_int_win) != 0)
7155                         req_immediate_exit = true;
7156                 else {
7157                         /* Enable SMI/NMI/IRQ window open exits if needed.
7158                          *
7159                          * SMIs have three cases:
7160                          * 1) They can be nested, and then there is nothing to
7161                          *    do here because RSM will cause a vmexit anyway.
7162                          * 2) There is an ISA-specific reason why SMI cannot be
7163                          *    injected, and the moment when this changes can be
7164                          *    intercepted.
7165                          * 3) Or the SMI can be pending because
7166                          *    inject_pending_event has completed the injection
7167                          *    of an IRQ or NMI from the previous vmexit, and
7168                          *    then we request an immediate exit to inject the
7169                          *    SMI.
7170                          */
7171                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7172                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7173                                         req_immediate_exit = true;
7174                         if (vcpu->arch.nmi_pending)
7175                                 kvm_x86_ops->enable_nmi_window(vcpu);
7176                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7177                                 kvm_x86_ops->enable_irq_window(vcpu);
7178                         WARN_ON(vcpu->arch.exception.pending);
7179                 }
7180
7181                 if (kvm_lapic_enabled(vcpu)) {
7182                         update_cr8_intercept(vcpu);
7183                         kvm_lapic_sync_to_vapic(vcpu);
7184                 }
7185         }
7186
7187         r = kvm_mmu_reload(vcpu);
7188         if (unlikely(r)) {
7189                 goto cancel_injection;
7190         }
7191
7192         preempt_disable();
7193
7194         kvm_x86_ops->prepare_guest_switch(vcpu);
7195
7196         /*
7197          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7198          * IPI are then delayed after guest entry, which ensures that they
7199          * result in virtual interrupt delivery.
7200          */
7201         local_irq_disable();
7202         vcpu->mode = IN_GUEST_MODE;
7203
7204         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7205
7206         /*
7207          * 1) We should set ->mode before checking ->requests.  Please see
7208          * the comment in kvm_vcpu_exiting_guest_mode().
7209          *
7210          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7211          * pairs with the memory barrier implicit in pi_test_and_set_on
7212          * (see vmx_deliver_posted_interrupt).
7213          *
7214          * 3) This also orders the write to mode from any reads to the page
7215          * tables done while the VCPU is running.  Please see the comment
7216          * in kvm_flush_remote_tlbs.
7217          */
7218         smp_mb__after_srcu_read_unlock();
7219
7220         /*
7221          * This handles the case where a posted interrupt was
7222          * notified with kvm_vcpu_kick.
7223          */
7224         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7225                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7226
7227         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7228             || need_resched() || signal_pending(current)) {
7229                 vcpu->mode = OUTSIDE_GUEST_MODE;
7230                 smp_wmb();
7231                 local_irq_enable();
7232                 preempt_enable();
7233                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7234                 r = 1;
7235                 goto cancel_injection;
7236         }
7237
7238         kvm_load_guest_xcr0(vcpu);
7239
7240         if (req_immediate_exit) {
7241                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7242                 smp_send_reschedule(vcpu->cpu);
7243         }
7244
7245         trace_kvm_entry(vcpu->vcpu_id);
7246         if (lapic_timer_advance_ns)
7247                 wait_lapic_expire(vcpu);
7248         guest_enter_irqoff();
7249
7250         if (unlikely(vcpu->arch.switch_db_regs)) {
7251                 set_debugreg(0, 7);
7252                 set_debugreg(vcpu->arch.eff_db[0], 0);
7253                 set_debugreg(vcpu->arch.eff_db[1], 1);
7254                 set_debugreg(vcpu->arch.eff_db[2], 2);
7255                 set_debugreg(vcpu->arch.eff_db[3], 3);
7256                 set_debugreg(vcpu->arch.dr6, 6);
7257                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7258         }
7259
7260         kvm_x86_ops->run(vcpu);
7261
7262         /*
7263          * Do this here before restoring debug registers on the host.  And
7264          * since we do this before handling the vmexit, a DR access vmexit
7265          * can (a) read the correct value of the debug registers, (b) set
7266          * KVM_DEBUGREG_WONT_EXIT again.
7267          */
7268         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7269                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7270                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7271                 kvm_update_dr0123(vcpu);
7272                 kvm_update_dr6(vcpu);
7273                 kvm_update_dr7(vcpu);
7274                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7275         }
7276
7277         /*
7278          * If the guest has used debug registers, at least dr7
7279          * will be disabled while returning to the host.
7280          * If we don't have active breakpoints in the host, we don't
7281          * care about the messed up debug address registers. But if
7282          * we have some of them active, restore the old state.
7283          */
7284         if (hw_breakpoint_active())
7285                 hw_breakpoint_restore();
7286
7287         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7288
7289         vcpu->mode = OUTSIDE_GUEST_MODE;
7290         smp_wmb();
7291
7292         kvm_put_guest_xcr0(vcpu);
7293
7294         kvm_x86_ops->handle_external_intr(vcpu);
7295
7296         ++vcpu->stat.exits;
7297
7298         guest_exit_irqoff();
7299
7300         local_irq_enable();
7301         preempt_enable();
7302
7303         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7304
7305         /*
7306          * Profile KVM exit RIPs:
7307          */
7308         if (unlikely(prof_on == KVM_PROFILING)) {
7309                 unsigned long rip = kvm_rip_read(vcpu);
7310                 profile_hit(KVM_PROFILING, (void *)rip);
7311         }
7312
7313         if (unlikely(vcpu->arch.tsc_always_catchup))
7314                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7315
7316         if (vcpu->arch.apic_attention)
7317                 kvm_lapic_sync_from_vapic(vcpu);
7318
7319         vcpu->arch.gpa_available = false;
7320         r = kvm_x86_ops->handle_exit(vcpu);
7321         return r;
7322
7323 cancel_injection:
7324         kvm_x86_ops->cancel_injection(vcpu);
7325         if (unlikely(vcpu->arch.apic_attention))
7326                 kvm_lapic_sync_from_vapic(vcpu);
7327 out:
7328         return r;
7329 }
7330
7331 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7332 {
7333         if (!kvm_arch_vcpu_runnable(vcpu) &&
7334             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7335                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7336                 kvm_vcpu_block(vcpu);
7337                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7338
7339                 if (kvm_x86_ops->post_block)
7340                         kvm_x86_ops->post_block(vcpu);
7341
7342                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7343                         return 1;
7344         }
7345
7346         kvm_apic_accept_events(vcpu);
7347         switch(vcpu->arch.mp_state) {
7348         case KVM_MP_STATE_HALTED:
7349                 vcpu->arch.pv.pv_unhalted = false;
7350                 vcpu->arch.mp_state =
7351                         KVM_MP_STATE_RUNNABLE;
7352         case KVM_MP_STATE_RUNNABLE:
7353                 vcpu->arch.apf.halted = false;
7354                 break;
7355         case KVM_MP_STATE_INIT_RECEIVED:
7356                 break;
7357         default:
7358                 return -EINTR;
7359                 break;
7360         }
7361         return 1;
7362 }
7363
7364 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7365 {
7366         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7367                 kvm_x86_ops->check_nested_events(vcpu, false);
7368
7369         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7370                 !vcpu->arch.apf.halted);
7371 }
7372
7373 static int vcpu_run(struct kvm_vcpu *vcpu)
7374 {
7375         int r;
7376         struct kvm *kvm = vcpu->kvm;
7377
7378         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7379
7380         for (;;) {
7381                 if (kvm_vcpu_running(vcpu)) {
7382                         r = vcpu_enter_guest(vcpu);
7383                 } else {
7384                         r = vcpu_block(kvm, vcpu);
7385                 }
7386
7387                 if (r <= 0)
7388                         break;
7389
7390                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7391                 if (kvm_cpu_has_pending_timer(vcpu))
7392                         kvm_inject_pending_timer_irqs(vcpu);
7393
7394                 if (dm_request_for_irq_injection(vcpu) &&
7395                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7396                         r = 0;
7397                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7398                         ++vcpu->stat.request_irq_exits;
7399                         break;
7400                 }
7401
7402                 kvm_check_async_pf_completion(vcpu);
7403
7404                 if (signal_pending(current)) {
7405                         r = -EINTR;
7406                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7407                         ++vcpu->stat.signal_exits;
7408                         break;
7409                 }
7410                 if (need_resched()) {
7411                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7412                         cond_resched();
7413                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7414                 }
7415         }
7416
7417         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7418
7419         return r;
7420 }
7421
7422 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7423 {
7424         int r;
7425         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7426         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7427         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7428         if (r != EMULATE_DONE)
7429                 return 0;
7430         return 1;
7431 }
7432
7433 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7434 {
7435         BUG_ON(!vcpu->arch.pio.count);
7436
7437         return complete_emulated_io(vcpu);
7438 }
7439
7440 /*
7441  * Implements the following, as a state machine:
7442  *
7443  * read:
7444  *   for each fragment
7445  *     for each mmio piece in the fragment
7446  *       write gpa, len
7447  *       exit
7448  *       copy data
7449  *   execute insn
7450  *
7451  * write:
7452  *   for each fragment
7453  *     for each mmio piece in the fragment
7454  *       write gpa, len
7455  *       copy data
7456  *       exit
7457  */
7458 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7459 {
7460         struct kvm_run *run = vcpu->run;
7461         struct kvm_mmio_fragment *frag;
7462         unsigned len;
7463
7464         BUG_ON(!vcpu->mmio_needed);
7465
7466         /* Complete previous fragment */
7467         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7468         len = min(8u, frag->len);
7469         if (!vcpu->mmio_is_write)
7470                 memcpy(frag->data, run->mmio.data, len);
7471
7472         if (frag->len <= 8) {
7473                 /* Switch to the next fragment. */
7474                 frag++;
7475                 vcpu->mmio_cur_fragment++;
7476         } else {
7477                 /* Go forward to the next mmio piece. */
7478                 frag->data += len;
7479                 frag->gpa += len;
7480                 frag->len -= len;
7481         }
7482
7483         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7484                 vcpu->mmio_needed = 0;
7485
7486                 /* FIXME: return into emulator if single-stepping.  */
7487                 if (vcpu->mmio_is_write)
7488                         return 1;
7489                 vcpu->mmio_read_completed = 1;
7490                 return complete_emulated_io(vcpu);
7491         }
7492
7493         run->exit_reason = KVM_EXIT_MMIO;
7494         run->mmio.phys_addr = frag->gpa;
7495         if (vcpu->mmio_is_write)
7496                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7497         run->mmio.len = min(8u, frag->len);
7498         run->mmio.is_write = vcpu->mmio_is_write;
7499         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7500         return 0;
7501 }
7502
7503
7504 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7505 {
7506         int r;
7507
7508         vcpu_load(vcpu);
7509         kvm_sigset_activate(vcpu);
7510         kvm_load_guest_fpu(vcpu);
7511
7512         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7513                 if (kvm_run->immediate_exit) {
7514                         r = -EINTR;
7515                         goto out;
7516                 }
7517                 kvm_vcpu_block(vcpu);
7518                 kvm_apic_accept_events(vcpu);
7519                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7520                 r = -EAGAIN;
7521                 if (signal_pending(current)) {
7522                         r = -EINTR;
7523                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7524                         ++vcpu->stat.signal_exits;
7525                 }
7526                 goto out;
7527         }
7528
7529         /* re-sync apic's tpr */
7530         if (!lapic_in_kernel(vcpu)) {
7531                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7532                         r = -EINVAL;
7533                         goto out;
7534                 }
7535         }
7536
7537         if (unlikely(vcpu->arch.complete_userspace_io)) {
7538                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7539                 vcpu->arch.complete_userspace_io = NULL;
7540                 r = cui(vcpu);
7541                 if (r <= 0)
7542                         goto out;
7543         } else
7544                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7545
7546         if (kvm_run->immediate_exit)
7547                 r = -EINTR;
7548         else
7549                 r = vcpu_run(vcpu);
7550
7551 out:
7552         kvm_put_guest_fpu(vcpu);
7553         post_kvm_run_save(vcpu);
7554         kvm_sigset_deactivate(vcpu);
7555
7556         vcpu_put(vcpu);
7557         return r;
7558 }
7559
7560 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7561 {
7562         vcpu_load(vcpu);
7563
7564         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7565                 /*
7566                  * We are here if userspace calls get_regs() in the middle of
7567                  * instruction emulation. Registers state needs to be copied
7568                  * back from emulation context to vcpu. Userspace shouldn't do
7569                  * that usually, but some bad designed PV devices (vmware
7570                  * backdoor interface) need this to work
7571                  */
7572                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7573                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7574         }
7575         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7576         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7577         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7578         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7579         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7580         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7581         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7582         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7583 #ifdef CONFIG_X86_64
7584         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7585         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7586         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7587         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7588         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7589         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7590         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7591         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7592 #endif
7593
7594         regs->rip = kvm_rip_read(vcpu);
7595         regs->rflags = kvm_get_rflags(vcpu);
7596
7597         vcpu_put(vcpu);
7598         return 0;
7599 }
7600
7601 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7602 {
7603         vcpu_load(vcpu);
7604
7605         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7606         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7607
7608         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7609         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7610         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7611         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7612         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7613         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7614         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7615         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7616 #ifdef CONFIG_X86_64
7617         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7618         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7619         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7620         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7621         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7622         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7623         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7624         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7625 #endif
7626
7627         kvm_rip_write(vcpu, regs->rip);
7628         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7629
7630         vcpu->arch.exception.pending = false;
7631
7632         kvm_make_request(KVM_REQ_EVENT, vcpu);
7633
7634         vcpu_put(vcpu);
7635         return 0;
7636 }
7637
7638 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7639 {
7640         struct kvm_segment cs;
7641
7642         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7643         *db = cs.db;
7644         *l = cs.l;
7645 }
7646 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7647
7648 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7649                                   struct kvm_sregs *sregs)
7650 {
7651         struct desc_ptr dt;
7652
7653         vcpu_load(vcpu);
7654
7655         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7656         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7657         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7658         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7659         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7660         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7661
7662         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7663         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7664
7665         kvm_x86_ops->get_idt(vcpu, &dt);
7666         sregs->idt.limit = dt.size;
7667         sregs->idt.base = dt.address;
7668         kvm_x86_ops->get_gdt(vcpu, &dt);
7669         sregs->gdt.limit = dt.size;
7670         sregs->gdt.base = dt.address;
7671
7672         sregs->cr0 = kvm_read_cr0(vcpu);
7673         sregs->cr2 = vcpu->arch.cr2;
7674         sregs->cr3 = kvm_read_cr3(vcpu);
7675         sregs->cr4 = kvm_read_cr4(vcpu);
7676         sregs->cr8 = kvm_get_cr8(vcpu);
7677         sregs->efer = vcpu->arch.efer;
7678         sregs->apic_base = kvm_get_apic_base(vcpu);
7679
7680         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7681
7682         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7683                 set_bit(vcpu->arch.interrupt.nr,
7684                         (unsigned long *)sregs->interrupt_bitmap);
7685
7686         vcpu_put(vcpu);
7687         return 0;
7688 }
7689
7690 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7691                                     struct kvm_mp_state *mp_state)
7692 {
7693         vcpu_load(vcpu);
7694
7695         kvm_apic_accept_events(vcpu);
7696         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7697                                         vcpu->arch.pv.pv_unhalted)
7698                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7699         else
7700                 mp_state->mp_state = vcpu->arch.mp_state;
7701
7702         vcpu_put(vcpu);
7703         return 0;
7704 }
7705
7706 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7707                                     struct kvm_mp_state *mp_state)
7708 {
7709         int ret = -EINVAL;
7710
7711         vcpu_load(vcpu);
7712
7713         if (!lapic_in_kernel(vcpu) &&
7714             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7715                 goto out;
7716
7717         /* INITs are latched while in SMM */
7718         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7719             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7720              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7721                 goto out;
7722
7723         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7724                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7725                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7726         } else
7727                 vcpu->arch.mp_state = mp_state->mp_state;
7728         kvm_make_request(KVM_REQ_EVENT, vcpu);
7729
7730         ret = 0;
7731 out:
7732         vcpu_put(vcpu);
7733         return ret;
7734 }
7735
7736 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7737                     int reason, bool has_error_code, u32 error_code)
7738 {
7739         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7740         int ret;
7741
7742         init_emulate_ctxt(vcpu);
7743
7744         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7745                                    has_error_code, error_code);
7746
7747         if (ret)
7748                 return EMULATE_FAIL;
7749
7750         kvm_rip_write(vcpu, ctxt->eip);
7751         kvm_set_rflags(vcpu, ctxt->eflags);
7752         kvm_make_request(KVM_REQ_EVENT, vcpu);
7753         return EMULATE_DONE;
7754 }
7755 EXPORT_SYMBOL_GPL(kvm_task_switch);
7756
7757 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7758 {
7759         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7760                 /*
7761                  * When EFER.LME and CR0.PG are set, the processor is in
7762                  * 64-bit mode (though maybe in a 32-bit code segment).
7763                  * CR4.PAE and EFER.LMA must be set.
7764                  */
7765                 if (!(sregs->cr4 & X86_CR4_PAE)
7766                     || !(sregs->efer & EFER_LMA))
7767                         return -EINVAL;
7768         } else {
7769                 /*
7770                  * Not in 64-bit mode: EFER.LMA is clear and the code
7771                  * segment cannot be 64-bit.
7772                  */
7773                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7774                         return -EINVAL;
7775         }
7776
7777         return 0;
7778 }
7779
7780 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7781                                   struct kvm_sregs *sregs)
7782 {
7783         struct msr_data apic_base_msr;
7784         int mmu_reset_needed = 0;
7785         int pending_vec, max_bits, idx;
7786         struct desc_ptr dt;
7787         int ret = -EINVAL;
7788
7789         vcpu_load(vcpu);
7790
7791         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7792                         (sregs->cr4 & X86_CR4_OSXSAVE))
7793                 goto out;
7794
7795         if (kvm_valid_sregs(vcpu, sregs))
7796                 goto out;
7797
7798         apic_base_msr.data = sregs->apic_base;
7799         apic_base_msr.host_initiated = true;
7800         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7801                 goto out;
7802
7803         dt.size = sregs->idt.limit;
7804         dt.address = sregs->idt.base;
7805         kvm_x86_ops->set_idt(vcpu, &dt);
7806         dt.size = sregs->gdt.limit;
7807         dt.address = sregs->gdt.base;
7808         kvm_x86_ops->set_gdt(vcpu, &dt);
7809
7810         vcpu->arch.cr2 = sregs->cr2;
7811         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7812         vcpu->arch.cr3 = sregs->cr3;
7813         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7814
7815         kvm_set_cr8(vcpu, sregs->cr8);
7816
7817         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7818         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7819
7820         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7821         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7822         vcpu->arch.cr0 = sregs->cr0;
7823
7824         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7825         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7826         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7827                 kvm_update_cpuid(vcpu);
7828
7829         idx = srcu_read_lock(&vcpu->kvm->srcu);
7830         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7831                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7832                 mmu_reset_needed = 1;
7833         }
7834         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7835
7836         if (mmu_reset_needed)
7837                 kvm_mmu_reset_context(vcpu);
7838
7839         max_bits = KVM_NR_INTERRUPTS;
7840         pending_vec = find_first_bit(
7841                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7842         if (pending_vec < max_bits) {
7843                 kvm_queue_interrupt(vcpu, pending_vec, false);
7844                 pr_debug("Set back pending irq %d\n", pending_vec);
7845         }
7846
7847         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7848         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7849         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7850         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7851         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7852         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7853
7854         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7855         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7856
7857         update_cr8_intercept(vcpu);
7858
7859         /* Older userspace won't unhalt the vcpu on reset. */
7860         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7861             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7862             !is_protmode(vcpu))
7863                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7864
7865         kvm_make_request(KVM_REQ_EVENT, vcpu);
7866
7867         ret = 0;
7868 out:
7869         vcpu_put(vcpu);
7870         return ret;
7871 }
7872
7873 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7874                                         struct kvm_guest_debug *dbg)
7875 {
7876         unsigned long rflags;
7877         int i, r;
7878
7879         vcpu_load(vcpu);
7880
7881         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7882                 r = -EBUSY;
7883                 if (vcpu->arch.exception.pending)
7884                         goto out;
7885                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7886                         kvm_queue_exception(vcpu, DB_VECTOR);
7887                 else
7888                         kvm_queue_exception(vcpu, BP_VECTOR);
7889         }
7890
7891         /*
7892          * Read rflags as long as potentially injected trace flags are still
7893          * filtered out.
7894          */
7895         rflags = kvm_get_rflags(vcpu);
7896
7897         vcpu->guest_debug = dbg->control;
7898         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7899                 vcpu->guest_debug = 0;
7900
7901         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7902                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7903                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7904                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7905         } else {
7906                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7907                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7908         }
7909         kvm_update_dr7(vcpu);
7910
7911         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7912                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7913                         get_segment_base(vcpu, VCPU_SREG_CS);
7914
7915         /*
7916          * Trigger an rflags update that will inject or remove the trace
7917          * flags.
7918          */
7919         kvm_set_rflags(vcpu, rflags);
7920
7921         kvm_x86_ops->update_bp_intercept(vcpu);
7922
7923         r = 0;
7924
7925 out:
7926         vcpu_put(vcpu);
7927         return r;
7928 }
7929
7930 /*
7931  * Translate a guest virtual address to a guest physical address.
7932  */
7933 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7934                                     struct kvm_translation *tr)
7935 {
7936         unsigned long vaddr = tr->linear_address;
7937         gpa_t gpa;
7938         int idx;
7939
7940         vcpu_load(vcpu);
7941
7942         idx = srcu_read_lock(&vcpu->kvm->srcu);
7943         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7944         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7945         tr->physical_address = gpa;
7946         tr->valid = gpa != UNMAPPED_GVA;
7947         tr->writeable = 1;
7948         tr->usermode = 0;
7949
7950         vcpu_put(vcpu);
7951         return 0;
7952 }
7953
7954 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7955 {
7956         struct fxregs_state *fxsave;
7957
7958         vcpu_load(vcpu);
7959
7960         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
7961         memcpy(fpu->fpr, fxsave->st_space, 128);
7962         fpu->fcw = fxsave->cwd;
7963         fpu->fsw = fxsave->swd;
7964         fpu->ftwx = fxsave->twd;
7965         fpu->last_opcode = fxsave->fop;
7966         fpu->last_ip = fxsave->rip;
7967         fpu->last_dp = fxsave->rdp;
7968         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7969
7970         vcpu_put(vcpu);
7971         return 0;
7972 }
7973
7974 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7975 {
7976         struct fxregs_state *fxsave;
7977
7978         vcpu_load(vcpu);
7979
7980         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
7981
7982         memcpy(fxsave->st_space, fpu->fpr, 128);
7983         fxsave->cwd = fpu->fcw;
7984         fxsave->swd = fpu->fsw;
7985         fxsave->twd = fpu->ftwx;
7986         fxsave->fop = fpu->last_opcode;
7987         fxsave->rip = fpu->last_ip;
7988         fxsave->rdp = fpu->last_dp;
7989         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7990
7991         vcpu_put(vcpu);
7992         return 0;
7993 }
7994
7995 static void fx_init(struct kvm_vcpu *vcpu)
7996 {
7997         fpstate_init(&vcpu->arch.guest_fpu.state);
7998         if (boot_cpu_has(X86_FEATURE_XSAVES))
7999                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8000                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8001
8002         /*
8003          * Ensure guest xcr0 is valid for loading
8004          */
8005         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8006
8007         vcpu->arch.cr0 |= X86_CR0_ET;
8008 }
8009
8010 /* Swap (qemu) user FPU context for the guest FPU context. */
8011 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8012 {
8013         preempt_disable();
8014         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8015         /* PKRU is separately restored in kvm_x86_ops->run.  */
8016         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8017                                 ~XFEATURE_MASK_PKRU);
8018         preempt_enable();
8019         trace_kvm_fpu(1);
8020 }
8021
8022 /* When vcpu_run ends, restore user space FPU context. */
8023 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8024 {
8025         preempt_disable();
8026         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8027         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8028         preempt_enable();
8029         ++vcpu->stat.fpu_reload;
8030         trace_kvm_fpu(0);
8031 }
8032
8033 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8034 {
8035         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8036
8037         kvmclock_reset(vcpu);
8038
8039         kvm_x86_ops->vcpu_free(vcpu);
8040         free_cpumask_var(wbinvd_dirty_mask);
8041 }
8042
8043 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8044                                                 unsigned int id)
8045 {
8046         struct kvm_vcpu *vcpu;
8047
8048         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8049                 printk_once(KERN_WARNING
8050                 "kvm: SMP vm created on host with unstable TSC; "
8051                 "guest TSC will not be reliable\n");
8052
8053         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8054
8055         return vcpu;
8056 }
8057
8058 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8059 {
8060         kvm_vcpu_mtrr_init(vcpu);
8061         vcpu_load(vcpu);
8062         kvm_vcpu_reset(vcpu, false);
8063         kvm_mmu_setup(vcpu);
8064         vcpu_put(vcpu);
8065         return 0;
8066 }
8067
8068 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8069 {
8070         struct msr_data msr;
8071         struct kvm *kvm = vcpu->kvm;
8072
8073         kvm_hv_vcpu_postcreate(vcpu);
8074
8075         if (mutex_lock_killable(&vcpu->mutex))
8076                 return;
8077         vcpu_load(vcpu);
8078         msr.data = 0x0;
8079         msr.index = MSR_IA32_TSC;
8080         msr.host_initiated = true;
8081         kvm_write_tsc(vcpu, &msr);
8082         vcpu_put(vcpu);
8083         mutex_unlock(&vcpu->mutex);
8084
8085         if (!kvmclock_periodic_sync)
8086                 return;
8087
8088         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8089                                         KVMCLOCK_SYNC_PERIOD);
8090 }
8091
8092 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8093 {
8094         vcpu->arch.apf.msr_val = 0;
8095
8096         vcpu_load(vcpu);
8097         kvm_mmu_unload(vcpu);
8098         vcpu_put(vcpu);
8099
8100         kvm_x86_ops->vcpu_free(vcpu);
8101 }
8102
8103 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8104 {
8105         kvm_lapic_reset(vcpu, init_event);
8106
8107         vcpu->arch.hflags = 0;
8108
8109         vcpu->arch.smi_pending = 0;
8110         vcpu->arch.smi_count = 0;
8111         atomic_set(&vcpu->arch.nmi_queued, 0);
8112         vcpu->arch.nmi_pending = 0;
8113         vcpu->arch.nmi_injected = false;
8114         kvm_clear_interrupt_queue(vcpu);
8115         kvm_clear_exception_queue(vcpu);
8116         vcpu->arch.exception.pending = false;
8117
8118         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8119         kvm_update_dr0123(vcpu);
8120         vcpu->arch.dr6 = DR6_INIT;
8121         kvm_update_dr6(vcpu);
8122         vcpu->arch.dr7 = DR7_FIXED_1;
8123         kvm_update_dr7(vcpu);
8124
8125         vcpu->arch.cr2 = 0;
8126
8127         kvm_make_request(KVM_REQ_EVENT, vcpu);
8128         vcpu->arch.apf.msr_val = 0;
8129         vcpu->arch.st.msr_val = 0;
8130
8131         kvmclock_reset(vcpu);
8132
8133         kvm_clear_async_pf_completion_queue(vcpu);
8134         kvm_async_pf_hash_reset(vcpu);
8135         vcpu->arch.apf.halted = false;
8136
8137         if (kvm_mpx_supported()) {
8138                 void *mpx_state_buffer;
8139
8140                 /*
8141                  * To avoid have the INIT path from kvm_apic_has_events() that be
8142                  * called with loaded FPU and does not let userspace fix the state.
8143                  */
8144                 if (init_event)
8145                         kvm_put_guest_fpu(vcpu);
8146                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8147                                         XFEATURE_MASK_BNDREGS);
8148                 if (mpx_state_buffer)
8149                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8150                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8151                                         XFEATURE_MASK_BNDCSR);
8152                 if (mpx_state_buffer)
8153                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8154                 if (init_event)
8155                         kvm_load_guest_fpu(vcpu);
8156         }
8157
8158         if (!init_event) {
8159                 kvm_pmu_reset(vcpu);
8160                 vcpu->arch.smbase = 0x30000;
8161
8162                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8163                 vcpu->arch.msr_misc_features_enables = 0;
8164
8165                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8166         }
8167
8168         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8169         vcpu->arch.regs_avail = ~0;
8170         vcpu->arch.regs_dirty = ~0;
8171
8172         vcpu->arch.ia32_xss = 0;
8173
8174         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8175 }
8176
8177 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8178 {
8179         struct kvm_segment cs;
8180
8181         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8182         cs.selector = vector << 8;
8183         cs.base = vector << 12;
8184         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8185         kvm_rip_write(vcpu, 0);
8186 }
8187
8188 int kvm_arch_hardware_enable(void)
8189 {
8190         struct kvm *kvm;
8191         struct kvm_vcpu *vcpu;
8192         int i;
8193         int ret;
8194         u64 local_tsc;
8195         u64 max_tsc = 0;
8196         bool stable, backwards_tsc = false;
8197
8198         kvm_shared_msr_cpu_online();
8199         ret = kvm_x86_ops->hardware_enable();
8200         if (ret != 0)
8201                 return ret;
8202
8203         local_tsc = rdtsc();
8204         stable = !kvm_check_tsc_unstable();
8205         list_for_each_entry(kvm, &vm_list, vm_list) {
8206                 kvm_for_each_vcpu(i, vcpu, kvm) {
8207                         if (!stable && vcpu->cpu == smp_processor_id())
8208                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8209                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8210                                 backwards_tsc = true;
8211                                 if (vcpu->arch.last_host_tsc > max_tsc)
8212                                         max_tsc = vcpu->arch.last_host_tsc;
8213                         }
8214                 }
8215         }
8216
8217         /*
8218          * Sometimes, even reliable TSCs go backwards.  This happens on
8219          * platforms that reset TSC during suspend or hibernate actions, but
8220          * maintain synchronization.  We must compensate.  Fortunately, we can
8221          * detect that condition here, which happens early in CPU bringup,
8222          * before any KVM threads can be running.  Unfortunately, we can't
8223          * bring the TSCs fully up to date with real time, as we aren't yet far
8224          * enough into CPU bringup that we know how much real time has actually
8225          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8226          * variables that haven't been updated yet.
8227          *
8228          * So we simply find the maximum observed TSC above, then record the
8229          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8230          * the adjustment will be applied.  Note that we accumulate
8231          * adjustments, in case multiple suspend cycles happen before some VCPU
8232          * gets a chance to run again.  In the event that no KVM threads get a
8233          * chance to run, we will miss the entire elapsed period, as we'll have
8234          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8235          * loose cycle time.  This isn't too big a deal, since the loss will be
8236          * uniform across all VCPUs (not to mention the scenario is extremely
8237          * unlikely). It is possible that a second hibernate recovery happens
8238          * much faster than a first, causing the observed TSC here to be
8239          * smaller; this would require additional padding adjustment, which is
8240          * why we set last_host_tsc to the local tsc observed here.
8241          *
8242          * N.B. - this code below runs only on platforms with reliable TSC,
8243          * as that is the only way backwards_tsc is set above.  Also note
8244          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8245          * have the same delta_cyc adjustment applied if backwards_tsc
8246          * is detected.  Note further, this adjustment is only done once,
8247          * as we reset last_host_tsc on all VCPUs to stop this from being
8248          * called multiple times (one for each physical CPU bringup).
8249          *
8250          * Platforms with unreliable TSCs don't have to deal with this, they
8251          * will be compensated by the logic in vcpu_load, which sets the TSC to
8252          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8253          * guarantee that they stay in perfect synchronization.
8254          */
8255         if (backwards_tsc) {
8256                 u64 delta_cyc = max_tsc - local_tsc;
8257                 list_for_each_entry(kvm, &vm_list, vm_list) {
8258                         kvm->arch.backwards_tsc_observed = true;
8259                         kvm_for_each_vcpu(i, vcpu, kvm) {
8260                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8261                                 vcpu->arch.last_host_tsc = local_tsc;
8262                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8263                         }
8264
8265                         /*
8266                          * We have to disable TSC offset matching.. if you were
8267                          * booting a VM while issuing an S4 host suspend....
8268                          * you may have some problem.  Solving this issue is
8269                          * left as an exercise to the reader.
8270                          */
8271                         kvm->arch.last_tsc_nsec = 0;
8272                         kvm->arch.last_tsc_write = 0;
8273                 }
8274
8275         }
8276         return 0;
8277 }
8278
8279 void kvm_arch_hardware_disable(void)
8280 {
8281         kvm_x86_ops->hardware_disable();
8282         drop_user_return_notifiers();
8283 }
8284
8285 int kvm_arch_hardware_setup(void)
8286 {
8287         int r;
8288
8289         r = kvm_x86_ops->hardware_setup();
8290         if (r != 0)
8291                 return r;
8292
8293         if (kvm_has_tsc_control) {
8294                 /*
8295                  * Make sure the user can only configure tsc_khz values that
8296                  * fit into a signed integer.
8297                  * A min value is not calculated needed because it will always
8298                  * be 1 on all machines.
8299                  */
8300                 u64 max = min(0x7fffffffULL,
8301                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8302                 kvm_max_guest_tsc_khz = max;
8303
8304                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8305         }
8306
8307         kvm_init_msr_list();
8308         return 0;
8309 }
8310
8311 void kvm_arch_hardware_unsetup(void)
8312 {
8313         kvm_x86_ops->hardware_unsetup();
8314 }
8315
8316 void kvm_arch_check_processor_compat(void *rtn)
8317 {
8318         kvm_x86_ops->check_processor_compatibility(rtn);
8319 }
8320
8321 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8322 {
8323         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8324 }
8325 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8326
8327 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8328 {
8329         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8330 }
8331
8332 struct static_key kvm_no_apic_vcpu __read_mostly;
8333 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8334
8335 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8336 {
8337         struct page *page;
8338         int r;
8339
8340         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8341         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8342         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8343                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8344         else
8345                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8346
8347         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8348         if (!page) {
8349                 r = -ENOMEM;
8350                 goto fail;
8351         }
8352         vcpu->arch.pio_data = page_address(page);
8353
8354         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8355
8356         r = kvm_mmu_create(vcpu);
8357         if (r < 0)
8358                 goto fail_free_pio_data;
8359
8360         if (irqchip_in_kernel(vcpu->kvm)) {
8361                 r = kvm_create_lapic(vcpu);
8362                 if (r < 0)
8363                         goto fail_mmu_destroy;
8364         } else
8365                 static_key_slow_inc(&kvm_no_apic_vcpu);
8366
8367         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8368                                        GFP_KERNEL);
8369         if (!vcpu->arch.mce_banks) {
8370                 r = -ENOMEM;
8371                 goto fail_free_lapic;
8372         }
8373         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8374
8375         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8376                 r = -ENOMEM;
8377                 goto fail_free_mce_banks;
8378         }
8379
8380         fx_init(vcpu);
8381
8382         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8383
8384         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8385
8386         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8387
8388         kvm_async_pf_hash_reset(vcpu);
8389         kvm_pmu_init(vcpu);
8390
8391         vcpu->arch.pending_external_vector = -1;
8392         vcpu->arch.preempted_in_kernel = false;
8393
8394         kvm_hv_vcpu_init(vcpu);
8395
8396         return 0;
8397
8398 fail_free_mce_banks:
8399         kfree(vcpu->arch.mce_banks);
8400 fail_free_lapic:
8401         kvm_free_lapic(vcpu);
8402 fail_mmu_destroy:
8403         kvm_mmu_destroy(vcpu);
8404 fail_free_pio_data:
8405         free_page((unsigned long)vcpu->arch.pio_data);
8406 fail:
8407         return r;
8408 }
8409
8410 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8411 {
8412         int idx;
8413
8414         kvm_hv_vcpu_uninit(vcpu);
8415         kvm_pmu_destroy(vcpu);
8416         kfree(vcpu->arch.mce_banks);
8417         kvm_free_lapic(vcpu);
8418         idx = srcu_read_lock(&vcpu->kvm->srcu);
8419         kvm_mmu_destroy(vcpu);
8420         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8421         free_page((unsigned long)vcpu->arch.pio_data);
8422         if (!lapic_in_kernel(vcpu))
8423                 static_key_slow_dec(&kvm_no_apic_vcpu);
8424 }
8425
8426 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8427 {
8428         kvm_x86_ops->sched_in(vcpu, cpu);
8429 }
8430
8431 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8432 {
8433         if (type)
8434                 return -EINVAL;
8435
8436         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8437         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8438         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8439         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8440         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8441
8442         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8443         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8444         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8445         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8446                 &kvm->arch.irq_sources_bitmap);
8447
8448         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8449         mutex_init(&kvm->arch.apic_map_lock);
8450         mutex_init(&kvm->arch.hyperv.hv_lock);
8451         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8452
8453         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8454         pvclock_update_vm_gtod_copy(kvm);
8455
8456         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8457         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8458
8459         kvm_page_track_init(kvm);
8460         kvm_mmu_init_vm(kvm);
8461
8462         if (kvm_x86_ops->vm_init)
8463                 return kvm_x86_ops->vm_init(kvm);
8464
8465         return 0;
8466 }
8467
8468 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8469 {
8470         vcpu_load(vcpu);
8471         kvm_mmu_unload(vcpu);
8472         vcpu_put(vcpu);
8473 }
8474
8475 static void kvm_free_vcpus(struct kvm *kvm)
8476 {
8477         unsigned int i;
8478         struct kvm_vcpu *vcpu;
8479
8480         /*
8481          * Unpin any mmu pages first.
8482          */
8483         kvm_for_each_vcpu(i, vcpu, kvm) {
8484                 kvm_clear_async_pf_completion_queue(vcpu);
8485                 kvm_unload_vcpu_mmu(vcpu);
8486         }
8487         kvm_for_each_vcpu(i, vcpu, kvm)
8488                 kvm_arch_vcpu_free(vcpu);
8489
8490         mutex_lock(&kvm->lock);
8491         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8492                 kvm->vcpus[i] = NULL;
8493
8494         atomic_set(&kvm->online_vcpus, 0);
8495         mutex_unlock(&kvm->lock);
8496 }
8497
8498 void kvm_arch_sync_events(struct kvm *kvm)
8499 {
8500         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8501         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8502         kvm_free_pit(kvm);
8503 }
8504
8505 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8506 {
8507         int i, r;
8508         unsigned long hva;
8509         struct kvm_memslots *slots = kvm_memslots(kvm);
8510         struct kvm_memory_slot *slot, old;
8511
8512         /* Called with kvm->slots_lock held.  */
8513         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8514                 return -EINVAL;
8515
8516         slot = id_to_memslot(slots, id);
8517         if (size) {
8518                 if (slot->npages)
8519                         return -EEXIST;
8520
8521                 /*
8522                  * MAP_SHARED to prevent internal slot pages from being moved
8523                  * by fork()/COW.
8524                  */
8525                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8526                               MAP_SHARED | MAP_ANONYMOUS, 0);
8527                 if (IS_ERR((void *)hva))
8528                         return PTR_ERR((void *)hva);
8529         } else {
8530                 if (!slot->npages)
8531                         return 0;
8532
8533                 hva = 0;
8534         }
8535
8536         old = *slot;
8537         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8538                 struct kvm_userspace_memory_region m;
8539
8540                 m.slot = id | (i << 16);
8541                 m.flags = 0;
8542                 m.guest_phys_addr = gpa;
8543                 m.userspace_addr = hva;
8544                 m.memory_size = size;
8545                 r = __kvm_set_memory_region(kvm, &m);
8546                 if (r < 0)
8547                         return r;
8548         }
8549
8550         if (!size)
8551                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8552
8553         return 0;
8554 }
8555 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8556
8557 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8558 {
8559         int r;
8560
8561         mutex_lock(&kvm->slots_lock);
8562         r = __x86_set_memory_region(kvm, id, gpa, size);
8563         mutex_unlock(&kvm->slots_lock);
8564
8565         return r;
8566 }
8567 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8568
8569 void kvm_arch_destroy_vm(struct kvm *kvm)
8570 {
8571         if (current->mm == kvm->mm) {
8572                 /*
8573                  * Free memory regions allocated on behalf of userspace,
8574                  * unless the the memory map has changed due to process exit
8575                  * or fd copying.
8576                  */
8577                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8578                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8579                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8580         }
8581         if (kvm_x86_ops->vm_destroy)
8582                 kvm_x86_ops->vm_destroy(kvm);
8583         kvm_pic_destroy(kvm);
8584         kvm_ioapic_destroy(kvm);
8585         kvm_free_vcpus(kvm);
8586         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8587         kvm_mmu_uninit_vm(kvm);
8588         kvm_page_track_cleanup(kvm);
8589 }
8590
8591 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8592                            struct kvm_memory_slot *dont)
8593 {
8594         int i;
8595
8596         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8597                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8598                         kvfree(free->arch.rmap[i]);
8599                         free->arch.rmap[i] = NULL;
8600                 }
8601                 if (i == 0)
8602                         continue;
8603
8604                 if (!dont || free->arch.lpage_info[i - 1] !=
8605                              dont->arch.lpage_info[i - 1]) {
8606                         kvfree(free->arch.lpage_info[i - 1]);
8607                         free->arch.lpage_info[i - 1] = NULL;
8608                 }
8609         }
8610
8611         kvm_page_track_free_memslot(free, dont);
8612 }
8613
8614 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8615                             unsigned long npages)
8616 {
8617         int i;
8618
8619         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8620                 struct kvm_lpage_info *linfo;
8621                 unsigned long ugfn;
8622                 int lpages;
8623                 int level = i + 1;
8624
8625                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8626                                       slot->base_gfn, level) + 1;
8627
8628                 slot->arch.rmap[i] =
8629                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8630                 if (!slot->arch.rmap[i])
8631                         goto out_free;
8632                 if (i == 0)
8633                         continue;
8634
8635                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8636                 if (!linfo)
8637                         goto out_free;
8638
8639                 slot->arch.lpage_info[i - 1] = linfo;
8640
8641                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8642                         linfo[0].disallow_lpage = 1;
8643                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8644                         linfo[lpages - 1].disallow_lpage = 1;
8645                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8646                 /*
8647                  * If the gfn and userspace address are not aligned wrt each
8648                  * other, or if explicitly asked to, disable large page
8649                  * support for this slot
8650                  */
8651                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8652                     !kvm_largepages_enabled()) {
8653                         unsigned long j;
8654
8655                         for (j = 0; j < lpages; ++j)
8656                                 linfo[j].disallow_lpage = 1;
8657                 }
8658         }
8659
8660         if (kvm_page_track_create_memslot(slot, npages))
8661                 goto out_free;
8662
8663         return 0;
8664
8665 out_free:
8666         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8667                 kvfree(slot->arch.rmap[i]);
8668                 slot->arch.rmap[i] = NULL;
8669                 if (i == 0)
8670                         continue;
8671
8672                 kvfree(slot->arch.lpage_info[i - 1]);
8673                 slot->arch.lpage_info[i - 1] = NULL;
8674         }
8675         return -ENOMEM;
8676 }
8677
8678 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8679 {
8680         /*
8681          * memslots->generation has been incremented.
8682          * mmio generation may have reached its maximum value.
8683          */
8684         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8685 }
8686
8687 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8688                                 struct kvm_memory_slot *memslot,
8689                                 const struct kvm_userspace_memory_region *mem,
8690                                 enum kvm_mr_change change)
8691 {
8692         return 0;
8693 }
8694
8695 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8696                                      struct kvm_memory_slot *new)
8697 {
8698         /* Still write protect RO slot */
8699         if (new->flags & KVM_MEM_READONLY) {
8700                 kvm_mmu_slot_remove_write_access(kvm, new);
8701                 return;
8702         }
8703
8704         /*
8705          * Call kvm_x86_ops dirty logging hooks when they are valid.
8706          *
8707          * kvm_x86_ops->slot_disable_log_dirty is called when:
8708          *
8709          *  - KVM_MR_CREATE with dirty logging is disabled
8710          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8711          *
8712          * The reason is, in case of PML, we need to set D-bit for any slots
8713          * with dirty logging disabled in order to eliminate unnecessary GPA
8714          * logging in PML buffer (and potential PML buffer full VMEXT). This
8715          * guarantees leaving PML enabled during guest's lifetime won't have
8716          * any additonal overhead from PML when guest is running with dirty
8717          * logging disabled for memory slots.
8718          *
8719          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8720          * to dirty logging mode.
8721          *
8722          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8723          *
8724          * In case of write protect:
8725          *
8726          * Write protect all pages for dirty logging.
8727          *
8728          * All the sptes including the large sptes which point to this
8729          * slot are set to readonly. We can not create any new large
8730          * spte on this slot until the end of the logging.
8731          *
8732          * See the comments in fast_page_fault().
8733          */
8734         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8735                 if (kvm_x86_ops->slot_enable_log_dirty)
8736                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8737                 else
8738                         kvm_mmu_slot_remove_write_access(kvm, new);
8739         } else {
8740                 if (kvm_x86_ops->slot_disable_log_dirty)
8741                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8742         }
8743 }
8744
8745 void kvm_arch_commit_memory_region(struct kvm *kvm,
8746                                 const struct kvm_userspace_memory_region *mem,
8747                                 const struct kvm_memory_slot *old,
8748                                 const struct kvm_memory_slot *new,
8749                                 enum kvm_mr_change change)
8750 {
8751         int nr_mmu_pages = 0;
8752
8753         if (!kvm->arch.n_requested_mmu_pages)
8754                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8755
8756         if (nr_mmu_pages)
8757                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8758
8759         /*
8760          * Dirty logging tracks sptes in 4k granularity, meaning that large
8761          * sptes have to be split.  If live migration is successful, the guest
8762          * in the source machine will be destroyed and large sptes will be
8763          * created in the destination. However, if the guest continues to run
8764          * in the source machine (for example if live migration fails), small
8765          * sptes will remain around and cause bad performance.
8766          *
8767          * Scan sptes if dirty logging has been stopped, dropping those
8768          * which can be collapsed into a single large-page spte.  Later
8769          * page faults will create the large-page sptes.
8770          */
8771         if ((change != KVM_MR_DELETE) &&
8772                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8773                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8774                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8775
8776         /*
8777          * Set up write protection and/or dirty logging for the new slot.
8778          *
8779          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8780          * been zapped so no dirty logging staff is needed for old slot. For
8781          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8782          * new and it's also covered when dealing with the new slot.
8783          *
8784          * FIXME: const-ify all uses of struct kvm_memory_slot.
8785          */
8786         if (change != KVM_MR_DELETE)
8787                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8788 }
8789
8790 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8791 {
8792         kvm_mmu_invalidate_zap_all_pages(kvm);
8793 }
8794
8795 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8796                                    struct kvm_memory_slot *slot)
8797 {
8798         kvm_page_track_flush_slot(kvm, slot);
8799 }
8800
8801 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8802 {
8803         if (!list_empty_careful(&vcpu->async_pf.done))
8804                 return true;
8805
8806         if (kvm_apic_has_events(vcpu))
8807                 return true;
8808
8809         if (vcpu->arch.pv.pv_unhalted)
8810                 return true;
8811
8812         if (vcpu->arch.exception.pending)
8813                 return true;
8814
8815         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8816             (vcpu->arch.nmi_pending &&
8817              kvm_x86_ops->nmi_allowed(vcpu)))
8818                 return true;
8819
8820         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8821             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8822                 return true;
8823
8824         if (kvm_arch_interrupt_allowed(vcpu) &&
8825             kvm_cpu_has_interrupt(vcpu))
8826                 return true;
8827
8828         if (kvm_hv_has_stimer_pending(vcpu))
8829                 return true;
8830
8831         return false;
8832 }
8833
8834 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8835 {
8836         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8837 }
8838
8839 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8840 {
8841         return vcpu->arch.preempted_in_kernel;
8842 }
8843
8844 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8845 {
8846         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8847 }
8848
8849 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8850 {
8851         return kvm_x86_ops->interrupt_allowed(vcpu);
8852 }
8853
8854 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8855 {
8856         if (is_64_bit_mode(vcpu))
8857                 return kvm_rip_read(vcpu);
8858         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8859                      kvm_rip_read(vcpu));
8860 }
8861 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8862
8863 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8864 {
8865         return kvm_get_linear_rip(vcpu) == linear_rip;
8866 }
8867 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8868
8869 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8870 {
8871         unsigned long rflags;
8872
8873         rflags = kvm_x86_ops->get_rflags(vcpu);
8874         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8875                 rflags &= ~X86_EFLAGS_TF;
8876         return rflags;
8877 }
8878 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8879
8880 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8881 {
8882         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8883             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8884                 rflags |= X86_EFLAGS_TF;
8885         kvm_x86_ops->set_rflags(vcpu, rflags);
8886 }
8887
8888 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8889 {
8890         __kvm_set_rflags(vcpu, rflags);
8891         kvm_make_request(KVM_REQ_EVENT, vcpu);
8892 }
8893 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8894
8895 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8896 {
8897         int r;
8898
8899         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8900               work->wakeup_all)
8901                 return;
8902
8903         r = kvm_mmu_reload(vcpu);
8904         if (unlikely(r))
8905                 return;
8906
8907         if (!vcpu->arch.mmu.direct_map &&
8908               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8909                 return;
8910
8911         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8912 }
8913
8914 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8915 {
8916         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8917 }
8918
8919 static inline u32 kvm_async_pf_next_probe(u32 key)
8920 {
8921         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8922 }
8923
8924 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8925 {
8926         u32 key = kvm_async_pf_hash_fn(gfn);
8927
8928         while (vcpu->arch.apf.gfns[key] != ~0)
8929                 key = kvm_async_pf_next_probe(key);
8930
8931         vcpu->arch.apf.gfns[key] = gfn;
8932 }
8933
8934 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8935 {
8936         int i;
8937         u32 key = kvm_async_pf_hash_fn(gfn);
8938
8939         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8940                      (vcpu->arch.apf.gfns[key] != gfn &&
8941                       vcpu->arch.apf.gfns[key] != ~0); i++)
8942                 key = kvm_async_pf_next_probe(key);
8943
8944         return key;
8945 }
8946
8947 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8948 {
8949         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8950 }
8951
8952 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8953 {
8954         u32 i, j, k;
8955
8956         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8957         while (true) {
8958                 vcpu->arch.apf.gfns[i] = ~0;
8959                 do {
8960                         j = kvm_async_pf_next_probe(j);
8961                         if (vcpu->arch.apf.gfns[j] == ~0)
8962                                 return;
8963                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8964                         /*
8965                          * k lies cyclically in ]i,j]
8966                          * |    i.k.j |
8967                          * |....j i.k.| or  |.k..j i...|
8968                          */
8969                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8970                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8971                 i = j;
8972         }
8973 }
8974
8975 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8976 {
8977
8978         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8979                                       sizeof(val));
8980 }
8981
8982 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
8983 {
8984
8985         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
8986                                       sizeof(u32));
8987 }
8988
8989 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8990                                      struct kvm_async_pf *work)
8991 {
8992         struct x86_exception fault;
8993
8994         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8995         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8996
8997         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8998             (vcpu->arch.apf.send_user_only &&
8999              kvm_x86_ops->get_cpl(vcpu) == 0))
9000                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9001         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9002                 fault.vector = PF_VECTOR;
9003                 fault.error_code_valid = true;
9004                 fault.error_code = 0;
9005                 fault.nested_page_fault = false;
9006                 fault.address = work->arch.token;
9007                 fault.async_page_fault = true;
9008                 kvm_inject_page_fault(vcpu, &fault);
9009         }
9010 }
9011
9012 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9013                                  struct kvm_async_pf *work)
9014 {
9015         struct x86_exception fault;
9016         u32 val;
9017
9018         if (work->wakeup_all)
9019                 work->arch.token = ~0; /* broadcast wakeup */
9020         else
9021                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9022         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9023
9024         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9025             !apf_get_user(vcpu, &val)) {
9026                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9027                     vcpu->arch.exception.pending &&
9028                     vcpu->arch.exception.nr == PF_VECTOR &&
9029                     !apf_put_user(vcpu, 0)) {
9030                         vcpu->arch.exception.injected = false;
9031                         vcpu->arch.exception.pending = false;
9032                         vcpu->arch.exception.nr = 0;
9033                         vcpu->arch.exception.has_error_code = false;
9034                         vcpu->arch.exception.error_code = 0;
9035                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9036                         fault.vector = PF_VECTOR;
9037                         fault.error_code_valid = true;
9038                         fault.error_code = 0;
9039                         fault.nested_page_fault = false;
9040                         fault.address = work->arch.token;
9041                         fault.async_page_fault = true;
9042                         kvm_inject_page_fault(vcpu, &fault);
9043                 }
9044         }
9045         vcpu->arch.apf.halted = false;
9046         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9047 }
9048
9049 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9050 {
9051         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9052                 return true;
9053         else
9054                 return kvm_can_do_async_pf(vcpu);
9055 }
9056
9057 void kvm_arch_start_assignment(struct kvm *kvm)
9058 {
9059         atomic_inc(&kvm->arch.assigned_device_count);
9060 }
9061 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9062
9063 void kvm_arch_end_assignment(struct kvm *kvm)
9064 {
9065         atomic_dec(&kvm->arch.assigned_device_count);
9066 }
9067 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9068
9069 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9070 {
9071         return atomic_read(&kvm->arch.assigned_device_count);
9072 }
9073 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9074
9075 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9076 {
9077         atomic_inc(&kvm->arch.noncoherent_dma_count);
9078 }
9079 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9080
9081 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9082 {
9083         atomic_dec(&kvm->arch.noncoherent_dma_count);
9084 }
9085 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9086
9087 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9088 {
9089         return atomic_read(&kvm->arch.noncoherent_dma_count);
9090 }
9091 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9092
9093 bool kvm_arch_has_irq_bypass(void)
9094 {
9095         return kvm_x86_ops->update_pi_irte != NULL;
9096 }
9097
9098 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9099                                       struct irq_bypass_producer *prod)
9100 {
9101         struct kvm_kernel_irqfd *irqfd =
9102                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9103
9104         irqfd->producer = prod;
9105
9106         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9107                                            prod->irq, irqfd->gsi, 1);
9108 }
9109
9110 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9111                                       struct irq_bypass_producer *prod)
9112 {
9113         int ret;
9114         struct kvm_kernel_irqfd *irqfd =
9115                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9116
9117         WARN_ON(irqfd->producer != prod);
9118         irqfd->producer = NULL;
9119
9120         /*
9121          * When producer of consumer is unregistered, we change back to
9122          * remapped mode, so we can re-use the current implementation
9123          * when the irq is masked/disabled or the consumer side (KVM
9124          * int this case doesn't want to receive the interrupts.
9125         */
9126         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9127         if (ret)
9128                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9129                        " fails: %d\n", irqfd->consumer.token, ret);
9130 }
9131
9132 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9133                                    uint32_t guest_irq, bool set)
9134 {
9135         if (!kvm_x86_ops->update_pi_irte)
9136                 return -EINVAL;
9137
9138         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9139 }
9140
9141 bool kvm_vector_hashing_enabled(void)
9142 {
9143         return vector_hashing;
9144 }
9145 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9146
9147 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9148 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9149 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9150 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9151 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9152 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9153 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9154 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9155 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9156 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9157 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9158 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9159 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9160 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9161 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9162 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9163 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9164 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9165 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);