2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
51 #define CREATE_TRACE_POINTS
54 #include <asm/debugreg.h>
61 #include <asm/pvclock.h>
62 #include <asm/div64.h>
64 #define MAX_IO_MSRS 256
65 #define KVM_MAX_MCE_BANKS 32
66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
68 #define emul_to_vcpu(ctxt) \
69 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static void process_nmi(struct kvm_vcpu *vcpu);
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94 bool kvm_has_tsc_control;
95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
96 u32 kvm_max_guest_tsc_khz;
97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
99 #define KVM_NR_SHARED_MSRS 16
101 struct kvm_shared_msrs_global {
103 u32 msrs[KVM_NR_SHARED_MSRS];
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
109 struct kvm_shared_msr_values {
112 } values[KVM_NR_SHARED_MSRS];
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
154 u64 __read_mostly host_xcr0;
156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
161 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
162 vcpu->arch.apf.gfns[i] = ~0;
165 static void kvm_on_user_return(struct user_return_notifier *urn)
168 struct kvm_shared_msrs *locals
169 = container_of(urn, struct kvm_shared_msrs, urn);
170 struct kvm_shared_msr_values *values;
172 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
173 values = &locals->values[slot];
174 if (values->host != values->curr) {
175 wrmsrl(shared_msrs_global.msrs[slot], values->host);
176 values->curr = values->host;
179 locals->registered = false;
180 user_return_notifier_unregister(urn);
183 static void shared_msr_update(unsigned slot, u32 msr)
185 struct kvm_shared_msrs *smsr;
188 smsr = &__get_cpu_var(shared_msrs);
189 /* only read, and nobody should modify it at this time,
190 * so don't need lock */
191 if (slot >= shared_msrs_global.nr) {
192 printk(KERN_ERR "kvm: invalid MSR slot!");
195 rdmsrl_safe(msr, &value);
196 smsr->values[slot].host = value;
197 smsr->values[slot].curr = value;
200 void kvm_define_shared_msr(unsigned slot, u32 msr)
202 if (slot >= shared_msrs_global.nr)
203 shared_msrs_global.nr = slot + 1;
204 shared_msrs_global.msrs[slot] = msr;
205 /* we need ensured the shared_msr_global have been updated */
208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
210 static void kvm_shared_msr_cpu_online(void)
214 for (i = 0; i < shared_msrs_global.nr; ++i)
215 shared_msr_update(i, shared_msrs_global.msrs[i]);
218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
220 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222 if (((value ^ smsr->values[slot].curr) & mask) == 0)
224 smsr->values[slot].curr = value;
225 wrmsrl(shared_msrs_global.msrs[slot], value);
226 if (!smsr->registered) {
227 smsr->urn.on_user_return = kvm_on_user_return;
228 user_return_notifier_register(&smsr->urn);
229 smsr->registered = true;
232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
234 static void drop_user_return_notifiers(void *ignore)
236 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
238 if (smsr->registered)
239 kvm_on_user_return(&smsr->urn);
242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
244 if (irqchip_in_kernel(vcpu->kvm))
245 return vcpu->arch.apic_base;
247 return vcpu->arch.apic_base;
249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
253 /* TODO: reserve bits check */
254 if (irqchip_in_kernel(vcpu->kvm))
255 kvm_lapic_set_base(vcpu, data);
257 vcpu->arch.apic_base = data;
259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
261 #define EXCPT_BENIGN 0
262 #define EXCPT_CONTRIBUTORY 1
265 static int exception_class(int vector)
275 return EXCPT_CONTRIBUTORY;
282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
283 unsigned nr, bool has_error, u32 error_code,
289 kvm_make_request(KVM_REQ_EVENT, vcpu);
291 if (!vcpu->arch.exception.pending) {
293 vcpu->arch.exception.pending = true;
294 vcpu->arch.exception.has_error_code = has_error;
295 vcpu->arch.exception.nr = nr;
296 vcpu->arch.exception.error_code = error_code;
297 vcpu->arch.exception.reinject = reinject;
301 /* to check exception */
302 prev_nr = vcpu->arch.exception.nr;
303 if (prev_nr == DF_VECTOR) {
304 /* triple fault -> shutdown */
305 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
308 class1 = exception_class(prev_nr);
309 class2 = exception_class(nr);
310 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
311 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
312 /* generate double fault per SDM Table 5-5 */
313 vcpu->arch.exception.pending = true;
314 vcpu->arch.exception.has_error_code = true;
315 vcpu->arch.exception.nr = DF_VECTOR;
316 vcpu->arch.exception.error_code = 0;
318 /* replace previous exception with a new one in a hope
319 that instruction re-execution will regenerate lost
324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 kvm_multiple_exception(vcpu, nr, false, 0, false);
328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
332 kvm_multiple_exception(vcpu, nr, false, 0, true);
334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
339 kvm_inject_gp(vcpu, 0);
341 kvm_x86_ops->skip_emulated_instruction(vcpu);
343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
347 ++vcpu->stat.pf_guest;
348 vcpu->arch.cr2 = fault->address;
349 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
355 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
356 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
358 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
363 atomic_inc(&vcpu->arch.nmi_queued);
364 kvm_make_request(KVM_REQ_NMI, vcpu);
366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
370 kvm_multiple_exception(vcpu, nr, true, error_code, false);
372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
376 kvm_multiple_exception(vcpu, nr, true, error_code, true);
378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
381 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
382 * a #GP and return false.
384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
386 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
388 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
394 * This function will be used to read from the physical memory of the currently
395 * running guest. The difference to kvm_read_guest_page is that this function
396 * can read from guest physical or from the guest's guest physical memory.
398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
399 gfn_t ngfn, void *data, int offset, int len,
405 ngpa = gfn_to_gpa(ngfn);
406 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
407 if (real_gfn == UNMAPPED_GVA)
410 real_gfn = gpa_to_gfn(real_gfn);
412 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
417 void *data, int offset, int len, u32 access)
419 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
420 data, offset, len, access);
424 * Load the pae pdptrs. Return true is they are all valid.
426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
428 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
429 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
432 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
434 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
435 offset * sizeof(u64), sizeof(pdpte),
436 PFERR_USER_MASK|PFERR_WRITE_MASK);
441 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
442 if (is_present_gpte(pdpte[i]) &&
443 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
450 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
451 __set_bit(VCPU_EXREG_PDPTR,
452 (unsigned long *)&vcpu->arch.regs_avail);
453 __set_bit(VCPU_EXREG_PDPTR,
454 (unsigned long *)&vcpu->arch.regs_dirty);
459 EXPORT_SYMBOL_GPL(load_pdptrs);
461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
463 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
469 if (is_long_mode(vcpu) || !is_pae(vcpu))
472 if (!test_bit(VCPU_EXREG_PDPTR,
473 (unsigned long *)&vcpu->arch.regs_avail))
476 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
477 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
478 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
479 PFERR_USER_MASK | PFERR_WRITE_MASK);
482 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
490 unsigned long old_cr0 = kvm_read_cr0(vcpu);
491 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
492 X86_CR0_CD | X86_CR0_NW;
497 if (cr0 & 0xffffffff00000000UL)
501 cr0 &= ~CR0_RESERVED_BITS;
503 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
506 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
509 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
511 if ((vcpu->arch.efer & EFER_LME)) {
516 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
521 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
526 kvm_x86_ops->set_cr0(vcpu, cr0);
528 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
529 kvm_clear_async_pf_completion_queue(vcpu);
530 kvm_async_pf_hash_reset(vcpu);
533 if ((cr0 ^ old_cr0) & update_bits)
534 kvm_mmu_reset_context(vcpu);
537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
541 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
543 EXPORT_SYMBOL_GPL(kvm_lmsw);
545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
549 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
550 if (index != XCR_XFEATURE_ENABLED_MASK)
553 if (kvm_x86_ops->get_cpl(vcpu) != 0)
555 if (!(xcr0 & XSTATE_FP))
557 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
559 if (xcr0 & ~host_xcr0)
561 vcpu->arch.xcr0 = xcr0;
562 vcpu->guest_xcr0_loaded = 0;
566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
568 if (__kvm_set_xcr(vcpu, index, xcr)) {
569 kvm_inject_gp(vcpu, 0);
574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
576 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
578 unsigned long old_cr4 = kvm_read_cr4(vcpu);
579 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
580 X86_CR4_PAE | X86_CR4_SMEP;
581 if (cr4 & CR4_RESERVED_BITS)
584 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
587 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
590 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
593 if (is_long_mode(vcpu)) {
594 if (!(cr4 & X86_CR4_PAE))
596 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
597 && ((cr4 ^ old_cr4) & pdptr_bits)
598 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
602 if (kvm_x86_ops->set_cr4(vcpu, cr4))
605 if ((cr4 ^ old_cr4) & pdptr_bits)
606 kvm_mmu_reset_context(vcpu);
608 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
609 kvm_update_cpuid(vcpu);
613 EXPORT_SYMBOL_GPL(kvm_set_cr4);
615 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
617 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
618 kvm_mmu_sync_roots(vcpu);
619 kvm_mmu_flush_tlb(vcpu);
623 if (is_long_mode(vcpu)) {
624 if (cr3 & CR3_L_MODE_RESERVED_BITS)
628 if (cr3 & CR3_PAE_RESERVED_BITS)
630 if (is_paging(vcpu) &&
631 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
635 * We don't check reserved bits in nonpae mode, because
636 * this isn't enforced, and VMware depends on this.
641 * Does the new cr3 value map to physical memory? (Note, we
642 * catch an invalid cr3 even in real-mode, because it would
643 * cause trouble later on when we turn on paging anyway.)
645 * A real CPU would silently accept an invalid cr3 and would
646 * attempt to use it - with largely undefined (and often hard
647 * to debug) behavior on the guest side.
649 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
651 vcpu->arch.cr3 = cr3;
652 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
653 vcpu->arch.mmu.new_cr3(vcpu);
656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
658 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
660 if (cr8 & CR8_RESERVED_BITS)
662 if (irqchip_in_kernel(vcpu->kvm))
663 kvm_lapic_set_tpr(vcpu, cr8);
665 vcpu->arch.cr8 = cr8;
668 EXPORT_SYMBOL_GPL(kvm_set_cr8);
670 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
672 if (irqchip_in_kernel(vcpu->kvm))
673 return kvm_lapic_get_cr8(vcpu);
675 return vcpu->arch.cr8;
677 EXPORT_SYMBOL_GPL(kvm_get_cr8);
679 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
683 vcpu->arch.db[dr] = val;
684 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
685 vcpu->arch.eff_db[dr] = val;
688 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
692 if (val & 0xffffffff00000000ULL)
694 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
697 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
701 if (val & 0xffffffff00000000ULL)
703 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
704 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
705 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
706 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
714 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
718 res = __kvm_set_dr(vcpu, dr, val);
720 kvm_queue_exception(vcpu, UD_VECTOR);
722 kvm_inject_gp(vcpu, 0);
726 EXPORT_SYMBOL_GPL(kvm_set_dr);
728 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
732 *val = vcpu->arch.db[dr];
735 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
739 *val = vcpu->arch.dr6;
742 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
746 *val = vcpu->arch.dr7;
753 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
755 if (_kvm_get_dr(vcpu, dr, val)) {
756 kvm_queue_exception(vcpu, UD_VECTOR);
761 EXPORT_SYMBOL_GPL(kvm_get_dr);
764 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
765 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
767 * This list is modified at module load time to reflect the
768 * capabilities of the host cpu. This capabilities test skips MSRs that are
769 * kvm-specific. Those are put in the beginning of the list.
772 #define KVM_SAVE_MSRS_BEGIN 9
773 static u32 msrs_to_save[] = {
774 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
775 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
776 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
777 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
778 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
781 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
783 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
786 static unsigned num_msrs_to_save;
788 static u32 emulated_msrs[] = {
789 MSR_IA32_TSCDEADLINE,
790 MSR_IA32_MISC_ENABLE,
795 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
797 u64 old_efer = vcpu->arch.efer;
799 if (efer & efer_reserved_bits)
803 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
806 if (efer & EFER_FFXSR) {
807 struct kvm_cpuid_entry2 *feat;
809 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
810 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
814 if (efer & EFER_SVME) {
815 struct kvm_cpuid_entry2 *feat;
817 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
818 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
823 efer |= vcpu->arch.efer & EFER_LMA;
825 kvm_x86_ops->set_efer(vcpu, efer);
827 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
829 /* Update reserved bits */
830 if ((efer ^ old_efer) & EFER_NX)
831 kvm_mmu_reset_context(vcpu);
836 void kvm_enable_efer_bits(u64 mask)
838 efer_reserved_bits &= ~mask;
840 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
844 * Writes msr value into into the appropriate "register".
845 * Returns 0 on success, non-0 otherwise.
846 * Assumes vcpu_load() was already called.
848 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
850 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
854 * Adapt set_msr() to msr_io()'s calling convention
856 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
858 return kvm_set_msr(vcpu, index, *data);
861 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
865 struct pvclock_wall_clock wc;
866 struct timespec boot;
871 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
876 ++version; /* first time write, random junk */
880 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
883 * The guest calculates current wall clock time by adding
884 * system time (updated by kvm_guest_time_update below) to the
885 * wall clock specified here. guest system time equals host
886 * system time for us, thus we must fill in host boot time here.
890 wc.sec = boot.tv_sec;
891 wc.nsec = boot.tv_nsec;
892 wc.version = version;
894 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
897 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
900 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
902 uint32_t quotient, remainder;
904 /* Don't try to replace with do_div(), this one calculates
905 * "(dividend << 32) / divisor" */
907 : "=a" (quotient), "=d" (remainder)
908 : "0" (0), "1" (dividend), "r" (divisor) );
912 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
913 s8 *pshift, u32 *pmultiplier)
920 tps64 = base_khz * 1000LL;
921 scaled64 = scaled_khz * 1000LL;
922 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
927 tps32 = (uint32_t)tps64;
928 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
929 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
937 *pmultiplier = div_frac(scaled64, tps32);
939 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
940 __func__, base_khz, scaled_khz, shift, *pmultiplier);
943 static inline u64 get_kernel_ns(void)
947 WARN_ON(preemptible());
949 monotonic_to_bootbased(&ts);
950 return timespec_to_ns(&ts);
953 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
954 unsigned long max_tsc_khz;
956 static inline int kvm_tsc_changes_freq(void)
959 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
960 cpufreq_quick_get(cpu) != 0;
965 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
967 if (vcpu->arch.virtual_tsc_khz)
968 return vcpu->arch.virtual_tsc_khz;
970 return __this_cpu_read(cpu_tsc_khz);
973 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
977 WARN_ON(preemptible());
978 if (kvm_tsc_changes_freq())
979 printk_once(KERN_WARNING
980 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
981 ret = nsec * vcpu_tsc_khz(vcpu);
982 do_div(ret, USEC_PER_SEC);
986 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
988 /* Compute a scale to convert nanoseconds in TSC cycles */
989 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
990 &vcpu->arch.tsc_catchup_shift,
991 &vcpu->arch.tsc_catchup_mult);
994 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
996 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
997 vcpu->arch.tsc_catchup_mult,
998 vcpu->arch.tsc_catchup_shift);
999 tsc += vcpu->arch.last_tsc_write;
1003 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1005 struct kvm *kvm = vcpu->kvm;
1006 u64 offset, ns, elapsed;
1007 unsigned long flags;
1010 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1011 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1012 ns = get_kernel_ns();
1013 elapsed = ns - kvm->arch.last_tsc_nsec;
1014 sdiff = data - kvm->arch.last_tsc_write;
1019 * Special case: close write to TSC within 5 seconds of
1020 * another CPU is interpreted as an attempt to synchronize
1021 * The 5 seconds is to accommodate host load / swapping as
1022 * well as any reset of TSC during the boot process.
1024 * In that case, for a reliable TSC, we can match TSC offsets,
1025 * or make a best guest using elapsed value.
1027 if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1028 elapsed < 5ULL * NSEC_PER_SEC) {
1029 if (!check_tsc_unstable()) {
1030 offset = kvm->arch.last_tsc_offset;
1031 pr_debug("kvm: matched tsc offset for %llu\n", data);
1033 u64 delta = nsec_to_cycles(vcpu, elapsed);
1035 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1037 ns = kvm->arch.last_tsc_nsec;
1039 kvm->arch.last_tsc_nsec = ns;
1040 kvm->arch.last_tsc_write = data;
1041 kvm->arch.last_tsc_offset = offset;
1042 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1043 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1045 /* Reset of TSC must disable overshoot protection below */
1046 vcpu->arch.hv_clock.tsc_timestamp = 0;
1047 vcpu->arch.last_tsc_write = data;
1048 vcpu->arch.last_tsc_nsec = ns;
1050 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1052 static int kvm_guest_time_update(struct kvm_vcpu *v)
1054 unsigned long flags;
1055 struct kvm_vcpu_arch *vcpu = &v->arch;
1057 unsigned long this_tsc_khz;
1058 s64 kernel_ns, max_kernel_ns;
1061 /* Keep irq disabled to prevent changes to the clock */
1062 local_irq_save(flags);
1063 tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1064 kernel_ns = get_kernel_ns();
1065 this_tsc_khz = vcpu_tsc_khz(v);
1066 if (unlikely(this_tsc_khz == 0)) {
1067 local_irq_restore(flags);
1068 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1073 * We may have to catch up the TSC to match elapsed wall clock
1074 * time for two reasons, even if kvmclock is used.
1075 * 1) CPU could have been running below the maximum TSC rate
1076 * 2) Broken TSC compensation resets the base at each VCPU
1077 * entry to avoid unknown leaps of TSC even when running
1078 * again on the same CPU. This may cause apparent elapsed
1079 * time to disappear, and the guest to stand still or run
1082 if (vcpu->tsc_catchup) {
1083 u64 tsc = compute_guest_tsc(v, kernel_ns);
1084 if (tsc > tsc_timestamp) {
1085 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1086 tsc_timestamp = tsc;
1090 local_irq_restore(flags);
1092 if (!vcpu->time_page)
1096 * Time as measured by the TSC may go backwards when resetting the base
1097 * tsc_timestamp. The reason for this is that the TSC resolution is
1098 * higher than the resolution of the other clock scales. Thus, many
1099 * possible measurments of the TSC correspond to one measurement of any
1100 * other clock, and so a spread of values is possible. This is not a
1101 * problem for the computation of the nanosecond clock; with TSC rates
1102 * around 1GHZ, there can only be a few cycles which correspond to one
1103 * nanosecond value, and any path through this code will inevitably
1104 * take longer than that. However, with the kernel_ns value itself,
1105 * the precision may be much lower, down to HZ granularity. If the
1106 * first sampling of TSC against kernel_ns ends in the low part of the
1107 * range, and the second in the high end of the range, we can get:
1109 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1111 * As the sampling errors potentially range in the thousands of cycles,
1112 * it is possible such a time value has already been observed by the
1113 * guest. To protect against this, we must compute the system time as
1114 * observed by the guest and ensure the new system time is greater.
1117 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1118 max_kernel_ns = vcpu->last_guest_tsc -
1119 vcpu->hv_clock.tsc_timestamp;
1120 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1121 vcpu->hv_clock.tsc_to_system_mul,
1122 vcpu->hv_clock.tsc_shift);
1123 max_kernel_ns += vcpu->last_kernel_ns;
1126 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1127 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1128 &vcpu->hv_clock.tsc_shift,
1129 &vcpu->hv_clock.tsc_to_system_mul);
1130 vcpu->hw_tsc_khz = this_tsc_khz;
1133 if (max_kernel_ns > kernel_ns)
1134 kernel_ns = max_kernel_ns;
1136 /* With all the info we got, fill in the values */
1137 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1138 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1139 vcpu->last_kernel_ns = kernel_ns;
1140 vcpu->last_guest_tsc = tsc_timestamp;
1141 vcpu->hv_clock.flags = 0;
1144 * The interface expects us to write an even number signaling that the
1145 * update is finished. Since the guest won't see the intermediate
1146 * state, we just increase by 2 at the end.
1148 vcpu->hv_clock.version += 2;
1150 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1152 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1153 sizeof(vcpu->hv_clock));
1155 kunmap_atomic(shared_kaddr, KM_USER0);
1157 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1161 static bool msr_mtrr_valid(unsigned msr)
1164 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1165 case MSR_MTRRfix64K_00000:
1166 case MSR_MTRRfix16K_80000:
1167 case MSR_MTRRfix16K_A0000:
1168 case MSR_MTRRfix4K_C0000:
1169 case MSR_MTRRfix4K_C8000:
1170 case MSR_MTRRfix4K_D0000:
1171 case MSR_MTRRfix4K_D8000:
1172 case MSR_MTRRfix4K_E0000:
1173 case MSR_MTRRfix4K_E8000:
1174 case MSR_MTRRfix4K_F0000:
1175 case MSR_MTRRfix4K_F8000:
1176 case MSR_MTRRdefType:
1177 case MSR_IA32_CR_PAT:
1185 static bool valid_pat_type(unsigned t)
1187 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1190 static bool valid_mtrr_type(unsigned t)
1192 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1195 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1199 if (!msr_mtrr_valid(msr))
1202 if (msr == MSR_IA32_CR_PAT) {
1203 for (i = 0; i < 8; i++)
1204 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1207 } else if (msr == MSR_MTRRdefType) {
1210 return valid_mtrr_type(data & 0xff);
1211 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1212 for (i = 0; i < 8 ; i++)
1213 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1218 /* variable MTRRs */
1219 return valid_mtrr_type(data & 0xff);
1222 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1224 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1226 if (!mtrr_valid(vcpu, msr, data))
1229 if (msr == MSR_MTRRdefType) {
1230 vcpu->arch.mtrr_state.def_type = data;
1231 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1232 } else if (msr == MSR_MTRRfix64K_00000)
1234 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1235 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1236 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1237 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1238 else if (msr == MSR_IA32_CR_PAT)
1239 vcpu->arch.pat = data;
1240 else { /* Variable MTRRs */
1241 int idx, is_mtrr_mask;
1244 idx = (msr - 0x200) / 2;
1245 is_mtrr_mask = msr - 0x200 - 2 * idx;
1248 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1251 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1255 kvm_mmu_reset_context(vcpu);
1259 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 u64 mcg_cap = vcpu->arch.mcg_cap;
1262 unsigned bank_num = mcg_cap & 0xff;
1265 case MSR_IA32_MCG_STATUS:
1266 vcpu->arch.mcg_status = data;
1268 case MSR_IA32_MCG_CTL:
1269 if (!(mcg_cap & MCG_CTL_P))
1271 if (data != 0 && data != ~(u64)0)
1273 vcpu->arch.mcg_ctl = data;
1276 if (msr >= MSR_IA32_MC0_CTL &&
1277 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1278 u32 offset = msr - MSR_IA32_MC0_CTL;
1279 /* only 0 or all 1s can be written to IA32_MCi_CTL
1280 * some Linux kernels though clear bit 10 in bank 4 to
1281 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1282 * this to avoid an uncatched #GP in the guest
1284 if ((offset & 0x3) == 0 &&
1285 data != 0 && (data | (1 << 10)) != ~(u64)0)
1287 vcpu->arch.mce_banks[offset] = data;
1295 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1297 struct kvm *kvm = vcpu->kvm;
1298 int lm = is_long_mode(vcpu);
1299 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1300 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1301 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1302 : kvm->arch.xen_hvm_config.blob_size_32;
1303 u32 page_num = data & ~PAGE_MASK;
1304 u64 page_addr = data & PAGE_MASK;
1309 if (page_num >= blob_size)
1312 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1317 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1326 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1328 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1331 static bool kvm_hv_msr_partition_wide(u32 msr)
1335 case HV_X64_MSR_GUEST_OS_ID:
1336 case HV_X64_MSR_HYPERCALL:
1344 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1346 struct kvm *kvm = vcpu->kvm;
1349 case HV_X64_MSR_GUEST_OS_ID:
1350 kvm->arch.hv_guest_os_id = data;
1351 /* setting guest os id to zero disables hypercall page */
1352 if (!kvm->arch.hv_guest_os_id)
1353 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1355 case HV_X64_MSR_HYPERCALL: {
1360 /* if guest os id is not set hypercall should remain disabled */
1361 if (!kvm->arch.hv_guest_os_id)
1363 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1364 kvm->arch.hv_hypercall = data;
1367 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1368 addr = gfn_to_hva(kvm, gfn);
1369 if (kvm_is_error_hva(addr))
1371 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1372 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1373 if (__copy_to_user((void __user *)addr, instructions, 4))
1375 kvm->arch.hv_hypercall = data;
1379 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1380 "data 0x%llx\n", msr, data);
1386 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1389 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1392 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1393 vcpu->arch.hv_vapic = data;
1396 addr = gfn_to_hva(vcpu->kvm, data >>
1397 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1398 if (kvm_is_error_hva(addr))
1400 if (__clear_user((void __user *)addr, PAGE_SIZE))
1402 vcpu->arch.hv_vapic = data;
1405 case HV_X64_MSR_EOI:
1406 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1407 case HV_X64_MSR_ICR:
1408 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1409 case HV_X64_MSR_TPR:
1410 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1412 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1413 "data 0x%llx\n", msr, data);
1420 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1422 gpa_t gpa = data & ~0x3f;
1424 /* Bits 2:5 are resrved, Should be zero */
1428 vcpu->arch.apf.msr_val = data;
1430 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1431 kvm_clear_async_pf_completion_queue(vcpu);
1432 kvm_async_pf_hash_reset(vcpu);
1436 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1439 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1440 kvm_async_pf_wakeup_all(vcpu);
1444 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1446 if (vcpu->arch.time_page) {
1447 kvm_release_page_dirty(vcpu->arch.time_page);
1448 vcpu->arch.time_page = NULL;
1452 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1456 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1459 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1460 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1461 vcpu->arch.st.accum_steal = delta;
1464 static void record_steal_time(struct kvm_vcpu *vcpu)
1466 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1469 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1470 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1473 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1474 vcpu->arch.st.steal.version += 2;
1475 vcpu->arch.st.accum_steal = 0;
1477 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1478 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1481 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1485 return set_efer(vcpu, data);
1487 data &= ~(u64)0x40; /* ignore flush filter disable */
1488 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1490 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1495 case MSR_FAM10H_MMIO_CONF_BASE:
1497 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1502 case MSR_AMD64_NB_CFG:
1504 case MSR_IA32_DEBUGCTLMSR:
1506 /* We support the non-activated case already */
1508 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1509 /* Values other than LBR and BTF are vendor-specific,
1510 thus reserved and should throw a #GP */
1513 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1516 case MSR_IA32_UCODE_REV:
1517 case MSR_IA32_UCODE_WRITE:
1518 case MSR_VM_HSAVE_PA:
1519 case MSR_AMD64_PATCH_LOADER:
1521 case 0x200 ... 0x2ff:
1522 return set_msr_mtrr(vcpu, msr, data);
1523 case MSR_IA32_APICBASE:
1524 kvm_set_apic_base(vcpu, data);
1526 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1527 return kvm_x2apic_msr_write(vcpu, msr, data);
1528 case MSR_IA32_TSCDEADLINE:
1529 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1531 case MSR_IA32_MISC_ENABLE:
1532 vcpu->arch.ia32_misc_enable_msr = data;
1534 case MSR_KVM_WALL_CLOCK_NEW:
1535 case MSR_KVM_WALL_CLOCK:
1536 vcpu->kvm->arch.wall_clock = data;
1537 kvm_write_wall_clock(vcpu->kvm, data);
1539 case MSR_KVM_SYSTEM_TIME_NEW:
1540 case MSR_KVM_SYSTEM_TIME: {
1541 kvmclock_reset(vcpu);
1543 vcpu->arch.time = data;
1544 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1546 /* we verify if the enable bit is set... */
1550 /* ...but clean it before doing the actual write */
1551 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1553 vcpu->arch.time_page =
1554 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1556 if (is_error_page(vcpu->arch.time_page)) {
1557 kvm_release_page_clean(vcpu->arch.time_page);
1558 vcpu->arch.time_page = NULL;
1562 case MSR_KVM_ASYNC_PF_EN:
1563 if (kvm_pv_enable_async_pf(vcpu, data))
1566 case MSR_KVM_STEAL_TIME:
1568 if (unlikely(!sched_info_on()))
1571 if (data & KVM_STEAL_RESERVED_MASK)
1574 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1575 data & KVM_STEAL_VALID_BITS))
1578 vcpu->arch.st.msr_val = data;
1580 if (!(data & KVM_MSR_ENABLED))
1583 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1586 accumulate_steal_time(vcpu);
1589 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1593 case MSR_IA32_MCG_CTL:
1594 case MSR_IA32_MCG_STATUS:
1595 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1596 return set_msr_mce(vcpu, msr, data);
1598 /* Performance counters are not protected by a CPUID bit,
1599 * so we should check all of them in the generic path for the sake of
1600 * cross vendor migration.
1601 * Writing a zero into the event select MSRs disables them,
1602 * which we perfectly emulate ;-). Any other value should be at least
1603 * reported, some guests depend on them.
1605 case MSR_K7_EVNTSEL0:
1606 case MSR_K7_EVNTSEL1:
1607 case MSR_K7_EVNTSEL2:
1608 case MSR_K7_EVNTSEL3:
1610 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1611 "0x%x data 0x%llx\n", msr, data);
1613 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1614 * so we ignore writes to make it happy.
1616 case MSR_K7_PERFCTR0:
1617 case MSR_K7_PERFCTR1:
1618 case MSR_K7_PERFCTR2:
1619 case MSR_K7_PERFCTR3:
1620 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1621 "0x%x data 0x%llx\n", msr, data);
1623 case MSR_K7_CLK_CTL:
1625 * Ignore all writes to this no longer documented MSR.
1626 * Writes are only relevant for old K7 processors,
1627 * all pre-dating SVM, but a recommended workaround from
1628 * AMD for these chips. It is possible to speicify the
1629 * affected processor models on the command line, hence
1630 * the need to ignore the workaround.
1633 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1634 if (kvm_hv_msr_partition_wide(msr)) {
1636 mutex_lock(&vcpu->kvm->lock);
1637 r = set_msr_hyperv_pw(vcpu, msr, data);
1638 mutex_unlock(&vcpu->kvm->lock);
1641 return set_msr_hyperv(vcpu, msr, data);
1643 case MSR_IA32_BBL_CR_CTL3:
1644 /* Drop writes to this legacy MSR -- see rdmsr
1645 * counterpart for further detail.
1647 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1650 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1651 return xen_hvm_config(vcpu, data);
1652 if (kvm_pmu_msr(vcpu, msr))
1653 return kvm_pmu_set_msr(vcpu, msr, data);
1655 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1659 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1666 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1670 * Reads an msr value (of 'msr_index') into 'pdata'.
1671 * Returns 0 on success, non-0 otherwise.
1672 * Assumes vcpu_load() was already called.
1674 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1676 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1679 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1681 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1683 if (!msr_mtrr_valid(msr))
1686 if (msr == MSR_MTRRdefType)
1687 *pdata = vcpu->arch.mtrr_state.def_type +
1688 (vcpu->arch.mtrr_state.enabled << 10);
1689 else if (msr == MSR_MTRRfix64K_00000)
1691 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1692 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1693 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1694 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1695 else if (msr == MSR_IA32_CR_PAT)
1696 *pdata = vcpu->arch.pat;
1697 else { /* Variable MTRRs */
1698 int idx, is_mtrr_mask;
1701 idx = (msr - 0x200) / 2;
1702 is_mtrr_mask = msr - 0x200 - 2 * idx;
1705 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1708 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1715 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1718 u64 mcg_cap = vcpu->arch.mcg_cap;
1719 unsigned bank_num = mcg_cap & 0xff;
1722 case MSR_IA32_P5_MC_ADDR:
1723 case MSR_IA32_P5_MC_TYPE:
1726 case MSR_IA32_MCG_CAP:
1727 data = vcpu->arch.mcg_cap;
1729 case MSR_IA32_MCG_CTL:
1730 if (!(mcg_cap & MCG_CTL_P))
1732 data = vcpu->arch.mcg_ctl;
1734 case MSR_IA32_MCG_STATUS:
1735 data = vcpu->arch.mcg_status;
1738 if (msr >= MSR_IA32_MC0_CTL &&
1739 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1740 u32 offset = msr - MSR_IA32_MC0_CTL;
1741 data = vcpu->arch.mce_banks[offset];
1750 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1753 struct kvm *kvm = vcpu->kvm;
1756 case HV_X64_MSR_GUEST_OS_ID:
1757 data = kvm->arch.hv_guest_os_id;
1759 case HV_X64_MSR_HYPERCALL:
1760 data = kvm->arch.hv_hypercall;
1763 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1771 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1776 case HV_X64_MSR_VP_INDEX: {
1779 kvm_for_each_vcpu(r, v, vcpu->kvm)
1784 case HV_X64_MSR_EOI:
1785 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1786 case HV_X64_MSR_ICR:
1787 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1788 case HV_X64_MSR_TPR:
1789 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1790 case HV_X64_MSR_APIC_ASSIST_PAGE:
1791 data = vcpu->arch.hv_vapic;
1794 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1801 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1806 case MSR_IA32_PLATFORM_ID:
1807 case MSR_IA32_EBL_CR_POWERON:
1808 case MSR_IA32_DEBUGCTLMSR:
1809 case MSR_IA32_LASTBRANCHFROMIP:
1810 case MSR_IA32_LASTBRANCHTOIP:
1811 case MSR_IA32_LASTINTFROMIP:
1812 case MSR_IA32_LASTINTTOIP:
1815 case MSR_VM_HSAVE_PA:
1816 case MSR_K7_EVNTSEL0:
1817 case MSR_K7_PERFCTR0:
1818 case MSR_K8_INT_PENDING_MSG:
1819 case MSR_AMD64_NB_CFG:
1820 case MSR_FAM10H_MMIO_CONF_BASE:
1823 case MSR_IA32_UCODE_REV:
1824 data = 0x100000000ULL;
1827 data = 0x500 | KVM_NR_VAR_MTRR;
1829 case 0x200 ... 0x2ff:
1830 return get_msr_mtrr(vcpu, msr, pdata);
1831 case 0xcd: /* fsb frequency */
1835 * MSR_EBC_FREQUENCY_ID
1836 * Conservative value valid for even the basic CPU models.
1837 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1838 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1839 * and 266MHz for model 3, or 4. Set Core Clock
1840 * Frequency to System Bus Frequency Ratio to 1 (bits
1841 * 31:24) even though these are only valid for CPU
1842 * models > 2, however guests may end up dividing or
1843 * multiplying by zero otherwise.
1845 case MSR_EBC_FREQUENCY_ID:
1848 case MSR_IA32_APICBASE:
1849 data = kvm_get_apic_base(vcpu);
1851 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1852 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1854 case MSR_IA32_TSCDEADLINE:
1855 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1857 case MSR_IA32_MISC_ENABLE:
1858 data = vcpu->arch.ia32_misc_enable_msr;
1860 case MSR_IA32_PERF_STATUS:
1861 /* TSC increment by tick */
1863 /* CPU multiplier */
1864 data |= (((uint64_t)4ULL) << 40);
1867 data = vcpu->arch.efer;
1869 case MSR_KVM_WALL_CLOCK:
1870 case MSR_KVM_WALL_CLOCK_NEW:
1871 data = vcpu->kvm->arch.wall_clock;
1873 case MSR_KVM_SYSTEM_TIME:
1874 case MSR_KVM_SYSTEM_TIME_NEW:
1875 data = vcpu->arch.time;
1877 case MSR_KVM_ASYNC_PF_EN:
1878 data = vcpu->arch.apf.msr_val;
1880 case MSR_KVM_STEAL_TIME:
1881 data = vcpu->arch.st.msr_val;
1883 case MSR_IA32_P5_MC_ADDR:
1884 case MSR_IA32_P5_MC_TYPE:
1885 case MSR_IA32_MCG_CAP:
1886 case MSR_IA32_MCG_CTL:
1887 case MSR_IA32_MCG_STATUS:
1888 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1889 return get_msr_mce(vcpu, msr, pdata);
1890 case MSR_K7_CLK_CTL:
1892 * Provide expected ramp-up count for K7. All other
1893 * are set to zero, indicating minimum divisors for
1896 * This prevents guest kernels on AMD host with CPU
1897 * type 6, model 8 and higher from exploding due to
1898 * the rdmsr failing.
1902 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1903 if (kvm_hv_msr_partition_wide(msr)) {
1905 mutex_lock(&vcpu->kvm->lock);
1906 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1907 mutex_unlock(&vcpu->kvm->lock);
1910 return get_msr_hyperv(vcpu, msr, pdata);
1912 case MSR_IA32_BBL_CR_CTL3:
1913 /* This legacy MSR exists but isn't fully documented in current
1914 * silicon. It is however accessed by winxp in very narrow
1915 * scenarios where it sets bit #19, itself documented as
1916 * a "reserved" bit. Best effort attempt to source coherent
1917 * read data here should the balance of the register be
1918 * interpreted by the guest:
1920 * L2 cache control register 3: 64GB range, 256KB size,
1921 * enabled, latency 0x1, configured
1926 if (kvm_pmu_msr(vcpu, msr))
1927 return kvm_pmu_get_msr(vcpu, msr, pdata);
1929 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1932 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1940 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1943 * Read or write a bunch of msrs. All parameters are kernel addresses.
1945 * @return number of msrs set successfully.
1947 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1948 struct kvm_msr_entry *entries,
1949 int (*do_msr)(struct kvm_vcpu *vcpu,
1950 unsigned index, u64 *data))
1954 idx = srcu_read_lock(&vcpu->kvm->srcu);
1955 for (i = 0; i < msrs->nmsrs; ++i)
1956 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1958 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1964 * Read or write a bunch of msrs. Parameters are user addresses.
1966 * @return number of msrs set successfully.
1968 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1969 int (*do_msr)(struct kvm_vcpu *vcpu,
1970 unsigned index, u64 *data),
1973 struct kvm_msrs msrs;
1974 struct kvm_msr_entry *entries;
1979 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1983 if (msrs.nmsrs >= MAX_IO_MSRS)
1986 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1987 entries = memdup_user(user_msrs->entries, size);
1988 if (IS_ERR(entries)) {
1989 r = PTR_ERR(entries);
1993 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1998 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2009 int kvm_dev_ioctl_check_extension(long ext)
2014 case KVM_CAP_IRQCHIP:
2016 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2017 case KVM_CAP_SET_TSS_ADDR:
2018 case KVM_CAP_EXT_CPUID:
2019 case KVM_CAP_CLOCKSOURCE:
2021 case KVM_CAP_NOP_IO_DELAY:
2022 case KVM_CAP_MP_STATE:
2023 case KVM_CAP_SYNC_MMU:
2024 case KVM_CAP_USER_NMI:
2025 case KVM_CAP_REINJECT_CONTROL:
2026 case KVM_CAP_IRQ_INJECT_STATUS:
2027 case KVM_CAP_ASSIGN_DEV_IRQ:
2029 case KVM_CAP_IOEVENTFD:
2031 case KVM_CAP_PIT_STATE2:
2032 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2033 case KVM_CAP_XEN_HVM:
2034 case KVM_CAP_ADJUST_CLOCK:
2035 case KVM_CAP_VCPU_EVENTS:
2036 case KVM_CAP_HYPERV:
2037 case KVM_CAP_HYPERV_VAPIC:
2038 case KVM_CAP_HYPERV_SPIN:
2039 case KVM_CAP_PCI_SEGMENT:
2040 case KVM_CAP_DEBUGREGS:
2041 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2043 case KVM_CAP_ASYNC_PF:
2044 case KVM_CAP_GET_TSC_KHZ:
2047 case KVM_CAP_COALESCED_MMIO:
2048 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2051 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2053 case KVM_CAP_NR_VCPUS:
2054 r = KVM_SOFT_MAX_VCPUS;
2056 case KVM_CAP_MAX_VCPUS:
2059 case KVM_CAP_NR_MEMSLOTS:
2060 r = KVM_MEMORY_SLOTS;
2062 case KVM_CAP_PV_MMU: /* obsolete */
2066 r = iommu_present(&pci_bus_type);
2069 r = KVM_MAX_MCE_BANKS;
2074 case KVM_CAP_TSC_CONTROL:
2075 r = kvm_has_tsc_control;
2077 case KVM_CAP_TSC_DEADLINE_TIMER:
2078 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2088 long kvm_arch_dev_ioctl(struct file *filp,
2089 unsigned int ioctl, unsigned long arg)
2091 void __user *argp = (void __user *)arg;
2095 case KVM_GET_MSR_INDEX_LIST: {
2096 struct kvm_msr_list __user *user_msr_list = argp;
2097 struct kvm_msr_list msr_list;
2101 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2104 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2105 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2108 if (n < msr_list.nmsrs)
2111 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2112 num_msrs_to_save * sizeof(u32)))
2114 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2116 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2121 case KVM_GET_SUPPORTED_CPUID: {
2122 struct kvm_cpuid2 __user *cpuid_arg = argp;
2123 struct kvm_cpuid2 cpuid;
2126 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2128 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2129 cpuid_arg->entries);
2134 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2139 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2142 mce_cap = KVM_MCE_CAP_SUPPORTED;
2144 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2156 static void wbinvd_ipi(void *garbage)
2161 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2163 return vcpu->kvm->arch.iommu_domain &&
2164 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2167 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2169 /* Address WBINVD may be executed by guest */
2170 if (need_emulate_wbinvd(vcpu)) {
2171 if (kvm_x86_ops->has_wbinvd_exit())
2172 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2173 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2174 smp_call_function_single(vcpu->cpu,
2175 wbinvd_ipi, NULL, 1);
2178 kvm_x86_ops->vcpu_load(vcpu, cpu);
2179 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2180 /* Make sure TSC doesn't go backwards */
2184 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2185 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2186 tsc - vcpu->arch.last_guest_tsc;
2189 mark_tsc_unstable("KVM discovered backwards TSC");
2190 if (check_tsc_unstable()) {
2191 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2192 vcpu->arch.tsc_catchup = 1;
2194 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2195 if (vcpu->cpu != cpu)
2196 kvm_migrate_timers(vcpu);
2200 accumulate_steal_time(vcpu);
2201 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2204 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2206 kvm_x86_ops->vcpu_put(vcpu);
2207 kvm_put_guest_fpu(vcpu);
2208 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2211 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2212 struct kvm_lapic_state *s)
2214 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2219 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2220 struct kvm_lapic_state *s)
2222 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2223 kvm_apic_post_state_restore(vcpu);
2224 update_cr8_intercept(vcpu);
2229 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2230 struct kvm_interrupt *irq)
2232 if (irq->irq < 0 || irq->irq >= 256)
2234 if (irqchip_in_kernel(vcpu->kvm))
2237 kvm_queue_interrupt(vcpu, irq->irq, false);
2238 kvm_make_request(KVM_REQ_EVENT, vcpu);
2243 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2245 kvm_inject_nmi(vcpu);
2250 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2251 struct kvm_tpr_access_ctl *tac)
2255 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2259 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2263 unsigned bank_num = mcg_cap & 0xff, bank;
2266 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2268 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2271 vcpu->arch.mcg_cap = mcg_cap;
2272 /* Init IA32_MCG_CTL to all 1s */
2273 if (mcg_cap & MCG_CTL_P)
2274 vcpu->arch.mcg_ctl = ~(u64)0;
2275 /* Init IA32_MCi_CTL to all 1s */
2276 for (bank = 0; bank < bank_num; bank++)
2277 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2282 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2283 struct kvm_x86_mce *mce)
2285 u64 mcg_cap = vcpu->arch.mcg_cap;
2286 unsigned bank_num = mcg_cap & 0xff;
2287 u64 *banks = vcpu->arch.mce_banks;
2289 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2292 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2293 * reporting is disabled
2295 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2296 vcpu->arch.mcg_ctl != ~(u64)0)
2298 banks += 4 * mce->bank;
2300 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2301 * reporting is disabled for the bank
2303 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2305 if (mce->status & MCI_STATUS_UC) {
2306 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2307 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2308 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2311 if (banks[1] & MCI_STATUS_VAL)
2312 mce->status |= MCI_STATUS_OVER;
2313 banks[2] = mce->addr;
2314 banks[3] = mce->misc;
2315 vcpu->arch.mcg_status = mce->mcg_status;
2316 banks[1] = mce->status;
2317 kvm_queue_exception(vcpu, MC_VECTOR);
2318 } else if (!(banks[1] & MCI_STATUS_VAL)
2319 || !(banks[1] & MCI_STATUS_UC)) {
2320 if (banks[1] & MCI_STATUS_VAL)
2321 mce->status |= MCI_STATUS_OVER;
2322 banks[2] = mce->addr;
2323 banks[3] = mce->misc;
2324 banks[1] = mce->status;
2326 banks[1] |= MCI_STATUS_OVER;
2330 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2331 struct kvm_vcpu_events *events)
2334 events->exception.injected =
2335 vcpu->arch.exception.pending &&
2336 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2337 events->exception.nr = vcpu->arch.exception.nr;
2338 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2339 events->exception.pad = 0;
2340 events->exception.error_code = vcpu->arch.exception.error_code;
2342 events->interrupt.injected =
2343 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2344 events->interrupt.nr = vcpu->arch.interrupt.nr;
2345 events->interrupt.soft = 0;
2346 events->interrupt.shadow =
2347 kvm_x86_ops->get_interrupt_shadow(vcpu,
2348 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2350 events->nmi.injected = vcpu->arch.nmi_injected;
2351 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2352 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2353 events->nmi.pad = 0;
2355 events->sipi_vector = vcpu->arch.sipi_vector;
2357 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2358 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2359 | KVM_VCPUEVENT_VALID_SHADOW);
2360 memset(&events->reserved, 0, sizeof(events->reserved));
2363 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2364 struct kvm_vcpu_events *events)
2366 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2367 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2368 | KVM_VCPUEVENT_VALID_SHADOW))
2372 vcpu->arch.exception.pending = events->exception.injected;
2373 vcpu->arch.exception.nr = events->exception.nr;
2374 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2375 vcpu->arch.exception.error_code = events->exception.error_code;
2377 vcpu->arch.interrupt.pending = events->interrupt.injected;
2378 vcpu->arch.interrupt.nr = events->interrupt.nr;
2379 vcpu->arch.interrupt.soft = events->interrupt.soft;
2380 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2381 kvm_x86_ops->set_interrupt_shadow(vcpu,
2382 events->interrupt.shadow);
2384 vcpu->arch.nmi_injected = events->nmi.injected;
2385 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2386 vcpu->arch.nmi_pending = events->nmi.pending;
2387 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2389 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2390 vcpu->arch.sipi_vector = events->sipi_vector;
2392 kvm_make_request(KVM_REQ_EVENT, vcpu);
2397 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2398 struct kvm_debugregs *dbgregs)
2400 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2401 dbgregs->dr6 = vcpu->arch.dr6;
2402 dbgregs->dr7 = vcpu->arch.dr7;
2404 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2407 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2408 struct kvm_debugregs *dbgregs)
2413 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2414 vcpu->arch.dr6 = dbgregs->dr6;
2415 vcpu->arch.dr7 = dbgregs->dr7;
2420 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2421 struct kvm_xsave *guest_xsave)
2424 memcpy(guest_xsave->region,
2425 &vcpu->arch.guest_fpu.state->xsave,
2428 memcpy(guest_xsave->region,
2429 &vcpu->arch.guest_fpu.state->fxsave,
2430 sizeof(struct i387_fxsave_struct));
2431 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2436 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2437 struct kvm_xsave *guest_xsave)
2440 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2443 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2444 guest_xsave->region, xstate_size);
2446 if (xstate_bv & ~XSTATE_FPSSE)
2448 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2449 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2454 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2455 struct kvm_xcrs *guest_xcrs)
2457 if (!cpu_has_xsave) {
2458 guest_xcrs->nr_xcrs = 0;
2462 guest_xcrs->nr_xcrs = 1;
2463 guest_xcrs->flags = 0;
2464 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2465 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2468 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2469 struct kvm_xcrs *guest_xcrs)
2476 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2479 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2480 /* Only support XCR0 currently */
2481 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2482 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2483 guest_xcrs->xcrs[0].value);
2491 long kvm_arch_vcpu_ioctl(struct file *filp,
2492 unsigned int ioctl, unsigned long arg)
2494 struct kvm_vcpu *vcpu = filp->private_data;
2495 void __user *argp = (void __user *)arg;
2498 struct kvm_lapic_state *lapic;
2499 struct kvm_xsave *xsave;
2500 struct kvm_xcrs *xcrs;
2506 case KVM_GET_LAPIC: {
2508 if (!vcpu->arch.apic)
2510 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2515 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2519 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2524 case KVM_SET_LAPIC: {
2526 if (!vcpu->arch.apic)
2528 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2529 if (IS_ERR(u.lapic)) {
2530 r = PTR_ERR(u.lapic);
2534 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2540 case KVM_INTERRUPT: {
2541 struct kvm_interrupt irq;
2544 if (copy_from_user(&irq, argp, sizeof irq))
2546 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2553 r = kvm_vcpu_ioctl_nmi(vcpu);
2559 case KVM_SET_CPUID: {
2560 struct kvm_cpuid __user *cpuid_arg = argp;
2561 struct kvm_cpuid cpuid;
2564 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2566 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2571 case KVM_SET_CPUID2: {
2572 struct kvm_cpuid2 __user *cpuid_arg = argp;
2573 struct kvm_cpuid2 cpuid;
2576 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2578 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2579 cpuid_arg->entries);
2584 case KVM_GET_CPUID2: {
2585 struct kvm_cpuid2 __user *cpuid_arg = argp;
2586 struct kvm_cpuid2 cpuid;
2589 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2591 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2592 cpuid_arg->entries);
2596 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2602 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2605 r = msr_io(vcpu, argp, do_set_msr, 0);
2607 case KVM_TPR_ACCESS_REPORTING: {
2608 struct kvm_tpr_access_ctl tac;
2611 if (copy_from_user(&tac, argp, sizeof tac))
2613 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2617 if (copy_to_user(argp, &tac, sizeof tac))
2622 case KVM_SET_VAPIC_ADDR: {
2623 struct kvm_vapic_addr va;
2626 if (!irqchip_in_kernel(vcpu->kvm))
2629 if (copy_from_user(&va, argp, sizeof va))
2632 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2635 case KVM_X86_SETUP_MCE: {
2639 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2641 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2644 case KVM_X86_SET_MCE: {
2645 struct kvm_x86_mce mce;
2648 if (copy_from_user(&mce, argp, sizeof mce))
2650 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2653 case KVM_GET_VCPU_EVENTS: {
2654 struct kvm_vcpu_events events;
2656 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2659 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2664 case KVM_SET_VCPU_EVENTS: {
2665 struct kvm_vcpu_events events;
2668 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2671 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2674 case KVM_GET_DEBUGREGS: {
2675 struct kvm_debugregs dbgregs;
2677 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2680 if (copy_to_user(argp, &dbgregs,
2681 sizeof(struct kvm_debugregs)))
2686 case KVM_SET_DEBUGREGS: {
2687 struct kvm_debugregs dbgregs;
2690 if (copy_from_user(&dbgregs, argp,
2691 sizeof(struct kvm_debugregs)))
2694 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2697 case KVM_GET_XSAVE: {
2698 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2703 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2706 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2711 case KVM_SET_XSAVE: {
2712 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2713 if (IS_ERR(u.xsave)) {
2714 r = PTR_ERR(u.xsave);
2718 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2721 case KVM_GET_XCRS: {
2722 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2727 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2730 if (copy_to_user(argp, u.xcrs,
2731 sizeof(struct kvm_xcrs)))
2736 case KVM_SET_XCRS: {
2737 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2738 if (IS_ERR(u.xcrs)) {
2739 r = PTR_ERR(u.xcrs);
2743 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2746 case KVM_SET_TSC_KHZ: {
2750 if (!kvm_has_tsc_control)
2753 user_tsc_khz = (u32)arg;
2755 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2758 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
2763 case KVM_GET_TSC_KHZ: {
2765 if (check_tsc_unstable())
2768 r = vcpu_tsc_khz(vcpu);
2780 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2784 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2786 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2790 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2793 kvm->arch.ept_identity_map_addr = ident_addr;
2797 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2798 u32 kvm_nr_mmu_pages)
2800 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2803 mutex_lock(&kvm->slots_lock);
2804 spin_lock(&kvm->mmu_lock);
2806 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2807 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2809 spin_unlock(&kvm->mmu_lock);
2810 mutex_unlock(&kvm->slots_lock);
2814 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2816 return kvm->arch.n_max_mmu_pages;
2819 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2824 switch (chip->chip_id) {
2825 case KVM_IRQCHIP_PIC_MASTER:
2826 memcpy(&chip->chip.pic,
2827 &pic_irqchip(kvm)->pics[0],
2828 sizeof(struct kvm_pic_state));
2830 case KVM_IRQCHIP_PIC_SLAVE:
2831 memcpy(&chip->chip.pic,
2832 &pic_irqchip(kvm)->pics[1],
2833 sizeof(struct kvm_pic_state));
2835 case KVM_IRQCHIP_IOAPIC:
2836 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2845 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2850 switch (chip->chip_id) {
2851 case KVM_IRQCHIP_PIC_MASTER:
2852 spin_lock(&pic_irqchip(kvm)->lock);
2853 memcpy(&pic_irqchip(kvm)->pics[0],
2855 sizeof(struct kvm_pic_state));
2856 spin_unlock(&pic_irqchip(kvm)->lock);
2858 case KVM_IRQCHIP_PIC_SLAVE:
2859 spin_lock(&pic_irqchip(kvm)->lock);
2860 memcpy(&pic_irqchip(kvm)->pics[1],
2862 sizeof(struct kvm_pic_state));
2863 spin_unlock(&pic_irqchip(kvm)->lock);
2865 case KVM_IRQCHIP_IOAPIC:
2866 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2872 kvm_pic_update_irq(pic_irqchip(kvm));
2876 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2880 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2881 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2882 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2886 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2890 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2891 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2892 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2893 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2897 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2901 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2902 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2903 sizeof(ps->channels));
2904 ps->flags = kvm->arch.vpit->pit_state.flags;
2905 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2906 memset(&ps->reserved, 0, sizeof(ps->reserved));
2910 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2912 int r = 0, start = 0;
2913 u32 prev_legacy, cur_legacy;
2914 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2915 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2916 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2917 if (!prev_legacy && cur_legacy)
2919 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2920 sizeof(kvm->arch.vpit->pit_state.channels));
2921 kvm->arch.vpit->pit_state.flags = ps->flags;
2922 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2923 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2927 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2928 struct kvm_reinject_control *control)
2930 if (!kvm->arch.vpit)
2932 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2933 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2934 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2939 * write_protect_slot - write protect a slot for dirty logging
2940 * @kvm: the kvm instance
2941 * @memslot: the slot we protect
2942 * @dirty_bitmap: the bitmap indicating which pages are dirty
2943 * @nr_dirty_pages: the number of dirty pages
2945 * We have two ways to find all sptes to protect:
2946 * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
2947 * checks ones that have a spte mapping a page in the slot.
2948 * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
2950 * Generally speaking, if there are not so many dirty pages compared to the
2951 * number of shadow pages, we should use the latter.
2953 * Note that letting others write into a page marked dirty in the old bitmap
2954 * by using the remaining tlb entry is not a problem. That page will become
2955 * write protected again when we flush the tlb and then be reported dirty to
2956 * the user space by copying the old bitmap.
2958 static void write_protect_slot(struct kvm *kvm,
2959 struct kvm_memory_slot *memslot,
2960 unsigned long *dirty_bitmap,
2961 unsigned long nr_dirty_pages)
2963 /* Not many dirty pages compared to # of shadow pages. */
2964 if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
2965 unsigned long gfn_offset;
2967 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
2968 unsigned long gfn = memslot->base_gfn + gfn_offset;
2970 spin_lock(&kvm->mmu_lock);
2971 kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
2972 spin_unlock(&kvm->mmu_lock);
2974 kvm_flush_remote_tlbs(kvm);
2976 spin_lock(&kvm->mmu_lock);
2977 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
2978 spin_unlock(&kvm->mmu_lock);
2983 * Get (and clear) the dirty memory log for a memory slot.
2985 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2986 struct kvm_dirty_log *log)
2989 struct kvm_memory_slot *memslot;
2990 unsigned long n, nr_dirty_pages;
2992 mutex_lock(&kvm->slots_lock);
2995 if (log->slot >= KVM_MEMORY_SLOTS)
2998 memslot = id_to_memslot(kvm->memslots, log->slot);
3000 if (!memslot->dirty_bitmap)
3003 n = kvm_dirty_bitmap_bytes(memslot);
3004 nr_dirty_pages = memslot->nr_dirty_pages;
3006 /* If nothing is dirty, don't bother messing with page tables. */
3007 if (nr_dirty_pages) {
3008 struct kvm_memslots *slots, *old_slots;
3009 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3011 dirty_bitmap = memslot->dirty_bitmap;
3012 dirty_bitmap_head = memslot->dirty_bitmap_head;
3013 if (dirty_bitmap == dirty_bitmap_head)
3014 dirty_bitmap_head += n / sizeof(long);
3015 memset(dirty_bitmap_head, 0, n);
3018 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3022 memslot = id_to_memslot(slots, log->slot);
3023 memslot->nr_dirty_pages = 0;
3024 memslot->dirty_bitmap = dirty_bitmap_head;
3025 update_memslots(slots, NULL);
3027 old_slots = kvm->memslots;
3028 rcu_assign_pointer(kvm->memslots, slots);
3029 synchronize_srcu_expedited(&kvm->srcu);
3032 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3035 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3039 if (clear_user(log->dirty_bitmap, n))
3045 mutex_unlock(&kvm->slots_lock);
3049 long kvm_arch_vm_ioctl(struct file *filp,
3050 unsigned int ioctl, unsigned long arg)
3052 struct kvm *kvm = filp->private_data;
3053 void __user *argp = (void __user *)arg;
3056 * This union makes it completely explicit to gcc-3.x
3057 * that these two variables' stack usage should be
3058 * combined, not added together.
3061 struct kvm_pit_state ps;
3062 struct kvm_pit_state2 ps2;
3063 struct kvm_pit_config pit_config;
3067 case KVM_SET_TSS_ADDR:
3068 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3072 case KVM_SET_IDENTITY_MAP_ADDR: {
3076 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3078 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3083 case KVM_SET_NR_MMU_PAGES:
3084 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3088 case KVM_GET_NR_MMU_PAGES:
3089 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3091 case KVM_CREATE_IRQCHIP: {
3092 struct kvm_pic *vpic;
3094 mutex_lock(&kvm->lock);
3097 goto create_irqchip_unlock;
3099 vpic = kvm_create_pic(kvm);
3101 r = kvm_ioapic_init(kvm);
3103 mutex_lock(&kvm->slots_lock);
3104 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3106 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3108 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3110 mutex_unlock(&kvm->slots_lock);
3112 goto create_irqchip_unlock;
3115 goto create_irqchip_unlock;
3117 kvm->arch.vpic = vpic;
3119 r = kvm_setup_default_irq_routing(kvm);
3121 mutex_lock(&kvm->slots_lock);
3122 mutex_lock(&kvm->irq_lock);
3123 kvm_ioapic_destroy(kvm);
3124 kvm_destroy_pic(kvm);
3125 mutex_unlock(&kvm->irq_lock);
3126 mutex_unlock(&kvm->slots_lock);
3128 create_irqchip_unlock:
3129 mutex_unlock(&kvm->lock);
3132 case KVM_CREATE_PIT:
3133 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3135 case KVM_CREATE_PIT2:
3137 if (copy_from_user(&u.pit_config, argp,
3138 sizeof(struct kvm_pit_config)))
3141 mutex_lock(&kvm->slots_lock);
3144 goto create_pit_unlock;
3146 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3150 mutex_unlock(&kvm->slots_lock);
3152 case KVM_IRQ_LINE_STATUS:
3153 case KVM_IRQ_LINE: {
3154 struct kvm_irq_level irq_event;
3157 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3160 if (irqchip_in_kernel(kvm)) {
3162 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3163 irq_event.irq, irq_event.level);
3164 if (ioctl == KVM_IRQ_LINE_STATUS) {
3166 irq_event.status = status;
3167 if (copy_to_user(argp, &irq_event,
3175 case KVM_GET_IRQCHIP: {
3176 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3177 struct kvm_irqchip *chip;
3179 chip = memdup_user(argp, sizeof(*chip));
3186 if (!irqchip_in_kernel(kvm))
3187 goto get_irqchip_out;
3188 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3190 goto get_irqchip_out;
3192 if (copy_to_user(argp, chip, sizeof *chip))
3193 goto get_irqchip_out;
3201 case KVM_SET_IRQCHIP: {
3202 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3203 struct kvm_irqchip *chip;
3205 chip = memdup_user(argp, sizeof(*chip));
3212 if (!irqchip_in_kernel(kvm))
3213 goto set_irqchip_out;
3214 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3216 goto set_irqchip_out;
3226 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3229 if (!kvm->arch.vpit)
3231 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3235 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3242 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3245 if (!kvm->arch.vpit)
3247 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3253 case KVM_GET_PIT2: {
3255 if (!kvm->arch.vpit)
3257 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3261 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3266 case KVM_SET_PIT2: {
3268 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3271 if (!kvm->arch.vpit)
3273 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3279 case KVM_REINJECT_CONTROL: {
3280 struct kvm_reinject_control control;
3282 if (copy_from_user(&control, argp, sizeof(control)))
3284 r = kvm_vm_ioctl_reinject(kvm, &control);
3290 case KVM_XEN_HVM_CONFIG: {
3292 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3293 sizeof(struct kvm_xen_hvm_config)))
3296 if (kvm->arch.xen_hvm_config.flags)
3301 case KVM_SET_CLOCK: {
3302 struct kvm_clock_data user_ns;
3307 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3315 local_irq_disable();
3316 now_ns = get_kernel_ns();
3317 delta = user_ns.clock - now_ns;
3319 kvm->arch.kvmclock_offset = delta;
3322 case KVM_GET_CLOCK: {
3323 struct kvm_clock_data user_ns;
3326 local_irq_disable();
3327 now_ns = get_kernel_ns();
3328 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3331 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3334 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3347 static void kvm_init_msr_list(void)
3352 /* skip the first msrs in the list. KVM-specific */
3353 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3354 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3357 msrs_to_save[j] = msrs_to_save[i];
3360 num_msrs_to_save = j;
3363 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3371 if (!(vcpu->arch.apic &&
3372 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3373 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3384 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3391 if (!(vcpu->arch.apic &&
3392 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3393 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3395 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3405 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3406 struct kvm_segment *var, int seg)
3408 kvm_x86_ops->set_segment(vcpu, var, seg);
3411 void kvm_get_segment(struct kvm_vcpu *vcpu,
3412 struct kvm_segment *var, int seg)
3414 kvm_x86_ops->get_segment(vcpu, var, seg);
3417 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3420 struct x86_exception exception;
3422 BUG_ON(!mmu_is_nested(vcpu));
3424 /* NPT walks are always user-walks */
3425 access |= PFERR_USER_MASK;
3426 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3431 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3432 struct x86_exception *exception)
3434 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3435 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3438 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3439 struct x86_exception *exception)
3441 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3442 access |= PFERR_FETCH_MASK;
3443 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3446 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3447 struct x86_exception *exception)
3449 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3450 access |= PFERR_WRITE_MASK;
3451 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3454 /* uses this to access any guest's mapped memory without checking CPL */
3455 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3456 struct x86_exception *exception)
3458 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3461 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3462 struct kvm_vcpu *vcpu, u32 access,
3463 struct x86_exception *exception)
3466 int r = X86EMUL_CONTINUE;
3469 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3471 unsigned offset = addr & (PAGE_SIZE-1);
3472 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3475 if (gpa == UNMAPPED_GVA)
3476 return X86EMUL_PROPAGATE_FAULT;
3477 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3479 r = X86EMUL_IO_NEEDED;
3491 /* used for instruction fetching */
3492 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3493 gva_t addr, void *val, unsigned int bytes,
3494 struct x86_exception *exception)
3496 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3497 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3499 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3500 access | PFERR_FETCH_MASK,
3504 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3505 gva_t addr, void *val, unsigned int bytes,
3506 struct x86_exception *exception)
3508 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3509 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3511 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3514 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3516 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3517 gva_t addr, void *val, unsigned int bytes,
3518 struct x86_exception *exception)
3520 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3521 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3524 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3525 gva_t addr, void *val,
3527 struct x86_exception *exception)
3529 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3531 int r = X86EMUL_CONTINUE;
3534 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3537 unsigned offset = addr & (PAGE_SIZE-1);
3538 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3541 if (gpa == UNMAPPED_GVA)
3542 return X86EMUL_PROPAGATE_FAULT;
3543 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3545 r = X86EMUL_IO_NEEDED;
3556 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3558 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3559 gpa_t *gpa, struct x86_exception *exception,
3562 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3564 if (vcpu_match_mmio_gva(vcpu, gva) &&
3565 check_write_user_access(vcpu, write, access,
3566 vcpu->arch.access)) {
3567 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3568 (gva & (PAGE_SIZE - 1));
3569 trace_vcpu_match_mmio(gva, *gpa, write, false);
3574 access |= PFERR_WRITE_MASK;
3576 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3578 if (*gpa == UNMAPPED_GVA)
3581 /* For APIC access vmexit */
3582 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3585 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3586 trace_vcpu_match_mmio(gva, *gpa, write, true);
3593 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3594 const void *val, int bytes)
3598 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3601 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3605 struct read_write_emulator_ops {
3606 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3608 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3609 void *val, int bytes);
3610 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3611 int bytes, void *val);
3612 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3613 void *val, int bytes);
3617 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3619 if (vcpu->mmio_read_completed) {
3620 memcpy(val, vcpu->mmio_data, bytes);
3621 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3622 vcpu->mmio_phys_addr, *(u64 *)val);
3623 vcpu->mmio_read_completed = 0;
3630 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3631 void *val, int bytes)
3633 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3636 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3637 void *val, int bytes)
3639 return emulator_write_phys(vcpu, gpa, val, bytes);
3642 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3644 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3645 return vcpu_mmio_write(vcpu, gpa, bytes, val);
3648 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3649 void *val, int bytes)
3651 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3652 return X86EMUL_IO_NEEDED;
3655 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3656 void *val, int bytes)
3658 memcpy(vcpu->mmio_data, val, bytes);
3659 memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3660 return X86EMUL_CONTINUE;
3663 static struct read_write_emulator_ops read_emultor = {
3664 .read_write_prepare = read_prepare,
3665 .read_write_emulate = read_emulate,
3666 .read_write_mmio = vcpu_mmio_read,
3667 .read_write_exit_mmio = read_exit_mmio,
3670 static struct read_write_emulator_ops write_emultor = {
3671 .read_write_emulate = write_emulate,
3672 .read_write_mmio = write_mmio,
3673 .read_write_exit_mmio = write_exit_mmio,
3677 static int emulator_read_write_onepage(unsigned long addr, void *val,
3679 struct x86_exception *exception,
3680 struct kvm_vcpu *vcpu,
3681 struct read_write_emulator_ops *ops)
3685 bool write = ops->write;
3687 if (ops->read_write_prepare &&
3688 ops->read_write_prepare(vcpu, val, bytes))
3689 return X86EMUL_CONTINUE;
3691 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3694 return X86EMUL_PROPAGATE_FAULT;
3696 /* For APIC access vmexit */
3700 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3701 return X86EMUL_CONTINUE;
3705 * Is this MMIO handled locally?
3707 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3708 if (handled == bytes)
3709 return X86EMUL_CONTINUE;
3715 vcpu->mmio_needed = 1;
3716 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3717 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3718 vcpu->mmio_size = bytes;
3719 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3720 vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3721 vcpu->mmio_index = 0;
3723 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3726 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3727 void *val, unsigned int bytes,
3728 struct x86_exception *exception,
3729 struct read_write_emulator_ops *ops)
3731 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3733 /* Crossing a page boundary? */
3734 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3737 now = -addr & ~PAGE_MASK;
3738 rc = emulator_read_write_onepage(addr, val, now, exception,
3741 if (rc != X86EMUL_CONTINUE)
3748 return emulator_read_write_onepage(addr, val, bytes, exception,
3752 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3756 struct x86_exception *exception)
3758 return emulator_read_write(ctxt, addr, val, bytes,
3759 exception, &read_emultor);
3762 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3766 struct x86_exception *exception)
3768 return emulator_read_write(ctxt, addr, (void *)val, bytes,
3769 exception, &write_emultor);
3772 #define CMPXCHG_TYPE(t, ptr, old, new) \
3773 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3775 #ifdef CONFIG_X86_64
3776 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3778 # define CMPXCHG64(ptr, old, new) \
3779 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3782 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3787 struct x86_exception *exception)
3789 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3795 /* guests cmpxchg8b have to be emulated atomically */
3796 if (bytes > 8 || (bytes & (bytes - 1)))
3799 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3801 if (gpa == UNMAPPED_GVA ||
3802 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3805 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3808 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3809 if (is_error_page(page)) {
3810 kvm_release_page_clean(page);
3814 kaddr = kmap_atomic(page, KM_USER0);
3815 kaddr += offset_in_page(gpa);
3818 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3821 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3824 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3827 exchanged = CMPXCHG64(kaddr, old, new);
3832 kunmap_atomic(kaddr, KM_USER0);
3833 kvm_release_page_dirty(page);
3836 return X86EMUL_CMPXCHG_FAILED;
3838 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3840 return X86EMUL_CONTINUE;
3843 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3845 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3848 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3850 /* TODO: String I/O for in kernel device */
3853 if (vcpu->arch.pio.in)
3854 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3855 vcpu->arch.pio.size, pd);
3857 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3858 vcpu->arch.pio.port, vcpu->arch.pio.size,
3863 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3864 unsigned short port, void *val,
3865 unsigned int count, bool in)
3867 trace_kvm_pio(!in, port, size, count);
3869 vcpu->arch.pio.port = port;
3870 vcpu->arch.pio.in = in;
3871 vcpu->arch.pio.count = count;
3872 vcpu->arch.pio.size = size;
3874 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3875 vcpu->arch.pio.count = 0;
3879 vcpu->run->exit_reason = KVM_EXIT_IO;
3880 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3881 vcpu->run->io.size = size;
3882 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3883 vcpu->run->io.count = count;
3884 vcpu->run->io.port = port;
3889 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3890 int size, unsigned short port, void *val,
3893 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3896 if (vcpu->arch.pio.count)
3899 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3902 memcpy(val, vcpu->arch.pio_data, size * count);
3903 vcpu->arch.pio.count = 0;
3910 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3911 int size, unsigned short port,
3912 const void *val, unsigned int count)
3914 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3916 memcpy(vcpu->arch.pio_data, val, size * count);
3917 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3920 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3922 return kvm_x86_ops->get_segment_base(vcpu, seg);
3925 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3927 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3930 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3932 if (!need_emulate_wbinvd(vcpu))
3933 return X86EMUL_CONTINUE;
3935 if (kvm_x86_ops->has_wbinvd_exit()) {
3936 int cpu = get_cpu();
3938 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3939 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3940 wbinvd_ipi, NULL, 1);
3942 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3945 return X86EMUL_CONTINUE;
3947 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3949 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
3951 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
3954 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3956 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
3959 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3962 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
3965 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3967 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3970 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
3972 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3973 unsigned long value;
3977 value = kvm_read_cr0(vcpu);
3980 value = vcpu->arch.cr2;
3983 value = kvm_read_cr3(vcpu);
3986 value = kvm_read_cr4(vcpu);
3989 value = kvm_get_cr8(vcpu);
3992 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3999 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4001 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4006 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4009 vcpu->arch.cr2 = val;
4012 res = kvm_set_cr3(vcpu, val);
4015 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4018 res = kvm_set_cr8(vcpu, val);
4021 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4028 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4030 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4033 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4035 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4038 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4040 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4043 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4045 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4048 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4050 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4053 static unsigned long emulator_get_cached_segment_base(
4054 struct x86_emulate_ctxt *ctxt, int seg)
4056 return get_segment_base(emul_to_vcpu(ctxt), seg);
4059 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4060 struct desc_struct *desc, u32 *base3,
4063 struct kvm_segment var;
4065 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4066 *selector = var.selector;
4073 set_desc_limit(desc, var.limit);
4074 set_desc_base(desc, (unsigned long)var.base);
4075 #ifdef CONFIG_X86_64
4077 *base3 = var.base >> 32;
4079 desc->type = var.type;
4081 desc->dpl = var.dpl;
4082 desc->p = var.present;
4083 desc->avl = var.avl;
4091 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4092 struct desc_struct *desc, u32 base3,
4095 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4096 struct kvm_segment var;
4098 var.selector = selector;
4099 var.base = get_desc_base(desc);
4100 #ifdef CONFIG_X86_64
4101 var.base |= ((u64)base3) << 32;
4103 var.limit = get_desc_limit(desc);
4105 var.limit = (var.limit << 12) | 0xfff;
4106 var.type = desc->type;
4107 var.present = desc->p;
4108 var.dpl = desc->dpl;
4113 var.avl = desc->avl;
4114 var.present = desc->p;
4115 var.unusable = !var.present;
4118 kvm_set_segment(vcpu, &var, seg);
4122 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4123 u32 msr_index, u64 *pdata)
4125 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4128 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4129 u32 msr_index, u64 data)
4131 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4134 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4136 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4139 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4142 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4144 * CR0.TS may reference the host fpu state, not the guest fpu state,
4145 * so it may be clear at this point.
4150 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4155 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4156 struct x86_instruction_info *info,
4157 enum x86_intercept_stage stage)
4159 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4162 static struct x86_emulate_ops emulate_ops = {
4163 .read_std = kvm_read_guest_virt_system,
4164 .write_std = kvm_write_guest_virt_system,
4165 .fetch = kvm_fetch_guest_virt,
4166 .read_emulated = emulator_read_emulated,
4167 .write_emulated = emulator_write_emulated,
4168 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4169 .invlpg = emulator_invlpg,
4170 .pio_in_emulated = emulator_pio_in_emulated,
4171 .pio_out_emulated = emulator_pio_out_emulated,
4172 .get_segment = emulator_get_segment,
4173 .set_segment = emulator_set_segment,
4174 .get_cached_segment_base = emulator_get_cached_segment_base,
4175 .get_gdt = emulator_get_gdt,
4176 .get_idt = emulator_get_idt,
4177 .set_gdt = emulator_set_gdt,
4178 .set_idt = emulator_set_idt,
4179 .get_cr = emulator_get_cr,
4180 .set_cr = emulator_set_cr,
4181 .cpl = emulator_get_cpl,
4182 .get_dr = emulator_get_dr,
4183 .set_dr = emulator_set_dr,
4184 .set_msr = emulator_set_msr,
4185 .get_msr = emulator_get_msr,
4186 .halt = emulator_halt,
4187 .wbinvd = emulator_wbinvd,
4188 .fix_hypercall = emulator_fix_hypercall,
4189 .get_fpu = emulator_get_fpu,
4190 .put_fpu = emulator_put_fpu,
4191 .intercept = emulator_intercept,
4194 static void cache_all_regs(struct kvm_vcpu *vcpu)
4196 kvm_register_read(vcpu, VCPU_REGS_RAX);
4197 kvm_register_read(vcpu, VCPU_REGS_RSP);
4198 kvm_register_read(vcpu, VCPU_REGS_RIP);
4199 vcpu->arch.regs_dirty = ~0;
4202 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4204 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4206 * an sti; sti; sequence only disable interrupts for the first
4207 * instruction. So, if the last instruction, be it emulated or
4208 * not, left the system with the INT_STI flag enabled, it
4209 * means that the last instruction is an sti. We should not
4210 * leave the flag on in this case. The same goes for mov ss
4212 if (!(int_shadow & mask))
4213 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4216 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4218 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4219 if (ctxt->exception.vector == PF_VECTOR)
4220 kvm_propagate_fault(vcpu, &ctxt->exception);
4221 else if (ctxt->exception.error_code_valid)
4222 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4223 ctxt->exception.error_code);
4225 kvm_queue_exception(vcpu, ctxt->exception.vector);
4228 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4229 const unsigned long *regs)
4231 memset(&ctxt->twobyte, 0,
4232 (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4233 memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4235 ctxt->fetch.start = 0;
4236 ctxt->fetch.end = 0;
4237 ctxt->io_read.pos = 0;
4238 ctxt->io_read.end = 0;
4239 ctxt->mem_read.pos = 0;
4240 ctxt->mem_read.end = 0;
4243 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4245 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4249 * TODO: fix emulate.c to use guest_read/write_register
4250 * instead of direct ->regs accesses, can save hundred cycles
4251 * on Intel for instructions that don't read/change RSP, for
4254 cache_all_regs(vcpu);
4256 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4258 ctxt->eflags = kvm_get_rflags(vcpu);
4259 ctxt->eip = kvm_rip_read(vcpu);
4260 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4261 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4262 cs_l ? X86EMUL_MODE_PROT64 :
4263 cs_db ? X86EMUL_MODE_PROT32 :
4264 X86EMUL_MODE_PROT16;
4265 ctxt->guest_mode = is_guest_mode(vcpu);
4267 init_decode_cache(ctxt, vcpu->arch.regs);
4268 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4271 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4273 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4276 init_emulate_ctxt(vcpu);
4280 ctxt->_eip = ctxt->eip + inc_eip;
4281 ret = emulate_int_real(ctxt, irq);
4283 if (ret != X86EMUL_CONTINUE)
4284 return EMULATE_FAIL;
4286 ctxt->eip = ctxt->_eip;
4287 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4288 kvm_rip_write(vcpu, ctxt->eip);
4289 kvm_set_rflags(vcpu, ctxt->eflags);
4291 if (irq == NMI_VECTOR)
4292 vcpu->arch.nmi_pending = 0;
4294 vcpu->arch.interrupt.pending = false;
4296 return EMULATE_DONE;
4298 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4300 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4302 int r = EMULATE_DONE;
4304 ++vcpu->stat.insn_emulation_fail;
4305 trace_kvm_emulate_insn_failed(vcpu);
4306 if (!is_guest_mode(vcpu)) {
4307 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4308 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4309 vcpu->run->internal.ndata = 0;
4312 kvm_queue_exception(vcpu, UD_VECTOR);
4317 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4325 * if emulation was due to access to shadowed page table
4326 * and it failed try to unshadow page and re-entetr the
4327 * guest to let CPU execute the instruction.
4329 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4332 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4334 if (gpa == UNMAPPED_GVA)
4335 return true; /* let cpu generate fault */
4337 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4343 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4344 unsigned long cr2, int emulation_type)
4346 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4347 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4349 last_retry_eip = vcpu->arch.last_retry_eip;
4350 last_retry_addr = vcpu->arch.last_retry_addr;
4353 * If the emulation is caused by #PF and it is non-page_table
4354 * writing instruction, it means the VM-EXIT is caused by shadow
4355 * page protected, we can zap the shadow page and retry this
4356 * instruction directly.
4358 * Note: if the guest uses a non-page-table modifying instruction
4359 * on the PDE that points to the instruction, then we will unmap
4360 * the instruction and go to an infinite loop. So, we cache the
4361 * last retried eip and the last fault address, if we meet the eip
4362 * and the address again, we can break out of the potential infinite
4365 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4367 if (!(emulation_type & EMULTYPE_RETRY))
4370 if (x86_page_table_writing_insn(ctxt))
4373 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4376 vcpu->arch.last_retry_eip = ctxt->eip;
4377 vcpu->arch.last_retry_addr = cr2;
4379 if (!vcpu->arch.mmu.direct_map)
4380 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4382 kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4387 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4394 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4395 bool writeback = true;
4397 kvm_clear_exception_queue(vcpu);
4399 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4400 init_emulate_ctxt(vcpu);
4401 ctxt->interruptibility = 0;
4402 ctxt->have_exception = false;
4403 ctxt->perm_ok = false;
4405 ctxt->only_vendor_specific_insn
4406 = emulation_type & EMULTYPE_TRAP_UD;
4408 r = x86_decode_insn(ctxt, insn, insn_len);
4410 trace_kvm_emulate_insn_start(vcpu);
4411 ++vcpu->stat.insn_emulation;
4412 if (r != EMULATION_OK) {
4413 if (emulation_type & EMULTYPE_TRAP_UD)
4414 return EMULATE_FAIL;
4415 if (reexecute_instruction(vcpu, cr2))
4416 return EMULATE_DONE;
4417 if (emulation_type & EMULTYPE_SKIP)
4418 return EMULATE_FAIL;
4419 return handle_emulation_failure(vcpu);
4423 if (emulation_type & EMULTYPE_SKIP) {
4424 kvm_rip_write(vcpu, ctxt->_eip);
4425 return EMULATE_DONE;
4428 if (retry_instruction(ctxt, cr2, emulation_type))
4429 return EMULATE_DONE;
4431 /* this is needed for vmware backdoor interface to work since it
4432 changes registers values during IO operation */
4433 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4434 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4435 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4439 r = x86_emulate_insn(ctxt);
4441 if (r == EMULATION_INTERCEPTED)
4442 return EMULATE_DONE;
4444 if (r == EMULATION_FAILED) {
4445 if (reexecute_instruction(vcpu, cr2))
4446 return EMULATE_DONE;
4448 return handle_emulation_failure(vcpu);
4451 if (ctxt->have_exception) {
4452 inject_emulated_exception(vcpu);
4454 } else if (vcpu->arch.pio.count) {
4455 if (!vcpu->arch.pio.in)
4456 vcpu->arch.pio.count = 0;
4459 r = EMULATE_DO_MMIO;
4460 } else if (vcpu->mmio_needed) {
4461 if (!vcpu->mmio_is_write)
4463 r = EMULATE_DO_MMIO;
4464 } else if (r == EMULATION_RESTART)
4470 toggle_interruptibility(vcpu, ctxt->interruptibility);
4471 kvm_set_rflags(vcpu, ctxt->eflags);
4472 kvm_make_request(KVM_REQ_EVENT, vcpu);
4473 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4474 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4475 kvm_rip_write(vcpu, ctxt->eip);
4477 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4481 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4483 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4485 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4486 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4487 size, port, &val, 1);
4488 /* do not return to emulator after return from userspace */
4489 vcpu->arch.pio.count = 0;
4492 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4494 static void tsc_bad(void *info)
4496 __this_cpu_write(cpu_tsc_khz, 0);
4499 static void tsc_khz_changed(void *data)
4501 struct cpufreq_freqs *freq = data;
4502 unsigned long khz = 0;
4506 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4507 khz = cpufreq_quick_get(raw_smp_processor_id());
4510 __this_cpu_write(cpu_tsc_khz, khz);
4513 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4516 struct cpufreq_freqs *freq = data;
4518 struct kvm_vcpu *vcpu;
4519 int i, send_ipi = 0;
4522 * We allow guests to temporarily run on slowing clocks,
4523 * provided we notify them after, or to run on accelerating
4524 * clocks, provided we notify them before. Thus time never
4527 * However, we have a problem. We can't atomically update
4528 * the frequency of a given CPU from this function; it is
4529 * merely a notifier, which can be called from any CPU.
4530 * Changing the TSC frequency at arbitrary points in time
4531 * requires a recomputation of local variables related to
4532 * the TSC for each VCPU. We must flag these local variables
4533 * to be updated and be sure the update takes place with the
4534 * new frequency before any guests proceed.
4536 * Unfortunately, the combination of hotplug CPU and frequency
4537 * change creates an intractable locking scenario; the order
4538 * of when these callouts happen is undefined with respect to
4539 * CPU hotplug, and they can race with each other. As such,
4540 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4541 * undefined; you can actually have a CPU frequency change take
4542 * place in between the computation of X and the setting of the
4543 * variable. To protect against this problem, all updates of
4544 * the per_cpu tsc_khz variable are done in an interrupt
4545 * protected IPI, and all callers wishing to update the value
4546 * must wait for a synchronous IPI to complete (which is trivial
4547 * if the caller is on the CPU already). This establishes the
4548 * necessary total order on variable updates.
4550 * Note that because a guest time update may take place
4551 * anytime after the setting of the VCPU's request bit, the
4552 * correct TSC value must be set before the request. However,
4553 * to ensure the update actually makes it to any guest which
4554 * starts running in hardware virtualization between the set
4555 * and the acquisition of the spinlock, we must also ping the
4556 * CPU after setting the request bit.
4560 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4562 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4565 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4567 raw_spin_lock(&kvm_lock);
4568 list_for_each_entry(kvm, &vm_list, vm_list) {
4569 kvm_for_each_vcpu(i, vcpu, kvm) {
4570 if (vcpu->cpu != freq->cpu)
4572 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4573 if (vcpu->cpu != smp_processor_id())
4577 raw_spin_unlock(&kvm_lock);
4579 if (freq->old < freq->new && send_ipi) {
4581 * We upscale the frequency. Must make the guest
4582 * doesn't see old kvmclock values while running with
4583 * the new frequency, otherwise we risk the guest sees
4584 * time go backwards.
4586 * In case we update the frequency for another cpu
4587 * (which might be in guest context) send an interrupt
4588 * to kick the cpu out of guest context. Next time
4589 * guest context is entered kvmclock will be updated,
4590 * so the guest will not see stale values.
4592 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4597 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4598 .notifier_call = kvmclock_cpufreq_notifier
4601 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4602 unsigned long action, void *hcpu)
4604 unsigned int cpu = (unsigned long)hcpu;
4608 case CPU_DOWN_FAILED:
4609 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4611 case CPU_DOWN_PREPARE:
4612 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4618 static struct notifier_block kvmclock_cpu_notifier_block = {
4619 .notifier_call = kvmclock_cpu_notifier,
4620 .priority = -INT_MAX
4623 static void kvm_timer_init(void)
4627 max_tsc_khz = tsc_khz;
4628 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4629 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4630 #ifdef CONFIG_CPU_FREQ
4631 struct cpufreq_policy policy;
4632 memset(&policy, 0, sizeof(policy));
4634 cpufreq_get_policy(&policy, cpu);
4635 if (policy.cpuinfo.max_freq)
4636 max_tsc_khz = policy.cpuinfo.max_freq;
4639 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4640 CPUFREQ_TRANSITION_NOTIFIER);
4642 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4643 for_each_online_cpu(cpu)
4644 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4647 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4649 int kvm_is_in_guest(void)
4651 return __this_cpu_read(current_vcpu) != NULL;
4654 static int kvm_is_user_mode(void)
4658 if (__this_cpu_read(current_vcpu))
4659 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4661 return user_mode != 0;
4664 static unsigned long kvm_get_guest_ip(void)
4666 unsigned long ip = 0;
4668 if (__this_cpu_read(current_vcpu))
4669 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4674 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4675 .is_in_guest = kvm_is_in_guest,
4676 .is_user_mode = kvm_is_user_mode,
4677 .get_guest_ip = kvm_get_guest_ip,
4680 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4682 __this_cpu_write(current_vcpu, vcpu);
4684 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4686 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4688 __this_cpu_write(current_vcpu, NULL);
4690 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4692 static void kvm_set_mmio_spte_mask(void)
4695 int maxphyaddr = boot_cpu_data.x86_phys_bits;
4698 * Set the reserved bits and the present bit of an paging-structure
4699 * entry to generate page fault with PFER.RSV = 1.
4701 mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4704 #ifdef CONFIG_X86_64
4706 * If reserved bit is not supported, clear the present bit to disable
4709 if (maxphyaddr == 52)
4713 kvm_mmu_set_mmio_spte_mask(mask);
4716 int kvm_arch_init(void *opaque)
4719 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4722 printk(KERN_ERR "kvm: already loaded the other module\n");
4727 if (!ops->cpu_has_kvm_support()) {
4728 printk(KERN_ERR "kvm: no hardware support\n");
4732 if (ops->disabled_by_bios()) {
4733 printk(KERN_ERR "kvm: disabled by bios\n");
4738 r = kvm_mmu_module_init();
4742 kvm_set_mmio_spte_mask();
4743 kvm_init_msr_list();
4746 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4747 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4751 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4754 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4762 void kvm_arch_exit(void)
4764 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4766 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4767 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4768 CPUFREQ_TRANSITION_NOTIFIER);
4769 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4771 kvm_mmu_module_exit();
4774 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4776 ++vcpu->stat.halt_exits;
4777 if (irqchip_in_kernel(vcpu->kvm)) {
4778 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4781 vcpu->run->exit_reason = KVM_EXIT_HLT;
4785 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4787 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4789 u64 param, ingpa, outgpa, ret;
4790 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4791 bool fast, longmode;
4795 * hypercall generates UD from non zero cpl and real mode
4798 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4799 kvm_queue_exception(vcpu, UD_VECTOR);
4803 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4804 longmode = is_long_mode(vcpu) && cs_l == 1;
4807 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4808 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4809 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4810 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4811 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4812 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4814 #ifdef CONFIG_X86_64
4816 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4817 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4818 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4822 code = param & 0xffff;
4823 fast = (param >> 16) & 0x1;
4824 rep_cnt = (param >> 32) & 0xfff;
4825 rep_idx = (param >> 48) & 0xfff;
4827 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4830 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4831 kvm_vcpu_on_spin(vcpu);
4834 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4838 ret = res | (((u64)rep_done & 0xfff) << 32);
4840 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4842 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4843 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4849 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4851 unsigned long nr, a0, a1, a2, a3, ret;
4854 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4855 return kvm_hv_hypercall(vcpu);
4857 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4858 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4859 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4860 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4861 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4863 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4865 if (!is_long_mode(vcpu)) {
4873 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4879 case KVM_HC_VAPIC_POLL_IRQ:
4887 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4888 ++vcpu->stat.hypercalls;
4891 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4893 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4895 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4896 char instruction[3];
4897 unsigned long rip = kvm_rip_read(vcpu);
4900 * Blow out the MMU to ensure that no other VCPU has an active mapping
4901 * to ensure that the updated hypercall appears atomically across all
4904 kvm_mmu_zap_all(vcpu->kvm);
4906 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4908 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
4912 * Check if userspace requested an interrupt window, and that the
4913 * interrupt window is open.
4915 * No need to exit to userspace if we already have an interrupt queued.
4917 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4919 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4920 vcpu->run->request_interrupt_window &&
4921 kvm_arch_interrupt_allowed(vcpu));
4924 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4926 struct kvm_run *kvm_run = vcpu->run;
4928 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4929 kvm_run->cr8 = kvm_get_cr8(vcpu);
4930 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4931 if (irqchip_in_kernel(vcpu->kvm))
4932 kvm_run->ready_for_interrupt_injection = 1;
4934 kvm_run->ready_for_interrupt_injection =
4935 kvm_arch_interrupt_allowed(vcpu) &&
4936 !kvm_cpu_has_interrupt(vcpu) &&
4937 !kvm_event_needs_reinjection(vcpu);
4940 static void vapic_enter(struct kvm_vcpu *vcpu)
4942 struct kvm_lapic *apic = vcpu->arch.apic;
4945 if (!apic || !apic->vapic_addr)
4948 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4950 vcpu->arch.apic->vapic_page = page;
4953 static void vapic_exit(struct kvm_vcpu *vcpu)
4955 struct kvm_lapic *apic = vcpu->arch.apic;
4958 if (!apic || !apic->vapic_addr)
4961 idx = srcu_read_lock(&vcpu->kvm->srcu);
4962 kvm_release_page_dirty(apic->vapic_page);
4963 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4964 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4967 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4971 if (!kvm_x86_ops->update_cr8_intercept)
4974 if (!vcpu->arch.apic)
4977 if (!vcpu->arch.apic->vapic_addr)
4978 max_irr = kvm_lapic_find_highest_irr(vcpu);
4985 tpr = kvm_lapic_get_cr8(vcpu);
4987 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4990 static void inject_pending_event(struct kvm_vcpu *vcpu)
4992 /* try to reinject previous events if any */
4993 if (vcpu->arch.exception.pending) {
4994 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4995 vcpu->arch.exception.has_error_code,
4996 vcpu->arch.exception.error_code);
4997 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4998 vcpu->arch.exception.has_error_code,
4999 vcpu->arch.exception.error_code,
5000 vcpu->arch.exception.reinject);
5004 if (vcpu->arch.nmi_injected) {
5005 kvm_x86_ops->set_nmi(vcpu);
5009 if (vcpu->arch.interrupt.pending) {
5010 kvm_x86_ops->set_irq(vcpu);
5014 /* try to inject new event if pending */
5015 if (vcpu->arch.nmi_pending) {
5016 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5017 --vcpu->arch.nmi_pending;
5018 vcpu->arch.nmi_injected = true;
5019 kvm_x86_ops->set_nmi(vcpu);
5021 } else if (kvm_cpu_has_interrupt(vcpu)) {
5022 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5023 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5025 kvm_x86_ops->set_irq(vcpu);
5030 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5032 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5033 !vcpu->guest_xcr0_loaded) {
5034 /* kvm_set_xcr() also depends on this */
5035 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5036 vcpu->guest_xcr0_loaded = 1;
5040 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5042 if (vcpu->guest_xcr0_loaded) {
5043 if (vcpu->arch.xcr0 != host_xcr0)
5044 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5045 vcpu->guest_xcr0_loaded = 0;
5049 static void process_nmi(struct kvm_vcpu *vcpu)
5054 * x86 is limited to one NMI running, and one NMI pending after it.
5055 * If an NMI is already in progress, limit further NMIs to just one.
5056 * Otherwise, allow two (and we'll inject the first one immediately).
5058 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5061 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5062 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5063 kvm_make_request(KVM_REQ_EVENT, vcpu);
5066 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5069 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5070 vcpu->run->request_interrupt_window;
5071 bool req_immediate_exit = 0;
5073 if (vcpu->requests) {
5074 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5075 kvm_mmu_unload(vcpu);
5076 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5077 __kvm_migrate_timers(vcpu);
5078 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5079 r = kvm_guest_time_update(vcpu);
5083 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5084 kvm_mmu_sync_roots(vcpu);
5085 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5086 kvm_x86_ops->tlb_flush(vcpu);
5087 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5088 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5092 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5093 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5097 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5098 vcpu->fpu_active = 0;
5099 kvm_x86_ops->fpu_deactivate(vcpu);
5101 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5102 /* Page is swapped out. Do synthetic halt */
5103 vcpu->arch.apf.halted = true;
5107 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5108 record_steal_time(vcpu);
5109 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5111 req_immediate_exit =
5112 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5113 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5114 kvm_handle_pmu_event(vcpu);
5115 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5116 kvm_deliver_pmi(vcpu);
5119 r = kvm_mmu_reload(vcpu);
5123 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5124 inject_pending_event(vcpu);
5126 /* enable NMI/IRQ window open exits if needed */
5127 if (vcpu->arch.nmi_pending)
5128 kvm_x86_ops->enable_nmi_window(vcpu);
5129 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5130 kvm_x86_ops->enable_irq_window(vcpu);
5132 if (kvm_lapic_enabled(vcpu)) {
5133 update_cr8_intercept(vcpu);
5134 kvm_lapic_sync_to_vapic(vcpu);
5140 kvm_x86_ops->prepare_guest_switch(vcpu);
5141 if (vcpu->fpu_active)
5142 kvm_load_guest_fpu(vcpu);
5143 kvm_load_guest_xcr0(vcpu);
5145 vcpu->mode = IN_GUEST_MODE;
5147 /* We should set ->mode before check ->requests,
5148 * see the comment in make_all_cpus_request.
5152 local_irq_disable();
5154 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5155 || need_resched() || signal_pending(current)) {
5156 vcpu->mode = OUTSIDE_GUEST_MODE;
5160 kvm_x86_ops->cancel_injection(vcpu);
5165 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5167 if (req_immediate_exit)
5168 smp_send_reschedule(vcpu->cpu);
5172 if (unlikely(vcpu->arch.switch_db_regs)) {
5174 set_debugreg(vcpu->arch.eff_db[0], 0);
5175 set_debugreg(vcpu->arch.eff_db[1], 1);
5176 set_debugreg(vcpu->arch.eff_db[2], 2);
5177 set_debugreg(vcpu->arch.eff_db[3], 3);
5180 trace_kvm_entry(vcpu->vcpu_id);
5181 kvm_x86_ops->run(vcpu);
5184 * If the guest has used debug registers, at least dr7
5185 * will be disabled while returning to the host.
5186 * If we don't have active breakpoints in the host, we don't
5187 * care about the messed up debug address registers. But if
5188 * we have some of them active, restore the old state.
5190 if (hw_breakpoint_active())
5191 hw_breakpoint_restore();
5193 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5195 vcpu->mode = OUTSIDE_GUEST_MODE;
5202 * We must have an instruction between local_irq_enable() and
5203 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5204 * the interrupt shadow. The stat.exits increment will do nicely.
5205 * But we need to prevent reordering, hence this barrier():
5213 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5216 * Profile KVM exit RIPs:
5218 if (unlikely(prof_on == KVM_PROFILING)) {
5219 unsigned long rip = kvm_rip_read(vcpu);
5220 profile_hit(KVM_PROFILING, (void *)rip);
5224 kvm_lapic_sync_from_vapic(vcpu);
5226 r = kvm_x86_ops->handle_exit(vcpu);
5232 static int __vcpu_run(struct kvm_vcpu *vcpu)
5235 struct kvm *kvm = vcpu->kvm;
5237 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5238 pr_debug("vcpu %d received sipi with vector # %x\n",
5239 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5240 kvm_lapic_reset(vcpu);
5241 r = kvm_arch_vcpu_reset(vcpu);
5244 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5247 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5252 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5253 !vcpu->arch.apf.halted)
5254 r = vcpu_enter_guest(vcpu);
5256 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5257 kvm_vcpu_block(vcpu);
5258 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5259 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5261 switch(vcpu->arch.mp_state) {
5262 case KVM_MP_STATE_HALTED:
5263 vcpu->arch.mp_state =
5264 KVM_MP_STATE_RUNNABLE;
5265 case KVM_MP_STATE_RUNNABLE:
5266 vcpu->arch.apf.halted = false;
5268 case KVM_MP_STATE_SIPI_RECEIVED:
5279 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5280 if (kvm_cpu_has_pending_timer(vcpu))
5281 kvm_inject_pending_timer_irqs(vcpu);
5283 if (dm_request_for_irq_injection(vcpu)) {
5285 vcpu->run->exit_reason = KVM_EXIT_INTR;
5286 ++vcpu->stat.request_irq_exits;
5289 kvm_check_async_pf_completion(vcpu);
5291 if (signal_pending(current)) {
5293 vcpu->run->exit_reason = KVM_EXIT_INTR;
5294 ++vcpu->stat.signal_exits;
5296 if (need_resched()) {
5297 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5299 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5303 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5310 static int complete_mmio(struct kvm_vcpu *vcpu)
5312 struct kvm_run *run = vcpu->run;
5315 if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5318 if (vcpu->mmio_needed) {
5319 vcpu->mmio_needed = 0;
5320 if (!vcpu->mmio_is_write)
5321 memcpy(vcpu->mmio_data + vcpu->mmio_index,
5323 vcpu->mmio_index += 8;
5324 if (vcpu->mmio_index < vcpu->mmio_size) {
5325 run->exit_reason = KVM_EXIT_MMIO;
5326 run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5327 memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5328 run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5329 run->mmio.is_write = vcpu->mmio_is_write;
5330 vcpu->mmio_needed = 1;
5333 if (vcpu->mmio_is_write)
5335 vcpu->mmio_read_completed = 1;
5337 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5338 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5339 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5340 if (r != EMULATE_DONE)
5345 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5350 if (!tsk_used_math(current) && init_fpu(current))
5353 if (vcpu->sigset_active)
5354 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5356 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5357 kvm_vcpu_block(vcpu);
5358 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5363 /* re-sync apic's tpr */
5364 if (!irqchip_in_kernel(vcpu->kvm)) {
5365 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5371 r = complete_mmio(vcpu);
5375 r = __vcpu_run(vcpu);
5378 post_kvm_run_save(vcpu);
5379 if (vcpu->sigset_active)
5380 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5385 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5387 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5389 * We are here if userspace calls get_regs() in the middle of
5390 * instruction emulation. Registers state needs to be copied
5391 * back from emulation context to vcpu. Usrapace shouldn't do
5392 * that usually, but some bad designed PV devices (vmware
5393 * backdoor interface) need this to work
5395 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5396 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5397 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5399 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5400 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5401 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5402 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5403 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5404 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5405 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5406 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5407 #ifdef CONFIG_X86_64
5408 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5409 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5410 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5411 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5412 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5413 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5414 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5415 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5418 regs->rip = kvm_rip_read(vcpu);
5419 regs->rflags = kvm_get_rflags(vcpu);
5424 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5426 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5427 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5429 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5430 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5431 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5432 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5433 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5434 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5435 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5436 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5437 #ifdef CONFIG_X86_64
5438 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5439 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5440 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5441 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5442 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5443 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5444 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5445 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5448 kvm_rip_write(vcpu, regs->rip);
5449 kvm_set_rflags(vcpu, regs->rflags);
5451 vcpu->arch.exception.pending = false;
5453 kvm_make_request(KVM_REQ_EVENT, vcpu);
5458 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5460 struct kvm_segment cs;
5462 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5466 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5468 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5469 struct kvm_sregs *sregs)
5473 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5474 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5475 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5476 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5477 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5478 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5480 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5481 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5483 kvm_x86_ops->get_idt(vcpu, &dt);
5484 sregs->idt.limit = dt.size;
5485 sregs->idt.base = dt.address;
5486 kvm_x86_ops->get_gdt(vcpu, &dt);
5487 sregs->gdt.limit = dt.size;
5488 sregs->gdt.base = dt.address;
5490 sregs->cr0 = kvm_read_cr0(vcpu);
5491 sregs->cr2 = vcpu->arch.cr2;
5492 sregs->cr3 = kvm_read_cr3(vcpu);
5493 sregs->cr4 = kvm_read_cr4(vcpu);
5494 sregs->cr8 = kvm_get_cr8(vcpu);
5495 sregs->efer = vcpu->arch.efer;
5496 sregs->apic_base = kvm_get_apic_base(vcpu);
5498 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5500 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5501 set_bit(vcpu->arch.interrupt.nr,
5502 (unsigned long *)sregs->interrupt_bitmap);
5507 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5508 struct kvm_mp_state *mp_state)
5510 mp_state->mp_state = vcpu->arch.mp_state;
5514 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5515 struct kvm_mp_state *mp_state)
5517 vcpu->arch.mp_state = mp_state->mp_state;
5518 kvm_make_request(KVM_REQ_EVENT, vcpu);
5522 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5523 bool has_error_code, u32 error_code)
5525 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5528 init_emulate_ctxt(vcpu);
5530 ret = emulator_task_switch(ctxt, tss_selector, reason,
5531 has_error_code, error_code);
5534 return EMULATE_FAIL;
5536 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5537 kvm_rip_write(vcpu, ctxt->eip);
5538 kvm_set_rflags(vcpu, ctxt->eflags);
5539 kvm_make_request(KVM_REQ_EVENT, vcpu);
5540 return EMULATE_DONE;
5542 EXPORT_SYMBOL_GPL(kvm_task_switch);
5544 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5545 struct kvm_sregs *sregs)
5547 int mmu_reset_needed = 0;
5548 int pending_vec, max_bits, idx;
5551 dt.size = sregs->idt.limit;
5552 dt.address = sregs->idt.base;
5553 kvm_x86_ops->set_idt(vcpu, &dt);
5554 dt.size = sregs->gdt.limit;
5555 dt.address = sregs->gdt.base;
5556 kvm_x86_ops->set_gdt(vcpu, &dt);
5558 vcpu->arch.cr2 = sregs->cr2;
5559 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5560 vcpu->arch.cr3 = sregs->cr3;
5561 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5563 kvm_set_cr8(vcpu, sregs->cr8);
5565 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5566 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5567 kvm_set_apic_base(vcpu, sregs->apic_base);
5569 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5570 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5571 vcpu->arch.cr0 = sregs->cr0;
5573 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5574 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5575 if (sregs->cr4 & X86_CR4_OSXSAVE)
5576 kvm_update_cpuid(vcpu);
5578 idx = srcu_read_lock(&vcpu->kvm->srcu);
5579 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5580 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5581 mmu_reset_needed = 1;
5583 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5585 if (mmu_reset_needed)
5586 kvm_mmu_reset_context(vcpu);
5588 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5589 pending_vec = find_first_bit(
5590 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5591 if (pending_vec < max_bits) {
5592 kvm_queue_interrupt(vcpu, pending_vec, false);
5593 pr_debug("Set back pending irq %d\n", pending_vec);
5596 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5597 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5598 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5599 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5600 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5601 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5603 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5604 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5606 update_cr8_intercept(vcpu);
5608 /* Older userspace won't unhalt the vcpu on reset. */
5609 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5610 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5612 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5614 kvm_make_request(KVM_REQ_EVENT, vcpu);
5619 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5620 struct kvm_guest_debug *dbg)
5622 unsigned long rflags;
5625 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5627 if (vcpu->arch.exception.pending)
5629 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5630 kvm_queue_exception(vcpu, DB_VECTOR);
5632 kvm_queue_exception(vcpu, BP_VECTOR);
5636 * Read rflags as long as potentially injected trace flags are still
5639 rflags = kvm_get_rflags(vcpu);
5641 vcpu->guest_debug = dbg->control;
5642 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5643 vcpu->guest_debug = 0;
5645 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5646 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5647 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5648 vcpu->arch.switch_db_regs =
5649 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5651 for (i = 0; i < KVM_NR_DB_REGS; i++)
5652 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5653 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5656 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5657 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5658 get_segment_base(vcpu, VCPU_SREG_CS);
5661 * Trigger an rflags update that will inject or remove the trace
5664 kvm_set_rflags(vcpu, rflags);
5666 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5676 * Translate a guest virtual address to a guest physical address.
5678 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5679 struct kvm_translation *tr)
5681 unsigned long vaddr = tr->linear_address;
5685 idx = srcu_read_lock(&vcpu->kvm->srcu);
5686 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5687 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5688 tr->physical_address = gpa;
5689 tr->valid = gpa != UNMAPPED_GVA;
5696 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5698 struct i387_fxsave_struct *fxsave =
5699 &vcpu->arch.guest_fpu.state->fxsave;
5701 memcpy(fpu->fpr, fxsave->st_space, 128);
5702 fpu->fcw = fxsave->cwd;
5703 fpu->fsw = fxsave->swd;
5704 fpu->ftwx = fxsave->twd;
5705 fpu->last_opcode = fxsave->fop;
5706 fpu->last_ip = fxsave->rip;
5707 fpu->last_dp = fxsave->rdp;
5708 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5713 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5715 struct i387_fxsave_struct *fxsave =
5716 &vcpu->arch.guest_fpu.state->fxsave;
5718 memcpy(fxsave->st_space, fpu->fpr, 128);
5719 fxsave->cwd = fpu->fcw;
5720 fxsave->swd = fpu->fsw;
5721 fxsave->twd = fpu->ftwx;
5722 fxsave->fop = fpu->last_opcode;
5723 fxsave->rip = fpu->last_ip;
5724 fxsave->rdp = fpu->last_dp;
5725 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5730 int fx_init(struct kvm_vcpu *vcpu)
5734 err = fpu_alloc(&vcpu->arch.guest_fpu);
5738 fpu_finit(&vcpu->arch.guest_fpu);
5741 * Ensure guest xcr0 is valid for loading
5743 vcpu->arch.xcr0 = XSTATE_FP;
5745 vcpu->arch.cr0 |= X86_CR0_ET;
5749 EXPORT_SYMBOL_GPL(fx_init);
5751 static void fx_free(struct kvm_vcpu *vcpu)
5753 fpu_free(&vcpu->arch.guest_fpu);
5756 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5758 if (vcpu->guest_fpu_loaded)
5762 * Restore all possible states in the guest,
5763 * and assume host would use all available bits.
5764 * Guest xcr0 would be loaded later.
5766 kvm_put_guest_xcr0(vcpu);
5767 vcpu->guest_fpu_loaded = 1;
5768 unlazy_fpu(current);
5769 fpu_restore_checking(&vcpu->arch.guest_fpu);
5773 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5775 kvm_put_guest_xcr0(vcpu);
5777 if (!vcpu->guest_fpu_loaded)
5780 vcpu->guest_fpu_loaded = 0;
5781 fpu_save_init(&vcpu->arch.guest_fpu);
5782 ++vcpu->stat.fpu_reload;
5783 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5787 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5789 kvmclock_reset(vcpu);
5791 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5793 kvm_x86_ops->vcpu_free(vcpu);
5796 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5799 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5800 printk_once(KERN_WARNING
5801 "kvm: SMP vm created on host with unstable TSC; "
5802 "guest TSC will not be reliable\n");
5803 return kvm_x86_ops->vcpu_create(kvm, id);
5806 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5810 vcpu->arch.mtrr_state.have_fixed = 1;
5812 r = kvm_arch_vcpu_reset(vcpu);
5814 r = kvm_mmu_setup(vcpu);
5820 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5822 vcpu->arch.apf.msr_val = 0;
5825 kvm_mmu_unload(vcpu);
5829 kvm_x86_ops->vcpu_free(vcpu);
5832 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5834 atomic_set(&vcpu->arch.nmi_queued, 0);
5835 vcpu->arch.nmi_pending = 0;
5836 vcpu->arch.nmi_injected = false;
5838 vcpu->arch.switch_db_regs = 0;
5839 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5840 vcpu->arch.dr6 = DR6_FIXED_1;
5841 vcpu->arch.dr7 = DR7_FIXED_1;
5843 kvm_make_request(KVM_REQ_EVENT, vcpu);
5844 vcpu->arch.apf.msr_val = 0;
5845 vcpu->arch.st.msr_val = 0;
5847 kvmclock_reset(vcpu);
5849 kvm_clear_async_pf_completion_queue(vcpu);
5850 kvm_async_pf_hash_reset(vcpu);
5851 vcpu->arch.apf.halted = false;
5853 kvm_pmu_reset(vcpu);
5855 return kvm_x86_ops->vcpu_reset(vcpu);
5858 int kvm_arch_hardware_enable(void *garbage)
5861 struct kvm_vcpu *vcpu;
5864 kvm_shared_msr_cpu_online();
5865 list_for_each_entry(kvm, &vm_list, vm_list)
5866 kvm_for_each_vcpu(i, vcpu, kvm)
5867 if (vcpu->cpu == smp_processor_id())
5868 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5869 return kvm_x86_ops->hardware_enable(garbage);
5872 void kvm_arch_hardware_disable(void *garbage)
5874 kvm_x86_ops->hardware_disable(garbage);
5875 drop_user_return_notifiers(garbage);
5878 int kvm_arch_hardware_setup(void)
5880 return kvm_x86_ops->hardware_setup();
5883 void kvm_arch_hardware_unsetup(void)
5885 kvm_x86_ops->hardware_unsetup();
5888 void kvm_arch_check_processor_compat(void *rtn)
5890 kvm_x86_ops->check_processor_compatibility(rtn);
5893 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5899 BUG_ON(vcpu->kvm == NULL);
5902 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5903 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5904 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5906 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5908 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5913 vcpu->arch.pio_data = page_address(page);
5915 kvm_init_tsc_catchup(vcpu, max_tsc_khz);
5917 r = kvm_mmu_create(vcpu);
5919 goto fail_free_pio_data;
5921 if (irqchip_in_kernel(kvm)) {
5922 r = kvm_create_lapic(vcpu);
5924 goto fail_mmu_destroy;
5927 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5929 if (!vcpu->arch.mce_banks) {
5931 goto fail_free_lapic;
5933 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5935 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5936 goto fail_free_mce_banks;
5938 kvm_async_pf_hash_reset(vcpu);
5942 fail_free_mce_banks:
5943 kfree(vcpu->arch.mce_banks);
5945 kvm_free_lapic(vcpu);
5947 kvm_mmu_destroy(vcpu);
5949 free_page((unsigned long)vcpu->arch.pio_data);
5954 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5958 kvm_pmu_destroy(vcpu);
5959 kfree(vcpu->arch.mce_banks);
5960 kvm_free_lapic(vcpu);
5961 idx = srcu_read_lock(&vcpu->kvm->srcu);
5962 kvm_mmu_destroy(vcpu);
5963 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5964 free_page((unsigned long)vcpu->arch.pio_data);
5967 int kvm_arch_init_vm(struct kvm *kvm)
5969 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5970 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5972 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5973 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5975 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
5980 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5983 kvm_mmu_unload(vcpu);
5987 static void kvm_free_vcpus(struct kvm *kvm)
5990 struct kvm_vcpu *vcpu;
5993 * Unpin any mmu pages first.
5995 kvm_for_each_vcpu(i, vcpu, kvm) {
5996 kvm_clear_async_pf_completion_queue(vcpu);
5997 kvm_unload_vcpu_mmu(vcpu);
5999 kvm_for_each_vcpu(i, vcpu, kvm)
6000 kvm_arch_vcpu_free(vcpu);
6002 mutex_lock(&kvm->lock);
6003 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6004 kvm->vcpus[i] = NULL;
6006 atomic_set(&kvm->online_vcpus, 0);
6007 mutex_unlock(&kvm->lock);
6010 void kvm_arch_sync_events(struct kvm *kvm)
6012 kvm_free_all_assigned_devices(kvm);
6016 void kvm_arch_destroy_vm(struct kvm *kvm)
6018 kvm_iommu_unmap_guest(kvm);
6019 kfree(kvm->arch.vpic);
6020 kfree(kvm->arch.vioapic);
6021 kvm_free_vcpus(kvm);
6022 if (kvm->arch.apic_access_page)
6023 put_page(kvm->arch.apic_access_page);
6024 if (kvm->arch.ept_identity_pagetable)
6025 put_page(kvm->arch.ept_identity_pagetable);
6028 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6029 struct kvm_memory_slot *memslot,
6030 struct kvm_memory_slot old,
6031 struct kvm_userspace_memory_region *mem,
6034 int npages = memslot->npages;
6035 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6037 /* Prevent internal slot pages from being moved by fork()/COW. */
6038 if (memslot->id >= KVM_MEMORY_SLOTS)
6039 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6041 /*To keep backward compatibility with older userspace,
6042 *x86 needs to hanlde !user_alloc case.
6045 if (npages && !old.rmap) {
6046 unsigned long userspace_addr;
6048 down_write(¤t->mm->mmap_sem);
6049 userspace_addr = do_mmap(NULL, 0,
6051 PROT_READ | PROT_WRITE,
6054 up_write(¤t->mm->mmap_sem);
6056 if (IS_ERR((void *)userspace_addr))
6057 return PTR_ERR((void *)userspace_addr);
6059 memslot->userspace_addr = userspace_addr;
6067 void kvm_arch_commit_memory_region(struct kvm *kvm,
6068 struct kvm_userspace_memory_region *mem,
6069 struct kvm_memory_slot old,
6073 int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6075 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6078 down_write(¤t->mm->mmap_sem);
6079 ret = do_munmap(current->mm, old.userspace_addr,
6080 old.npages * PAGE_SIZE);
6081 up_write(¤t->mm->mmap_sem);
6084 "kvm_vm_ioctl_set_memory_region: "
6085 "failed to munmap memory\n");
6088 if (!kvm->arch.n_requested_mmu_pages)
6089 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6091 spin_lock(&kvm->mmu_lock);
6093 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6094 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6095 spin_unlock(&kvm->mmu_lock);
6098 void kvm_arch_flush_shadow(struct kvm *kvm)
6100 kvm_mmu_zap_all(kvm);
6101 kvm_reload_remote_mmus(kvm);
6104 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6106 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6107 !vcpu->arch.apf.halted)
6108 || !list_empty_careful(&vcpu->async_pf.done)
6109 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6110 || atomic_read(&vcpu->arch.nmi_queued) ||
6111 (kvm_arch_interrupt_allowed(vcpu) &&
6112 kvm_cpu_has_interrupt(vcpu));
6115 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6118 int cpu = vcpu->cpu;
6120 if (waitqueue_active(&vcpu->wq)) {
6121 wake_up_interruptible(&vcpu->wq);
6122 ++vcpu->stat.halt_wakeup;
6126 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6127 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6128 smp_send_reschedule(cpu);
6132 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6134 return kvm_x86_ops->interrupt_allowed(vcpu);
6137 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6139 unsigned long current_rip = kvm_rip_read(vcpu) +
6140 get_segment_base(vcpu, VCPU_SREG_CS);
6142 return current_rip == linear_rip;
6144 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6146 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6148 unsigned long rflags;
6150 rflags = kvm_x86_ops->get_rflags(vcpu);
6151 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6152 rflags &= ~X86_EFLAGS_TF;
6155 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6157 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6159 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6160 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6161 rflags |= X86_EFLAGS_TF;
6162 kvm_x86_ops->set_rflags(vcpu, rflags);
6163 kvm_make_request(KVM_REQ_EVENT, vcpu);
6165 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6167 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6171 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6172 is_error_page(work->page))
6175 r = kvm_mmu_reload(vcpu);
6179 if (!vcpu->arch.mmu.direct_map &&
6180 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6183 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6186 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6188 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6191 static inline u32 kvm_async_pf_next_probe(u32 key)
6193 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6196 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6198 u32 key = kvm_async_pf_hash_fn(gfn);
6200 while (vcpu->arch.apf.gfns[key] != ~0)
6201 key = kvm_async_pf_next_probe(key);
6203 vcpu->arch.apf.gfns[key] = gfn;
6206 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6209 u32 key = kvm_async_pf_hash_fn(gfn);
6211 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6212 (vcpu->arch.apf.gfns[key] != gfn &&
6213 vcpu->arch.apf.gfns[key] != ~0); i++)
6214 key = kvm_async_pf_next_probe(key);
6219 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6221 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6224 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6228 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6230 vcpu->arch.apf.gfns[i] = ~0;
6232 j = kvm_async_pf_next_probe(j);
6233 if (vcpu->arch.apf.gfns[j] == ~0)
6235 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6237 * k lies cyclically in ]i,j]
6239 * |....j i.k.| or |.k..j i...|
6241 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6242 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6247 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6250 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6254 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6255 struct kvm_async_pf *work)
6257 struct x86_exception fault;
6259 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6260 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6262 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6263 (vcpu->arch.apf.send_user_only &&
6264 kvm_x86_ops->get_cpl(vcpu) == 0))
6265 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6266 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6267 fault.vector = PF_VECTOR;
6268 fault.error_code_valid = true;
6269 fault.error_code = 0;
6270 fault.nested_page_fault = false;
6271 fault.address = work->arch.token;
6272 kvm_inject_page_fault(vcpu, &fault);
6276 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6277 struct kvm_async_pf *work)
6279 struct x86_exception fault;
6281 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6282 if (is_error_page(work->page))
6283 work->arch.token = ~0; /* broadcast wakeup */
6285 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6287 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6288 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6289 fault.vector = PF_VECTOR;
6290 fault.error_code_valid = true;
6291 fault.error_code = 0;
6292 fault.nested_page_fault = false;
6293 fault.address = work->arch.token;
6294 kvm_inject_page_fault(vcpu, &fault);
6296 vcpu->arch.apf.halted = false;
6299 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6301 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6304 return !kvm_event_needs_reinjection(vcpu) &&
6305 kvm_x86_ops->interrupt_allowed(vcpu);
6308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6314 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6315 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6316 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6317 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6318 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);