arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <asm/processor.h>
  40 #include <asm/page.h>
  41 #include <asm/current.h>
  42 #include <trace/events/kvm.h>
  43
  44 #include "ioapic.h"
  45 #include "lapic.h"
  46 #include "irq.h"
  47
  48 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  49                 bool line_status);
  50
  51 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  52                                           unsigned long addr,
  53                                           unsigned long length)
  54 {
  55         unsigned long result = 0;
  56
  57         switch (ioapic->ioregsel) {
  58         case IOAPIC_REG_VERSION:
  59                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  60                           | (IOAPIC_VERSION_ID & 0xff));
  61                 break;
  62
  63         case IOAPIC_REG_APIC_ID:
  64         case IOAPIC_REG_ARB_ID:
  65                 result = ((ioapic->id & 0xf) << 24);
  66                 break;
  67
  68         default:
  69                 {
  70                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  71                         u64 redir_content;
  72
  73                         if (redir_index < IOAPIC_NUM_PINS)
  74                                 redir_content =
  75                                         ioapic->redirtbl[redir_index].bits;
  76                         else
  77                                 redir_content = ~0ULL;
  78
  79                         result = (ioapic->ioregsel & 0x1) ?
  80                             (redir_content >> 32) & 0xffffffff :
  81                             redir_content & 0xffffffff;
  82                         break;
  83                 }
  84         }
  85
  86         return result;
  87 }
  88
  89 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  90 {
  91         ioapic->rtc_status.pending_eoi = 0;
  92         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
  93 }
  94
  95 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
  96
  97 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
  98 {
  99         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 100                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 101 }
 102
 103 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 104 {
 105         bool new_val, old_val;
 106         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 107         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 108         union kvm_ioapic_redirect_entry *e;
 109
 110         e = &ioapic->redirtbl[RTC_GSI];
 111         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 112                                 e->fields.dest_mode))
 113                 return;
 114
 115         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 116         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
 117
 118         if (new_val == old_val)
 119                 return;
 120
 121         if (new_val) {
 122                 __set_bit(vcpu->vcpu_id, dest_map->map);
 123                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
 124                 ioapic->rtc_status.pending_eoi++;
 125         } else {
 126                 __clear_bit(vcpu->vcpu_id, dest_map->map);
 127                 ioapic->rtc_status.pending_eoi--;
 128                 rtc_status_pending_eoi_check_valid(ioapic);
 129         }
 130 }
 131
 132 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 133 {
 134         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 135
 136         spin_lock(&ioapic->lock);
 137         __rtc_irq_eoi_tracking_restore_one(vcpu);
 138         spin_unlock(&ioapic->lock);
 139 }
 140
 141 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 142 {
 143         struct kvm_vcpu *vcpu;
 144         int i;
 145
 146         if (RTC_GSI >= IOAPIC_NUM_PINS)
 147                 return;
 148
 149         rtc_irq_eoi_tracking_reset(ioapic);
 150         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 151             __rtc_irq_eoi_tracking_restore_one(vcpu);
 152 }
 153
 154 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 155 {
 156         if (test_and_clear_bit(vcpu->vcpu_id,
 157                                ioapic->rtc_status.dest_map.map)) {
 158                 --ioapic->rtc_status.pending_eoi;
 159                 rtc_status_pending_eoi_check_valid(ioapic);
 160         }
 161 }
 162
 163 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 164 {
 165         if (ioapic->rtc_status.pending_eoi > 0)
 166                 return true; /* coalesced */
 167
 168         return false;
 169 }
 170
 171 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 172                 int irq_level, bool line_status)
 173 {
 174         union kvm_ioapic_redirect_entry entry;
 175         u32 mask = 1 << irq;
 176         u32 old_irr;
 177         int edge, ret;
 178
 179         entry = ioapic->redirtbl[irq];
 180         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 181
 182         if (!irq_level) {
 183                 ioapic->irr &= ~mask;
 184                 ret = 1;
 185                 goto out;
 186         }
 187
 188         /*
 189          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 190          * this only happens if a previous edge has not been delivered due
 191          * do masking.  For level interrupts, the remote_irr field tells
 192          * us if the interrupt is waiting for an EOI.
 193          *
 194          * RTC is special: it is edge-triggered, but userspace likes to know
 195          * if it has been already ack-ed via EOI because coalesced RTC
 196          * interrupts lead to time drift in Windows guests.  So we track
 197          * EOI manually for the RTC interrupt.
 198          */
 199         if (irq == RTC_GSI && line_status &&
 200                 rtc_irq_check_coalesced(ioapic)) {
 201                 ret = 0;
 202                 goto out;
 203         }
 204
 205         old_irr = ioapic->irr;
 206         ioapic->irr |= mask;
 207         if (edge) {
 208                 ioapic->irr_delivered &= ~mask;
 209                 if (old_irr == ioapic->irr) {
 210                         ret = 0;
 211                         goto out;
 212                 }
 213         }
 214
 215         ret = ioapic_service(ioapic, irq, line_status);
 216
 217 out:
 218         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 219         return ret;
 220 }
 221
 222 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 223 {
 224         u32 idx;
 225
 226         rtc_irq_eoi_tracking_reset(ioapic);
 227         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 228                 ioapic_set_irq(ioapic, idx, 1, true);
 229
 230         kvm_rtc_eoi_tracking_restore_all(ioapic);
 231 }
 232
 233
 234 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 235 {
 236         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 237         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 238         union kvm_ioapic_redirect_entry *e;
 239         int index;
 240
 241         spin_lock(&ioapic->lock);
 242
 243         /* Make sure we see any missing RTC EOI */
 244         if (test_bit(vcpu->vcpu_id, dest_map->map))
 245                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
 246                           ioapic_handled_vectors);
 247
 248         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 249                 e = &ioapic->redirtbl[index];
 250                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 251                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 252                     index == RTC_GSI) {
 253                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 254                                      e->fields.dest_id, e->fields.dest_mode) ||
 255                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
 256                                 __set_bit(e->fields.vector,
 257                                           ioapic_handled_vectors);
 258                 }
 259         }
 260         spin_unlock(&ioapic->lock);
 261 }
 262
 263 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
 264 {
 265         if (!ioapic_in_kernel(kvm))
 266                 return;
 267         kvm_make_scan_ioapic_request(kvm);
 268 }
 269
 270 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 271 {
 272         unsigned index;
 273         bool mask_before, mask_after;
 274         int old_remote_irr, old_delivery_status;
 275         union kvm_ioapic_redirect_entry *e;
 276
 277         switch (ioapic->ioregsel) {
 278         case IOAPIC_REG_VERSION:
 279                 /* Writes are ignored. */
 280                 break;
 281
 282         case IOAPIC_REG_APIC_ID:
 283                 ioapic->id = (val >> 24) & 0xf;
 284                 break;
 285
 286         case IOAPIC_REG_ARB_ID:
 287                 break;
 288
 289         default:
 290                 index = (ioapic->ioregsel - 0x10) >> 1;
 291
 292                 if (index >= IOAPIC_NUM_PINS)
 293                         return;
 294                 index = array_index_nospec(index, IOAPIC_NUM_PINS);
 295                 e = &ioapic->redirtbl[index];
 296                 mask_before = e->fields.mask;
 297                 /* Preserve read-only fields */
 298                 old_remote_irr = e->fields.remote_irr;
 299                 old_delivery_status = e->fields.delivery_status;
 300                 if (ioapic->ioregsel & 1) {
 301                         e->bits &= 0xffffffff;
 302                         e->bits |= (u64) val << 32;
 303                 } else {
 304                         e->bits &= ~0xffffffffULL;
 305                         e->bits |= (u32) val;
 306                 }
 307                 e->fields.remote_irr = old_remote_irr;
 308                 e->fields.delivery_status = old_delivery_status;
 309
 310                 /*
 311                  * Some OSes (Linux, Xen) assume that Remote IRR bit will
 312                  * be cleared by IOAPIC hardware when the entry is configured
 313                  * as edge-triggered. This behavior is used to simulate an
 314                  * explicit EOI on IOAPICs that don't have the EOI register.
 315                  */
 316                 if (e->fields.trig_mode == IOAPIC_EDGE_TRIG)
 317                         e->fields.remote_irr = 0;
 318
 319                 mask_after = e->fields.mask;
 320                 if (mask_before != mask_after)
 321                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 322                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 323                     && ioapic->irr & (1 << index))
 324                         ioapic_service(ioapic, index, false);
 325                 kvm_make_scan_ioapic_request(ioapic->kvm);
 326                 break;
 327         }
 328 }
 329
 330 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 331 {
 332         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 333         struct kvm_lapic_irq irqe;
 334         int ret;
 335
 336         if (entry->fields.mask ||
 337             (entry->fields.trig_mode == IOAPIC_LEVEL_TRIG &&
 338             entry->fields.remote_irr))
 339                 return -1;
 340
 341         irqe.dest_id = entry->fields.dest_id;
 342         irqe.vector = entry->fields.vector;
 343         irqe.dest_mode = entry->fields.dest_mode;
 344         irqe.trig_mode = entry->fields.trig_mode;
 345         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 346         irqe.level = 1;
 347         irqe.shorthand = 0;
 348         irqe.msi_redir_hint = false;
 349
 350         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 351                 ioapic->irr_delivered |= 1 << irq;
 352
 353         if (irq == RTC_GSI && line_status) {
 354                 /*
 355                  * pending_eoi cannot ever become negative (see
 356                  * rtc_status_pending_eoi_check_valid) and the caller
 357                  * ensures that it is only called if it is >= zero, namely
 358                  * if rtc_irq_check_coalesced returns false).
 359                  */
 360                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 361                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 362                                                &ioapic->rtc_status.dest_map);
 363                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 364         } else
 365                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 366
 367         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 368                 entry->fields.remote_irr = 1;
 369
 370         return ret;
 371 }
 372
 373 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 374                        int level, bool line_status)
 375 {
 376         int ret, irq_level;
 377
 378         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 379
 380         spin_lock(&ioapic->lock);
 381         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 382                                          irq_source_id, level);
 383         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 384
 385         spin_unlock(&ioapic->lock);
 386
 387         return ret;
 388 }
 389
 390 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 391 {
 392         int i;
 393
 394         spin_lock(&ioapic->lock);
 395         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 396                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 397         spin_unlock(&ioapic->lock);
 398 }
 399
 400 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 401 {
 402         int i;
 403         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 404                                                  eoi_inject.work);
 405         spin_lock(&ioapic->lock);
 406         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 407                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 408
 409                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 410                         continue;
 411
 412                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 413                         ioapic_service(ioapic, i, false);
 414         }
 415         spin_unlock(&ioapic->lock);
 416 }
 417
 418 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 419
 420 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 421                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 422 {
 423         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 424         struct kvm_lapic *apic = vcpu->arch.apic;
 425         int i;
 426
 427         /* RTC special handling */
 428         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
 429             vector == dest_map->vectors[vcpu->vcpu_id])
 430                 rtc_irq_eoi(ioapic, vcpu);
 431
 432         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 433                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 434
 435                 if (ent->fields.vector != vector)
 436                         continue;
 437
 438                 /*
 439                  * We are dropping lock while calling ack notifiers because ack
 440                  * notifier callbacks for assigned devices call into IOAPIC
 441                  * recursively. Since remote_irr is cleared only after call
 442                  * to notifiers if the same vector will be delivered while lock
 443                  * is dropped it will be put into irr and will be delivered
 444                  * after ack notifier returns.
 445                  */
 446                 spin_unlock(&ioapic->lock);
 447                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 448                 spin_lock(&ioapic->lock);
 449
 450                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 451                     kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 452                         continue;
 453
 454                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 455                 ent->fields.remote_irr = 0;
 456                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
 457                         ++ioapic->irq_eoi[i];
 458                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 459                                 /*
 460                                  * Real hardware does not deliver the interrupt
 461                                  * immediately during eoi broadcast, and this
 462                                  * lets a buggy guest make slow progress
 463                                  * even if it does not correctly handle a
 464                                  * level-triggered interrupt.  Emulate this
 465                                  * behavior if we detect an interrupt storm.
 466                                  */
 467                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 468                                 ioapic->irq_eoi[i] = 0;
 469                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 470                         } else {
 471                                 ioapic_service(ioapic, i, false);
 472                         }
 473                 } else {
 474                         ioapic->irq_eoi[i] = 0;
 475                 }
 476         }
 477 }
 478
 479 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 480 {
 481         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 482
 483         spin_lock(&ioapic->lock);
 484         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 485         spin_unlock(&ioapic->lock);
 486 }
 487
 488 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 489 {
 490         return container_of(dev, struct kvm_ioapic, dev);
 491 }
 492
 493 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 494 {
 495         return ((addr >= ioapic->base_address &&
 496                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 497 }
 498
 499 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 500                                 gpa_t addr, int len, void *val)
 501 {
 502         struct kvm_ioapic *ioapic = to_ioapic(this);
 503         u32 result;
 504         if (!ioapic_in_range(ioapic, addr))
 505                 return -EOPNOTSUPP;
 506
 507         ASSERT(!(addr & 0xf));  /* check alignment */
 508
 509         addr &= 0xff;
 510         spin_lock(&ioapic->lock);
 511         switch (addr) {
 512         case IOAPIC_REG_SELECT:
 513                 result = ioapic->ioregsel;
 514                 break;
 515
 516         case IOAPIC_REG_WINDOW:
 517                 result = ioapic_read_indirect(ioapic, addr, len);
 518                 break;
 519
 520         default:
 521                 result = 0;
 522                 break;
 523         }
 524         spin_unlock(&ioapic->lock);
 525
 526         switch (len) {
 527         case 8:
 528                 *(u64 *) val = result;
 529                 break;
 530         case 1:
 531         case 2:
 532         case 4:
 533                 memcpy(val, (char *)&result, len);
 534                 break;
 535         default:
 536                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 537         }
 538         return 0;
 539 }
 540
 541 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 542                                  gpa_t addr, int len, const void *val)
 543 {
 544         struct kvm_ioapic *ioapic = to_ioapic(this);
 545         u32 data;
 546         if (!ioapic_in_range(ioapic, addr))
 547                 return -EOPNOTSUPP;
 548
 549         ASSERT(!(addr & 0xf));  /* check alignment */
 550
 551         switch (len) {
 552         case 8:
 553         case 4:
 554                 data = *(u32 *) val;
 555                 break;
 556         case 2:
 557                 data = *(u16 *) val;
 558                 break;
 559         case 1:
 560                 data = *(u8  *) val;
 561                 break;
 562         default:
 563                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 564                 return 0;
 565         }
 566
 567         addr &= 0xff;
 568         spin_lock(&ioapic->lock);
 569         switch (addr) {
 570         case IOAPIC_REG_SELECT:
 571                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 572                 break;
 573
 574         case IOAPIC_REG_WINDOW:
 575                 ioapic_write_indirect(ioapic, data);
 576                 break;
 577
 578         default:
 579                 break;
 580         }
 581         spin_unlock(&ioapic->lock);
 582         return 0;
 583 }
 584
 585 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 586 {
 587         int i;
 588
 589         cancel_delayed_work_sync(&ioapic->eoi_inject);
 590         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 591                 ioapic->redirtbl[i].fields.mask = 1;
 592         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 593         ioapic->ioregsel = 0;
 594         ioapic->irr = 0;
 595         ioapic->irr_delivered = 0;
 596         ioapic->id = 0;
 597         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
 598         rtc_irq_eoi_tracking_reset(ioapic);
 599 }
 600
 601 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 602         .read     = ioapic_mmio_read,
 603         .write    = ioapic_mmio_write,
 604 };
 605
 606 int kvm_ioapic_init(struct kvm *kvm)
 607 {
 608         struct kvm_ioapic *ioapic;
 609         int ret;
 610
 611         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL_ACCOUNT);
 612         if (!ioapic)
 613                 return -ENOMEM;
 614         spin_lock_init(&ioapic->lock);
 615         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 616         kvm->arch.vioapic = ioapic;
 617         kvm_ioapic_reset(ioapic);
 618         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 619         ioapic->kvm = kvm;
 620         mutex_lock(&kvm->slots_lock);
 621         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 622                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 623         mutex_unlock(&kvm->slots_lock);
 624         if (ret < 0) {
 625                 kvm->arch.vioapic = NULL;
 626                 kfree(ioapic);
 627         }
 628
 629         return ret;
 630 }
 631
 632 void kvm_ioapic_destroy(struct kvm *kvm)
 633 {
 634         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 635
 636         if (!ioapic)
 637                 return;
 638
 639         cancel_delayed_work_sync(&ioapic->eoi_inject);
 640         mutex_lock(&kvm->slots_lock);
 641         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 642         mutex_unlock(&kvm->slots_lock);
 643         kvm->arch.vioapic = NULL;
 644         kfree(ioapic);
 645 }
 646
 647 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 648 {
 649         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 650
 651         spin_lock(&ioapic->lock);
 652         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 653         state->irr &= ~ioapic->irr_delivered;
 654         spin_unlock(&ioapic->lock);
 655 }
 656
 657 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 658 {
 659         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 660
 661         spin_lock(&ioapic->lock);
 662         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 663         ioapic->irr = 0;
 664         ioapic->irr_delivered = 0;
 665         kvm_make_scan_ioapic_request(kvm);
 666         kvm_ioapic_inject_all(ioapic, state->irr);
 667         spin_unlock(&ioapic->lock);
 668 }