2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
10 * Handle hardware traps and faults.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/context_tracking.h>
16 #include <linux/interrupt.h>
17 #include <linux/kallsyms.h>
18 #include <linux/spinlock.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/kdebug.h>
22 #include <linux/kgdb.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/ptrace.h>
26 #include <linux/uprobes.h>
27 #include <linux/string.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/kexec.h>
31 #include <linux/sched.h>
32 #include <linux/timer.h>
33 #include <linux/init.h>
34 #include <linux/bug.h>
35 #include <linux/nmi.h>
37 #include <linux/smp.h>
41 #include <linux/ioport.h>
42 #include <linux/eisa.h>
45 #if defined(CONFIG_EDAC)
46 #include <linux/edac.h>
49 #include <asm/kmemcheck.h>
50 #include <asm/stacktrace.h>
51 #include <asm/processor.h>
52 #include <asm/debugreg.h>
53 #include <linux/atomic.h>
54 #include <asm/ftrace.h>
55 #include <asm/traps.h>
58 #include <asm/fpu-internal.h>
60 #include <asm/fixmap.h>
61 #include <asm/mach_traps.h>
62 #include <asm/alternative.h>
66 #include <asm/x86_init.h>
67 #include <asm/pgalloc.h>
68 #include <asm/proto.h>
70 /* No need to be aligned, but done to keep all IDTs defined the same way. */
71 gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
73 #include <asm/processor-flags.h>
74 #include <asm/setup.h>
75 #include <asm/proto.h>
78 /* Must be page-aligned because the real IDT is used in a fixmap. */
79 gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
81 DECLARE_BITMAP(used_vectors, NR_VECTORS);
82 EXPORT_SYMBOL_GPL(used_vectors);
84 static inline void conditional_sti(struct pt_regs *regs)
86 if (regs->flags & X86_EFLAGS_IF)
90 static inline void preempt_conditional_sti(struct pt_regs *regs)
93 if (regs->flags & X86_EFLAGS_IF)
97 static inline void conditional_cli(struct pt_regs *regs)
99 if (regs->flags & X86_EFLAGS_IF)
103 static inline void preempt_conditional_cli(struct pt_regs *regs)
105 if (regs->flags & X86_EFLAGS_IF)
110 enum ctx_state ist_enter(struct pt_regs *regs)
112 enum ctx_state prev_state;
114 if (user_mode(regs)) {
115 /* Other than that, we're just an exception. */
116 prev_state = exception_enter();
119 * We might have interrupted pretty much anything. In
120 * fact, if we're a machine check, we can even interrupt
121 * NMI processing. We don't want in_nmi() to return true,
122 * but we need to notify RCU.
125 prev_state = CONTEXT_KERNEL; /* the value is irrelevant. */
129 * We are atomic because we're on the IST stack (or we're on x86_32,
130 * in which case we still shouldn't schedule).
132 * This must be after exception_enter(), because exception_enter()
133 * won't do anything if in_interrupt() returns true.
135 preempt_count_add(HARDIRQ_OFFSET);
137 /* This code is a bit fragile. Test it. */
138 rcu_lockdep_assert(rcu_is_watching(), "ist_enter didn't work");
143 void ist_exit(struct pt_regs *regs, enum ctx_state prev_state)
145 /* Must be before exception_exit. */
146 preempt_count_sub(HARDIRQ_OFFSET);
149 return exception_exit(prev_state);
155 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
156 * @regs: regs passed to the IST exception handler
158 * IST exception handlers normally cannot schedule. As a special
159 * exception, if the exception interrupted userspace code (i.e.
160 * user_mode(regs) would return true) and the exception was not
161 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
162 * begins a non-atomic section within an ist_enter()/ist_exit() region.
163 * Callers are responsible for enabling interrupts themselves inside
164 * the non-atomic section, and callers must call is_end_non_atomic()
167 void ist_begin_non_atomic(struct pt_regs *regs)
169 BUG_ON(!user_mode(regs));
172 * Sanity check: we need to be on the normal thread stack. This
173 * will catch asm bugs and any attempt to use ist_preempt_enable
176 BUG_ON((unsigned long)(current_top_of_stack() -
177 current_stack_pointer()) >= THREAD_SIZE);
179 preempt_count_sub(HARDIRQ_OFFSET);
183 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
185 * Ends a non-atomic section started with ist_begin_non_atomic().
187 void ist_end_non_atomic(void)
189 preempt_count_add(HARDIRQ_OFFSET);
192 static nokprobe_inline int
193 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
194 struct pt_regs *regs, long error_code)
196 if (v8086_mode(regs)) {
198 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
199 * On nmi (interrupt 2), do_trap should not be called.
201 if (trapnr < X86_TRAP_UD) {
202 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
209 if (!user_mode(regs)) {
210 if (!fixup_exception(regs)) {
211 tsk->thread.error_code = error_code;
212 tsk->thread.trap_nr = trapnr;
213 die(str, regs, error_code);
221 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
224 unsigned long siaddr;
229 return SEND_SIG_PRIV;
233 siaddr = uprobe_get_trap_addr(regs);
237 siaddr = uprobe_get_trap_addr(regs);
245 info->si_signo = signr;
247 info->si_code = sicode;
248 info->si_addr = (void __user *)siaddr;
253 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
254 long error_code, siginfo_t *info)
256 struct task_struct *tsk = current;
259 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
262 * We want error_code and trap_nr set for userspace faults and
263 * kernelspace faults which result in die(), but not
264 * kernelspace faults which are fixed up. die() gives the
265 * process no chance to handle the signal and notice the
266 * kernel fault information, so that won't result in polluting
267 * the information about previously queued, but not yet
268 * delivered, faults. See also do_general_protection below.
270 tsk->thread.error_code = error_code;
271 tsk->thread.trap_nr = trapnr;
274 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
275 printk_ratelimit()) {
276 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
277 tsk->comm, tsk->pid, str,
278 regs->ip, regs->sp, error_code);
279 print_vma_addr(" in ", regs->ip);
284 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
286 NOKPROBE_SYMBOL(do_trap);
288 static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
289 unsigned long trapnr, int signr)
291 enum ctx_state prev_state = exception_enter();
294 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
296 conditional_sti(regs);
297 do_trap(trapnr, signr, str, regs, error_code,
298 fill_trap_info(regs, signr, trapnr, &info));
301 exception_exit(prev_state);
304 #define DO_ERROR(trapnr, signr, str, name) \
305 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
307 do_error_trap(regs, error_code, str, trapnr, signr); \
310 DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
311 DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
312 DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
313 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
314 DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
315 DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
316 DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
317 DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
320 /* Runs on IST stack */
321 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
323 static const char str[] = "double fault";
324 struct task_struct *tsk = current;
326 #ifdef CONFIG_X86_ESPFIX64
327 extern unsigned char native_irq_return_iret[];
330 * If IRET takes a non-IST fault on the espfix64 stack, then we
331 * end up promoting it to a doublefault. In that case, modify
332 * the stack to make it look like we just entered the #GP
333 * handler from user space, similar to bad_iret.
335 * No need for ist_enter here because we don't use RCU.
337 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
338 regs->cs == __KERNEL_CS &&
339 regs->ip == (unsigned long)native_irq_return_iret)
341 struct pt_regs *normal_regs = task_pt_regs(current);
343 /* Fake a #GP(0) from userspace. */
344 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
345 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
346 regs->ip = (unsigned long)general_protection;
347 regs->sp = (unsigned long)&normal_regs->orig_ax;
353 ist_enter(regs); /* Discard prev_state because we won't return. */
354 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
356 tsk->thread.error_code = error_code;
357 tsk->thread.trap_nr = X86_TRAP_DF;
359 #ifdef CONFIG_DOUBLEFAULT
360 df_debug(regs, error_code);
363 * This is always a kernel trap and never fixable (and thus must
367 die(str, regs, error_code);
371 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
373 struct task_struct *tsk = current;
374 struct xsave_struct *xsave_buf;
375 enum ctx_state prev_state;
376 struct bndcsr *bndcsr;
379 prev_state = exception_enter();
380 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
381 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
383 conditional_sti(regs);
385 if (!user_mode(regs))
386 die("bounds", regs, error_code);
388 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
389 /* The exception is not from Intel MPX */
394 * We need to look at BNDSTATUS to resolve this exception.
395 * It is not directly accessible, though, so we need to
396 * do an xsave and then pull it out of the xsave buffer.
398 fpu_save_init(&tsk->thread.fpu);
399 xsave_buf = &(tsk->thread.fpu.state->xsave);
400 bndcsr = get_xsave_addr(xsave_buf, XSTATE_BNDCSR);
405 * The error code field of the BNDSTATUS register communicates status
406 * information of a bound range exception #BR or operation involving
409 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
410 case 2: /* Bound directory has invalid entry. */
411 if (mpx_handle_bd_fault(xsave_buf))
413 break; /* Success, it was handled */
414 case 1: /* Bound violation. */
415 info = mpx_generate_siginfo(regs, xsave_buf);
418 * We failed to decode the MPX instruction. Act as if
419 * the exception was not caused by MPX.
424 * Success, we decoded the instruction and retrieved
425 * an 'info' containing the address being accessed
426 * which caused the exception. This information
427 * allows and application to possibly handle the
428 * #BR exception itself.
430 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
433 case 0: /* No exception caused by Intel MPX operations. */
436 die("bounds", regs, error_code);
440 exception_exit(prev_state);
444 * This path out is for all the cases where we could not
445 * handle the exception in some way (like allocating a
446 * table or telling userspace about it. We will also end
447 * up here if the kernel has MPX turned off at compile
450 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
451 exception_exit(prev_state);
455 do_general_protection(struct pt_regs *regs, long error_code)
457 struct task_struct *tsk;
458 enum ctx_state prev_state;
460 prev_state = exception_enter();
461 conditional_sti(regs);
463 if (v8086_mode(regs)) {
465 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
470 if (!user_mode(regs)) {
471 if (fixup_exception(regs))
474 tsk->thread.error_code = error_code;
475 tsk->thread.trap_nr = X86_TRAP_GP;
476 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
477 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
478 die("general protection fault", regs, error_code);
482 tsk->thread.error_code = error_code;
483 tsk->thread.trap_nr = X86_TRAP_GP;
485 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
486 printk_ratelimit()) {
487 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
488 tsk->comm, task_pid_nr(tsk),
489 regs->ip, regs->sp, error_code);
490 print_vma_addr(" in ", regs->ip);
494 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
496 exception_exit(prev_state);
498 NOKPROBE_SYMBOL(do_general_protection);
500 /* May run on IST stack. */
501 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
503 enum ctx_state prev_state;
505 #ifdef CONFIG_DYNAMIC_FTRACE
507 * ftrace must be first, everything else may cause a recursive crash.
508 * See note by declaration of modifying_ftrace_code in ftrace.c
510 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
511 ftrace_int3_handler(regs))
514 if (poke_int3_handler(regs))
517 prev_state = ist_enter(regs);
518 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
519 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
520 SIGTRAP) == NOTIFY_STOP)
522 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
524 #ifdef CONFIG_KPROBES
525 if (kprobe_int3_handler(regs))
529 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
530 SIGTRAP) == NOTIFY_STOP)
534 * Let others (NMI) know that the debug stack is in use
535 * as we may switch to the interrupt stack.
537 debug_stack_usage_inc();
538 preempt_conditional_sti(regs);
539 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
540 preempt_conditional_cli(regs);
541 debug_stack_usage_dec();
543 ist_exit(regs, prev_state);
545 NOKPROBE_SYMBOL(do_int3);
549 * Help handler running on IST stack to switch off the IST stack if the
550 * interrupted code was in user mode. The actual stack switch is done in
553 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
555 struct pt_regs *regs = task_pt_regs(current);
559 NOKPROBE_SYMBOL(sync_regs);
561 struct bad_iret_stack {
562 void *error_entry_ret;
566 asmlinkage __visible notrace
567 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
570 * This is called from entry_64.S early in handling a fault
571 * caused by a bad iret to user mode. To handle the fault
572 * correctly, we want move our stack frame to task_pt_regs
573 * and we want to pretend that the exception came from the
576 struct bad_iret_stack *new_stack =
577 container_of(task_pt_regs(current),
578 struct bad_iret_stack, regs);
580 /* Copy the IRET target to the new stack. */
581 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
583 /* Copy the remainder of the stack from the current stack. */
584 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
586 BUG_ON(!user_mode(&new_stack->regs));
589 NOKPROBE_SYMBOL(fixup_bad_iret);
593 * Our handling of the processor debug registers is non-trivial.
594 * We do not clear them on entry and exit from the kernel. Therefore
595 * it is possible to get a watchpoint trap here from inside the kernel.
596 * However, the code in ./ptrace.c has ensured that the user can
597 * only set watchpoints on userspace addresses. Therefore the in-kernel
598 * watchpoint trap can only occur in code which is reading/writing
599 * from user space. Such code must not hold kernel locks (since it
600 * can equally take a page fault), therefore it is safe to call
601 * force_sig_info even though that claims and releases locks.
603 * Code in ./signal.c ensures that the debug control register
604 * is restored before we deliver any signal, and therefore that
605 * user code runs with the correct debug control register even though
608 * Being careful here means that we don't have to be as careful in a
609 * lot of more complicated places (task switching can be a bit lazy
610 * about restoring all the debug state, and ptrace doesn't have to
611 * find every occurrence of the TF bit that could be saved away even
614 * May run on IST stack.
616 dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
618 struct task_struct *tsk = current;
619 enum ctx_state prev_state;
624 prev_state = ist_enter(regs);
626 get_debugreg(dr6, 6);
628 /* Filter out all the reserved bits which are preset to 1 */
629 dr6 &= ~DR6_RESERVED;
632 * If dr6 has no reason to give us about the origin of this trap,
633 * then it's very likely the result of an icebp/int01 trap.
634 * User wants a sigtrap for that.
636 if (!dr6 && user_mode(regs))
639 /* Catch kmemcheck conditions first of all! */
640 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
643 /* DR6 may or may not be cleared by the CPU */
647 * The processor cleared BTF, so don't mark that we need it set.
649 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
651 /* Store the virtualized DR6 value */
652 tsk->thread.debugreg6 = dr6;
654 #ifdef CONFIG_KPROBES
655 if (kprobe_debug_handler(regs))
659 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
660 SIGTRAP) == NOTIFY_STOP)
664 * Let others (NMI) know that the debug stack is in use
665 * as we may switch to the interrupt stack.
667 debug_stack_usage_inc();
669 /* It's safe to allow irq's after DR6 has been saved */
670 preempt_conditional_sti(regs);
672 if (v8086_mode(regs)) {
673 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
675 preempt_conditional_cli(regs);
676 debug_stack_usage_dec();
681 * Single-stepping through system calls: ignore any exceptions in
682 * kernel space, but re-enable TF when returning to user mode.
684 * We already checked v86 mode above, so we can check for kernel mode
685 * by just checking the CPL of CS.
687 if ((dr6 & DR_STEP) && !user_mode(regs)) {
688 tsk->thread.debugreg6 &= ~DR_STEP;
689 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
690 regs->flags &= ~X86_EFLAGS_TF;
692 si_code = get_si_code(tsk->thread.debugreg6);
693 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
694 send_sigtrap(tsk, regs, error_code, si_code);
695 preempt_conditional_cli(regs);
696 debug_stack_usage_dec();
699 ist_exit(regs, prev_state);
701 NOKPROBE_SYMBOL(do_debug);
704 * Note that we play around with the 'TS' bit in an attempt to get
705 * the correct behaviour even in the presence of the asynchronous
708 static void math_error(struct pt_regs *regs, int error_code, int trapnr)
710 struct task_struct *task = current;
713 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
716 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
718 conditional_sti(regs);
720 if (!user_mode(regs))
722 if (!fixup_exception(regs)) {
723 task->thread.error_code = error_code;
724 task->thread.trap_nr = trapnr;
725 die(str, regs, error_code);
731 * Save the info for the exception handler and clear the error.
734 task->thread.trap_nr = trapnr;
735 task->thread.error_code = error_code;
736 info.si_signo = SIGFPE;
738 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
739 if (trapnr == X86_TRAP_MF) {
740 unsigned short cwd, swd;
742 * (~cwd & swd) will mask out exceptions that are not set to unmasked
743 * status. 0x3f is the exception bits in these regs, 0x200 is the
744 * C1 reg you need in case of a stack fault, 0x040 is the stack
745 * fault bit. We should only be taking one exception at a time,
746 * so if this combination doesn't produce any single exception,
747 * then we have a bad program that isn't synchronizing its FPU usage
748 * and it will suffer the consequences since we won't be able to
749 * fully reproduce the context of the exception
751 cwd = get_fpu_cwd(task);
752 swd = get_fpu_swd(task);
757 * The SIMD FPU exceptions are handled a little differently, as there
758 * is only a single status/control register. Thus, to determine which
759 * unmasked exception was caught we must mask the exception mask bits
760 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
762 unsigned short mxcsr = get_fpu_mxcsr(task);
763 err = ~(mxcsr >> 7) & mxcsr;
766 if (err & 0x001) { /* Invalid op */
768 * swd & 0x240 == 0x040: Stack Underflow
769 * swd & 0x240 == 0x240: Stack Overflow
770 * User must clear the SF bit (0x40) if set
772 info.si_code = FPE_FLTINV;
773 } else if (err & 0x004) { /* Divide by Zero */
774 info.si_code = FPE_FLTDIV;
775 } else if (err & 0x008) { /* Overflow */
776 info.si_code = FPE_FLTOVF;
777 } else if (err & 0x012) { /* Denormal, Underflow */
778 info.si_code = FPE_FLTUND;
779 } else if (err & 0x020) { /* Precision */
780 info.si_code = FPE_FLTRES;
783 * If we're using IRQ 13, or supposedly even some trap
784 * X86_TRAP_MF implementations, it's possible
785 * we get a spurious trap, which is not an error.
789 force_sig_info(SIGFPE, &info, task);
792 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
794 enum ctx_state prev_state;
796 prev_state = exception_enter();
797 math_error(regs, error_code, X86_TRAP_MF);
798 exception_exit(prev_state);
802 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
804 enum ctx_state prev_state;
806 prev_state = exception_enter();
807 math_error(regs, error_code, X86_TRAP_XF);
808 exception_exit(prev_state);
812 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
814 conditional_sti(regs);
818 * 'math_state_restore()' saves the current math information in the
819 * old math state array, and gets the new ones from the current task
821 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
822 * Don't touch unless you *really* know how it works.
824 * Must be called with kernel preemption disabled (eg with local
825 * local interrupts as in the case of do_device_not_available).
827 void math_state_restore(void)
829 struct task_struct *tsk = current;
831 if (!tsk_used_math(tsk)) {
834 * does a slab alloc which can sleep
840 do_group_exit(SIGKILL);
846 /* Avoid __kernel_fpu_begin() right after __thread_fpu_begin() */
847 kernel_fpu_disable();
848 __thread_fpu_begin(tsk);
849 if (unlikely(restore_fpu_checking(tsk))) {
850 fpu_reset_state(tsk);
851 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
853 tsk->thread.fpu_counter++;
857 EXPORT_SYMBOL_GPL(math_state_restore);
860 do_device_not_available(struct pt_regs *regs, long error_code)
862 enum ctx_state prev_state;
864 prev_state = exception_enter();
865 BUG_ON(use_eager_fpu());
867 #ifdef CONFIG_MATH_EMULATION
868 if (read_cr0() & X86_CR0_EM) {
869 struct math_emu_info info = { };
871 conditional_sti(regs);
875 exception_exit(prev_state);
879 math_state_restore(); /* interrupts still off */
881 conditional_sti(regs);
883 exception_exit(prev_state);
885 NOKPROBE_SYMBOL(do_device_not_available);
888 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
891 enum ctx_state prev_state;
893 prev_state = exception_enter();
896 info.si_signo = SIGILL;
898 info.si_code = ILL_BADSTK;
900 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
901 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
902 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
905 exception_exit(prev_state);
909 /* Set of traps needed for early debugging. */
910 void __init early_trap_init(void)
913 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
914 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
915 * CPU runs at ring 0 so it is impossible to hit an invalid
916 * stack. Using the original stack works well enough at this
917 * early stage. DEBUG_STACK will be equipped after cpu_init() in
920 * We don't need to set trace_idt_table like set_intr_gate(),
921 * since we don't have trace_debug and it will be reset to
922 * 'debug' in trap_init() by set_intr_gate_ist().
924 set_intr_gate_notrace(X86_TRAP_DB, debug);
925 /* int3 can be called from all */
926 set_system_intr_gate(X86_TRAP_BP, &int3);
928 set_intr_gate(X86_TRAP_PF, page_fault);
930 load_idt(&idt_descr);
933 void __init early_trap_pf_init(void)
936 set_intr_gate(X86_TRAP_PF, page_fault);
940 void __init trap_init(void)
945 void __iomem *p = early_ioremap(0x0FFFD9, 4);
947 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
952 set_intr_gate(X86_TRAP_DE, divide_error);
953 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
954 /* int4 can be called from all */
955 set_system_intr_gate(X86_TRAP_OF, &overflow);
956 set_intr_gate(X86_TRAP_BR, bounds);
957 set_intr_gate(X86_TRAP_UD, invalid_op);
958 set_intr_gate(X86_TRAP_NM, device_not_available);
960 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
962 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
964 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
965 set_intr_gate(X86_TRAP_TS, invalid_TSS);
966 set_intr_gate(X86_TRAP_NP, segment_not_present);
967 set_intr_gate(X86_TRAP_SS, stack_segment);
968 set_intr_gate(X86_TRAP_GP, general_protection);
969 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
970 set_intr_gate(X86_TRAP_MF, coprocessor_error);
971 set_intr_gate(X86_TRAP_AC, alignment_check);
972 #ifdef CONFIG_X86_MCE
973 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
975 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
977 /* Reserve all the builtin and the syscall vector: */
978 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
979 set_bit(i, used_vectors);
981 #ifdef CONFIG_IA32_EMULATION
982 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);
983 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
987 set_system_trap_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);
988 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
992 * Set the IDT descriptor to a fixed read-only location, so that the
993 * "sidt" instruction will not leak the location of the kernel, and
994 * to defend the IDT against arbitrary memory write vulnerabilities.
995 * It will be reloaded in cpu_init() */
996 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
997 idt_descr.address = fix_to_virt(FIX_RO_IDT);
1000 * Should be a barrier for any external CPU state:
1005 * X86_TRAP_DB and X86_TRAP_BP have been set
1006 * in early_trap_init(). However, ITS works only after
1007 * cpu_init() loads TSS. See comments in early_trap_init().
1009 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
1010 /* int3 can be called from all */
1011 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
1013 x86_init.irqs.trap_init();
1015 #ifdef CONFIG_X86_64
1016 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
1017 set_nmi_gate(X86_TRAP_DB, &debug);
1018 set_nmi_gate(X86_TRAP_BP, &int3);