2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
22 # include <asm/sigcontext32.h>
23 # include <asm/user32.h>
25 # define save_i387_xstate_ia32 save_i387_xstate
26 # define restore_i387_xstate_ia32 restore_i387_xstate
27 # define _fpstate_ia32 _fpstate
28 # define _xstate_ia32 _xstate
29 # define sig_xstate_ia32_size sig_xstate_size
30 # define fx_sw_reserved_ia32 fx_sw_reserved
31 # define user_i387_ia32_struct user_i387_struct
32 # define user32_fxsr_struct user_fxsr_struct
35 #ifdef CONFIG_MATH_EMULATION
36 # define HAVE_HWFP (boot_cpu_data.hard_math)
41 static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
42 unsigned int xstate_size;
43 EXPORT_SYMBOL_GPL(xstate_size);
44 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
45 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
47 void __cpuinit mxcsr_feature_mask_init(void)
49 unsigned long mask = 0;
53 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
54 asm volatile("fxsave %0" : : "m" (fx_scratch));
55 mask = fx_scratch.mxcsr_mask;
59 mxcsr_feature_mask &= mask;
63 static void __cpuinit init_thread_xstate(void)
66 * Note that xstate_size might be overwriten later during
71 xstate_size = sizeof(struct i387_soft_struct);
76 xstate_size = sizeof(struct i387_fxsave_struct);
79 xstate_size = sizeof(struct i387_fsave_struct);
85 * Called at bootup to set up the initial FPU state that is later cloned
89 void __cpuinit fpu_init(void)
91 unsigned long oldcr0 = read_cr0();
93 set_in_cr4(X86_CR4_OSFXSR);
94 set_in_cr4(X86_CR4_OSXMMEXCPT);
96 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
98 if (!smp_processor_id())
101 mxcsr_feature_mask_init();
102 /* clean state in init */
103 current_thread_info()->status = 0;
107 #else /* CONFIG_X86_64 */
109 void __cpuinit fpu_init(void)
111 if (!smp_processor_id())
112 init_thread_xstate();
115 #endif /* CONFIG_X86_32 */
117 void fpu_finit(struct fpu *fpu)
121 finit_soft_fpu(&fpu->state->soft);
127 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
129 memset(fx, 0, xstate_size);
132 fx->mxcsr = MXCSR_DEFAULT;
134 struct i387_fsave_struct *fp = &fpu->state->fsave;
135 memset(fp, 0, xstate_size);
136 fp->cwd = 0xffff037fu;
137 fp->swd = 0xffff0000u;
138 fp->twd = 0xffffffffu;
139 fp->fos = 0xffff0000u;
142 EXPORT_SYMBOL_GPL(fpu_finit);
145 * The _current_ task is using the FPU for the first time
146 * so initialize it and set the mxcsr to its default
147 * value at reset if we support XMM instructions and then
148 * remeber the current task has used the FPU.
150 int init_fpu(struct task_struct *tsk)
154 if (tsk_used_math(tsk)) {
155 if (HAVE_HWFP && tsk == current)
161 * Memory allocation at the first usage of the FPU and other state.
163 ret = fpu_alloc(&tsk->thread.fpu);
167 fpu_finit(&tsk->thread.fpu);
169 set_stopped_child_used_math(tsk);
174 * The xstateregs_active() routine is the same as the fpregs_active() routine,
175 * as the "regset->n" for the xstate regset will be updated based on the feature
176 * capabilites supported by the xsave.
178 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
180 return tsk_used_math(target) ? regset->n : 0;
183 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
185 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
188 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
189 unsigned int pos, unsigned int count,
190 void *kbuf, void __user *ubuf)
197 ret = init_fpu(target);
201 sanitize_i387_state(target);
203 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
204 &target->thread.fpu.state->fxsave, 0, -1);
207 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
208 unsigned int pos, unsigned int count,
209 const void *kbuf, const void __user *ubuf)
216 ret = init_fpu(target);
220 sanitize_i387_state(target);
222 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
223 &target->thread.fpu.state->fxsave, 0, -1);
226 * mxcsr reserved bits must be masked to zero for security reasons.
228 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
231 * update the header bits in the xsave header, indicating the
232 * presence of FP and SSE state.
235 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
240 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
241 unsigned int pos, unsigned int count,
242 void *kbuf, void __user *ubuf)
249 ret = init_fpu(target);
254 * Copy the 48bytes defined by the software first into the xstate
255 * memory layout in the thread struct, so that we can copy the entire
256 * xstateregs to the user using one user_regset_copyout().
258 memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
259 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
262 * Copy the xstate memory layout.
264 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
265 &target->thread.fpu.state->xsave, 0, -1);
269 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
270 unsigned int pos, unsigned int count,
271 const void *kbuf, const void __user *ubuf)
274 struct xsave_hdr_struct *xsave_hdr;
279 ret = init_fpu(target);
283 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
284 &target->thread.fpu.state->xsave, 0, -1);
287 * mxcsr reserved bits must be masked to zero for security reasons.
289 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
291 xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
293 xsave_hdr->xstate_bv &= pcntxt_mask;
295 * These bits must be zero.
297 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
302 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
305 * FPU tag word conversions.
308 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
310 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
312 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
314 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
315 /* and move the valid bits to the lower byte. */
316 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
317 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
318 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
323 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
324 #define FP_EXP_TAG_VALID 0
325 #define FP_EXP_TAG_ZERO 1
326 #define FP_EXP_TAG_SPECIAL 2
327 #define FP_EXP_TAG_EMPTY 3
329 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
332 u32 tos = (fxsave->swd >> 11) & 7;
333 u32 twd = (unsigned long) fxsave->twd;
335 u32 ret = 0xffff0000u;
338 for (i = 0; i < 8; i++, twd >>= 1) {
340 st = FPREG_ADDR(fxsave, (i - tos) & 7);
342 switch (st->exponent & 0x7fff) {
344 tag = FP_EXP_TAG_SPECIAL;
347 if (!st->significand[0] &&
348 !st->significand[1] &&
349 !st->significand[2] &&
351 tag = FP_EXP_TAG_ZERO;
353 tag = FP_EXP_TAG_SPECIAL;
356 if (st->significand[3] & 0x8000)
357 tag = FP_EXP_TAG_VALID;
359 tag = FP_EXP_TAG_SPECIAL;
363 tag = FP_EXP_TAG_EMPTY;
365 ret |= tag << (2 * i);
371 * FXSR floating point environment conversions.
375 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
377 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
378 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
379 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
382 env->cwd = fxsave->cwd | 0xffff0000u;
383 env->swd = fxsave->swd | 0xffff0000u;
384 env->twd = twd_fxsr_to_i387(fxsave);
387 env->fip = fxsave->rip;
388 env->foo = fxsave->rdp;
389 if (tsk == current) {
391 * should be actually ds/cs at fpu exception time, but
392 * that information is not available in 64bit mode.
394 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
395 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
397 struct pt_regs *regs = task_pt_regs(tsk);
399 env->fos = 0xffff0000 | tsk->thread.ds;
403 env->fip = fxsave->fip;
404 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
405 env->foo = fxsave->foo;
406 env->fos = fxsave->fos;
409 for (i = 0; i < 8; ++i)
410 memcpy(&to[i], &from[i], sizeof(to[0]));
413 static void convert_to_fxsr(struct task_struct *tsk,
414 const struct user_i387_ia32_struct *env)
417 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
418 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
419 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
422 fxsave->cwd = env->cwd;
423 fxsave->swd = env->swd;
424 fxsave->twd = twd_i387_to_fxsr(env->twd);
425 fxsave->fop = (u16) ((u32) env->fcs >> 16);
427 fxsave->rip = env->fip;
428 fxsave->rdp = env->foo;
429 /* cs and ds ignored */
431 fxsave->fip = env->fip;
432 fxsave->fcs = (env->fcs & 0xffff);
433 fxsave->foo = env->foo;
434 fxsave->fos = env->fos;
437 for (i = 0; i < 8; ++i)
438 memcpy(&to[i], &from[i], sizeof(from[0]));
441 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
442 unsigned int pos, unsigned int count,
443 void *kbuf, void __user *ubuf)
445 struct user_i387_ia32_struct env;
448 ret = init_fpu(target);
453 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
456 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
457 &target->thread.fpu.state->fsave, 0,
461 sanitize_i387_state(target);
463 if (kbuf && pos == 0 && count == sizeof(env)) {
464 convert_from_fxsr(kbuf, target);
468 convert_from_fxsr(&env, target);
470 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
473 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
474 unsigned int pos, unsigned int count,
475 const void *kbuf, const void __user *ubuf)
477 struct user_i387_ia32_struct env;
480 ret = init_fpu(target);
484 sanitize_i387_state(target);
487 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
490 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
491 &target->thread.fpu.state->fsave, 0, -1);
494 if (pos > 0 || count < sizeof(env))
495 convert_from_fxsr(&env, target);
497 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
499 convert_to_fxsr(target, &env);
502 * update the header bit in the xsave header, indicating the
506 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
511 * Signal frame handlers.
514 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
516 struct task_struct *tsk = current;
517 struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
519 fp->status = fp->swd;
520 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
525 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
527 struct task_struct *tsk = current;
528 struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
529 struct user_i387_ia32_struct env;
532 convert_from_fxsr(&env, tsk);
533 if (__copy_to_user(buf, &env, sizeof(env)))
536 err |= __put_user(fx->swd, &buf->status);
537 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
541 if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
546 static int save_i387_xsave(void __user *buf)
548 struct task_struct *tsk = current;
549 struct _fpstate_ia32 __user *fx = buf;
553 sanitize_i387_state(tsk);
556 * For legacy compatible, we always set FP/SSE bits in the bit
557 * vector while saving the state to the user context.
558 * This will enable us capturing any changes(during sigreturn) to
559 * the FP/SSE bits by the legacy applications which don't touch
560 * xstate_bv in the xsave header.
562 * xsave aware applications can change the xstate_bv in the xsave
563 * header as well as change any contents in the memory layout.
564 * xrestore as part of sigreturn will capture all the changes.
566 tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
568 if (save_i387_fxsave(fx) < 0)
571 err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
572 sizeof(struct _fpx_sw_bytes));
573 err |= __put_user(FP_XSTATE_MAGIC2,
574 (__u32 __user *) (buf + sig_xstate_ia32_size
575 - FP_XSTATE_MAGIC2_SIZE));
582 int save_i387_xstate_ia32(void __user *buf)
584 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
585 struct task_struct *tsk = current;
590 if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
593 * This will cause a "finit" to be triggered by the next
594 * attempted FPU operation by the 'current' process.
599 return fpregs_soft_get(current, NULL,
600 0, sizeof(struct user_i387_ia32_struct),
607 return save_i387_xsave(fp);
609 return save_i387_fxsave(fp);
611 return save_i387_fsave(fp);
614 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
616 struct task_struct *tsk = current;
618 return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
619 sizeof(struct i387_fsave_struct));
622 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
625 struct task_struct *tsk = current;
626 struct user_i387_ia32_struct env;
629 err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
631 /* mxcsr reserved bits must be masked to zero for security reasons */
632 tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
633 if (err || __copy_from_user(&env, buf, sizeof(env)))
635 convert_to_fxsr(tsk, &env);
640 static int restore_i387_xsave(void __user *buf)
642 struct _fpx_sw_bytes fx_sw_user;
643 struct _fpstate_ia32 __user *fx_user =
644 ((struct _fpstate_ia32 __user *) buf);
645 struct i387_fxsave_struct __user *fx =
646 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
647 struct xsave_hdr_struct *xsave_hdr =
648 ¤t->thread.fpu.state->xsave.xsave_hdr;
652 if (check_for_xstate(fx, buf, &fx_sw_user))
655 mask = fx_sw_user.xstate_bv;
657 err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
659 xsave_hdr->xstate_bv &= pcntxt_mask;
661 * These bits must be zero.
663 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
666 * Init the state that is not present in the memory layout
667 * and enabled by the OS.
669 mask = ~(pcntxt_mask & ~mask);
670 xsave_hdr->xstate_bv &= mask;
675 * Couldn't find the extended state information in the memory
676 * layout. Restore the FP/SSE and init the other extended state
679 xsave_hdr->xstate_bv = XSTATE_FPSSE;
680 return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
683 int restore_i387_xstate_ia32(void __user *buf)
686 struct task_struct *tsk = current;
687 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
700 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
711 err = restore_i387_xsave(buf);
712 else if (cpu_has_fxsr)
713 err = restore_i387_fxsave(fp, sizeof(struct
714 i387_fxsave_struct));
716 err = restore_i387_fsave(fp);
718 err = fpregs_soft_set(current, NULL,
719 0, sizeof(struct user_i387_ia32_struct),
728 * FPU state for core dumps.
729 * This is only used for a.out dumps now.
730 * It is declared generically using elf_fpregset_t (which is
731 * struct user_i387_struct) but is in fact only used for 32-bit
732 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
734 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
736 struct task_struct *tsk = current;
739 fpvalid = !!used_math();
741 fpvalid = !fpregs_get(tsk, NULL,
742 0, sizeof(struct user_i387_ia32_struct),
747 EXPORT_SYMBOL(dump_fpu);
749 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */