2 * (c) 2003-2010 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
7 * Support : mark.langsdorf@amd.com
9 * Based on the powernow-k7.c module written by Dave Jones.
10 * (C) 2003 Dave Jones on behalf of SuSE Labs
11 * (C) 2004 Dominik Brodowski <linux@brodo.de>
12 * (C) 2004 Pavel Machek <pavel@suse.cz>
13 * Licensed under the terms of the GNU GPL License version 2.
14 * Based upon datasheets & sample CPUs kindly provided by AMD.
16 * Valuable input gratefully received from Dave Jones, Pavel Machek,
17 * Dominik Brodowski, Jacob Shin, and others.
18 * Originally developed by Paul Devriendt.
19 * Processor information obtained from Chapter 9 (Power and Thermal Management)
20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
21 * Opteron Processors" available for download from www.amd.com
23 * Tables for specific CPUs can be inferred from
24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
27 #include <linux/kernel.h>
28 #include <linux/smp.h>
29 #include <linux/module.h>
30 #include <linux/init.h>
31 #include <linux/cpufreq.h>
32 #include <linux/slab.h>
33 #include <linux/string.h>
34 #include <linux/cpumask.h>
35 #include <linux/sched.h> /* for current / set_cpus_allowed() */
37 #include <linux/delay.h>
41 #include <linux/acpi.h>
42 #include <linux/mutex.h>
43 #include <acpi/processor.h>
45 #define PFX "powernow-k8: "
46 #define VERSION "version 2.20.00"
47 #include "powernow-k8.h"
49 /* serialize freq changes */
50 static DEFINE_MUTEX(fidvid_mutex);
52 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
54 static int cpu_family = CPU_OPTERON;
56 /* core performance boost */
57 static bool cpb_capable, cpb_enabled;
58 static struct msr __percpu *msrs;
61 static inline const struct cpumask *cpu_core_mask(int cpu)
67 /* Return a frequency in MHz, given an input fid */
68 static u32 find_freq_from_fid(u32 fid)
70 return 800 + (fid * 100);
73 /* Return a frequency in KHz, given an input fid */
74 static u32 find_khz_freq_from_fid(u32 fid)
76 return 1000 * find_freq_from_fid(fid);
79 static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
82 return data[pstate].frequency;
85 /* Return the vco fid for an input fid
87 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
88 * only from corresponding high fids. This returns "high" fid corresponding to
91 static u32 convert_fid_to_vco_fid(u32 fid)
93 if (fid < HI_FID_TABLE_BOTTOM)
100 * Return 1 if the pending bit is set. Unless we just instructed the processor
101 * to transition to a new state, seeing this bit set is really bad news.
103 static int pending_bit_stuck(void)
107 if (cpu_family == CPU_HW_PSTATE)
110 rdmsr(MSR_FIDVID_STATUS, lo, hi);
111 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
115 * Update the global current fid / vid values from the status msr.
116 * Returns 1 on error.
118 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
123 if (cpu_family == CPU_HW_PSTATE) {
124 rdmsr(MSR_PSTATE_STATUS, lo, hi);
125 i = lo & HW_PSTATE_MASK;
126 data->currpstate = i;
129 * a workaround for family 11h erratum 311 might cause
130 * an "out-of-range Pstate if the core is in Pstate-0
132 if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
133 data->currpstate = HW_PSTATE_0;
139 dprintk("detected change pending stuck\n");
142 rdmsr(MSR_FIDVID_STATUS, lo, hi);
143 } while (lo & MSR_S_LO_CHANGE_PENDING);
145 data->currvid = hi & MSR_S_HI_CURRENT_VID;
146 data->currfid = lo & MSR_S_LO_CURRENT_FID;
151 /* the isochronous relief time */
152 static void count_off_irt(struct powernow_k8_data *data)
154 udelay((1 << data->irt) * 10);
158 /* the voltage stabilization time */
159 static void count_off_vst(struct powernow_k8_data *data)
161 udelay(data->vstable * VST_UNITS_20US);
165 /* need to init the control msr to a safe value (for each cpu) */
166 static void fidvid_msr_init(void)
171 rdmsr(MSR_FIDVID_STATUS, lo, hi);
172 vid = hi & MSR_S_HI_CURRENT_VID;
173 fid = lo & MSR_S_LO_CURRENT_FID;
174 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
175 hi = MSR_C_HI_STP_GNT_BENIGN;
176 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
177 wrmsr(MSR_FIDVID_CTL, lo, hi);
180 /* write the new fid value along with the other control fields to the msr */
181 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
184 u32 savevid = data->currvid;
187 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
188 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
193 lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
194 lo |= MSR_C_LO_INIT_FID_VID;
196 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
197 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
200 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
203 "Hardware error - pending bit very stuck - "
204 "no further pstate changes possible\n");
207 } while (query_current_values_with_pending_wait(data));
211 if (savevid != data->currvid) {
213 "vid change on fid trans, old 0x%x, new 0x%x\n",
214 savevid, data->currvid);
218 if (fid != data->currfid) {
220 "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
228 /* Write a new vid to the hardware */
229 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
232 u32 savefid = data->currfid;
235 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
236 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
241 lo |= (vid << MSR_C_LO_VID_SHIFT);
242 lo |= MSR_C_LO_INIT_FID_VID;
244 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
245 vid, lo, STOP_GRANT_5NS);
248 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
250 printk(KERN_ERR PFX "internal error - pending bit "
251 "very stuck - no further pstate "
252 "changes possible\n");
255 } while (query_current_values_with_pending_wait(data));
257 if (savefid != data->currfid) {
258 printk(KERN_ERR PFX "fid changed on vid trans, old "
260 savefid, data->currfid);
264 if (vid != data->currvid) {
265 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
275 * Reduce the vid by the max of step or reqvid.
276 * Decreasing vid codes represent increasing voltages:
277 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
279 static int decrease_vid_code_by_step(struct powernow_k8_data *data,
280 u32 reqvid, u32 step)
282 if ((data->currvid - reqvid) > step)
283 reqvid = data->currvid - step;
285 if (write_new_vid(data, reqvid))
293 /* Change hardware pstate by single MSR write */
294 static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
296 wrmsr(MSR_PSTATE_CTRL, pstate, 0);
297 data->currpstate = pstate;
301 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
302 static int transition_fid_vid(struct powernow_k8_data *data,
303 u32 reqfid, u32 reqvid)
305 if (core_voltage_pre_transition(data, reqvid, reqfid))
308 if (core_frequency_transition(data, reqfid))
311 if (core_voltage_post_transition(data, reqvid))
314 if (query_current_values_with_pending_wait(data))
317 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
318 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
321 reqfid, reqvid, data->currfid, data->currvid);
325 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
326 smp_processor_id(), data->currfid, data->currvid);
331 /* Phase 1 - core voltage transition ... setup voltage */
332 static int core_voltage_pre_transition(struct powernow_k8_data *data,
333 u32 reqvid, u32 reqfid)
335 u32 rvosteps = data->rvo;
336 u32 savefid = data->currfid;
337 u32 maxvid, lo, rvomult = 1;
339 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
340 "reqvid 0x%x, rvo 0x%x\n",
342 data->currfid, data->currvid, reqvid, data->rvo);
344 if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
347 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
348 maxvid = 0x1f & (maxvid >> 16);
349 dprintk("ph1 maxvid=0x%x\n", maxvid);
350 if (reqvid < maxvid) /* lower numbers are higher voltages */
353 while (data->currvid > reqvid) {
354 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
355 data->currvid, reqvid);
356 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
360 while ((rvosteps > 0) &&
361 ((rvomult * data->rvo + data->currvid) > reqvid)) {
362 if (data->currvid == maxvid) {
365 dprintk("ph1: changing vid for rvo, req 0x%x\n",
367 if (decrease_vid_code_by_step(data, data->currvid-1, 1))
373 if (query_current_values_with_pending_wait(data))
376 if (savefid != data->currfid) {
377 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
382 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
383 data->currfid, data->currvid);
388 /* Phase 2 - core frequency transition */
389 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
391 u32 vcoreqfid, vcocurrfid, vcofiddiff;
392 u32 fid_interval, savevid = data->currvid;
394 if (data->currfid == reqfid) {
395 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
400 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
403 data->currfid, data->currvid, reqfid);
405 vcoreqfid = convert_fid_to_vco_fid(reqfid);
406 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
407 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
408 : vcoreqfid - vcocurrfid;
410 if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
413 while (vcofiddiff > 2) {
414 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
416 if (reqfid > data->currfid) {
417 if (data->currfid > LO_FID_TABLE_TOP) {
418 if (write_new_fid(data,
419 data->currfid + fid_interval))
424 2 + convert_fid_to_vco_fid(data->currfid)))
428 if (write_new_fid(data, data->currfid - fid_interval))
432 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
433 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
434 : vcoreqfid - vcocurrfid;
437 if (write_new_fid(data, reqfid))
440 if (query_current_values_with_pending_wait(data))
443 if (data->currfid != reqfid) {
445 "ph2: mismatch, failed fid transition, "
446 "curr 0x%x, req 0x%x\n",
447 data->currfid, reqfid);
451 if (savevid != data->currvid) {
452 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
453 savevid, data->currvid);
457 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
458 data->currfid, data->currvid);
463 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
464 static int core_voltage_post_transition(struct powernow_k8_data *data,
467 u32 savefid = data->currfid;
468 u32 savereqvid = reqvid;
470 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
472 data->currfid, data->currvid);
474 if (reqvid != data->currvid) {
475 if (write_new_vid(data, reqvid))
478 if (savefid != data->currfid) {
480 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
481 savefid, data->currfid);
485 if (data->currvid != reqvid) {
487 "ph3: failed vid transition\n, "
488 "req 0x%x, curr 0x%x",
489 reqvid, data->currvid);
494 if (query_current_values_with_pending_wait(data))
497 if (savereqvid != data->currvid) {
498 dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
502 if (savefid != data->currfid) {
503 dprintk("ph3 failed, currfid changed 0x%x\n",
508 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
509 data->currfid, data->currvid);
514 static void check_supported_cpu(void *_rc)
516 u32 eax, ebx, ecx, edx;
521 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
524 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
525 if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
526 ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
529 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
530 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
531 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
533 "Processor cpuid %x not supported\n", eax);
537 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
538 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
540 "No frequency change capabilities detected\n");
544 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
545 if ((edx & P_STATE_TRANSITION_CAPABLE)
546 != P_STATE_TRANSITION_CAPABLE) {
548 "Power state transitions not supported\n");
551 } else { /* must be a HW Pstate capable processor */
552 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
553 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
554 cpu_family = CPU_HW_PSTATE;
562 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
568 for (j = 0; j < data->numps; j++) {
569 if (pst[j].vid > LEAST_VID) {
570 printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
574 if (pst[j].vid < data->rvo) {
576 printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
580 if (pst[j].vid < maxvid + data->rvo) {
581 /* vid + rvo >= maxvid */
582 printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
586 if (pst[j].fid > MAX_FID) {
587 printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
591 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
592 /* Only first fid is allowed to be in "low" range */
593 printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
594 "0x%x\n", j, pst[j].fid);
597 if (pst[j].fid < lastfid)
598 lastfid = pst[j].fid;
601 printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
604 if (lastfid > LO_FID_TABLE_TOP)
605 printk(KERN_INFO FW_BUG PFX
606 "first fid not from lo freq table\n");
611 static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
614 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
617 static void print_basics(struct powernow_k8_data *data)
620 for (j = 0; j < data->numps; j++) {
621 if (data->powernow_table[j].frequency !=
622 CPUFREQ_ENTRY_INVALID) {
623 if (cpu_family == CPU_HW_PSTATE) {
625 " %d : pstate %d (%d MHz)\n", j,
626 data->powernow_table[j].index,
627 data->powernow_table[j].frequency/1000);
630 " %d : fid 0x%x (%d MHz), vid 0x%x\n",
632 data->powernow_table[j].index & 0xff,
633 data->powernow_table[j].frequency/1000,
634 data->powernow_table[j].index >> 8);
639 printk(KERN_INFO PFX "Only %d pstates on battery\n",
643 static u32 freq_from_fid_did(u32 fid, u32 did)
647 if (boot_cpu_data.x86 == 0x10)
648 mhz = (100 * (fid + 0x10)) >> did;
649 else if (boot_cpu_data.x86 == 0x11)
650 mhz = (100 * (fid + 8)) >> did;
657 static int fill_powernow_table(struct powernow_k8_data *data,
658 struct pst_s *pst, u8 maxvid)
660 struct cpufreq_frequency_table *powernow_table;
664 /* use ACPI support to get full speed on mains power */
665 printk(KERN_WARNING PFX
666 "Only %d pstates usable (use ACPI driver for full "
667 "range\n", data->batps);
668 data->numps = data->batps;
671 for (j = 1; j < data->numps; j++) {
672 if (pst[j-1].fid >= pst[j].fid) {
673 printk(KERN_ERR PFX "PST out of sequence\n");
678 if (data->numps < 2) {
679 printk(KERN_ERR PFX "no p states to transition\n");
683 if (check_pst_table(data, pst, maxvid))
686 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
687 * (data->numps + 1)), GFP_KERNEL);
688 if (!powernow_table) {
689 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
693 for (j = 0; j < data->numps; j++) {
695 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
696 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
697 freq = find_khz_freq_from_fid(pst[j].fid);
698 powernow_table[j].frequency = freq;
700 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
701 powernow_table[data->numps].index = 0;
703 if (query_current_values_with_pending_wait(data)) {
704 kfree(powernow_table);
708 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
709 data->powernow_table = powernow_table;
710 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
713 for (j = 0; j < data->numps; j++)
714 if ((pst[j].fid == data->currfid) &&
715 (pst[j].vid == data->currvid))
718 dprintk("currfid/vid do not match PST, ignoring\n");
722 /* Find and validate the PSB/PST table in BIOS. */
723 static int find_psb_table(struct powernow_k8_data *data)
732 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
733 /* Scan BIOS looking for the signature. */
734 /* It can not be at ffff0 - it is too big. */
736 psb = phys_to_virt(i);
737 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
740 dprintk("found PSB header at 0x%p\n", psb);
742 dprintk("table vers: 0x%x\n", psb->tableversion);
743 if (psb->tableversion != PSB_VERSION_1_4) {
744 printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
748 dprintk("flags: 0x%x\n", psb->flags1);
750 printk(KERN_ERR FW_BUG PFX "unknown flags\n");
754 data->vstable = psb->vstable;
755 dprintk("voltage stabilization time: %d(*20us)\n",
758 dprintk("flags2: 0x%x\n", psb->flags2);
759 data->rvo = psb->flags2 & 3;
760 data->irt = ((psb->flags2) >> 2) & 3;
761 mvs = ((psb->flags2) >> 4) & 3;
762 data->vidmvs = 1 << mvs;
763 data->batps = ((psb->flags2) >> 6) & 3;
765 dprintk("ramp voltage offset: %d\n", data->rvo);
766 dprintk("isochronous relief time: %d\n", data->irt);
767 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
769 dprintk("numpst: 0x%x\n", psb->num_tables);
770 cpst = psb->num_tables;
771 if ((psb->cpuid == 0x00000fc0) ||
772 (psb->cpuid == 0x00000fe0)) {
773 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
774 if ((thiscpuid == 0x00000fc0) ||
775 (thiscpuid == 0x00000fe0))
779 printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
783 data->plllock = psb->plllocktime;
784 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
785 dprintk("maxfid: 0x%x\n", psb->maxfid);
786 dprintk("maxvid: 0x%x\n", psb->maxvid);
787 maxvid = psb->maxvid;
789 data->numps = psb->numps;
790 dprintk("numpstates: 0x%x\n", data->numps);
791 return fill_powernow_table(data,
792 (struct pst_s *)(psb+1), maxvid);
795 * If you see this message, complain to BIOS manufacturer. If
796 * he tells you "we do not support Linux" or some similar
797 * nonsense, remember that Windows 2000 uses the same legacy
798 * mechanism that the old Linux PSB driver uses. Tell them it
799 * is broken with Windows 2000.
801 * The reference to the AMD documentation is chapter 9 in the
802 * BIOS and Kernel Developer's Guide, which is available on
805 printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
809 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
814 if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
817 control = data->acpi_data.states[index].control;
818 data->irt = (control >> IRT_SHIFT) & IRT_MASK;
819 data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
820 data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
821 data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
822 data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
823 data->vstable = (control >> VST_SHIFT) & VST_MASK;
826 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
828 struct cpufreq_frequency_table *powernow_table;
829 int ret_val = -ENODEV;
832 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
833 dprintk("register performance failed: bad ACPI data\n");
837 /* verify the data contained in the ACPI structures */
838 if (data->acpi_data.state_count <= 1) {
839 dprintk("No ACPI P-States\n");
843 control = data->acpi_data.control_register.space_id;
844 status = data->acpi_data.status_register.space_id;
846 if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
847 (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
848 dprintk("Invalid control/status registers (%x - %x)\n",
853 /* fill in data->powernow_table */
854 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
855 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
856 if (!powernow_table) {
857 dprintk("powernow_table memory alloc failure\n");
862 data->numps = data->acpi_data.state_count;
863 powernow_k8_acpi_pst_values(data, 0);
865 if (cpu_family == CPU_HW_PSTATE)
866 ret_val = fill_powernow_table_pstate(data, powernow_table);
868 ret_val = fill_powernow_table_fidvid(data, powernow_table);
872 powernow_table[data->acpi_data.state_count].frequency =
874 powernow_table[data->acpi_data.state_count].index = 0;
875 data->powernow_table = powernow_table;
877 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
880 /* notify BIOS that we exist */
881 acpi_processor_notify_smm(THIS_MODULE);
883 if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
885 "unable to alloc powernow_k8_data cpumask\n");
893 kfree(powernow_table);
896 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
898 /* data->acpi_data.state_count informs us at ->exit()
899 * whether ACPI was used */
900 data->acpi_data.state_count = 0;
905 static int fill_powernow_table_pstate(struct powernow_k8_data *data,
906 struct cpufreq_frequency_table *powernow_table)
910 rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
911 data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
913 for (i = 0; i < data->acpi_data.state_count; i++) {
916 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
917 if (index > data->max_hw_pstate) {
918 printk(KERN_ERR PFX "invalid pstate %d - "
919 "bad value %d.\n", i, index);
920 printk(KERN_ERR PFX "Please report to BIOS "
922 invalidate_entry(powernow_table, i);
925 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
926 if (!(hi & HW_PSTATE_VALID_MASK)) {
927 dprintk("invalid pstate %d, ignoring\n", index);
928 invalidate_entry(powernow_table, i);
932 powernow_table[i].index = index;
934 /* Frequency may be rounded for these */
935 if (boot_cpu_data.x86 == 0x10 || boot_cpu_data.x86 == 0x11) {
936 powernow_table[i].frequency =
937 freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
939 powernow_table[i].frequency =
940 data->acpi_data.states[i].core_frequency * 1000;
945 static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
946 struct cpufreq_frequency_table *powernow_table)
950 for (i = 0; i < data->acpi_data.state_count; i++) {
957 status = data->acpi_data.states[i].status;
958 fid = status & EXT_FID_MASK;
959 vid = (status >> VID_SHIFT) & EXT_VID_MASK;
961 control = data->acpi_data.states[i].control;
962 fid = control & FID_MASK;
963 vid = (control >> VID_SHIFT) & VID_MASK;
966 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
968 index = fid | (vid<<8);
969 powernow_table[i].index = index;
971 freq = find_khz_freq_from_fid(fid);
972 powernow_table[i].frequency = freq;
974 /* verify frequency is OK */
975 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
976 dprintk("invalid freq %u kHz, ignoring\n", freq);
977 invalidate_entry(powernow_table, i);
981 /* verify voltage is OK -
982 * BIOSs are using "off" to indicate invalid */
983 if (vid == VID_OFF) {
984 dprintk("invalid vid %u, ignoring\n", vid);
985 invalidate_entry(powernow_table, i);
989 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
990 printk(KERN_INFO PFX "invalid freq entries "
991 "%u kHz vs. %u kHz\n", freq,
993 (data->acpi_data.states[i].core_frequency
995 invalidate_entry(powernow_table, i);
1002 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
1004 if (data->acpi_data.state_count)
1005 acpi_processor_unregister_performance(&data->acpi_data,
1007 free_cpumask_var(data->acpi_data.shared_cpu_map);
1010 static int get_transition_latency(struct powernow_k8_data *data)
1012 int max_latency = 0;
1014 for (i = 0; i < data->acpi_data.state_count; i++) {
1015 int cur_latency = data->acpi_data.states[i].transition_latency
1016 + data->acpi_data.states[i].bus_master_latency;
1017 if (cur_latency > max_latency)
1018 max_latency = cur_latency;
1020 if (max_latency == 0) {
1022 * Fam 11h always returns 0 as transition latency.
1023 * This is intended and means "very fast". While cpufreq core
1024 * and governors currently can handle that gracefully, better
1025 * set it to 1 to avoid problems in the future.
1026 * For all others it's a BIOS bug.
1028 if (boot_cpu_data.x86 != 0x11)
1029 printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
1033 /* value in usecs, needs to be in nanoseconds */
1034 return 1000 * max_latency;
1037 /* Take a frequency, and issue the fid/vid transition command */
1038 static int transition_frequency_fidvid(struct powernow_k8_data *data,
1044 struct cpufreq_freqs freqs;
1046 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
1048 /* fid/vid correctness check for k8 */
1049 /* fid are the lower 8 bits of the index we stored into
1050 * the cpufreq frequency table in find_psb_table, vid
1051 * are the upper 8 bits.
1053 fid = data->powernow_table[index].index & 0xFF;
1054 vid = (data->powernow_table[index].index & 0xFF00) >> 8;
1056 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
1058 if (query_current_values_with_pending_wait(data))
1061 if ((data->currvid == vid) && (data->currfid == fid)) {
1062 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
1067 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
1068 smp_processor_id(), fid, vid);
1069 freqs.old = find_khz_freq_from_fid(data->currfid);
1070 freqs.new = find_khz_freq_from_fid(fid);
1072 for_each_cpu(i, data->available_cores) {
1074 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1077 res = transition_fid_vid(data, fid, vid);
1078 freqs.new = find_khz_freq_from_fid(data->currfid);
1080 for_each_cpu(i, data->available_cores) {
1082 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1087 /* Take a frequency, and issue the hardware pstate transition command */
1088 static int transition_frequency_pstate(struct powernow_k8_data *data,
1093 struct cpufreq_freqs freqs;
1095 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
1097 /* get MSR index for hardware pstate transition */
1098 pstate = index & HW_PSTATE_MASK;
1099 if (pstate > data->max_hw_pstate)
1101 freqs.old = find_khz_freq_from_pstate(data->powernow_table,
1103 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1105 for_each_cpu(i, data->available_cores) {
1107 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1110 res = transition_pstate(data, pstate);
1111 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1113 for_each_cpu(i, data->available_cores) {
1115 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1120 /* Driver entry point to switch to the target frequency */
1121 static int powernowk8_target(struct cpufreq_policy *pol,
1122 unsigned targfreq, unsigned relation)
1124 cpumask_var_t oldmask;
1125 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1128 unsigned int newstate;
1134 checkfid = data->currfid;
1135 checkvid = data->currvid;
1137 /* only run on specific CPU from here on. */
1138 /* This is poor form: use a workqueue or smp_call_function_single */
1139 if (!alloc_cpumask_var(&oldmask, GFP_KERNEL))
1142 cpumask_copy(oldmask, tsk_cpus_allowed(current));
1143 set_cpus_allowed_ptr(current, cpumask_of(pol->cpu));
1145 if (smp_processor_id() != pol->cpu) {
1146 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
1150 if (pending_bit_stuck()) {
1151 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
1155 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
1156 pol->cpu, targfreq, pol->min, pol->max, relation);
1158 if (query_current_values_with_pending_wait(data))
1161 if (cpu_family != CPU_HW_PSTATE) {
1162 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
1163 data->currfid, data->currvid);
1165 if ((checkvid != data->currvid) ||
1166 (checkfid != data->currfid)) {
1167 printk(KERN_INFO PFX
1168 "error - out of sync, fix 0x%x 0x%x, "
1170 checkfid, data->currfid,
1171 checkvid, data->currvid);
1175 if (cpufreq_frequency_table_target(pol, data->powernow_table,
1176 targfreq, relation, &newstate))
1179 mutex_lock(&fidvid_mutex);
1181 powernow_k8_acpi_pst_values(data, newstate);
1183 if (cpu_family == CPU_HW_PSTATE)
1184 ret = transition_frequency_pstate(data, newstate);
1186 ret = transition_frequency_fidvid(data, newstate);
1188 printk(KERN_ERR PFX "transition frequency failed\n");
1190 mutex_unlock(&fidvid_mutex);
1193 mutex_unlock(&fidvid_mutex);
1195 if (cpu_family == CPU_HW_PSTATE)
1196 pol->cur = find_khz_freq_from_pstate(data->powernow_table,
1199 pol->cur = find_khz_freq_from_fid(data->currfid);
1203 set_cpus_allowed_ptr(current, oldmask);
1204 free_cpumask_var(oldmask);
1208 /* Driver entry point to verify the policy and range of frequencies */
1209 static int powernowk8_verify(struct cpufreq_policy *pol)
1211 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1216 return cpufreq_frequency_table_verify(pol, data->powernow_table);
1219 struct init_on_cpu {
1220 struct powernow_k8_data *data;
1224 static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1226 struct init_on_cpu *init_on_cpu = _init_on_cpu;
1228 if (pending_bit_stuck()) {
1229 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1230 init_on_cpu->rc = -ENODEV;
1234 if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1235 init_on_cpu->rc = -ENODEV;
1239 if (cpu_family == CPU_OPTERON)
1242 init_on_cpu->rc = 0;
1245 /* per CPU init entry point to the driver */
1246 static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1248 static const char ACPI_PSS_BIOS_BUG_MSG[] =
1249 KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
1250 FW_BUG PFX "Try again with latest BIOS.\n";
1251 struct powernow_k8_data *data;
1252 struct init_on_cpu init_on_cpu;
1255 if (!cpu_online(pol->cpu))
1258 smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1262 data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
1264 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1268 data->cpu = pol->cpu;
1269 data->currpstate = HW_PSTATE_INVALID;
1271 if (powernow_k8_cpu_init_acpi(data)) {
1273 * Use the PSB BIOS structure. This is only availabe on
1274 * an UP version, and is deprecated by AMD.
1276 if (num_online_cpus() != 1) {
1277 printk_once(ACPI_PSS_BIOS_BUG_MSG);
1280 if (pol->cpu != 0) {
1281 printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
1282 "CPU other than CPU0. Complain to your BIOS "
1286 rc = find_psb_table(data);
1290 /* Take a crude guess here.
1291 * That guess was in microseconds, so multiply with 1000 */
1292 pol->cpuinfo.transition_latency = (
1293 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1294 ((1 << data->irt) * 30)) * 1000;
1295 } else /* ACPI _PSS objects available */
1296 pol->cpuinfo.transition_latency = get_transition_latency(data);
1298 /* only run on specific CPU from here on */
1299 init_on_cpu.data = data;
1300 smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1302 rc = init_on_cpu.rc;
1304 goto err_out_exit_acpi;
1306 if (cpu_family == CPU_HW_PSTATE)
1307 cpumask_copy(pol->cpus, cpumask_of(pol->cpu));
1309 cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
1310 data->available_cores = pol->cpus;
1312 if (cpu_family == CPU_HW_PSTATE)
1313 pol->cur = find_khz_freq_from_pstate(data->powernow_table,
1316 pol->cur = find_khz_freq_from_fid(data->currfid);
1317 dprintk("policy current frequency %d kHz\n", pol->cur);
1319 /* min/max the cpu is capable of */
1320 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1321 printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
1322 powernow_k8_cpu_exit_acpi(data);
1323 kfree(data->powernow_table);
1328 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1330 if (cpu_family == CPU_HW_PSTATE)
1331 dprintk("cpu_init done, current pstate 0x%x\n",
1334 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1335 data->currfid, data->currvid);
1337 per_cpu(powernow_data, pol->cpu) = data;
1342 powernow_k8_cpu_exit_acpi(data);
1349 static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
1351 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1356 powernow_k8_cpu_exit_acpi(data);
1358 cpufreq_frequency_table_put_attr(pol->cpu);
1360 kfree(data->powernow_table);
1362 per_cpu(powernow_data, pol->cpu) = NULL;
1367 static void query_values_on_cpu(void *_err)
1370 struct powernow_k8_data *data = __get_cpu_var(powernow_data);
1372 *err = query_current_values_with_pending_wait(data);
1375 static unsigned int powernowk8_get(unsigned int cpu)
1377 struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1378 unsigned int khz = 0;
1384 smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1388 if (cpu_family == CPU_HW_PSTATE)
1389 khz = find_khz_freq_from_pstate(data->powernow_table,
1392 khz = find_khz_freq_from_fid(data->currfid);
1399 static void _cpb_toggle_msrs(bool t)
1405 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1407 for_each_cpu(cpu, cpu_online_mask) {
1408 struct msr *reg = per_cpu_ptr(msrs, cpu);
1414 wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1420 * Switch on/off core performance boosting.
1425 static void cpb_toggle(bool t)
1430 if (t && !cpb_enabled) {
1432 _cpb_toggle_msrs(t);
1433 printk(KERN_INFO PFX "Core Boosting enabled.\n");
1434 } else if (!t && cpb_enabled) {
1435 cpb_enabled = false;
1436 _cpb_toggle_msrs(t);
1437 printk(KERN_INFO PFX "Core Boosting disabled.\n");
1441 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
1445 unsigned long val = 0;
1447 ret = strict_strtoul(buf, 10, &val);
1448 if (!ret && (val == 0 || val == 1) && cpb_capable)
1456 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
1458 return sprintf(buf, "%u\n", cpb_enabled);
1461 #define define_one_rw(_name) \
1462 static struct freq_attr _name = \
1463 __ATTR(_name, 0644, show_##_name, store_##_name)
1467 static struct freq_attr *powernow_k8_attr[] = {
1468 &cpufreq_freq_attr_scaling_available_freqs,
1473 static struct cpufreq_driver cpufreq_amd64_driver = {
1474 .verify = powernowk8_verify,
1475 .target = powernowk8_target,
1476 .bios_limit = acpi_processor_get_bios_limit,
1477 .init = powernowk8_cpu_init,
1478 .exit = __devexit_p(powernowk8_cpu_exit),
1479 .get = powernowk8_get,
1480 .name = "powernow-k8",
1481 .owner = THIS_MODULE,
1482 .attr = powernow_k8_attr,
1486 * Clear the boost-disable flag on the CPU_DOWN path so that this cpu
1487 * cannot block the remaining ones from boosting. On the CPU_UP path we
1488 * simply keep the boost-disable flag in sync with the current global
1491 static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action,
1494 unsigned cpu = (long)hcpu;
1498 case CPU_UP_PREPARE:
1499 case CPU_UP_PREPARE_FROZEN:
1502 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
1504 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
1508 case CPU_DOWN_PREPARE:
1509 case CPU_DOWN_PREPARE_FROZEN:
1510 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
1512 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
1522 static struct notifier_block __cpuinitdata cpb_nb = {
1523 .notifier_call = cpb_notify,
1526 /* driver entry point for init */
1527 static int __cpuinit powernowk8_init(void)
1529 unsigned int i, supported_cpus = 0, cpu;
1531 for_each_online_cpu(i) {
1533 smp_call_function_single(i, check_supported_cpu, &rc, 1);
1538 if (supported_cpus != num_online_cpus())
1541 printk(KERN_INFO PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
1542 num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
1544 if (boot_cpu_has(X86_FEATURE_CPB)) {
1548 register_cpu_notifier(&cpb_nb);
1550 msrs = msrs_alloc();
1552 printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
1556 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1558 for_each_cpu(cpu, cpu_online_mask) {
1559 struct msr *reg = per_cpu_ptr(msrs, cpu);
1560 cpb_enabled |= !(!!(reg->l & BIT(25)));
1563 printk(KERN_INFO PFX "Core Performance Boosting: %s.\n",
1564 (cpb_enabled ? "on" : "off"));
1567 return cpufreq_register_driver(&cpufreq_amd64_driver);
1570 /* driver entry point for term */
1571 static void __exit powernowk8_exit(void)
1575 if (boot_cpu_has(X86_FEATURE_CPB)) {
1579 unregister_cpu_notifier(&cpb_nb);
1582 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1585 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
1586 "Mark Langsdorf <mark.langsdorf@amd.com>");
1587 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1588 MODULE_LICENSE("GPL");
1590 late_initcall(powernowk8_init);
1591 module_exit(powernowk8_exit);