2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * SGI UV Broadcast Assist Unit definitions
8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
11 #ifndef _ASM_X86_UV_UV_BAU_H
12 #define _ASM_X86_UV_UV_BAU_H
14 #include <linux/bitmap.h>
18 * Broadcast Assist Unit messaging structures
20 * Selective Broadcast activations are induced by software action
21 * specifying a particular 8-descriptor "set" via a 6-bit index written
23 * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
24 * each 6-bit index value. These descriptor sets are mapped in sequence
25 * starting with set 0 located at the address specified in the
26 * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
27 * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
29 * We will use one set for sending BAU messages from each of the
32 * TLB shootdown will use the first of the 8 descriptors of each set.
33 * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
36 #define MAX_CPUS_PER_UVHUB 64
37 #define MAX_CPUS_PER_SOCKET 32
38 #define UV_ADP_SIZE 64 /* hardware-provided max. */
39 #define UV_CPUS_PER_ACT_STATUS 32 /* hardware-provided max. */
40 #define UV_ITEMS_PER_DESCRIPTOR 8
41 /* the 'throttle' to prevent the hardware stay-busy bug */
42 #define MAX_BAU_CONCURRENT 3
43 #define UV_ACT_STATUS_MASK 0x3
44 #define UV_ACT_STATUS_SIZE 2
45 #define UV_DISTRIBUTION_SIZE 256
46 #define UV_SW_ACK_NPENDING 8
47 #define UV1_NET_ENDPOINT_INTD 0x38
48 #define UV2_NET_ENDPOINT_INTD 0x28
49 #define UV_NET_ENDPOINT_INTD (is_uv1_hub() ? \
50 UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD)
51 #define UV_DESC_BASE_PNODE_SHIFT 49
52 #define UV_PAYLOADQ_PNODE_SHIFT 49
53 #define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
54 #define UV_BAU_BASENAME "sgi_uv/bau_tunables"
55 #define UV_BAU_TUNABLES_DIR "sgi_uv"
56 #define UV_BAU_TUNABLES_FILE "bau_tunables"
57 #define WHITESPACE " \t\n"
58 #define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask))
61 /* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */
63 * UV2: Bit 19 selects between
64 * (0): 10 microsecond timebase and
65 * (1): 80 microseconds
66 * we're using 655us, similar to UV1: 65 units of 10us
68 #define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL)
69 #define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (65*10UL)
71 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD (is_uv1_hub() ? \
72 UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \
73 UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD)
75 #define BAU_MISC_CONTROL_MULT_MASK 3
77 #define UVH_AGING_PRESCALE_SEL 0x000000b000UL
78 /* [30:28] URGENCY_7 an index into a table of times */
79 #define BAU_URGENCY_7_SHIFT 28
80 #define BAU_URGENCY_7_MASK 7
82 #define UVH_TRANSACTION_TIMEOUT 0x000000b200UL
83 /* [45:40] BAU - BAU transaction timeout select - a multiplier */
84 #define BAU_TRANS_SHIFT 40
85 #define BAU_TRANS_MASK 0x3f
88 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
90 #define DESC_STATUS_IDLE 0
91 #define DESC_STATUS_ACTIVE 1
92 #define DESC_STATUS_DESTINATION_TIMEOUT 2
93 #define DESC_STATUS_SOURCE_TIMEOUT 3
95 * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2
96 * values 1 and 5 will not occur
98 #define UV2H_DESC_IDLE 0
99 #define UV2H_DESC_DEST_TIMEOUT 2
100 #define UV2H_DESC_DEST_STRONG_NACK 3
101 #define UV2H_DESC_BUSY 4
102 #define UV2H_DESC_SOURCE_TIMEOUT 6
103 #define UV2H_DESC_DEST_PUT_ERR 7
106 * delay for 'plugged' timeout retries, in microseconds
108 #define PLUGGED_DELAY 10
111 * threshholds at which to use IPI to free resources
113 /* after this # consecutive 'plugged' timeouts, use IPI to release resources */
114 #define PLUGSB4RESET 100
115 /* after this many consecutive timeouts, use IPI to release resources */
116 #define TIMEOUTSB4RESET 1
117 /* at this number uses of IPI to release resources, giveup the request */
118 #define IPI_RESET_LIMIT 1
119 /* after this # consecutive successes, bump up the throttle if it was lowered */
120 #define COMPLETE_THRESHOLD 5
122 #define UV_LB_SUBNODEID 0x10
124 /* these two are the same for UV1 and UV2: */
125 #define UV_SA_SHFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
126 #define UV_SA_MASK UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK
127 /* 4 bits of software ack period */
128 #define UV2_ACK_MASK 0x7UL
129 #define UV2_ACK_UNITS_SHFT 3
130 #define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT
131 #define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT
134 * number of entries in the destination side payload queue
136 #define DEST_Q_SIZE 20
138 * number of destination side software ack resources
140 #define DEST_NUM_RESOURCES 8
142 * completion statuses for sending a TLB flush message
144 #define FLUSH_RETRY_PLUGGED 1
145 #define FLUSH_RETRY_TIMEOUT 2
146 #define FLUSH_GIVEUP 3
147 #define FLUSH_COMPLETE 4
150 * tuning the action when the numalink network is extremely delayed
152 #define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in microseconds */
153 #define CONGESTED_REPS 10 /* long delays averaged over this many broadcasts */
154 #define CONGESTED_PERIOD 30 /* time for the bau to be disabled, in seconds */
157 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
158 * If the 'multilevel' flag in the header portion of the descriptor
159 * has been set to 0, then endpoint multi-unicast mode is selected.
160 * The distribution specification (32 bytes) is interpreted as a 256-bit
161 * distribution vector. Adjacent bits correspond to consecutive even numbered
162 * nodeIDs. The result of adding the index of a given bit to the 15-bit
163 * 'base_dest_nasid' field of the header corresponds to the
164 * destination nodeID associated with that specified bit.
166 struct bau_target_uvhubmask {
167 unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
171 * mask of cpu's on a uvhub
172 * (during initialization we need to check that unsigned long has
173 * enough bits for max. cpu's per uvhub)
175 struct bau_local_cpumask {
180 * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor)
181 * only 12 bytes (96 bits) of the payload area are usable.
182 * An additional 3 bytes (bits 27:4) of the header address are carried
183 * to the next bytes of the destination payload queue.
184 * And an additional 2 bytes of the header Suppl_A field are also
185 * carried to the destination payload queue.
186 * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte)
187 * of the destination payload queue, which is written by the hardware
188 * with the s/w ack resource bit vector.
189 * [ effective message contents (16 bytes (128 bits) maximum), not counting
190 * the s/w ack bit vector ]
194 * The payload is software-defined for INTD transactions
196 struct bau_msg_payload {
197 unsigned long address; /* signifies a page or all TLB's
200 unsigned short sending_cpu; /* filled in by sender */
202 unsigned short acknowledge_count;/* filled in by destination */
204 unsigned int reserved1:32; /* not usable */
209 * Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
210 * see table 4.2.3.0.1 in broacast_assist spec.
212 struct bau_msg_header {
213 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
215 unsigned int base_dest_nasid:15; /* nasid of the */
216 /* bits 20:6 */ /* first bit in uvhub map */
217 unsigned int command:8; /* message type */
219 /* 0x38: SN3net EndPoint Message */
220 unsigned int rsvd_1:3; /* must be zero */
222 /* int will align on 32 bits */
223 unsigned int rsvd_2:9; /* must be zero */
225 /* Suppl_A is 56-41 */
226 unsigned int sequence:16;/* message sequence number */
227 /* bits 56:41 */ /* becomes bytes 16-17 of msg */
228 /* Address field (96:57) is never used as an
229 address (these are address bits 42:3) */
231 unsigned int rsvd_3:1; /* must be zero */
233 /* address bits 27:4 are payload */
234 /* these next 24 (58-81) bits become bytes 12-14 of msg */
236 /* bits 65:58 land in byte 12 */
237 unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */
239 unsigned int msg_type:3; /* software type of the message*/
241 unsigned int canceled:1; /* message canceled, resource to be freed*/
243 unsigned int payload_1a:1;/* not currently used */
245 unsigned int payload_1b:2;/* not currently used */
248 /* bits 73:66 land in byte 13 */
249 unsigned int payload_1ca:6;/* not currently used */
251 unsigned int payload_1c:2;/* not currently used */
254 /* bits 81:74 land in byte 14 */
255 unsigned int payload_1d:6;/* not currently used */
257 unsigned int payload_1e:2;/* not currently used */
260 unsigned int rsvd_4:7; /* must be zero */
262 unsigned int sw_ack_flag:1;/* software acknowledge flag */
264 /* INTD trasactions at destination are to
265 wait for software acknowledge */
266 unsigned int rsvd_5:6; /* must be zero */
268 unsigned int rsvd_6:5; /* must be zero */
270 unsigned int int_both:1;/* if 1, interrupt both sockets on the uvhub */
272 unsigned int fairness:3;/* usually zero */
274 unsigned int multilevel:1; /* multi-level multicast format */
276 /* 0 for TLB: endpoint multi-unicast messages */
277 unsigned int chaining:1;/* next descriptor is part of this activation*/
279 unsigned int rsvd_7:21; /* must be zero */
285 #define MSG_REGULAR 1
289 * The activation descriptor:
290 * The format of the message to send, plus all accompanying control
294 struct bau_target_uvhubmask distribution;
296 * message template, consisting of header and payload:
298 struct bau_msg_header header;
299 struct bau_msg_payload payload;
302 * -payload-- ---------header------
303 * bytes 0-11 bits 41-56 bits 58-81
306 * A/B/C are moved to:
308 * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
309 * ------------payload queue-----------
313 * The payload queue on the destination side is an array of these.
314 * With BAU_MISC_CONTROL set for software acknowledge mode, the messages
315 * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
316 * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
317 * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
318 * sw_ack_vector and payload_2)
319 * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
320 * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
323 struct bau_payload_queue_entry {
324 unsigned long address; /* signifies a page or all TLB's
326 /* 64 bits, bytes 0-7 */
328 unsigned short sending_cpu; /* cpu that sent the message */
329 /* 16 bits, bytes 8-9 */
331 unsigned short acknowledge_count; /* filled in by destination */
332 /* 16 bits, bytes 10-11 */
334 /* these next 3 bytes come from bits 58-81 of the message header */
335 unsigned short replied_to:1; /* sent as 0 by the source */
336 unsigned short msg_type:3; /* software message type */
337 unsigned short canceled:1; /* sent as 0 by the source */
338 unsigned short unused1:3; /* not currently using */
341 unsigned char unused2a; /* not currently using */
343 unsigned char unused2; /* not currently using */
346 unsigned char sw_ack_vector; /* filled in by the hardware */
347 /* byte 15 (bits 127:120) */
349 unsigned short sequence; /* message sequence number */
351 unsigned char unused4[2]; /* not currently using bytes 18-19 */
354 int number_of_cpus; /* filled in at destination */
355 /* 32 bits, bytes 20-23 (aligned) */
357 unsigned char unused5[8]; /* not using */
362 struct bau_payload_queue_entry *msg;
365 struct bau_payload_queue_entry *va_queue_first;
366 struct bau_payload_queue_entry *va_queue_last;
374 * This structure is allocated per_cpu for UV TLB shootdown statistics.
377 /* sender statistics */
378 unsigned long s_giveup; /* number of fall backs to IPI-style flushes */
379 unsigned long s_requestor; /* number of shootdown requests */
380 unsigned long s_stimeout; /* source side timeouts */
381 unsigned long s_dtimeout; /* destination side timeouts */
382 unsigned long s_time; /* time spent in sending side */
383 unsigned long s_retriesok; /* successful retries */
384 unsigned long s_ntargcpu; /* total number of cpu's targeted */
385 unsigned long s_ntargself; /* times the sending cpu was targeted */
386 unsigned long s_ntarglocals; /* targets of cpus on the local blade */
387 unsigned long s_ntargremotes; /* targets of cpus on remote blades */
388 unsigned long s_ntarglocaluvhub; /* targets of the local hub */
389 unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */
390 unsigned long s_ntarguvhub; /* total number of uvhubs targeted */
391 unsigned long s_ntarguvhub16; /* number of times target hubs >= 16*/
392 unsigned long s_ntarguvhub8; /* number of times target hubs >= 8 */
393 unsigned long s_ntarguvhub4; /* number of times target hubs >= 4 */
394 unsigned long s_ntarguvhub2; /* number of times target hubs >= 2 */
395 unsigned long s_ntarguvhub1; /* number of times target hubs == 1 */
396 unsigned long s_resets_plug; /* ipi-style resets from plug state */
397 unsigned long s_resets_timeout; /* ipi-style resets from timeouts */
398 unsigned long s_busy; /* status stayed busy past s/w timer */
399 unsigned long s_throttles; /* waits in throttle */
400 unsigned long s_retry_messages; /* retry broadcasts */
401 unsigned long s_bau_reenabled; /* for bau enable/disable */
402 unsigned long s_bau_disabled; /* for bau enable/disable */
403 /* destination statistics */
404 unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */
405 unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */
406 unsigned long d_multmsg; /* interrupts with multiple messages */
407 unsigned long d_nomsg; /* interrupts with no message */
408 unsigned long d_time; /* time spent on destination side */
409 unsigned long d_requestee; /* number of messages processed */
410 unsigned long d_retries; /* number of retry messages processed */
411 unsigned long d_canceled; /* number of messages canceled by retries */
412 unsigned long d_nocanceled; /* retries that found nothing to cancel */
413 unsigned long d_resets; /* number of ipi-style requests processed */
414 unsigned long d_rcanceled; /* number of messages canceled by resets */
417 struct hub_and_pnode {
422 * one per-cpu; to locate the software tables
425 struct bau_desc *descriptor_base;
426 struct bau_payload_queue_entry *va_queue_first;
427 struct bau_payload_queue_entry *va_queue_last;
428 struct bau_payload_queue_entry *bau_msg_head;
429 struct bau_control *uvhub_master;
430 struct bau_control *socket_master;
431 struct ptc_stats *statp;
432 unsigned long timeout_interval;
433 unsigned long set_bau_on_time;
434 atomic_t active_descriptor_count;
445 short cpus_in_socket;
447 short partition_base_pnode;
448 unsigned short message_number;
449 unsigned short uvhub_quiesce;
450 short socket_acknowledge_count[DEST_Q_SIZE];
451 cycles_t send_message;
452 spinlock_t uvhub_lock;
453 spinlock_t queue_lock;
455 int max_bau_concurrent;
456 int max_bau_concurrent_constant;
461 int complete_threshold;
462 int congested_response_us;
464 int congested_period;
465 cycles_t period_time;
466 long period_requests;
467 struct hub_and_pnode *target_hub_and_pnode;
470 static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp)
472 return constant_test_bit(uvhub, &dstp->bits[0]);
474 static inline void bau_uvhub_set(int pnode, struct bau_target_uvhubmask *dstp)
476 __set_bit(pnode, &dstp->bits[0]);
478 static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp,
481 bitmap_zero(&dstp->bits[0], nbits);
483 static inline int bau_uvhub_weight(struct bau_target_uvhubmask *dstp)
485 return bitmap_weight((unsigned long *)&dstp->bits[0],
486 UV_DISTRIBUTION_SIZE);
489 static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
491 bitmap_zero(&dstp->bits, nbits);
494 #define cpubit_isset(cpu, bau_local_cpumask) \
495 test_bit((cpu), (bau_local_cpumask).bits)
497 extern void uv_bau_message_intr1(void);
498 extern void uv_bau_timeout_intr1(void);
500 struct atomic_short {
505 * atomic_read_short - read a short atomic variable
506 * @v: pointer of type atomic_short
508 * Atomically reads the value of @v.
510 static inline int atomic_read_short(const struct atomic_short *v)
516 * atomic_add_short_return - add and return a short int
517 * @i: short value to add
518 * @v: pointer of type atomic_short
520 * Atomically adds @i to @v and returns @i + @v
522 static inline int atomic_add_short_return(short i, struct atomic_short *v)
525 asm volatile(LOCK_PREFIX "xaddw %0, %1"
526 : "+r" (i), "+m" (v->counter)
531 #endif /* _ASM_X86_UV_UV_BAU_H */