3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
5 * SPDX-License-Identifier: GPL-2.0+
11 /* bus mapping constants (used for PCI core initialization) */
12 #define PCI_REG_ADDR 0xcf8
13 #define PCI_REG_DATA 0xcfc
15 #define PCI_CFG_EN 0x80000000
19 #define DEFINE_PCI_DEVICE_TABLE(_table) \
20 const struct pci_device_id _table[]
22 struct pci_controller;
24 void pci_setup_type1(struct pci_controller *hose);
27 * board_pci_setup_hose() - Set up the PCI hose
29 * This is called by the common x86 PCI code to set up the PCI controller
30 * hose. It may be called when no memory/BSS is available so should just
31 * store things in 'hose' and not in BSS variables.
33 void board_pci_setup_hose(struct pci_controller *hose);
36 * pci_early_init_hose() - Set up PCI host before relocation
38 * This allocates memory for, sets up and returns the PCI hose. It can be
39 * called before relocation. The hose will be stored in gd->hose for
40 * later use, but will become invalid one DRAM is available.
42 int pci_early_init_hose(struct pci_controller **hosep);
44 int board_pci_pre_scan(struct pci_controller *hose);
45 int board_pci_post_scan(struct pci_controller *hose);
48 * Simple PCI access routines - these work from either the early PCI hose
49 * or the 'real' one, created after U-Boot has memory available
51 unsigned int pci_read_config8(pci_dev_t dev, unsigned where);
52 unsigned int pci_read_config16(pci_dev_t dev, unsigned where);
53 unsigned int pci_read_config32(pci_dev_t dev, unsigned where);
55 void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
56 void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
57 void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
59 #endif /* __ASSEMBLY__ */
61 #endif /* _PCI_I386_H_ */