2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef _ASM_X86_I387_H
11 #define _ASM_X86_I387_H
15 #include <linux/sched.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/regset.h>
18 #include <linux/hardirq.h>
19 #include <linux/slab.h>
21 #include <asm/cpufeature.h>
22 #include <asm/processor.h>
23 #include <asm/sigcontext.h>
25 #include <asm/uaccess.h>
26 #include <asm/xsave.h>
28 extern unsigned int sig_xstate_size;
29 extern void fpu_init(void);
30 extern void mxcsr_feature_mask_init(void);
31 extern int init_fpu(struct task_struct *child);
32 extern void math_state_restore(void);
33 extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
35 extern user_regset_active_fn fpregs_active, xfpregs_active;
36 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,
38 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,
42 * xstateregs_active == fpregs_active. Please refer to the comment
43 * at the definition of fpregs_active.
45 #define xstateregs_active fpregs_active
47 extern struct _fpx_sw_bytes fx_sw_reserved;
48 #ifdef CONFIG_IA32_EMULATION
49 extern unsigned int sig_xstate_ia32_size;
50 extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
53 extern int save_i387_xstate_ia32(void __user *buf);
54 extern int restore_i387_xstate_ia32(void __user *buf);
57 #ifdef CONFIG_MATH_EMULATION
58 extern void finit_soft_fpu(struct i387_soft_struct *soft);
60 static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}
63 #define X87_FSW_ES (1 << 7) /* Exception Summary */
65 static __always_inline __pure bool use_xsaveopt(void)
67 return static_cpu_has(X86_FEATURE_XSAVEOPT);
70 static __always_inline __pure bool use_xsave(void)
72 return static_cpu_has(X86_FEATURE_XSAVE);
75 static __always_inline __pure bool use_fxsr(void)
77 return static_cpu_has(X86_FEATURE_FXSR);
80 extern void __sanitize_i387_state(struct task_struct *);
82 static inline void sanitize_i387_state(struct task_struct *tsk)
86 __sanitize_i387_state(tsk);
90 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
94 /* See comment in fxsave() below. */
95 #ifdef CONFIG_AS_FXSAVEQ
96 asm volatile("1: fxrstorq %[fx]\n\t"
98 ".section .fixup,\"ax\"\n"
99 "3: movl $-1,%[err]\n"
104 : [fx] "m" (*fx), "0" (0));
106 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
108 ".section .fixup,\"ax\"\n"
109 "3: movl $-1,%[err]\n"
114 : [fx] "R" (fx), "m" (*fx), "0" (0));
119 static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
124 * Clear the bytes not touched by the fxsave and reserved
127 err = __clear_user(&fx->sw_reserved,
128 sizeof(struct _fpx_sw_bytes));
132 /* See comment in fxsave() below. */
133 #ifdef CONFIG_AS_FXSAVEQ
134 asm volatile("1: fxsaveq %[fx]\n\t"
136 ".section .fixup,\"ax\"\n"
137 "3: movl $-1,%[err]\n"
141 : [err] "=r" (err), [fx] "=m" (*fx)
144 asm volatile("1: rex64/fxsave (%[fx])\n\t"
146 ".section .fixup,\"ax\"\n"
147 "3: movl $-1,%[err]\n"
151 : [err] "=r" (err), "=m" (*fx)
152 : [fx] "R" (fx), "0" (0));
155 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
157 /* No need to clear here because the caller clears USED_MATH */
161 static inline void fpu_fxsave(struct fpu *fpu)
163 /* Using "rex64; fxsave %0" is broken because, if the memory operand
164 uses any extended registers for addressing, a second REX prefix
165 will be generated (to the assembler, rex64 followed by semicolon
166 is a separate instruction), and hence the 64-bitness is lost. */
168 #ifdef CONFIG_AS_FXSAVEQ
169 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
170 starting with gas 2.16. */
171 __asm__ __volatile__("fxsaveq %0"
172 : "=m" (fpu->state->fxsave));
174 /* Using, as a workaround, the properly prefixed form below isn't
175 accepted by any binutils version so far released, complaining that
176 the same type of prefix is used twice if an extended register is
177 needed for addressing (fix submitted to mainline 2005-11-21).
178 asm volatile("rex64/fxsave %0"
179 : "=m" (fpu->state->fxsave));
180 This, however, we can work around by forcing the compiler to select
181 an addressing mode that doesn't require extended registers. */
182 asm volatile("rex64/fxsave (%[fx])"
183 : "=m" (fpu->state->fxsave)
184 : [fx] "R" (&fpu->state->fxsave));
188 #else /* CONFIG_X86_32 */
190 /* perform fxrstor iff the processor has extended states, otherwise frstor */
191 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
194 * The "nop" is needed to make the instructions the same
206 static inline void fpu_fxsave(struct fpu *fpu)
208 asm volatile("fxsave %[fx]"
209 : [fx] "=m" (fpu->state->fxsave));
212 #endif /* CONFIG_X86_64 */
214 /* We need a safe address that is cheap to find and that is already
215 in L1 during context switch. The best choices are unfortunately
216 different for UP and SMP */
218 #define safe_address (__per_cpu_offset[0])
220 #define safe_address (__get_cpu_var(kernel_cpustat).cpustat[CPUTIME_USER])
224 * These must be called with preempt disabled
226 static inline void fpu_save_init(struct fpu *fpu)
232 * xsave header may indicate the init state of the FP.
234 if (!(fpu->state->xsave.xsave_hdr.xstate_bv & XSTATE_FP))
236 } else if (use_fxsr()) {
239 asm volatile("fnsave %[fx]; fwait"
240 : [fx] "=m" (fpu->state->fsave));
244 if (unlikely(fpu->state->fxsave.swd & X87_FSW_ES))
245 asm volatile("fnclex");
247 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
248 is pending. Clear the x87 state here by setting it to fixed
249 values. safe_address is a random variable that should be in L1 */
252 "emms\n\t" /* clear stack tags */
253 "fildl %P[addr]", /* set F?P to defined value */
254 X86_FEATURE_FXSAVE_LEAK,
255 [addr] "m" (safe_address));
258 static inline void __save_init_fpu(struct task_struct *tsk)
260 fpu_save_init(&tsk->thread.fpu);
263 static inline int fpu_fxrstor_checking(struct fpu *fpu)
265 return fxrstor_checking(&fpu->state->fxsave);
268 static inline int fpu_restore_checking(struct fpu *fpu)
271 return fpu_xrstor_checking(fpu);
273 return fpu_fxrstor_checking(fpu);
276 static inline int restore_fpu_checking(struct task_struct *tsk)
278 return fpu_restore_checking(&tsk->thread.fpu);
282 * Software FPU state helpers. Careful: these need to
283 * be preemption protection *and* they need to be
284 * properly paired with the CR0.TS changes!
286 static inline int __thread_has_fpu(struct thread_info *ti)
288 return ti->status & TS_USEDFPU;
291 /* Must be paired with an 'stts' after! */
292 static inline void __thread_clear_has_fpu(struct thread_info *ti)
294 ti->status &= ~TS_USEDFPU;
297 /* Must be paired with a 'clts' before! */
298 static inline void __thread_set_has_fpu(struct thread_info *ti)
300 ti->status |= TS_USEDFPU;
304 * Encapsulate the CR0.TS handling together with the
307 * These generally need preemption protection to work,
308 * do try to avoid using these on their own.
310 static inline void __thread_fpu_end(struct thread_info *ti)
312 __thread_clear_has_fpu(ti);
316 static inline void __thread_fpu_begin(struct thread_info *ti)
319 __thread_set_has_fpu(ti);
323 * Signal frame handlers...
325 extern int save_i387_xstate(void __user *buf);
326 extern int restore_i387_xstate(void __user *buf);
328 static inline void __unlazy_fpu(struct task_struct *tsk)
330 if (__thread_has_fpu(task_thread_info(tsk))) {
331 __save_init_fpu(tsk);
332 __thread_fpu_end(task_thread_info(tsk));
334 tsk->fpu_counter = 0;
337 static inline void __clear_fpu(struct task_struct *tsk)
339 if (__thread_has_fpu(task_thread_info(tsk))) {
340 /* Ignore delayed exceptions from user space */
341 asm volatile("1: fwait\n"
343 _ASM_EXTABLE(1b, 2b));
344 __thread_fpu_end(task_thread_info(tsk));
349 * Were we in an interrupt that interrupted kernel mode?
351 * We can do a kernel_fpu_begin/end() pair *ONLY* if that
352 * pair does nothing at all: the thread must not have fpu (so
353 * that we don't try to save the FPU state), and TS must
354 * be set (so that the clts/stts pair does nothing that is
355 * visible in the interrupted kernel thread).
357 static inline bool interrupted_kernel_fpu_idle(void)
359 return !__thread_has_fpu(current_thread_info()) &&
360 (read_cr0() & X86_CR0_TS);
364 * Were we in user mode (or vm86 mode) when we were
367 * Doing kernel_fpu_begin/end() is ok if we are running
368 * in an interrupt context from user mode - we'll just
369 * save the FPU state as required.
371 static inline bool interrupted_user_mode(void)
373 struct pt_regs *regs = get_irq_regs();
374 return regs && user_mode_vm(regs);
378 * Can we use the FPU in kernel mode with the
379 * whole "kernel_fpu_begin/end()" sequence?
381 * It's always ok in process context (ie "not interrupt")
382 * but it is sometimes ok even from an irq.
384 static inline bool irq_fpu_usable(void)
386 return !in_interrupt() ||
387 interrupted_user_mode() ||
388 interrupted_kernel_fpu_idle();
391 static inline void kernel_fpu_begin(void)
393 struct thread_info *me = current_thread_info();
395 WARN_ON_ONCE(!irq_fpu_usable());
397 if (__thread_has_fpu(me)) {
398 __save_init_fpu(me->task);
399 __thread_clear_has_fpu(me);
400 /* We do 'stts()' in kernel_fpu_end() */
405 static inline void kernel_fpu_end(void)
412 * Some instructions like VIA's padlock instructions generate a spurious
413 * DNA fault but don't modify SSE registers. And these instructions
414 * get used from interrupt context as well. To prevent these kernel instructions
415 * in interrupt context interacting wrongly with other user/kernel fpu usage, we
416 * should use them only in the context of irq_ts_save/restore()
418 static inline int irq_ts_save(void)
421 * If in process context and not atomic, we can take a spurious DNA fault.
422 * Otherwise, doing clts() in process context requires disabling preemption
423 * or some heavy lifting like kernel_fpu_begin()
428 if (read_cr0() & X86_CR0_TS) {
436 static inline void irq_ts_restore(int TS_state)
443 * The question "does this thread have fpu access?"
444 * is slightly racy, since preemption could come in
445 * and revoke it immediately after the test.
447 * However, even in that very unlikely scenario,
448 * we can just assume we have FPU access - typically
449 * to save the FP state - we'll just take a #NM
450 * fault and get the FPU access back.
452 * The actual user_fpu_begin/end() functions
453 * need to be preemption-safe, though.
455 * NOTE! user_fpu_end() must be used only after you
456 * have saved the FP state, and user_fpu_begin() must
457 * be used only immediately before restoring it.
458 * These functions do not do any save/restore on
461 static inline int user_has_fpu(void)
463 return __thread_has_fpu(current_thread_info());
466 static inline void user_fpu_end(void)
469 __thread_fpu_end(current_thread_info());
473 static inline void user_fpu_begin(void)
477 __thread_fpu_begin(current_thread_info());
482 * These disable preemption on their own and are safe
484 static inline void save_init_fpu(struct task_struct *tsk)
486 WARN_ON_ONCE(!__thread_has_fpu(task_thread_info(tsk)));
488 __save_init_fpu(tsk);
489 __thread_fpu_end(task_thread_info(tsk));
493 static inline void unlazy_fpu(struct task_struct *tsk)
500 static inline void clear_fpu(struct task_struct *tsk)
508 * i387 state interaction
510 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
513 return tsk->thread.fpu.state->fxsave.cwd;
515 return (unsigned short)tsk->thread.fpu.state->fsave.cwd;
519 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
522 return tsk->thread.fpu.state->fxsave.swd;
524 return (unsigned short)tsk->thread.fpu.state->fsave.swd;
528 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
531 return tsk->thread.fpu.state->fxsave.mxcsr;
533 return MXCSR_DEFAULT;
537 static bool fpu_allocated(struct fpu *fpu)
539 return fpu->state != NULL;
542 static inline int fpu_alloc(struct fpu *fpu)
544 if (fpu_allocated(fpu))
546 fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
549 WARN_ON((unsigned long)fpu->state & 15);
553 static inline void fpu_free(struct fpu *fpu)
556 kmem_cache_free(task_xstate_cachep, fpu->state);
561 static inline void fpu_copy(struct fpu *dst, struct fpu *src)
563 memcpy(dst->state, src->state, xstate_size);
566 extern void fpu_finit(struct fpu *fpu);
568 #endif /* __ASSEMBLY__ */
570 #endif /* _ASM_X86_I387_H */