arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h

   1 /* SPDX-License-Identifier: Intel */
   2 /*
   3  * Copyright (c) 2016, Intel Corporation. All rights reserved.
   4  * Copyright 2019 Google LLC
   5  */
   6 #ifndef __ASM_ARCH_FSP_S_UDP_H
   7 #define __ASM_ARCH_FSP_S_UDP_H
   8
   9 #include <asm/fsp2/fsp_api.h>
  10
  11 struct __packed fsp_s_config {
  12         u8      active_processor_cores;
  13         u8      disable_core1;
  14         u8      disable_core2;
  15         u8      disable_core3;
  16         u8      vmx_enable;
  17         u8      proc_trace_mem_size;
  18         u8      proc_trace_enable;
  19         u8      eist;
  20         u8      boot_p_state;
  21         u8      enable_cx;
  22         u8      c1e;
  23         u8      bi_proc_hot;
  24         u8      pkg_c_state_limit;
  25         u8      c_state_auto_demotion;
  26         u8      c_state_un_demotion;
  27         u8      max_core_c_state;
  28         u8      pkg_c_state_demotion;
  29         u8      pkg_c_state_un_demotion;
  30         u8      turbo_mode;
  31         u8      hda_verb_table_entry_num;
  32         u32     hda_verb_table_ptr;
  33         u8      p2sb_unhide;
  34         u8      ipu_en;
  35         u8      ipu_acpi_mode;
  36         u8      force_wake;
  37         u32     gtt_mm_adr;
  38         u32     gm_adr;
  39         u8      pavp_lock;
  40         u8      graphics_freq_modify;
  41         u8      graphics_freq_req;
  42         u8      graphics_video_freq;
  43         u8      pm_lock;
  44         u8      dop_clock_gating;
  45         u8      unsolicited_attack_override;
  46         u8      wopcm_support;
  47         u8      wopcm_size;
  48         u8      power_gating;
  49         u8      unit_level_clock_gating;
  50         u8      fast_boot;
  51         u8      dyn_sr;
  52         u8      sa_ipu_enable;
  53         u8      pm_support;
  54         u8      enable_render_standby;
  55         u32     logo_size;
  56         u32     logo_ptr;
  57         u32     graphics_config_ptr;
  58         u8      pavp_enable;
  59         u8      pavp_pr3;
  60         u8      cd_clock;
  61         u8      pei_graphics_peim_init;
  62         u8      write_protection_enable[5];
  63         u8      read_protection_enable[5];
  64         u16     protected_range_limit[5];
  65         u16     protected_range_base[5];
  66         u8      gmm;
  67         u8      clk_gating_pgcb_clk_trunk;
  68         u8      clk_gating_sb;
  69         u8      clk_gating_sb_clk_trunk;
  70         u8      clk_gating_sb_clk_partition;
  71         u8      clk_gating_core;
  72         u8      clk_gating_dma;
  73         u8      clk_gating_reg_access;
  74         u8      clk_gating_host;
  75         u8      clk_gating_partition;
  76         u8      clk_gating_trunk;
  77         u8      hda_enable;
  78         u8      dsp_enable;
  79         u8      pme;
  80         u8      hd_audio_io_buffer_ownership;
  81         u8      hd_audio_io_buffer_voltage;
  82         u8      hd_audio_vc_type;
  83         u8      hd_audio_link_frequency;
  84         u8      hd_audio_i_disp_link_frequency;
  85         u8      hd_audio_i_disp_link_tmode;
  86         u8      dsp_endpoint_dmic;
  87         u8      dsp_endpoint_bluetooth;
  88         u8      dsp_endpoint_i2s_skp;
  89         u8      dsp_endpoint_i2s_hp;
  90         u8      audio_ctl_pwr_gate;
  91         u8      audio_dsp_pwr_gate;
  92         u8      mmt;
  93         u8      hmt;
  94         u8      hd_audio_pwr_gate;
  95         u8      hd_audio_clk_gate;
  96         u32     dsp_feature_mask;
  97         u32     dsp_pp_module_mask;
  98         u8      bios_cfg_lock_down;
  99         u8      hpet;
 100         u8      hpet_bdf_valid;
 101         u8      hpet_bus_number;
 102         u8      hpet_device_number;
 103         u8      hpet_function_number;
 104         u8      io_apic_bdf_valid;
 105         u8      io_apic_bus_number;
 106         u8      io_apic_device_number;
 107         u8      io_apic_function_number;
 108         u8      io_apic_entry24_119;
 109         u8      io_apic_id;
 110         u8      io_apic_range_select;
 111         u8      ish_enable;
 112         u8      bios_interface;
 113         u8      bios_lock;
 114         u8      spi_eiss;
 115         u8      bios_lock_sw_smi_number;
 116         u8      lpss_s0ix_enable;
 117         u8      unused_upd_space0[1];
 118         u8      i2c_clk_gate_cfg[8];
 119         u8      hsuart_clk_gate_cfg[4];
 120         u8      spi_clk_gate_cfg[3];
 121         u8      i2c0_enable;
 122         u8      i2c1_enable;
 123         u8      i2c2_enable;
 124         u8      i2c3_enable;
 125         u8      i2c4_enable;
 126         u8      i2c5_enable;
 127         u8      i2c6_enable;
 128         u8      i2c7_enable;
 129         u8      hsuart0_enable;
 130         u8      hsuart1_enable;
 131         u8      hsuart2_enable;
 132         u8      hsuart3_enable;
 133         u8      spi0_enable;
 134         u8      spi1_enable;
 135         u8      spi2_enable;
 136         u8      os_dbg_enable;
 137         u8      dci_en;
 138         u32     uart2_kernel_debug_base_address;
 139         u8      pcie_clock_gating_disabled;
 140         u8      pcie_root_port8xh_decode;
 141         u8      pcie8xh_decode_port_index;
 142         u8      pcie_root_port_peer_memory_write_enable;
 143         u8      pcie_aspm_sw_smi_number;
 144         u8      unused_upd_space1[1];
 145         u8      pcie_root_port_en[6];
 146         u8      pcie_rp_hide[6];
 147         u8      pcie_rp_slot_implemented[6];
 148         u8      pcie_rp_hot_plug[6];
 149         u8      pcie_rp_pm_sci[6];
 150         u8      pcie_rp_ext_sync[6];
 151         u8      pcie_rp_transmitter_half_swing[6];
 152         u8      pcie_rp_acs_enabled[6];
 153         u8      pcie_rp_clk_req_supported[6];
 154         u8      pcie_rp_clk_req_number[6];
 155         u8      pcie_rp_clk_req_detect[6];
 156         u8      advanced_error_reporting[6];
 157         u8      pme_interrupt[6];
 158         u8      unsupported_request_report[6];
 159         u8      fatal_error_report[6];
 160         u8      no_fatal_error_report[6];
 161         u8      correctable_error_report[6];
 162         u8      system_error_on_fatal_error[6];
 163         u8      system_error_on_non_fatal_error[6];
 164         u8      system_error_on_correctable_error[6];
 165         u8      pcie_rp_speed[6];
 166         u8      physical_slot_number[6];
 167         u8      pcie_rp_completion_timeout[6];
 168         u8      ptm_enable[6];
 169         u8      pcie_rp_aspm[6];
 170         u8      pcie_rp_l1_substates[6];
 171         u8      pcie_rp_ltr_enable[6];
 172         u8      pcie_rp_ltr_config_lock[6];
 173         u8      pme_b0_s5_dis;
 174         u8      pci_clock_run;
 175         u8      timer8254_clk_setting;
 176         u8      enable_sata;
 177         u8      sata_mode;
 178         u8      sata_salp_support;
 179         u8      sata_pwr_opt_enable;
 180         u8      e_sata_speed_limit;
 181         u8      speed_limit;
 182         u8      unused_upd_space2[1];
 183         u8      sata_ports_enable[2];
 184         u8      sata_ports_dev_slp[2];
 185         u8      sata_ports_hot_plug[2];
 186         u8      sata_ports_interlock_sw[2];
 187         u8      sata_ports_external[2];
 188         u8      sata_ports_spin_up[2];
 189         u8      sata_ports_solid_state_drive[2];
 190         u8      sata_ports_enable_dito_config[2];
 191         u8      sata_ports_dm_val[2];
 192         u8      unused_upd_space3[2];
 193         u16     sata_ports_dito_val[2];
 194         u16     sub_system_vendor_id;
 195         u16     sub_system_id;
 196         u8      crid_settings;
 197         u8      reset_select;
 198         u8      sdcard_enabled;
 199         u8      e_mmc_enabled;
 200         u8      e_mmc_host_max_speed;
 201         u8      ufs_enabled;
 202         u8      sdio_enabled;
 203         u8      gpp_lock;
 204         u8      sirq_enable;
 205         u8      sirq_mode;
 206         u8      start_frame_pulse;
 207         u8      smbus_enable;
 208         u8      arp_enable;
 209         u8      unused_upd_space4;
 210         u16     num_rsvd_smbus_addresses;
 211         u8      rsvd_smbus_address_table[128];
 212         u8      disable_compliance_mode;
 213         u8      usb_per_port_ctl;
 214         u8      usb30_mode;
 215         u8      unused_upd_space5[1];
 216         u8      port_usb20_enable[8];
 217         u8      port_us20b_over_current_pin[8];
 218         u8      usb_otg;
 219         u8      hsic_support_enable;
 220         u8      port_usb30_enable[6];
 221         u8      port_us30b_over_current_pin[6];
 222         u8      ssic_port_enable[2];
 223         u16     dlane_pwr_gating;
 224         u8      vtd_enable;
 225         u8      lock_down_global_smi;
 226         u16     reset_wait_timer;
 227         u8      rtc_lock;
 228         u8      sata_test_mode;
 229         u8      ssic_rate[2];
 230         u16     dynamic_power_gating;
 231         u16     pcie_rp_ltr_max_snoop_latency[6];
 232         u8      pcie_rp_snoop_latency_override_mode[6];
 233         u8      unused_upd_space6[2];
 234         u16     pcie_rp_snoop_latency_override_value[6];
 235         u8      pcie_rp_snoop_latency_override_multiplier[6];
 236         u8      skip_mp_init;
 237         u8      dci_auto_detect;
 238         u16     pcie_rp_ltr_max_non_snoop_latency[6];
 239         u8      pcie_rp_non_snoop_latency_override_mode[6];
 240         u8      tco_timer_halt_lock;
 241         u8      pwr_btn_override_period;
 242         u16     pcie_rp_non_snoop_latency_override_value[6];
 243         u8      pcie_rp_non_snoop_latency_override_multiplier[6];
 244         u8      pcie_rp_slot_power_limit_scale[6];
 245         u8      pcie_rp_slot_power_limit_value[6];
 246         u8      disable_native_power_button;
 247         u8      power_butter_debounce_mode;
 248         u32     sdio_tx_cmd_cntl;
 249         u32     sdio_tx_data_cntl1;
 250         u32     sdio_tx_data_cntl2;
 251         u32     sdio_rx_cmd_data_cntl1;
 252         u32     sdio_rx_cmd_data_cntl2;
 253         u32     sdcard_tx_cmd_cntl;
 254         u32     sdcard_tx_data_cntl1;
 255         u32     sdcard_tx_data_cntl2;
 256         u32     sdcard_rx_cmd_data_cntl1;
 257         u32     sdcard_rx_strobe_cntl;
 258         u32     sdcard_rx_cmd_data_cntl2;
 259         u32     emmc_tx_cmd_cntl;
 260         u32     emmc_tx_data_cntl1;
 261         u32     emmc_tx_data_cntl2;
 262         u32     emmc_rx_cmd_data_cntl1;
 263         u32     emmc_rx_strobe_cntl;
 264         u32     emmc_rx_cmd_data_cntl2;
 265         u32     emmc_master_sw_cntl;
 266         u8      pcie_rp_selectable_deemphasis[6];
 267         u8      monitor_mwait_enable;
 268         u8      hd_audio_dsp_uaa_compliance;
 269         u32     ipc[4];
 270         u8      sata_ports_disable_dynamic_pg[2];
 271         u8      init_s3_cpu;
 272         u8      skip_punit_init;
 273         u8      unused_upd_space7[4];
 274         u8      port_usb20_per_port_tx_pe_half[8];
 275         u8      port_usb20_per_port_pe_txi_set[8];
 276         u8      port_usb20_per_port_txi_set[8];
 277         u8      port_usb20_hs_skew_sel[8];
 278         u8      port_usb20_i_usb_tx_emphasis_en[8];
 279         u8      port_usb20_per_port_rxi_set[8];
 280         u8      port_usb20_hs_npre_drv_sel[8];
 281         u8      reserved_fsps_upd[16];
 282 };
 283
 284 /** struct fsps_upd - FSP-S Configuration */
 285 struct __packed fsps_upd {
 286         struct fsp_upd_header header;
 287         struct fsp_s_config config;
 288         u8 unused_upd_space2[46];
 289         u16 upd_terminator;
 290 };
 291
 292 #endif