2 * Copyright (C) 1991,1992 Linus Torvalds
4 * entry_32.S contains the system-call and low-level fault and trap handling routines.
6 * Stack layout while running C code:
7 * ptrace needs to have all registers on the stack.
8 * If the order here is changed, it needs to be
9 * updated in fork.c:copy_process(), signal.c:do_signal(),
10 * ptrace.c and ptrace.h
22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
31 #include <linux/linkage.h>
32 #include <linux/err.h>
33 #include <asm/thread_info.h>
34 #include <asm/irqflags.h>
35 #include <asm/errno.h>
36 #include <asm/segment.h>
38 #include <asm/page_types.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/ftrace.h>
42 #include <asm/irq_vectors.h>
43 #include <asm/cpufeatures.h>
44 #include <asm/alternative-asm.h>
48 .section .entry.text, "ax"
51 * We use macros for low-level operations which need to be overridden
52 * for paravirtualization. The following will never clobber any registers:
53 * INTERRUPT_RETURN (aka. "iret")
54 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
55 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
57 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
58 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
59 * Allowing a register to be clobbered can shrink the paravirt replacement
60 * enough to patch inline, increasing performance.
64 # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
66 # define preempt_stop(clobbers)
67 # define resume_kernel restore_all
70 .macro TRACE_IRQS_IRET
71 #ifdef CONFIG_TRACE_IRQFLAGS
72 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
80 * User gs save/restore
82 * %gs is used for userland TLS and kernel only uses it for stack
83 * canary which is required to be at %gs:20 by gcc. Read the comment
84 * at the top of stackprotector.h for more info.
86 * Local labels 98 and 99 are used.
88 #ifdef CONFIG_X86_32_LAZY_GS
90 /* unfortunately push/pop can't be no-op */
95 addl $(4 + \pop), %esp
100 /* all the rest are no-op */
107 .macro REG_TO_PTGS reg
109 .macro SET_KERNEL_GS reg
112 #else /* CONFIG_X86_32_LAZY_GS */
125 .pushsection .fixup, "ax"
129 _ASM_EXTABLE(98b, 99b)
133 98: mov PT_GS(%esp), %gs
136 .pushsection .fixup, "ax"
137 99: movl $0, PT_GS(%esp)
140 _ASM_EXTABLE(98b, 99b)
146 .macro REG_TO_PTGS reg
147 movl \reg, PT_GS(%esp)
149 .macro SET_KERNEL_GS reg
150 movl $(__KERNEL_STACK_CANARY), \reg
154 #endif /* CONFIG_X86_32_LAZY_GS */
156 .macro SAVE_ALL pt_regs_ax=%eax
169 movl $(__USER_DS), %edx
172 movl $(__KERNEL_PERCPU), %edx
177 .macro RESTORE_INT_REGS
187 .macro RESTORE_REGS pop=0
193 .pushsection .fixup, "ax"
211 ENTRY(__switch_to_asm)
213 * Save callee-saved registers
214 * This must match the order in struct inactive_task_frame
222 movl %esp, TASK_threadsp(%eax)
223 movl TASK_threadsp(%edx), %esp
225 #ifdef CONFIG_CC_STACKPROTECTOR
226 movl TASK_stack_canary(%edx), %ebx
227 movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
230 /* restore callee-saved registers */
240 * A newly forked process directly context switches into this address.
242 * eax: prev task we switched from
243 * ebx: kernel thread func (NULL for user thread)
244 * edi: kernel thread arg
252 jnz 1f /* kernel threads are uncommon */
255 /* When we fork, we trace the syscall return in the child, too. */
257 call syscall_return_slowpath
264 * A kernel thread is allowed to return here after successfully
265 * calling do_execve(). Exit to userspace to complete the execve()
268 movl $0, PT_EAX(%esp)
273 * Return to user mode is not as complex as all this looks,
274 * but we want the default path for a system call return to
275 * go as quickly as possible which is why some of this is
276 * less clear than it otherwise should be.
279 # userspace resumption stub bypassing syscall exit tracing
282 preempt_stop(CLBR_ANY)
285 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
286 movb PT_CS(%esp), %al
287 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
290 * We can be coming here from child spawned by kernel_thread().
292 movl PT_CS(%esp), %eax
293 andl $SEGMENT_RPL_MASK, %eax
296 jb resume_kernel # not returning to v8086 or userspace
298 ENTRY(resume_userspace)
299 DISABLE_INTERRUPTS(CLBR_ANY)
302 call prepare_exit_to_usermode
304 END(ret_from_exception)
306 #ifdef CONFIG_PREEMPT
308 DISABLE_INTERRUPTS(CLBR_ANY)
310 cmpl $0, PER_CPU_VAR(__preempt_count)
312 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
314 call preempt_schedule_irq
319 GLOBAL(__begin_SYSENTER_singlestep_region)
321 * All code from here through __end_SYSENTER_singlestep_region is subject
322 * to being single-stepped if a user program sets TF and executes SYSENTER.
323 * There is absolutely nothing that we can do to prevent this from happening
324 * (thanks Intel!). To keep our handling of this situation as simple as
325 * possible, we handle TF just like AC and NT, except that our #DB handler
326 * will ignore all of the single-step traps generated in this range.
331 * Xen doesn't set %esp to be precisely what the normal SYSENTER
332 * entry point expects, so fix it up before using the normal path.
334 ENTRY(xen_sysenter_target)
335 addl $5*4, %esp /* remove xen-provided frame */
336 jmp sysenter_past_esp
340 * 32-bit SYSENTER entry.
342 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
343 * if X86_FEATURE_SEP is available. This is the preferred system call
344 * entry on 32-bit systems.
346 * The SYSENTER instruction, in principle, should *only* occur in the
347 * vDSO. In practice, a small number of Android devices were shipped
348 * with a copy of Bionic that inlined a SYSENTER instruction. This
349 * never happened in any of Google's Bionic versions -- it only happened
350 * in a narrow range of Intel-provided versions.
352 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
353 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
354 * SYSENTER does not save anything on the stack,
355 * and does not save old EIP (!!!), ESP, or EFLAGS.
357 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
358 * user and/or vm86 state), we explicitly disable the SYSENTER
359 * instruction in vm86 mode by reprogramming the MSRs.
362 * eax system call number
371 ENTRY(entry_SYSENTER_32)
372 movl TSS_sysenter_sp0(%esp), %esp
374 pushl $__USER_DS /* pt_regs->ss */
375 pushl %ebp /* pt_regs->sp (stashed in bp) */
376 pushfl /* pt_regs->flags (except IF = 0) */
377 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
378 pushl $__USER_CS /* pt_regs->cs */
379 pushl $0 /* pt_regs->ip = 0 (placeholder) */
380 pushl %eax /* pt_regs->orig_ax */
381 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
384 * SYSENTER doesn't filter flags, so we need to clear NT, AC
385 * and TF ourselves. To save a few cycles, we can check whether
386 * either was set instead of doing an unconditional popfq.
387 * This needs to happen before enabling interrupts so that
388 * we don't get preempted with NT set.
390 * If TF is set, we will single-step all the way to here -- do_debug
391 * will ignore all the traps. (Yes, this is slow, but so is
392 * single-stepping in general. This allows us to avoid having
393 * a more complicated code to handle the case where a user program
394 * forces us to single-step through the SYSENTER entry code.)
396 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
397 * out-of-line as an optimization: NT is unlikely to be set in the
398 * majority of the cases and instead of polluting the I$ unnecessarily,
399 * we're keeping that code behind a branch which will predict as
400 * not-taken and therefore its instructions won't be fetched.
402 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
403 jnz .Lsysenter_fix_flags
404 .Lsysenter_flags_fixed:
407 * User mode is traced as though IRQs are on, and SYSENTER
413 call do_fast_syscall_32
414 /* XEN PV guests always use IRET path */
415 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
416 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
418 /* Opportunistic SYSEXIT */
419 TRACE_IRQS_ON /* User mode traces as IRQs on. */
420 movl PT_EIP(%esp), %edx /* pt_regs->ip */
421 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
422 1: mov PT_FS(%esp), %fs
424 popl %ebx /* pt_regs->bx */
425 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
426 popl %esi /* pt_regs->si */
427 popl %edi /* pt_regs->di */
428 popl %ebp /* pt_regs->bp */
429 popl %eax /* pt_regs->ax */
432 * Restore all flags except IF. (We restore IF separately because
433 * STI gives a one-instruction window in which we won't be interrupted,
434 * whereas POPF does not.)
436 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */
437 btr $X86_EFLAGS_IF_BIT, (%esp)
441 * Return back to the vDSO, which will pop ecx and edx.
442 * Don't bother with DS and ES (they already contain __USER_DS).
447 .pushsection .fixup, "ax"
448 2: movl $0, PT_FS(%esp)
454 .Lsysenter_fix_flags:
455 pushl $X86_EFLAGS_FIXED
457 jmp .Lsysenter_flags_fixed
458 GLOBAL(__end_SYSENTER_singlestep_region)
459 ENDPROC(entry_SYSENTER_32)
462 * 32-bit legacy system call entry.
464 * 32-bit x86 Linux system calls traditionally used the INT $0x80
465 * instruction. INT $0x80 lands here.
467 * This entry point can be used by any 32-bit perform system calls.
468 * Instances of INT $0x80 can be found inline in various programs and
469 * libraries. It is also used by the vDSO's __kernel_vsyscall
470 * fallback for hardware that doesn't support a faster entry method.
471 * Restarted 32-bit system calls also fall back to INT $0x80
472 * regardless of what instruction was originally used to do the system
473 * call. (64-bit programs can use INT $0x80 as well, but they can
474 * only run on 64-bit kernels and therefore land in
475 * entry_INT80_compat.)
477 * This is considered a slow path. It is not used by most libc
478 * implementations on modern hardware except during process startup.
481 * eax system call number
489 ENTRY(entry_INT80_32)
491 pushl %eax /* pt_regs->orig_ax */
492 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
495 * User mode is traced as though IRQs are on, and the interrupt gate
501 call do_int80_syscall_32
507 #ifdef CONFIG_X86_ESPFIX32
508 ALTERNATIVE "jmp restore_nocheck", "", X86_BUG_ESPFIX
510 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
512 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
513 * are returning to the kernel.
514 * See comments in process.c:copy_thread() for details.
516 movb PT_OLDSS(%esp), %ah
517 movb PT_CS(%esp), %al
518 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
519 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
520 je ldt_ss # returning to user-space with LDT SS
523 RESTORE_REGS 4 # skip orig_eax/error_code
526 .section .fixup, "ax"
528 pushl $0 # no error code
532 _ASM_EXTABLE(irq_return, iret_exc)
534 #ifdef CONFIG_X86_ESPFIX32
537 * Setup and switch to ESPFIX stack
539 * We're returning to userspace with a 16 bit stack. The CPU will not
540 * restore the high word of ESP for us on executing iret... This is an
541 * "official" bug of all the x86-compatible CPUs, which we can work
542 * around to make dosemu and wine happy. We do this by preloading the
543 * high word of ESP with the high word of the userspace ESP while
544 * compensating for the offset by changing to the ESPFIX segment with
545 * a base address that matches for the difference.
547 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
548 mov %esp, %edx /* load kernel esp */
549 mov PT_OLDESP(%esp), %eax /* load userspace esp */
550 mov %dx, %ax /* eax: new kernel esp */
551 sub %eax, %edx /* offset (low word is 0) */
553 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
554 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
556 pushl %eax /* new kernel esp */
558 * Disable interrupts, but do not irqtrace this section: we
559 * will soon execute iret and the tracer was already set to
560 * the irqstate after the IRET:
562 DISABLE_INTERRUPTS(CLBR_EAX)
563 lss (%esp), %esp /* switch to espfix segment */
566 ENDPROC(entry_INT80_32)
568 .macro FIXUP_ESPFIX_STACK
570 * Switch back for ESPFIX stack to the normal zerobased stack
572 * We can't call C functions using the ESPFIX stack. This code reads
573 * the high word of the segment base from the GDT and swiches to the
574 * normal stack and adjusts ESP with the matching offset.
576 #ifdef CONFIG_X86_ESPFIX32
577 /* fixup the stack */
578 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
579 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
581 addl %esp, %eax /* the adjusted stack pointer */
584 lss (%esp), %esp /* switch to the normal stack segment */
587 .macro UNWIND_ESPFIX_STACK
588 #ifdef CONFIG_X86_ESPFIX32
590 /* see if on espfix stack */
591 cmpw $__ESPFIX_SS, %ax
593 movl $__KERNEL_DS, %eax
596 /* switch to normal stack */
603 * Build the entry stubs with some assembler magic.
604 * We pack 1 stub into every 8-byte block.
607 ENTRY(irq_entries_start)
608 vector=FIRST_EXTERNAL_VECTOR
609 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
610 pushl $(~vector+0x80) /* Note: always in signed byte range */
615 END(irq_entries_start)
618 * the CPU automatically disables interrupts when executing an IRQ vector,
619 * so IRQ-flags tracing has to follow that:
621 .p2align CONFIG_X86_L1_CACHE_SHIFT
624 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
630 ENDPROC(common_interrupt)
632 #define BUILD_INTERRUPT3(name, nr, fn) \
644 #ifdef CONFIG_TRACING
645 # define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)
647 # define TRACE_BUILD_INTERRUPT(name, nr)
650 #define BUILD_INTERRUPT(name, nr) \
651 BUILD_INTERRUPT3(name, nr, smp_##name); \
652 TRACE_BUILD_INTERRUPT(name, nr)
654 /* The include is where all of the SMP etc. interrupts come from */
655 #include <asm/entry_arch.h>
657 ENTRY(coprocessor_error)
660 pushl $do_coprocessor_error
662 END(coprocessor_error)
664 ENTRY(simd_coprocessor_error)
667 #ifdef CONFIG_X86_INVD_BUG
668 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
669 ALTERNATIVE "pushl $do_general_protection", \
670 "pushl $do_simd_coprocessor_error", \
673 pushl $do_simd_coprocessor_error
676 END(simd_coprocessor_error)
678 ENTRY(device_not_available)
680 pushl $-1 # mark this as an int
681 pushl $do_device_not_available
683 END(device_not_available)
685 #ifdef CONFIG_PARAVIRT
688 _ASM_EXTABLE(native_iret, iret_exc)
713 ENTRY(coprocessor_segment_overrun)
716 pushl $do_coprocessor_segment_overrun
718 END(coprocessor_segment_overrun)
722 pushl $do_invalid_TSS
726 ENTRY(segment_not_present)
728 pushl $do_segment_not_present
730 END(segment_not_present)
734 pushl $do_stack_segment
738 ENTRY(alignment_check)
740 pushl $do_alignment_check
746 pushl $0 # no error code
747 pushl $do_divide_error
751 #ifdef CONFIG_X86_MCE
755 pushl machine_check_vector
760 ENTRY(spurious_interrupt_bug)
763 pushl $do_spurious_interrupt_bug
765 END(spurious_interrupt_bug)
768 ENTRY(xen_hypervisor_callback)
769 pushl $-1 /* orig_ax = -1 => not a system call */
774 * Check to see if we got the event in the critical
775 * region in xen_iret_direct, after we've reenabled
776 * events and checked for pending events. This simulates
777 * iret instruction's behaviour where it delivers a
778 * pending interrupt when enabling interrupts:
780 movl PT_EIP(%esp), %eax
781 cmpl $xen_iret_start_crit, %eax
783 cmpl $xen_iret_end_crit, %eax
786 jmp xen_iret_crit_fixup
790 call xen_evtchn_do_upcall
791 #ifndef CONFIG_PREEMPT
792 call xen_maybe_preempt_hcall
795 ENDPROC(xen_hypervisor_callback)
798 * Hypervisor uses this for application faults while it executes.
799 * We get here for two reasons:
800 * 1. Fault while reloading DS, ES, FS or GS
801 * 2. Fault while executing IRET
802 * Category 1 we fix up by reattempting the load, and zeroing the segment
803 * register if the load fails.
804 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
805 * normal Linux return path in this case because if we use the IRET hypercall
806 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
807 * We distinguish between categories by maintaining a status value in EAX.
809 ENTRY(xen_failsafe_callback)
816 /* EAX == 0 => Category 1 (Bad segment)
817 EAX != 0 => Category 2 (Bad IRET) */
823 5: pushl $-1 /* orig_ax = -1 => not a system call */
825 jmp ret_from_exception
827 .section .fixup, "ax"
845 ENDPROC(xen_failsafe_callback)
847 BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
848 xen_evtchn_do_upcall)
850 #endif /* CONFIG_XEN */
852 #if IS_ENABLED(CONFIG_HYPERV)
854 BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
855 hyperv_vector_handler)
857 #endif /* CONFIG_HYPERV */
859 #ifdef CONFIG_FUNCTION_TRACER
860 #ifdef CONFIG_DYNAMIC_FTRACE
870 pushl $0 /* Pass NULL as regs pointer */
873 movl function_trace_op, %ecx
874 subl $MCOUNT_INSN_SIZE, %eax
880 addl $4, %esp /* skip NULL pointer */
885 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
886 .globl ftrace_graph_call
896 ENTRY(ftrace_regs_caller)
897 pushf /* push flags before compare (in cs location) */
900 * i386 does not save SS and ESP when coming from kernel.
901 * Instead, to get sp, ®s->sp is used (see ptrace.h).
902 * Unfortunately, that means eflags must be at the same location
903 * as the current return ip is. We move the return ip into the
904 * ip location, and move flags into the return ip location.
906 pushl 4(%esp) /* save return ip into ip slot */
908 pushl $0 /* Load 0 into orig_ax */
921 movl 13*4(%esp), %eax /* Get the saved flags */
922 movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */
923 /* clobbering return ip */
924 movl $__KERNEL_CS, 13*4(%esp)
926 movl 12*4(%esp), %eax /* Load ip (1st parameter) */
927 subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */
928 movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */
929 movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */
930 pushl %esp /* Save pt_regs as 4th parameter */
932 GLOBAL(ftrace_regs_call)
935 addl $4, %esp /* Skip pt_regs */
936 movl 14*4(%esp), %eax /* Move flags back into cs */
937 movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */
938 movl 12*4(%esp), %eax /* Get return ip from regs->ip */
939 movl %eax, 14*4(%esp) /* Put return ip back for ret */
952 addl $8, %esp /* Skip orig_ax and ip */
953 popf /* Pop flags at end (no addl to corrupt flags) */
958 #else /* ! CONFIG_DYNAMIC_FTRACE */
961 cmpl $__PAGE_OFFSET, %esp
962 jb ftrace_stub /* Paging not enabled yet? */
964 cmpl $ftrace_stub, ftrace_trace_function
966 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
967 cmpl $ftrace_stub, ftrace_graph_return
968 jnz ftrace_graph_caller
970 cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
971 jnz ftrace_graph_caller
977 /* taken from glibc */
984 subl $MCOUNT_INSN_SIZE, %eax
986 call *ftrace_trace_function
993 #endif /* CONFIG_DYNAMIC_FTRACE */
994 #endif /* CONFIG_FUNCTION_TRACER */
996 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
997 ENTRY(ftrace_graph_caller)
1001 movl 0xc(%esp), %eax
1004 subl $MCOUNT_INSN_SIZE, %eax
1005 call prepare_ftrace_return
1010 END(ftrace_graph_caller)
1012 .globl return_to_handler
1017 call ftrace_return_to_handler
1024 #ifdef CONFIG_TRACING
1025 ENTRY(trace_page_fault)
1027 pushl $trace_do_page_fault
1029 END(trace_page_fault)
1034 pushl $do_page_fault
1037 /* the function address is in %gs's slot on the stack */
1049 movl $(__KERNEL_PERCPU), %ecx
1053 movl PT_GS(%esp), %edi # get the function address
1054 movl PT_ORIG_EAX(%esp), %edx # get the error code
1055 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1058 movl $(__USER_DS), %ecx
1062 movl %esp, %eax # pt_regs pointer
1064 jmp ret_from_exception
1069 * #DB can happen at the first instruction of
1070 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this
1071 * happens, then we will be running on a very small stack. We
1072 * need to detect this condition and switch to the thread
1073 * stack before calling any C code at all.
1075 * If you edit this code, keep in mind that NMIs can happen in here.
1078 pushl $-1 # mark this as an int
1080 xorl %edx, %edx # error code 0
1081 movl %esp, %eax # pt_regs pointer
1083 /* Are we currently on the SYSENTER stack? */
1084 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1085 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1086 cmpl $SIZEOF_SYSENTER_stack, %ecx
1087 jb .Ldebug_from_sysenter_stack
1091 jmp ret_from_exception
1093 .Ldebug_from_sysenter_stack:
1094 /* We're on the SYSENTER stack. Switch off. */
1096 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1100 jmp ret_from_exception
1104 * NMI is doubly nasty. It can happen on the first instruction of
1105 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
1106 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
1107 * switched stacks. We handle both conditions by simply checking whether we
1108 * interrupted kernel code running on the SYSENTER stack.
1112 #ifdef CONFIG_X86_ESPFIX32
1115 cmpw $__ESPFIX_SS, %ax
1120 pushl %eax # pt_regs->orig_ax
1122 xorl %edx, %edx # zero error code
1123 movl %esp, %eax # pt_regs pointer
1125 /* Are we currently on the SYSENTER stack? */
1126 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1127 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1128 cmpl $SIZEOF_SYSENTER_stack, %ecx
1129 jb .Lnmi_from_sysenter_stack
1131 /* Not on SYSENTER stack. */
1133 jmp restore_all_notrace
1135 .Lnmi_from_sysenter_stack:
1137 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1138 * is using the thread stack right now, so it's safe for us to use it.
1141 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1144 jmp restore_all_notrace
1146 #ifdef CONFIG_X86_ESPFIX32
1149 * create the pointer to lss back
1154 /* copy the iret frame of 12 bytes */
1160 FIXUP_ESPFIX_STACK # %eax == %esp
1161 xorl %edx, %edx # zero error code
1164 lss 12+4(%esp), %esp # back to espfix stack
1171 pushl $-1 # mark this as an int
1174 xorl %edx, %edx # zero error code
1175 movl %esp, %eax # pt_regs pointer
1177 jmp ret_from_exception
1180 ENTRY(general_protection)
1181 pushl $do_general_protection
1183 END(general_protection)
1185 #ifdef CONFIG_KVM_GUEST
1186 ENTRY(async_page_fault)
1188 pushl $do_async_page_fault
1190 END(async_page_fault)
1193 ENTRY(rewind_stack_do_exit)
1194 /* Prevent any naive code from trying to unwind to our caller. */
1197 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi
1198 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp
1202 END(rewind_stack_do_exit)