arch/x86/dts/u-boot.dtsi

   1 /*
   2  * Copyright (C) 2016 Google, Inc
   3  * Written by Simon Glass <sjg@chromium.org>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <config.h>
   9
  10 #ifdef CONFIG_ROM_SIZE
  11 / {
  12         binman {
  13                 filename = "u-boot.rom";
  14                 end-at-4gb;
  15                 sort-by-pos;
  16                 pad-byte = <0xff>;
  17                 size = <CONFIG_ROM_SIZE>;
  18 #ifdef CONFIG_HAVE_INTEL_ME
  19                 intel-descriptor {
  20                 };
  21                 intel-me {
  22                 };
  23 #endif
  24                 u-boot-with-ucode-ptr {
  25                         pos = <CONFIG_SYS_TEXT_BASE>;
  26                 };
  27                 u-boot-dtb-with-ucode {
  28                 };
  29                 u-boot-ucode {
  30                         align = <16>;
  31                 };
  32 #ifdef CONFIG_HAVE_MRC
  33                 intel-mrc {
  34                         pos = <CONFIG_X86_MRC_ADDR>;
  35                 };
  36 #endif
  37 #ifdef CONFIG_HAVE_FSP
  38                 intel-fsp {
  39                         pos = <CONFIG_FSP_ADDR>;
  40                 };
  41 #endif
  42 #ifdef CONFIG_HAVE_CMC
  43                 intel-cmc {
  44                         pos = <CONFIG_CMC_ADDR>;
  45                 };
  46 #endif
  47 #ifdef CONFIG_HAVE_VGA_BIOS
  48                 intel-vga {
  49                         pos = <CONFIG_VGA_BIOS_ADDR>;
  50                 };
  51 #endif
  52 #ifdef CONFIG_HAVE_REFCODE
  53                 intel-refcode {
  54                         pos = <CONFIG_X86_REFCODE_ADDR>;
  55                 };
  56 #endif
  57                 x86-start16 {
  58                         pos = <CONFIG_SYS_X86_START16>;
  59                 };
  60         };
  61 };
  62 #endif