Merge branch 'master' of git://git.denx.de/u-boot
[platform/kernel/u-boot.git] / arch / x86 / dts / chromebox_panther.dts
1 /dts-v1/;
2
3 /include/ "skeleton.dtsi"
4 /include/ "serial.dtsi"
5 /include/ "rtc.dtsi"
6
7 / {
8         model = "Google Panther";
9         compatible = "google,panther", "intel,haswell";
10
11         aliases {
12                 spi0 = "/spi";
13         };
14
15         config {
16                 silent-console = <0>;
17                 no-keyboard;
18         };
19
20         gpioa {
21                 compatible = "intel,ich6-gpio";
22                 u-boot,dm-pre-reloc;
23                 reg = <0 0x10>;
24                 bank-name = "A";
25         };
26
27         gpiob {
28                 compatible = "intel,ich6-gpio";
29                 u-boot,dm-pre-reloc;
30                 reg = <0x30 0x10>;
31                 bank-name = "B";
32         };
33
34         gpioc {
35                 compatible = "intel,ich6-gpio";
36                 u-boot,dm-pre-reloc;
37                 reg = <0x40 0x10>;
38                 bank-name = "C";
39         };
40
41         chosen {
42                 stdout-path = "/serial";
43         };
44
45         pci {
46                 compatible = "pci-x86";
47                 #address-cells = <3>;
48                 #size-cells = <2>;
49                 u-boot,dm-pre-reloc;
50                 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
51                         0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
52                         0x01000000 0x0 0x1000 0x1000 0 0xf000>;
53         };
54
55         spi {
56                 #address-cells = <1>;
57                 #size-cells = <0>;
58                 compatible = "intel,ich-spi";
59                 spi-flash@0 {
60                         #size-cells = <1>;
61                         #address-cells = <1>;
62                         reg = <0>;
63                         compatible = "winbond,w25q64", "spi-flash";
64                         memory-map = <0xff800000 0x00800000>;
65                         rw-mrc-cache {
66                                 label = "rw-mrc-cache";
67                                 reg = <0x003e0000 0x00010000>;
68                         };
69                 };
70         };
71
72         tpm {
73                 reg = <0xfed40000 0x5000>;
74                 compatible = "infineon,slb9635lpc";
75         };
76
77 };