arch/x86/dts/chromebook_link.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/gpio/x86-gpio.h>
   4 #include <dt-bindings/sound/azalia.h>
   5 #include <pci_ids.h>
   6
   7 /include/ "skeleton.dtsi"
   8 /include/ "keyboard.dtsi"
   9 /include/ "serial.dtsi"
  10 /include/ "reset.dtsi"
  11 /include/ "rtc.dtsi"
  12
  13 #include "tsc_timer.dtsi"
  14 #include "smbios.dtsi"
  15
  16 / {
  17         model = "Google Link";
  18         compatible = "google,link", "intel,celeron-ivybridge";
  19
  20         aliases {
  21                 spi0 = &spi;
  22                 usb0 = &usb_0;
  23                 usb1 = &usb_1;
  24         };
  25
  26         config {
  27                silent_console = <0>;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         device_type = "cpu";
  36                         compatible = "intel,core-gen3";
  37                         reg = <0>;
  38                         intel,apic-id = <0>;
  39                 };
  40
  41                 cpu@1 {
  42                         device_type = "cpu";
  43                         compatible = "intel,core-gen3";
  44                         reg = <1>;
  45                         intel,apic-id = <1>;
  46                 };
  47
  48                 cpu@2 {
  49                         device_type = "cpu";
  50                         compatible = "intel,core-gen3";
  51                         reg = <2>;
  52                         intel,apic-id = <2>;
  53                 };
  54
  55                 cpu@3 {
  56                         device_type = "cpu";
  57                         compatible = "intel,core-gen3";
  58                         reg = <3>;
  59                         intel,apic-id = <3>;
  60                 };
  61
  62         };
  63
  64         chosen {
  65                 stdout-path = "/serial";
  66         };
  67
  68         keyboard {
  69                 intel,duplicate-por;
  70         };
  71
  72         pch_pinctrl {
  73                 compatible = "intel,x86-pinctrl";
  74                 bootph-all;
  75                 reg = <0 0>;
  76
  77                 gpio_a0 {
  78                         gpio-offset = <0 0>;
  79                         mode-gpio;
  80                         direction = <PIN_INPUT>;
  81                 };
  82
  83                 gpio_a1 {
  84                         gpio-offset = <0>;
  85                         mode-gpio;
  86                         direction = <PIN_OUTPUT>;
  87                         output-value = <1>;
  88                 };
  89
  90                 gpio_a3 {
  91                         gpio-offset = <0 3>;
  92                         mode-gpio;
  93                         direction = <PIN_INPUT>;
  94                 };
  95
  96                 gpio_a5 {
  97                         gpio-offset = <0 5>;
  98                         mode-gpio;
  99                         direction = <PIN_INPUT>;
 100                 };
 101
 102                 gpio_a6 {
 103                         gpio-offset = <0 6>;
 104                         mode-gpio;
 105                         direction = <PIN_OUTPUT>;
 106                         output-value = <1>;
 107                 };
 108
 109                 gpio_a7 {
 110                         gpio-offset = <0 7>;
 111                         mode-gpio;
 112                         direction = <PIN_INPUT>;
 113                         invert;
 114                 };
 115
 116                 gpio_a8 {
 117                         gpio-offset = <0 8>;
 118                         mode-gpio;
 119                         direction = <PIN_INPUT>;
 120                         invert;
 121                 };
 122
 123                 gpio_a9 {
 124                         gpio-offset = <0 9>;
 125                         mode-gpio;
 126                         direction = <PIN_INPUT>;
 127                 };
 128
 129                 gpio_a10 {
 130                         bootph-all;
 131                         gpio-offset = <0 10>;
 132                         mode-gpio;
 133                         direction = <PIN_INPUT>;
 134                 };
 135
 136                 gpio_a11 {
 137                         gpio-offset = <0 11>;
 138                         mode-gpio;
 139                         direction = <PIN_INPUT>;
 140                 };
 141
 142                 gpio_a12 {
 143                         gpio-offset = <0 12>;
 144                         mode-gpio;
 145                         direction = <PIN_INPUT>;
 146                         invert;
 147                 };
 148
 149                 gpio_a14 {
 150                         gpio-offset = <0 14>;
 151                         mode-gpio;
 152                         direction = <PIN_INPUT>;
 153                         invert;
 154                 };
 155
 156                 gpio_a15 {
 157                         gpio-offset = <0 15>;
 158                         mode-gpio;
 159                         direction = <PIN_INPUT>;
 160                         invert;
 161                 };
 162
 163                 gpio_a21 {
 164                         gpio-offset = <0 21>;
 165                         mode-gpio;
 166                         direction = <PIN_INPUT>;
 167                 };
 168
 169                 gpio_a24 {
 170                         gpio-offset = <0 24>;
 171                         mode-gpio;
 172                         output-value = <0>;
 173                         direction = <PIN_OUTPUT>;
 174                 };
 175
 176                 gpio_a28 {
 177                         gpio-offset = <0 28>;
 178                         mode-gpio;
 179                         direction = <PIN_INPUT>;
 180                 };
 181
 182                 gpio_b4 {
 183                         gpio-offset = <0x30 4>;
 184                         mode-gpio;
 185                         direction = <PIN_OUTPUT>;
 186                         output-value = <1>;
 187                 };
 188
 189                 gpio_b9 {
 190                         bootph-all;
 191                         gpio-offset = <0x30 9>;
 192                         mode-gpio;
 193                         direction = <PIN_INPUT>;
 194                 };
 195
 196                 gpio_b10 {
 197                         bootph-all;
 198                         gpio-offset = <0x30 10>;
 199                         mode-gpio;
 200                         direction = <PIN_INPUT>;
 201                 };
 202
 203                 gpio_b11 {
 204                         bootph-all;
 205                         gpio-offset = <0x30 11>;
 206                         mode-gpio;
 207                         direction = <PIN_INPUT>;
 208                 };
 209
 210                 gpio_b25 {
 211                         gpio-offset = <0x30 25>;
 212                         mode-gpio;
 213                         direction = <PIN_INPUT>;
 214                 };
 215
 216                 gpio_b28 {
 217                         gpio-offset = <0x30 28>;
 218                         mode-gpio;
 219                         direction = <PIN_OUTPUT>;
 220                         output-value = <1>;
 221                 };
 222
 223         };
 224
 225         pci {
 226                 compatible = "pci-x86";
 227                 #address-cells = <3>;
 228                 #size-cells = <2>;
 229                 bootph-all;
 230                 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
 231                         0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
 232                         0x01000000 0x0 0x1000 0x1000 0 0xefff>;
 233
 234                 northbridge@0,0 {
 235                         reg = <0x00000000 0 0 0 0>;
 236                         bootph-all;
 237                         compatible = "intel,bd82x6x-northbridge";
 238                         board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
 239                                         <&gpio_b 11 0>, <&gpio_a 10 0>;
 240                         spd {
 241                                 bootph-all;
 242                                 #address-cells = <1>;
 243                                 #size-cells = <0>;
 244                                 elpida_4Gb_1600_x16 {
 245                                         bootph-all;
 246                                         reg = <0>;
 247                                         data = [92 10 0b 03 04 19 02 02
 248                                                 03 52 01 08 0a 00 fe 00
 249                                                 69 78 69 3c 69 11 18 81
 250                                                 20 08 3c 3c 01 40 83 81
 251                                                 00 00 00 00 00 00 00 00
 252                                                 00 00 00 00 00 00 00 00
 253                                                 00 00 00 00 00 00 00 00
 254                                                 00 00 00 00 0f 11 42 00
 255                                                 00 00 00 00 00 00 00 00
 256                                                 00 00 00 00 00 00 00 00
 257                                                 00 00 00 00 00 00 00 00
 258                                                 00 00 00 00 00 00 00 00
 259                                                 00 00 00 00 00 00 00 00
 260                                                 00 00 00 00 00 00 00 00
 261                                                 00 00 00 00 00 02 fe 00
 262                                                 11 52 00 00 00 07 7f 37
 263                                                 45 42 4a 32 30 55 47 36
 264                                                 45 42 55 30 2d 47 4e 2d
 265                                                 46 20 30 20 02 fe 00 00
 266                                                 00 00 00 00 00 00 00 00
 267                                                 00 00 00 00 00 00 00 00
 268                                                 00 00 00 00 00 00 00 00
 269                                                 00 00 00 00 00 00 00 00
 270                                                 00 00 00 00 00 00 00 00
 271                                                 00 00 00 00 00 00 00 00
 272                                                 00 00 00 00 00 00 00 00
 273                                                 00 00 00 00 00 00 00 00
 274                                                 00 00 00 00 00 00 00 00
 275                                                 00 00 00 00 00 00 00 00
 276                                                 00 00 00 00 00 00 00 00
 277                                                 00 00 00 00 00 00 00 00
 278                                                 00 00 00 00 00 00 00 00];
 279                                 };
 280                                 samsung_4Gb_1600_1.35v_x16 {
 281                                         bootph-all;
 282                                         reg = <1>;
 283                                         data = [92 11 0b 03 04 19 02 02
 284                                                 03 11 01 08 0a 00 fe 00
 285                                                 69 78 69 3c 69 11 18 81
 286                                                 f0 0a 3c 3c 01 40 83 01
 287                                                 00 80 00 00 00 00 00 00
 288                                                 00 00 00 00 00 00 00 00
 289                                                 00 00 00 00 00 00 00 00
 290                                                 00 00 00 00 0f 11 02 00
 291                                                 00 00 00 00 00 00 00 00
 292                                                 00 00 00 00 00 00 00 00
 293                                                 00 00 00 00 00 00 00 00
 294                                                 00 00 00 00 00 00 00 00
 295                                                 00 00 00 00 00 00 00 00
 296                                                 00 00 00 00 00 00 00 00
 297                                                 00 00 00 00 00 80 ce 01
 298                                                 00 00 00 00 00 00 6a 04
 299                                                 4d 34 37 31 42 35 36 37
 300                                                 34 42 48 30 2d 59 4b 30
 301                                                 20 20 00 00 80 ce 00 00
 302                                                 00 00 00 00 00 00 00 00
 303                                                 00 00 00 00 00 00 00 00
 304                                                 00 00 00 00 00 00 00 00
 305                                                 00 00 00 00 00 00 00 00
 306                                                 00 00 00 00 00 00 00 00
 307                                                 00 00 00 00 00 00 00 00
 308                                                 00 00 00 00 00 00 00 00
 309                                                 00 00 00 00 00 00 00 00
 310                                                 00 00 00 00 00 00 00 00
 311                                                 00 00 00 00 00 00 00 00
 312                                                 00 00 00 00 00 00 00 00
 313                                                 00 00 00 00 00 00 00 00
 314                                                 00 00 00 00 00 00 00 00];
 315                                         };
 316                                 micron_4Gb_1600_1.35v_x16 {
 317                                         bootph-all;
 318                                         reg = <2>;
 319                                         data = [92 11 0b 03 04 19 02 02
 320                                                 03 11 01 08 0a 00 fe 00
 321                                                 69 78 69 3c 69 11 18 81
 322                                                 20 08 3c 3c 01 40 83 05
 323                                                 00 00 00 00 00 00 00 00
 324                                                 00 00 00 00 00 00 00 00
 325                                                 00 00 00 00 00 00 00 00
 326                                                 00 00 00 00 0f 01 02 00
 327                                                 00 00 00 00 00 00 00 00
 328                                                 00 00 00 00 00 00 00 00
 329                                                 00 00 00 00 00 00 00 00
 330                                                 00 00 00 00 00 00 00 00
 331                                                 00 00 00 00 00 00 00 00
 332                                                 00 00 00 00 00 00 00 00
 333                                                 00 00 00 00 00 80 2c 00
 334                                                 00 00 00 00 00 00 ad 75
 335                                                 34 4b 54 46 32 35 36 36
 336                                                 34 48 5a 2d 31 47 36 45
 337                                                 31 20 45 31 80 2c 00 00
 338                                                 00 00 00 00 00 00 00 00
 339                                                 00 00 00 00 00 00 00 00
 340                                                 00 00 00 00 00 00 00 00
 341                                                 ff ff ff ff ff ff ff ff
 342                                                 ff ff ff ff ff ff ff ff
 343                                                 ff ff ff ff ff ff ff ff
 344                                                 ff ff ff ff ff ff ff ff
 345                                                 ff ff ff ff ff ff ff ff
 346                                                 ff ff ff ff ff ff ff ff
 347                                                 ff ff ff ff ff ff ff ff
 348                                                 ff ff ff ff ff ff ff ff
 349                                                 ff ff ff ff ff ff ff ff
 350                                                 ff ff ff ff ff ff ff ff];
 351                                 };
 352                         };
 353                 };
 354
 355                 gma@2,0 {
 356                         reg = <0x00001000 0 0 0 0>;
 357                         compatible = "intel,gma";
 358                         intel,dp_hotplug = <0 0 0x06>;
 359                         intel,panel-port-select = <1>;
 360                         intel,panel-power-cycle-delay = <6>;
 361                         intel,panel-power-up-delay = <2000>;
 362                         intel,panel-power-down-delay = <500>;
 363                         intel,panel-power-backlight-on-delay = <2000>;
 364                         intel,panel-power-backlight-off-delay = <2000>;
 365                         intel,cpu-backlight = <0x00000200>;
 366                         intel,pch-backlight = <0x04000000>;
 367                 };
 368
 369                 me@16,0 {
 370                         reg = <0x0000b000 0 0 0 0>;
 371                         compatible = "intel,me";
 372                         bootph-all;
 373                 };
 374
 375                 usb_1: usb@1a,0 {
 376                         reg = <0x0000d000 0 0 0 0>;
 377                         compatible = "ehci-pci";
 378                 };
 379
 380                 hda@1b,0 {
 381                         reg = <0x0000d800 0 0 0 0>;
 382                         compatible = "intel,bd82x6x-hda";
 383
 384                         /* These correspond to the Intel HDA specification */
 385                         beep-verbs = <
 386                                 0x00170500      /* power up codec */
 387                                 0x00270500      /* power up DAC */
 388                                 0x00b70500      /* power up speaker */
 389                                 0x00b70740      /* enable speaker out */
 390                                 0x00b78d00      /* enable EAPD pin */
 391                                 0x00b70c02      /* set EAPD pin */
 392                                 0x0143b013>;    /* beep volume */
 393
 394                         codecs {
 395                                 creative_codec: creative-ca0132 {
 396                                         vendor-id = <PCI_VENDOR_ID_CREATIVE>;
 397                                         device-id = <PCI_DEVICE_ID_CREATIVE_CA01322>;
 398                                 };
 399                                 intel_hdmi: hdmi {
 400                                         vendor-id = <PCI_VENDOR_ID_INTEL>;
 401                                         device-id = <PCI_DEVICE_ID_INTEL_COUGARPOINT_HDMI>;
 402                                 };
 403                         };
 404                 };
 405
 406                 usb_0: usb@1d,0 {
 407                         reg = <0x0000e800 0 0 0 0>;
 408                         compatible = "ehci-pci";
 409                 };
 410
 411                 pch@1f,0 {
 412                         reg = <0x0000f800 0 0 0 0>;
 413                         compatible = "intel,bd82x6x", "intel,pch9";
 414                         bootph-all;
 415                         #address-cells = <1>;
 416                         #size-cells = <1>;
 417                         intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
 418                                                 0x80 0x80 0x80 0x80>;
 419                         intel,gpi-routing = <0 0 0 0 0 0 0 2
 420                                                 1 0 0 0 0 0 0 0>;
 421                         /* Enable EC SMI source */
 422                         intel,alt-gp-smi-enable = <0x0100>;
 423
 424                         spi: spi {
 425                                 #address-cells = <1>;
 426                                 #size-cells = <0>;
 427                                 compatible = "intel,ich9-spi";
 428                                 bootph-all;
 429                                 spi-flash@0 {
 430                                         #size-cells = <1>;
 431                                         #address-cells = <1>;
 432                                         bootph-all;
 433                                         reg = <0>;
 434                                         m25p,fast-read;
 435                                         compatible = "winbond,w25q64",
 436                                                         "jedec,spi-nor";
 437                                         memory-map = <0xff800000 0x00800000>;
 438                                         rw-mrc-cache {
 439                                                 label = "rw-mrc-cache";
 440                                                 reg = <0x003e0000 0x00010000>;
 441                                                 bootph-all;
 442                                         };
 443                                 };
 444                         };
 445
 446                         gpio_a: gpioa {
 447                                 compatible = "intel,ich6-gpio";
 448                                 bootph-all;
 449                                 #gpio-cells = <2>;
 450                                 gpio-controller;
 451                                 reg = <0 0x10>;
 452                                 bank-name = "A";
 453                         };
 454
 455                         gpio_b: gpiob {
 456                                 compatible = "intel,ich6-gpio";
 457                                 bootph-all;
 458                                 #gpio-cells = <2>;
 459                                 gpio-controller;
 460                                 reg = <0x30 0x10>;
 461                                 bank-name = "B";
 462                         };
 463
 464                         gpio_c: gpioc {
 465                                 compatible = "intel,ich6-gpio";
 466                                 bootph-all;
 467                                 #gpio-cells = <2>;
 468                                 gpio-controller;
 469                                 reg = <0x40 0x10>;
 470                                 bank-name = "C";
 471                         };
 472
 473                         lpc {
 474                                 compatible = "intel,bd82x6x-lpc";
 475                                 #address-cells = <1>;
 476                                 #size-cells = <0>;
 477                                 bootph-all;
 478                                 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
 479                                 cros-ec@200 {
 480                                         compatible = "google,cros-ec";
 481                                         reg = <0x204 1 0x200 1 0x880 0x80>;
 482
 483                                         /*
 484                                          * Describes the flash memory within
 485                                          * the EC
 486                                          */
 487                                         #address-cells = <1>;
 488                                         #size-cells = <1>;
 489                                         flash@8000000 {
 490                                                 reg = <0x08000000 0x20000>;
 491                                                 erase-value = <0xff>;
 492                                         };
 493                                 };
 494                         };
 495                 };
 496
 497                 sata@1f,2 {
 498                         compatible = "intel,pantherpoint-ahci";
 499                         reg = <0x0000fa00 0 0 0 0>;
 500                         bootph-all;
 501                         intel,sata-mode = "ahci";
 502                         intel,sata-port-map = <1>;
 503                         intel,sata-port0-gen3-tx = <0x00880a7f>;
 504                 };
 505
 506                 smbus: smbus@1f,3 {
 507                         compatible = "intel,ich-i2c";
 508                         reg = <0x0000fb00 0 0 0 0>;
 509                         bootph-all;
 510                 };
 511         };
 512
 513         tpm {
 514                 reg = <0xfed40000 0x5000>;
 515                 compatible = "infineon,slb9635lpc";
 516         };
 517
 518         microcode {
 519                 bootph-all;
 520                 update@0 {
 521                         bootph-all;
 522 #include "microcode/m12306a9_0000001b.dtsi"
 523                 };
 524         };
 525
 526 };
 527
 528 &creative_codec {
 529         verbs =  <
 530                 /**
 531                  * Malcolm Setup. These correspond to the Intel HDA
 532                  * specification.
 533                  */
 534                 0x01570d09 0x01570c23 0x01570a01 0x01570df0
 535                 0x01570efe 0x01570775 0x015707d3 0x01570709
 536                 0x01570753 0x015707d4 0x015707ef 0x01570775
 537                 0x015707d3 0x01570709 0x01570702 0x01570737
 538                 0x01570778 0x01553cce 0x015575c9 0x01553dce
 539                 0x0155b7c9 0x01570de8 0x01570efe 0x01570702
 540                 0x01570768 0x01570762 0x01553ace 0x015546c9
 541                 0x01553bce 0x0155e8c9 0x01570d49 0x01570c88
 542                 0x01570d20 0x01570e19 0x01570700 0x01571a05
 543                 0x01571b29 0x01571a04 0x01571b29 0x01570a01
 544
 545                 /* Pin Widget Verb Table */
 546
 547                 /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x144dc0c2 */
 548                 AZALIA_SUBVENDOR(0x0, 0x144dc0c2)
 549
 550                 /*
 551                  * Pin Complex (NID 0x0B)  Port-G Analog Unknown
 552                  * Speaker at Int N/A
 553                  */
 554                 AZALIA_PIN_CFG(0x0, 0x0b, 0x901700f0)
 555
 556                 /* Pin Complex (NID 0x0C)  N/C */
 557                 AZALIA_PIN_CFG(0x0, 0x0c, 0x70f000f0)
 558
 559                 /* Pin Complex (NID 0x0D)  N/C */
 560                 AZALIA_PIN_CFG(0x0, 0x0d, 0x70f000f0)
 561
 562                 /* Pin Complex (NID 0x0E)  N/C */
 563                 AZALIA_PIN_CFG(0x0, 0x0e, 0x70f000f0)
 564
 565                 /* Pin Complex (NID 0x0F)  N/C */
 566                 AZALIA_PIN_CFG(0x0, 0x0f, 0x70f000f0)
 567
 568                 /* Pin Complex (NID 0x10) Port-D 1/8 Black HP Out at Ext Left */
 569                 AZALIA_PIN_CFG(0x0, 0x10, 0x032110f0)
 570
 571                 /* Pin Complex (NID 0x11) Port-B Click Mic */
 572                 AZALIA_PIN_CFG(0x0, 0x11, 0x90a700f0)
 573
 574                 /* Pin Complex (NID 0x12) Port-C Combo Jack Mic or D-Mic */
 575                 AZALIA_PIN_CFG(0x0, 0x12, 0x03a110f0)
 576
 577                 /* Pin Complex (NID 0x13) What you hear */
 578                 AZALIA_PIN_CFG(0x0, 0x13, 0x90d600f0)>;
 579 };
 580
 581 &intel_hdmi {
 582         verbs = <
 583                 /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
 584                 AZALIA_SUBVENDOR(0x3, 0x80860101)
 585
 586                 /* Pin Complex (NID 0x05) Digital Out at Int HDMI */
 587                 AZALIA_PIN_CFG(0x3, 0x05, 0x18560010)
 588
 589                 /* Pin Complex (NID 0x06) Digital Out at Int HDMI */
 590                 AZALIA_PIN_CFG(0x3, 0x06, 0x18560020)
 591
 592                 /* Pin Complex (NID 0x07) Digital Out at Int HDMI */
 593                 AZALIA_PIN_CFG(0x3, 0x07, 0x18560030)>;
 594 };