1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016 Google, Inc
5 * Based on code from coreboot src/soc/intel/broadwell/cpu.c
15 #include <asm/cpu_x86.h>
16 #include <asm/cpu_common.h>
17 #include <asm/global_data.h>
18 #include <asm/intel_regs.h>
19 #include <asm/lpc_common.h>
23 #include <asm/turbo.h>
24 #include <asm/arch/cpu.h>
25 #include <asm/arch/pch.h>
26 #include <asm/arch/rcb.h>
28 static int broadwell_init_cpu(void *ctx, struct event *event)
33 /* Start up the LPC so we have serial */
34 ret = uclass_first_device_err(UCLASS_LPC, &dev);
37 ret = cpu_set_flex_ratio_to_tdp_nominal();
43 EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu);
45 void set_max_freq(void)
49 if (cpu_config_tdp_levels()) {
50 /* Set to nominal TDP ratio */
51 msr = msr_read(MSR_CONFIG_TDP_NOMINAL);
52 perf_ctl.lo = (msr.lo & 0xff) << 8;
54 /* Platform Info bits 15:8 give max ratio */
55 msr = msr_read(MSR_PLATFORM_INFO);
56 perf_ctl.lo = msr.lo & 0xff00;
60 msr_write(MSR_IA32_PERF_CTL, perf_ctl);
62 debug("CPU: frequency set to %d MHz\n",
63 ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
66 int arch_cpu_init(void)
68 post_code(POST_CPU_INIT);
71 /* Do a mini-init if TPL has already done the full init */
72 return x86_cpu_reinit_f();
74 return x86_cpu_init_f();
84 ret = cpu_common_init();
87 gd->arch.pei_boot_mode = PEI_BOOT_NONE;
92 int print_cpuinfo(void)
94 char processor_name[CPU_MAX_NAME_LEN];
97 /* Print processor name */
98 name = cpu_get_name(processor_name);
99 printf("CPU: %s\n", name);
104 void board_debug_uart_init(void)
106 /* com1 / com2 decode range */
107 pci_x86_write_config(PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16);
109 pci_x86_write_config(PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, PCI_SIZE_16);