arch/x86/cpu/baytrail/valleyview.c

   1 /*
   2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <mmc.h>
   9 #include <pci_ids.h>
  10 #include <asm/irq.h>
  11 #include <asm/mrccache.h>
  12 #include <asm/post.h>
  13
  14 static struct pci_device_id mmc_supported[] = {
  15         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
  16         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
  17 };
  18
  19 int cpu_mmc_init(bd_t *bis)
  20 {
  21         return pci_mmc_init("ValleyView SDHCI", mmc_supported,
  22                             ARRAY_SIZE(mmc_supported));
  23 }
  24
  25 #ifndef CONFIG_EFI_APP
  26 int arch_cpu_init(void)
  27 {
  28         int ret;
  29
  30         post_code(POST_CPU_INIT);
  31 #ifdef CONFIG_SYS_X86_TSC_TIMER
  32         timer_set_base(rdtsc());
  33 #endif
  34
  35         ret = x86_cpu_init_f();
  36         if (ret)
  37                 return ret;
  38
  39         return 0;
  40 }
  41
  42 int arch_misc_init(void)
  43 {
  44         if (!ll_boot_init())
  45                 return 0;
  46
  47 #ifdef CONFIG_ENABLE_MRC_CACHE
  48         /*
  49          * We intend not to check any return value here, as even MRC cache
  50          * is not saved successfully, it is not a severe error that will
  51          * prevent system from continuing to boot.
  52          */
  53         mrccache_save();
  54 #endif
  55
  56         return pirq_init();
  57 }
  58
  59 int reserve_arch(void)
  60 {
  61 #ifdef CONFIG_ENABLE_MRC_CACHE
  62         return mrccache_reserve();
  63 #else
  64         return 0;
  65 #endif
  66 }
  67 #endif
  68
  69 void reset_cpu(ulong addr)
  70 {
  71         /* cold reset */
  72         x86_full_reset();
  73 }