arch/x86/cpu/apollolake/spl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2019 Google LLC
   4  */
   5
   6 #include <common.h>
   7 #include <binman_sym.h>
   8 #include <bootstage.h>
   9 #include <dm.h>
  10 #include <image.h>
  11 #include <malloc.h>
  12 #include <spi.h>
  13 #include <spl.h>
  14 #include <spi_flash.h>
  15 #include <asm/fast_spi.h>
  16 #include <asm/spl.h>
  17 #include <asm/arch/cpu.h>
  18 #include <asm/arch/iomap.h>
  19 #include <dm/device-internal.h>
  20 #include <dm/uclass-internal.h>
  21
  22 /* This reads the next phase from mapped SPI flash */
  23 static int rom_load_image(struct spl_image_info *spl_image,
  24                           struct spl_boot_device *bootdev)
  25 {
  26         ulong spl_pos = spl_get_image_pos();
  27         ulong spl_size = spl_get_image_size();
  28         struct udevice *dev;
  29         ulong map_base;
  30         size_t map_size;
  31         uint offset;
  32         int ret;
  33
  34         spl_image->size = CONFIG_SYS_MONITOR_LEN;  /* We don't know SPL size */
  35         spl_image->entry_point = spl_phase() == PHASE_TPL ?
  36                 CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
  37         spl_image->load_addr = spl_image->entry_point;
  38         spl_image->os = IH_OS_U_BOOT;
  39         spl_image->name = "U-Boot";
  40         debug("Reading from mapped SPI %lx, size %lx", spl_pos, spl_size);
  41
  42         if (CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)) {
  43                 ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
  44                 if (ret)
  45                         return log_msg_ret("spi_flash", ret);
  46                 if (!dev)
  47                         return log_msg_ret("spi_flash dev", -ENODEV);
  48                 ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
  49                 if (ret)
  50                         return log_msg_ret("mmap", ret);
  51         } else {
  52                 ret = fast_spi_get_bios_mmap(PCH_DEV_SPI, &map_base, &map_size,
  53                                              &offset);
  54                 if (ret)
  55                         return ret;
  56         }
  57         spl_pos += map_base & ~0xff000000;
  58         debug(", base %lx, pos %lx\n", map_base, spl_pos);
  59         bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
  60         memcpy((void *)spl_image->load_addr, (void *)spl_pos, spl_size);
  61         cpu_flush_l1d_to_l2();
  62         bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
  63
  64         return 0;
  65 }
  66 SPL_LOAD_IMAGE_METHOD("Mapped SPI", 2, BOOT_DEVICE_SPI_MMAP, rom_load_image);
  67
  68 #if CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)
  69
  70 static int apl_flash_std_read(struct udevice *dev, u32 offset, size_t len,
  71                               void *buf)
  72 {
  73         struct spi_flash *flash = dev_get_uclass_priv(dev);
  74         struct mtd_info *mtd = &flash->mtd;
  75         size_t retlen;
  76
  77         return log_ret(mtd->_read(mtd, offset, len, &retlen, buf));
  78 }
  79
  80 static int apl_flash_probe(struct udevice *dev)
  81 {
  82         return spi_flash_std_probe(dev);
  83 }
  84
  85 /*
  86  * Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also
  87  * need to allocate the parent_platdata since by the time this function is
  88  * called device_bind() has already gone past that step.
  89  */
  90 static int apl_flash_bind(struct udevice *dev)
  91 {
  92         if (CONFIG_IS_ENABLED(OF_PLATDATA)) {
  93                 struct dm_spi_slave_platdata *plat;
  94                 struct udevice *spi;
  95                 int ret;
  96
  97                 ret = uclass_first_device_err(UCLASS_SPI, &spi);
  98                 if (ret)
  99                         return ret;
 100                 dev->parent = spi;
 101
 102                 plat = calloc(sizeof(*plat), 1);
 103                 if (!plat)
 104                         return -ENOMEM;
 105                 dev->parent_platdata = plat;
 106         }
 107
 108         return 0;
 109 }
 110
 111 static const struct dm_spi_flash_ops apl_flash_ops = {
 112         .read           = apl_flash_std_read,
 113 };
 114
 115 static const struct udevice_id apl_flash_ids[] = {
 116         { .compatible = "jedec,spi-nor" },
 117         { }
 118 };
 119
 120 U_BOOT_DRIVER(winbond_w25q128fw) = {
 121         .name           = "winbond_w25q128fw",
 122         .id             = UCLASS_SPI_FLASH,
 123         .of_match       = apl_flash_ids,
 124         .bind           = apl_flash_bind,
 125         .probe          = apl_flash_probe,
 126         .priv_auto_alloc_size = sizeof(struct spi_flash),
 127         .ops            = &apl_flash_ops,
 128 };
 129
 130 /* This uses a SPI flash device to read the next phase */
 131 static int spl_fast_spi_load_image(struct spl_image_info *spl_image,
 132                                    struct spl_boot_device *bootdev)
 133 {
 134         ulong spl_pos = spl_get_image_pos();
 135         ulong spl_size = spl_get_image_size();
 136         struct udevice *dev;
 137         int ret;
 138
 139         ret = uclass_first_device_err(UCLASS_SPI_FLASH, &dev);
 140         if (ret)
 141                 return ret;
 142
 143         spl_image->size = CONFIG_SYS_MONITOR_LEN;  /* We don't know SPL size */
 144         spl_image->entry_point = spl_phase() == PHASE_TPL ?
 145                 CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
 146         spl_image->load_addr = spl_image->entry_point;
 147         spl_image->os = IH_OS_U_BOOT;
 148         spl_image->name = "U-Boot";
 149         spl_pos &= ~0xff000000;
 150         debug("Reading from flash %lx, size %lx\n", spl_pos, spl_size);
 151         ret = spi_flash_read_dm(dev, spl_pos, spl_size,
 152                                 (void *)spl_image->load_addr);
 153         cpu_flush_l1d_to_l2();
 154         if (ret)
 155                 return ret;
 156
 157         return 0;
 158 }
 159 SPL_LOAD_IMAGE_METHOD("Fast SPI", 1, BOOT_DEVICE_FAST_SPI,
 160                       spl_fast_spi_load_image);
 161
 162 void board_boot_order(u32 *spl_boot_list)
 163 {
 164         bool use_spi_flash = IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH);
 165
 166         if (use_spi_flash) {
 167                 spl_boot_list[0] = BOOT_DEVICE_FAST_SPI;
 168                 spl_boot_list[1] = BOOT_DEVICE_SPI_MMAP;
 169         } else {
 170                 spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP;
 171                 spl_boot_list[1] = BOOT_DEVICE_FAST_SPI;
 172         }
 173 }
 174
 175 #else
 176
 177 void board_boot_order(u32 *spl_boot_list)
 178 {
 179         spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP;
 180 }
 181 #endif