1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2019 Google LLC
7 #include <binman_sym.h>
15 #include <spi_flash.h>
16 #include <asm/fast_spi.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/iomap.h>
20 #include <dm/device-internal.h>
21 #include <dm/uclass-internal.h>
23 /* This reads the next phase from mapped SPI flash */
24 static int rom_load_image(struct spl_image_info *spl_image,
25 struct spl_boot_device *bootdev)
27 ulong spl_pos = spl_get_image_pos();
28 ulong spl_size = spl_get_image_size();
35 spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */
36 spl_image->entry_point = spl_phase() == PHASE_TPL ?
37 CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
38 spl_image->load_addr = spl_image->entry_point;
39 spl_image->os = IH_OS_U_BOOT;
40 spl_image->name = "U-Boot";
41 debug("Reading from mapped SPI %lx, size %lx", spl_pos, spl_size);
43 if (CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)) {
44 ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
46 return log_msg_ret("spi_flash", ret);
48 return log_msg_ret("spi_flash dev", -ENODEV);
49 ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
51 return log_msg_ret("mmap", ret);
53 ret = fast_spi_get_bios_mmap(PCH_DEV_SPI, &map_base, &map_size,
58 spl_pos += map_base & ~0xff000000;
59 debug(", base %lx, pos %lx\n", map_base, spl_pos);
60 bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
61 memcpy((void *)spl_image->load_addr, (void *)spl_pos, spl_size);
62 cpu_flush_l1d_to_l2();
63 bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
67 SPL_LOAD_IMAGE_METHOD("Mapped SPI", 2, BOOT_DEVICE_SPI_MMAP, rom_load_image);
69 #if CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)
71 static int apl_flash_std_read(struct udevice *dev, u32 offset, size_t len,
74 struct spi_flash *flash = dev_get_uclass_priv(dev);
75 struct mtd_info *mtd = &flash->mtd;
78 return log_ret(mtd->_read(mtd, offset, len, &retlen, buf));
81 static int apl_flash_probe(struct udevice *dev)
83 return spi_flash_std_probe(dev);
87 * Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also
88 * need to allocate the parent_plat since by the time this function is
89 * called device_bind() has already gone past that step.
91 static int apl_flash_bind(struct udevice *dev)
93 if (CONFIG_IS_ENABLED(OF_PLATDATA) &&
94 !CONFIG_IS_ENABLED(OF_PLATDATA_PARENT)) {
95 struct dm_spi_slave_platdata *plat;
99 ret = uclass_first_device_err(UCLASS_SPI, &spi);
104 plat = calloc(sizeof(*plat), 1);
107 dev->parent_plat = plat;
113 static const struct dm_spi_flash_ops apl_flash_ops = {
114 .read = apl_flash_std_read,
117 static const struct udevice_id apl_flash_ids[] = {
118 { .compatible = "jedec,spi-nor" },
122 U_BOOT_DRIVER(winbond_w25q128fw) = {
123 .name = "winbond_w25q128fw",
124 .id = UCLASS_SPI_FLASH,
125 .of_match = apl_flash_ids,
126 .bind = apl_flash_bind,
127 .probe = apl_flash_probe,
128 .priv_auto = sizeof(struct spi_flash),
129 .ops = &apl_flash_ops,
132 /* This uses a SPI flash device to read the next phase */
133 static int spl_fast_spi_load_image(struct spl_image_info *spl_image,
134 struct spl_boot_device *bootdev)
136 ulong spl_pos = spl_get_image_pos();
137 ulong spl_size = spl_get_image_size();
141 ret = uclass_first_device_err(UCLASS_SPI_FLASH, &dev);
145 spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */
146 spl_image->entry_point = spl_phase() == PHASE_TPL ?
147 CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
148 spl_image->load_addr = spl_image->entry_point;
149 spl_image->os = IH_OS_U_BOOT;
150 spl_image->name = "U-Boot";
151 spl_pos &= ~0xff000000;
152 debug("Reading from flash %lx, size %lx\n", spl_pos, spl_size);
153 ret = spi_flash_read_dm(dev, spl_pos, spl_size,
154 (void *)spl_image->load_addr);
155 cpu_flush_l1d_to_l2();
161 SPL_LOAD_IMAGE_METHOD("Fast SPI", 1, BOOT_DEVICE_FAST_SPI,
162 spl_fast_spi_load_image);
164 void board_boot_order(u32 *spl_boot_list)
166 bool use_spi_flash = IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH);
169 spl_boot_list[0] = BOOT_DEVICE_FAST_SPI;
170 spl_boot_list[1] = BOOT_DEVICE_SPI_MMAP;
172 spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP;
173 spl_boot_list[1] = BOOT_DEVICE_FAST_SPI;
179 void board_boot_order(u32 *spl_boot_list)
181 spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP;