arch/x86/cpu/apollolake/spl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2019 Google LLC
   4  */
   5
   6 #include <common.h>
   7 #include <binman_sym.h>
   8 #include <bootstage.h>
   9 #include <dm.h>
  10 #include <image.h>
  11 #include <log.h>
  12 #include <malloc.h>
  13 #include <spi.h>
  14 #include <spl.h>
  15 #include <spi_flash.h>
  16 #include <asm/fast_spi.h>
  17 #include <asm/spl.h>
  18 #include <asm/arch/cpu.h>
  19 #include <asm/arch/iomap.h>
  20 #include <dm/device-internal.h>
  21 #include <dm/uclass-internal.h>
  22
  23 /* This reads the next phase from mapped SPI flash */
  24 static int rom_load_image(struct spl_image_info *spl_image,
  25                           struct spl_boot_device *bootdev)
  26 {
  27         ulong spl_pos = spl_get_image_pos();
  28         ulong spl_size = spl_get_image_size();
  29         struct udevice *dev;
  30         ulong map_base;
  31         size_t map_size;
  32         uint offset;
  33         int ret;
  34
  35         spl_image->size = CONFIG_SYS_MONITOR_LEN;  /* We don't know SPL size */
  36         spl_image->entry_point = spl_phase() == PHASE_TPL ?
  37                 CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
  38         spl_image->load_addr = spl_image->entry_point;
  39         spl_image->os = IH_OS_U_BOOT;
  40         spl_image->name = "U-Boot";
  41         debug("Reading from mapped SPI %lx, size %lx", spl_pos, spl_size);
  42
  43         if (CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)) {
  44                 ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
  45                 if (ret)
  46                         return log_msg_ret("spi_flash", ret);
  47                 if (!dev)
  48                         return log_msg_ret("spi_flash dev", -ENODEV);
  49                 ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
  50                 if (ret)
  51                         return log_msg_ret("mmap", ret);
  52         } else {
  53                 ret = fast_spi_get_bios_mmap(PCH_DEV_SPI, &map_base, &map_size,
  54                                              &offset);
  55                 if (ret)
  56                         return ret;
  57         }
  58         spl_pos += map_base & ~0xff000000;
  59         debug(", base %lx, pos %lx\n", map_base, spl_pos);
  60         bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
  61         memcpy((void *)spl_image->load_addr, (void *)spl_pos, spl_size);
  62         cpu_flush_l1d_to_l2();
  63         bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
  64
  65         return 0;
  66 }
  67 SPL_LOAD_IMAGE_METHOD("Mapped SPI", 2, BOOT_DEVICE_SPI_MMAP, rom_load_image);
  68
  69 #if CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)
  70
  71 static int apl_flash_std_read(struct udevice *dev, u32 offset, size_t len,
  72                               void *buf)
  73 {
  74         struct spi_flash *flash = dev_get_uclass_priv(dev);
  75         struct mtd_info *mtd = &flash->mtd;
  76         size_t retlen;
  77
  78         return log_ret(mtd->_read(mtd, offset, len, &retlen, buf));
  79 }
  80
  81 static int apl_flash_probe(struct udevice *dev)
  82 {
  83         return spi_flash_std_probe(dev);
  84 }
  85
  86 /*
  87  * Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also
  88  * need to allocate the parent_platdata since by the time this function is
  89  * called device_bind() has already gone past that step.
  90  */
  91 static int apl_flash_bind(struct udevice *dev)
  92 {
  93         if (CONFIG_IS_ENABLED(OF_PLATDATA) &&
  94             !CONFIG_IS_ENABLED(OF_PLATDATA_PARENT)) {
  95                 struct dm_spi_slave_platdata *plat;
  96                 struct udevice *spi;
  97                 int ret;
  98
  99                 ret = uclass_first_device_err(UCLASS_SPI, &spi);
 100                 if (ret)
 101                         return ret;
 102                 dev->parent = spi;
 103
 104                 plat = calloc(sizeof(*plat), 1);
 105                 if (!plat)
 106                         return -ENOMEM;
 107                 dev->parent_platdata = plat;
 108         }
 109
 110         return 0;
 111 }
 112
 113 static const struct dm_spi_flash_ops apl_flash_ops = {
 114         .read           = apl_flash_std_read,
 115 };
 116
 117 static const struct udevice_id apl_flash_ids[] = {
 118         { .compatible = "jedec,spi-nor" },
 119         { }
 120 };
 121
 122 U_BOOT_DRIVER(winbond_w25q128fw) = {
 123         .name           = "winbond_w25q128fw",
 124         .id             = UCLASS_SPI_FLASH,
 125         .of_match       = apl_flash_ids,
 126         .bind           = apl_flash_bind,
 127         .probe          = apl_flash_probe,
 128         .priv_auto      = sizeof(struct spi_flash),
 129         .ops            = &apl_flash_ops,
 130 };
 131
 132 /* This uses a SPI flash device to read the next phase */
 133 static int spl_fast_spi_load_image(struct spl_image_info *spl_image,
 134                                    struct spl_boot_device *bootdev)
 135 {
 136         ulong spl_pos = spl_get_image_pos();
 137         ulong spl_size = spl_get_image_size();
 138         struct udevice *dev;
 139         int ret;
 140
 141         ret = uclass_first_device_err(UCLASS_SPI_FLASH, &dev);
 142         if (ret)
 143                 return ret;
 144
 145         spl_image->size = CONFIG_SYS_MONITOR_LEN;  /* We don't know SPL size */
 146         spl_image->entry_point = spl_phase() == PHASE_TPL ?
 147                 CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
 148         spl_image->load_addr = spl_image->entry_point;
 149         spl_image->os = IH_OS_U_BOOT;
 150         spl_image->name = "U-Boot";
 151         spl_pos &= ~0xff000000;
 152         debug("Reading from flash %lx, size %lx\n", spl_pos, spl_size);
 153         ret = spi_flash_read_dm(dev, spl_pos, spl_size,
 154                                 (void *)spl_image->load_addr);
 155         cpu_flush_l1d_to_l2();
 156         if (ret)
 157                 return ret;
 158
 159         return 0;
 160 }
 161 SPL_LOAD_IMAGE_METHOD("Fast SPI", 1, BOOT_DEVICE_FAST_SPI,
 162                       spl_fast_spi_load_image);
 163
 164 void board_boot_order(u32 *spl_boot_list)
 165 {
 166         bool use_spi_flash = IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH);
 167
 168         if (use_spi_flash) {
 169                 spl_boot_list[0] = BOOT_DEVICE_FAST_SPI;
 170                 spl_boot_list[1] = BOOT_DEVICE_SPI_MMAP;
 171         } else {
 172                 spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP;
 173                 spl_boot_list[1] = BOOT_DEVICE_FAST_SPI;
 174         }
 175 }
 176
 177 #else
 178
 179 void board_boot_order(u32 *spl_boot_list)
 180 {
 181         spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP;
 182 }
 183 #endif