arch/sparc/mm/tsb.c

   1 /* arch/sparc64/mm/tsb.c
   2  *
   3  * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
   4  */
   5
   6 #include <linux/kernel.h>
   7 #include <linux/preempt.h>
   8 #include <linux/slab.h>
   9 #include <asm/system.h>
  10 #include <asm/page.h>
  11 #include <asm/pgtable.h>
  12 #include <asm/mmu_context.h>
  13 #include <asm/tsb.h>
  14 #include <asm/tlb.h>
  15 #include <asm/oplib.h>
  16
  17 extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
  18
  19 static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long hash_shift, unsigned long nentries)
  20 {
  21         vaddr >>= hash_shift;
  22         return vaddr & (nentries - 1);
  23 }
  24
  25 static inline int tag_compare(unsigned long tag, unsigned long vaddr)
  26 {
  27         return (tag == (vaddr >> 22));
  28 }
  29
  30 /* TSB flushes need only occur on the processor initiating the address
  31  * space modification, not on each cpu the address space has run on.
  32  * Only the TLB flush needs that treatment.
  33  */
  34
  35 void flush_tsb_kernel_range(unsigned long start, unsigned long end)
  36 {
  37         unsigned long v;
  38
  39         for (v = start; v < end; v += PAGE_SIZE) {
  40                 unsigned long hash = tsb_hash(v, PAGE_SHIFT,
  41                                               KERNEL_TSB_NENTRIES);
  42                 struct tsb *ent = &swapper_tsb[hash];
  43
  44                 if (tag_compare(ent->tag, v))
  45                         ent->tag = (1UL << TSB_TAG_INVALID_BIT);
  46         }
  47 }
  48
  49 static void __flush_tsb_one_entry(unsigned long tsb, unsigned long v,
  50                                   unsigned long hash_shift,
  51                                   unsigned long nentries)
  52 {
  53         unsigned long tag, ent, hash;
  54
  55         v &= ~0x1UL;
  56         hash = tsb_hash(v, hash_shift, nentries);
  57         ent = tsb + (hash * sizeof(struct tsb));
  58         tag = (v >> 22UL);
  59
  60         tsb_flush(ent, tag);
  61 }
  62
  63 static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
  64                             unsigned long tsb, unsigned long nentries)
  65 {
  66         unsigned long i;
  67
  68         for (i = 0; i < tb->tlb_nr; i++)
  69                 __flush_tsb_one_entry(tsb, tb->vaddrs[i], hash_shift, nentries);
  70 }
  71
  72 void flush_tsb_user(struct tlb_batch *tb)
  73 {
  74         struct mm_struct *mm = tb->mm;
  75         unsigned long nentries, base, flags;
  76
  77         spin_lock_irqsave(&mm->context.lock, flags);
  78
  79         base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
  80         nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
  81         if (tlb_type == cheetah_plus || tlb_type == hypervisor)
  82                 base = __pa(base);
  83         __flush_tsb_one(tb, PAGE_SHIFT, base, nentries);
  84
  85 #ifdef CONFIG_HUGETLB_PAGE
  86         if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
  87                 base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
  88                 nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
  89                 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
  90                         base = __pa(base);
  91                 __flush_tsb_one(tb, HPAGE_SHIFT, base, nentries);
  92         }
  93 #endif
  94         spin_unlock_irqrestore(&mm->context.lock, flags);
  95 }
  96
  97 void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr)
  98 {
  99         unsigned long nentries, base, flags;
 100
 101         spin_lock_irqsave(&mm->context.lock, flags);
 102
 103         base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
 104         nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
 105         if (tlb_type == cheetah_plus || tlb_type == hypervisor)
 106                 base = __pa(base);
 107         __flush_tsb_one_entry(base, vaddr, PAGE_SHIFT, nentries);
 108
 109 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 110         if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
 111                 base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
 112                 nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
 113                 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
 114                         base = __pa(base);
 115                 __flush_tsb_one_entry(base, vaddr, HPAGE_SHIFT, nentries);
 116         }
 117 #endif
 118         spin_unlock_irqrestore(&mm->context.lock, flags);
 119 }
 120
 121 #if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
 122 #define HV_PGSZ_IDX_BASE        HV_PGSZ_IDX_8K
 123 #define HV_PGSZ_MASK_BASE       HV_PGSZ_MASK_8K
 124 #elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
 125 #define HV_PGSZ_IDX_BASE        HV_PGSZ_IDX_64K
 126 #define HV_PGSZ_MASK_BASE       HV_PGSZ_MASK_64K
 127 #else
 128 #error Broken base page size setting...
 129 #endif
 130
 131 #ifdef CONFIG_HUGETLB_PAGE
 132 #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
 133 #define HV_PGSZ_IDX_HUGE        HV_PGSZ_IDX_64K
 134 #define HV_PGSZ_MASK_HUGE       HV_PGSZ_MASK_64K
 135 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
 136 #define HV_PGSZ_IDX_HUGE        HV_PGSZ_IDX_512K
 137 #define HV_PGSZ_MASK_HUGE       HV_PGSZ_MASK_512K
 138 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
 139 #define HV_PGSZ_IDX_HUGE        HV_PGSZ_IDX_4MB
 140 #define HV_PGSZ_MASK_HUGE       HV_PGSZ_MASK_4MB
 141 #else
 142 #error Broken huge page size setting...
 143 #endif
 144 #endif
 145
 146 static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsigned long tsb_bytes)
 147 {
 148         unsigned long tsb_reg, base, tsb_paddr;
 149         unsigned long page_sz, tte;
 150
 151         mm->context.tsb_block[tsb_idx].tsb_nentries =
 152                 tsb_bytes / sizeof(struct tsb);
 153
 154         base = TSBMAP_BASE;
 155         tte = pgprot_val(PAGE_KERNEL_LOCKED);
 156         tsb_paddr = __pa(mm->context.tsb_block[tsb_idx].tsb);
 157         BUG_ON(tsb_paddr & (tsb_bytes - 1UL));
 158
 159         /* Use the smallest page size that can map the whole TSB
 160          * in one TLB entry.
 161          */
 162         switch (tsb_bytes) {
 163         case 8192 << 0:
 164                 tsb_reg = 0x0UL;
 165 #ifdef DCACHE_ALIASING_POSSIBLE
 166                 base += (tsb_paddr & 8192);
 167 #endif
 168                 page_sz = 8192;
 169                 break;
 170
 171         case 8192 << 1:
 172                 tsb_reg = 0x1UL;
 173                 page_sz = 64 * 1024;
 174                 break;
 175
 176         case 8192 << 2:
 177                 tsb_reg = 0x2UL;
 178                 page_sz = 64 * 1024;
 179                 break;
 180
 181         case 8192 << 3:
 182                 tsb_reg = 0x3UL;
 183                 page_sz = 64 * 1024;
 184                 break;
 185
 186         case 8192 << 4:
 187                 tsb_reg = 0x4UL;
 188                 page_sz = 512 * 1024;
 189                 break;
 190
 191         case 8192 << 5:
 192                 tsb_reg = 0x5UL;
 193                 page_sz = 512 * 1024;
 194                 break;
 195
 196         case 8192 << 6:
 197                 tsb_reg = 0x6UL;
 198                 page_sz = 512 * 1024;
 199                 break;
 200
 201         case 8192 << 7:
 202                 tsb_reg = 0x7UL;
 203                 page_sz = 4 * 1024 * 1024;
 204                 break;
 205
 206         default:
 207                 printk(KERN_ERR "TSB[%s:%d]: Impossible TSB size %lu, killing process.\n",
 208                        current->comm, current->pid, tsb_bytes);
 209                 do_exit(SIGSEGV);
 210         }
 211         tte |= pte_sz_bits(page_sz);
 212
 213         if (tlb_type == cheetah_plus || tlb_type == hypervisor) {
 214                 /* Physical mapping, no locked TLB entry for TSB.  */
 215                 tsb_reg |= tsb_paddr;
 216
 217                 mm->context.tsb_block[tsb_idx].tsb_reg_val = tsb_reg;
 218                 mm->context.tsb_block[tsb_idx].tsb_map_vaddr = 0;
 219                 mm->context.tsb_block[tsb_idx].tsb_map_pte = 0;
 220         } else {
 221                 tsb_reg |= base;
 222                 tsb_reg |= (tsb_paddr & (page_sz - 1UL));
 223                 tte |= (tsb_paddr & ~(page_sz - 1UL));
 224
 225                 mm->context.tsb_block[tsb_idx].tsb_reg_val = tsb_reg;
 226                 mm->context.tsb_block[tsb_idx].tsb_map_vaddr = base;
 227                 mm->context.tsb_block[tsb_idx].tsb_map_pte = tte;
 228         }
 229
 230         /* Setup the Hypervisor TSB descriptor.  */
 231         if (tlb_type == hypervisor) {
 232                 struct hv_tsb_descr *hp = &mm->context.tsb_descr[tsb_idx];
 233
 234                 switch (tsb_idx) {
 235                 case MM_TSB_BASE:
 236                         hp->pgsz_idx = HV_PGSZ_IDX_BASE;
 237                         break;
 238 #ifdef CONFIG_HUGETLB_PAGE
 239                 case MM_TSB_HUGE:
 240                         hp->pgsz_idx = HV_PGSZ_IDX_HUGE;
 241                         break;
 242 #endif
 243                 default:
 244                         BUG();
 245                 }
 246                 hp->assoc = 1;
 247                 hp->num_ttes = tsb_bytes / 16;
 248                 hp->ctx_idx = 0;
 249                 switch (tsb_idx) {
 250                 case MM_TSB_BASE:
 251                         hp->pgsz_mask = HV_PGSZ_MASK_BASE;
 252                         break;
 253 #ifdef CONFIG_HUGETLB_PAGE
 254                 case MM_TSB_HUGE:
 255                         hp->pgsz_mask = HV_PGSZ_MASK_HUGE;
 256                         break;
 257 #endif
 258                 default:
 259                         BUG();
 260                 }
 261                 hp->tsb_base = tsb_paddr;
 262                 hp->resv = 0;
 263         }
 264 }
 265
 266 static struct kmem_cache *tsb_caches[8] __read_mostly;
 267
 268 static const char *tsb_cache_names[8] = {
 269         "tsb_8KB",
 270         "tsb_16KB",
 271         "tsb_32KB",
 272         "tsb_64KB",
 273         "tsb_128KB",
 274         "tsb_256KB",
 275         "tsb_512KB",
 276         "tsb_1MB",
 277 };
 278
 279 void __init pgtable_cache_init(void)
 280 {
 281         unsigned long i;
 282
 283         for (i = 0; i < 8; i++) {
 284                 unsigned long size = 8192 << i;
 285                 const char *name = tsb_cache_names[i];
 286
 287                 tsb_caches[i] = kmem_cache_create(name,
 288                                                   size, size,
 289                                                   0, NULL);
 290                 if (!tsb_caches[i]) {
 291                         prom_printf("Could not create %s cache\n", name);
 292                         prom_halt();
 293                 }
 294         }
 295 }
 296
 297 int sysctl_tsb_ratio = -2;
 298
 299 static unsigned long tsb_size_to_rss_limit(unsigned long new_size)
 300 {
 301         unsigned long num_ents = (new_size / sizeof(struct tsb));
 302
 303         if (sysctl_tsb_ratio < 0)
 304                 return num_ents - (num_ents >> -sysctl_tsb_ratio);
 305         else
 306                 return num_ents + (num_ents >> sysctl_tsb_ratio);
 307 }
 308
 309 /* When the RSS of an address space exceeds tsb_rss_limit for a TSB,
 310  * do_sparc64_fault() invokes this routine to try and grow it.
 311  *
 312  * When we reach the maximum TSB size supported, we stick ~0UL into
 313  * tsb_rss_limit for that TSB so the grow checks in do_sparc64_fault()
 314  * will not trigger any longer.
 315  *
 316  * The TSB can be anywhere from 8K to 1MB in size, in increasing powers
 317  * of two.  The TSB must be aligned to it's size, so f.e. a 512K TSB
 318  * must be 512K aligned.  It also must be physically contiguous, so we
 319  * cannot use vmalloc().
 320  *
 321  * The idea here is to grow the TSB when the RSS of the process approaches
 322  * the number of entries that the current TSB can hold at once.  Currently,
 323  * we trigger when the RSS hits 3/4 of the TSB capacity.
 324  */
 325 void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long rss)
 326 {
 327         unsigned long max_tsb_size = 1 * 1024 * 1024;
 328         unsigned long new_size, old_size, flags;
 329         struct tsb *old_tsb, *new_tsb;
 330         unsigned long new_cache_index, old_cache_index;
 331         unsigned long new_rss_limit;
 332         gfp_t gfp_flags;
 333
 334         if (max_tsb_size > (PAGE_SIZE << MAX_ORDER))
 335                 max_tsb_size = (PAGE_SIZE << MAX_ORDER);
 336
 337         new_cache_index = 0;
 338         for (new_size = 8192; new_size < max_tsb_size; new_size <<= 1UL) {
 339                 new_rss_limit = tsb_size_to_rss_limit(new_size);
 340                 if (new_rss_limit > rss)
 341                         break;
 342                 new_cache_index++;
 343         }
 344
 345         if (new_size == max_tsb_size)
 346                 new_rss_limit = ~0UL;
 347
 348 retry_tsb_alloc:
 349         gfp_flags = GFP_KERNEL;
 350         if (new_size > (PAGE_SIZE * 2))
 351                 gfp_flags = __GFP_NOWARN | __GFP_NORETRY;
 352
 353         new_tsb = kmem_cache_alloc_node(tsb_caches[new_cache_index],
 354                                         gfp_flags, numa_node_id());
 355         if (unlikely(!new_tsb)) {
 356                 /* Not being able to fork due to a high-order TSB
 357                  * allocation failure is very bad behavior.  Just back
 358                  * down to a 0-order allocation and force no TSB
 359                  * growing for this address space.
 360                  */
 361                 if (mm->context.tsb_block[tsb_index].tsb == NULL &&
 362                     new_cache_index > 0) {
 363                         new_cache_index = 0;
 364                         new_size = 8192;
 365                         new_rss_limit = ~0UL;
 366                         goto retry_tsb_alloc;
 367                 }
 368
 369                 /* If we failed on a TSB grow, we are under serious
 370                  * memory pressure so don't try to grow any more.
 371                  */
 372                 if (mm->context.tsb_block[tsb_index].tsb != NULL)
 373                         mm->context.tsb_block[tsb_index].tsb_rss_limit = ~0UL;
 374                 return;
 375         }
 376
 377         /* Mark all tags as invalid.  */
 378         tsb_init(new_tsb, new_size);
 379
 380         /* Ok, we are about to commit the changes.  If we are
 381          * growing an existing TSB the locking is very tricky,
 382          * so WATCH OUT!
 383          *
 384          * We have to hold mm->context.lock while committing to the
 385          * new TSB, this synchronizes us with processors in
 386          * flush_tsb_user() and switch_mm() for this address space.
 387          *
 388          * But even with that lock held, processors run asynchronously
 389          * accessing the old TSB via TLB miss handling.  This is OK
 390          * because those actions are just propagating state from the
 391          * Linux page tables into the TSB, page table mappings are not
 392          * being changed.  If a real fault occurs, the processor will
 393          * synchronize with us when it hits flush_tsb_user(), this is
 394          * also true for the case where vmscan is modifying the page
 395          * tables.  The only thing we need to be careful with is to
 396          * skip any locked TSB entries during copy_tsb().
 397          *
 398          * When we finish committing to the new TSB, we have to drop
 399          * the lock and ask all other cpus running this address space
 400          * to run tsb_context_switch() to see the new TSB table.
 401          */
 402         spin_lock_irqsave(&mm->context.lock, flags);
 403
 404         old_tsb = mm->context.tsb_block[tsb_index].tsb;
 405         old_cache_index =
 406                 (mm->context.tsb_block[tsb_index].tsb_reg_val & 0x7UL);
 407         old_size = (mm->context.tsb_block[tsb_index].tsb_nentries *
 408                     sizeof(struct tsb));
 409
 410
 411         /* Handle multiple threads trying to grow the TSB at the same time.
 412          * One will get in here first, and bump the size and the RSS limit.
 413          * The others will get in here next and hit this check.
 414          */
 415         if (unlikely(old_tsb &&
 416                      (rss < mm->context.tsb_block[tsb_index].tsb_rss_limit))) {
 417                 spin_unlock_irqrestore(&mm->context.lock, flags);
 418
 419                 kmem_cache_free(tsb_caches[new_cache_index], new_tsb);
 420                 return;
 421         }
 422
 423         mm->context.tsb_block[tsb_index].tsb_rss_limit = new_rss_limit;
 424
 425         if (old_tsb) {
 426                 extern void copy_tsb(unsigned long old_tsb_base,
 427                                      unsigned long old_tsb_size,
 428                                      unsigned long new_tsb_base,
 429                                      unsigned long new_tsb_size);
 430                 unsigned long old_tsb_base = (unsigned long) old_tsb;
 431                 unsigned long new_tsb_base = (unsigned long) new_tsb;
 432
 433                 if (tlb_type == cheetah_plus || tlb_type == hypervisor) {
 434                         old_tsb_base = __pa(old_tsb_base);
 435                         new_tsb_base = __pa(new_tsb_base);
 436                 }
 437                 copy_tsb(old_tsb_base, old_size, new_tsb_base, new_size);
 438         }
 439
 440         mm->context.tsb_block[tsb_index].tsb = new_tsb;
 441         setup_tsb_params(mm, tsb_index, new_size);
 442
 443         spin_unlock_irqrestore(&mm->context.lock, flags);
 444
 445         /* If old_tsb is NULL, we're being invoked for the first time
 446          * from init_new_context().
 447          */
 448         if (old_tsb) {
 449                 /* Reload it on the local cpu.  */
 450                 tsb_context_switch(mm);
 451
 452                 /* Now force other processors to do the same.  */
 453                 preempt_disable();
 454                 smp_tsb_sync(mm);
 455                 preempt_enable();
 456
 457                 /* Now it is safe to free the old tsb.  */
 458                 kmem_cache_free(tsb_caches[old_cache_index], old_tsb);
 459         }
 460 }
 461
 462 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 463 {
 464 #ifdef CONFIG_HUGETLB_PAGE
 465         unsigned long huge_pte_count;
 466 #endif
 467         unsigned int i;
 468
 469         spin_lock_init(&mm->context.lock);
 470
 471         mm->context.sparc64_ctx_val = 0UL;
 472
 473 #ifdef CONFIG_HUGETLB_PAGE
 474         /* We reset it to zero because the fork() page copying
 475          * will re-increment the counters as the parent PTEs are
 476          * copied into the child address space.
 477          */
 478         huge_pte_count = mm->context.huge_pte_count;
 479         mm->context.huge_pte_count = 0;
 480 #endif
 481
 482         /* copy_mm() copies over the parent's mm_struct before calling
 483          * us, so we need to zero out the TSB pointer or else tsb_grow()
 484          * will be confused and think there is an older TSB to free up.
 485          */
 486         for (i = 0; i < MM_NUM_TSBS; i++)
 487                 mm->context.tsb_block[i].tsb = NULL;
 488
 489         /* If this is fork, inherit the parent's TSB size.  We would
 490          * grow it to that size on the first page fault anyways.
 491          */
 492         tsb_grow(mm, MM_TSB_BASE, get_mm_rss(mm));
 493
 494 #ifdef CONFIG_HUGETLB_PAGE
 495         if (unlikely(huge_pte_count))
 496                 tsb_grow(mm, MM_TSB_HUGE, huge_pte_count);
 497 #endif
 498
 499         if (unlikely(!mm->context.tsb_block[MM_TSB_BASE].tsb))
 500                 return -ENOMEM;
 501
 502         return 0;
 503 }
 504
 505 static void tsb_destroy_one(struct tsb_config *tp)
 506 {
 507         unsigned long cache_index;
 508
 509         if (!tp->tsb)
 510                 return;
 511         cache_index = tp->tsb_reg_val & 0x7UL;
 512         kmem_cache_free(tsb_caches[cache_index], tp->tsb);
 513         tp->tsb = NULL;
 514         tp->tsb_reg_val = 0UL;
 515 }
 516
 517 void destroy_context(struct mm_struct *mm)
 518 {
 519         unsigned long flags, i;
 520
 521         for (i = 0; i < MM_NUM_TSBS; i++)
 522                 tsb_destroy_one(&mm->context.tsb_block[i]);
 523
 524         spin_lock_irqsave(&ctx_alloc_lock, flags);
 525
 526         if (CTX_VALID(mm->context)) {
 527                 unsigned long nr = CTX_NRBITS(mm->context);
 528                 mmu_context_bmap[nr>>6] &= ~(1UL << (nr & 63));
 529         }
 530
 531         spin_unlock_irqrestore(&ctx_alloc_lock, flags);
 532 }