clocksource: Use a plain u64 instead of cycle_t
[platform/kernel/linux-starfive.git] / arch / sparc / kernel / time_64.c
1 /* time.c: UltraSparc timer and TOD clock support.
2  *
3  * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
4  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
5  *
6  * Based largely on code which is:
7  *
8  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
9  */
10
11 #include <linux/errno.h>
12 #include <linux/export.h>
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
15 #include <linux/param.h>
16 #include <linux/string.h>
17 #include <linux/mm.h>
18 #include <linux/interrupt.h>
19 #include <linux/time.h>
20 #include <linux/timex.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/mc146818rtc.h>
24 #include <linux/delay.h>
25 #include <linux/profile.h>
26 #include <linux/bcd.h>
27 #include <linux/jiffies.h>
28 #include <linux/cpufreq.h>
29 #include <linux/percpu.h>
30 #include <linux/miscdevice.h>
31 #include <linux/rtc/m48t59.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/clockchips.h>
34 #include <linux/clocksource.h>
35 #include <linux/of_device.h>
36 #include <linux/platform_device.h>
37 #include <linux/ftrace.h>
38
39 #include <asm/oplib.h>
40 #include <asm/timer.h>
41 #include <asm/irq.h>
42 #include <asm/io.h>
43 #include <asm/prom.h>
44 #include <asm/starfire.h>
45 #include <asm/smp.h>
46 #include <asm/sections.h>
47 #include <asm/cpudata.h>
48 #include <linux/uaccess.h>
49 #include <asm/irq_regs.h>
50
51 #include "entry.h"
52
53 DEFINE_SPINLOCK(rtc_lock);
54
55 #define TICK_PRIV_BIT   (1UL << 63)
56 #define TICKCMP_IRQ_BIT (1UL << 63)
57
58 #ifdef CONFIG_SMP
59 unsigned long profile_pc(struct pt_regs *regs)
60 {
61         unsigned long pc = instruction_pointer(regs);
62
63         if (in_lock_functions(pc))
64                 return regs->u_regs[UREG_RETPC];
65         return pc;
66 }
67 EXPORT_SYMBOL(profile_pc);
68 #endif
69
70 static void tick_disable_protection(void)
71 {
72         /* Set things up so user can access tick register for profiling
73          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
74          * read back of %tick after writing it.
75          */
76         __asm__ __volatile__(
77         "       ba,pt   %%xcc, 1f\n"
78         "        nop\n"
79         "       .align  64\n"
80         "1:     rd      %%tick, %%g2\n"
81         "       add     %%g2, 6, %%g2\n"
82         "       andn    %%g2, %0, %%g2\n"
83         "       wrpr    %%g2, 0, %%tick\n"
84         "       rdpr    %%tick, %%g0"
85         : /* no outputs */
86         : "r" (TICK_PRIV_BIT)
87         : "g2");
88 }
89
90 static void tick_disable_irq(void)
91 {
92         __asm__ __volatile__(
93         "       ba,pt   %%xcc, 1f\n"
94         "        nop\n"
95         "       .align  64\n"
96         "1:     wr      %0, 0x0, %%tick_cmpr\n"
97         "       rd      %%tick_cmpr, %%g0"
98         : /* no outputs */
99         : "r" (TICKCMP_IRQ_BIT));
100 }
101
102 static void tick_init_tick(void)
103 {
104         tick_disable_protection();
105         tick_disable_irq();
106 }
107
108 static unsigned long long tick_get_tick(void)
109 {
110         unsigned long ret;
111
112         __asm__ __volatile__("rd        %%tick, %0\n\t"
113                              "mov       %0, %0"
114                              : "=r" (ret));
115
116         return ret & ~TICK_PRIV_BIT;
117 }
118
119 static int tick_add_compare(unsigned long adj)
120 {
121         unsigned long orig_tick, new_tick, new_compare;
122
123         __asm__ __volatile__("rd        %%tick, %0"
124                              : "=r" (orig_tick));
125
126         orig_tick &= ~TICKCMP_IRQ_BIT;
127
128         /* Workaround for Spitfire Errata (#54 I think??), I discovered
129          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
130          * number 103640.
131          *
132          * On Blackbird writes to %tick_cmpr can fail, the
133          * workaround seems to be to execute the wr instruction
134          * at the start of an I-cache line, and perform a dummy
135          * read back from %tick_cmpr right after writing to it. -DaveM
136          */
137         __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t"
138                              " add      %1, %2, %0\n\t"
139                              ".align    64\n"
140                              "1:\n\t"
141                              "wr        %0, 0, %%tick_cmpr\n\t"
142                              "rd        %%tick_cmpr, %%g0\n\t"
143                              : "=r" (new_compare)
144                              : "r" (orig_tick), "r" (adj));
145
146         __asm__ __volatile__("rd        %%tick, %0"
147                              : "=r" (new_tick));
148         new_tick &= ~TICKCMP_IRQ_BIT;
149
150         return ((long)(new_tick - (orig_tick+adj))) > 0L;
151 }
152
153 static unsigned long tick_add_tick(unsigned long adj)
154 {
155         unsigned long new_tick;
156
157         /* Also need to handle Blackbird bug here too. */
158         __asm__ __volatile__("rd        %%tick, %0\n\t"
159                              "add       %0, %1, %0\n\t"
160                              "wrpr      %0, 0, %%tick\n\t"
161                              : "=&r" (new_tick)
162                              : "r" (adj));
163
164         return new_tick;
165 }
166
167 static struct sparc64_tick_ops tick_operations __read_mostly = {
168         .name           =       "tick",
169         .init_tick      =       tick_init_tick,
170         .disable_irq    =       tick_disable_irq,
171         .get_tick       =       tick_get_tick,
172         .add_tick       =       tick_add_tick,
173         .add_compare    =       tick_add_compare,
174         .softint_mask   =       1UL << 0,
175 };
176
177 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
178 EXPORT_SYMBOL(tick_ops);
179
180 static void stick_disable_irq(void)
181 {
182         __asm__ __volatile__(
183         "wr     %0, 0x0, %%asr25"
184         : /* no outputs */
185         : "r" (TICKCMP_IRQ_BIT));
186 }
187
188 static void stick_init_tick(void)
189 {
190         /* Writes to the %tick and %stick register are not
191          * allowed on sun4v.  The Hypervisor controls that
192          * bit, per-strand.
193          */
194         if (tlb_type != hypervisor) {
195                 tick_disable_protection();
196                 tick_disable_irq();
197
198                 /* Let the user get at STICK too. */
199                 __asm__ __volatile__(
200                 "       rd      %%asr24, %%g2\n"
201                 "       andn    %%g2, %0, %%g2\n"
202                 "       wr      %%g2, 0, %%asr24"
203                 : /* no outputs */
204                 : "r" (TICK_PRIV_BIT)
205                 : "g1", "g2");
206         }
207
208         stick_disable_irq();
209 }
210
211 static unsigned long long stick_get_tick(void)
212 {
213         unsigned long ret;
214
215         __asm__ __volatile__("rd        %%asr24, %0"
216                              : "=r" (ret));
217
218         return ret & ~TICK_PRIV_BIT;
219 }
220
221 static unsigned long stick_add_tick(unsigned long adj)
222 {
223         unsigned long new_tick;
224
225         __asm__ __volatile__("rd        %%asr24, %0\n\t"
226                              "add       %0, %1, %0\n\t"
227                              "wr        %0, 0, %%asr24\n\t"
228                              : "=&r" (new_tick)
229                              : "r" (adj));
230
231         return new_tick;
232 }
233
234 static int stick_add_compare(unsigned long adj)
235 {
236         unsigned long orig_tick, new_tick;
237
238         __asm__ __volatile__("rd        %%asr24, %0"
239                              : "=r" (orig_tick));
240         orig_tick &= ~TICKCMP_IRQ_BIT;
241
242         __asm__ __volatile__("wr        %0, 0, %%asr25"
243                              : /* no outputs */
244                              : "r" (orig_tick + adj));
245
246         __asm__ __volatile__("rd        %%asr24, %0"
247                              : "=r" (new_tick));
248         new_tick &= ~TICKCMP_IRQ_BIT;
249
250         return ((long)(new_tick - (orig_tick+adj))) > 0L;
251 }
252
253 static struct sparc64_tick_ops stick_operations __read_mostly = {
254         .name           =       "stick",
255         .init_tick      =       stick_init_tick,
256         .disable_irq    =       stick_disable_irq,
257         .get_tick       =       stick_get_tick,
258         .add_tick       =       stick_add_tick,
259         .add_compare    =       stick_add_compare,
260         .softint_mask   =       1UL << 16,
261 };
262
263 /* On Hummingbird the STICK/STICK_CMPR register is implemented
264  * in I/O space.  There are two 64-bit registers each, the
265  * first holds the low 32-bits of the value and the second holds
266  * the high 32-bits.
267  *
268  * Since STICK is constantly updating, we have to access it carefully.
269  *
270  * The sequence we use to read is:
271  * 1) read high
272  * 2) read low
273  * 3) read high again, if it rolled re-read both low and high again.
274  *
275  * Writing STICK safely is also tricky:
276  * 1) write low to zero
277  * 2) write high
278  * 3) write low
279  */
280 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
281 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
282
283 static unsigned long __hbird_read_stick(void)
284 {
285         unsigned long ret, tmp1, tmp2, tmp3;
286         unsigned long addr = HBIRD_STICK_ADDR+8;
287
288         __asm__ __volatile__("ldxa      [%1] %5, %2\n"
289                              "1:\n\t"
290                              "sub       %1, 0x8, %1\n\t"
291                              "ldxa      [%1] %5, %3\n\t"
292                              "add       %1, 0x8, %1\n\t"
293                              "ldxa      [%1] %5, %4\n\t"
294                              "cmp       %4, %2\n\t"
295                              "bne,a,pn  %%xcc, 1b\n\t"
296                              " mov      %4, %2\n\t"
297                              "sllx      %4, 32, %4\n\t"
298                              "or        %3, %4, %0\n\t"
299                              : "=&r" (ret), "=&r" (addr),
300                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
301                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
302
303         return ret;
304 }
305
306 static void __hbird_write_stick(unsigned long val)
307 {
308         unsigned long low = (val & 0xffffffffUL);
309         unsigned long high = (val >> 32UL);
310         unsigned long addr = HBIRD_STICK_ADDR;
311
312         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
313                              "add       %0, 0x8, %0\n\t"
314                              "stxa      %3, [%0] %4\n\t"
315                              "sub       %0, 0x8, %0\n\t"
316                              "stxa      %2, [%0] %4"
317                              : "=&r" (addr)
318                              : "0" (addr), "r" (low), "r" (high),
319                                "i" (ASI_PHYS_BYPASS_EC_E));
320 }
321
322 static void __hbird_write_compare(unsigned long val)
323 {
324         unsigned long low = (val & 0xffffffffUL);
325         unsigned long high = (val >> 32UL);
326         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
327
328         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
329                              "sub       %0, 0x8, %0\n\t"
330                              "stxa      %2, [%0] %4"
331                              : "=&r" (addr)
332                              : "0" (addr), "r" (low), "r" (high),
333                                "i" (ASI_PHYS_BYPASS_EC_E));
334 }
335
336 static void hbtick_disable_irq(void)
337 {
338         __hbird_write_compare(TICKCMP_IRQ_BIT);
339 }
340
341 static void hbtick_init_tick(void)
342 {
343         tick_disable_protection();
344
345         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
346          * XXX into actually sending STICK interrupts.  I think because
347          * XXX of how we store %tick_cmpr in head.S this somehow resets the
348          * XXX {TICK + STICK} interrupt mux.  -DaveM
349          */
350         __hbird_write_stick(__hbird_read_stick());
351
352         hbtick_disable_irq();
353 }
354
355 static unsigned long long hbtick_get_tick(void)
356 {
357         return __hbird_read_stick() & ~TICK_PRIV_BIT;
358 }
359
360 static unsigned long hbtick_add_tick(unsigned long adj)
361 {
362         unsigned long val;
363
364         val = __hbird_read_stick() + adj;
365         __hbird_write_stick(val);
366
367         return val;
368 }
369
370 static int hbtick_add_compare(unsigned long adj)
371 {
372         unsigned long val = __hbird_read_stick();
373         unsigned long val2;
374
375         val &= ~TICKCMP_IRQ_BIT;
376         val += adj;
377         __hbird_write_compare(val);
378
379         val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
380
381         return ((long)(val2 - val)) > 0L;
382 }
383
384 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
385         .name           =       "hbtick",
386         .init_tick      =       hbtick_init_tick,
387         .disable_irq    =       hbtick_disable_irq,
388         .get_tick       =       hbtick_get_tick,
389         .add_tick       =       hbtick_add_tick,
390         .add_compare    =       hbtick_add_compare,
391         .softint_mask   =       1UL << 0,
392 };
393
394 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
395
396 unsigned long cmos_regs;
397 EXPORT_SYMBOL(cmos_regs);
398
399 static struct resource rtc_cmos_resource;
400
401 static struct platform_device rtc_cmos_device = {
402         .name           = "rtc_cmos",
403         .id             = -1,
404         .resource       = &rtc_cmos_resource,
405         .num_resources  = 1,
406 };
407
408 static int rtc_probe(struct platform_device *op)
409 {
410         struct resource *r;
411
412         printk(KERN_INFO "%s: RTC regs at 0x%llx\n",
413                op->dev.of_node->full_name, op->resource[0].start);
414
415         /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
416          * up a fake resource so that the probe works for all cases.
417          * When the RTC is behind an ISA bus it will have IORESOURCE_IO
418          * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
419          */
420
421         r = &rtc_cmos_resource;
422         r->flags = IORESOURCE_IO;
423         r->name = op->resource[0].name;
424         r->start = op->resource[0].start;
425         r->end = op->resource[0].end;
426
427         cmos_regs = op->resource[0].start;
428         return platform_device_register(&rtc_cmos_device);
429 }
430
431 static const struct of_device_id rtc_match[] = {
432         {
433                 .name = "rtc",
434                 .compatible = "m5819",
435         },
436         {
437                 .name = "rtc",
438                 .compatible = "isa-m5819p",
439         },
440         {
441                 .name = "rtc",
442                 .compatible = "isa-m5823p",
443         },
444         {
445                 .name = "rtc",
446                 .compatible = "ds1287",
447         },
448         {},
449 };
450
451 static struct platform_driver rtc_driver = {
452         .probe          = rtc_probe,
453         .driver = {
454                 .name = "rtc",
455                 .of_match_table = rtc_match,
456         },
457 };
458
459 static struct platform_device rtc_bq4802_device = {
460         .name           = "rtc-bq4802",
461         .id             = -1,
462         .num_resources  = 1,
463 };
464
465 static int bq4802_probe(struct platform_device *op)
466 {
467
468         printk(KERN_INFO "%s: BQ4802 regs at 0x%llx\n",
469                op->dev.of_node->full_name, op->resource[0].start);
470
471         rtc_bq4802_device.resource = &op->resource[0];
472         return platform_device_register(&rtc_bq4802_device);
473 }
474
475 static const struct of_device_id bq4802_match[] = {
476         {
477                 .name = "rtc",
478                 .compatible = "bq4802",
479         },
480         {},
481 };
482
483 static struct platform_driver bq4802_driver = {
484         .probe          = bq4802_probe,
485         .driver = {
486                 .name = "bq4802",
487                 .of_match_table = bq4802_match,
488         },
489 };
490
491 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
492 {
493         struct platform_device *pdev = to_platform_device(dev);
494         void __iomem *regs = (void __iomem *) pdev->resource[0].start;
495
496         return readb(regs + ofs);
497 }
498
499 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
500 {
501         struct platform_device *pdev = to_platform_device(dev);
502         void __iomem *regs = (void __iomem *) pdev->resource[0].start;
503
504         writeb(val, regs + ofs);
505 }
506
507 static struct m48t59_plat_data m48t59_data = {
508         .read_byte      = mostek_read_byte,
509         .write_byte     = mostek_write_byte,
510 };
511
512 static struct platform_device m48t59_rtc = {
513         .name           = "rtc-m48t59",
514         .id             = 0,
515         .num_resources  = 1,
516         .dev    = {
517                 .platform_data = &m48t59_data,
518         },
519 };
520
521 static int mostek_probe(struct platform_device *op)
522 {
523         struct device_node *dp = op->dev.of_node;
524
525         /* On an Enterprise system there can be multiple mostek clocks.
526          * We should only match the one that is on the central FHC bus.
527          */
528         if (!strcmp(dp->parent->name, "fhc") &&
529             strcmp(dp->parent->parent->name, "central") != 0)
530                 return -ENODEV;
531
532         printk(KERN_INFO "%s: Mostek regs at 0x%llx\n",
533                dp->full_name, op->resource[0].start);
534
535         m48t59_rtc.resource = &op->resource[0];
536         return platform_device_register(&m48t59_rtc);
537 }
538
539 static const struct of_device_id mostek_match[] = {
540         {
541                 .name = "eeprom",
542         },
543         {},
544 };
545
546 static struct platform_driver mostek_driver = {
547         .probe          = mostek_probe,
548         .driver = {
549                 .name = "mostek",
550                 .of_match_table = mostek_match,
551         },
552 };
553
554 static struct platform_device rtc_sun4v_device = {
555         .name           = "rtc-sun4v",
556         .id             = -1,
557 };
558
559 static struct platform_device rtc_starfire_device = {
560         .name           = "rtc-starfire",
561         .id             = -1,
562 };
563
564 static int __init clock_init(void)
565 {
566         if (this_is_starfire)
567                 return platform_device_register(&rtc_starfire_device);
568
569         if (tlb_type == hypervisor)
570                 return platform_device_register(&rtc_sun4v_device);
571
572         (void) platform_driver_register(&rtc_driver);
573         (void) platform_driver_register(&mostek_driver);
574         (void) platform_driver_register(&bq4802_driver);
575
576         return 0;
577 }
578
579 /* Must be after subsys_initcall() so that busses are probed.  Must
580  * be before device_initcall() because things like the RTC driver
581  * need to see the clock registers.
582  */
583 fs_initcall(clock_init);
584
585 /* This is gets the master TICK_INT timer going. */
586 static unsigned long sparc64_init_timers(void)
587 {
588         struct device_node *dp;
589         unsigned long freq;
590
591         dp = of_find_node_by_path("/");
592         if (tlb_type == spitfire) {
593                 unsigned long ver, manuf, impl;
594
595                 __asm__ __volatile__ ("rdpr %%ver, %0"
596                                       : "=&r" (ver));
597                 manuf = ((ver >> 48) & 0xffff);
598                 impl = ((ver >> 32) & 0xffff);
599                 if (manuf == 0x17 && impl == 0x13) {
600                         /* Hummingbird, aka Ultra-IIe */
601                         tick_ops = &hbtick_operations;
602                         freq = of_getintprop_default(dp, "stick-frequency", 0);
603                 } else {
604                         tick_ops = &tick_operations;
605                         freq = local_cpu_data().clock_tick;
606                 }
607         } else {
608                 tick_ops = &stick_operations;
609                 freq = of_getintprop_default(dp, "stick-frequency", 0);
610         }
611
612         return freq;
613 }
614
615 struct freq_table {
616         unsigned long clock_tick_ref;
617         unsigned int ref_freq;
618 };
619 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
620
621 unsigned long sparc64_get_clock_tick(unsigned int cpu)
622 {
623         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
624
625         if (ft->clock_tick_ref)
626                 return ft->clock_tick_ref;
627         return cpu_data(cpu).clock_tick;
628 }
629 EXPORT_SYMBOL(sparc64_get_clock_tick);
630
631 #ifdef CONFIG_CPU_FREQ
632
633 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
634                                     void *data)
635 {
636         struct cpufreq_freqs *freq = data;
637         unsigned int cpu = freq->cpu;
638         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
639
640         if (!ft->ref_freq) {
641                 ft->ref_freq = freq->old;
642                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
643         }
644         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
645             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
646                 cpu_data(cpu).clock_tick =
647                         cpufreq_scale(ft->clock_tick_ref,
648                                       ft->ref_freq,
649                                       freq->new);
650         }
651
652         return 0;
653 }
654
655 static struct notifier_block sparc64_cpufreq_notifier_block = {
656         .notifier_call  = sparc64_cpufreq_notifier
657 };
658
659 static int __init register_sparc64_cpufreq_notifier(void)
660 {
661
662         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
663                                   CPUFREQ_TRANSITION_NOTIFIER);
664         return 0;
665 }
666
667 core_initcall(register_sparc64_cpufreq_notifier);
668
669 #endif /* CONFIG_CPU_FREQ */
670
671 static int sparc64_next_event(unsigned long delta,
672                               struct clock_event_device *evt)
673 {
674         return tick_ops->add_compare(delta) ? -ETIME : 0;
675 }
676
677 static int sparc64_timer_shutdown(struct clock_event_device *evt)
678 {
679         tick_ops->disable_irq();
680         return 0;
681 }
682
683 static struct clock_event_device sparc64_clockevent = {
684         .features               = CLOCK_EVT_FEAT_ONESHOT,
685         .set_state_shutdown     = sparc64_timer_shutdown,
686         .set_next_event         = sparc64_next_event,
687         .rating                 = 100,
688         .shift                  = 30,
689         .irq                    = -1,
690 };
691 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
692
693 void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
694 {
695         struct pt_regs *old_regs = set_irq_regs(regs);
696         unsigned long tick_mask = tick_ops->softint_mask;
697         int cpu = smp_processor_id();
698         struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
699
700         clear_softint(tick_mask);
701
702         irq_enter();
703
704         local_cpu_data().irq0_irqs++;
705         kstat_incr_irq_this_cpu(0);
706
707         if (unlikely(!evt->event_handler)) {
708                 printk(KERN_WARNING
709                        "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
710         } else
711                 evt->event_handler(evt);
712
713         irq_exit();
714
715         set_irq_regs(old_regs);
716 }
717
718 void setup_sparc64_timer(void)
719 {
720         struct clock_event_device *sevt;
721         unsigned long pstate;
722
723         /* Guarantee that the following sequences execute
724          * uninterrupted.
725          */
726         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
727                              "wrpr      %0, %1, %%pstate"
728                              : "=r" (pstate)
729                              : "i" (PSTATE_IE));
730
731         tick_ops->init_tick();
732
733         /* Restore PSTATE_IE. */
734         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
735                              : /* no outputs */
736                              : "r" (pstate));
737
738         sevt = this_cpu_ptr(&sparc64_events);
739
740         memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
741         sevt->cpumask = cpumask_of(smp_processor_id());
742
743         clockevents_register_device(sevt);
744 }
745
746 #define SPARC64_NSEC_PER_CYC_SHIFT      10UL
747
748 static struct clocksource clocksource_tick = {
749         .rating         = 100,
750         .mask           = CLOCKSOURCE_MASK(64),
751         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
752 };
753
754 static unsigned long tb_ticks_per_usec __read_mostly;
755
756 void __delay(unsigned long loops)
757 {
758         unsigned long bclock, now;
759
760         bclock = tick_ops->get_tick();
761         do {
762                 now = tick_ops->get_tick();
763         } while ((now-bclock) < loops);
764 }
765 EXPORT_SYMBOL(__delay);
766
767 void udelay(unsigned long usecs)
768 {
769         __delay(tb_ticks_per_usec * usecs);
770 }
771 EXPORT_SYMBOL(udelay);
772
773 static u64 clocksource_tick_read(struct clocksource *cs)
774 {
775         return tick_ops->get_tick();
776 }
777
778 void __init time_init(void)
779 {
780         unsigned long freq = sparc64_init_timers();
781
782         tb_ticks_per_usec = freq / USEC_PER_SEC;
783
784         timer_ticks_per_nsec_quotient =
785                 clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT);
786
787         clocksource_tick.name = tick_ops->name;
788         clocksource_tick.read = clocksource_tick_read;
789
790         clocksource_register_hz(&clocksource_tick, freq);
791         printk("clocksource: mult[%x] shift[%d]\n",
792                clocksource_tick.mult, clocksource_tick.shift);
793
794         sparc64_clockevent.name = tick_ops->name;
795         clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4);
796
797         sparc64_clockevent.max_delta_ns =
798                 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
799         sparc64_clockevent.min_delta_ns =
800                 clockevent_delta2ns(0xF, &sparc64_clockevent);
801
802         printk("clockevent: mult[%x] shift[%d]\n",
803                sparc64_clockevent.mult, sparc64_clockevent.shift);
804
805         setup_sparc64_timer();
806 }
807
808 unsigned long long sched_clock(void)
809 {
810         unsigned long ticks = tick_ops->get_tick();
811
812         return (ticks * timer_ticks_per_nsec_quotient)
813                 >> SPARC64_NSEC_PER_CYC_SHIFT;
814 }
815
816 int read_current_timer(unsigned long *timer_val)
817 {
818         *timer_val = tick_ops->get_tick();
819         return 0;
820 }