arch/sparc/kernel/sun4m_smp.c

   1 /*
   2  *  sun4m SMP support.
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6
   7 #include <linux/clockchips.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/profile.h>
  10 #include <linux/delay.h>
  11 #include <linux/sched.h>
  12 #include <linux/cpu.h>
  13
  14 #include <asm/cacheflush.h>
  15 #include <asm/switch_to.h>
  16 #include <asm/tlbflush.h>
  17 #include <asm/timer.h>
  18 #include <asm/oplib.h>
  19
  20 #include "irq.h"
  21 #include "kernel.h"
  22
  23 #define IRQ_IPI_SINGLE          12
  24 #define IRQ_IPI_MASK            13
  25 #define IRQ_IPI_RESCHED         14
  26 #define IRQ_CROSS_CALL          15
  27
  28 static inline unsigned long
  29 swap_ulong(volatile unsigned long *ptr, unsigned long val)
  30 {
  31         __asm__ __volatile__("swap [%1], %0\n\t" :
  32                              "=&r" (val), "=&r" (ptr) :
  33                              "0" (val), "1" (ptr));
  34         return val;
  35 }
  36
  37 static void smp4m_ipi_init(void);
  38
  39 void __cpuinit smp4m_callin(void)
  40 {
  41         int cpuid = hard_smp_processor_id();
  42
  43         local_ops->cache_all();
  44         local_ops->tlb_all();
  45
  46         notify_cpu_starting(cpuid);
  47
  48         register_percpu_ce(cpuid);
  49
  50         calibrate_delay();
  51         smp_store_cpu_info(cpuid);
  52
  53         local_ops->cache_all();
  54         local_ops->tlb_all();
  55
  56         /*
  57          * Unblock the master CPU _only_ when the scheduler state
  58          * of all secondary CPUs will be up-to-date, so after
  59          * the SMP initialization the master will be just allowed
  60          * to call the scheduler code.
  61          */
  62         /* Allow master to continue. */
  63         swap_ulong(&cpu_callin_map[cpuid], 1);
  64
  65         /* XXX: What's up with all the flushes? */
  66         local_ops->cache_all();
  67         local_ops->tlb_all();
  68
  69         /* Fix idle thread fields. */
  70         __asm__ __volatile__("ld [%0], %%g6\n\t"
  71                              : : "r" (&current_set[cpuid])
  72                              : "memory" /* paranoid */);
  73
  74         /* Attach to the address space of init_task. */
  75         atomic_inc(&init_mm.mm_count);
  76         current->active_mm = &init_mm;
  77
  78         while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
  79                 mb();
  80
  81         local_irq_enable();
  82
  83         set_cpu_online(cpuid, true);
  84 }
  85
  86 /*
  87  *      Cycle through the processors asking the PROM to start each one.
  88  */
  89 void __init smp4m_boot_cpus(void)
  90 {
  91         smp4m_ipi_init();
  92         sun4m_unmask_profile_irq();
  93         local_ops->cache_all();
  94 }
  95
  96 int __cpuinit smp4m_boot_one_cpu(int i)
  97 {
  98         unsigned long *entry = &sun4m_cpu_startup;
  99         struct task_struct *p;
 100         int timeout;
 101         int cpu_node;
 102
 103         cpu_find_by_mid(i, &cpu_node);
 104
 105         /* Cook up an idler for this guy. */
 106         p = fork_idle(i);
 107         current_set[i] = task_thread_info(p);
 108         /* See trampoline.S for details... */
 109         entry += ((i - 1) * 3);
 110
 111         /*
 112          * Initialize the contexts table
 113          * Since the call to prom_startcpu() trashes the structure,
 114          * we need to re-initialize it for each cpu
 115          */
 116         smp_penguin_ctable.which_io = 0;
 117         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 118         smp_penguin_ctable.reg_size = 0;
 119
 120         /* whirrr, whirrr, whirrrrrrrrr... */
 121         printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
 122         local_ops->cache_all();
 123         prom_startcpu(cpu_node, &smp_penguin_ctable, 0, (char *)entry);
 124
 125         /* wheee... it's going... */
 126         for (timeout = 0; timeout < 10000; timeout++) {
 127                 if (cpu_callin_map[i])
 128                         break;
 129                 udelay(200);
 130         }
 131
 132         if (!(cpu_callin_map[i])) {
 133                 printk(KERN_ERR "Processor %d is stuck.\n", i);
 134                 return -ENODEV;
 135         }
 136
 137         local_ops->cache_all();
 138         return 0;
 139 }
 140
 141 void __init smp4m_smp_done(void)
 142 {
 143         int i, first;
 144         int *prev;
 145
 146         /* setup cpu list for irq rotation */
 147         first = 0;
 148         prev = &first;
 149         for_each_online_cpu(i) {
 150                 *prev = i;
 151                 prev = &cpu_data(i).next;
 152         }
 153         *prev = first;
 154         local_ops->cache_all();
 155
 156         /* Ok, they are spinning and ready to go. */
 157 }
 158
 159
 160 /* Initialize IPIs on the SUN4M SMP machine */
 161 static void __init smp4m_ipi_init(void)
 162 {
 163 }
 164
 165 static void smp4m_ipi_resched(int cpu)
 166 {
 167         set_cpu_int(cpu, IRQ_IPI_RESCHED);
 168 }
 169
 170 static void smp4m_ipi_single(int cpu)
 171 {
 172         set_cpu_int(cpu, IRQ_IPI_SINGLE);
 173 }
 174
 175 static void smp4m_ipi_mask_one(int cpu)
 176 {
 177         set_cpu_int(cpu, IRQ_IPI_MASK);
 178 }
 179
 180 static struct smp_funcall {
 181         smpfunc_t func;
 182         unsigned long arg1;
 183         unsigned long arg2;
 184         unsigned long arg3;
 185         unsigned long arg4;
 186         unsigned long arg5;
 187         unsigned long processors_in[SUN4M_NCPUS];  /* Set when ipi entered. */
 188         unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
 189 } ccall_info;
 190
 191 static DEFINE_SPINLOCK(cross_call_lock);
 192
 193 /* Cross calls must be serialized, at least currently. */
 194 static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
 195                              unsigned long arg2, unsigned long arg3,
 196                              unsigned long arg4)
 197 {
 198                 register int ncpus = SUN4M_NCPUS;
 199                 unsigned long flags;
 200
 201                 spin_lock_irqsave(&cross_call_lock, flags);
 202
 203                 /* Init function glue. */
 204                 ccall_info.func = func;
 205                 ccall_info.arg1 = arg1;
 206                 ccall_info.arg2 = arg2;
 207                 ccall_info.arg3 = arg3;
 208                 ccall_info.arg4 = arg4;
 209                 ccall_info.arg5 = 0;
 210
 211                 /* Init receive/complete mapping, plus fire the IPI's off. */
 212                 {
 213                         register int i;
 214
 215                         cpumask_clear_cpu(smp_processor_id(), &mask);
 216                         cpumask_and(&mask, cpu_online_mask, &mask);
 217                         for (i = 0; i < ncpus; i++) {
 218                                 if (cpumask_test_cpu(i, &mask)) {
 219                                         ccall_info.processors_in[i] = 0;
 220                                         ccall_info.processors_out[i] = 0;
 221                                         set_cpu_int(i, IRQ_CROSS_CALL);
 222                                 } else {
 223                                         ccall_info.processors_in[i] = 1;
 224                                         ccall_info.processors_out[i] = 1;
 225                                 }
 226                         }
 227                 }
 228
 229                 {
 230                         register int i;
 231
 232                         i = 0;
 233                         do {
 234                                 if (!cpumask_test_cpu(i, &mask))
 235                                         continue;
 236                                 while (!ccall_info.processors_in[i])
 237                                         barrier();
 238                         } while (++i < ncpus);
 239
 240                         i = 0;
 241                         do {
 242                                 if (!cpumask_test_cpu(i, &mask))
 243                                         continue;
 244                                 while (!ccall_info.processors_out[i])
 245                                         barrier();
 246                         } while (++i < ncpus);
 247                 }
 248                 spin_unlock_irqrestore(&cross_call_lock, flags);
 249 }
 250
 251 /* Running cross calls. */
 252 void smp4m_cross_call_irq(void)
 253 {
 254         int i = smp_processor_id();
 255
 256         ccall_info.processors_in[i] = 1;
 257         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 258                         ccall_info.arg4, ccall_info.arg5);
 259         ccall_info.processors_out[i] = 1;
 260 }
 261
 262 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
 263 {
 264         struct pt_regs *old_regs;
 265         struct clock_event_device *ce;
 266         int cpu = smp_processor_id();
 267
 268         old_regs = set_irq_regs(regs);
 269
 270         ce = &per_cpu(sparc32_clockevent, cpu);
 271
 272         if (ce->mode & CLOCK_EVT_MODE_PERIODIC)
 273                 sun4m_clear_profile_irq(cpu);
 274         else
 275                 load_profile_irq(cpu, 0); /* Is this needless? */
 276
 277         irq_enter();
 278         ce->event_handler(ce);
 279         irq_exit();
 280
 281         set_irq_regs(old_regs);
 282 }
 283
 284 static void __init smp4m_blackbox_id(unsigned *addr)
 285 {
 286         int rd = *addr & 0x3e000000;
 287         int rs1 = rd >> 11;
 288
 289         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 290         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
 291         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
 292 }
 293
 294 static void __init smp4m_blackbox_current(unsigned *addr)
 295 {
 296         int rd = *addr & 0x3e000000;
 297         int rs1 = rd >> 11;
 298
 299         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 300         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
 301         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 0xc, reg */
 302 }
 303
 304 void __init sun4m_init_smp(void)
 305 {
 306         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
 307         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
 308         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
 309         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
 310         BTFIXUPSET_CALL(smp_ipi_resched, smp4m_ipi_resched, BTFIXUPCALL_NORM);
 311         BTFIXUPSET_CALL(smp_ipi_single, smp4m_ipi_single, BTFIXUPCALL_NORM);
 312         BTFIXUPSET_CALL(smp_ipi_mask_one, smp4m_ipi_mask_one, BTFIXUPCALL_NORM);
 313 }