arch/sparc/kernel/sun4d_smp.c

   1 /* Sparc SS1000/SC2000 SMP support.
   2  *
   3  * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   4  *
   5  * Based on sun4m's smp.c, which is:
   6  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   7  */
   8
   9 #include <linux/clockchips.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/profile.h>
  12 #include <linux/delay.h>
  13 #include <linux/sched.h>
  14 #include <linux/cpu.h>
  15
  16 #include <asm/cacheflush.h>
  17 #include <asm/switch_to.h>
  18 #include <asm/tlbflush.h>
  19 #include <asm/timer.h>
  20 #include <asm/oplib.h>
  21 #include <asm/sbi.h>
  22 #include <asm/mmu.h>
  23
  24 #include "kernel.h"
  25 #include "irq.h"
  26
  27 #define IRQ_CROSS_CALL          15
  28
  29 static volatile int smp_processors_ready;
  30 static int smp_highest_cpu;
  31
  32 static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned long val)
  33 {
  34         __asm__ __volatile__("swap [%1], %0\n\t" :
  35                              "=&r" (val), "=&r" (ptr) :
  36                              "0" (val), "1" (ptr));
  37         return val;
  38 }
  39
  40 static void smp4d_ipi_init(void);
  41
  42 static unsigned char cpu_leds[32];
  43
  44 static inline void show_leds(int cpuid)
  45 {
  46         cpuid &= 0x1e;
  47         __asm__ __volatile__ ("stba %0, [%1] %2" : :
  48                               "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
  49                               "r" (ECSR_BASE(cpuid) | BB_LEDS),
  50                               "i" (ASI_M_CTL));
  51 }
  52
  53 void __cpuinit smp4d_callin(void)
  54 {
  55         int cpuid = hard_smp4d_processor_id();
  56         unsigned long flags;
  57
  58         /* Show we are alive */
  59         cpu_leds[cpuid] = 0x6;
  60         show_leds(cpuid);
  61
  62         /* Enable level15 interrupt, disable level14 interrupt for now */
  63         cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
  64
  65         local_ops->cache_all();
  66         local_ops->tlb_all();
  67
  68         notify_cpu_starting(cpuid);
  69         /*
  70          * Unblock the master CPU _only_ when the scheduler state
  71          * of all secondary CPUs will be up-to-date, so after
  72          * the SMP initialization the master will be just allowed
  73          * to call the scheduler code.
  74          */
  75         /* Get our local ticker going. */
  76         register_percpu_ce(cpuid);
  77
  78         calibrate_delay();
  79         smp_store_cpu_info(cpuid);
  80         local_ops->cache_all();
  81         local_ops->tlb_all();
  82
  83         /* Allow master to continue. */
  84         sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1);
  85         local_ops->cache_all();
  86         local_ops->tlb_all();
  87
  88         while ((unsigned long)current_set[cpuid] < PAGE_OFFSET)
  89                 barrier();
  90
  91         while (current_set[cpuid]->cpu != cpuid)
  92                 barrier();
  93
  94         /* Fix idle thread fields. */
  95         __asm__ __volatile__("ld [%0], %%g6\n\t"
  96                              : : "r" (&current_set[cpuid])
  97                              : "memory" /* paranoid */);
  98
  99         cpu_leds[cpuid] = 0x9;
 100         show_leds(cpuid);
 101
 102         /* Attach to the address space of init_task. */
 103         atomic_inc(&init_mm.mm_count);
 104         current->active_mm = &init_mm;
 105
 106         local_ops->cache_all();
 107         local_ops->tlb_all();
 108
 109         local_irq_enable();     /* We don't allow PIL 14 yet */
 110
 111         while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
 112                 barrier();
 113
 114         spin_lock_irqsave(&sun4d_imsk_lock, flags);
 115         cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
 116         spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
 117         set_cpu_online(cpuid, true);
 118
 119 }
 120
 121 /*
 122  *      Cycle through the processors asking the PROM to start each one.
 123  */
 124 void __init smp4d_boot_cpus(void)
 125 {
 126         smp4d_ipi_init();
 127         if (boot_cpu_id)
 128                 current_set[0] = NULL;
 129         local_ops->cache_all();
 130 }
 131
 132 int __cpuinit smp4d_boot_one_cpu(int i)
 133 {
 134         unsigned long *entry = &sun4d_cpu_startup;
 135         struct task_struct *p;
 136         int timeout;
 137         int cpu_node;
 138
 139         cpu_find_by_instance(i, &cpu_node, NULL);
 140         /* Cook up an idler for this guy. */
 141         p = fork_idle(i);
 142         current_set[i] = task_thread_info(p);
 143
 144         /*
 145          * Initialize the contexts table
 146          * Since the call to prom_startcpu() trashes the structure,
 147          * we need to re-initialize it for each cpu
 148          */
 149         smp_penguin_ctable.which_io = 0;
 150         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 151         smp_penguin_ctable.reg_size = 0;
 152
 153         /* whirrr, whirrr, whirrrrrrrrr... */
 154         printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
 155         local_ops->cache_all();
 156         prom_startcpu(cpu_node,
 157                       &smp_penguin_ctable, 0, (char *)entry);
 158
 159         printk(KERN_INFO "prom_startcpu returned :)\n");
 160
 161         /* wheee... it's going... */
 162         for (timeout = 0; timeout < 10000; timeout++) {
 163                 if (cpu_callin_map[i])
 164                         break;
 165                 udelay(200);
 166         }
 167
 168         if (!(cpu_callin_map[i])) {
 169                 printk(KERN_ERR "Processor %d is stuck.\n", i);
 170                 return -ENODEV;
 171
 172         }
 173         local_ops->cache_all();
 174         return 0;
 175 }
 176
 177 void __init smp4d_smp_done(void)
 178 {
 179         int i, first;
 180         int *prev;
 181
 182         /* setup cpu list for irq rotation */
 183         first = 0;
 184         prev = &first;
 185         for_each_online_cpu(i) {
 186                 *prev = i;
 187                 prev = &cpu_data(i).next;
 188         }
 189         *prev = first;
 190         local_ops->cache_all();
 191
 192         /* Ok, they are spinning and ready to go. */
 193         smp_processors_ready = 1;
 194         sun4d_distribute_irqs();
 195 }
 196
 197 /* Memory structure giving interrupt handler information about IPI generated */
 198 struct sun4d_ipi_work {
 199         int single;
 200         int msk;
 201         int resched;
 202 };
 203
 204 static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work, sun4d_ipi_work);
 205
 206 /* Initialize IPIs on the SUN4D SMP machine */
 207 static void __init smp4d_ipi_init(void)
 208 {
 209         int cpu;
 210         struct sun4d_ipi_work *work;
 211
 212         printk(KERN_INFO "smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ);
 213
 214         for_each_possible_cpu(cpu) {
 215                 work = &per_cpu(sun4d_ipi_work, cpu);
 216                 work->single = work->msk = work->resched = 0;
 217         }
 218 }
 219
 220 void sun4d_ipi_interrupt(void)
 221 {
 222         struct sun4d_ipi_work *work = &__get_cpu_var(sun4d_ipi_work);
 223
 224         if (work->single) {
 225                 work->single = 0;
 226                 smp_call_function_single_interrupt();
 227         }
 228         if (work->msk) {
 229                 work->msk = 0;
 230                 smp_call_function_interrupt();
 231         }
 232         if (work->resched) {
 233                 work->resched = 0;
 234                 smp_resched_interrupt();
 235         }
 236 }
 237
 238 static void smp4d_ipi_single(int cpu)
 239 {
 240         struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
 241
 242         /* Mark work */
 243         work->single = 1;
 244
 245         /* Generate IRQ on the CPU */
 246         sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
 247 }
 248
 249 static void smp4d_ipi_mask_one(int cpu)
 250 {
 251         struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
 252
 253         /* Mark work */
 254         work->msk = 1;
 255
 256         /* Generate IRQ on the CPU */
 257         sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
 258 }
 259
 260 static void smp4d_ipi_resched(int cpu)
 261 {
 262         struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
 263
 264         /* Mark work */
 265         work->resched = 1;
 266
 267         /* Generate IRQ on the CPU (any IRQ will cause resched) */
 268         sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
 269 }
 270
 271 static struct smp_funcall {
 272         smpfunc_t func;
 273         unsigned long arg1;
 274         unsigned long arg2;
 275         unsigned long arg3;
 276         unsigned long arg4;
 277         unsigned long arg5;
 278         unsigned char processors_in[NR_CPUS];  /* Set when ipi entered. */
 279         unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
 280 } ccall_info __attribute__((aligned(8)));
 281
 282 static DEFINE_SPINLOCK(cross_call_lock);
 283
 284 /* Cross calls must be serialized, at least currently. */
 285 static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
 286                              unsigned long arg2, unsigned long arg3,
 287                              unsigned long arg4)
 288 {
 289         if (smp_processors_ready) {
 290                 register int high = smp_highest_cpu;
 291                 unsigned long flags;
 292
 293                 spin_lock_irqsave(&cross_call_lock, flags);
 294
 295                 {
 296                         /*
 297                          * If you make changes here, make sure
 298                          * gcc generates proper code...
 299                          */
 300                         register smpfunc_t f asm("i0") = func;
 301                         register unsigned long a1 asm("i1") = arg1;
 302                         register unsigned long a2 asm("i2") = arg2;
 303                         register unsigned long a3 asm("i3") = arg3;
 304                         register unsigned long a4 asm("i4") = arg4;
 305                         register unsigned long a5 asm("i5") = 0;
 306
 307                         __asm__ __volatile__(
 308                                 "std %0, [%6]\n\t"
 309                                 "std %2, [%6 + 8]\n\t"
 310                                 "std %4, [%6 + 16]\n\t" : :
 311                                 "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
 312                                 "r" (&ccall_info.func));
 313                 }
 314
 315                 /* Init receive/complete mapping, plus fire the IPI's off. */
 316                 {
 317                         register int i;
 318
 319                         cpumask_clear_cpu(smp_processor_id(), &mask);
 320                         cpumask_and(&mask, cpu_online_mask, &mask);
 321                         for (i = 0; i <= high; i++) {
 322                                 if (cpumask_test_cpu(i, &mask)) {
 323                                         ccall_info.processors_in[i] = 0;
 324                                         ccall_info.processors_out[i] = 0;
 325                                         sun4d_send_ipi(i, IRQ_CROSS_CALL);
 326                                 }
 327                         }
 328                 }
 329
 330                 {
 331                         register int i;
 332
 333                         i = 0;
 334                         do {
 335                                 if (!cpumask_test_cpu(i, &mask))
 336                                         continue;
 337                                 while (!ccall_info.processors_in[i])
 338                                         barrier();
 339                         } while (++i <= high);
 340
 341                         i = 0;
 342                         do {
 343                                 if (!cpumask_test_cpu(i, &mask))
 344                                         continue;
 345                                 while (!ccall_info.processors_out[i])
 346                                         barrier();
 347                         } while (++i <= high);
 348                 }
 349
 350                 spin_unlock_irqrestore(&cross_call_lock, flags);
 351         }
 352 }
 353
 354 /* Running cross calls. */
 355 void smp4d_cross_call_irq(void)
 356 {
 357         int i = hard_smp4d_processor_id();
 358
 359         ccall_info.processors_in[i] = 1;
 360         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 361                         ccall_info.arg4, ccall_info.arg5);
 362         ccall_info.processors_out[i] = 1;
 363 }
 364
 365 void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
 366 {
 367         struct pt_regs *old_regs;
 368         int cpu = hard_smp4d_processor_id();
 369         struct clock_event_device *ce;
 370         static int cpu_tick[NR_CPUS];
 371         static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
 372
 373         old_regs = set_irq_regs(regs);
 374         bw_get_prof_limit(cpu);
 375         bw_clear_intr_mask(0, 1);       /* INTR_TABLE[0] & 1 is Profile IRQ */
 376
 377         cpu_tick[cpu]++;
 378         if (!(cpu_tick[cpu] & 15)) {
 379                 if (cpu_tick[cpu] == 0x60)
 380                         cpu_tick[cpu] = 0;
 381                 cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
 382                 show_leds(cpu);
 383         }
 384
 385         ce = &per_cpu(sparc32_clockevent, cpu);
 386
 387         irq_enter();
 388         ce->event_handler(ce);
 389         irq_exit();
 390
 391         set_irq_regs(old_regs);
 392 }
 393
 394 void __init smp4d_blackbox_id(unsigned *addr)
 395 {
 396         int rd = *addr & 0x3e000000;
 397
 398         addr[0] = 0xc0800800 | rd;              /* lda [%g0] ASI_M_VIKING_TMP1, reg */
 399         addr[1] = 0x01000000;                   /* nop */
 400         addr[2] = 0x01000000;                   /* nop */
 401 }
 402
 403 void __init smp4d_blackbox_current(unsigned *addr)
 404 {
 405         int rd = *addr & 0x3e000000;
 406
 407         addr[0] = 0xc0800800 | rd;              /* lda [%g0] ASI_M_VIKING_TMP1, reg */
 408         addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
 409         addr[4] = 0x01000000;                   /* nop */
 410 }
 411
 412 void __init sun4d_init_smp(void)
 413 {
 414         int i;
 415
 416         /* Patch ipi15 trap table */
 417         t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
 418
 419         /* And set btfixup... */
 420         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
 421         BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
 422         BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
 423         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
 424         BTFIXUPSET_CALL(smp_ipi_resched, smp4d_ipi_resched, BTFIXUPCALL_NORM);
 425         BTFIXUPSET_CALL(smp_ipi_single, smp4d_ipi_single, BTFIXUPCALL_NORM);
 426         BTFIXUPSET_CALL(smp_ipi_mask_one, smp4d_ipi_mask_one, BTFIXUPCALL_NORM);
 427
 428         for (i = 0; i < NR_CPUS; i++) {
 429                 ccall_info.processors_in[i] = 1;
 430                 ccall_info.processors_out[i] = 1;
 431         }
 432 }