2 * SS1000/SC2000 interrupt handling.
4 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Heavily based on arch/sparc/kernel/irq.c.
8 #include <linux/kernel_stat.h>
9 #include <linux/seq_file.h>
11 #include <asm/timer.h>
12 #include <asm/traps.h>
16 #include <asm/cacheflush.h>
17 #include <asm/setup.h>
18 #include <asm/oplib.h>
23 /* Sun4d interrupts fall roughly into two categories. SBUS and
24 * cpu local. CPU local interrupts cover the timer interrupts
25 * and whatnot, and we encode those as normal PILs between
27 * SBUS interrupts are encodes as a combination of board, level and slot.
30 struct sun4d_handler_data {
31 unsigned int cpuid; /* target cpu */
32 unsigned int real_irq; /* interrupt level */
36 static unsigned int sun4d_encode_irq(int board, int lvl, int slot)
38 return (board + 1) << 5 | (lvl << 2) | slot;
41 struct sun4d_timer_regs {
44 u32 l10_limit_noclear;
49 static struct sun4d_timer_regs __iomem *sun4d_timers;
51 #define SUN4D_TIMER_IRQ 10
53 /* Specify which cpu handle interrupts from which board.
54 * Index is board - value is cpu.
56 static unsigned char board_to_cpu[32];
58 static int pil_to_sbus[] = {
77 /* Exported for sun4d_smp.c */
78 DEFINE_SPINLOCK(sun4d_imsk_lock);
80 /* SBUS interrupts are encoded integers including the board number
81 * (plus one), the SBUS level, and the SBUS slot number. Sun4D
82 * IRQ dispatch is done by:
84 * 1) Reading the BW local interrupt table in order to get the bus
87 * This table is indexed by SBUS interrupt level which can be
88 * derived from the PIL we got interrupted on.
90 * 2) For each bus showing interrupt pending from #1, read the
91 * SBI interrupt state register. This will indicate which slots
92 * have interrupts pending for that SBUS interrupt level.
94 * 3) Call the genreric IRQ support.
96 static void sun4d_sbus_handler_irq(int sbusl)
98 unsigned int bus_mask;
99 unsigned int sbino, slot;
102 bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
103 bw_clear_intr_mask(sbusl, bus_mask);
106 /* Loop for each pending SBI */
107 for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1) {
108 unsigned int idx, mask;
112 /* XXX This seems to ACK the irq twice. acquire_sbi()
113 * XXX uses swap, therefore this writes 0xf << sbil,
114 * XXX then later release_sbi() will write the individual
115 * XXX bits which were set again.
117 mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
118 mask &= (0xf << sbil);
120 /* Loop for each pending SBI slot */
122 for (idx = 0; mask != 0; idx++, slot <<= 1) {
124 struct irq_bucket *p;
130 pil = sun4d_encode_irq(sbino, sbusl, idx);
134 struct irq_bucket *next;
137 generic_handle_irq(p->irq);
140 release_sbi(SBI2DEVID(sbino), slot);
145 void sun4d_handler_irq(int pil, struct pt_regs *regs)
147 struct pt_regs *old_regs;
148 /* SBUS IRQ level (1 - 7) */
149 int sbusl = pil_to_sbus[pil];
151 /* FIXME: Is this necessary?? */
154 cc_set_iclr(1 << pil);
158 * Check IPI data structures after IRQ has been cleared. Hard and Soft
159 * IRQ can happen at the same time, so both cases are always handled.
161 if (pil == SUN4D_IPI_IRQ)
162 sun4d_ipi_interrupt();
165 old_regs = set_irq_regs(regs);
169 struct irq_bucket *p;
173 struct irq_bucket *next;
176 generic_handle_irq(p->irq);
181 sun4d_sbus_handler_irq(sbusl);
184 set_irq_regs(old_regs);
188 static void sun4d_mask_irq(struct irq_data *data)
190 struct sun4d_handler_data *handler_data = data->handler_data;
191 unsigned int real_irq;
193 int cpuid = handler_data->cpuid;
196 real_irq = handler_data->real_irq;
198 spin_lock_irqsave(&sun4d_imsk_lock, flags);
199 cc_set_imsk_other(cpuid, cc_get_imsk_other(cpuid) | (1 << real_irq));
200 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
202 cc_set_imsk(cc_get_imsk() | (1 << real_irq));
206 static void sun4d_unmask_irq(struct irq_data *data)
208 struct sun4d_handler_data *handler_data = data->handler_data;
209 unsigned int real_irq;
211 int cpuid = handler_data->cpuid;
214 real_irq = handler_data->real_irq;
217 spin_lock_irqsave(&sun4d_imsk_lock, flags);
218 cc_set_imsk_other(cpuid, cc_get_imsk_other(cpuid) & ~(1 << real_irq));
219 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
221 cc_set_imsk(cc_get_imsk() & ~(1 << real_irq));
225 static unsigned int sun4d_startup_irq(struct irq_data *data)
228 sun4d_unmask_irq(data);
232 static void sun4d_shutdown_irq(struct irq_data *data)
234 sun4d_mask_irq(data);
235 irq_unlink(data->irq);
238 struct irq_chip sun4d_irq = {
240 .irq_startup = sun4d_startup_irq,
241 .irq_shutdown = sun4d_shutdown_irq,
242 .irq_unmask = sun4d_unmask_irq,
243 .irq_mask = sun4d_mask_irq,
247 static void sun4d_set_cpu_int(int cpu, int level)
249 sun4d_send_ipi(cpu, level);
252 /* Setup IRQ distribution scheme. */
253 void __init sun4d_distribute_irqs(void)
255 struct device_node *dp;
257 int cpuid = cpu_logical_map(1);
260 cpuid = cpu_logical_map(0);
261 for_each_node_by_name(dp, "sbi") {
262 int devid = of_getintprop_default(dp, "device-id", 0);
263 int board = of_getintprop_default(dp, "board#", 0);
264 board_to_cpu[board] = cpuid;
265 set_sbi_tid(devid, cpuid << 3);
267 printk(KERN_ERR "All sbus IRQs directed to CPU%d\n", cpuid);
271 static void sun4d_clear_clock_irq(void)
273 sbus_readl(&sun4d_timers->l10_timer_limit);
276 static void sun4d_load_profile_irq(int cpu, unsigned int limit)
278 unsigned int value = limit ? timer_value(limit) : 0;
279 bw_set_prof_limit(cpu, value);
282 static void __init sun4d_load_profile_irqs(void)
286 while (!cpu_find_by_instance(cpu, NULL, &mid)) {
287 sun4d_load_profile_irq(mid >> 3, 0);
292 unsigned int _sun4d_build_device_irq(unsigned int real_irq,
296 struct sun4d_handler_data *handler_data;
299 irq = irq_alloc(real_irq, pil);
301 prom_printf("IRQ: allocate for %d %d %d failed\n",
302 real_irq, pil, board);
306 handler_data = irq_get_handler_data(irq);
307 if (unlikely(handler_data))
310 handler_data = kzalloc(sizeof(struct sun4d_handler_data), GFP_ATOMIC);
311 if (unlikely(!handler_data)) {
312 prom_printf("IRQ: kzalloc(sun4d_handler_data) failed.\n");
315 handler_data->cpuid = board_to_cpu[board];
316 handler_data->real_irq = real_irq;
317 irq_set_chip_and_handler_name(irq, &sun4d_irq,
318 handle_level_irq, "level");
319 irq_set_handler_data(irq, handler_data);
327 unsigned int sun4d_build_device_irq(struct platform_device *op,
328 unsigned int real_irq)
330 struct device_node *dp = op->dev.of_node;
331 struct device_node *board_parent, *bus = dp->parent;
332 char *bus_connection;
333 const struct linux_prom_registers *regs;
341 if (!strcmp(bus->name, "sbi")) {
342 bus_connection = "io-unit";
346 if (!strcmp(bus->name, "bootbus")) {
347 bus_connection = "cpu-unit";
356 regs = of_get_property(dp, "reg", NULL);
360 slot = regs->which_io;
363 * If Bus nodes parent is not io-unit/cpu-unit or the io-unit/cpu-unit
364 * lacks a "board#" property, something is very wrong.
366 if (!bus->parent || strcmp(bus->parent->name, bus_connection)) {
367 printk(KERN_ERR "%s: Error, parent is not %s.\n",
368 bus->full_name, bus_connection);
371 board_parent = bus->parent;
372 board = of_getintprop_default(board_parent, "board#", -1);
374 printk(KERN_ERR "%s: Error, lacks board# property.\n",
375 board_parent->full_name);
379 sbusl = pil_to_sbus[real_irq];
381 pil = sun4d_encode_irq(board, sbusl, slot);
385 irq = _sun4d_build_device_irq(real_irq, pil, board);
390 unsigned int sun4d_build_timer_irq(unsigned int board, unsigned int real_irq)
392 return _sun4d_build_device_irq(real_irq, real_irq, board);
396 static void __init sun4d_fixup_trap_table(void)
400 struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
402 /* Adjust so that we jump directly to smp4d_ticker */
403 lvl14_save[2] += smp4d_ticker - real_irq_entry;
405 /* For SMP we use the level 14 ticker, however the bootup code
406 * has copied the firmware's level 14 vector into the boot cpu's
407 * trap table, we must fix this now or we get squashed.
409 local_irq_save(flags);
410 patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
411 trap_table->inst_one = lvl14_save[0];
412 trap_table->inst_two = lvl14_save[1];
413 trap_table->inst_three = lvl14_save[2];
414 trap_table->inst_four = lvl14_save[3];
415 local_ops->cache_all();
416 local_irq_restore(flags);
420 static void __init sun4d_init_timers(void)
422 struct device_node *dp;
429 dp = of_find_node_by_name(NULL, "cpu-unit");
431 prom_printf("sun4d_init_timers: Unable to find cpu-unit\n");
435 /* Which cpu-unit we use is arbitrary, we can view the bootbus timer
436 * registers via any cpu's mapping. The first 'reg' property is the
439 reg = of_get_property(dp, "reg", NULL);
441 prom_printf("sun4d_init_timers: No reg property\n");
445 board = of_getintprop_default(dp, "board#", -1);
447 prom_printf("sun4d_init_timers: No board# property on cpu-unit\n");
454 res.end = reg[2] - 1;
455 res.flags = reg[0] & 0xff;
456 sun4d_timers = of_ioremap(&res, BW_TIMER_LIMIT,
457 sizeof(struct sun4d_timer_regs), "user timer");
459 prom_printf("sun4d_init_timers: Can't map timer regs\n");
464 sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */
466 sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */
467 sparc_config.features |= FEAT_L10_CLOCKEVENT;
469 sparc_config.features |= FEAT_L10_CLOCKSOURCE;
470 sbus_writel(timer_value(sparc_config.cs_period),
471 &sun4d_timers->l10_timer_limit);
473 master_l10_counter = &sun4d_timers->l10_cur_count;
475 irq = sun4d_build_timer_irq(board, SUN4D_TIMER_IRQ);
476 err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
478 prom_printf("sun4d_init_timers: request_irq() failed with %d\n",
482 sun4d_load_profile_irqs();
483 sun4d_fixup_trap_table();
486 void __init sun4d_init_sbi_irq(void)
488 struct device_node *dp;
491 target_cpu = boot_cpu_id;
492 for_each_node_by_name(dp, "sbi") {
493 int devid = of_getintprop_default(dp, "device-id", 0);
494 int board = of_getintprop_default(dp, "board#", 0);
497 set_sbi_tid(devid, target_cpu << 3);
498 board_to_cpu[board] = target_cpu;
500 /* Get rid of pending irqs from PROM */
501 mask = acquire_sbi(devid, 0xffffffff);
503 printk(KERN_ERR "Clearing pending IRQs %08x on SBI %d\n",
505 release_sbi(devid, mask);
510 void __init sun4d_init_IRQ(void)
514 BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
515 BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
517 sparc_config.init_timers = sun4d_init_timers;
518 sparc_config.build_device_irq = sun4d_build_device_irq;
519 sparc_config.clock_rate = SBUS_CLOCK_RATE;
522 BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
524 /* Cannot enable interrupts until OBP ticker is disabled. */