1 /* atomic.h: These still suck, but the I-cache hit rate is higher.
3 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
5 * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
7 * Additions by Keith M Wesolowski (wesolows@foobazco.org) based
8 * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
11 #ifndef __ARCH_SPARC_ATOMIC__
12 #define __ARCH_SPARC_ATOMIC__
14 #include <linux/types.h>
18 #include <asm-generic/atomic64.h>
20 #include <asm/system.h>
22 #define ATOMIC_INIT(i) { (i) }
24 extern int __atomic_add_return(int, atomic_t *);
25 extern int atomic_cmpxchg(atomic_t *, int, int);
26 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
27 extern int atomic_add_unless(atomic_t *, int, int);
28 extern void atomic_set(atomic_t *, int);
30 #define atomic_read(v) (*(volatile int *)&(v)->counter)
32 #define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v)))
33 #define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v)))
34 #define atomic_inc(v) ((void)__atomic_add_return( 1, (v)))
35 #define atomic_dec(v) ((void)__atomic_add_return( -1, (v)))
37 #define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v)))
38 #define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v)))
39 #define atomic_inc_return(v) (__atomic_add_return( 1, (v)))
40 #define atomic_dec_return(v) (__atomic_add_return( -1, (v)))
42 #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
45 * atomic_inc_and_test - increment and test
46 * @v: pointer of type atomic_t
48 * Atomically increments @v by 1
49 * and returns true if the result is zero, or false for all
52 #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
54 #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
55 #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
57 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
59 /* This is the old 24-bit implementation. It's still used internally
60 * by some sparc-specific code, notably the semaphore implementation.
62 typedef struct { volatile int counter; } atomic24_t;
66 #define ATOMIC24_INIT(i) { (i) }
67 #define atomic24_read(v) ((v)->counter)
68 #define atomic24_set(v, i) (((v)->counter) = i)
71 /* We do the bulk of the actual work out of line in two common
72 * routines in assembler, see arch/sparc/lib/atomic.S for the
75 * For SMP the trick is you embed the spin lock byte within
76 * the word, use the low byte so signedness is easily retained
77 * via a quick arithmetic shift. It looks like this:
79 * ----------------------------------------
80 * | signed 24-bit counter value | lock | atomic_t
81 * ----------------------------------------
85 #define ATOMIC24_INIT(i) { ((i) << 8) }
87 static inline int atomic24_read(const atomic24_t *v)
97 #define atomic24_set(v, i) (((v)->counter) = ((i) << 8))
100 static inline int __atomic24_add(int i, atomic24_t *v)
102 register volatile int *ptr asm("g1");
103 register int increment asm("g2");
104 register int tmp1 asm("g3");
105 register int tmp2 asm("g4");
106 register int tmp3 asm("g7");
111 __asm__ __volatile__(
113 "call ___atomic24_add\n\t"
114 " add %%o7, 8, %%o7\n"
115 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
116 : "0" (increment), "r" (ptr)
122 static inline int __atomic24_sub(int i, atomic24_t *v)
124 register volatile int *ptr asm("g1");
125 register int increment asm("g2");
126 register int tmp1 asm("g3");
127 register int tmp2 asm("g4");
128 register int tmp3 asm("g7");
133 __asm__ __volatile__(
135 "call ___atomic24_sub\n\t"
136 " add %%o7, 8, %%o7\n"
137 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
138 : "0" (increment), "r" (ptr)
144 #define atomic24_add(i, v) ((void)__atomic24_add((i), (v)))
145 #define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v)))
147 #define atomic24_dec_return(v) __atomic24_sub(1, (v))
148 #define atomic24_inc_return(v) __atomic24_add(1, (v))
150 #define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0)
151 #define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0)
153 #define atomic24_inc(v) ((void)__atomic24_add(1, (v)))
154 #define atomic24_dec(v) ((void)__atomic24_sub(1, (v)))
156 #define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0)
158 /* Atomic operations are already serializing */
159 #define smp_mb__before_atomic_dec() barrier()
160 #define smp_mb__after_atomic_dec() barrier()
161 #define smp_mb__before_atomic_inc() barrier()
162 #define smp_mb__after_atomic_inc() barrier()
164 #endif /* !(__KERNEL__) */
166 #include <asm-generic/atomic-long.h>
167 #endif /* !(__ARCH_SPARC_ATOMIC__) */