1 /* This is where the SPARC/LEON3 starts
3 * Copyright (C) 2007, 2015
4 * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
6 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm-offsets.h>
11 #include <asm/asmmacro.h>
12 #include <asm/winmacro.h>
14 #include <asm/stack.h>
17 /* Entry for traps which jump to a programmer-specified trap handler. */
19 wr %g0, 0xfe0, %psr; \
29 #define TRAPI(ilevel) \
35 /* Unexcpected trap will halt the processor by forcing it to error state */
37 #define BAD_TRAP ta 0; nop; nop; nop;
39 /* Software trap. Treat as BAD_TRAP for the time being... */
40 #define SOFT_TRAP TRAP(_hwerr)
42 #define PSR_INIT 0x1FC0 /* Disable traps, set s and ps */
45 /* All traps low-level code here must end with this macro. */
46 #define RESTORE_ALL b ret_trap_entry; clr %l6;
48 #define WRITE_PAUSE nop;nop;nop
52 ARGPUSH = (WINDOWSIZE + 4)
53 MINFRAME = (WINDOWSIZE + ARGPUSHSIZE + 4)
55 /* Number of register windows */
56 #ifndef CONFIG_SYS_SPARC_NWINDOWS
57 #error Must define number of SPARC register windows, default is 8
60 /* Macros to load address into a register. Uses GOT table for PIC */
63 #define SPARC_PIC_THUNK_CALL(reg) \
64 sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %##reg; \
65 call __sparc_get_pc_thunk.reg; \
66 add %##reg, %pc10(_GLOBAL_OFFSET_TABLE_+4), %##reg;
68 #define SPARC_LOAD_ADDRESS(sym, got, reg) \
69 sethi %gdop_hix22(sym), %##reg; \
70 xor %##reg, %gdop_lox10(sym), %##reg; \
71 ld [%##got + %##reg], %##reg, %gdop(sym);
75 #define SPARC_PIC_THUNK_CALL(reg)
76 #define SPARC_LOAD_ADDRESS(sym, got, tmp) \
82 #define SA(X) (((X)+(STACK_ALIGN-1)) & ~(STACK_ALIGN-1))
84 .section ".start", "ax"
85 .globl _start, start, _trap_table
86 .globl _irq_entry, nmi_trap
95 TRAPR(_hardreset); ! 00 reset trap
96 BAD_TRAP; ! 01 instruction_access_exception
97 BAD_TRAP; ! 02 illegal_instruction
98 BAD_TRAP; ! 03 priveleged_instruction
99 BAD_TRAP; ! 04 fp_disabled
100 TRAP(_window_overflow); ! 05 window_overflow
101 TRAP(_window_underflow); ! 06 window_underflow
102 BAD_TRAP; ! 07 Memory Address Not Aligned
103 BAD_TRAP; ! 08 Floating Point Exception
104 BAD_TRAP; ! 09 Data Miss Exception
105 BAD_TRAP; ! 0a Tagged Instruction Ovrflw
106 BAD_TRAP; ! 0b Watchpoint Detected
112 TRAPI(1); ! 11 IRQ level 1
113 TRAPI(2); ! 12 IRQ level 2
114 TRAPI(3); ! 13 IRQ level 3
115 TRAPI(4); ! 14 IRQ level 4
116 TRAPI(5); ! 15 IRQ level 5
117 TRAPI(6); ! 16 IRQ level 6
118 TRAPI(7); ! 17 IRQ level 7
119 TRAPI(8); ! 18 IRQ level 8
120 TRAPI(9); ! 19 IRQ level 9
121 TRAPI(10); ! 1a IRQ level 10
122 TRAPI(11); ! 1b IRQ level 11
123 TRAPI(12); ! 1c IRQ level 12
124 TRAPI(13); ! 1d IRQ level 13
125 TRAPI(14); ! 1e IRQ level 14
126 TRAP(_nmi_trap); ! 1f IRQ level 15 /
127 ! NMI (non maskable interrupt)
128 BAD_TRAP; ! 20 r_register_access_error
129 BAD_TRAP; ! 21 instruction access error
132 BAD_TRAP; ! 24 co-processor disabled
133 BAD_TRAP; ! 25 uniplemented FLUSH
136 BAD_TRAP; ! 28 co-processor exception
137 BAD_TRAP; ! 29 data access error
138 BAD_TRAP; ! 2a division by zero
139 BAD_TRAP; ! 2b data store error
140 BAD_TRAP; ! 2c data access MMU miss
144 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 30-33
145 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 34-37
146 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 38-3b
147 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 3c-3f
148 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 40-43
149 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 44-47
150 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 48-4b
151 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 4c-4f
152 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 50-53
153 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 54-57
154 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 58-5b
155 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 5c-5f
157 /* implementaion dependent */
158 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 60-63
159 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 64-67
160 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 68-6b
161 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 6c-6f
162 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 70-73
163 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74-77
164 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78-7b
165 BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 7c-7f
167 /* Software traps, not handled */
168 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 80-83
169 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84-87
170 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 88-8b
171 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8c-8f
172 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90-93
173 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94-97
174 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 98-9b
175 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 9c-9f
176 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! a0-a3
177 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! a4-a7
178 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! a8-ab
179 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! ac-af
180 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! b0-b3
181 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! b4-b7
182 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! b8-bb
183 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! bc-bf
184 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! c0-c3
185 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! c4-c7
186 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! c8-cb
187 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! cc-cf
188 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! d0-d3
189 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! d4-d7
190 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! d8-db
191 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! dc-df
192 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! e0-e3
193 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! e4-e7
194 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! e8-eb
195 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! ec-ef
196 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! f0-f3
197 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! f4-f7
198 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! f8-fb
199 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! fc-ff
212 set (LEON2_PREGS+LEON_REG_CACHECTRL_OFFSET), %g1
249 /* LEON2 Register Base in g1 */
253 /* Set Cache control register */
259 /* Clear LEON2 registers */
260 st %g0, [%g1 + LEON2_ECTRL]
261 st %g0, [%g1 + LEON2_IMASK]
262 st %g0, [%g1 + LEON2_IPEND]
263 st %g0, [%g1 + LEON2_IFORCE]
264 st %g0, [%g1 + LEON2_ICLEAR]
265 st %g0, [%g1 + LEON2_IOREG]
266 st %g0, [%g1 + LEON2_IODIR]
267 st %g0, [%g1 + LEON2_IOICONF]
268 st %g0, [%g1 + LEON2_UCTRL0]
269 st %g0, [%g1 + LEON2_UCTRL1]
272 /* I/O port initialization */
274 st %g2, [%g1 + LEON2_IOREG]
278 /* memory config register 1 */
279 set CONFIG_SYS_GRLIB_MEMCFG1, %g2
283 st %g2, [%g1 + LEON2_MCFG1]
284 set CONFIG_SYS_GRLIB_MEMCFG2, %g2 ! Load memory config register 2
285 #if !( defined(TSIM) || !defined(BZIMAGE))
286 st %g2, [%g1 + LEON2_MCFG2] ! only for prom version, else done by "dumon -i"
288 set CONFIG_SYS_GRLIB_MEMCFG3, %g2 ! Init FT register
289 st %g2, [%g1 + LEON2_ECTRL]
290 ld [%g1 + LEON2_ECTRL], %g2
294 mov %g0, %asr16 ! clear err_reg
309 set CONFIG_SYS_INIT_SP_OFFSET, %fp
317 /* un relocated start address of monitor */
318 #define TEXT_START _text
320 /* un relocated end address of monitor */
321 #define DATA_END __init_end
323 SPARC_PIC_THUNK_CALL(l7)
325 SPARC_LOAD_ADDRESS(TEXT_START, l7, g2)
326 SPARC_LOAD_ADDRESS(DATA_END, l7, g3)
327 set CONFIG_SYS_RELOC_MONITOR_BASE,%g4
344 /* register g4 contain address to start
345 * This means that BSS must be directly after data and code segments
347 * g3 is length of bss = (__bss_end-__bss_start)
352 /* clear bss area (the relocated) */
353 SPARC_LOAD_ADDRESS(__bss_start, l7, g2)
354 SPARC_LOAD_ADDRESS(__bss_end, l7, g3)
357 clr %g1 /* std %g0 uses g0 and g1 */
358 /* clearing 16byte a time ==> linker script need to align to 16 byte offset */
367 /* add offsets to GOT table */
369 SPARC_LOAD_ADDRESS(__got_start, l7, g4)
370 SPARC_LOAD_ADDRESS(__got_end, l7, g3)
372 * new got offset = (old GOT-PTR (read with ld) -
373 * CONFIG_SYS_RELOC_MONITOR_BASE(from define) ) +
374 * Destination Address (from define)
376 set CONFIG_SYS_RELOC_MONITOR_BASE,%g2
377 SPARC_LOAD_ADDRESS(TEXT_START, l7, g1)
382 sub %g2,%g1,%g2 ! prepare register with (new base address) -
385 ld [%g4],%l0 ! load old GOT-PTR
386 add %l0,%g2,%l0 ! increase with (new base address) -
395 SPARC_LOAD_ADDRESS(__prom_start, l7, g2)
396 SPARC_LOAD_ADDRESS(__prom_end, l7, g3)
397 set CONFIG_SYS_PROM_OFFSET, %g4
406 bne prom_relocate_loop
409 /* Trap table has been moved, lets tell CPU about
410 * the new trap table address
413 set CONFIG_SYS_RELOC_MONITOR_BASE, %g2
418 /* Call relocated init functions */
420 SPARC_LOAD_ADDRESS(cpu_init_f2, l7, o1)
421 set CONFIG_SYS_RELOC_MONITOR_BASE,%o2
427 SPARC_LOAD_ADDRESS(board_init_f, l7, o1)
428 set CONFIG_SYS_RELOC_MONITOR_BASE,%o2
434 dead: ta 0 ! if call returns...
437 /* Interrupt handler caller,
438 * reg L7: interrupt number
439 * reg L0: psr after interrupt
452 mov %l7, %o0 ! irq level
454 set (CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o2
457 add %sp, SF_REGS_SZ, %o1 ! pt_regs ptr
458 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
459 wr %g2, PSR_ET, %psr ! keep ET up
464 !Window overflow trap handler.
465 .global _window_overflow
469 mov %wim, %l3 ! Calculate next WIM
472 sll %l3, (CONFIG_SYS_SPARC_NWINDOWS-1) , %l4
475 save ! Get into window to be saved.
496 restore ! Go back to trap window.
498 jmp %l1 ! Re-execute save.
501 /* Window underflow trap handler. */
503 .global _window_underflow
507 mov %wim, %l3 ! Calculate next WIM
509 srl %l3, (CONFIG_SYS_SPARC_NWINDOWS-1), %l5
513 restore ! Two restores to get into the
514 restore ! window to restore
515 ld [%sp + 0], %l0; ! Restore window from the stack
531 save ! Get back to the trap window.
533 jmp %l1 ! Re-execute restore.
547 b _hwerr ! loop infinite
550 /* Registers to not touch at all. */
551 #define t_psr l0 /* Set by caller */
552 #define t_pc l1 /* Set by caller */
553 #define t_npc l2 /* Set by caller */
554 #define t_wim l3 /* Set by caller */
555 #define t_twinmask l4 /* Set at beginning of this entry routine. */
556 #define t_kstack l5 /* Set right before pt_regs frame is built */
557 #define t_retpc l6 /* If you change this, change winmacro.h header file */
558 #define t_systable l7 /* Never touch this, could be the syscall table ptr. */
559 #define curptr g6 /* Set after pt_regs frame is built */
562 /* build a pt_regs trap frame. */
563 sub %fp, (SF_REGS_SZ + PT_REGS_SZ), %t_kstack
564 PT_STORE_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
566 /* See if we are in the trap window. */
568 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
569 andcc %t_twinmask, %t_wim, %g0
570 beq 1f ! in trap window, clean up
573 /*-------------------------------------------------
574 * Spill , adjust %wim and go.
576 srl %t_wim, 0x1, %g2 ! begin computation of new %wim
578 set (CONFIG_SYS_SPARC_NWINDOWS-1), %g3 !NWINDOWS-1
580 sll %t_wim, %g3, %t_wim ! NWINDOWS-1
584 save %g0, %g0, %g0 ! get in window to be saved
586 /* Set new %wim value */
589 /* Save the kernel window onto the corresponding stack. */
592 restore %g0, %g0, %g0
593 /*-------------------------------------------------*/
596 /* Trap from kernel with a window available.
599 jmpl %t_retpc + 0x8, %g0 ! return to caller
600 mov %t_kstack, %sp ! jump onto new stack
606 wr %t_psr, 0x0, %psr ! enable nesting again, clear ET
608 /* Will the rett land us in the invalid window? */
612 set CONFIG_SYS_SPARC_NWINDOWS, %g2 !NWINDOWS
618 be 1f ! Nope, just return from the trap
621 /* We have to grab a window before returning. */
622 set (CONFIG_SYS_SPARC_NWINDOWS-1), %g3 !NWINDOWS-1
630 /* Grrr, make sure we load from the right %sp... */
631 PT_LOAD_ALL(sp, t_psr, t_pc, t_npc, g1)
633 restore %g0, %g0, %g0
638 /* Reload the entire frame in case this is from a
639 * kernel system call or whatever...
642 PT_LOAD_ALL(sp, t_psr, t_pc, t_npc, g1)
652 /* This is called from relocated C-code.
653 * It resets the system by jumping to _start