2 * Renesas System Solutions Asia Pte. Ltd - Migo-R
4 * Copyright (C) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/input.h>
14 #include <linux/input/sh_keysc.h>
15 #include <linux/mmc/host.h>
16 #include <linux/mmc/sh_mobile_sdhi.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/i2c.h>
20 #include <linux/smc91x.h>
21 #include <linux/delay.h>
22 #include <linux/clk.h>
23 #include <linux/gpio.h>
24 #include <video/sh_mobile_lcdc.h>
25 #include <media/sh_mobile_ceu.h>
26 #include <media/ov772x.h>
27 #include <media/tw9910.h>
28 #include <asm/clock.h>
29 #include <asm/machvec.h>
31 #include <asm/suspend.h>
32 #include <mach/migor.h>
33 #include <cpu/sh7722.h>
35 /* Address IRQ Size Bus Description
36 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
37 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
38 * 0x10000000 IRQ0 16 Ethernet (SMC91C111)
39 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
40 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
43 static struct smc91x_platdata smc91x_info = {
44 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
47 static struct resource smc91x_eth_resources[] = {
52 .flags = IORESOURCE_MEM,
55 .start = 32, /* IRQ0 */
56 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
60 static struct platform_device smc91x_eth_device = {
62 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
63 .resource = smc91x_eth_resources,
65 .platform_data = &smc91x_info,
69 static struct sh_keysc_info sh_keysc_info = {
70 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
74 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
75 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
76 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
77 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
78 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
82 static struct resource sh_keysc_resources[] = {
86 .flags = IORESOURCE_MEM,
90 .flags = IORESOURCE_IRQ,
94 static struct platform_device sh_keysc_device = {
96 .id = 0, /* "keysc0" clock */
97 .num_resources = ARRAY_SIZE(sh_keysc_resources),
98 .resource = sh_keysc_resources,
100 .platform_data = &sh_keysc_info,
104 static struct mtd_partition migor_nor_flash_partitions[] =
109 .size = (1 * 1024 * 1024),
110 .mask_flags = MTD_WRITEABLE, /* Read-only */
114 .offset = MTDPART_OFS_APPEND,
115 .size = (15 * 1024 * 1024),
119 .offset = MTDPART_OFS_APPEND,
120 .size = MTDPART_SIZ_FULL,
124 static struct physmap_flash_data migor_nor_flash_data = {
126 .parts = migor_nor_flash_partitions,
127 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
130 static struct resource migor_nor_flash_resources[] = {
135 .flags = IORESOURCE_MEM,
139 static struct platform_device migor_nor_flash_device = {
140 .name = "physmap-flash",
141 .resource = migor_nor_flash_resources,
142 .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
144 .platform_data = &migor_nor_flash_data,
148 static struct mtd_partition migor_nand_flash_partitions[] = {
152 .size = 512 * 1024 * 1024,
156 .offset = MTDPART_OFS_APPEND,
157 .size = 512 * 1024 * 1024,
161 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
164 struct nand_chip *chip = mtd->priv;
166 if (cmd == NAND_CMD_NONE)
170 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
171 else if (ctrl & NAND_ALE)
172 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
174 writeb(cmd, chip->IO_ADDR_W);
177 static int migor_nand_flash_ready(struct mtd_info *mtd)
179 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
182 static struct platform_nand_data migor_nand_flash_data = {
185 .partitions = migor_nand_flash_partitions,
186 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
188 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
191 .dev_ready = migor_nand_flash_ready,
192 .cmd_ctrl = migor_nand_flash_cmd_ctl,
196 static struct resource migor_nand_flash_resources[] = {
198 .name = "NAND Flash",
201 .flags = IORESOURCE_MEM,
205 static struct platform_device migor_nand_flash_device = {
207 .resource = migor_nand_flash_resources,
208 .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
210 .platform_data = &migor_nand_flash_data,
214 static const struct fb_videomode migor_lcd_modes[] = {
216 #if defined(CONFIG_SH_MIGOR_RTA_WVGA)
224 #elif defined(CONFIG_SH_MIGOR_QVGA)
231 .sync = FB_SYNC_HOR_HIGH_ACT,
239 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
240 #if defined(CONFIG_SH_MIGOR_RTA_WVGA)
241 .clock_source = LCDC_CLK_BUS,
243 .chan = LCDC_CHAN_MAINLCD,
245 .interface_type = RGB16,
247 .lcd_cfg = migor_lcd_modes,
248 .num_cfg = ARRAY_SIZE(migor_lcd_modes),
249 .lcd_size_cfg = { /* 7.0 inch */
254 #elif defined(CONFIG_SH_MIGOR_QVGA)
255 .clock_source = LCDC_CLK_PERIPHERAL,
257 .chan = LCDC_CHAN_MAINLCD,
259 .interface_type = SYS16A,
261 .lcd_cfg = migor_lcd_modes,
262 .num_cfg = ARRAY_SIZE(migor_lcd_modes),
263 .lcd_size_cfg = { /* 2.4 inch */
268 .setup_sys = migor_lcd_qvga_setup,
271 .ldmt2r = 0x06000a09,
272 .ldmt3r = 0x180e3418,
273 /* set 1s delay to encourage fsync() */
274 .deferred_io_msec = 1000,
280 static struct resource migor_lcdc_resources[] = {
283 .start = 0xfe940000, /* P4-only space */
285 .flags = IORESOURCE_MEM,
289 .flags = IORESOURCE_IRQ,
293 static struct platform_device migor_lcdc_device = {
294 .name = "sh_mobile_lcdc_fb",
295 .num_resources = ARRAY_SIZE(migor_lcdc_resources),
296 .resource = migor_lcdc_resources,
298 .platform_data = &sh_mobile_lcdc_info,
302 static struct clk *camera_clk;
303 static DEFINE_MUTEX(camera_lock);
305 static void camera_power_on(int is_tw)
307 mutex_lock(&camera_lock);
309 /* Use 10 MHz VIO_CKO instead of 24 MHz to work
310 * around signal quality issues on Panel Board V2.1.
312 camera_clk = clk_get(NULL, "video_clk");
313 clk_set_rate(camera_clk, 10000000);
314 clk_enable(camera_clk); /* start VIO_CKO */
316 /* use VIO_RST to take camera out of reset */
319 gpio_set_value(GPIO_PTT2, 0);
320 gpio_set_value(GPIO_PTT0, 0);
322 gpio_set_value(GPIO_PTT0, 1);
324 gpio_set_value(GPIO_PTT3, 0);
326 gpio_set_value(GPIO_PTT3, 1);
327 mdelay(10); /* wait to let chip come out of reset */
330 static void camera_power_off(void)
332 clk_disable(camera_clk); /* stop VIO_CKO */
335 gpio_set_value(GPIO_PTT3, 0);
336 mutex_unlock(&camera_lock);
339 static int ov7725_power(struct device *dev, int mode)
349 static int tw9910_power(struct device *dev, int mode)
359 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
360 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
363 static struct resource migor_ceu_resources[] = {
368 .flags = IORESOURCE_MEM,
372 .flags = IORESOURCE_IRQ,
375 /* place holder for contiguous memory */
379 static struct platform_device migor_ceu_device = {
380 .name = "sh_mobile_ceu",
381 .id = 0, /* "ceu0" clock */
382 .num_resources = ARRAY_SIZE(migor_ceu_resources),
383 .resource = migor_ceu_resources,
385 .platform_data = &sh_mobile_ceu_info,
389 static struct resource sdhi_cn9_resources[] = {
394 .flags = IORESOURCE_MEM,
398 .flags = IORESOURCE_IRQ,
402 static struct sh_mobile_sdhi_info sh7724_sdhi_data = {
403 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
404 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
405 .tmio_caps = MMC_CAP_SDIO_IRQ,
408 static struct platform_device sdhi_cn9_device = {
409 .name = "sh_mobile_sdhi",
410 .num_resources = ARRAY_SIZE(sdhi_cn9_resources),
411 .resource = sdhi_cn9_resources,
413 .platform_data = &sh7724_sdhi_data,
417 static struct i2c_board_info migor_i2c_devices[] = {
419 I2C_BOARD_INFO("rs5c372b", 0x32),
422 I2C_BOARD_INFO("migor_ts", 0x51),
423 .irq = 38, /* IRQ6 */
426 I2C_BOARD_INFO("wm8978", 0x1a),
430 static struct i2c_board_info migor_i2c_camera[] = {
432 I2C_BOARD_INFO("ov772x", 0x21),
435 I2C_BOARD_INFO("tw9910", 0x45),
439 static struct ov772x_camera_info ov7725_info;
441 static struct soc_camera_link ov7725_link = {
442 .power = ov7725_power,
443 .board_info = &migor_i2c_camera[0],
445 .priv = &ov7725_info,
448 static struct tw9910_video_info tw9910_info = {
449 .buswidth = SOCAM_DATAWIDTH_8,
450 .mpout = TW9910_MPO_FIELD,
453 static struct soc_camera_link tw9910_link = {
454 .power = tw9910_power,
455 .board_info = &migor_i2c_camera[1],
457 .priv = &tw9910_info,
460 static struct platform_device migor_camera[] = {
462 .name = "soc-camera-pdrv",
465 .platform_data = &ov7725_link,
468 .name = "soc-camera-pdrv",
471 .platform_data = &tw9910_link,
476 static struct platform_device *migor_devices[] __initdata = {
481 &migor_nor_flash_device,
482 &migor_nand_flash_device,
488 extern char migor_sdram_enter_start;
489 extern char migor_sdram_enter_end;
490 extern char migor_sdram_leave_start;
491 extern char migor_sdram_leave_end;
493 static int __init migor_devices_setup(void)
495 /* register board specific self-refresh code */
496 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
497 &migor_sdram_enter_start,
498 &migor_sdram_enter_end,
499 &migor_sdram_leave_start,
500 &migor_sdram_leave_end);
501 /* Let D11 LED show STATUS0 */
502 gpio_request(GPIO_FN_STATUS0, NULL);
504 /* Lit D12 LED show PDSTATUS */
505 gpio_request(GPIO_FN_PDSTATUS, NULL);
507 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
508 gpio_request(GPIO_FN_IRQ0, NULL);
509 __raw_writel(0x00003400, BSC_CS4BCR);
510 __raw_writel(0x00110080, BSC_CS4WCR);
513 gpio_request(GPIO_FN_KEYOUT0, NULL);
514 gpio_request(GPIO_FN_KEYOUT1, NULL);
515 gpio_request(GPIO_FN_KEYOUT2, NULL);
516 gpio_request(GPIO_FN_KEYOUT3, NULL);
517 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
518 gpio_request(GPIO_FN_KEYIN1, NULL);
519 gpio_request(GPIO_FN_KEYIN2, NULL);
520 gpio_request(GPIO_FN_KEYIN3, NULL);
521 gpio_request(GPIO_FN_KEYIN4, NULL);
522 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
525 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
526 __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
527 gpio_request(GPIO_PTA1, NULL);
528 gpio_direction_input(GPIO_PTA1);
531 gpio_request(GPIO_FN_SDHICD, NULL);
532 gpio_request(GPIO_FN_SDHIWP, NULL);
533 gpio_request(GPIO_FN_SDHID3, NULL);
534 gpio_request(GPIO_FN_SDHID2, NULL);
535 gpio_request(GPIO_FN_SDHID1, NULL);
536 gpio_request(GPIO_FN_SDHID0, NULL);
537 gpio_request(GPIO_FN_SDHICMD, NULL);
538 gpio_request(GPIO_FN_SDHICLK, NULL);
541 gpio_request(GPIO_FN_IRQ6, NULL);
544 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
545 gpio_request(GPIO_FN_LCDD17, NULL);
546 gpio_request(GPIO_FN_LCDD16, NULL);
547 gpio_request(GPIO_FN_LCDD15, NULL);
548 gpio_request(GPIO_FN_LCDD14, NULL);
549 gpio_request(GPIO_FN_LCDD13, NULL);
550 gpio_request(GPIO_FN_LCDD12, NULL);
551 gpio_request(GPIO_FN_LCDD11, NULL);
552 gpio_request(GPIO_FN_LCDD10, NULL);
553 gpio_request(GPIO_FN_LCDD8, NULL);
554 gpio_request(GPIO_FN_LCDD7, NULL);
555 gpio_request(GPIO_FN_LCDD6, NULL);
556 gpio_request(GPIO_FN_LCDD5, NULL);
557 gpio_request(GPIO_FN_LCDD4, NULL);
558 gpio_request(GPIO_FN_LCDD3, NULL);
559 gpio_request(GPIO_FN_LCDD2, NULL);
560 gpio_request(GPIO_FN_LCDD1, NULL);
561 gpio_request(GPIO_FN_LCDRS, NULL);
562 gpio_request(GPIO_FN_LCDCS, NULL);
563 gpio_request(GPIO_FN_LCDRD, NULL);
564 gpio_request(GPIO_FN_LCDWR, NULL);
565 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
566 gpio_direction_output(GPIO_PTH2, 1);
568 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
569 gpio_request(GPIO_FN_LCDD15, NULL);
570 gpio_request(GPIO_FN_LCDD14, NULL);
571 gpio_request(GPIO_FN_LCDD13, NULL);
572 gpio_request(GPIO_FN_LCDD12, NULL);
573 gpio_request(GPIO_FN_LCDD11, NULL);
574 gpio_request(GPIO_FN_LCDD10, NULL);
575 gpio_request(GPIO_FN_LCDD9, NULL);
576 gpio_request(GPIO_FN_LCDD8, NULL);
577 gpio_request(GPIO_FN_LCDD7, NULL);
578 gpio_request(GPIO_FN_LCDD6, NULL);
579 gpio_request(GPIO_FN_LCDD5, NULL);
580 gpio_request(GPIO_FN_LCDD4, NULL);
581 gpio_request(GPIO_FN_LCDD3, NULL);
582 gpio_request(GPIO_FN_LCDD2, NULL);
583 gpio_request(GPIO_FN_LCDD1, NULL);
584 gpio_request(GPIO_FN_LCDD0, NULL);
585 gpio_request(GPIO_FN_LCDLCLK, NULL);
586 gpio_request(GPIO_FN_LCDDCK, NULL);
587 gpio_request(GPIO_FN_LCDVEPWC, NULL);
588 gpio_request(GPIO_FN_LCDVCPWC, NULL);
589 gpio_request(GPIO_FN_LCDVSYN, NULL);
590 gpio_request(GPIO_FN_LCDHSYN, NULL);
591 gpio_request(GPIO_FN_LCDDISP, NULL);
592 gpio_request(GPIO_FN_LCDDON, NULL);
596 gpio_request(GPIO_FN_VIO_CLK2, NULL);
597 gpio_request(GPIO_FN_VIO_VD2, NULL);
598 gpio_request(GPIO_FN_VIO_HD2, NULL);
599 gpio_request(GPIO_FN_VIO_FLD, NULL);
600 gpio_request(GPIO_FN_VIO_CKO, NULL);
601 gpio_request(GPIO_FN_VIO_D15, NULL);
602 gpio_request(GPIO_FN_VIO_D14, NULL);
603 gpio_request(GPIO_FN_VIO_D13, NULL);
604 gpio_request(GPIO_FN_VIO_D12, NULL);
605 gpio_request(GPIO_FN_VIO_D11, NULL);
606 gpio_request(GPIO_FN_VIO_D10, NULL);
607 gpio_request(GPIO_FN_VIO_D9, NULL);
608 gpio_request(GPIO_FN_VIO_D8, NULL);
610 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
611 gpio_direction_output(GPIO_PTT3, 0);
612 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
613 gpio_direction_output(GPIO_PTT2, 1);
614 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
615 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
616 gpio_direction_output(GPIO_PTT0, 0);
618 gpio_direction_output(GPIO_PTT0, 1);
620 __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
622 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
625 gpio_request(GPIO_FN_SIUBOLR, NULL);
626 gpio_request(GPIO_FN_SIUBOBT, NULL);
627 gpio_request(GPIO_FN_SIUBISLD, NULL);
628 gpio_request(GPIO_FN_SIUBOSLD, NULL);
629 gpio_request(GPIO_FN_SIUMCKB, NULL);
632 * The original driver sets SIUB OLR/OBT, ILR/IBT, and SIUA OLR/OBT to
633 * output. Need only SIUB, set to output for master mode (table 34.2)
635 __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA);
637 i2c_register_board_info(0, migor_i2c_devices,
638 ARRAY_SIZE(migor_i2c_devices));
640 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
642 arch_initcall(migor_devices_setup);
644 /* Return the board specific boot mode pin configuration */
645 static int migor_mode_pins(void)
647 /* MD0=1, MD1=1, MD2=0: Clock Mode 3
648 * MD3=0: 16-bit Area0 Bus Width
649 * MD5=1: Little Endian
650 * TSTMD=1, MD8=0: Test Mode Disabled
652 return MODE_PIN0 | MODE_PIN1 | MODE_PIN5;
658 static struct sh_machine_vector mv_migor __initmv = {
660 .mv_mode_pins = migor_mode_pins,