1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Test-related constants for sandbox
5 * Copyright (c) 2014 Google, Inc
11 /* The sandbox driver always permits an I2C device with this address */
12 #define SANDBOX_I2C_TEST_ADDR 0x59
14 #define SANDBOX_PCI_VENDOR_ID 0x1234
15 #define SANDBOX_PCI_SWAP_CASE_EMUL_ID 0x5678
16 #define SANDBOX_PCI_PMC_EMUL_ID 0x5677
17 #define SANDBOX_PCI_P2SB_EMUL_ID 0x5676
18 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM
19 #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL
21 #define PCI_CAP_ID_PM_OFFSET 0x50
22 #define PCI_CAP_ID_EXP_OFFSET 0x60
23 #define PCI_CAP_ID_MSIX_OFFSET 0x70
24 #define PCI_CAP_ID_EA_OFFSET 0x80
26 #define PCI_EXT_CAP_ID_ERR_OFFSET 0x100
27 #define PCI_EXT_CAP_ID_VC_OFFSET 0x200
28 #define PCI_EXT_CAP_ID_DSN_OFFSET 0x300
30 /* Useful for PCI_VDEVICE() macro */
31 #define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID
32 #define SWAP_CASE_DRV_DATA 0x55aa
34 #define SANDBOX_CLK_RATE 32768
36 /* Macros used to test PCI EA capability structure */
37 #define PCI_CAP_EA_BASE_LO0 0x00100000
38 #define PCI_CAP_EA_BASE_LO1 0x00110000
39 #define PCI_CAP_EA_BASE_LO2 0x00120000
40 #define PCI_CAP_EA_BASE_LO4 0x00140000
41 #define PCI_CAP_EA_BASE_HI2 0x00020000ULL
42 #define PCI_CAP_EA_BASE_HI4 0x00040000ULL
43 #define PCI_CAP_EA_SIZE_LO 0x0000ffff
44 #define PCI_CAP_EA_SIZE_HI 0x00000010ULL
45 #define PCI_EA_BAR2_MAGIC 0x72727272
46 #define PCI_EA_BAR4_MAGIC 0x74747474
49 SANDBOX_IRQN_PEND = 1, /* Interrupt number for 'pending' test */
52 /* System controller driver data */
61 * sandbox_i2c_set_test_mode() - set test mode for running unit tests
63 * See sandbox_i2c_xfer() for the behaviour changes.
65 * @bus: sandbox I2C bus to adjust
66 * @test_mode: true to select test mode, false to run normally
68 void sandbox_i2c_set_test_mode(struct udevice *bus, bool test_mode);
70 enum sandbox_i2c_eeprom_test_mode {
72 /* Permits read/write of only one byte per I2C transaction */
73 SIE_TEST_MODE_SINGLE_BYTE,
76 void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,
77 enum sandbox_i2c_eeprom_test_mode mode);
79 void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len);
81 void sandbox_i2c_eeprom_set_chip_addr_offset_mask(struct udevice *dev,
84 uint sanbox_i2c_eeprom_get_prev_addr(struct udevice *dev);
86 uint sanbox_i2c_eeprom_get_prev_offset(struct udevice *dev);
89 * sandbox_i2c_rtc_set_offset() - set the time offset from system/base time
91 * @dev: RTC device to adjust
92 * @use_system_time: true to use system time, false to use @base_time
93 * @offset: RTC offset from current system/base time (-1 for no
95 * @return old value of RTC offset
97 long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time,
101 * sandbox_i2c_rtc_get_set_base_time() - get and set the base time
103 * @dev: RTC device to adjust
104 * @base_time: New base system time (set to -1 for no change)
105 * @return old base time
107 long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time);
109 int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str);
112 * sandbox_osd_get_mem() - get the internal memory of a sandbox OSD
114 * @dev: OSD device for which to access the internal memory for
115 * @buf: pointer to buffer to receive the OSD memory data
116 * @buflen: length of buffer in bytes
118 int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen);
121 * sandbox_pwm_get_config() - get the PWM config for a channel
123 * @dev: Device to check
124 * @channel: Channel number to check
125 * @period_ns: Period of the PWM in nanoseconds
126 * @duty_ns: Current duty cycle of the PWM in nanoseconds
127 * @enable: true if the PWM is enabled
128 * @polarity: true if the PWM polarity is active high
129 * @return 0 if OK, -ENOSPC if the PWM number is invalid
131 int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
132 uint *duty_nsp, bool *enablep, bool *polarityp);
135 * sandbox_sf_set_block_protect() - Set the BP bits of the status register
137 * @dev: Device to update
138 * @bp_mask: BP bits to set (bits 2:0, so a value of 0 to 7)
140 void sandbox_sf_set_block_protect(struct udevice *dev, int bp_mask);
143 * sandbox_get_codec_params() - Read back codec parameters
145 * This reads back the parameters set by audio_codec_set_params() for the
146 * sandbox audio driver. Arguments are as for that function.
148 void sandbox_get_codec_params(struct udevice *dev, int *interfacep, int *ratep,
149 int *mclk_freqp, int *bits_per_samplep,
153 * sandbox_get_i2s_sum() - Read back the sum of the audio data so far
155 * This data is provided to the sandbox driver by the I2S tx_data() method.
157 * @dev: Device to check
158 * @return sum of audio data
160 int sandbox_get_i2s_sum(struct udevice *dev);
163 * sandbox_get_setup_called() - Returns the number of times setup(*) was called
165 * This is used in the sound test
167 * @dev: Device to check
168 * @return call count for the setup() method
170 int sandbox_get_setup_called(struct udevice *dev);
173 * sandbox_get_sound_active() - Returns whether sound play is in progress
175 * @return true if active, false if not
177 int sandbox_get_sound_active(struct udevice *dev);
180 * sandbox_get_sound_sum() - Read back the sum of the sound data so far
182 * This data is provided to the sandbox driver by the sound play() method.
184 * @dev: Device to check
185 * @return sum of audio data
187 int sandbox_get_sound_sum(struct udevice *dev);
190 * sandbox_set_allow_beep() - Set whether the 'beep' interface is supported
192 * @dev: Device to update
193 * @allow: true to allow the start_beep() method, false to disallow it
195 void sandbox_set_allow_beep(struct udevice *dev, bool allow);
198 * sandbox_get_beep_frequency() - Get the frequency of the current beep
200 * @dev: Device to check
201 * @return frequency of beep, if there is an active beep, else 0
203 int sandbox_get_beep_frequency(struct udevice *dev);
206 * sandbox_get_pch_spi_protect() - Get the PCI SPI protection status
208 * @dev: Device to check
209 * @return 0 if not protected, 1 if protected
211 int sandbox_get_pch_spi_protect(struct udevice *dev);
214 * sandbox_get_pci_ep_irq_count() - Get the PCI EP IRQ count
216 * @dev: Device to check
219 int sandbox_get_pci_ep_irq_count(struct udevice *dev);
222 * sandbox_pci_read_bar() - Read the BAR value for a read_config operation
224 * This is used in PCI emulators to read a base address reset. This has special
225 * rules because when the register is set to 0xffffffff it can be used to
226 * discover the type and size of the BAR.
228 * @barval: Current value of the BAR
229 * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or
230 * PCI_BASE_ADDRESS_MEM_TYPE_32)
231 * @size: Size of BAR in bytes
232 * @return BAR value to return from emulator
234 uint sandbox_pci_read_bar(u32 barval, int type, uint size);
237 * sandbox_set_enable_memio() - Enable readl/writel() for sandbox
239 * Normally these I/O functions do nothing with sandbox. Certain tests need them
240 * to work as for other architectures, so this function can be used to enable
243 * @enable: true to enable, false to disable
245 void sandbox_set_enable_memio(bool enable);