arch/sandbox/dts/sandbox64.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Main sandbox64 devicetree
   4  */
   5 /dts-v1/;
   6
   7 #include <config.h>
   8
   9 / {
  10         #address-cells = <2>;
  11         #size-cells = <2>;
  12         model = "sandbox";
  13         compatible = "sandbox";
  14
  15         aliases {
  16                 i2c0 = &i2c_0;
  17                 pci0 = &pcic;
  18                 rtc0 = &rtc_0;
  19                 axi0 = &axi;
  20                 spi0 = &spi;
  21         };
  22
  23         memory {
  24                 reg = /bits/ 64 <0 CFG_SYS_SDRAM_SIZE>;
  25         };
  26
  27         reserved-memory {
  28                 #address-cells = <2>;
  29                 #size-cells = <2>;
  30                 ranges;
  31
  32                 reservation_test_size {
  33                         size = <0 0x4000>;
  34                         alignment = <0 0x2000>;
  35                 };
  36
  37                 reservation_test@a000 {
  38                         reg = <0 0x00d0a000 0 0x2000>;
  39                 };
  40
  41                 reservation_test@7000 {
  42                         reg = <0 0x00d07000 0 0x1000>;
  43                 };
  44         };
  45
  46         /* ... */
  47         cros_ec: cros-ec {
  48                 reg = <0 0 0 0>;
  49                 bootph-all;
  50                 compatible = "google,cros-ec-sandbox";
  51         };
  52
  53         ethrawbus {
  54                 compatible = "sandbox,eth-raw-bus";
  55                 skip-localhost = <1>;
  56         };
  57
  58         eth@10002000 {
  59                 compatible = "sandbox,eth";
  60                 reg = <0x0 0x10002000 0x0 0x1000>;
  61         };
  62
  63         i2c_0: i2c@0 {
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66                 reg = <0 0 0 0>;
  67                 compatible = "sandbox,i2c";
  68                 clock-frequency = <400000>;
  69                 pinctrl-names = "default";
  70                 pinctrl-0 = <&pinctrl_i2c0>;
  71         };
  72
  73         pcic: pci@0 {
  74                 compatible = "sandbox,pci";
  75                 device_type = "pci";
  76                 bus-range = <0x00 0xff>;
  77                 #address-cells = <3>;
  78                 #size-cells = <2>;
  79                 ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
  80                                 0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
  81         };
  82
  83         spi: spi@0 {
  84                 bootph-all;
  85                 #address-cells = <1>;
  86                 #size-cells = <0>;
  87                 reg = <0 0 0 0>;
  88                 compatible = "sandbox,spi";
  89                 cs-gpios = <0>, <&gpio_a 0>;
  90         };
  91
  92         nvmxip-qspi1@08000000 {
  93                 compatible = "nvmxip,qspi";
  94                 reg = /bits/ 64 <0x08000000 0x00200000>;
  95                 lba_shift = <9>;
  96                 lba = <4096>;
  97         };
  98
  99         nvmxip-qspi2@08200000 {
 100                 compatible = "nvmxip,qspi";
 101                 reg = /bits/ 64 <0x08200000 0x00100000>;
 102                 lba_shift = <9>;
 103                 lba = <2048>;
 104         };
 105 };
 106
 107 #include "sandbox.dtsi"
 108 #include "cros-ec-keyboard.dtsi"
 109 #include "sandbox_pmic.dtsi"