1 // SPDX-License-Identifier: GPL-2.0
3 * guest access functions
5 * Copyright IBM Corp. 2014
9 #include <linux/vmalloc.h>
10 #include <linux/mm_types.h>
11 #include <linux/err.h>
12 #include <linux/pgtable.h>
13 #include <linux/bitfield.h>
18 #include <asm/switch_to.h>
23 unsigned long origin : 52; /* Region- or Segment-Table Origin */
25 unsigned long g : 1; /* Subspace Group Control */
26 unsigned long p : 1; /* Private Space Control */
27 unsigned long s : 1; /* Storage-Alteration-Event Control */
28 unsigned long x : 1; /* Space-Switch-Event Control */
29 unsigned long r : 1; /* Real-Space Control */
31 unsigned long dt : 2; /* Designation-Type Control */
32 unsigned long tl : 2; /* Region- or Segment-Table Length */
37 ASCE_TYPE_SEGMENT = 0,
38 ASCE_TYPE_REGION3 = 1,
39 ASCE_TYPE_REGION2 = 2,
43 union region1_table_entry {
46 unsigned long rto: 52;/* Region-Table Origin */
48 unsigned long p : 1; /* DAT-Protection Bit */
50 unsigned long tf : 2; /* Region-Second-Table Offset */
51 unsigned long i : 1; /* Region-Invalid Bit */
53 unsigned long tt : 2; /* Table-Type Bits */
54 unsigned long tl : 2; /* Region-Second-Table Length */
58 union region2_table_entry {
61 unsigned long rto: 52;/* Region-Table Origin */
63 unsigned long p : 1; /* DAT-Protection Bit */
65 unsigned long tf : 2; /* Region-Third-Table Offset */
66 unsigned long i : 1; /* Region-Invalid Bit */
68 unsigned long tt : 2; /* Table-Type Bits */
69 unsigned long tl : 2; /* Region-Third-Table Length */
73 struct region3_table_entry_fc0 {
74 unsigned long sto: 52;/* Segment-Table Origin */
76 unsigned long fc : 1; /* Format-Control */
77 unsigned long p : 1; /* DAT-Protection Bit */
79 unsigned long tf : 2; /* Segment-Table Offset */
80 unsigned long i : 1; /* Region-Invalid Bit */
81 unsigned long cr : 1; /* Common-Region Bit */
82 unsigned long tt : 2; /* Table-Type Bits */
83 unsigned long tl : 2; /* Segment-Table Length */
86 struct region3_table_entry_fc1 {
87 unsigned long rfaa : 33; /* Region-Frame Absolute Address */
89 unsigned long av : 1; /* ACCF-Validity Control */
90 unsigned long acc: 4; /* Access-Control Bits */
91 unsigned long f : 1; /* Fetch-Protection Bit */
92 unsigned long fc : 1; /* Format-Control */
93 unsigned long p : 1; /* DAT-Protection Bit */
94 unsigned long iep: 1; /* Instruction-Execution-Protection */
96 unsigned long i : 1; /* Region-Invalid Bit */
97 unsigned long cr : 1; /* Common-Region Bit */
98 unsigned long tt : 2; /* Table-Type Bits */
102 union region3_table_entry {
104 struct region3_table_entry_fc0 fc0;
105 struct region3_table_entry_fc1 fc1;
108 unsigned long fc : 1; /* Format-Control */
110 unsigned long i : 1; /* Region-Invalid Bit */
111 unsigned long cr : 1; /* Common-Region Bit */
112 unsigned long tt : 2; /* Table-Type Bits */
117 struct segment_entry_fc0 {
118 unsigned long pto: 53;/* Page-Table Origin */
119 unsigned long fc : 1; /* Format-Control */
120 unsigned long p : 1; /* DAT-Protection Bit */
122 unsigned long i : 1; /* Segment-Invalid Bit */
123 unsigned long cs : 1; /* Common-Segment Bit */
124 unsigned long tt : 2; /* Table-Type Bits */
128 struct segment_entry_fc1 {
129 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
131 unsigned long av : 1; /* ACCF-Validity Control */
132 unsigned long acc: 4; /* Access-Control Bits */
133 unsigned long f : 1; /* Fetch-Protection Bit */
134 unsigned long fc : 1; /* Format-Control */
135 unsigned long p : 1; /* DAT-Protection Bit */
136 unsigned long iep: 1; /* Instruction-Execution-Protection */
138 unsigned long i : 1; /* Segment-Invalid Bit */
139 unsigned long cs : 1; /* Common-Segment Bit */
140 unsigned long tt : 2; /* Table-Type Bits */
144 union segment_table_entry {
146 struct segment_entry_fc0 fc0;
147 struct segment_entry_fc1 fc1;
150 unsigned long fc : 1; /* Format-Control */
152 unsigned long i : 1; /* Segment-Invalid Bit */
153 unsigned long cs : 1; /* Common-Segment Bit */
154 unsigned long tt : 2; /* Table-Type Bits */
160 TABLE_TYPE_SEGMENT = 0,
161 TABLE_TYPE_REGION3 = 1,
162 TABLE_TYPE_REGION2 = 2,
163 TABLE_TYPE_REGION1 = 3
166 union page_table_entry {
169 unsigned long pfra : 52; /* Page-Frame Real Address */
170 unsigned long z : 1; /* Zero Bit */
171 unsigned long i : 1; /* Page-Invalid Bit */
172 unsigned long p : 1; /* DAT-Protection Bit */
173 unsigned long iep: 1; /* Instruction-Execution-Protection */
179 * vaddress union in order to easily decode a virtual address into its
180 * region first index, region second index etc. parts.
185 unsigned long rfx : 11;
186 unsigned long rsx : 11;
187 unsigned long rtx : 11;
188 unsigned long sx : 11;
189 unsigned long px : 8;
190 unsigned long bx : 12;
193 unsigned long rfx01 : 2;
195 unsigned long rsx01 : 2;
197 unsigned long rtx01 : 2;
199 unsigned long sx01 : 2;
205 * raddress union which will contain the result (real or absolute address)
206 * after a page table walk. The rfaa, sfaa and pfra members are used to
207 * simply assign them the value of a region, segment or page table entry.
211 unsigned long rfaa : 33; /* Region-Frame Absolute Address */
212 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
213 unsigned long pfra : 52; /* Page-Frame Real Address */
236 unsigned long i : 1; /* ALEN-Invalid Bit */
238 unsigned long fo : 1; /* Fetch-Only Bit */
239 unsigned long p : 1; /* Private Bit */
240 unsigned long alesn : 8; /* Access-List-Entry Sequence Number */
241 unsigned long aleax : 16; /* Access-List-Entry Authorization Index */
244 unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */
246 unsigned long astesn : 32; /* ASTE Sequence Number */
250 unsigned long i : 1; /* ASX-Invalid Bit */
251 unsigned long ato : 29; /* Authority-Table Origin */
253 unsigned long b : 1; /* Base-Space Bit */
254 unsigned long ax : 16; /* Authorization Index */
255 unsigned long atl : 12; /* Authority-Table Length */
257 unsigned long ca : 1; /* Controlled-ASN Bit */
258 unsigned long ra : 1; /* Reusable-ASN Bit */
259 unsigned long asce : 64; /* Address-Space-Control Element */
260 unsigned long ald : 32;
261 unsigned long astesn : 32;
262 /* .. more fields there */
265 int ipte_lock_held(struct kvm_vcpu *vcpu)
267 if (vcpu->arch.sie_block->eca & ECA_SII) {
270 read_lock(&vcpu->kvm->arch.sca_lock);
271 rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0;
272 read_unlock(&vcpu->kvm->arch.sca_lock);
275 return vcpu->kvm->arch.ipte_lock_count != 0;
278 static void ipte_lock_simple(struct kvm_vcpu *vcpu)
280 union ipte_control old, new, *ic;
282 mutex_lock(&vcpu->kvm->arch.ipte_mutex);
283 vcpu->kvm->arch.ipte_lock_count++;
284 if (vcpu->kvm->arch.ipte_lock_count > 1)
287 read_lock(&vcpu->kvm->arch.sca_lock);
288 ic = kvm_s390_get_ipte_control(vcpu->kvm);
290 old = READ_ONCE(*ic);
292 read_unlock(&vcpu->kvm->arch.sca_lock);
298 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
299 read_unlock(&vcpu->kvm->arch.sca_lock);
301 mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
304 static void ipte_unlock_simple(struct kvm_vcpu *vcpu)
306 union ipte_control old, new, *ic;
308 mutex_lock(&vcpu->kvm->arch.ipte_mutex);
309 vcpu->kvm->arch.ipte_lock_count--;
310 if (vcpu->kvm->arch.ipte_lock_count)
312 read_lock(&vcpu->kvm->arch.sca_lock);
313 ic = kvm_s390_get_ipte_control(vcpu->kvm);
315 old = READ_ONCE(*ic);
318 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
319 read_unlock(&vcpu->kvm->arch.sca_lock);
320 wake_up(&vcpu->kvm->arch.ipte_wq);
322 mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
325 static void ipte_lock_siif(struct kvm_vcpu *vcpu)
327 union ipte_control old, new, *ic;
330 read_lock(&vcpu->kvm->arch.sca_lock);
331 ic = kvm_s390_get_ipte_control(vcpu->kvm);
333 old = READ_ONCE(*ic);
335 read_unlock(&vcpu->kvm->arch.sca_lock);
342 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
343 read_unlock(&vcpu->kvm->arch.sca_lock);
346 static void ipte_unlock_siif(struct kvm_vcpu *vcpu)
348 union ipte_control old, new, *ic;
350 read_lock(&vcpu->kvm->arch.sca_lock);
351 ic = kvm_s390_get_ipte_control(vcpu->kvm);
353 old = READ_ONCE(*ic);
358 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
359 read_unlock(&vcpu->kvm->arch.sca_lock);
361 wake_up(&vcpu->kvm->arch.ipte_wq);
364 void ipte_lock(struct kvm_vcpu *vcpu)
366 if (vcpu->arch.sie_block->eca & ECA_SII)
367 ipte_lock_siif(vcpu);
369 ipte_lock_simple(vcpu);
372 void ipte_unlock(struct kvm_vcpu *vcpu)
374 if (vcpu->arch.sie_block->eca & ECA_SII)
375 ipte_unlock_siif(vcpu);
377 ipte_unlock_simple(vcpu);
380 static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, u8 ar,
386 unsigned long ald_addr, authority_table_addr;
394 save_access_regs(vcpu->run->s.regs.acrs);
395 alet.val = vcpu->run->s.regs.acrs[ar];
397 if (ar == 0 || alet.val == 0) {
398 asce->val = vcpu->arch.sie_block->gcr[1];
400 } else if (alet.val == 1) {
401 asce->val = vcpu->arch.sie_block->gcr[7];
406 return PGM_ALET_SPECIFICATION;
409 ald_addr = vcpu->arch.sie_block->gcr[5];
411 ald_addr = vcpu->arch.sie_block->gcr[2];
412 ald_addr &= 0x7fffffc0;
414 rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald));
418 if (alet.alen / 8 > ald.all)
419 return PGM_ALEN_TRANSLATION;
421 if (0x7fffffff - ald.alo * 128 < alet.alen * 16)
422 return PGM_ADDRESSING;
424 rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale,
430 return PGM_ALEN_TRANSLATION;
431 if (ale.alesn != alet.alesn)
432 return PGM_ALE_SEQUENCE;
434 rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste));
439 return PGM_ASTE_VALIDITY;
440 if (aste.astesn != ale.astesn)
441 return PGM_ASTE_SEQUENCE;
444 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff;
445 if (ale.aleax != eax) {
446 if (eax / 16 > aste.atl)
447 return PGM_EXTENDED_AUTHORITY;
449 authority_table_addr = aste.ato * 4 + eax / 4;
451 rc = read_guest_real(vcpu, authority_table_addr,
457 if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0)
458 return PGM_EXTENDED_AUTHORITY;
462 if (ale.fo == 1 && mode == GACC_STORE)
463 return PGM_PROTECTION;
465 asce->val = aste.asce;
469 struct trans_exc_code_bits {
470 unsigned long addr : 52; /* Translation-exception Address */
471 unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */
473 unsigned long b56 : 1;
475 unsigned long b60 : 1;
476 unsigned long b61 : 1;
477 unsigned long as : 2; /* ASCE Identifier */
481 FSI_UNKNOWN = 0, /* Unknown wether fetch or store */
482 FSI_STORE = 1, /* Exception was due to store operation */
483 FSI_FETCH = 2 /* Exception was due to fetch operation */
494 static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva,
495 u8 ar, enum gacc_mode mode, enum prot_type prot)
497 struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
498 struct trans_exc_code_bits *tec;
500 memset(pgm, 0, sizeof(*pgm));
502 tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
525 case PGM_PAGE_TRANSLATION:
526 case PGM_REGION_FIRST_TRANS:
527 case PGM_REGION_SECOND_TRANS:
528 case PGM_REGION_THIRD_TRANS:
529 case PGM_SEGMENT_TRANSLATION:
531 * op_access_id only applies to MOVE_PAGE -> set bit 61
532 * exc_access_id has to be set to 0 for some instructions. Both
533 * cases have to be handled by the caller.
535 tec->addr = gva >> PAGE_SHIFT;
536 tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH;
537 tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as;
539 case PGM_ALEN_TRANSLATION:
540 case PGM_ALE_SEQUENCE:
541 case PGM_ASTE_VALIDITY:
542 case PGM_ASTE_SEQUENCE:
543 case PGM_EXTENDED_AUTHORITY:
545 * We can always store exc_access_id, as it is
546 * undefined for non-ar cases. It is undefined for
547 * most DAT protection exceptions.
549 pgm->exc_access_id = ar;
555 static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce,
556 unsigned long ga, u8 ar, enum gacc_mode mode)
559 struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw);
567 if ((mode == GACC_IFETCH) && (psw.as != PSW_BITS_AS_HOME))
568 psw.as = PSW_BITS_AS_PRIMARY;
571 case PSW_BITS_AS_PRIMARY:
572 asce->val = vcpu->arch.sie_block->gcr[1];
574 case PSW_BITS_AS_SECONDARY:
575 asce->val = vcpu->arch.sie_block->gcr[7];
577 case PSW_BITS_AS_HOME:
578 asce->val = vcpu->arch.sie_block->gcr[13];
580 case PSW_BITS_AS_ACCREG:
581 rc = ar_translation(vcpu, asce, ar, mode);
583 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC);
589 static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val)
591 return kvm_read_guest(kvm, gpa, val, sizeof(*val));
595 * guest_translate - translate a guest virtual into a guest absolute address
597 * @gva: guest virtual address
598 * @gpa: points to where guest physical (absolute) address should be stored
599 * @asce: effective asce
600 * @mode: indicates the access mode to be used
601 * @prot: returns the type for protection exceptions
603 * Translate a guest virtual address into a guest absolute address by means
604 * of dynamic address translation as specified by the architecture.
605 * If the resulting absolute address is not available in the configuration
606 * an addressing exception is indicated and @gpa will not be changed.
608 * Returns: - zero on success; @gpa contains the resulting absolute address
609 * - a negative value if guest access failed due to e.g. broken
611 * - a positve value if an access exception happened. In this case
612 * the returned value is the program interruption code as defined
613 * by the architecture
615 static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
616 unsigned long *gpa, const union asce asce,
617 enum gacc_mode mode, enum prot_type *prot)
619 union vaddress vaddr = {.addr = gva};
620 union raddress raddr = {.addr = gva};
621 union page_table_entry pte;
622 int dat_protection = 0;
623 int iep_protection = 0;
624 union ctlreg0 ctlreg0;
626 int edat1, edat2, iep;
628 ctlreg0.val = vcpu->arch.sie_block->gcr[0];
629 edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
630 edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78);
631 iep = ctlreg0.iep && test_kvm_facility(vcpu->kvm, 130);
634 ptr = asce.origin * PAGE_SIZE;
636 case ASCE_TYPE_REGION1:
637 if (vaddr.rfx01 > asce.tl)
638 return PGM_REGION_FIRST_TRANS;
639 ptr += vaddr.rfx * 8;
641 case ASCE_TYPE_REGION2:
643 return PGM_ASCE_TYPE;
644 if (vaddr.rsx01 > asce.tl)
645 return PGM_REGION_SECOND_TRANS;
646 ptr += vaddr.rsx * 8;
648 case ASCE_TYPE_REGION3:
649 if (vaddr.rfx || vaddr.rsx)
650 return PGM_ASCE_TYPE;
651 if (vaddr.rtx01 > asce.tl)
652 return PGM_REGION_THIRD_TRANS;
653 ptr += vaddr.rtx * 8;
655 case ASCE_TYPE_SEGMENT:
656 if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
657 return PGM_ASCE_TYPE;
658 if (vaddr.sx01 > asce.tl)
659 return PGM_SEGMENT_TRANSLATION;
664 case ASCE_TYPE_REGION1: {
665 union region1_table_entry rfte;
667 if (kvm_is_error_gpa(vcpu->kvm, ptr))
668 return PGM_ADDRESSING;
669 if (deref_table(vcpu->kvm, ptr, &rfte.val))
672 return PGM_REGION_FIRST_TRANS;
673 if (rfte.tt != TABLE_TYPE_REGION1)
674 return PGM_TRANSLATION_SPEC;
675 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
676 return PGM_REGION_SECOND_TRANS;
678 dat_protection |= rfte.p;
679 ptr = rfte.rto * PAGE_SIZE + vaddr.rsx * 8;
682 case ASCE_TYPE_REGION2: {
683 union region2_table_entry rste;
685 if (kvm_is_error_gpa(vcpu->kvm, ptr))
686 return PGM_ADDRESSING;
687 if (deref_table(vcpu->kvm, ptr, &rste.val))
690 return PGM_REGION_SECOND_TRANS;
691 if (rste.tt != TABLE_TYPE_REGION2)
692 return PGM_TRANSLATION_SPEC;
693 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
694 return PGM_REGION_THIRD_TRANS;
696 dat_protection |= rste.p;
697 ptr = rste.rto * PAGE_SIZE + vaddr.rtx * 8;
700 case ASCE_TYPE_REGION3: {
701 union region3_table_entry rtte;
703 if (kvm_is_error_gpa(vcpu->kvm, ptr))
704 return PGM_ADDRESSING;
705 if (deref_table(vcpu->kvm, ptr, &rtte.val))
708 return PGM_REGION_THIRD_TRANS;
709 if (rtte.tt != TABLE_TYPE_REGION3)
710 return PGM_TRANSLATION_SPEC;
711 if (rtte.cr && asce.p && edat2)
712 return PGM_TRANSLATION_SPEC;
713 if (rtte.fc && edat2) {
714 dat_protection |= rtte.fc1.p;
715 iep_protection = rtte.fc1.iep;
716 raddr.rfaa = rtte.fc1.rfaa;
717 goto absolute_address;
719 if (vaddr.sx01 < rtte.fc0.tf)
720 return PGM_SEGMENT_TRANSLATION;
721 if (vaddr.sx01 > rtte.fc0.tl)
722 return PGM_SEGMENT_TRANSLATION;
724 dat_protection |= rtte.fc0.p;
725 ptr = rtte.fc0.sto * PAGE_SIZE + vaddr.sx * 8;
728 case ASCE_TYPE_SEGMENT: {
729 union segment_table_entry ste;
731 if (kvm_is_error_gpa(vcpu->kvm, ptr))
732 return PGM_ADDRESSING;
733 if (deref_table(vcpu->kvm, ptr, &ste.val))
736 return PGM_SEGMENT_TRANSLATION;
737 if (ste.tt != TABLE_TYPE_SEGMENT)
738 return PGM_TRANSLATION_SPEC;
739 if (ste.cs && asce.p)
740 return PGM_TRANSLATION_SPEC;
741 if (ste.fc && edat1) {
742 dat_protection |= ste.fc1.p;
743 iep_protection = ste.fc1.iep;
744 raddr.sfaa = ste.fc1.sfaa;
745 goto absolute_address;
747 dat_protection |= ste.fc0.p;
748 ptr = ste.fc0.pto * (PAGE_SIZE / 2) + vaddr.px * 8;
751 if (kvm_is_error_gpa(vcpu->kvm, ptr))
752 return PGM_ADDRESSING;
753 if (deref_table(vcpu->kvm, ptr, &pte.val))
756 return PGM_PAGE_TRANSLATION;
758 return PGM_TRANSLATION_SPEC;
759 dat_protection |= pte.p;
760 iep_protection = pte.iep;
761 raddr.pfra = pte.pfra;
763 raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr);
765 if (mode == GACC_STORE && dat_protection) {
766 *prot = PROT_TYPE_DAT;
767 return PGM_PROTECTION;
769 if (mode == GACC_IFETCH && iep_protection && iep) {
770 *prot = PROT_TYPE_IEP;
771 return PGM_PROTECTION;
773 if (kvm_is_error_gpa(vcpu->kvm, raddr.addr))
774 return PGM_ADDRESSING;
779 static inline int is_low_address(unsigned long ga)
781 /* Check for address ranges 0..511 and 4096..4607 */
782 return (ga & ~0x11fful) == 0;
785 static int low_address_protection_enabled(struct kvm_vcpu *vcpu,
786 const union asce asce)
788 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
789 psw_t *psw = &vcpu->arch.sie_block->gpsw;
793 if (psw_bits(*psw).dat && asce.p)
798 static int vm_check_access_key(struct kvm *kvm, u8 access_key,
799 enum gacc_mode mode, gpa_t gpa)
801 u8 storage_key, access_control;
802 bool fetch_protected;
809 hva = gfn_to_hva(kvm, gpa_to_gfn(gpa));
810 if (kvm_is_error_hva(hva))
811 return PGM_ADDRESSING;
813 mmap_read_lock(current->mm);
814 r = get_guest_storage_key(current->mm, hva, &storage_key);
815 mmap_read_unlock(current->mm);
818 access_control = FIELD_GET(_PAGE_ACC_BITS, storage_key);
819 if (access_control == access_key)
821 fetch_protected = storage_key & _PAGE_FP_BIT;
822 if ((mode == GACC_FETCH || mode == GACC_IFETCH) && !fetch_protected)
824 return PGM_PROTECTION;
827 static bool fetch_prot_override_applicable(struct kvm_vcpu *vcpu, enum gacc_mode mode,
830 psw_t *psw = &vcpu->arch.sie_block->gpsw;
831 unsigned long override;
833 if (mode == GACC_FETCH || mode == GACC_IFETCH) {
834 /* check if fetch protection override enabled */
835 override = vcpu->arch.sie_block->gcr[0];
836 override &= CR0_FETCH_PROTECTION_OVERRIDE;
837 /* not applicable if subject to DAT && private space */
838 override = override && !(psw_bits(*psw).dat && asce.p);
844 static bool fetch_prot_override_applies(unsigned long ga, unsigned int len)
846 return ga < 2048 && ga + len <= 2048;
849 static bool storage_prot_override_applicable(struct kvm_vcpu *vcpu)
851 /* check if storage protection override enabled */
852 return vcpu->arch.sie_block->gcr[0] & CR0_STORAGE_PROTECTION_OVERRIDE;
855 static bool storage_prot_override_applies(u8 access_control)
857 /* matches special storage protection override key (9) -> allow */
858 return access_control == PAGE_SPO_ACC;
861 static int vcpu_check_access_key(struct kvm_vcpu *vcpu, u8 access_key,
862 enum gacc_mode mode, union asce asce, gpa_t gpa,
863 unsigned long ga, unsigned int len)
865 u8 storage_key, access_control;
869 /* access key 0 matches any storage key -> allow */
873 * caller needs to ensure that gfn is accessible, so we can
874 * assume that this cannot fail
876 hva = gfn_to_hva(vcpu->kvm, gpa_to_gfn(gpa));
877 mmap_read_lock(current->mm);
878 r = get_guest_storage_key(current->mm, hva, &storage_key);
879 mmap_read_unlock(current->mm);
882 access_control = FIELD_GET(_PAGE_ACC_BITS, storage_key);
883 /* access key matches storage key -> allow */
884 if (access_control == access_key)
886 if (mode == GACC_FETCH || mode == GACC_IFETCH) {
887 /* it is a fetch and fetch protection is off -> allow */
888 if (!(storage_key & _PAGE_FP_BIT))
890 if (fetch_prot_override_applicable(vcpu, mode, asce) &&
891 fetch_prot_override_applies(ga, len))
894 if (storage_prot_override_applicable(vcpu) &&
895 storage_prot_override_applies(access_control))
897 return PGM_PROTECTION;
901 * guest_range_to_gpas() - Calculate guest physical addresses of page fragments
902 * covering a logical range
904 * @ga: guest address, start of range
905 * @ar: access register
906 * @gpas: output argument, may be NULL
907 * @len: length of range in bytes
908 * @asce: address-space-control element to use for translation
910 * @access_key: access key to mach the range's storage keys against
912 * Translate a logical range to a series of guest absolute addresses,
913 * such that the concatenation of page fragments starting at each gpa make up
915 * The translation is performed as if done by the cpu for the given @asce, @ar,
916 * @mode and state of the @vcpu.
917 * If the translation causes an exception, its program interruption code is
918 * returned and the &struct kvm_s390_pgm_info pgm member of @vcpu is modified
919 * such that a subsequent call to kvm_s390_inject_prog_vcpu() will inject
920 * a correct exception into the guest.
921 * The resulting gpas are stored into @gpas, unless it is NULL.
923 * Note: All fragments except the first one start at the beginning of a page.
924 * When deriving the boundaries of a fragment from a gpa, all but the last
925 * fragment end at the end of the page.
929 * * <0 - translation could not be performed, for example if guest
930 * memory could not be accessed
931 * * >0 - an access exception occurred. In this case the returned value
932 * is the program interruption code and the contents of pgm may
933 * be used to inject an exception into the guest.
935 static int guest_range_to_gpas(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar,
936 unsigned long *gpas, unsigned long len,
937 const union asce asce, enum gacc_mode mode,
940 psw_t *psw = &vcpu->arch.sie_block->gpsw;
941 unsigned int offset = offset_in_page(ga);
942 unsigned int fragment_len;
943 int lap_enabled, rc = 0;
947 lap_enabled = low_address_protection_enabled(vcpu, asce);
948 while (min(PAGE_SIZE - offset, len) > 0) {
949 fragment_len = min(PAGE_SIZE - offset, len);
950 ga = kvm_s390_logical_to_effective(vcpu, ga);
951 if (mode == GACC_STORE && lap_enabled && is_low_address(ga))
952 return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode,
954 if (psw_bits(*psw).dat) {
955 rc = guest_translate(vcpu, ga, &gpa, asce, mode, &prot);
959 gpa = kvm_s390_real_to_abs(vcpu, ga);
960 if (kvm_is_error_gpa(vcpu->kvm, gpa))
964 return trans_exc(vcpu, rc, ga, ar, mode, prot);
965 rc = vcpu_check_access_key(vcpu, access_key, mode, asce, gpa, ga,
968 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_KEYC);
978 static int access_guest_page(struct kvm *kvm, enum gacc_mode mode, gpa_t gpa,
979 void *data, unsigned int len)
981 const unsigned int offset = offset_in_page(gpa);
982 const gfn_t gfn = gpa_to_gfn(gpa);
985 if (mode == GACC_STORE)
986 rc = kvm_write_guest_page(kvm, gfn, data, offset, len);
988 rc = kvm_read_guest_page(kvm, gfn, data, offset, len);
993 access_guest_page_with_key(struct kvm *kvm, enum gacc_mode mode, gpa_t gpa,
994 void *data, unsigned int len, u8 access_key)
996 struct kvm_memory_slot *slot;
1002 gfn = gpa >> PAGE_SHIFT;
1003 slot = gfn_to_memslot(kvm, gfn);
1004 hva = gfn_to_hva_memslot_prot(slot, gfn, &writable);
1006 if (kvm_is_error_hva(hva))
1007 return PGM_ADDRESSING;
1009 * Check if it's a ro memslot, even tho that can't occur (they're unsupported).
1010 * Don't try to actually handle that case.
1012 if (!writable && mode == GACC_STORE)
1014 hva += offset_in_page(gpa);
1015 if (mode == GACC_STORE)
1016 rc = copy_to_user_key((void __user *)hva, data, len, access_key);
1018 rc = copy_from_user_key(data, (void __user *)hva, len, access_key);
1020 return PGM_PROTECTION;
1021 if (mode == GACC_STORE)
1022 mark_page_dirty_in_slot(kvm, slot, gfn);
1026 int access_guest_abs_with_key(struct kvm *kvm, gpa_t gpa, void *data,
1027 unsigned long len, enum gacc_mode mode, u8 access_key)
1029 int offset = offset_in_page(gpa);
1033 while (min(PAGE_SIZE - offset, len) > 0) {
1034 fragment_len = min(PAGE_SIZE - offset, len);
1035 rc = access_guest_page_with_key(kvm, mode, gpa, data, fragment_len, access_key);
1039 len -= fragment_len;
1040 data += fragment_len;
1041 gpa += fragment_len;
1046 int access_guest_with_key(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar,
1047 void *data, unsigned long len, enum gacc_mode mode,
1050 psw_t *psw = &vcpu->arch.sie_block->gpsw;
1051 unsigned long nr_pages, idx;
1052 unsigned long gpa_array[2];
1053 unsigned int fragment_len;
1054 unsigned long *gpas;
1055 enum prot_type prot;
1058 bool try_storage_prot_override;
1059 bool try_fetch_prot_override;
1064 ga = kvm_s390_logical_to_effective(vcpu, ga);
1065 rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode);
1068 nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1;
1070 if (nr_pages > ARRAY_SIZE(gpa_array))
1071 gpas = vmalloc(array_size(nr_pages, sizeof(unsigned long)));
1074 try_fetch_prot_override = fetch_prot_override_applicable(vcpu, mode, asce);
1075 try_storage_prot_override = storage_prot_override_applicable(vcpu);
1076 need_ipte_lock = psw_bits(*psw).dat && !asce.r;
1080 * Since we do the access further down ultimately via a move instruction
1081 * that does key checking and returns an error in case of a protection
1082 * violation, we don't need to do the check during address translation.
1083 * Skip it by passing access key 0, which matches any storage key,
1084 * obviating the need for any further checks. As a result the check is
1085 * handled entirely in hardware on access, we only need to take care to
1086 * forego key protection checking if fetch protection override applies or
1087 * retry with the special key 9 in case of storage protection override.
1089 rc = guest_range_to_gpas(vcpu, ga, ar, gpas, len, asce, mode, 0);
1092 for (idx = 0; idx < nr_pages; idx++) {
1093 fragment_len = min(PAGE_SIZE - offset_in_page(gpas[idx]), len);
1094 if (try_fetch_prot_override && fetch_prot_override_applies(ga, fragment_len)) {
1095 rc = access_guest_page(vcpu->kvm, mode, gpas[idx],
1096 data, fragment_len);
1098 rc = access_guest_page_with_key(vcpu->kvm, mode, gpas[idx],
1099 data, fragment_len, access_key);
1101 if (rc == PGM_PROTECTION && try_storage_prot_override)
1102 rc = access_guest_page_with_key(vcpu->kvm, mode, gpas[idx],
1103 data, fragment_len, PAGE_SPO_ACC);
1104 if (rc == PGM_PROTECTION)
1105 prot = PROT_TYPE_KEYC;
1108 len -= fragment_len;
1109 data += fragment_len;
1110 ga = kvm_s390_logical_to_effective(vcpu, ga + fragment_len);
1113 rc = trans_exc(vcpu, rc, ga, ar, mode, prot);
1117 if (nr_pages > ARRAY_SIZE(gpa_array))
1122 int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra,
1123 void *data, unsigned long len, enum gacc_mode mode)
1125 unsigned int fragment_len;
1129 while (len && !rc) {
1130 gpa = kvm_s390_real_to_abs(vcpu, gra);
1131 fragment_len = min(PAGE_SIZE - offset_in_page(gpa), len);
1132 rc = access_guest_page(vcpu->kvm, mode, gpa, data, fragment_len);
1133 len -= fragment_len;
1134 gra += fragment_len;
1135 data += fragment_len;
1141 * guest_translate_address_with_key - translate guest logical into guest absolute address
1142 * @vcpu: virtual cpu
1143 * @gva: Guest virtual address
1144 * @ar: Access register
1145 * @gpa: Guest physical address
1146 * @mode: Translation access mode
1147 * @access_key: access key to mach the storage key with
1149 * Parameter semantics are the same as the ones from guest_translate.
1150 * The memory contents at the guest address are not changed.
1152 * Note: The IPTE lock is not taken during this function, so the caller
1153 * has to take care of this.
1155 int guest_translate_address_with_key(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar,
1156 unsigned long *gpa, enum gacc_mode mode,
1162 gva = kvm_s390_logical_to_effective(vcpu, gva);
1163 rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode);
1166 return guest_range_to_gpas(vcpu, gva, ar, gpa, 1, asce, mode,
1171 * check_gva_range - test a range of guest virtual addresses for accessibility
1172 * @vcpu: virtual cpu
1173 * @gva: Guest virtual address
1174 * @ar: Access register
1175 * @length: Length of test range
1176 * @mode: Translation access mode
1177 * @access_key: access key to mach the storage keys with
1179 int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar,
1180 unsigned long length, enum gacc_mode mode, u8 access_key)
1185 rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode);
1189 rc = guest_range_to_gpas(vcpu, gva, ar, NULL, length, asce, mode,
1197 * check_gpa_range - test a range of guest physical addresses for accessibility
1198 * @kvm: virtual machine instance
1199 * @gpa: guest physical address
1200 * @length: length of test range
1201 * @mode: access mode to test, relevant for storage keys
1202 * @access_key: access key to mach the storage keys with
1204 int check_gpa_range(struct kvm *kvm, unsigned long gpa, unsigned long length,
1205 enum gacc_mode mode, u8 access_key)
1207 unsigned int fragment_len;
1210 while (length && !rc) {
1211 fragment_len = min(PAGE_SIZE - offset_in_page(gpa), length);
1212 rc = vm_check_access_key(kvm, access_key, mode, gpa);
1213 length -= fragment_len;
1214 gpa += fragment_len;
1220 * kvm_s390_check_low_addr_prot_real - check for low-address protection
1221 * @vcpu: virtual cpu
1222 * @gra: Guest real address
1224 * Checks whether an address is subject to low-address protection and set
1225 * up vcpu->arch.pgm accordingly if necessary.
1227 * Return: 0 if no protection exception, or PGM_PROTECTION if protected.
1229 int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra)
1231 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
1233 if (!ctlreg0.lap || !is_low_address(gra))
1235 return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA);
1239 * kvm_s390_shadow_tables - walk the guest page table and create shadow tables
1240 * @sg: pointer to the shadow guest address space structure
1241 * @saddr: faulting address in the shadow gmap
1242 * @pgt: pointer to the beginning of the page table for the given address if
1243 * successful (return value 0), or to the first invalid DAT entry in
1244 * case of exceptions (return value > 0)
1245 * @dat_protection: referenced memory is write protected
1246 * @fake: pgt references contiguous guest memory block, not a pgtable
1248 static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr,
1249 unsigned long *pgt, int *dat_protection,
1252 struct gmap *parent;
1254 union vaddress vaddr;
1259 *dat_protection = 0;
1260 parent = sg->parent;
1262 asce.val = sg->orig_asce;
1263 ptr = asce.origin * PAGE_SIZE;
1267 asce.dt = ASCE_TYPE_REGION1;
1270 case ASCE_TYPE_REGION1:
1271 if (vaddr.rfx01 > asce.tl && !*fake)
1272 return PGM_REGION_FIRST_TRANS;
1274 case ASCE_TYPE_REGION2:
1276 return PGM_ASCE_TYPE;
1277 if (vaddr.rsx01 > asce.tl)
1278 return PGM_REGION_SECOND_TRANS;
1280 case ASCE_TYPE_REGION3:
1281 if (vaddr.rfx || vaddr.rsx)
1282 return PGM_ASCE_TYPE;
1283 if (vaddr.rtx01 > asce.tl)
1284 return PGM_REGION_THIRD_TRANS;
1286 case ASCE_TYPE_SEGMENT:
1287 if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
1288 return PGM_ASCE_TYPE;
1289 if (vaddr.sx01 > asce.tl)
1290 return PGM_SEGMENT_TRANSLATION;
1295 case ASCE_TYPE_REGION1: {
1296 union region1_table_entry rfte;
1299 ptr += vaddr.rfx * _REGION1_SIZE;
1303 *pgt = ptr + vaddr.rfx * 8;
1304 rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val);
1308 return PGM_REGION_FIRST_TRANS;
1309 if (rfte.tt != TABLE_TYPE_REGION1)
1310 return PGM_TRANSLATION_SPEC;
1311 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
1312 return PGM_REGION_SECOND_TRANS;
1313 if (sg->edat_level >= 1)
1314 *dat_protection |= rfte.p;
1315 ptr = rfte.rto * PAGE_SIZE;
1317 rc = gmap_shadow_r2t(sg, saddr, rfte.val, *fake);
1322 case ASCE_TYPE_REGION2: {
1323 union region2_table_entry rste;
1326 ptr += vaddr.rsx * _REGION2_SIZE;
1330 *pgt = ptr + vaddr.rsx * 8;
1331 rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val);
1335 return PGM_REGION_SECOND_TRANS;
1336 if (rste.tt != TABLE_TYPE_REGION2)
1337 return PGM_TRANSLATION_SPEC;
1338 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
1339 return PGM_REGION_THIRD_TRANS;
1340 if (sg->edat_level >= 1)
1341 *dat_protection |= rste.p;
1342 ptr = rste.rto * PAGE_SIZE;
1344 rste.p |= *dat_protection;
1345 rc = gmap_shadow_r3t(sg, saddr, rste.val, *fake);
1350 case ASCE_TYPE_REGION3: {
1351 union region3_table_entry rtte;
1354 ptr += vaddr.rtx * _REGION3_SIZE;
1358 *pgt = ptr + vaddr.rtx * 8;
1359 rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val);
1363 return PGM_REGION_THIRD_TRANS;
1364 if (rtte.tt != TABLE_TYPE_REGION3)
1365 return PGM_TRANSLATION_SPEC;
1366 if (rtte.cr && asce.p && sg->edat_level >= 2)
1367 return PGM_TRANSLATION_SPEC;
1368 if (rtte.fc && sg->edat_level >= 2) {
1369 *dat_protection |= rtte.fc0.p;
1371 ptr = rtte.fc1.rfaa * _REGION3_SIZE;
1375 if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl)
1376 return PGM_SEGMENT_TRANSLATION;
1377 if (sg->edat_level >= 1)
1378 *dat_protection |= rtte.fc0.p;
1379 ptr = rtte.fc0.sto * PAGE_SIZE;
1381 rtte.fc0.p |= *dat_protection;
1382 rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake);
1387 case ASCE_TYPE_SEGMENT: {
1388 union segment_table_entry ste;
1391 ptr += vaddr.sx * _SEGMENT_SIZE;
1395 *pgt = ptr + vaddr.sx * 8;
1396 rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val);
1400 return PGM_SEGMENT_TRANSLATION;
1401 if (ste.tt != TABLE_TYPE_SEGMENT)
1402 return PGM_TRANSLATION_SPEC;
1403 if (ste.cs && asce.p)
1404 return PGM_TRANSLATION_SPEC;
1405 *dat_protection |= ste.fc0.p;
1406 if (ste.fc && sg->edat_level >= 1) {
1408 ptr = ste.fc1.sfaa * _SEGMENT_SIZE;
1412 ptr = ste.fc0.pto * (PAGE_SIZE / 2);
1414 ste.fc0.p |= *dat_protection;
1415 rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake);
1420 /* Return the parent address of the page table */
1426 * kvm_s390_shadow_fault - handle fault on a shadow page table
1427 * @vcpu: virtual cpu
1428 * @sg: pointer to the shadow guest address space structure
1429 * @saddr: faulting address in the shadow gmap
1430 * @datptr: will contain the address of the faulting DAT table entry, or of
1431 * the valid leaf, plus some flags
1433 * Returns: - 0 if the shadow fault was successfully resolved
1434 * - > 0 (pgm exception code) on exceptions while faulting
1435 * - -EAGAIN if the caller can retry immediately
1436 * - -EFAULT when accessing invalid guest addresses
1437 * - -ENOMEM if out of memory
1439 int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg,
1440 unsigned long saddr, unsigned long *datptr)
1442 union vaddress vaddr;
1443 union page_table_entry pte;
1444 unsigned long pgt = 0;
1445 int dat_protection, fake;
1448 mmap_read_lock(sg->mm);
1450 * We don't want any guest-2 tables to change - so the parent
1451 * tables/pointers we read stay valid - unshadowing is however
1452 * always possible - only guest_table_lock protects us.
1456 rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake);
1458 rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection,
1463 pte.val = pgt + vaddr.px * PAGE_SIZE;
1468 case PGM_SEGMENT_TRANSLATION:
1469 case PGM_REGION_THIRD_TRANS:
1470 case PGM_REGION_SECOND_TRANS:
1471 case PGM_REGION_FIRST_TRANS:
1475 pgt += vaddr.px * 8;
1476 rc = gmap_read_table(sg->parent, pgt, &pte.val);
1479 *datptr = pgt | dat_protection * PEI_DAT_PROT;
1481 rc = PGM_PAGE_TRANSLATION;
1483 rc = PGM_TRANSLATION_SPEC;
1485 pte.p |= dat_protection;
1487 rc = gmap_shadow_page(sg, saddr, __pte(pte.val));
1489 mmap_read_unlock(sg->mm);