1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright IBM Corp. 1999, 2000
5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
8 #ifndef _UAPI_S390_PTRACE_H
9 #define _UAPI_S390_PTRACE_H
12 * Offsets in the user_regs_struct. They are used for the ptrace
13 * system call and in entry.S
17 #define PT_PSWMASK 0x00
18 #define PT_PSWADDR 0x04
51 #define PT_ORIGGPR2 0x88
54 * A nasty fact of life that the ptrace api
55 * only supports passing of longs.
57 #define PT_FPR0_HI 0x98
58 #define PT_FPR0_LO 0x9C
59 #define PT_FPR1_HI 0xA0
60 #define PT_FPR1_LO 0xA4
61 #define PT_FPR2_HI 0xA8
62 #define PT_FPR2_LO 0xAC
63 #define PT_FPR3_HI 0xB0
64 #define PT_FPR3_LO 0xB4
65 #define PT_FPR4_HI 0xB8
66 #define PT_FPR4_LO 0xBC
67 #define PT_FPR5_HI 0xC0
68 #define PT_FPR5_LO 0xC4
69 #define PT_FPR6_HI 0xC8
70 #define PT_FPR6_LO 0xCC
71 #define PT_FPR7_HI 0xD0
72 #define PT_FPR7_LO 0xD4
73 #define PT_FPR8_HI 0xD8
74 #define PT_FPR8_LO 0XDC
75 #define PT_FPR9_HI 0xE0
76 #define PT_FPR9_LO 0xE4
77 #define PT_FPR10_HI 0xE8
78 #define PT_FPR10_LO 0xEC
79 #define PT_FPR11_HI 0xF0
80 #define PT_FPR11_LO 0xF4
81 #define PT_FPR12_HI 0xF8
82 #define PT_FPR12_LO 0xFC
83 #define PT_FPR13_HI 0x100
84 #define PT_FPR13_LO 0x104
85 #define PT_FPR14_HI 0x108
86 #define PT_FPR14_LO 0x10C
87 #define PT_FPR15_HI 0x110
88 #define PT_FPR15_LO 0x114
90 #define PT_CR_10 0x11C
91 #define PT_CR_11 0x120
92 #define PT_IEEE_IP 0x13C
93 #define PT_LASTOFF PT_IEEE_IP
94 #define PT_ENDREGS 0x140-1
99 #define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */
101 #else /* __s390x__ */
103 #define PT_PSWMASK 0x00
104 #define PT_PSWADDR 0x08
115 #define PT_GPR10 0x60
116 #define PT_GPR11 0x68
117 #define PT_GPR12 0x70
118 #define PT_GPR13 0x78
119 #define PT_GPR14 0x80
120 #define PT_GPR15 0x88
131 #define PT_ACR10 0xB8
132 #define PT_ACR11 0xBC
133 #define PT_ACR12 0xC0
134 #define PT_ACR13 0xC4
135 #define PT_ACR14 0xC8
136 #define PT_ACR15 0xCC
137 #define PT_ORIGGPR2 0xD0
143 #define PT_FPR4 0x100
144 #define PT_FPR5 0x108
145 #define PT_FPR6 0x110
146 #define PT_FPR7 0x118
147 #define PT_FPR8 0x120
148 #define PT_FPR9 0x128
149 #define PT_FPR10 0x130
150 #define PT_FPR11 0x138
151 #define PT_FPR12 0x140
152 #define PT_FPR13 0x148
153 #define PT_FPR14 0x150
154 #define PT_FPR15 0x158
155 #define PT_CR_9 0x160
156 #define PT_CR_10 0x168
157 #define PT_CR_11 0x170
158 #define PT_IEEE_IP 0x1A8
159 #define PT_LASTOFF PT_IEEE_IP
160 #define PT_ENDREGS 0x1B0-1
165 #define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */
167 #endif /* __s390x__ */
171 #define PSW_MASK_PER _AC(0x40000000, UL)
172 #define PSW_MASK_DAT _AC(0x04000000, UL)
173 #define PSW_MASK_IO _AC(0x02000000, UL)
174 #define PSW_MASK_EXT _AC(0x01000000, UL)
175 #define PSW_MASK_KEY _AC(0x00F00000, UL)
176 #define PSW_MASK_BASE _AC(0x00080000, UL) /* always one */
177 #define PSW_MASK_MCHECK _AC(0x00040000, UL)
178 #define PSW_MASK_WAIT _AC(0x00020000, UL)
179 #define PSW_MASK_PSTATE _AC(0x00010000, UL)
180 #define PSW_MASK_ASC _AC(0x0000C000, UL)
181 #define PSW_MASK_CC _AC(0x00003000, UL)
182 #define PSW_MASK_PM _AC(0x00000F00, UL)
183 #define PSW_MASK_RI _AC(0x00000000, UL)
184 #define PSW_MASK_EA _AC(0x00000000, UL)
185 #define PSW_MASK_BA _AC(0x00000000, UL)
187 #define PSW_MASK_USER _AC(0x0000FF00, UL)
189 #define PSW_ADDR_AMODE _AC(0x80000000, UL)
190 #define PSW_ADDR_INSN _AC(0x7FFFFFFF, UL)
192 #define PSW_ASC_PRIMARY _AC(0x00000000, UL)
193 #define PSW_ASC_ACCREG _AC(0x00004000, UL)
194 #define PSW_ASC_SECONDARY _AC(0x00008000, UL)
195 #define PSW_ASC_HOME _AC(0x0000C000, UL)
197 #else /* __s390x__ */
199 #define PSW_MASK_PER _AC(0x4000000000000000, UL)
200 #define PSW_MASK_DAT _AC(0x0400000000000000, UL)
201 #define PSW_MASK_IO _AC(0x0200000000000000, UL)
202 #define PSW_MASK_EXT _AC(0x0100000000000000, UL)
203 #define PSW_MASK_BASE _AC(0x0000000000000000, UL)
204 #define PSW_MASK_KEY _AC(0x00F0000000000000, UL)
205 #define PSW_MASK_MCHECK _AC(0x0004000000000000, UL)
206 #define PSW_MASK_WAIT _AC(0x0002000000000000, UL)
207 #define PSW_MASK_PSTATE _AC(0x0001000000000000, UL)
208 #define PSW_MASK_ASC _AC(0x0000C00000000000, UL)
209 #define PSW_MASK_CC _AC(0x0000300000000000, UL)
210 #define PSW_MASK_PM _AC(0x00000F0000000000, UL)
211 #define PSW_MASK_RI _AC(0x0000008000000000, UL)
212 #define PSW_MASK_EA _AC(0x0000000100000000, UL)
213 #define PSW_MASK_BA _AC(0x0000000080000000, UL)
215 #define PSW_MASK_USER _AC(0x0000FF0180000000, UL)
217 #define PSW_ADDR_AMODE _AC(0x0000000000000000, UL)
218 #define PSW_ADDR_INSN _AC(0xFFFFFFFFFFFFFFFF, UL)
220 #define PSW_ASC_PRIMARY _AC(0x0000000000000000, UL)
221 #define PSW_ASC_ACCREG _AC(0x0000400000000000, UL)
222 #define PSW_ASC_SECONDARY _AC(0x0000800000000000, UL)
223 #define PSW_ASC_HOME _AC(0x0000C00000000000, UL)
225 #endif /* __s390x__ */
232 #define NUM_CR_WORDS 3
236 #define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */
240 #define PTRACE_OLDSETOPTIONS 21
241 #define PTRACE_SYSEMU 31
242 #define PTRACE_SYSEMU_SINGLESTEP 32
244 #include <linux/stddef.h>
245 #include <linux/types.h>
261 freg_t fprs[NUM_FPRS];
264 #define FPC_EXCEPTION_MASK 0xF8000000
265 #define FPC_FLAGS_MASK 0x00F80000
266 #define FPC_DXC_MASK 0x0000FF00
267 #define FPC_RM_MASK 0x00000003
269 /* this typedef defines how a Program Status Word looks like */
273 } __attribute__ ((aligned(8))) psw_t;
276 * The s390_regs structure is used to define the elf_gregset_t.
280 unsigned long gprs[NUM_GPRS];
281 unsigned int acrs[NUM_ACRS];
282 unsigned long orig_gpr2;
286 * The user_pt_regs structure exports the beginning of
287 * the in-kernel pt_regs structure to user space.
290 unsigned long args[1];
292 unsigned long gprs[NUM_GPRS];
296 * Now for the user space program event recording (trace) definitions.
297 * The following structures are used only for the ptrace interface, don't
298 * touch or even look at it if you don't want to modify the user-space
299 * ptrace interface. In particular stay away from it for in-kernel PER.
302 unsigned long cr[NUM_CR_WORDS];
305 #define PER_EM_MASK 0xE8000000UL
310 #endif /* __s390x__ */
311 unsigned em_branching : 1;
312 unsigned em_instruction_fetch : 1;
314 * Switching on storage alteration automatically fixes
315 * the storage alteration event bit in the users std.
317 unsigned em_storage_alteration : 1;
318 unsigned em_gpr_alt_unused : 1;
319 unsigned em_store_real_address : 1;
321 unsigned branch_addr_ctl : 1;
323 unsigned storage_alt_space_ctl : 1;
325 unsigned long starting_addr;
326 unsigned long ending_addr;
330 unsigned short perc_atmid;
331 unsigned long address;
332 unsigned char access_id;
336 unsigned perc_branching : 1;
337 unsigned perc_instruction_fetch : 1;
338 unsigned perc_storage_alteration : 1;
339 unsigned perc_gpr_alt_unused : 1;
340 unsigned perc_store_real_address : 1;
342 unsigned atmid_psw_bit_31 : 1;
343 unsigned atmid_validity_bit : 1;
344 unsigned atmid_psw_bit_32 : 1;
345 unsigned atmid_psw_bit_5 : 1;
346 unsigned atmid_psw_bit_16 : 1;
347 unsigned atmid_psw_bit_17 : 1;
349 unsigned long address;
351 unsigned access_id : 4;
360 * The single_step and instruction_fetch bits are obsolete,
361 * the kernel always sets them to zero. To enable single
362 * stepping use ptrace(PTRACE_SINGLESTEP) instead.
364 unsigned single_step : 1;
365 unsigned instruction_fetch : 1;
368 * These addresses are copied into cr10 & cr11 if single
369 * stepping is switched off
371 unsigned long starting_addr;
372 unsigned long ending_addr;
374 per_lowcore_words words;
375 per_lowcore_bits bits;
381 unsigned long kernel_addr;
382 unsigned long process_addr;
386 * S/390 specific non posix ptrace requests. I chose unusual values so
387 * they are unlikely to clash with future ptrace definitions.
389 #define PTRACE_PEEKUSR_AREA 0x5000
390 #define PTRACE_POKEUSR_AREA 0x5001
391 #define PTRACE_PEEKTEXT_AREA 0x5002
392 #define PTRACE_PEEKDATA_AREA 0x5003
393 #define PTRACE_POKETEXT_AREA 0x5004
394 #define PTRACE_POKEDATA_AREA 0x5005
395 #define PTRACE_GET_LAST_BREAK 0x5006
396 #define PTRACE_PEEK_SYSTEM_CALL 0x5007
397 #define PTRACE_POKE_SYSTEM_CALL 0x5008
398 #define PTRACE_ENABLE_TE 0x5009
399 #define PTRACE_DISABLE_TE 0x5010
400 #define PTRACE_TE_ABORT_RAND 0x5011
403 * The numbers chosen here are somewhat arbitrary but absolutely MUST
404 * not overlap with any of the number assigned in <linux/ptrace.h>.
406 #define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
409 * PT_PROT definition is loosely based on hppa bsd definition in
412 #define PTRACE_PROT 21
415 ptprot_set_access_watchpoint,
416 ptprot_set_write_watchpoint,
417 ptprot_disable_watchpoint
421 unsigned long lowaddr;
422 unsigned long hiaddr;
426 /* Sequence of bytes for breakpoint illegal instruction. */
427 #define S390_BREAKPOINT {0x0,0x1}
428 #define S390_BREAKPOINT_U16 ((__u16)0x0001)
429 #define S390_SYSCALL_OPCODE ((__u16)0x0a00)
430 #define S390_SYSCALL_SIZE 2
433 * The user_regs_struct defines the way the user registers are
434 * store on the stack for signal handling.
436 struct user_regs_struct {
438 unsigned long gprs[NUM_GPRS];
439 unsigned int acrs[NUM_ACRS];
440 unsigned long orig_gpr2;
441 s390_fp_regs fp_regs;
443 * These per registers are in here so that gdb can modify them
444 * itself as there is no "official" ptrace interface for hardware
445 * watchpoints. This is the way intel does it.
448 unsigned long ieee_instruction_pointer; /* obsolete, always 0 */
451 #endif /* __ASSEMBLY__ */
453 #endif /* _UAPI_S390_PTRACE_H */