1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V specific functions to support DMA for non-coherent devices
5 * Copyright (c) 2021 Western Digital Corporation or its affiliates.
8 #include <linux/dma-direct.h>
9 #include <linux/dma-map-ops.h>
11 #include <asm/cacheflush.h>
13 static bool noncoherent_supported __ro_after_init;
15 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
16 enum dma_data_direction dir)
18 void *vaddr = phys_to_virt(paddr);
22 ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
25 ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
27 case DMA_BIDIRECTIONAL:
28 ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
35 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
36 enum dma_data_direction dir)
38 void *vaddr = phys_to_virt(paddr);
44 case DMA_BIDIRECTIONAL:
45 ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size);
52 void arch_dma_prep_coherent(struct page *page, size_t size)
54 void *flush_addr = page_address(page);
56 ALT_CMO_OP(flush, flush_addr, size, riscv_cbom_block_size);
59 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
60 const struct iommu_ops *iommu, bool coherent)
62 WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN,
63 TAINT_CPU_OUT_OF_SPEC,
64 "%s %s: ARCH_DMA_MINALIGN smaller than riscv,cbom-block-size (%d < %d)",
65 dev_driver_string(dev), dev_name(dev),
66 ARCH_DMA_MINALIGN, riscv_cbom_block_size);
68 WARN_TAINT(!coherent && !noncoherent_supported, TAINT_CPU_OUT_OF_SPEC,
69 "%s %s: device non-coherent but no non-coherent operations supported",
70 dev_driver_string(dev), dev_name(dev));
72 dev->dma_coherent = coherent;
75 void riscv_noncoherent_supported(void)
77 WARN(!riscv_cbom_block_size,
78 "Non-coherent DMA support enabled without a block size\n");
79 noncoherent_supported = true;