arch/riscv/kernel/smpboot.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * SMP initialisation and IPI support
   4  * Based on arch/arm64/kernel/smp.c
   5  *
   6  * Copyright (C) 2012 ARM Ltd.
   7  * Copyright (C) 2015 Regents of the University of California
   8  * Copyright (C) 2017 SiFive
   9  */
  10
  11 #include <linux/arch_topology.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/mm.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel_stat.h>
  18 #include <linux/notifier.h>
  19 #include <linux/cpu.h>
  20 #include <linux/percpu.h>
  21 #include <linux/delay.h>
  22 #include <linux/err.h>
  23 #include <linux/irq.h>
  24 #include <linux/of.h>
  25 #include <linux/sched/task_stack.h>
  26 #include <linux/sched/mm.h>
  27 #include <asm/cpu_ops.h>
  28 #include <asm/irq.h>
  29 #include <asm/mmu_context.h>
  30 #include <asm/numa.h>
  31 #include <asm/tlbflush.h>
  32 #include <asm/sections.h>
  33 #include <asm/sbi.h>
  34 #include <asm/smp.h>
  35
  36 #include "head.h"
  37
  38 static DECLARE_COMPLETION(cpu_running);
  39
  40 void __init smp_prepare_boot_cpu(void)
  41 {
  42         init_cpu_topology();
  43 }
  44
  45 void __init smp_prepare_cpus(unsigned int max_cpus)
  46 {
  47         int cpuid;
  48         int ret;
  49         unsigned int curr_cpuid;
  50
  51         curr_cpuid = smp_processor_id();
  52         store_cpu_topology(curr_cpuid);
  53         numa_store_cpu_info(curr_cpuid);
  54         numa_add_cpu(curr_cpuid);
  55
  56         /* This covers non-smp usecase mandated by "nosmp" option */
  57         if (max_cpus == 0)
  58                 return;
  59
  60         for_each_possible_cpu(cpuid) {
  61                 if (cpuid == curr_cpuid)
  62                         continue;
  63                 if (cpu_ops[cpuid]->cpu_prepare) {
  64                         ret = cpu_ops[cpuid]->cpu_prepare(cpuid);
  65                         if (ret)
  66                                 continue;
  67                 }
  68                 set_cpu_present(cpuid, true);
  69                 numa_store_cpu_info(cpuid);
  70         }
  71 }
  72
  73 void __init setup_smp(void)
  74 {
  75         struct device_node *dn;
  76         unsigned long hart;
  77         bool found_boot_cpu = false;
  78         int cpuid = 1;
  79         int rc;
  80
  81         cpu_set_ops(0);
  82
  83         for_each_of_cpu_node(dn) {
  84                 rc = riscv_of_processor_hartid(dn, &hart);
  85                 if (rc < 0)
  86                         continue;
  87
  88                 if (hart == cpuid_to_hartid_map(0)) {
  89                         BUG_ON(found_boot_cpu);
  90                         found_boot_cpu = 1;
  91                         early_map_cpu_to_node(0, of_node_to_nid(dn));
  92                         continue;
  93                 }
  94                 if (cpuid >= NR_CPUS) {
  95                         pr_warn("Invalid cpuid [%d] for hartid [%lu]\n",
  96                                 cpuid, hart);
  97                         continue;
  98                 }
  99
 100                 cpuid_to_hartid_map(cpuid) = hart;
 101                 early_map_cpu_to_node(cpuid, of_node_to_nid(dn));
 102                 cpuid++;
 103         }
 104
 105         BUG_ON(!found_boot_cpu);
 106
 107         if (cpuid > nr_cpu_ids)
 108                 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n",
 109                         cpuid, nr_cpu_ids);
 110
 111         for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) {
 112                 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) {
 113                         cpu_set_ops(cpuid);
 114                         set_cpu_possible(cpuid, true);
 115                 }
 116         }
 117 }
 118
 119 static int start_secondary_cpu(int cpu, struct task_struct *tidle)
 120 {
 121         if (cpu_ops[cpu]->cpu_start)
 122                 return cpu_ops[cpu]->cpu_start(cpu, tidle);
 123
 124         return -EOPNOTSUPP;
 125 }
 126
 127 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 128 {
 129         int ret = 0;
 130         tidle->thread_info.cpu = cpu;
 131
 132         ret = start_secondary_cpu(cpu, tidle);
 133         if (!ret) {
 134                 wait_for_completion_timeout(&cpu_running,
 135                                             msecs_to_jiffies(1000));
 136
 137                 if (!cpu_online(cpu)) {
 138                         pr_crit("CPU%u: failed to come online\n", cpu);
 139                         ret = -EIO;
 140                 }
 141         } else {
 142                 pr_crit("CPU%u: failed to start\n", cpu);
 143         }
 144
 145         return ret;
 146 }
 147
 148 void __init smp_cpus_done(unsigned int max_cpus)
 149 {
 150 }
 151
 152 /*
 153  * C entry point for a secondary processor.
 154  */
 155 asmlinkage __visible void smp_callin(void)
 156 {
 157         struct mm_struct *mm = &init_mm;
 158         unsigned int curr_cpuid = smp_processor_id();
 159
 160         riscv_clear_ipi();
 161
 162         /* All kernel threads share the same mm context.  */
 163         mmgrab(mm);
 164         current->active_mm = mm;
 165
 166         store_cpu_topology(curr_cpuid);
 167         notify_cpu_starting(curr_cpuid);
 168         numa_add_cpu(curr_cpuid);
 169         set_cpu_online(curr_cpuid, 1);
 170
 171         /*
 172          * Remote TLB flushes are ignored while the CPU is offline, so emit
 173          * a local TLB flush right now just in case.
 174          */
 175         local_flush_tlb_all();
 176         complete(&cpu_running);
 177         /*
 178          * Disable preemption before enabling interrupts, so we don't try to
 179          * schedule a CPU that hasn't actually started yet.
 180          */
 181         local_irq_enable();
 182         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 183 }