arch/riscv/include/asm/vector.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright (C) 2020 SiFive
   4  */
   5
   6 #ifndef __ASM_RISCV_VECTOR_H
   7 #define __ASM_RISCV_VECTOR_H
   8
   9 #include <linux/types.h>
  10
  11 #ifdef CONFIG_RISCV_ISA_V
  12
  13 #include <asm/hwcap.h>
  14
  15 static __always_inline bool has_vector(void)
  16 {
  17         return riscv_has_extension_unlikely(RISCV_ISA_EXT_v);
  18 }
  19
  20 #else /* ! CONFIG_RISCV_ISA_V  */
  21
  22 static __always_inline bool has_vector(void) { return false; }
  23
  24 #endif /* CONFIG_RISCV_ISA_V */
  25
  26 #endif /* ! __ASM_RISCV_VECTOR_H */