1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
6 #ifndef _ASM_RISCV_PGTABLE_H
7 #define _ASM_RISCV_PGTABLE_H
9 #include <linux/mmzone.h>
10 #include <linux/sizes.h>
12 #include <asm/pgtable-bits.h>
15 #define KERNEL_LINK_ADDR PAGE_OFFSET
16 #define KERN_VIRT_SIZE (UL(-1))
19 #define ADDRESS_SPACE_END (UL(-1))
22 /* Leave 2GB for kernel and BPF at the end of the address space */
23 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1)
25 #define KERNEL_LINK_ADDR PAGE_OFFSET
28 /* Number of entries in the page global directory */
29 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
30 /* Number of entries in the page table */
31 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
34 * Half of the kernel address space (1/4 of the entries of the page global
35 * directory) is for the direct mapping.
37 #define KERN_VIRT_SIZE ((PTRS_PER_PGD / 2 * PGDIR_SIZE) / 2)
39 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
40 #define VMALLOC_END PAGE_OFFSET
41 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
43 #define BPF_JIT_REGION_SIZE (SZ_128M)
45 #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE)
46 #define BPF_JIT_REGION_END (MODULES_END)
48 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
49 #define BPF_JIT_REGION_END (VMALLOC_END)
52 /* Modules always live before the kernel */
54 /* This is used to define the end of the KASAN shadow region */
55 #define MODULES_LOWEST_VADDR (KERNEL_LINK_ADDR - SZ_2G)
56 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
57 #define MODULES_END (PFN_ALIGN((unsigned long)&_start))
61 * Roughly size the vmemmap space to be large enough to fit enough
62 * struct pages to map half the virtual address space. Then
63 * position vmemmap directly below the VMALLOC region.
66 #define VA_BITS (pgtable_l5_enabled ? \
67 57 : (pgtable_l4_enabled ? 48 : 39))
72 #define VMEMMAP_SHIFT \
73 (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
74 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
75 #define VMEMMAP_END VMALLOC_START
76 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
79 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel
80 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled.
82 #define vmemmap ((struct page *)VMEMMAP_START)
84 #define PCI_IO_SIZE SZ_16M
85 #define PCI_IO_END VMEMMAP_START
86 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
88 #define FIXADDR_TOP PCI_IO_START
90 #define FIXADDR_SIZE PMD_SIZE
92 #define FIXADDR_SIZE PGDIR_SIZE
94 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
98 #ifdef CONFIG_XIP_KERNEL
99 #define XIP_OFFSET SZ_32M
100 #define XIP_OFFSET_MASK (SZ_32M - 1)
107 #include <asm/page.h>
108 #include <asm/tlbflush.h>
109 #include <linux/mm_types.h>
111 #define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT)
114 #include <asm/pgtable-64.h>
116 #include <asm/pgtable-32.h>
117 #endif /* CONFIG_64BIT */
119 #include <linux/page_table_check.h>
121 #ifdef CONFIG_XIP_KERNEL
122 #define XIP_FIXUP(addr) ({ \
123 uintptr_t __a = (uintptr_t)(addr); \
124 (__a >= CONFIG_XIP_PHYS_ADDR && \
125 __a < CONFIG_XIP_PHYS_ADDR + XIP_OFFSET * 2) ? \
126 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\
130 #define XIP_FIXUP(addr) (addr)
131 #endif /* CONFIG_XIP_KERNEL */
133 struct pt_alloc_ops {
134 pte_t *(*get_pte_virt)(phys_addr_t pa);
135 phys_addr_t (*alloc_pte)(uintptr_t va);
136 #ifndef __PAGETABLE_PMD_FOLDED
137 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
138 phys_addr_t (*alloc_pmd)(uintptr_t va);
139 pud_t *(*get_pud_virt)(phys_addr_t pa);
140 phys_addr_t (*alloc_pud)(uintptr_t va);
141 p4d_t *(*get_p4d_virt)(phys_addr_t pa);
142 phys_addr_t (*alloc_p4d)(uintptr_t va);
146 extern struct pt_alloc_ops pt_ops __initdata;
149 /* Number of PGD entries that a user-mode program can use */
150 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
152 /* Page protection bits */
153 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER)
155 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE | _PAGE_READ)
156 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ)
157 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE)
158 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC)
159 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
160 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \
161 _PAGE_EXEC | _PAGE_WRITE)
163 #define PAGE_COPY PAGE_READ
164 #define PAGE_COPY_EXEC PAGE_EXEC
165 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC
166 #define PAGE_SHARED PAGE_WRITE
167 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC
169 #define _PAGE_KERNEL (_PAGE_READ \
176 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
177 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
178 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC)
179 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \
182 #define PAGE_TABLE __pgprot(_PAGE_TABLE)
184 #define _PAGE_IOREMAP ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
185 #define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP)
187 extern pgd_t swapper_pg_dir[];
189 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
190 static inline int pmd_present(pmd_t pmd)
193 * Checking for _PAGE_LEAF is needed too because:
194 * When splitting a THP, split_huge_page() will temporarily clear
195 * the present bit, in this situation, pmd_present() and
196 * pmd_trans_huge() still needs to return true.
198 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF));
201 static inline int pmd_present(pmd_t pmd)
203 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
207 static inline int pmd_none(pmd_t pmd)
209 return (pmd_val(pmd) == 0);
212 static inline int pmd_bad(pmd_t pmd)
214 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF);
217 #define pmd_leaf pmd_leaf
218 static inline int pmd_leaf(pmd_t pmd)
220 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF);
223 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
228 static inline void pmd_clear(pmd_t *pmdp)
230 set_pmd(pmdp, __pmd(0));
233 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
235 unsigned long prot_val = pgprot_val(prot);
237 ALT_THEAD_PMA(prot_val);
239 return __pgd((pfn << _PAGE_PFN_SHIFT) | prot_val);
242 static inline unsigned long _pgd_pfn(pgd_t pgd)
244 return __page_val_to_pfn(pgd_val(pgd));
247 static inline struct page *pmd_page(pmd_t pmd)
249 return pfn_to_page(__page_val_to_pfn(pmd_val(pmd)));
252 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
254 return (unsigned long)pfn_to_virt(__page_val_to_pfn(pmd_val(pmd)));
257 static inline pte_t pmd_pte(pmd_t pmd)
259 return __pte(pmd_val(pmd));
262 static inline pte_t pud_pte(pud_t pud)
264 return __pte(pud_val(pud));
267 #ifdef CONFIG_RISCV_ISA_SVNAPOT
269 static __always_inline bool has_svnapot(void)
271 return riscv_has_extension_likely(RISCV_ISA_EXT_SVNAPOT);
274 static inline unsigned long pte_napot(pte_t pte)
276 return pte_val(pte) & _PAGE_NAPOT;
279 static inline pte_t pte_mknapot(pte_t pte, unsigned int order)
281 int pos = order - 1 + _PAGE_PFN_SHIFT;
282 unsigned long napot_bit = BIT(pos);
283 unsigned long napot_mask = ~GENMASK(pos, _PAGE_PFN_SHIFT);
285 return __pte((pte_val(pte) & napot_mask) | napot_bit | _PAGE_NAPOT);
290 static __always_inline bool has_svnapot(void) { return false; }
292 static inline unsigned long pte_napot(pte_t pte)
297 #endif /* CONFIG_RISCV_ISA_SVNAPOT */
299 /* Yields the page frame number (PFN) of a page table entry */
300 static inline unsigned long pte_pfn(pte_t pte)
302 unsigned long res = __page_val_to_pfn(pte_val(pte));
304 if (has_svnapot() && pte_napot(pte))
305 res = res & (res - 1UL);
310 #define pte_page(x) pfn_to_page(pte_pfn(x))
312 /* Constructs a page table entry */
313 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
315 unsigned long prot_val = pgprot_val(prot);
317 ALT_THEAD_PMA(prot_val);
319 return __pte((pfn << _PAGE_PFN_SHIFT) | prot_val);
322 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
324 static inline int pte_present(pte_t pte)
326 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
329 static inline int pte_none(pte_t pte)
331 return (pte_val(pte) == 0);
334 static inline int pte_write(pte_t pte)
336 return pte_val(pte) & _PAGE_WRITE;
339 static inline int pte_exec(pte_t pte)
341 return pte_val(pte) & _PAGE_EXEC;
344 static inline int pte_user(pte_t pte)
346 return pte_val(pte) & _PAGE_USER;
349 static inline int pte_huge(pte_t pte)
351 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF);
354 static inline int pte_dirty(pte_t pte)
356 return pte_val(pte) & _PAGE_DIRTY;
359 static inline int pte_young(pte_t pte)
361 return pte_val(pte) & _PAGE_ACCESSED;
364 static inline int pte_special(pte_t pte)
366 return pte_val(pte) & _PAGE_SPECIAL;
369 /* static inline pte_t pte_rdprotect(pte_t pte) */
371 static inline pte_t pte_wrprotect(pte_t pte)
373 return __pte(pte_val(pte) & ~(_PAGE_WRITE));
376 /* static inline pte_t pte_mkread(pte_t pte) */
378 static inline pte_t pte_mkwrite(pte_t pte)
380 return __pte(pte_val(pte) | _PAGE_WRITE);
383 /* static inline pte_t pte_mkexec(pte_t pte) */
385 static inline pte_t pte_mkdirty(pte_t pte)
387 return __pte(pte_val(pte) | _PAGE_DIRTY);
390 static inline pte_t pte_mkclean(pte_t pte)
392 return __pte(pte_val(pte) & ~(_PAGE_DIRTY));
395 static inline pte_t pte_mkyoung(pte_t pte)
397 return __pte(pte_val(pte) | _PAGE_ACCESSED);
400 static inline pte_t pte_mkold(pte_t pte)
402 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED));
405 static inline pte_t pte_mkspecial(pte_t pte)
407 return __pte(pte_val(pte) | _PAGE_SPECIAL);
410 static inline pte_t pte_mkhuge(pte_t pte)
415 #ifdef CONFIG_NUMA_BALANCING
417 * See the comment in include/asm-generic/pgtable.h
419 static inline int pte_protnone(pte_t pte)
421 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
424 static inline int pmd_protnone(pmd_t pmd)
426 return pte_protnone(pmd_pte(pmd));
430 /* Modify page protection bits */
431 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
433 unsigned long newprot_val = pgprot_val(newprot);
435 ALT_THEAD_PMA(newprot_val);
437 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | newprot_val);
440 #define pgd_ERROR(e) \
441 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
444 /* Commit new configuration to MMU hardware */
445 static inline void update_mmu_cache(struct vm_area_struct *vma,
446 unsigned long address, pte_t *ptep)
449 * The kernel assumes that TLBs don't cache invalid entries, but
450 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
451 * cache flush; it is necessary even after writing invalid entries.
452 * Relying on flush_tlb_fix_spurious_fault would suffice, but
453 * the extra traps reduce performance. So, eagerly SFENCE.VMA.
455 local_flush_tlb_page(address);
458 #define __HAVE_ARCH_UPDATE_MMU_TLB
459 #define update_mmu_tlb update_mmu_cache
461 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
462 unsigned long address, pmd_t *pmdp)
464 pte_t *ptep = (pte_t *)pmdp;
466 update_mmu_cache(vma, address, ptep);
469 #define __HAVE_ARCH_PTE_SAME
470 static inline int pte_same(pte_t pte_a, pte_t pte_b)
472 return pte_val(pte_a) == pte_val(pte_b);
476 * Certain architectures need to do special things when PTEs within
477 * a page table are directly modified. Thus, the following hook is
480 static inline void set_pte(pte_t *ptep, pte_t pteval)
485 void flush_icache_pte(pte_t pte);
487 static inline void __set_pte_at(struct mm_struct *mm,
488 unsigned long addr, pte_t *ptep, pte_t pteval)
490 if (pte_present(pteval) && pte_exec(pteval))
491 flush_icache_pte(pteval);
493 set_pte(ptep, pteval);
496 static inline void set_pte_at(struct mm_struct *mm,
497 unsigned long addr, pte_t *ptep, pte_t pteval)
499 page_table_check_pte_set(mm, addr, ptep, pteval);
500 __set_pte_at(mm, addr, ptep, pteval);
503 static inline void pte_clear(struct mm_struct *mm,
504 unsigned long addr, pte_t *ptep)
506 __set_pte_at(mm, addr, ptep, __pte(0));
509 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
510 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
511 unsigned long address, pte_t *ptep,
512 pte_t entry, int dirty)
514 if (!pte_same(*ptep, entry))
515 set_pte_at(vma->vm_mm, address, ptep, entry);
517 * update_mmu_cache will unconditionally execute, handling both
518 * the case that the PTE changed and the spurious fault case.
523 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
524 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
525 unsigned long address, pte_t *ptep)
527 pte_t pte = __pte(atomic_long_xchg((atomic_long_t *)ptep, 0));
529 page_table_check_pte_clear(mm, address, pte);
534 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
535 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
536 unsigned long address,
539 if (!pte_young(*ptep))
541 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));
544 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
545 static inline void ptep_set_wrprotect(struct mm_struct *mm,
546 unsigned long address, pte_t *ptep)
548 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep);
551 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
552 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
553 unsigned long address, pte_t *ptep)
556 * This comment is borrowed from x86, but applies equally to RISC-V:
558 * Clearing the accessed bit without a TLB flush
559 * doesn't cause data corruption. [ It could cause incorrect
560 * page aging and the (mistaken) reclaim of hot pages, but the
561 * chance of that should be relatively low. ]
563 * So as a performance optimization don't flush the TLB when
564 * clearing the accessed bit, it will eventually be flushed by
565 * a context switch or a VM operation anyway. [ In the rare
566 * event of it not getting flushed for a long time the delay
567 * shouldn't really matter because there's no real memory
568 * pressure for swapout to react to. ]
570 return ptep_test_and_clear_young(vma, address, ptep);
573 #define pgprot_noncached pgprot_noncached
574 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
576 unsigned long prot = pgprot_val(_prot);
578 prot &= ~_PAGE_MTMASK;
581 return __pgprot(prot);
584 #define pgprot_writecombine pgprot_writecombine
585 static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
587 unsigned long prot = pgprot_val(_prot);
589 prot &= ~_PAGE_MTMASK;
590 prot |= _PAGE_NOCACHE;
592 return __pgprot(prot);
598 static inline pmd_t pte_pmd(pte_t pte)
600 return __pmd(pte_val(pte));
603 static inline pmd_t pmd_mkhuge(pmd_t pmd)
608 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
610 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE));
613 #define __pmd_to_phys(pmd) (__page_val_to_pfn(pmd_val(pmd)) << PAGE_SHIFT)
615 static inline unsigned long pmd_pfn(pmd_t pmd)
617 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT);
620 #define __pud_to_phys(pud) (__page_val_to_pfn(pud_val(pud)) << PAGE_SHIFT)
622 static inline unsigned long pud_pfn(pud_t pud)
624 return ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT);
627 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
629 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
632 #define pmd_write pmd_write
633 static inline int pmd_write(pmd_t pmd)
635 return pte_write(pmd_pte(pmd));
638 static inline int pmd_dirty(pmd_t pmd)
640 return pte_dirty(pmd_pte(pmd));
643 #define pmd_young pmd_young
644 static inline int pmd_young(pmd_t pmd)
646 return pte_young(pmd_pte(pmd));
649 static inline int pmd_user(pmd_t pmd)
651 return pte_user(pmd_pte(pmd));
654 static inline pmd_t pmd_mkold(pmd_t pmd)
656 return pte_pmd(pte_mkold(pmd_pte(pmd)));
659 static inline pmd_t pmd_mkyoung(pmd_t pmd)
661 return pte_pmd(pte_mkyoung(pmd_pte(pmd)));
664 static inline pmd_t pmd_mkwrite(pmd_t pmd)
666 return pte_pmd(pte_mkwrite(pmd_pte(pmd)));
669 static inline pmd_t pmd_wrprotect(pmd_t pmd)
671 return pte_pmd(pte_wrprotect(pmd_pte(pmd)));
674 static inline pmd_t pmd_mkclean(pmd_t pmd)
676 return pte_pmd(pte_mkclean(pmd_pte(pmd)));
679 static inline pmd_t pmd_mkdirty(pmd_t pmd)
681 return pte_pmd(pte_mkdirty(pmd_pte(pmd)));
684 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
685 pmd_t *pmdp, pmd_t pmd)
687 page_table_check_pmd_set(mm, addr, pmdp, pmd);
688 return __set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd));
691 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
692 pud_t *pudp, pud_t pud)
694 page_table_check_pud_set(mm, addr, pudp, pud);
695 return __set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud));
698 #ifdef CONFIG_PAGE_TABLE_CHECK
699 static inline bool pte_user_accessible_page(pte_t pte)
701 return pte_present(pte) && pte_user(pte);
704 static inline bool pmd_user_accessible_page(pmd_t pmd)
706 return pmd_leaf(pmd) && pmd_user(pmd);
709 static inline bool pud_user_accessible_page(pud_t pud)
711 return pud_leaf(pud) && pud_user(pud);
715 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
716 static inline int pmd_trans_huge(pmd_t pmd)
718 return pmd_leaf(pmd);
721 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
722 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
723 unsigned long address, pmd_t *pmdp,
724 pmd_t entry, int dirty)
726 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
729 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
730 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
731 unsigned long address, pmd_t *pmdp)
733 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
736 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
737 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
738 unsigned long address, pmd_t *pmdp)
740 pmd_t pmd = __pmd(atomic_long_xchg((atomic_long_t *)pmdp, 0));
742 page_table_check_pmd_clear(mm, address, pmd);
747 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
748 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
749 unsigned long address, pmd_t *pmdp)
751 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
754 #define pmdp_establish pmdp_establish
755 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
756 unsigned long address, pmd_t *pmdp, pmd_t pmd)
758 page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);
759 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd)));
762 #define pmdp_collapse_flush pmdp_collapse_flush
763 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
764 unsigned long address, pmd_t *pmdp);
765 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
768 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
769 * are !pte_none() && !pte_present().
771 * Format of swap PTE:
772 * bit 0: _PAGE_PRESENT (zero)
773 * bit 1 to 3: _PAGE_LEAF (zero)
774 * bit 5: _PAGE_PROT_NONE (zero)
775 * bit 6: exclusive marker
776 * bits 7 to 11: swap type
777 * bits 11 to XLEN-1: swap offset
779 #define __SWP_TYPE_SHIFT 7
780 #define __SWP_TYPE_BITS 5
781 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1)
782 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
784 #define MAX_SWAPFILES_CHECK() \
785 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
787 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
788 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
789 #define __swp_entry(type, offset) ((swp_entry_t) \
790 { (((type) & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT) | \
791 ((offset) << __SWP_OFFSET_SHIFT) })
793 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
794 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
796 static inline int pte_swp_exclusive(pte_t pte)
798 return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
801 static inline pte_t pte_swp_mkexclusive(pte_t pte)
803 return __pte(pte_val(pte) | _PAGE_SWP_EXCLUSIVE);
806 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
808 return __pte(pte_val(pte) & ~_PAGE_SWP_EXCLUSIVE);
811 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
812 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val(pmd) })
813 #define __swp_entry_to_pmd(swp) __pmd((swp).val)
814 #endif /* CONFIG_ARCH_ENABLE_THP_MIGRATION */
817 * In the RV64 Linux scheme, we give the user half of the virtual-address space
818 * and give the kernel the other (upper) half.
821 #define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE)
823 #define KERN_VIRT_START FIXADDR_START
827 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
828 * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
830 * - 0x9fc00000 (~2.5GB) for RV32.
831 * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu
832 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
834 * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V
835 * Instruction Set Manual Volume II: Privileged Architecture" states that
836 * "load and store effective addresses, which are 64bits, must have bits
837 * 63–48 all equal to bit 47, or else a page-fault exception will occur."
840 #define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2)
841 #define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
844 #define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE)
845 #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
846 TASK_SIZE_32 : TASK_SIZE_64)
848 #define TASK_SIZE TASK_SIZE_64
852 #define TASK_SIZE FIXADDR_START
853 #define TASK_SIZE_MIN TASK_SIZE
856 #else /* CONFIG_MMU */
858 #define PAGE_SHARED __pgprot(0)
859 #define PAGE_KERNEL __pgprot(0)
860 #define swapper_pg_dir NULL
861 #define TASK_SIZE 0xffffffffUL
862 #define VMALLOC_START 0
863 #define VMALLOC_END TASK_SIZE
865 #endif /* !CONFIG_MMU */
867 extern char _start[];
868 extern void *_dtb_early_va;
869 extern uintptr_t _dtb_early_pa;
870 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU)
871 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va))
872 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa))
874 #define dtb_early_va _dtb_early_va
875 #define dtb_early_pa _dtb_early_pa
876 #endif /* CONFIG_XIP_KERNEL */
877 extern u64 satp_mode;
878 extern bool pgtable_l4_enabled;
880 void paging_init(void);
881 void misc_mem_init(void);
884 * ZERO_PAGE is a global shared page that is always zero,
885 * used for zero-mapped memory areas, etc.
887 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
888 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
890 #endif /* !__ASSEMBLY__ */
892 #endif /* _ASM_RISCV_PGTABLE_H */