1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
6 #ifndef _ASM_RISCV_PGTABLE_H
7 #define _ASM_RISCV_PGTABLE_H
9 #include <linux/mmzone.h>
10 #include <linux/sizes.h>
12 #include <asm/pgtable-bits.h>
15 #define KERNEL_LINK_ADDR PAGE_OFFSET
18 #define ADDRESS_SPACE_END (UL(-1))
21 /* Leave 2GB for kernel and BPF at the end of the address space */
22 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1)
24 #define KERNEL_LINK_ADDR PAGE_OFFSET
27 /* Number of entries in the page global directory */
28 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
29 /* Number of entries in the page table */
30 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
33 * Half of the kernel address space (half of the entries of the page global
34 * directory) is for the direct mapping.
36 #define KERN_VIRT_SIZE ((PTRS_PER_PGD / 2 * PGDIR_SIZE) / 2)
38 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
39 #define VMALLOC_END (PAGE_OFFSET - 1)
40 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
42 #define BPF_JIT_REGION_SIZE (SZ_128M)
44 #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE)
45 #define BPF_JIT_REGION_END (MODULES_END)
47 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
48 #define BPF_JIT_REGION_END (VMALLOC_END)
51 /* Modules always live before the kernel */
53 /* This is used to define the end of the KASAN shadow region */
54 #define MODULES_LOWEST_VADDR (KERNEL_LINK_ADDR - SZ_2G)
55 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
56 #define MODULES_END (PFN_ALIGN((unsigned long)&_start))
60 * Roughly size the vmemmap space to be large enough to fit enough
61 * struct pages to map half the virtual address space. Then
62 * position vmemmap directly below the VMALLOC region.
70 #define VMEMMAP_SHIFT \
71 (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
72 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
73 #define VMEMMAP_END (VMALLOC_START - 1)
74 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
77 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel
78 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled.
80 #define vmemmap ((struct page *)VMEMMAP_START)
82 #define PCI_IO_SIZE SZ_16M
83 #define PCI_IO_END VMEMMAP_START
84 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
86 #define FIXADDR_TOP PCI_IO_START
88 #define FIXADDR_SIZE PMD_SIZE
90 #define FIXADDR_SIZE PGDIR_SIZE
92 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
96 #ifdef CONFIG_XIP_KERNEL
97 #define XIP_OFFSET SZ_32M
98 #define XIP_OFFSET_MASK (SZ_32M - 1)
105 /* Page Upper Directory not used in RISC-V */
106 #include <asm-generic/pgtable-nopud.h>
107 #include <asm/page.h>
108 #include <asm/tlbflush.h>
109 #include <linux/mm_types.h>
112 #include <asm/pgtable-64.h>
114 #include <asm/pgtable-32.h>
115 #endif /* CONFIG_64BIT */
117 #ifdef CONFIG_XIP_KERNEL
118 #define XIP_FIXUP(addr) ({ \
119 uintptr_t __a = (uintptr_t)(addr); \
120 (__a >= CONFIG_XIP_PHYS_ADDR && \
121 __a < CONFIG_XIP_PHYS_ADDR + XIP_OFFSET * 2) ? \
122 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\
126 #define XIP_FIXUP(addr) (addr)
127 #endif /* CONFIG_XIP_KERNEL */
130 /* Number of PGD entries that a user-mode program can use */
131 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
133 /* Page protection bits */
134 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER)
136 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE)
137 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ)
138 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE)
139 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC)
140 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
141 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \
142 _PAGE_EXEC | _PAGE_WRITE)
144 #define PAGE_COPY PAGE_READ
145 #define PAGE_COPY_EXEC PAGE_EXEC
146 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC
147 #define PAGE_SHARED PAGE_WRITE
148 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC
150 #define _PAGE_KERNEL (_PAGE_READ \
157 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
158 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
159 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC)
160 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \
163 #define PAGE_TABLE __pgprot(_PAGE_TABLE)
166 * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
167 * change the properties of memory regions.
169 #define _PAGE_IOREMAP _PAGE_KERNEL
171 extern pgd_t swapper_pg_dir[];
173 /* MAP_PRIVATE permissions: xwr (copy-on-write) */
174 #define __P000 PAGE_NONE
175 #define __P001 PAGE_READ
176 #define __P010 PAGE_COPY
177 #define __P011 PAGE_COPY
178 #define __P100 PAGE_EXEC
179 #define __P101 PAGE_READ_EXEC
180 #define __P110 PAGE_COPY_EXEC
181 #define __P111 PAGE_COPY_READ_EXEC
183 /* MAP_SHARED permissions: xwr */
184 #define __S000 PAGE_NONE
185 #define __S001 PAGE_READ
186 #define __S010 PAGE_SHARED
187 #define __S011 PAGE_SHARED
188 #define __S100 PAGE_EXEC
189 #define __S101 PAGE_READ_EXEC
190 #define __S110 PAGE_SHARED_EXEC
191 #define __S111 PAGE_SHARED_EXEC
193 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
194 static inline int pmd_present(pmd_t pmd)
197 * Checking for _PAGE_LEAF is needed too because:
198 * When splitting a THP, split_huge_page() will temporarily clear
199 * the present bit, in this situation, pmd_present() and
200 * pmd_trans_huge() still needs to return true.
202 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF));
205 static inline int pmd_present(pmd_t pmd)
207 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
211 static inline int pmd_none(pmd_t pmd)
213 return (pmd_val(pmd) == 0);
216 static inline int pmd_bad(pmd_t pmd)
218 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF);
221 #define pmd_leaf pmd_leaf
222 static inline int pmd_leaf(pmd_t pmd)
224 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF);
227 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
232 static inline void pmd_clear(pmd_t *pmdp)
234 set_pmd(pmdp, __pmd(0));
237 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
239 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
242 static inline unsigned long _pgd_pfn(pgd_t pgd)
244 return pgd_val(pgd) >> _PAGE_PFN_SHIFT;
247 static inline struct page *pmd_page(pmd_t pmd)
249 return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
252 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
254 return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
257 static inline pte_t pmd_pte(pmd_t pmd)
259 return __pte(pmd_val(pmd));
262 static inline pte_t pud_pte(pud_t pud)
264 return __pte(pud_val(pud));
267 /* Yields the page frame number (PFN) of a page table entry */
268 static inline unsigned long pte_pfn(pte_t pte)
270 return (pte_val(pte) >> _PAGE_PFN_SHIFT);
273 #define pte_page(x) pfn_to_page(pte_pfn(x))
275 /* Constructs a page table entry */
276 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
278 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
281 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
283 static inline int pte_present(pte_t pte)
285 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
288 static inline int pte_none(pte_t pte)
290 return (pte_val(pte) == 0);
293 static inline int pte_write(pte_t pte)
295 return pte_val(pte) & _PAGE_WRITE;
298 static inline int pte_exec(pte_t pte)
300 return pte_val(pte) & _PAGE_EXEC;
303 static inline int pte_huge(pte_t pte)
305 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF);
308 static inline int pte_dirty(pte_t pte)
310 return pte_val(pte) & _PAGE_DIRTY;
313 static inline int pte_young(pte_t pte)
315 return pte_val(pte) & _PAGE_ACCESSED;
318 static inline int pte_special(pte_t pte)
320 return pte_val(pte) & _PAGE_SPECIAL;
323 /* static inline pte_t pte_rdprotect(pte_t pte) */
325 static inline pte_t pte_wrprotect(pte_t pte)
327 return __pte(pte_val(pte) & ~(_PAGE_WRITE));
330 /* static inline pte_t pte_mkread(pte_t pte) */
332 static inline pte_t pte_mkwrite(pte_t pte)
334 return __pte(pte_val(pte) | _PAGE_WRITE);
337 /* static inline pte_t pte_mkexec(pte_t pte) */
339 static inline pte_t pte_mkdirty(pte_t pte)
341 return __pte(pte_val(pte) | _PAGE_DIRTY);
344 static inline pte_t pte_mkclean(pte_t pte)
346 return __pte(pte_val(pte) & ~(_PAGE_DIRTY));
349 static inline pte_t pte_mkyoung(pte_t pte)
351 return __pte(pte_val(pte) | _PAGE_ACCESSED);
354 static inline pte_t pte_mkold(pte_t pte)
356 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED));
359 static inline pte_t pte_mkspecial(pte_t pte)
361 return __pte(pte_val(pte) | _PAGE_SPECIAL);
364 static inline pte_t pte_mkhuge(pte_t pte)
369 #ifdef CONFIG_NUMA_BALANCING
371 * See the comment in include/asm-generic/pgtable.h
373 static inline int pte_protnone(pte_t pte)
375 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
378 static inline int pmd_protnone(pmd_t pmd)
380 return pte_protnone(pmd_pte(pmd));
384 /* Modify page protection bits */
385 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
387 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
390 #define pgd_ERROR(e) \
391 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
394 /* Commit new configuration to MMU hardware */
395 static inline void update_mmu_cache(struct vm_area_struct *vma,
396 unsigned long address, pte_t *ptep)
399 * The kernel assumes that TLBs don't cache invalid entries, but
400 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
401 * cache flush; it is necessary even after writing invalid entries.
402 * Relying on flush_tlb_fix_spurious_fault would suffice, but
403 * the extra traps reduce performance. So, eagerly SFENCE.VMA.
405 local_flush_tlb_page(address);
408 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
409 unsigned long address, pmd_t *pmdp)
411 pte_t *ptep = (pte_t *)pmdp;
413 update_mmu_cache(vma, address, ptep);
416 #define __HAVE_ARCH_PTE_SAME
417 static inline int pte_same(pte_t pte_a, pte_t pte_b)
419 return pte_val(pte_a) == pte_val(pte_b);
423 * Certain architectures need to do special things when PTEs within
424 * a page table are directly modified. Thus, the following hook is
427 static inline void set_pte(pte_t *ptep, pte_t pteval)
432 void flush_icache_pte(pte_t pte);
434 static inline void set_pte_at(struct mm_struct *mm,
435 unsigned long addr, pte_t *ptep, pte_t pteval)
437 if (pte_present(pteval) && pte_exec(pteval))
438 flush_icache_pte(pteval);
440 set_pte(ptep, pteval);
443 static inline void pte_clear(struct mm_struct *mm,
444 unsigned long addr, pte_t *ptep)
446 set_pte_at(mm, addr, ptep, __pte(0));
449 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
450 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
451 unsigned long address, pte_t *ptep,
452 pte_t entry, int dirty)
454 if (!pte_same(*ptep, entry))
455 set_pte_at(vma->vm_mm, address, ptep, entry);
457 * update_mmu_cache will unconditionally execute, handling both
458 * the case that the PTE changed and the spurious fault case.
463 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
464 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
465 unsigned long address, pte_t *ptep)
467 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0));
470 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
471 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
472 unsigned long address,
475 if (!pte_young(*ptep))
477 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));
480 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
481 static inline void ptep_set_wrprotect(struct mm_struct *mm,
482 unsigned long address, pte_t *ptep)
484 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep);
487 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
488 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
489 unsigned long address, pte_t *ptep)
492 * This comment is borrowed from x86, but applies equally to RISC-V:
494 * Clearing the accessed bit without a TLB flush
495 * doesn't cause data corruption. [ It could cause incorrect
496 * page aging and the (mistaken) reclaim of hot pages, but the
497 * chance of that should be relatively low. ]
499 * So as a performance optimization don't flush the TLB when
500 * clearing the accessed bit, it will eventually be flushed by
501 * a context switch or a VM operation anyway. [ In the rare
502 * event of it not getting flushed for a long time the delay
503 * shouldn't really matter because there's no real memory
504 * pressure for swapout to react to. ]
506 return ptep_test_and_clear_young(vma, address, ptep);
512 static inline pmd_t pte_pmd(pte_t pte)
514 return __pmd(pte_val(pte));
517 static inline pmd_t pmd_mkhuge(pmd_t pmd)
522 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
524 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE));
527 #define __pmd_to_phys(pmd) (pmd_val(pmd) >> _PAGE_PFN_SHIFT << PAGE_SHIFT)
529 static inline unsigned long pmd_pfn(pmd_t pmd)
531 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT);
534 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
536 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
539 #define pmd_write pmd_write
540 static inline int pmd_write(pmd_t pmd)
542 return pte_write(pmd_pte(pmd));
545 static inline int pmd_dirty(pmd_t pmd)
547 return pte_dirty(pmd_pte(pmd));
550 static inline int pmd_young(pmd_t pmd)
552 return pte_young(pmd_pte(pmd));
555 static inline pmd_t pmd_mkold(pmd_t pmd)
557 return pte_pmd(pte_mkold(pmd_pte(pmd)));
560 static inline pmd_t pmd_mkyoung(pmd_t pmd)
562 return pte_pmd(pte_mkyoung(pmd_pte(pmd)));
565 static inline pmd_t pmd_mkwrite(pmd_t pmd)
567 return pte_pmd(pte_mkwrite(pmd_pte(pmd)));
570 static inline pmd_t pmd_wrprotect(pmd_t pmd)
572 return pte_pmd(pte_wrprotect(pmd_pte(pmd)));
575 static inline pmd_t pmd_mkclean(pmd_t pmd)
577 return pte_pmd(pte_mkclean(pmd_pte(pmd)));
580 static inline pmd_t pmd_mkdirty(pmd_t pmd)
582 return pte_pmd(pte_mkdirty(pmd_pte(pmd)));
585 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
586 pmd_t *pmdp, pmd_t pmd)
588 return set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd));
591 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
592 pud_t *pudp, pud_t pud)
594 return set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud));
597 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
598 static inline int pmd_trans_huge(pmd_t pmd)
600 return pmd_leaf(pmd);
603 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
604 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
605 unsigned long address, pmd_t *pmdp,
606 pmd_t entry, int dirty)
608 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
611 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
612 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
613 unsigned long address, pmd_t *pmdp)
615 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
618 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
619 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
620 unsigned long address, pmd_t *pmdp)
622 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
625 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
626 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
627 unsigned long address, pmd_t *pmdp)
629 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
632 #define pmdp_establish pmdp_establish
633 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
634 unsigned long address, pmd_t *pmdp, pmd_t pmd)
636 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd)));
638 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
641 * Encode and decode a swap entry
643 * Format of swap PTE:
644 * bit 0: _PAGE_PRESENT (zero)
645 * bit 1: _PAGE_PROT_NONE (zero)
646 * bits 2 to 6: swap type
647 * bits 7 to XLEN-1: swap offset
649 #define __SWP_TYPE_SHIFT 2
650 #define __SWP_TYPE_BITS 5
651 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1)
652 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
654 #define MAX_SWAPFILES_CHECK() \
655 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
657 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
658 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
659 #define __swp_entry(type, offset) ((swp_entry_t) \
660 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
662 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
663 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
666 * In the RV64 Linux scheme, we give the user half of the virtual-address space
667 * and give the kernel the other (upper) half.
670 #define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE)
672 #define KERN_VIRT_START FIXADDR_START
676 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
677 * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
680 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2)
682 #define TASK_SIZE FIXADDR_START
685 #else /* CONFIG_MMU */
687 #define PAGE_SHARED __pgprot(0)
688 #define PAGE_KERNEL __pgprot(0)
689 #define swapper_pg_dir NULL
690 #define TASK_SIZE 0xffffffffUL
691 #define VMALLOC_START 0
692 #define VMALLOC_END TASK_SIZE
694 #endif /* !CONFIG_MMU */
696 #define kern_addr_valid(addr) (1) /* FIXME */
698 extern char _start[];
699 extern void *_dtb_early_va;
700 extern uintptr_t _dtb_early_pa;
701 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU)
702 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va))
703 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa))
705 #define dtb_early_va _dtb_early_va
706 #define dtb_early_pa _dtb_early_pa
707 #endif /* CONFIG_XIP_KERNEL */
709 void paging_init(void);
710 void misc_mem_init(void);
713 * ZERO_PAGE is a global shared page that is always zero,
714 * used for zero-mapped memory areas, etc.
716 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
717 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
719 #endif /* !__ASSEMBLY__ */
721 #endif /* _ASM_RISCV_PGTABLE_H */