1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
7 #ifndef __ASM_RISCV_IO_H
8 #define __ASM_RISCV_IO_H
12 #include <linux/types.h>
13 #include <asm/byteorder.h>
15 static inline void sync(void)
20 * Given a physical address and a length, return a virtual address
21 * that can be used to access the memory range with the caching
22 * properties specified by "flags".
24 #define MAP_NOCACHE (0)
25 #define MAP_WRCOMBINE (0)
26 #define MAP_WRBACK (0)
27 #define MAP_WRTHROUGH (0)
29 #ifdef CONFIG_ARCH_MAP_SYSMEM
30 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
32 if (paddr < PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE)
33 paddr = paddr | 0x40000000;
34 return (void *)(uintptr_t)paddr;
37 static inline void *unmap_sysmem(const void *vaddr)
39 phys_addr_t paddr = (phys_addr_t)vaddr;
41 paddr = paddr & ~0x40000000;
42 return (void *)(uintptr_t)paddr;
45 static inline phys_addr_t map_to_sysmem(const void *ptr)
47 return (phys_addr_t)(uintptr_t)ptr;
52 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
58 * Take down a mapping set up by map_physmem().
60 static inline void unmap_physmem(void *vaddr, unsigned long flags)
64 static inline phys_addr_t virt_to_phys(void *vaddr)
66 return (phys_addr_t)(vaddr);
70 * Generic virtual read/write. Note that we don't support half-word
71 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
72 * to the architecture specific code.
74 #define __arch_getb(a) (*(unsigned char *)(a))
75 #define __arch_getw(a) (*(unsigned short *)(a))
76 #define __arch_getl(a) (*(unsigned int *)(a))
77 #define __arch_getq(a) (*(unsigned long *)(a))
79 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
80 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
81 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
82 #define __arch_putq(v, a) (*(unsigned long *)(a) = (v))
84 #define __raw_writeb(v, a) __arch_putb(v, a)
85 #define __raw_writew(v, a) __arch_putw(v, a)
86 #define __raw_writel(v, a) __arch_putl(v, a)
87 #define __raw_writeq(v, a) __arch_putq(v, a)
89 #define __raw_readb(a) __arch_getb(a)
90 #define __raw_readw(a) __arch_getw(a)
91 #define __raw_readl(a) __arch_getl(a)
92 #define __raw_readq(a) __arch_getq(a)
95 * TODO: The kernel offers some more advanced versions of barriers, it might
96 * have some advantages to use them instead of the simple one here.
98 #define dmb() __asm__ __volatile__ ("" : : : "memory")
99 #define __iormb() dmb()
100 #define __iowmb() dmb()
102 static inline void writeb(u8 val, volatile void __iomem *addr)
105 __arch_putb(val, addr);
108 static inline void writew(u16 val, volatile void __iomem *addr)
111 __arch_putw(val, addr);
114 static inline void writel(u32 val, volatile void __iomem *addr)
117 __arch_putl(val, addr);
120 static inline void writeq(u64 val, volatile void __iomem *addr)
123 __arch_putq(val, addr);
126 static inline u8 readb(const volatile void __iomem *addr)
130 val = __arch_getb(addr);
135 static inline u16 readw(const volatile void __iomem *addr)
139 val = __arch_getw(addr);
144 static inline u32 readl(const volatile void __iomem *addr)
148 val = __arch_getl(addr);
153 static inline u64 readq(const volatile void __iomem *addr)
157 val = __arch_getq(addr);
163 * The compiler seems to be incapable of optimising constants
164 * properly. Spell it out to the compiler in some cases.
165 * These are only valid for small values of "off" (< 1<<12)
167 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
168 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
169 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
171 #define __raw_base_readb(base, off) __arch_base_getb(base, off)
172 #define __raw_base_readw(base, off) __arch_base_getw(base, off)
173 #define __raw_base_readl(base, off) __arch_base_getl(base, off)
175 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
176 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
178 #define out_le32(a, v) out_arch(l, le32, a, v)
179 #define out_le16(a, v) out_arch(w, le16, a, v)
181 #define in_le32(a) in_arch(l, le32, a)
182 #define in_le16(a) in_arch(w, le16, a)
184 #define out_be32(a, v) out_arch(l, be32, a, v)
185 #define out_be16(a, v) out_arch(w, be16, a, v)
187 #define in_be32(a) in_arch(l, be32, a)
188 #define in_be16(a) in_arch(w, be16, a)
190 #define out_8(a, v) __raw_writeb(v, a)
191 #define in_8(a) __raw_readb(a)
194 * Clear and set bits in one shot. These macros can be used to clear and
195 * set multiple bits in a register using a single call. These macros can
196 * also be used to set a multiple-bit bit pattern using a mask, by
197 * specifying the mask in the 'clear' parameter and the new bit pattern
198 * in the 'set' parameter.
201 #define clrbits(type, addr, clear) \
202 out_##type((addr), in_##type(addr) & ~(clear))
204 #define setbits(type, addr, set) \
205 out_##type((addr), in_##type(addr) | (set))
207 #define clrsetbits(type, addr, clear, set) \
208 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
210 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
211 #define setbits_be32(addr, set) setbits(be32, addr, set)
212 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
214 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
215 #define setbits_le32(addr, set) setbits(le32, addr, set)
216 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
218 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
219 #define setbits_be16(addr, set) setbits(be16, addr, set)
220 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
222 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
223 #define setbits_le16(addr, set) setbits(le16, addr, set)
224 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
226 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
227 #define setbits_8(addr, set) setbits(8, addr, set)
228 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
231 * Now, pick up the machine-defined IO definitions
232 * #include <asm/arch/io.h>
236 * IO port access primitives
237 * -------------------------
239 * The NDS32 doesn't have special IO access instructions just like ARM;
240 * all IO is memory mapped.
241 * Note that these are defined to perform little endian accesses
242 * only. Their primary purpose is to access PCI and ISA peripherals.
244 * Note that for a big endian machine, this implies that the following
245 * big endian mode connectivity is in place, as described by numerious
248 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
249 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
251 * The machine specific io.h include defines __io to translate an "IO"
252 * address to a memory address.
254 * Note that we prevent GCC re-ordering or caching values in expressions
255 * by introducing sequence points into the in*() definitions. Note that
256 * __raw_* do not guarantee this behaviour.
258 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
261 #define outb(v, p) __raw_writeb(v, __io(p))
262 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
263 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
265 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
266 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
267 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
269 #define outsb(p, d, l) writesb(__io(p), d, l)
270 #define outsw(p, d, l) writesw(__io(p), d, l)
271 #define outsl(p, d, l) writesl(__io(p), d, l)
273 #define insb(p, d, l) readsb(__io(p), d, l)
274 #define insw(p, d, l) readsw(__io(p), d, l)
275 #define insl(p, d, l) readsl(__io(p), d, l)
277 static inline void readsb(unsigned int *addr, void *data, int bytelen)
282 ptr = (unsigned char *)addr;
283 ptr2 = (unsigned char *)data;
292 static inline void readsw(unsigned int *addr, void *data, int wordlen)
295 unsigned short *ptr2;
297 ptr = (unsigned short *)addr;
298 ptr2 = (unsigned short *)data;
307 static inline void readsl(unsigned int *addr, void *data, int longlen)
312 ptr = (unsigned int *)addr;
313 ptr2 = (unsigned int *)data;
322 static inline void writesb(unsigned int *addr, const void *data, int bytelen)
327 ptr = (unsigned char *)addr;
328 ptr2 = (unsigned char *)data;
337 static inline void writesw(unsigned int *addr, const void *data, int wordlen)
340 unsigned short *ptr2;
342 ptr = (unsigned short *)addr;
343 ptr2 = (unsigned short *)data;
352 static inline void writesl(unsigned int *addr, const void *data, int longlen)
357 ptr = (unsigned int *)addr;
358 ptr2 = (unsigned int *)data;
368 #define outb_p(val, port) outb((val), (port))
369 #define outw_p(val, port) outw((val), (port))
370 #define outl_p(val, port) outl((val), (port))
371 #define inb_p(port) inb((port))
372 #define inw_p(port) inw((port))
373 #define inl_p(port) inl((port))
375 #define outsb_p(port, from, len) outsb(port, from, len)
376 #define outsw_p(port, from, len) outsw(port, from, len)
377 #define outsl_p(port, from, len) outsl(port, from, len)
378 #define insb_p(port, to, len) insb(port, to, len)
379 #define insw_p(port, to, len) insw(port, to, len)
380 #define insl_p(port, to, len) insl(port, to, len)
383 * DMA-consistent mapping functions. These allocate/free a region of
384 * uncached, unwrite-buffered mapped memory space for use with DMA
385 * devices. This is the "generic" version. The PCI specific version
390 * String version of IO memory access ops:
394 * If this architecture has PCI memory IO, then define the read/write
395 * macros. These should only be used with the cookie passed from
400 #define readb(c) ({ unsigned int __v = \
401 __raw_readb(__mem_pci(c)); __v; })
402 #define readw(c) ({ unsigned int __v = \
403 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
404 #define readl(c) ({ unsigned int __v = \
405 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
407 #define writeb(v, c) __raw_writeb(v, __mem_pci(c))
408 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
409 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
411 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
412 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
413 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
415 #define eth_io_copy_and_sum(s, c, l, b) \
416 eth_copy_and_sum((s), __mem_pci(c), (l), (b))
418 static inline int check_signature(ulong io_addr, const uchar *s, int len)
423 if (readb(io_addr) != *s)
433 #endif /* __mem_pci */
436 * If this architecture has ISA IO, then define the isa_read/isa_write
441 #define isa_readb(addr) __raw_readb(__mem_isa(addr))
442 #define isa_readw(addr) __raw_readw(__mem_isa(addr))
443 #define isa_readl(addr) __raw_readl(__mem_isa(addr))
444 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
445 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
446 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
447 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
448 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
449 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
451 #define isa_eth_io_copy_and_sum(a, b, c, d) \
452 eth_copy_and_sum((a), __mem_isa(b), (c), (d))
455 isa_check_signature(ulong io_addr, const uchar *s, int len)
460 if (isa_readb(io_addr) != *s)
471 #else /* __mem_isa */
473 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
474 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
475 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
476 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
477 #define isa_writew(val, addr) __readwrite_bug("isa_writew")
478 #define isa_writel(val, addr) __readwrite_bug("isa_writel")
479 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
480 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
481 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
483 #define isa_eth_io_copy_and_sum(a, b, c, d) \
484 __readwrite_bug("isa_eth_io_copy_and_sum")
486 #define isa_check_signature(io, sig, len) (0)
488 #endif /* __mem_isa */
489 #endif /* __KERNEL__ */
490 #endif /* __ASM_RISCV_IO_H */