1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2015 Regents of the University of California
6 #ifndef _ASM_RISCV_CSR_H
7 #define _ASM_RISCV_CSR_H
10 #include <linux/const.h>
12 /* Status register flags */
13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
14 #define SR_MIE _AC(0x00000008, UL) /* Machine Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
16 #define SR_MPIE _AC(0x00000080, UL) /* Previous Machine IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
18 #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
21 #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */
22 #define SR_FS_OFF _AC(0x00000000, UL)
23 #define SR_FS_INITIAL _AC(0x00002000, UL)
24 #define SR_FS_CLEAN _AC(0x00004000, UL)
25 #define SR_FS_DIRTY _AC(0x00006000, UL)
27 #define SR_XS _AC(0x00018000, UL) /* Extension Status */
28 #define SR_XS_OFF _AC(0x00000000, UL)
29 #define SR_XS_INITIAL _AC(0x00008000, UL)
30 #define SR_XS_CLEAN _AC(0x00010000, UL)
31 #define SR_XS_DIRTY _AC(0x00018000, UL)
34 #define SR_SD _AC(0x80000000, UL) /* FS/XS dirty */
36 #define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */
40 #define SR_UXL _AC(0x300000000, UL) /* XLEN mask for U-mode */
41 #define SR_UXL_32 _AC(0x100000000, UL) /* XLEN = 32 for U-mode */
42 #define SR_UXL_64 _AC(0x200000000, UL) /* XLEN = 64 for U-mode */
43 #define SR_UXL_SHIFT 32
48 #define SATP_PPN _AC(0x003FFFFF, UL)
49 #define SATP_MODE_32 _AC(0x80000000, UL)
50 #define SATP_ASID_BITS 9
51 #define SATP_ASID_SHIFT 22
52 #define SATP_ASID_MASK _AC(0x1FF, UL)
54 #define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL)
55 #define SATP_MODE_39 _AC(0x8000000000000000, UL)
56 #define SATP_MODE_48 _AC(0x9000000000000000, UL)
57 #define SATP_MODE_57 _AC(0xa000000000000000, UL)
58 #define SATP_ASID_BITS 16
59 #define SATP_ASID_SHIFT 44
60 #define SATP_ASID_MASK _AC(0xFFFF, UL)
63 /* Exception cause high bit - is an interrupt if set */
64 #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1))
66 /* Interrupt causes (minus the high bit) */
71 #define IRQ_VS_TIMER 6
76 #define IRQ_PMU_OVF 13
78 /* Exception causes */
79 #define EXC_INST_MISALIGNED 0
80 #define EXC_INST_ACCESS 1
81 #define EXC_INST_ILLEGAL 2
82 #define EXC_BREAKPOINT 3
83 #define EXC_LOAD_ACCESS 5
84 #define EXC_STORE_ACCESS 7
86 #define EXC_HYPERVISOR_SYSCALL 9
87 #define EXC_SUPERVISOR_SYSCALL 10
88 #define EXC_INST_PAGE_FAULT 12
89 #define EXC_LOAD_PAGE_FAULT 13
90 #define EXC_STORE_PAGE_FAULT 15
91 #define EXC_INST_GUEST_PAGE_FAULT 20
92 #define EXC_LOAD_GUEST_PAGE_FAULT 21
93 #define EXC_VIRTUAL_INST_FAULT 22
94 #define EXC_STORE_GUEST_PAGE_FAULT 23
96 /* PMP configuration */
101 #define PMP_A_TOR 0x08
102 #define PMP_A_NA4 0x10
103 #define PMP_A_NAPOT 0x18
108 #define HSTATUS_VSXL _AC(0x300000000, UL)
109 #define HSTATUS_VSXL_SHIFT 32
111 #define HSTATUS_VTSR _AC(0x00400000, UL)
112 #define HSTATUS_VTW _AC(0x00200000, UL)
113 #define HSTATUS_VTVM _AC(0x00100000, UL)
114 #define HSTATUS_VGEIN _AC(0x0003f000, UL)
115 #define HSTATUS_VGEIN_SHIFT 12
116 #define HSTATUS_HU _AC(0x00000200, UL)
117 #define HSTATUS_SPVP _AC(0x00000100, UL)
118 #define HSTATUS_SPV _AC(0x00000080, UL)
119 #define HSTATUS_GVA _AC(0x00000040, UL)
120 #define HSTATUS_VSBE _AC(0x00000020, UL)
123 #define HGATP_MODE_OFF _AC(0, UL)
124 #define HGATP_MODE_SV32X4 _AC(1, UL)
125 #define HGATP_MODE_SV39X4 _AC(8, UL)
126 #define HGATP_MODE_SV48X4 _AC(9, UL)
127 #define HGATP_MODE_SV57X4 _AC(10, UL)
129 #define HGATP32_MODE_SHIFT 31
130 #define HGATP32_VMID_SHIFT 22
131 #define HGATP32_VMID_MASK _AC(0x1FC00000, UL)
132 #define HGATP32_PPN _AC(0x003FFFFF, UL)
134 #define HGATP64_MODE_SHIFT 60
135 #define HGATP64_VMID_SHIFT 44
136 #define HGATP64_VMID_MASK _AC(0x03FFF00000000000, UL)
137 #define HGATP64_PPN _AC(0x00000FFFFFFFFFFF, UL)
139 #define HGATP_PAGE_SHIFT 12
142 #define HGATP_PPN HGATP64_PPN
143 #define HGATP_VMID_SHIFT HGATP64_VMID_SHIFT
144 #define HGATP_VMID_MASK HGATP64_VMID_MASK
145 #define HGATP_MODE_SHIFT HGATP64_MODE_SHIFT
147 #define HGATP_PPN HGATP32_PPN
148 #define HGATP_VMID_SHIFT HGATP32_VMID_SHIFT
149 #define HGATP_VMID_MASK HGATP32_VMID_MASK
150 #define HGATP_MODE_SHIFT HGATP32_MODE_SHIFT
153 /* VSIP & HVIP relation */
154 #define VSIP_TO_HVIP_SHIFT (IRQ_VS_SOFT - IRQ_S_SOFT)
155 #define VSIP_VALID_MASK ((_AC(1, UL) << IRQ_S_SOFT) | \
156 (_AC(1, UL) << IRQ_S_TIMER) | \
157 (_AC(1, UL) << IRQ_S_EXT))
160 #define ENVCFG_STCE (_AC(1, ULL) << 63)
161 #define ENVCFG_PBMTE (_AC(1, ULL) << 62)
162 #define ENVCFG_CBZE (_AC(1, UL) << 7)
163 #define ENVCFG_CBCFE (_AC(1, UL) << 6)
164 #define ENVCFG_CBIE_SHIFT 4
165 #define ENVCFG_CBIE (_AC(0x3, UL) << ENVCFG_CBIE_SHIFT)
166 #define ENVCFG_CBIE_ILL _AC(0x0, UL)
167 #define ENVCFG_CBIE_FLUSH _AC(0x1, UL)
168 #define ENVCFG_CBIE_INV _AC(0x3, UL)
169 #define ENVCFG_FIOM _AC(0x1, UL)
171 /* symbolic CSR names: */
172 #define CSR_CYCLE 0xc00
173 #define CSR_TIME 0xc01
174 #define CSR_INSTRET 0xc02
175 #define CSR_HPMCOUNTER3 0xc03
176 #define CSR_HPMCOUNTER4 0xc04
177 #define CSR_HPMCOUNTER5 0xc05
178 #define CSR_HPMCOUNTER6 0xc06
179 #define CSR_HPMCOUNTER7 0xc07
180 #define CSR_HPMCOUNTER8 0xc08
181 #define CSR_HPMCOUNTER9 0xc09
182 #define CSR_HPMCOUNTER10 0xc0a
183 #define CSR_HPMCOUNTER11 0xc0b
184 #define CSR_HPMCOUNTER12 0xc0c
185 #define CSR_HPMCOUNTER13 0xc0d
186 #define CSR_HPMCOUNTER14 0xc0e
187 #define CSR_HPMCOUNTER15 0xc0f
188 #define CSR_HPMCOUNTER16 0xc10
189 #define CSR_HPMCOUNTER17 0xc11
190 #define CSR_HPMCOUNTER18 0xc12
191 #define CSR_HPMCOUNTER19 0xc13
192 #define CSR_HPMCOUNTER20 0xc14
193 #define CSR_HPMCOUNTER21 0xc15
194 #define CSR_HPMCOUNTER22 0xc16
195 #define CSR_HPMCOUNTER23 0xc17
196 #define CSR_HPMCOUNTER24 0xc18
197 #define CSR_HPMCOUNTER25 0xc19
198 #define CSR_HPMCOUNTER26 0xc1a
199 #define CSR_HPMCOUNTER27 0xc1b
200 #define CSR_HPMCOUNTER28 0xc1c
201 #define CSR_HPMCOUNTER29 0xc1d
202 #define CSR_HPMCOUNTER30 0xc1e
203 #define CSR_HPMCOUNTER31 0xc1f
204 #define CSR_CYCLEH 0xc80
205 #define CSR_TIMEH 0xc81
206 #define CSR_INSTRETH 0xc82
207 #define CSR_HPMCOUNTER3H 0xc83
208 #define CSR_HPMCOUNTER4H 0xc84
209 #define CSR_HPMCOUNTER5H 0xc85
210 #define CSR_HPMCOUNTER6H 0xc86
211 #define CSR_HPMCOUNTER7H 0xc87
212 #define CSR_HPMCOUNTER8H 0xc88
213 #define CSR_HPMCOUNTER9H 0xc89
214 #define CSR_HPMCOUNTER10H 0xc8a
215 #define CSR_HPMCOUNTER11H 0xc8b
216 #define CSR_HPMCOUNTER12H 0xc8c
217 #define CSR_HPMCOUNTER13H 0xc8d
218 #define CSR_HPMCOUNTER14H 0xc8e
219 #define CSR_HPMCOUNTER15H 0xc8f
220 #define CSR_HPMCOUNTER16H 0xc90
221 #define CSR_HPMCOUNTER17H 0xc91
222 #define CSR_HPMCOUNTER18H 0xc92
223 #define CSR_HPMCOUNTER19H 0xc93
224 #define CSR_HPMCOUNTER20H 0xc94
225 #define CSR_HPMCOUNTER21H 0xc95
226 #define CSR_HPMCOUNTER22H 0xc96
227 #define CSR_HPMCOUNTER23H 0xc97
228 #define CSR_HPMCOUNTER24H 0xc98
229 #define CSR_HPMCOUNTER25H 0xc99
230 #define CSR_HPMCOUNTER26H 0xc9a
231 #define CSR_HPMCOUNTER27H 0xc9b
232 #define CSR_HPMCOUNTER28H 0xc9c
233 #define CSR_HPMCOUNTER29H 0xc9d
234 #define CSR_HPMCOUNTER30H 0xc9e
235 #define CSR_HPMCOUNTER31H 0xc9f
237 #define CSR_SSCOUNTOVF 0xda0
239 #define CSR_SSTATUS 0x100
240 #define CSR_SIE 0x104
241 #define CSR_STVEC 0x105
242 #define CSR_SCOUNTEREN 0x106
243 #define CSR_SSCRATCH 0x140
244 #define CSR_SEPC 0x141
245 #define CSR_SCAUSE 0x142
246 #define CSR_STVAL 0x143
247 #define CSR_SIP 0x144
248 #define CSR_SATP 0x180
250 #define CSR_STIMECMP 0x14D
251 #define CSR_STIMECMPH 0x15D
253 #define CSR_VSSTATUS 0x200
254 #define CSR_VSIE 0x204
255 #define CSR_VSTVEC 0x205
256 #define CSR_VSSCRATCH 0x240
257 #define CSR_VSEPC 0x241
258 #define CSR_VSCAUSE 0x242
259 #define CSR_VSTVAL 0x243
260 #define CSR_VSIP 0x244
261 #define CSR_VSATP 0x280
262 #define CSR_VSTIMECMP 0x24D
263 #define CSR_VSTIMECMPH 0x25D
265 #define CSR_HSTATUS 0x600
266 #define CSR_HEDELEG 0x602
267 #define CSR_HIDELEG 0x603
268 #define CSR_HIE 0x604
269 #define CSR_HTIMEDELTA 0x605
270 #define CSR_HCOUNTEREN 0x606
271 #define CSR_HGEIE 0x607
272 #define CSR_HENVCFG 0x60a
273 #define CSR_HTIMEDELTAH 0x615
274 #define CSR_HENVCFGH 0x61a
275 #define CSR_HTVAL 0x643
276 #define CSR_HIP 0x644
277 #define CSR_HVIP 0x645
278 #define CSR_HTINST 0x64a
279 #define CSR_HGATP 0x680
280 #define CSR_HGEIP 0xe12
282 #define CSR_MSTATUS 0x300
283 #define CSR_MISA 0x301
284 #define CSR_MIE 0x304
285 #define CSR_MTVEC 0x305
286 #define CSR_MENVCFG 0x30a
287 #define CSR_MENVCFGH 0x31a
288 #define CSR_MSCRATCH 0x340
289 #define CSR_MEPC 0x341
290 #define CSR_MCAUSE 0x342
291 #define CSR_MTVAL 0x343
292 #define CSR_MIP 0x344
293 #define CSR_PMPCFG0 0x3a0
294 #define CSR_PMPADDR0 0x3b0
295 #define CSR_MVENDORID 0xf11
296 #define CSR_MARCHID 0xf12
297 #define CSR_MIMPID 0xf13
298 #define CSR_MHARTID 0xf14
300 #ifdef CONFIG_RISCV_M_MODE
301 # define CSR_STATUS CSR_MSTATUS
302 # define CSR_IE CSR_MIE
303 # define CSR_TVEC CSR_MTVEC
304 # define CSR_SCRATCH CSR_MSCRATCH
305 # define CSR_EPC CSR_MEPC
306 # define CSR_CAUSE CSR_MCAUSE
307 # define CSR_TVAL CSR_MTVAL
308 # define CSR_IP CSR_MIP
310 # define SR_IE SR_MIE
311 # define SR_PIE SR_MPIE
312 # define SR_PP SR_MPP
314 # define RV_IRQ_SOFT IRQ_M_SOFT
315 # define RV_IRQ_TIMER IRQ_M_TIMER
316 # define RV_IRQ_EXT IRQ_M_EXT
317 #else /* CONFIG_RISCV_M_MODE */
318 # define CSR_STATUS CSR_SSTATUS
319 # define CSR_IE CSR_SIE
320 # define CSR_TVEC CSR_STVEC
321 # define CSR_SCRATCH CSR_SSCRATCH
322 # define CSR_EPC CSR_SEPC
323 # define CSR_CAUSE CSR_SCAUSE
324 # define CSR_TVAL CSR_STVAL
325 # define CSR_IP CSR_SIP
327 # define SR_IE SR_SIE
328 # define SR_PIE SR_SPIE
329 # define SR_PP SR_SPP
331 # define RV_IRQ_SOFT IRQ_S_SOFT
332 # define RV_IRQ_TIMER IRQ_S_TIMER
333 # define RV_IRQ_EXT IRQ_S_EXT
334 # define RV_IRQ_PMU IRQ_PMU_OVF
335 # define SIP_LCOFIP (_AC(0x1, UL) << IRQ_PMU_OVF)
337 #endif /* !CONFIG_RISCV_M_MODE */
339 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */
340 #define IE_SIE (_AC(0x1, UL) << RV_IRQ_SOFT)
341 #define IE_TIE (_AC(0x1, UL) << RV_IRQ_TIMER)
342 #define IE_EIE (_AC(0x1, UL) << RV_IRQ_EXT)
346 #define csr_swap(csr, val) \
348 unsigned long __v = (unsigned long)(val); \
349 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
350 : "=r" (__v) : "rK" (__v) \
355 #define csr_read(csr) \
357 register unsigned long __v; \
358 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
364 #define csr_write(csr, val) \
366 unsigned long __v = (unsigned long)(val); \
367 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
372 #define csr_read_set(csr, val) \
374 unsigned long __v = (unsigned long)(val); \
375 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
376 : "=r" (__v) : "rK" (__v) \
381 #define csr_set(csr, val) \
383 unsigned long __v = (unsigned long)(val); \
384 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \
389 #define csr_read_clear(csr, val) \
391 unsigned long __v = (unsigned long)(val); \
392 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
393 : "=r" (__v) : "rK" (__v) \
398 #define csr_clear(csr, val) \
400 unsigned long __v = (unsigned long)(val); \
401 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \
406 #endif /* __ASSEMBLY__ */
408 #endif /* _ASM_RISCV_CSR_H */