2 * linux/include/asm-arm/byteorder.h
4 * Copyright (C) 2017 Andes Technology Corporation
5 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
7 * ARM Endian-ness. In little endian mode, the data bus is connected such
8 * that byte accesses appear as:
9 * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
10 * and word accesses (data or instruction) appear as:
13 * When in big endian mode, byte accesses appear as:
14 * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
15 * and word accesses (data or instruction) appear as:
19 #ifndef __ASM_RISCV_BYTEORDER_H
20 #define __ASM_RISCV_BYTEORDER_H
22 #include <asm/types.h>
24 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
25 # define __BYTEORDER_HAS_U64__
26 # define __SWAB_64_THRU_32__
30 #include <linux/byteorder/big_endian.h>
32 #include <linux/byteorder/little_endian.h>